1 files changed, 17 insertions, 15 deletions

diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h
index 764094cff681..f9611bd69ed2 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -27,6 +27,7 @@
 #endif
 #include <asm/asm-compat.h>
 #include <asm/synch.h>
+#include <asm/ppc-opcode.h>
 
 #define arch_spin_is_locked(x)          ((x)->slock != 0)
 
@@ -60,13 +61,14 @@ static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
 
         token = LOCK_TOKEN;
         __asm__ __volatile__(
-"1:     lwarx           %0,0,%2\n\
+"1:     " PPC_LWARX(%0,0,%2,1) "\n\
         cmpwi           0,%0,0\n\
         bne-            2f\n\
         stwcx.          %1,0,%2\n\
-        bne-            1b\n\
-        isync\n\
-2:"     : "=&r" (tmp)
+        bne-            1b\n"
+        PPC_ACQUIRE_BARRIER
+"2:"
+        : "=&r" (tmp)
         : "r" (token), "r" (&lock->slock)
         : "cr0", "memory");
 
@@ -144,7 +146,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
 {
         SYNC_IO;
         __asm__ __volatile__("# arch_spin_unlock\n\t"
-                                LWSYNC_ON_SMP: : :"memory");
+                                PPC_RELEASE_BARRIER: : :"memory");
         lock->slock = 0;
 }
 
@@ -186,15 +188,15 @@ static inline long __arch_read_trylock(arch_rwlock_t *rw)
         long tmp;
 
         __asm__ __volatile__(
-"1:     lwarx           %0,0,%1\n"
+"1:     " PPC_LWARX(%0,0,%1,1) "\n"
         __DO_SIGN_EXTEND
 "       addic.          %0,%0,1\n\
         ble-            2f\n"
         PPC405_ERR77(0,%1)
 "       stwcx.          %0,0,%1\n\
-        bne-            1b\n\
-        isync\n\
-2:"     : "=&r" (tmp)
+        bne-            1b\n"
+        PPC_ACQUIRE_BARRIER
+"2:"    : "=&r" (tmp)
         : "r" (&rw->lock)
         : "cr0", "xer", "memory");
 
@@ -211,14 +213,14 @@ static inline long __arch_write_trylock(arch_rwlock_t *rw)
 
         token = WRLOCK_TOKEN;
         __asm__ __volatile__(
-"1:     lwarx           %0,0,%2\n\
+"1:     " PPC_LWARX(%0,0,%2,1) "\n\
         cmpwi           0,%0,0\n\
         bne-            2f\n"
         PPC405_ERR77(0,%1)
 "       stwcx.          %1,0,%2\n\
-        bne-            1b\n\
-        isync\n\
-2:"     : "=&r" (tmp)
+        bne-            1b\n"
+        PPC_ACQUIRE_BARRIER
+"2:"    : "=&r" (tmp)
         : "r" (token), "r" (&rw->lock)
         : "cr0", "memory");
 
@@ -269,7 +271,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
 
         __asm__ __volatile__(
         "# read_unlock\n\t"
-        LWSYNC_ON_SMP
+        PPC_RELEASE_BARRIER
 "1:     lwarx           %0,0,%1\n\
         addic           %0,%0,-1\n"
         PPC405_ERR77(0,%1)
@@ -283,7 +285,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
 static inline void arch_write_unlock(arch_rwlock_t *rw)
 {
         __asm__ __volatile__("# write_unlock\n\t"
-                                LWSYNC_ON_SMP: : :"memory");
+                                PPC_RELEASE_BARRIER: : :"memory");
         rw->lock = 0;
 }