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Diffstat (limited to 'arch/mips/txx9/rbtx4939/setup.c')
-rw-r--r--arch/mips/txx9/rbtx4939/setup.c307
1 files changed, 307 insertions, 0 deletions
diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c
new file mode 100644
index 000000000000..9855d7bccc20
--- /dev/null
+++ b/arch/mips/txx9/rbtx4939/setup.c
@@ -0,0 +1,307 @@
1/*
2 * Toshiba RBTX4939 setup routines.
3 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
4 * and RBTX49xx patch from CELF patch archive.
5 *
6 * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/platform_device.h>
16#include <linux/leds.h>
17#include <asm/reboot.h>
18#include <asm/txx9/generic.h>
19#include <asm/txx9/pci.h>
20#include <asm/txx9/rbtx4939.h>
21
22static void rbtx4939_machine_restart(char *command)
23{
24 local_irq_disable();
25 writeb(1, rbtx4939_reseten_addr);
26 writeb(1, rbtx4939_softreset_addr);
27 while (1)
28 ;
29}
30
31static void __init rbtx4939_time_init(void)
32{
33 tx4939_time_init(0);
34}
35
36static void __init rbtx4939_pci_setup(void)
37{
38#ifdef CONFIG_PCI
39 int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB);
40 struct pci_controller *c = &txx9_primary_pcic;
41
42 register_pci_controller(c);
43
44 tx4939_report_pciclk();
45 tx4927_pcic_setup(tx4939_pcicptr, c, extarb);
46 if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) &&
47 (__raw_readq(&tx4939_ccfgptr->pcfg) &
48 (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) {
49 tx4939_report_pci1clk();
50
51 /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
52 c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
53 register_pci_controller(c);
54 tx4927_pcic_setup(tx4939_pcic1ptr, c, 0);
55 }
56
57 tx4939_setup_pcierr_irq();
58#endif /* CONFIG_PCI */
59}
60
61static unsigned long long default_ebccr[] __initdata = {
62 0x01c0000000007608ULL, /* 64M ROM */
63 0x017f000000007049ULL, /* 1M IOC */
64 0x0180000000408608ULL, /* ISA */
65 0,
66};
67
68static void __init rbtx4939_ebusc_setup(void)
69{
70 int i;
71 unsigned int sp;
72
73 /* use user-configured speed */
74 sp = TX4939_EBUSC_CR(0) & 0x30;
75 default_ebccr[0] |= sp;
76 default_ebccr[1] |= sp;
77 default_ebccr[2] |= sp;
78 /* initialise by myself */
79 for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) {
80 if (default_ebccr[i])
81 ____raw_writeq(default_ebccr[i],
82 &tx4939_ebuscptr->cr[i]);
83 else
84 ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i])
85 & ~8,
86 &tx4939_ebuscptr->cr[i]);
87 }
88}
89
90static void __init rbtx4939_update_ioc_pen(void)
91{
92 __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
93 __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg);
94 __u8 pe1 = readb(rbtx4939_pe1_addr);
95 __u8 pe2 = readb(rbtx4939_pe2_addr);
96 __u8 pe3 = readb(rbtx4939_pe3_addr);
97 if (pcfg & TX4939_PCFG_ATA0MODE)
98 pe1 |= RBTX4939_PE1_ATA(0);
99 else
100 pe1 &= ~RBTX4939_PE1_ATA(0);
101 if (pcfg & TX4939_PCFG_ATA1MODE) {
102 pe1 |= RBTX4939_PE1_ATA(1);
103 pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1));
104 } else {
105 pe1 &= ~RBTX4939_PE1_ATA(1);
106 if (pcfg & TX4939_PCFG_ET0MODE)
107 pe1 |= RBTX4939_PE1_RMII(0);
108 else
109 pe1 &= ~RBTX4939_PE1_RMII(0);
110 if (pcfg & TX4939_PCFG_ET1MODE)
111 pe1 |= RBTX4939_PE1_RMII(1);
112 else
113 pe1 &= ~RBTX4939_PE1_RMII(1);
114 }
115 if (ccfg & TX4939_CCFG_PTSEL)
116 pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
117 RBTX4939_PE3_VP_S);
118 else {
119 __u64 vmode = pcfg &
120 (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE);
121 if (vmode == 0)
122 pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
123 RBTX4939_PE3_VP_S);
124 else if (vmode == TX4939_PCFG_VPSMODE) {
125 pe3 |= RBTX4939_PE3_VP_P;
126 pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S);
127 } else if (vmode == TX4939_PCFG_VSSMODE) {
128 pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S;
129 pe3 &= ~RBTX4939_PE3_VP_P;
130 } else {
131 pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P;
132 pe3 &= ~RBTX4939_PE3_VP_S;
133 }
134 }
135 if (pcfg & TX4939_PCFG_SPIMODE) {
136 if (pcfg & TX4939_PCFG_SIO2MODE_GPIO)
137 pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0);
138 else {
139 if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) {
140 pe2 |= RBTX4939_PE2_SIO2;
141 pe2 &= ~RBTX4939_PE2_SIO0;
142 } else {
143 pe2 |= RBTX4939_PE2_SIO0;
144 pe2 &= ~RBTX4939_PE2_SIO2;
145 }
146 }
147 if (pcfg & TX4939_PCFG_SIO3MODE)
148 pe2 |= RBTX4939_PE2_SIO3;
149 else
150 pe2 &= ~RBTX4939_PE2_SIO3;
151 pe2 &= ~RBTX4939_PE2_SPI;
152 } else {
153 pe2 |= RBTX4939_PE2_SPI;
154 pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 |
155 RBTX4939_PE2_SIO0);
156 }
157 if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO)
158 pe2 |= RBTX4939_PE2_GPIO;
159 else
160 pe2 &= ~RBTX4939_PE2_GPIO;
161 writeb(pe1, rbtx4939_pe1_addr);
162 writeb(pe2, rbtx4939_pe2_addr);
163 writeb(pe3, rbtx4939_pe3_addr);
164}
165
166#define RBTX4939_MAX_7SEGLEDS 8
167
168#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
169static u8 led_val[RBTX4939_MAX_7SEGLEDS];
170struct rbtx4939_led_data {
171 struct led_classdev cdev;
172 char name[32];
173 unsigned int num;
174};
175
176/* Use "dot" in 7seg LEDs */
177static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev,
178 enum led_brightness value)
179{
180 struct rbtx4939_led_data *led_dat =
181 container_of(led_cdev, struct rbtx4939_led_data, cdev);
182 unsigned int num = led_dat->num;
183 unsigned long flags;
184
185 local_irq_save(flags);
186 led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0);
187 writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4));
188 local_irq_restore(flags);
189}
190
191static int __init rbtx4939_led_probe(struct platform_device *pdev)
192{
193 struct rbtx4939_led_data *leds_data;
194 int i;
195 static char *default_triggers[] __initdata = {
196 "heartbeat",
197 "ide-disk",
198 "nand-disk",
199 };
200
201 leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS,
202 GFP_KERNEL);
203 if (!leds_data)
204 return -ENOMEM;
205 for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) {
206 int rc;
207 struct rbtx4939_led_data *led_dat = &leds_data[i];
208
209 led_dat->num = i;
210 led_dat->cdev.brightness_set = rbtx4939_led_brightness_set;
211 sprintf(led_dat->name, "rbtx4939:amber:%u", i);
212 led_dat->cdev.name = led_dat->name;
213 if (i < ARRAY_SIZE(default_triggers))
214 led_dat->cdev.default_trigger = default_triggers[i];
215 rc = led_classdev_register(&pdev->dev, &led_dat->cdev);
216 if (rc < 0)
217 return rc;
218 led_dat->cdev.brightness_set(&led_dat->cdev, 0);
219 }
220 return 0;
221
222}
223
224static struct platform_driver rbtx4939_led_driver = {
225 .driver = {
226 .name = "rbtx4939-led",
227 .owner = THIS_MODULE,
228 },
229};
230
231static void __init rbtx4939_led_setup(void)
232{
233 platform_device_register_simple("rbtx4939-led", -1, NULL, 0);
234 platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe);
235}
236#else
237static inline void rbtx4939_led_setup(void)
238{
239}
240#endif
241
242static void __init rbtx4939_arch_init(void)
243{
244 rbtx4939_pci_setup();
245}
246
247static void __init rbtx4939_device_init(void)
248{
249#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
250 int i, j;
251 unsigned char ethaddr[2][6];
252 for (i = 0; i < 2; i++) {
253 unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10);
254 if (readb(rbtx4939_bdipsw_addr) & 8) {
255 u16 buf[3];
256 area -= 0x03000000;
257 for (j = 0; j < 3; j++)
258 buf[j] = le16_to_cpup((u16 *)(area + j * 2));
259 memcpy(ethaddr[i], buf, 6);
260 } else
261 memcpy(ethaddr[i], (void *)area, 6);
262 }
263 tx4939_ethaddr_init(ethaddr[0], ethaddr[1]);
264#endif
265 rbtx4939_led_setup();
266 tx4939_wdt_init();
267 tx4939_ata_init();
268}
269
270static void __init rbtx4939_setup(void)
271{
272 rbtx4939_ebusc_setup();
273 /* always enable ATA0 */
274 txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
275 rbtx4939_update_ioc_pen();
276 if (txx9_master_clock == 0)
277 txx9_master_clock = 20000000;
278 tx4939_setup();
279
280 _machine_restart = rbtx4939_machine_restart;
281
282 pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
283 readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr),
284 readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr));
285
286#ifdef CONFIG_PCI
287 txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
288 txx9_board_pcibios_setup = tx4927_pcibios_setup;
289#else
290 set_io_port_base(RBTX4939_ETHER_BASE);
291#endif
292
293 tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0);
294}
295
296struct txx9_board_vec rbtx4939_vec __initdata = {
297 .system = "Tothiba RBTX4939",
298 .prom_init = rbtx4939_prom_init,
299 .mem_setup = rbtx4939_setup,
300 .irq_setup = rbtx4939_irq_setup,
301 .time_init = rbtx4939_time_init,
302 .device_init = rbtx4939_device_init,
303 .arch_init = rbtx4939_arch_init,
304#ifdef CONFIG_PCI
305 .pci_map_irq = tx4939_pci_map_irq,
306#endif
307};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 21:08:12 -0500