5 files changed, 203 insertions, 10 deletions

diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 15e01aec37fd..b1886244cedf 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_SOC_TX3927)	+= ops-tx3927.o
 obj-$(CONFIG_PCI_VR41XX)        += ops-vr41xx.o pci-vr41xx.o
 obj-$(CONFIG_MARKEINS)          += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
 obj-$(CONFIG_PCI_TX4927)        += ops-tx4927.o
+obj-$(CONFIG_BCM47XX)           += pci-bcm47xx.o
 
 #
 # These are still pretty much in the old state, watch, go blind.
@@ -44,6 +45,7 @@ obj-$(CONFIG_TANBAC_TB0287)	+= fixup-tb0287.o
 obj-$(CONFIG_TOSHIBA_JMR3927)   += fixup-jmr3927.o
 obj-$(CONFIG_SOC_TX4927)        += pci-tx4927.o
 obj-$(CONFIG_SOC_TX4938)        += pci-tx4938.o
+obj-$(CONFIG_SOC_TX4939)        += pci-tx4939.o
 obj-$(CONFIG_TOSHIBA_RBTX4927)  += fixup-rbtx4927.o
 obj-$(CONFIG_TOSHIBA_RBTX4938)  += fixup-rbtx4938.o
 obj-$(CONFIG_VICTOR_MPC30X)     += fixup-mpc30x.o
diff --git a/arch/mips/pci/pci-bcm47xx.c b/arch/mips/pci/pci-bcm47xx.c
new file mode 100644
index 000000000000..bea9b6cdfdbf
--- /dev/null
+++ b/arch/mips/pci/pci-bcm47xx.c
@@ -0,0 +1,60 @@
+/*
+ *  Copyright (C) 2008 Aurelien Jarno <aurelien@aurel32.net>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/ssb/ssb.h>
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+        return 0;
+}
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+        int res;
+        u8 slot, pin;
+
+        res = ssb_pcibios_plat_dev_init(dev);
+        if (res < 0) {
+                printk(KERN_ALERT "PCI: Failed to init device %s\n",
+                       pci_name(dev));
+                return res;
+        }
+
+        pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+        slot = PCI_SLOT(dev->devfn);
+        res = ssb_pcibios_map_irq(dev, slot, pin);
+
+        /* IRQ-0 and IRQ-1 are software interrupts. */
+        if (res < 2) {
+                printk(KERN_ALERT "PCI: Failed to map IRQ of device %s\n",
+                       pci_name(dev));
+                return res;
+        }
+
+        dev->irq = res;
+        return 0;
+}
+
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index bd78368c82bf..f97ab1461012 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -143,25 +143,47 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
  */
 int __devinit pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
+        return 0;
+}
+
+/* Most MIPS systems have straight-forward swizzling needs.  */
+static inline u8 bridge_swizzle(u8 pin, u8 slot)
+{
+        return (((pin - 1) + slot) % 4) + 1;
+}
+
+static inline struct pci_dev *bridge_root_dev(struct pci_dev *dev)
+{
+        while (dev->bus->parent) {
+                /* Move up the chain of bridges. */
+                dev = dev->bus->self;
+        }
+
+        return dev;
+}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
         struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
-        int irq = bc->pci_int[slot];
+        struct pci_dev *rdev = bridge_root_dev(dev);
+        int slot = PCI_SLOT(rdev->devfn);
+        int irq;
 
+        irq = bc->pci_int[slot];
         if (irq == -1) {
-                irq = bc->pci_int[slot] = request_bridge_irq(bc);
+                irq = request_bridge_irq(bc);
                 if (irq < 0)
-                        panic("Can't allocate interrupt for PCI device %s\n",
-                              pci_name(dev));
+                        return irq;
+
+                bc->pci_int[slot] = irq;
         }
 
         irq_to_bridge[irq] = bc;
         irq_to_slot[irq] = slot;
 
-        return irq;
-}
+        dev->irq = irq;
 
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
         return 0;
 }
 
diff --git a/arch/mips/pci/pci-tx4938.c b/arch/mips/pci/pci-tx4938.c
index 60e2c52c2c5e..1ea257bc3b8f 100644
--- a/arch/mips/pci/pci-tx4938.c
+++ b/arch/mips/pci/pci-tx4938.c
@@ -114,7 +114,7 @@ int __init tx4938_pciclk66_setup(void)
         return pciclk;
 }
 
-int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
+int __init tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
 {
         if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) {
                 switch (slot) {
diff --git a/arch/mips/pci/pci-tx4939.c b/arch/mips/pci/pci-tx4939.c
new file mode 100644
index 000000000000..5fecf1cdc325
--- /dev/null
+++ b/arch/mips/pci/pci-tx4939.c
@@ -0,0 +1,109 @@
+/*
+ * linux/arch/mips/pci/pci-tx4939.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4939/setup.c,
+ *          and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001, 2003-2005 MontaVista Software Inc.
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/tx4939.h>
+
+int __init tx4939_report_pciclk(void)
+{
+        int pciclk = 0;
+
+        pr_info("PCIC --%s PCICLK:",
+                (__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ?
+                " PCI66" : "");
+        if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) {
+                pciclk = txx9_master_clock * 20 / 6;
+                if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66))
+                        pciclk /= 2;
+                printk(KERN_CONT "Internal(%u.%uMHz)",
+                       (pciclk + 50000) / 1000000,
+                       ((pciclk + 50000) / 100000) % 10);
+        } else {
+                printk(KERN_CONT "External");
+                pciclk = -1;
+        }
+        printk(KERN_CONT "\n");
+        return pciclk;
+}
+
+void __init tx4939_report_pci1clk(void)
+{
+        unsigned int pciclk = txx9_master_clock * 20 / 6;
+
+        pr_info("PCIC1 -- PCICLK:%u.%uMHz\n",
+                (pciclk + 50000) / 1000000,
+                ((pciclk + 50000) / 100000) % 10);
+}
+
+int __init tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
+{
+        if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4939_pcic1ptr) {
+                switch (slot) {
+                case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
+                        if (__raw_readq(&tx4939_ccfgptr->pcfg) &
+                            TX4939_PCFG_ET0MODE)
+                                return TXX9_IRQ_BASE + TX4939_IR_ETH(0);
+                        break;
+                case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
+                        if (__raw_readq(&tx4939_ccfgptr->pcfg) &
+                            TX4939_PCFG_ET1MODE)
+                                return TXX9_IRQ_BASE + TX4939_IR_ETH(1);
+                        break;
+                }
+                return 0;
+        }
+        return -1;
+}
+
+int __init tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+        int irq = tx4939_pcic1_map_irq(dev, slot);
+
+        if (irq >= 0)
+                return irq;
+        irq = pin;
+        /* IRQ rotation */
+        irq--;  /* 0-3 */
+        irq = (irq + 33 - slot) % 4;
+        irq++;  /* 1-4 */
+
+        switch (irq) {
+        case 1:
+                irq = TXX9_IRQ_BASE + TX4939_IR_INTA;
+                break;
+        case 2:
+                irq = TXX9_IRQ_BASE + TX4939_IR_INTB;
+                break;
+        case 3:
+                irq = TXX9_IRQ_BASE + TX4939_IR_INTC;
+                break;
+        case 4:
+                irq = TXX9_IRQ_BASE + TX4939_IR_INTD;
+                break;
+        }
+        return irq;
+}
+
+void __init tx4939_setup_pcierr_irq(void)
+{
+        if (request_irq(TXX9_IRQ_BASE + TX4939_IR_PCIERR,
+                        tx4927_pcierr_interrupt,
+                        IRQF_DISABLED, "PCI error",
+                        (void *)TX4939_PCIC_REG))
+                pr_warning("Failed to request irq for PCIERR\n");
+}