diff options
Diffstat (limited to 'arch/mips/momentum/ocelot_c/uart-irq.c')
-rw-r--r-- | arch/mips/momentum/ocelot_c/uart-irq.c | 66 |
1 files changed, 6 insertions, 60 deletions
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c index 510257dc205a..a7a80c0da569 100644 --- a/arch/mips/momentum/ocelot_c/uart-irq.c +++ b/arch/mips/momentum/ocelot_c/uart-irq.c | |||
@@ -60,48 +60,6 @@ static inline void unmask_uart_irq(unsigned int irq) | |||
60 | } | 60 | } |
61 | 61 | ||
62 | /* | 62 | /* |
63 | * Enables the IRQ in the FPGA | ||
64 | */ | ||
65 | static void enable_uart_irq(unsigned int irq) | ||
66 | { | ||
67 | unmask_uart_irq(irq); | ||
68 | } | ||
69 | |||
70 | /* | ||
71 | * Initialize the IRQ in the FPGA | ||
72 | */ | ||
73 | static unsigned int startup_uart_irq(unsigned int irq) | ||
74 | { | ||
75 | unmask_uart_irq(irq); | ||
76 | return 0; | ||
77 | } | ||
78 | |||
79 | /* | ||
80 | * Disables the IRQ in the FPGA | ||
81 | */ | ||
82 | static void disable_uart_irq(unsigned int irq) | ||
83 | { | ||
84 | mask_uart_irq(irq); | ||
85 | } | ||
86 | |||
87 | /* | ||
88 | * Masks and ACKs an IRQ | ||
89 | */ | ||
90 | static void mask_and_ack_uart_irq(unsigned int irq) | ||
91 | { | ||
92 | mask_uart_irq(irq); | ||
93 | } | ||
94 | |||
95 | /* | ||
96 | * End IRQ processing | ||
97 | */ | ||
98 | static void end_uart_irq(unsigned int irq) | ||
99 | { | ||
100 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
101 | unmask_uart_irq(irq); | ||
102 | } | ||
103 | |||
104 | /* | ||
105 | * Interrupt handler for interrupts coming from the FPGA chip. | 63 | * Interrupt handler for interrupts coming from the FPGA chip. |
106 | */ | 64 | */ |
107 | void ll_uart_irq(void) | 65 | void ll_uart_irq(void) |
@@ -118,28 +76,16 @@ void ll_uart_irq(void) | |||
118 | do_IRQ(ls1bit8(irq_src) + 74); | 76 | do_IRQ(ls1bit8(irq_src) + 74); |
119 | } | 77 | } |
120 | 78 | ||
121 | #define shutdown_uart_irq disable_uart_irq | ||
122 | |||
123 | struct irq_chip uart_irq_type = { | 79 | struct irq_chip uart_irq_type = { |
124 | .typename = "UART/FPGA", | 80 | .typename = "UART/FPGA", |
125 | .startup = startup_uart_irq, | 81 | .ack = mask_uart_irq, |
126 | .shutdown = shutdown_uart_irq, | 82 | .mask = mask_uart_irq, |
127 | .enable = enable_uart_irq, | 83 | .mask_ack = mask_uart_irq, |
128 | .disable = disable_uart_irq, | 84 | .unmask = unmask_uart_irq, |
129 | .ack = mask_and_ack_uart_irq, | ||
130 | .end = end_uart_irq, | ||
131 | }; | 85 | }; |
132 | 86 | ||
133 | void uart_irq_init(void) | 87 | void uart_irq_init(void) |
134 | { | 88 | { |
135 | /* Reset irq handlers pointers to NULL */ | 89 | set_irq_chip_and_handler(80, &uart_irq_type, handle_level_irq); |
136 | irq_desc[80].status = IRQ_DISABLED; | 90 | set_irq_chip_and_handler(81, &uart_irq_type, handle_level_irq); |
137 | irq_desc[80].action = 0; | ||
138 | irq_desc[80].depth = 2; | ||
139 | irq_desc[80].chip = &uart_irq_type; | ||
140 | |||
141 | irq_desc[81].status = IRQ_DISABLED; | ||
142 | irq_desc[81].action = 0; | ||
143 | irq_desc[81].depth = 2; | ||
144 | irq_desc[81].chip = &uart_irq_type; | ||
145 | } | 91 | } |