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-rw-r--r--arch/mips/loongson/common/pci.c83
1 files changed, 83 insertions, 0 deletions
diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson/common/pci.c
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index 000000000000..a3a4abfb6c9a
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+++ b/arch/mips/loongson/common/pci.c
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1/*
2 * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
3 * Author: Fuxin Zhang, zhangfx@lemote.com
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10#include <linux/pci.h>
11
12#include <pci.h>
13#include <loongson.h>
14
15static struct resource loongson_pci_mem_resource = {
16 .name = "pci memory space",
17 .start = LOONGSON_PCI_MEM_START,
18 .end = LOONGSON_PCI_MEM_END,
19 .flags = IORESOURCE_MEM,
20};
21
22static struct resource loongson_pci_io_resource = {
23 .name = "pci io space",
24 .start = LOONGSON_PCI_IO_START,
25 .end = IO_SPACE_LIMIT,
26 .flags = IORESOURCE_IO,
27};
28
29static struct pci_controller loongson_pci_controller = {
30 .pci_ops = &bonito64_pci_ops,
31 .io_resource = &loongson_pci_io_resource,
32 .mem_resource = &loongson_pci_mem_resource,
33 .mem_offset = 0x00000000UL,
34 .io_offset = 0x00000000UL,
35};
36
37static void __init setup_pcimap(void)
38{
39 /*
40 * local to PCI mapping for CPU accessing PCI space
41 * CPU address space [256M,448M] is window for accessing pci space
42 * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M]
43 *
44 * pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0
45 * [<2G] [384M,448M] [320M,384M] [0M,64M]
46 */
47 BONITO_PCIMAP = BONITO_PCIMAP_PCIMAP_2 |
48 BONITO_PCIMAP_WIN(2, BONITO_PCILO2_BASE) |
49 BONITO_PCIMAP_WIN(1, BONITO_PCILO1_BASE) |
50 BONITO_PCIMAP_WIN(0, 0);
51
52 /*
53 * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M]
54 */
55 BONITO_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */
56 /* size: 256M, burst transmission, pre-fetch enable, 64bit */
57 LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul;
58 LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful;
59 LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */
60 LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul;
61 LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */
62 LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul;
63
64 /* avoid deadlock of PCI reading/writing lock operation */
65 LOONGSON_PCI_ISR4C = 0xd2000001ul;
66
67 /* can not change gnt to break pci transfer when device's gnt not
68 deassert for some broken device */
69 LOONGSON_PXARB_CFG = 0x00fe0105ul;
70}
71
72static int __init pcibios_init(void)
73{
74 setup_pcimap();
75
76 loongson_pci_controller.io_map_base = mips_io_port_base;
77
78 register_pci_controller(&loongson_pci_controller);
79
80 return 0;
81}
82
83arch_initcall(pcibios_init);