diff options
Diffstat (limited to 'arch/mips/kernel/r4k_switch.S')
-rw-r--r-- | arch/mips/kernel/r4k_switch.S | 36 |
1 files changed, 3 insertions, 33 deletions
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index abacac7c33ef..81ca3f70fe29 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S | |||
@@ -28,6 +28,7 @@ | |||
28 | */ | 28 | */ |
29 | #define ST_OFF (_THREAD_SIZE - 32 - PT_SIZE + PT_STATUS) | 29 | #define ST_OFF (_THREAD_SIZE - 32 - PT_SIZE + PT_STATUS) |
30 | 30 | ||
31 | #ifndef USE_ALTERNATE_RESUME_IMPL | ||
31 | /* | 32 | /* |
32 | * task_struct *resume(task_struct *prev, task_struct *next, | 33 | * task_struct *resume(task_struct *prev, task_struct *next, |
33 | * struct thread_info *next_ti, s32 fp_save) | 34 | * struct thread_info *next_ti, s32 fp_save) |
@@ -87,18 +88,6 @@ | |||
87 | 88 | ||
88 | PTR_ADDU t0, $28, _THREAD_SIZE - 32 | 89 | PTR_ADDU t0, $28, _THREAD_SIZE - 32 |
89 | set_saved_sp t0, t1, t2 | 90 | set_saved_sp t0, t1, t2 |
90 | #ifdef CONFIG_MIPS_MT_SMTC | ||
91 | /* Read-modify-writes of Status must be atomic on a VPE */ | ||
92 | mfc0 t2, CP0_TCSTATUS | ||
93 | ori t1, t2, TCSTATUS_IXMT | ||
94 | mtc0 t1, CP0_TCSTATUS | ||
95 | andi t2, t2, TCSTATUS_IXMT | ||
96 | _ehb | ||
97 | DMT 8 # dmt t0 | ||
98 | move t1,ra | ||
99 | jal mips_ihb | ||
100 | move ra,t1 | ||
101 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
102 | mfc0 t1, CP0_STATUS /* Do we really need this? */ | 91 | mfc0 t1, CP0_STATUS /* Do we really need this? */ |
103 | li a3, 0xff01 | 92 | li a3, 0xff01 |
104 | and t1, a3 | 93 | and t1, a3 |
@@ -107,22 +96,12 @@ | |||
107 | and a2, a3 | 96 | and a2, a3 |
108 | or a2, t1 | 97 | or a2, t1 |
109 | mtc0 a2, CP0_STATUS | 98 | mtc0 a2, CP0_STATUS |
110 | #ifdef CONFIG_MIPS_MT_SMTC | ||
111 | _ehb | ||
112 | andi t0, t0, VPECONTROL_TE | ||
113 | beqz t0, 1f | ||
114 | emt | ||
115 | 1: | ||
116 | mfc0 t1, CP0_TCSTATUS | ||
117 | xori t1, t1, TCSTATUS_IXMT | ||
118 | or t1, t1, t2 | ||
119 | mtc0 t1, CP0_TCSTATUS | ||
120 | _ehb | ||
121 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
122 | move v0, a0 | 99 | move v0, a0 |
123 | jr ra | 100 | jr ra |
124 | END(resume) | 101 | END(resume) |
125 | 102 | ||
103 | #endif /* USE_ALTERNATE_RESUME_IMPL */ | ||
104 | |||
126 | /* | 105 | /* |
127 | * Save a thread's fp context. | 106 | * Save a thread's fp context. |
128 | */ | 107 | */ |
@@ -176,19 +155,10 @@ LEAF(_restore_msa) | |||
176 | #define FPU_DEFAULT 0x00000000 | 155 | #define FPU_DEFAULT 0x00000000 |
177 | 156 | ||
178 | LEAF(_init_fpu) | 157 | LEAF(_init_fpu) |
179 | #ifdef CONFIG_MIPS_MT_SMTC | ||
180 | /* Rather than manipulate per-VPE Status, set per-TC bit in TCStatus */ | ||
181 | mfc0 t0, CP0_TCSTATUS | ||
182 | /* Bit position is the same for Status, TCStatus */ | ||
183 | li t1, ST0_CU1 | ||
184 | or t0, t1 | ||
185 | mtc0 t0, CP0_TCSTATUS | ||
186 | #else /* Normal MIPS CU1 enable */ | ||
187 | mfc0 t0, CP0_STATUS | 158 | mfc0 t0, CP0_STATUS |
188 | li t1, ST0_CU1 | 159 | li t1, ST0_CU1 |
189 | or t0, t1 | 160 | or t0, t1 |
190 | mtc0 t0, CP0_STATUS | 161 | mtc0 t0, CP0_STATUS |
191 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
192 | enable_fpu_hazard | 162 | enable_fpu_hazard |
193 | 163 | ||
194 | li t1, FPU_DEFAULT | 164 | li t1, FPU_DEFAULT |