Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:
 - three fixes for 3.15 that didn't make it in time
 - limited Octeon 3 support.
 - paravirtualization support
 - improvment to platform support for Netlogix SOCs.
 - add support for powering down the Malta eval board in software
 - add many instructions to the in-kernel microassembler.
 - add support for the BPF JIT.
 - minor cleanups of the BCM47xx code.
 - large cleanup of math emu code resulting in significant code size
   reduction, better readability of the code and more accurate
   emulation.
 - improvments to the MIPS CPS code.
 - support C3 power status for the R4k count/compare clock device.
 - improvments to the GIO support for older SGI workstations.
 - increase number of supported CPUs to 256; this can be reached on
   certain embedded multithreaded ccNUMA configurations.
 - various small cleanups, updates and fixes

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (173 commits)
  MIPS: IP22/IP28: Improve GIO support
  MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XX
  DEC: Document the R4k MB ASIC mini interrupt controller
  DEC: Add self as the maintainer
  MIPS: Add microMIPS MSA support.
  MIPS: Replace calls to obsolete strict_strto call with kstrto* equivalents.
  MIPS: Replace obsolete strict_strto call with kstrto
  MIPS: BFP: Simplify code slightly.
  MIPS: Call find_vma with the mmap_sem held
  MIPS: Fix 'write_msa_##' inline macro.
  MIPS: Fix MSA toolchain support detection.
  mips: Update the email address of Geert Uytterhoeven
  MIPS: Add minimal defconfig for mips_paravirt
  MIPS: Enable build for new system 'paravirt'
  MIPS: paravirt: Add pci controller for virtio
  MIPS: Add code for new system 'paravirt'
  MIPS: Add functions for hypervisor call
  MIPS: OCTEON: Add OCTEON3 to __get_cpu_type
  MIPS: Add function get_ebase_cpunum
  MIPS: Add minimal support for OCTEON3 to c-r4k.c
  ...

1 files changed, 3 insertions, 33 deletions

diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index abacac7c33ef..81ca3f70fe29 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -28,6 +28,7 @@
  */
 #define ST_OFF (_THREAD_SIZE - 32 - PT_SIZE + PT_STATUS)
 
+#ifndef USE_ALTERNATE_RESUME_IMPL
 /*
  * task_struct *resume(task_struct *prev, task_struct *next,
  *                     struct thread_info *next_ti, s32 fp_save)
@@ -87,18 +88,6 @@
 
         PTR_ADDU        t0, $28, _THREAD_SIZE - 32
         set_saved_sp    t0, t1, t2
-#ifdef CONFIG_MIPS_MT_SMTC
-        /* Read-modify-writes of Status must be atomic on a VPE */
-        mfc0    t2, CP0_TCSTATUS
-        ori     t1, t2, TCSTATUS_IXMT
-        mtc0    t1, CP0_TCSTATUS
-        andi    t2, t2, TCSTATUS_IXMT
-        _ehb
-        DMT     8                               # dmt   t0
-        move    t1,ra
-        jal     mips_ihb
-        move    ra,t1
-#endif /* CONFIG_MIPS_MT_SMTC */
         mfc0    t1, CP0_STATUS          /* Do we really need this? */
         li      a3, 0xff01
         and     t1, a3
@@ -107,22 +96,12 @@
         and     a2, a3
         or      a2, t1
         mtc0    a2, CP0_STATUS
-#ifdef CONFIG_MIPS_MT_SMTC
-        _ehb
-        andi    t0, t0, VPECONTROL_TE
-        beqz    t0, 1f
-        emt
-1:
-        mfc0    t1, CP0_TCSTATUS
-        xori    t1, t1, TCSTATUS_IXMT
-        or      t1, t1, t2
-        mtc0    t1, CP0_TCSTATUS
-        _ehb
-#endif /* CONFIG_MIPS_MT_SMTC */
         move    v0, a0
         jr      ra
         END(resume)
 
+#endif /* USE_ALTERNATE_RESUME_IMPL */
+
 /*
  * Save a thread's fp context.
  */
@@ -176,19 +155,10 @@ LEAF(_restore_msa)
 #define FPU_DEFAULT  0x00000000
 
 LEAF(_init_fpu)
-#ifdef CONFIG_MIPS_MT_SMTC
-        /* Rather than manipulate per-VPE Status, set per-TC bit in TCStatus */
-        mfc0    t0, CP0_TCSTATUS
-        /* Bit position is the same for Status, TCStatus */
-        li      t1, ST0_CU1
-        or      t0, t1
-        mtc0    t0, CP0_TCSTATUS
-#else /* Normal MIPS CU1 enable */
         mfc0    t0, CP0_STATUS
         li      t1, ST0_CU1
         or      t0, t1
         mtc0    t0, CP0_STATUS
-#endif /* CONFIG_MIPS_MT_SMTC */
         enable_fpu_hazard
 
         li      t1, FPU_DEFAULT