diff options
Diffstat (limited to 'arch/mips/include/asm/mips-boards/bonito64.h')
-rw-r--r-- | arch/mips/include/asm/mips-boards/bonito64.h | 436 |
1 files changed, 436 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mips-boards/bonito64.h b/arch/mips/include/asm/mips-boards/bonito64.h new file mode 100644 index 000000000000..a0f04bb99c99 --- /dev/null +++ b/arch/mips/include/asm/mips-boards/bonito64.h | |||
@@ -0,0 +1,436 @@ | |||
1 | /* | ||
2 | * Bonito Register Map | ||
3 | * | ||
4 | * This file is the original bonito.h from Algorithmics with minor changes | ||
5 | * to fit into linux. | ||
6 | * | ||
7 | * Copyright (c) 1999 Algorithmics Ltd | ||
8 | * | ||
9 | * Carsten Langgaard, carstenl@mips.com | ||
10 | * Copyright (C) 2001 MIPS Technologies, Inc. All rights reserved. | ||
11 | * | ||
12 | * Algorithmics gives permission for anyone to use and modify this file | ||
13 | * without any obligation or license condition except that you retain | ||
14 | * this copyright message in any source redistribution in whole or part. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | /* Revision 1.48 autogenerated on 08/17/99 15:20:01 */ | ||
19 | /* This bonito64 version editted from bonito.h Revision 1.48 on 11/09/00 */ | ||
20 | |||
21 | #ifndef _ASM_MIPS_BOARDS_BONITO64_H | ||
22 | #define _ASM_MIPS_BOARDS_BONITO64_H | ||
23 | |||
24 | #ifdef __ASSEMBLY__ | ||
25 | |||
26 | /* offsets from base register */ | ||
27 | #define BONITO(x) (x) | ||
28 | |||
29 | #elif defined(CONFIG_LEMOTE_FULONG) | ||
30 | |||
31 | #define BONITO(x) (*(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x))) | ||
32 | #define BONITO_IRQ_BASE 32 | ||
33 | |||
34 | #else | ||
35 | |||
36 | /* | ||
37 | * Algorithmics Bonito64 system controller register base. | ||
38 | */ | ||
39 | extern unsigned long _pcictrl_bonito; | ||
40 | extern unsigned long _pcictrl_bonito_pcicfg; | ||
41 | |||
42 | #define BONITO(x) *(volatile u32 *)(_pcictrl_bonito + (x)) | ||
43 | |||
44 | #endif /* __ASSEMBLY__ */ | ||
45 | |||
46 | |||
47 | #define BONITO_BOOT_BASE 0x1fc00000 | ||
48 | #define BONITO_BOOT_SIZE 0x00100000 | ||
49 | #define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1) | ||
50 | #define BONITO_FLASH_BASE 0x1c000000 | ||
51 | #define BONITO_FLASH_SIZE 0x03000000 | ||
52 | #define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1) | ||
53 | #define BONITO_SOCKET_BASE 0x1f800000 | ||
54 | #define BONITO_SOCKET_SIZE 0x00400000 | ||
55 | #define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1) | ||
56 | #define BONITO_REG_BASE 0x1fe00000 | ||
57 | #define BONITO_REG_SIZE 0x00040000 | ||
58 | #define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1) | ||
59 | #define BONITO_DEV_BASE 0x1ff00000 | ||
60 | #define BONITO_DEV_SIZE 0x00100000 | ||
61 | #define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1) | ||
62 | #define BONITO_PCILO_BASE 0x10000000 | ||
63 | #define BONITO_PCILO_SIZE 0x0c000000 | ||
64 | #define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1) | ||
65 | #define BONITO_PCILO0_BASE 0x10000000 | ||
66 | #define BONITO_PCILO1_BASE 0x14000000 | ||
67 | #define BONITO_PCILO2_BASE 0x18000000 | ||
68 | #define BONITO_PCIHI_BASE 0x20000000 | ||
69 | #define BONITO_PCIHI_SIZE 0x20000000 | ||
70 | #define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1) | ||
71 | #define BONITO_PCIIO_BASE 0x1fd00000 | ||
72 | #define BONITO_PCIIO_SIZE 0x00100000 | ||
73 | #define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1) | ||
74 | #define BONITO_PCICFG_BASE 0x1fe80000 | ||
75 | #define BONITO_PCICFG_SIZE 0x00080000 | ||
76 | #define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1) | ||
77 | |||
78 | |||
79 | /* Bonito Register Bases */ | ||
80 | |||
81 | #define BONITO_PCICONFIGBASE 0x00 | ||
82 | #define BONITO_REGBASE 0x100 | ||
83 | |||
84 | |||
85 | /* PCI Configuration Registers */ | ||
86 | |||
87 | #define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x)) | ||
88 | #define BONITO_PCIDID BONITO_PCI_REG(0x00) | ||
89 | #define BONITO_PCICMD BONITO_PCI_REG(0x04) | ||
90 | #define BONITO_PCICLASS BONITO_PCI_REG(0x08) | ||
91 | #define BONITO_PCILTIMER BONITO_PCI_REG(0x0c) | ||
92 | #define BONITO_PCIBASE0 BONITO_PCI_REG(0x10) | ||
93 | #define BONITO_PCIBASE1 BONITO_PCI_REG(0x14) | ||
94 | #define BONITO_PCIBASE2 BONITO_PCI_REG(0x18) | ||
95 | #define BONITO_PCIEXPRBASE BONITO_PCI_REG(0x30) | ||
96 | #define BONITO_PCIINT BONITO_PCI_REG(0x3c) | ||
97 | |||
98 | #define BONITO_PCICMD_PERR_CLR 0x80000000 | ||
99 | #define BONITO_PCICMD_SERR_CLR 0x40000000 | ||
100 | #define BONITO_PCICMD_MABORT_CLR 0x20000000 | ||
101 | #define BONITO_PCICMD_MTABORT_CLR 0x10000000 | ||
102 | #define BONITO_PCICMD_TABORT_CLR 0x08000000 | ||
103 | #define BONITO_PCICMD_MPERR_CLR 0x01000000 | ||
104 | #define BONITO_PCICMD_PERRRESPEN 0x00000040 | ||
105 | #define BONITO_PCICMD_ASTEPEN 0x00000080 | ||
106 | #define BONITO_PCICMD_SERREN 0x00000100 | ||
107 | #define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00 | ||
108 | #define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8 | ||
109 | |||
110 | |||
111 | |||
112 | |||
113 | /* 1. Bonito h/w Configuration */ | ||
114 | /* Power on register */ | ||
115 | |||
116 | #define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00) | ||
117 | |||
118 | #define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000 | ||
119 | #define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000 | ||
120 | #define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000 | ||
121 | #define BONITO_BONPONCFG_CPUBIGEND 0x00004000 | ||
122 | /* Added by RPF 11-9-00 */ | ||
123 | #define BONITO_BONPONCFG_BURSTORDER 0x00001000 | ||
124 | /* --- */ | ||
125 | #define BONITO_BONPONCFG_CPUPARITY 0x00002000 | ||
126 | #define BONITO_BONPONCFG_CPUTYPE 0x00000007 | ||
127 | #define BONITO_BONPONCFG_CPUTYPE_SHIFT 0 | ||
128 | #define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008 | ||
129 | #define BONITO_BONPONCFG_IS_ARBITER 0x00000010 | ||
130 | #define BONITO_BONPONCFG_ROMBOOT 0x000000c0 | ||
131 | #define BONITO_BONPONCFG_ROMBOOT_SHIFT 6 | ||
132 | |||
133 | #define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT) | ||
134 | #define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT) | ||
135 | #define BONITO_BONPONCFG_ROMBOOT_SDRAM (0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT) | ||
136 | #define BONITO_BONPONCFG_ROMBOOT_CPURESET (0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT) | ||
137 | |||
138 | #define BONITO_BONPONCFG_ROMCS0WIDTH 0x00000100 | ||
139 | #define BONITO_BONPONCFG_ROMCS1WIDTH 0x00000200 | ||
140 | #define BONITO_BONPONCFG_ROMCS0FAST 0x00000400 | ||
141 | #define BONITO_BONPONCFG_ROMCS1FAST 0x00000800 | ||
142 | #define BONITO_BONPONCFG_CONFIG_DIS 0x00000020 | ||
143 | |||
144 | |||
145 | /* Other Bonito configuration */ | ||
146 | |||
147 | #define BONITO_BONGENCFG_OFFSET 0x4 | ||
148 | #define BONITO_BONGENCFG BONITO(BONITO_REGBASE + BONITO_BONGENCFG_OFFSET) | ||
149 | |||
150 | #define BONITO_BONGENCFG_DEBUGMODE 0x00000001 | ||
151 | #define BONITO_BONGENCFG_SNOOPEN 0x00000002 | ||
152 | #define BONITO_BONGENCFG_CPUSELFRESET 0x00000004 | ||
153 | |||
154 | #define BONITO_BONGENCFG_FORCE_IRQA 0x00000008 | ||
155 | #define BONITO_BONGENCFG_IRQA_ISOUT 0x00000010 | ||
156 | #define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020 | ||
157 | #define BONITO_BONGENCFG_BYTESWAP 0x00000040 | ||
158 | |||
159 | #define BONITO_BONGENCFG_UNCACHED 0x00000080 | ||
160 | #define BONITO_BONGENCFG_PREFETCHEN 0x00000100 | ||
161 | #define BONITO_BONGENCFG_WBEHINDEN 0x00000200 | ||
162 | #define BONITO_BONGENCFG_CACHEALG 0x00000c00 | ||
163 | #define BONITO_BONGENCFG_CACHEALG_SHIFT 10 | ||
164 | #define BONITO_BONGENCFG_PCIQUEUE 0x00001000 | ||
165 | #define BONITO_BONGENCFG_CACHESTOP 0x00002000 | ||
166 | #define BONITO_BONGENCFG_MSTRBYTESWAP 0x00004000 | ||
167 | #define BONITO_BONGENCFG_BUSERREN 0x00008000 | ||
168 | #define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000 | ||
169 | #define BONITO_BONGENCFG_SHORTCOPYTIMEOUT 0x00020000 | ||
170 | |||
171 | /* 2. IO & IDE configuration */ | ||
172 | |||
173 | #define BONITO_IODEVCFG BONITO(BONITO_REGBASE + 0x08) | ||
174 | |||
175 | /* 3. IO & IDE configuration */ | ||
176 | |||
177 | #define BONITO_SDCFG BONITO(BONITO_REGBASE + 0x0c) | ||
178 | |||
179 | /* 4. PCI address map control */ | ||
180 | |||
181 | #define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10) | ||
182 | #define BONITO_PCIMEMBASECFG BONITO(BONITO_REGBASE + 0x14) | ||
183 | #define BONITO_PCIMAP_CFG BONITO(BONITO_REGBASE + 0x18) | ||
184 | |||
185 | /* 5. ICU & GPIO regs */ | ||
186 | |||
187 | /* GPIO Regs - r/w */ | ||
188 | |||
189 | #define BONITO_GPIODATA_OFFSET 0x1c | ||
190 | #define BONITO_GPIODATA BONITO(BONITO_REGBASE + BONITO_GPIODATA_OFFSET) | ||
191 | #define BONITO_GPIOIE BONITO(BONITO_REGBASE + 0x20) | ||
192 | |||
193 | /* ICU Configuration Regs - r/w */ | ||
194 | |||
195 | #define BONITO_INTEDGE BONITO(BONITO_REGBASE + 0x24) | ||
196 | #define BONITO_INTSTEER BONITO(BONITO_REGBASE + 0x28) | ||
197 | #define BONITO_INTPOL BONITO(BONITO_REGBASE + 0x2c) | ||
198 | |||
199 | /* ICU Enable Regs - IntEn & IntISR are r/o. */ | ||
200 | |||
201 | #define BONITO_INTENSET BONITO(BONITO_REGBASE + 0x30) | ||
202 | #define BONITO_INTENCLR BONITO(BONITO_REGBASE + 0x34) | ||
203 | #define BONITO_INTEN BONITO(BONITO_REGBASE + 0x38) | ||
204 | #define BONITO_INTISR BONITO(BONITO_REGBASE + 0x3c) | ||
205 | |||
206 | /* PCI mail boxes */ | ||
207 | |||
208 | #define BONITO_PCIMAIL0_OFFSET 0x40 | ||
209 | #define BONITO_PCIMAIL1_OFFSET 0x44 | ||
210 | #define BONITO_PCIMAIL2_OFFSET 0x48 | ||
211 | #define BONITO_PCIMAIL3_OFFSET 0x4c | ||
212 | #define BONITO_PCIMAIL0 BONITO(BONITO_REGBASE + 0x40) | ||
213 | #define BONITO_PCIMAIL1 BONITO(BONITO_REGBASE + 0x44) | ||
214 | #define BONITO_PCIMAIL2 BONITO(BONITO_REGBASE + 0x48) | ||
215 | #define BONITO_PCIMAIL3 BONITO(BONITO_REGBASE + 0x4c) | ||
216 | |||
217 | |||
218 | /* 6. PCI cache */ | ||
219 | |||
220 | #define BONITO_PCICACHECTRL BONITO(BONITO_REGBASE + 0x50) | ||
221 | #define BONITO_PCICACHETAG BONITO(BONITO_REGBASE + 0x54) | ||
222 | |||
223 | #define BONITO_PCIBADADDR BONITO(BONITO_REGBASE + 0x58) | ||
224 | #define BONITO_PCIMSTAT BONITO(BONITO_REGBASE + 0x5c) | ||
225 | |||
226 | |||
227 | /* | ||
228 | #define BONITO_PCIRDPOST BONITO(BONITO_REGBASE + 0x60) | ||
229 | #define BONITO_PCIDATA BONITO(BONITO_REGBASE + 0x64) | ||
230 | */ | ||
231 | |||
232 | /* 7. IDE DMA & Copier */ | ||
233 | |||
234 | #define BONITO_CONFIGBASE 0x000 | ||
235 | #define BONITO_BONITOBASE 0x100 | ||
236 | #define BONITO_LDMABASE 0x200 | ||
237 | #define BONITO_COPBASE 0x300 | ||
238 | #define BONITO_REG_BLOCKMASK 0x300 | ||
239 | |||
240 | #define BONITO_LDMACTRL BONITO(BONITO_LDMABASE + 0x0) | ||
241 | #define BONITO_LDMASTAT BONITO(BONITO_LDMABASE + 0x0) | ||
242 | #define BONITO_LDMAADDR BONITO(BONITO_LDMABASE + 0x4) | ||
243 | #define BONITO_LDMAGO BONITO(BONITO_LDMABASE + 0x8) | ||
244 | #define BONITO_LDMADATA BONITO(BONITO_LDMABASE + 0xc) | ||
245 | |||
246 | #define BONITO_COPCTRL BONITO(BONITO_COPBASE + 0x0) | ||
247 | #define BONITO_COPSTAT BONITO(BONITO_COPBASE + 0x0) | ||
248 | #define BONITO_COPPADDR BONITO(BONITO_COPBASE + 0x4) | ||
249 | #define BONITO_COPDADDR BONITO(BONITO_COPBASE + 0x8) | ||
250 | #define BONITO_COPGO BONITO(BONITO_COPBASE + 0xc) | ||
251 | |||
252 | |||
253 | /* ###### Bit Definitions for individual Registers #### */ | ||
254 | |||
255 | /* Gen DMA. */ | ||
256 | |||
257 | #define BONITO_IDECOPDADDR_DMA_DADDR 0x0ffffffc | ||
258 | #define BONITO_IDECOPDADDR_DMA_DADDR_SHIFT 2 | ||
259 | #define BONITO_IDECOPPADDR_DMA_PADDR 0xfffffffc | ||
260 | #define BONITO_IDECOPPADDR_DMA_PADDR_SHIFT 2 | ||
261 | #define BONITO_IDECOPGO_DMA_SIZE 0x0000fffe | ||
262 | #define BONITO_IDECOPGO_DMA_SIZE_SHIFT 0 | ||
263 | #define BONITO_IDECOPGO_DMA_WRITE 0x00010000 | ||
264 | #define BONITO_IDECOPGO_DMAWCOUNT 0x000f0000 | ||
265 | #define BONITO_IDECOPGO_DMAWCOUNT_SHIFT 16 | ||
266 | |||
267 | #define BONITO_IDECOPCTRL_DMA_STARTBIT 0x80000000 | ||
268 | #define BONITO_IDECOPCTRL_DMA_RSTBIT 0x40000000 | ||
269 | |||
270 | /* DRAM - sdCfg */ | ||
271 | |||
272 | #define BONITO_SDCFG_AROWBITS 0x00000003 | ||
273 | #define BONITO_SDCFG_AROWBITS_SHIFT 0 | ||
274 | #define BONITO_SDCFG_ACOLBITS 0x0000000c | ||
275 | #define BONITO_SDCFG_ACOLBITS_SHIFT 2 | ||
276 | #define BONITO_SDCFG_ABANKBIT 0x00000010 | ||
277 | #define BONITO_SDCFG_ASIDES 0x00000020 | ||
278 | #define BONITO_SDCFG_AABSENT 0x00000040 | ||
279 | #define BONITO_SDCFG_AWIDTH64 0x00000080 | ||
280 | |||
281 | #define BONITO_SDCFG_BROWBITS 0x00000300 | ||
282 | #define BONITO_SDCFG_BROWBITS_SHIFT 8 | ||
283 | #define BONITO_SDCFG_BCOLBITS 0x00000c00 | ||
284 | #define BONITO_SDCFG_BCOLBITS_SHIFT 10 | ||
285 | #define BONITO_SDCFG_BBANKBIT 0x00001000 | ||
286 | #define BONITO_SDCFG_BSIDES 0x00002000 | ||
287 | #define BONITO_SDCFG_BABSENT 0x00004000 | ||
288 | #define BONITO_SDCFG_BWIDTH64 0x00008000 | ||
289 | |||
290 | #define BONITO_SDCFG_EXTRDDATA 0x00010000 | ||
291 | #define BONITO_SDCFG_EXTRASCAS 0x00020000 | ||
292 | #define BONITO_SDCFG_EXTPRECH 0x00040000 | ||
293 | #define BONITO_SDCFG_EXTRASWIDTH 0x00180000 | ||
294 | #define BONITO_SDCFG_EXTRASWIDTH_SHIFT 19 | ||
295 | /* Changed by RPF 11-9-00 */ | ||
296 | #define BONITO_SDCFG_DRAMMODESET 0x00200000 | ||
297 | /* --- */ | ||
298 | #define BONITO_SDCFG_DRAMEXTREGS 0x00400000 | ||
299 | #define BONITO_SDCFG_DRAMPARITY 0x00800000 | ||
300 | /* Added by RPF 11-9-00 */ | ||
301 | #define BONITO_SDCFG_DRAMBURSTLEN 0x03000000 | ||
302 | #define BONITO_SDCFG_DRAMBURSTLEN_SHIFT 24 | ||
303 | #define BONITO_SDCFG_DRAMMODESET_DONE 0x80000000 | ||
304 | /* --- */ | ||
305 | |||
306 | /* PCI Cache - pciCacheCtrl */ | ||
307 | |||
308 | #define BONITO_PCICACHECTRL_CACHECMD 0x00000007 | ||
309 | #define BONITO_PCICACHECTRL_CACHECMD_SHIFT 0 | ||
310 | #define BONITO_PCICACHECTRL_CACHECMDLINE 0x00000018 | ||
311 | #define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT 3 | ||
312 | #define BONITO_PCICACHECTRL_CMDEXEC 0x00000020 | ||
313 | |||
314 | #define BONITO_PCICACHECTRL_IOBCCOH_PRES 0x00000100 | ||
315 | #define BONITO_PCICACHECTRL_IOBCCOH_EN 0x00000200 | ||
316 | #define BONITO_PCICACHECTRL_CPUCOH_PRES 0x00000400 | ||
317 | #define BONITO_PCICACHECTRL_CPUCOH_EN 0x00000800 | ||
318 | |||
319 | #define BONITO_IODEVCFG_BUFFBIT_CS0 0x00000001 | ||
320 | #define BONITO_IODEVCFG_SPEEDBIT_CS0 0x00000002 | ||
321 | #define BONITO_IODEVCFG_MOREABITS_CS0 0x00000004 | ||
322 | |||
323 | #define BONITO_IODEVCFG_BUFFBIT_CS1 0x00000008 | ||
324 | #define BONITO_IODEVCFG_SPEEDBIT_CS1 0x00000010 | ||
325 | #define BONITO_IODEVCFG_MOREABITS_CS1 0x00000020 | ||
326 | |||
327 | #define BONITO_IODEVCFG_BUFFBIT_CS2 0x00000040 | ||
328 | #define BONITO_IODEVCFG_SPEEDBIT_CS2 0x00000080 | ||
329 | #define BONITO_IODEVCFG_MOREABITS_CS2 0x00000100 | ||
330 | |||
331 | #define BONITO_IODEVCFG_BUFFBIT_CS3 0x00000200 | ||
332 | #define BONITO_IODEVCFG_SPEEDBIT_CS3 0x00000400 | ||
333 | #define BONITO_IODEVCFG_MOREABITS_CS3 0x00000800 | ||
334 | |||
335 | #define BONITO_IODEVCFG_BUFFBIT_IDE 0x00001000 | ||
336 | #define BONITO_IODEVCFG_SPEEDBIT_IDE 0x00002000 | ||
337 | #define BONITO_IODEVCFG_WORDSWAPBIT_IDE 0x00004000 | ||
338 | #define BONITO_IODEVCFG_MODEBIT_IDE 0x00008000 | ||
339 | #define BONITO_IODEVCFG_DMAON_IDE 0x001f0000 | ||
340 | #define BONITO_IODEVCFG_DMAON_IDE_SHIFT 16 | ||
341 | #define BONITO_IODEVCFG_DMAOFF_IDE 0x01e00000 | ||
342 | #define BONITO_IODEVCFG_DMAOFF_IDE_SHIFT 21 | ||
343 | #define BONITO_IODEVCFG_EPROMSPLIT 0x02000000 | ||
344 | /* Added by RPF 11-9-00 */ | ||
345 | #define BONITO_IODEVCFG_CPUCLOCKPERIOD 0xfc000000 | ||
346 | #define BONITO_IODEVCFG_CPUCLOCKPERIOD_SHIFT 26 | ||
347 | /* --- */ | ||
348 | |||
349 | /* gpio */ | ||
350 | #define BONITO_GPIO_GPIOW 0x000003ff | ||
351 | #define BONITO_GPIO_GPIOW_SHIFT 0 | ||
352 | #define BONITO_GPIO_GPIOR 0x01ff0000 | ||
353 | #define BONITO_GPIO_GPIOR_SHIFT 16 | ||
354 | #define BONITO_GPIO_GPINR 0xfe000000 | ||
355 | #define BONITO_GPIO_GPINR_SHIFT 25 | ||
356 | #define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N))) | ||
357 | #define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N))) | ||
358 | #define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N))) | ||
359 | |||
360 | /* ICU */ | ||
361 | #define BONITO_ICU_MBOXES 0x0000000f | ||
362 | #define BONITO_ICU_MBOXES_SHIFT 0 | ||
363 | #define BONITO_ICU_DMARDY 0x00000010 | ||
364 | #define BONITO_ICU_DMAEMPTY 0x00000020 | ||
365 | #define BONITO_ICU_COPYRDY 0x00000040 | ||
366 | #define BONITO_ICU_COPYEMPTY 0x00000080 | ||
367 | #define BONITO_ICU_COPYERR 0x00000100 | ||
368 | #define BONITO_ICU_PCIIRQ 0x00000200 | ||
369 | #define BONITO_ICU_MASTERERR 0x00000400 | ||
370 | #define BONITO_ICU_SYSTEMERR 0x00000800 | ||
371 | #define BONITO_ICU_DRAMPERR 0x00001000 | ||
372 | #define BONITO_ICU_RETRYERR 0x00002000 | ||
373 | #define BONITO_ICU_GPIOS 0x01ff0000 | ||
374 | #define BONITO_ICU_GPIOS_SHIFT 16 | ||
375 | #define BONITO_ICU_GPINS 0x7e000000 | ||
376 | #define BONITO_ICU_GPINS_SHIFT 25 | ||
377 | #define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N))) | ||
378 | #define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N))) | ||
379 | #define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N))) | ||
380 | |||
381 | /* pcimap */ | ||
382 | |||
383 | #define BONITO_PCIMAP_PCIMAP_LO0 0x0000003f | ||
384 | #define BONITO_PCIMAP_PCIMAP_LO0_SHIFT 0 | ||
385 | #define BONITO_PCIMAP_PCIMAP_LO1 0x00000fc0 | ||
386 | #define BONITO_PCIMAP_PCIMAP_LO1_SHIFT 6 | ||
387 | #define BONITO_PCIMAP_PCIMAP_LO2 0x0003f000 | ||
388 | #define BONITO_PCIMAP_PCIMAP_LO2_SHIFT 12 | ||
389 | #define BONITO_PCIMAP_PCIMAP_2 0x00040000 | ||
390 | #define BONITO_PCIMAP_WIN(WIN, ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) | ||
391 | |||
392 | #define BONITO_PCIMAP_WINSIZE (1<<26) | ||
393 | #define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1)) | ||
394 | #define BONITO_PCIMAP_WINBASE(ADDR) ((ADDR) << 26) | ||
395 | |||
396 | /* pcimembaseCfg */ | ||
397 | |||
398 | #define BONITO_PCIMEMBASECFG_MASK 0xf0000000 | ||
399 | #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK 0x0000001f | ||
400 | #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT 0 | ||
401 | #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS 0x000003e0 | ||
402 | #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT 5 | ||
403 | #define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED 0x00000400 | ||
404 | #define BONITO_PCIMEMBASECFG_MEMBASE0_IO 0x00000800 | ||
405 | |||
406 | #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK 0x0001f000 | ||
407 | #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT 12 | ||
408 | #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS 0x003e0000 | ||
409 | #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT 17 | ||
410 | #define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED 0x00400000 | ||
411 | #define BONITO_PCIMEMBASECFG_MEMBASE1_IO 0x00800000 | ||
412 | |||
413 | #define BONITO_PCIMEMBASECFG_ASHIFT 23 | ||
414 | #define BONITO_PCIMEMBASECFG_AMASK 0x007fffff | ||
415 | #define BONITO_PCIMEMBASECFGSIZE(WIN, SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) | ||
416 | #define BONITO_PCIMEMBASECFGBASE(WIN, BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) | ||
417 | |||
418 | #define BONITO_PCIMEMBASECFG_SIZE(WIN, CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK) | ||
419 | |||
420 | |||
421 | #define BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) | ||
422 | #define BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) | ||
423 | #define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) | ||
424 | |||
425 | #define BONITO_PCITOPHYS(WIN, ADDR, CFG) ( \ | ||
426 | (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG)))) | \ | ||
427 | (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN, CFG)) \ | ||
428 | ) | ||
429 | |||
430 | /* PCICmd */ | ||
431 | |||
432 | #define BONITO_PCICMD_MEMEN 0x00000002 | ||
433 | #define BONITO_PCICMD_MSTREN 0x00000004 | ||
434 | |||
435 | |||
436 | #endif /* _ASM_MIPS_BOARDS_BONITO64_H */ | ||