diff options
Diffstat (limited to 'arch/mips/dec/ecc-berr.c')
-rw-r--r-- | arch/mips/dec/ecc-berr.c | 48 |
1 files changed, 25 insertions, 23 deletions
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c index 6dbce92eb068..cc24c5ed0c05 100644 --- a/arch/mips/dec/ecc-berr.c +++ b/arch/mips/dec/ecc-berr.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * 5000/240 (KN03), 5000/260 (KN05) and DECsystem 5900 (KN03), | 6 | * 5000/240 (KN03), 5000/260 (KN05) and DECsystem 5900 (KN03), |
7 | * 5900/260 (KN05) systems. | 7 | * 5900/260 (KN05) systems. |
8 | * | 8 | * |
9 | * Copyright (c) 2003 Maciej W. Rozycki | 9 | * Copyright (c) 2003, 2005 Maciej W. Rozycki |
10 | * | 10 | * |
11 | * This program is free software; you can redistribute it and/or | 11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | 12 | * modify it under the terms of the GNU General Public License |
@@ -15,6 +15,7 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/interrupt.h> | ||
18 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
19 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
20 | #include <linux/spinlock.h> | 21 | #include <linux/spinlock.h> |
@@ -57,7 +58,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker) | |||
57 | 58 | ||
58 | const char *kind, *agent, *cycle, *event; | 59 | const char *kind, *agent, *cycle, *event; |
59 | const char *status = "", *xbit = "", *fmt = ""; | 60 | const char *status = "", *xbit = "", *fmt = ""; |
60 | dma_addr_t address; | 61 | unsigned long address; |
61 | u16 syn = 0, sngl; | 62 | u16 syn = 0, sngl; |
62 | 63 | ||
63 | int i = 0; | 64 | int i = 0; |
@@ -66,7 +67,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker) | |||
66 | u32 chksyn = *kn0x_chksyn; | 67 | u32 chksyn = *kn0x_chksyn; |
67 | int action = MIPS_BE_FATAL; | 68 | int action = MIPS_BE_FATAL; |
68 | 69 | ||
69 | /* For non-ECC ack ASAP, so any subsequent errors get caught. */ | 70 | /* For non-ECC ack ASAP, so that any subsequent errors get caught. */ |
70 | if ((erraddr & (KN0X_EAR_VALID | KN0X_EAR_ECCERR)) == KN0X_EAR_VALID) | 71 | if ((erraddr & (KN0X_EAR_VALID | KN0X_EAR_ECCERR)) == KN0X_EAR_VALID) |
71 | dec_ecc_be_ack(); | 72 | dec_ecc_be_ack(); |
72 | 73 | ||
@@ -74,7 +75,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker) | |||
74 | 75 | ||
75 | if (!(erraddr & KN0X_EAR_VALID)) { | 76 | if (!(erraddr & KN0X_EAR_VALID)) { |
76 | /* No idea what happened. */ | 77 | /* No idea what happened. */ |
77 | printk(KERN_ALERT "Unidentified bus error %s.\n", kind); | 78 | printk(KERN_ALERT "Unidentified bus error %s\n", kind); |
78 | return action; | 79 | return action; |
79 | } | 80 | } |
80 | 81 | ||
@@ -126,7 +127,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker) | |||
126 | /* Ack now, no rewrite will happen. */ | 127 | /* Ack now, no rewrite will happen. */ |
127 | dec_ecc_be_ack(); | 128 | dec_ecc_be_ack(); |
128 | 129 | ||
129 | fmt = KERN_ALERT "%s" "invalid.\n"; | 130 | fmt = KERN_ALERT "%s" "invalid\n"; |
130 | } else { | 131 | } else { |
131 | sngl = syn & KN0X_ESR_SNGLO; | 132 | sngl = syn & KN0X_ESR_SNGLO; |
132 | syn &= KN0X_ESR_SYNLO; | 133 | syn &= KN0X_ESR_SYNLO; |
@@ -144,7 +145,8 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker) | |||
144 | } else if (!sngl) { | 145 | } else if (!sngl) { |
145 | status = dbestr; | 146 | status = dbestr; |
146 | } else { | 147 | } else { |
147 | volatile u32 *ptr = (void *)KSEG1ADDR(address); | 148 | volatile u32 *ptr = |
149 | (void *)CKSEG1ADDR(address); | ||
148 | 150 | ||
149 | *ptr = *ptr; /* Rewrite. */ | 151 | *ptr = *ptr; /* Rewrite. */ |
150 | iob(); | 152 | iob(); |
@@ -160,12 +162,12 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker) | |||
160 | if (syn == 0x01) { | 162 | if (syn == 0x01) { |
161 | fmt = KERN_ALERT "%s" | 163 | fmt = KERN_ALERT "%s" |
162 | "%#04x -- %s bit error " | 164 | "%#04x -- %s bit error " |
163 | "at check bit C%s.\n"; | 165 | "at check bit C%s\n"; |
164 | xbit = "X"; | 166 | xbit = "X"; |
165 | } else { | 167 | } else { |
166 | fmt = KERN_ALERT "%s" | 168 | fmt = KERN_ALERT "%s" |
167 | "%#04x -- %s bit error " | 169 | "%#04x -- %s bit error " |
168 | "at check bit C%s%u.\n"; | 170 | "at check bit C%s%u\n"; |
169 | } | 171 | } |
170 | i = syn >> 2; | 172 | i = syn >> 2; |
171 | } else { | 173 | } else { |
@@ -175,16 +177,16 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker) | |||
175 | if (i < 32) | 177 | if (i < 32) |
176 | fmt = KERN_ALERT "%s" | 178 | fmt = KERN_ALERT "%s" |
177 | "%#04x -- %s bit error " | 179 | "%#04x -- %s bit error " |
178 | "at data bit D%s%u.\n"; | 180 | "at data bit D%s%u\n"; |
179 | else | 181 | else |
180 | fmt = KERN_ALERT "%s" | 182 | fmt = KERN_ALERT "%s" |
181 | "%#04x -- %s bit error.\n"; | 183 | "%#04x -- %s bit error\n"; |
182 | } | 184 | } |
183 | } | 185 | } |
184 | } | 186 | } |
185 | 187 | ||
186 | if (action != MIPS_BE_FIXUP) | 188 | if (action != MIPS_BE_FIXUP) |
187 | printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx.\n", | 189 | printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx\n", |
188 | kind, agent, cycle, event, address); | 190 | kind, agent, cycle, event, address); |
189 | 191 | ||
190 | if (action != MIPS_BE_FIXUP && erraddr & KN0X_EAR_ECCERR) | 192 | if (action != MIPS_BE_FIXUP && erraddr & KN0X_EAR_ECCERR) |
@@ -203,11 +205,11 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
203 | int action = dec_ecc_be_backend(regs, 0, 1); | 205 | int action = dec_ecc_be_backend(regs, 0, 1); |
204 | 206 | ||
205 | if (action == MIPS_BE_DISCARD) | 207 | if (action == MIPS_BE_DISCARD) |
206 | return IRQ_NONE; | 208 | return IRQ_HANDLED; |
207 | 209 | ||
208 | /* | 210 | /* |
209 | * FIXME: Find affected processes and kill them, otherwise we | 211 | * FIXME: Find the affected processes and kill them, otherwise |
210 | * must die. | 212 | * we must die. |
211 | * | 213 | * |
212 | * The interrupt is asynchronously delivered thus EPC and RA | 214 | * The interrupt is asynchronously delivered thus EPC and RA |
213 | * may be irrelevant, but are printed for a reference. | 215 | * may be irrelevant, but are printed for a reference. |
@@ -225,16 +227,16 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
225 | */ | 227 | */ |
226 | static inline void dec_kn02_be_init(void) | 228 | static inline void dec_kn02_be_init(void) |
227 | { | 229 | { |
228 | volatile u32 *csr = (void *)KN02_CSR_BASE; | 230 | volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); |
229 | unsigned long flags; | 231 | unsigned long flags; |
230 | 232 | ||
231 | kn0x_erraddr = (void *)(KN02_SLOT_BASE + KN02_ERRADDR); | 233 | kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); |
232 | kn0x_chksyn = (void *)(KN02_SLOT_BASE + KN02_CHKSYN); | 234 | kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); |
233 | 235 | ||
234 | spin_lock_irqsave(&kn02_lock, flags); | 236 | spin_lock_irqsave(&kn02_lock, flags); |
235 | 237 | ||
236 | /* Preset write-only bits of the Control Register cache. */ | 238 | /* Preset write-only bits of the Control Register cache. */ |
237 | cached_kn02_csr = *csr | KN03_CSR_LEDS; | 239 | cached_kn02_csr = *csr | KN02_CSR_LEDS; |
238 | 240 | ||
239 | /* Set normal ECC detection and generation. */ | 241 | /* Set normal ECC detection and generation. */ |
240 | cached_kn02_csr &= ~(KN02_CSR_DIAGCHK | KN02_CSR_DIAGGEN); | 242 | cached_kn02_csr &= ~(KN02_CSR_DIAGCHK | KN02_CSR_DIAGGEN); |
@@ -248,11 +250,11 @@ static inline void dec_kn02_be_init(void) | |||
248 | 250 | ||
249 | static inline void dec_kn03_be_init(void) | 251 | static inline void dec_kn03_be_init(void) |
250 | { | 252 | { |
251 | volatile u32 *mcr = (void *)(KN03_SLOT_BASE + IOASIC_MCR); | 253 | volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); |
252 | volatile u32 *mbcs = (void *)(KN03_SLOT_BASE + KN05_MB_CSR); | 254 | volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); |
253 | 255 | ||
254 | kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR); | 256 | kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR); |
255 | kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN); | 257 | kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN); |
256 | 258 | ||
257 | /* | 259 | /* |
258 | * Set normal ECC detection and generation, enable ECC correction. | 260 | * Set normal ECC detection and generation, enable ECC correction. |
@@ -264,7 +266,7 @@ static inline void dec_kn03_be_init(void) | |||
264 | *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) | | 266 | *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) | |
265 | KN03_MCR_CORRECT; | 267 | KN03_MCR_CORRECT; |
266 | if (current_cpu_data.cputype == CPU_R4400SC) | 268 | if (current_cpu_data.cputype == CPU_R4400SC) |
267 | *mbcs |= KN05_MB_CSR_EE; | 269 | *mbcs |= KN4K_MB_CSR_EE; |
268 | fast_iob(); | 270 | fast_iob(); |
269 | } | 271 | } |
270 | 272 | ||