diff options
Diffstat (limited to 'arch/mips/bcm63xx/reset.c')
-rw-r--r-- | arch/mips/bcm63xx/reset.c | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/arch/mips/bcm63xx/reset.c b/arch/mips/bcm63xx/reset.c index 317931c6cf58..acbeb1fe7c57 100644 --- a/arch/mips/bcm63xx/reset.c +++ b/arch/mips/bcm63xx/reset.c | |||
@@ -30,6 +30,19 @@ | |||
30 | [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \ | 30 | [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \ |
31 | [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, | 31 | [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, |
32 | 32 | ||
33 | #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK | ||
34 | #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK | ||
35 | #define BCM3368_RESET_USBH 0 | ||
36 | #define BCM3368_RESET_USBD SOFTRESET_3368_USBS_MASK | ||
37 | #define BCM3368_RESET_DSL 0 | ||
38 | #define BCM3368_RESET_SAR 0 | ||
39 | #define BCM3368_RESET_EPHY SOFTRESET_3368_EPHY_MASK | ||
40 | #define BCM3368_RESET_ENETSW 0 | ||
41 | #define BCM3368_RESET_PCM SOFTRESET_3368_PCM_MASK | ||
42 | #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK | ||
43 | #define BCM3368_RESET_PCIE 0 | ||
44 | #define BCM3368_RESET_PCIE_EXT 0 | ||
45 | |||
33 | #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK | 46 | #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK |
34 | #define BCM6328_RESET_ENET 0 | 47 | #define BCM6328_RESET_ENET 0 |
35 | #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK | 48 | #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK |
@@ -117,6 +130,10 @@ | |||
117 | /* | 130 | /* |
118 | * core reset bits | 131 | * core reset bits |
119 | */ | 132 | */ |
133 | static const u32 bcm3368_reset_bits[] = { | ||
134 | __GEN_RESET_BITS_TABLE(3368) | ||
135 | }; | ||
136 | |||
120 | static const u32 bcm6328_reset_bits[] = { | 137 | static const u32 bcm6328_reset_bits[] = { |
121 | __GEN_RESET_BITS_TABLE(6328) | 138 | __GEN_RESET_BITS_TABLE(6328) |
122 | }; | 139 | }; |
@@ -146,7 +163,10 @@ static int reset_reg; | |||
146 | 163 | ||
147 | static int __init bcm63xx_reset_bits_init(void) | 164 | static int __init bcm63xx_reset_bits_init(void) |
148 | { | 165 | { |
149 | if (BCMCPU_IS_6328()) { | 166 | if (BCMCPU_IS_3368()) { |
167 | reset_reg = PERF_SOFTRESET_6358_REG; | ||
168 | bcm63xx_reset_bits = bcm3368_reset_bits; | ||
169 | } else if (BCMCPU_IS_6328()) { | ||
150 | reset_reg = PERF_SOFTRESET_6328_REG; | 170 | reset_reg = PERF_SOFTRESET_6328_REG; |
151 | bcm63xx_reset_bits = bcm6328_reset_bits; | 171 | bcm63xx_reset_bits = bcm6328_reset_bits; |
152 | } else if (BCMCPU_IS_6338()) { | 172 | } else if (BCMCPU_IS_6338()) { |
@@ -170,6 +190,13 @@ static int __init bcm63xx_reset_bits_init(void) | |||
170 | } | 190 | } |
171 | #else | 191 | #else |
172 | 192 | ||
193 | #ifdef CONFIG_BCM63XX_CPU_3368 | ||
194 | static const u32 bcm63xx_reset_bits[] = { | ||
195 | __GEN_RESET_BITS_TABLE(3368) | ||
196 | }; | ||
197 | #define reset_reg PERF_SOFTRESET_6358_REG | ||
198 | #endif | ||
199 | |||
173 | #ifdef CONFIG_BCM63XX_CPU_6328 | 200 | #ifdef CONFIG_BCM63XX_CPU_6328 |
174 | static const u32 bcm63xx_reset_bits[] = { | 201 | static const u32 bcm63xx_reset_bits[] = { |
175 | __GEN_RESET_BITS_TABLE(6328) | 202 | __GEN_RESET_BITS_TABLE(6328) |