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-rw-r--r--arch/mips/au1000/pb1200/Makefile5
-rw-r--r--arch/mips/au1000/pb1200/board_setup.c193
-rw-r--r--arch/mips/au1000/pb1200/init.c69
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c182
4 files changed, 449 insertions, 0 deletions
diff --git a/arch/mips/au1000/pb1200/Makefile b/arch/mips/au1000/pb1200/Makefile
new file mode 100644
index 000000000000..22b673cf55af
--- /dev/null
+++ b/arch/mips/au1000/pb1200/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Alchemy Semiconductor PB1200 board.
3#
4
5lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
new file mode 100644
index 000000000000..a45b17538ac9
--- /dev/null
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -0,0 +1,193 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#include <linux/config.h>
27#include <linux/init.h>
28#include <linux/sched.h>
29#include <linux/ioport.h>
30#include <linux/mm.h>
31#include <linux/console.h>
32#include <linux/mc146818rtc.h>
33#include <linux/delay.h>
34
35#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
36#include <linux/ide.h>
37#endif
38
39#include <asm/cpu.h>
40#include <asm/bootinfo.h>
41#include <asm/irq.h>
42#include <asm/mipsregs.h>
43#include <asm/reboot.h>
44#include <asm/pgtable.h>
45#include <asm/mach-au1x00/au1000.h>
46#include <asm/mach-au1x00/au1xxx_dbdma.h>
47
48#ifdef CONFIG_MIPS_PB1200
49#include <asm/mach-pb1x00/pb1200.h>
50#endif
51
52#ifdef CONFIG_MIPS_DB1200
53#include <asm/mach-db1x00/db1200.h>
54#define PB1200_ETH_INT DB1200_ETH_INT
55#define PB1200_IDE_INT DB1200_IDE_INT
56#endif
57
58extern void _board_init_irq(void);
59extern void (*board_init_irq)(void);
60
61void board_reset (void)
62{
63 bcsr->resets = 0;
64 bcsr->system = 0;
65}
66
67void __init board_setup(void)
68{
69 char *argptr = NULL;
70 u32 pin_func;
71
72#if 0
73 /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
74 * but it is board specific code, so put it here.
75 */
76 pin_func = au_readl(SYS_PINFUNC);
77 au_sync();
78 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
79 au_writel(pin_func, SYS_PINFUNC);
80
81 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
82 au_sync();
83#endif
84
85#if defined(CONFIG_I2C_AU1550)
86 {
87 u32 freq0, clksrc;
88
89 /* Select SMBUS in CPLD */
90 bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
91
92 pin_func = au_readl(SYS_PINFUNC);
93 au_sync();
94 pin_func &= ~(3<<17 | 1<<4);
95 /* Set GPIOs correctly */
96 pin_func |= 2<<17;
97 au_writel(pin_func, SYS_PINFUNC);
98 au_sync();
99
100 /* The i2c driver depends on 50Mhz clock */
101 freq0 = au_readl(SYS_FREQCTRL0);
102 au_sync();
103 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
104 freq0 |= (3<<SYS_FC_FRDIV1_BIT);
105 /* 396Mhz / (3+1)*2 == 49.5Mhz */
106 au_writel(freq0, SYS_FREQCTRL0);
107 au_sync();
108 freq0 |= SYS_FC_FE1;
109 au_writel(freq0, SYS_FREQCTRL0);
110 au_sync();
111
112 clksrc = au_readl(SYS_CLKSRC);
113 au_sync();
114 clksrc &= ~0x01f00000;
115 /* bit 22 is EXTCLK0 for PSC0 */
116 clksrc |= (0x3 << 22);
117 au_writel(clksrc, SYS_CLKSRC);
118 au_sync();
119 }
120#endif
121
122#ifdef CONFIG_FB_AU1200
123 argptr = prom_getcmdline();
124#ifdef CONFIG_MIPS_PB1200
125 strcat(argptr, " video=au1200fb:panel:bs");
126#endif
127#ifdef CONFIG_MIPS_DB1200
128 strcat(argptr, " video=au1200fb:panel:bs");
129#endif
130#endif
131
132 /* The Pb1200 development board uses external MUX for PSC0 to
133 support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
134 */
135#if defined(CONFIG_AU1XXX_PSC_SPI) && defined(CONFIG_I2C_AU1550)
136 #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
137 Refer to Pb1200/Db1200 documentation.
138#elif defined( CONFIG_AU1XXX_PSC_SPI )
139 bcsr->resets |= BCSR_RESETS_PCS0MUX;
140 /*Hard Coding Value to enable Temp Sensors [bit 14] Value for SOC Au1200. Pls refer documentation*/
141 bcsr->resets =0x900f;
142#elif defined( CONFIG_I2C_AU1550 )
143 bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
144#endif
145 au_sync();
146
147#ifdef CONFIG_MIPS_PB1200
148 printk("AMD Alchemy Pb1200 Board\n");
149#endif
150#ifdef CONFIG_MIPS_DB1200
151 printk("AMD Alchemy Db1200 Board\n");
152#endif
153
154 /* Setup Pb1200 External Interrupt Controller */
155 {
156 extern void (*board_init_irq)(void);
157 extern void _board_init_irq(void);
158 board_init_irq = _board_init_irq;
159 }
160}
161
162int
163board_au1200fb_panel (void)
164{
165 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
166 int p;
167
168 p = bcsr->switches;
169 p >>= 8;
170 p &= 0x0F;
171 return p;
172}
173
174int
175board_au1200fb_panel_init (void)
176{
177 /* Apply power */
178 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
179 bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
180 /*printk("board_au1200fb_panel_init()\n"); */
181 return 0;
182}
183
184int
185board_au1200fb_panel_shutdown (void)
186{
187 /* Remove power */
188 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
189 bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
190 /*printk("board_au1200fb_panel_shutdown()\n"); */
191 return 0;
192}
193
diff --git a/arch/mips/au1000/pb1200/init.c b/arch/mips/au1000/pb1200/init.c
new file mode 100644
index 000000000000..27f09e374e15
--- /dev/null
+++ b/arch/mips/au1000/pb1200/init.c
@@ -0,0 +1,69 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * PB1200 board setup
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#include <linux/init.h>
31#include <linux/mm.h>
32#include <linux/sched.h>
33#include <linux/bootmem.h>
34#include <asm/addrspace.h>
35#include <asm/bootinfo.h>
36#include <linux/string.h>
37#include <linux/kernel.h>
38
39int prom_argc;
40char **prom_argv, **prom_envp;
41extern void __init prom_init_cmdline(void);
42extern char *prom_getenv(char *envname);
43
44const char *get_system_type(void)
45{
46 return "Alchemy Pb1200";
47}
48
49void __init prom_init(void)
50{
51 unsigned char *memsize_str;
52 unsigned long memsize;
53
54 prom_argc = (int) fw_arg0;
55 prom_argv = (char **) fw_arg1;
56 prom_envp = (char **) fw_arg2;
57
58 mips_machgroup = MACH_GROUP_ALCHEMY;
59 mips_machtype = MACH_PB1200;
60
61 prom_init_cmdline();
62 memsize_str = prom_getenv("memsize");
63 if (!memsize_str) {
64 memsize = 0x08000000;
65 } else {
66 memsize = simple_strtol(memsize_str, NULL, 0);
67 }
68 add_memory_region(0, memsize, BOOT_MEM_RAM);
69}
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
new file mode 100644
index 000000000000..59e70e5cf325
--- /dev/null
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -0,0 +1,182 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25#include <linux/config.h>
26#include <linux/errno.h>
27#include <linux/init.h>
28#include <linux/irq.h>
29#include <linux/kernel_stat.h>
30#include <linux/module.h>
31#include <linux/signal.h>
32#include <linux/sched.h>
33#include <linux/types.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/timex.h>
37#include <linux/slab.h>
38#include <linux/random.h>
39#include <linux/delay.h>
40
41#include <asm/bitops.h>
42#include <asm/bootinfo.h>
43#include <asm/io.h>
44#include <asm/mipsregs.h>
45#include <asm/system.h>
46#include <asm/mach-au1x00/au1000.h>
47
48#ifdef CONFIG_MIPS_PB1200
49#include <asm/mach-pb1x00/pb1200.h>
50#endif
51
52#ifdef CONFIG_MIPS_DB1200
53#include <asm/mach-db1x00/db1200.h>
54#define PB1200_INT_BEGIN DB1200_INT_BEGIN
55#define PB1200_INT_END DB1200_INT_END
56#endif
57
58au1xxx_irq_map_t au1xxx_irq_map[] = {
59 { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
60};
61
62int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
63
64/*
65 * Support for External interrupts on the PbAu1200 Development platform.
66 */
67static volatile int pb1200_cascade_en=0;
68
69irqreturn_t pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
70{
71 unsigned short bisr = bcsr->int_status;
72 int extirq_nr = 0;
73
74 /* Clear all the edge interrupts. This has no effect on level */
75 bcsr->int_status = bisr;
76 for( ; bisr; bisr &= (bisr-1) )
77 {
78 extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
79 /* Ack and dispatch IRQ */
80 do_IRQ(extirq_nr,regs);
81 }
82 return IRQ_RETVAL(1);
83}
84
85inline void pb1200_enable_irq(unsigned int irq_nr)
86{
87 bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
88 bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
89}
90
91inline void pb1200_disable_irq(unsigned int irq_nr)
92{
93 bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
94 bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
95}
96
97static unsigned int pb1200_startup_irq( unsigned int irq_nr )
98{
99 if (++pb1200_cascade_en == 1)
100 {
101 request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
102 0, "Pb1200 Cascade", (void *)&pb1200_cascade_handler );
103#ifdef CONFIG_MIPS_PB1200
104 /* We have a problem with CPLD rev3. Enable a workaround */
105 if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
106 {
107 printk("\nWARNING!!!\n");
108 printk("\nWARNING!!!\n");
109 printk("\nWARNING!!!\n");
110 printk("\nWARNING!!!\n");
111 printk("\nWARNING!!!\n");
112 printk("\nWARNING!!!\n");
113 printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
114 printk("updated to latest revision. This software will not\n");
115 printk("work on anything less than CPLD rev4\n");
116 printk("\nWARNING!!!\n");
117 printk("\nWARNING!!!\n");
118 printk("\nWARNING!!!\n");
119 printk("\nWARNING!!!\n");
120 printk("\nWARNING!!!\n");
121 printk("\nWARNING!!!\n");
122 while(1);
123 }
124#endif
125 }
126 pb1200_enable_irq(irq_nr);
127 return 0;
128}
129
130static void pb1200_shutdown_irq( unsigned int irq_nr )
131{
132 pb1200_disable_irq(irq_nr);
133 if (--pb1200_cascade_en == 0)
134 {
135 free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
136 }
137 return;
138}
139
140static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
141{
142 pb1200_disable_irq( irq_nr );
143}
144
145static void pb1200_end_irq(unsigned int irq_nr)
146{
147 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
148 pb1200_enable_irq(irq_nr);
149 }
150}
151
152static struct hw_interrupt_type external_irq_type =
153{
154#ifdef CONFIG_MIPS_PB1200
155 "Pb1200 Ext",
156#endif
157#ifdef CONFIG_MIPS_DB1200
158 "Db1200 Ext",
159#endif
160 pb1200_startup_irq,
161 pb1200_shutdown_irq,
162 pb1200_enable_irq,
163 pb1200_disable_irq,
164 pb1200_mask_and_ack_irq,
165 pb1200_end_irq,
166 NULL
167};
168
169void _board_init_irq(void)
170{
171 int irq_nr;
172
173 for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
174 {
175 irq_desc[irq_nr].handler = &external_irq_type;
176 pb1200_disable_irq(irq_nr);
177 }
178
179 /* GPIO_7 can not be hooked here, so it is hooked upon first
180 request of any source attached to the cascade */
181}
182
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-20 05:45:03 -0500