9 files changed, 190 insertions, 91 deletions

diff --git a/arch/mips/alchemy/devboards/Makefile b/arch/mips/alchemy/devboards/Makefile
index 730f9f2b30e8..adc6717d7688 100644
--- a/arch/mips/alchemy/devboards/Makefile
+++ b/arch/mips/alchemy/devboards/Makefile
@@ -2,7 +2,7 @@
 # Alchemy Develboards
 #
 
-obj-y += prom.o
+obj-y += prom.o bcsr.o
 obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_MIPS_PB1000)       += pb1000/
 obj-$(CONFIG_MIPS_PB1100)       += pb1100/
diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c
new file mode 100644
index 000000000000..85b7715901af
--- /dev/null
+++ b/arch/mips/alchemy/devboards/bcsr.c
@@ -0,0 +1,76 @@
+/*
+ * bcsr.h -- Db1xxx/Pb1xxx Devboard CPLD registers ("BCSR") abstraction.
+ *
+ * All Alchemy development boards (except, of course, the weird PB1000)
+ * have a few registers in a CPLD with standardised layout; they mostly
+ * only differ in base address.
+ * All registers are 16bits wide with 32bit spacing.
+ */
+
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <asm/addrspace.h>
+#include <asm/io.h>
+#include <asm/mach-db1x00/bcsr.h>
+
+static struct bcsr_reg {
+        void __iomem *raddr;
+        spinlock_t lock;
+} bcsr_regs[BCSR_CNT];
+
+void __init bcsr_init(unsigned long bcsr1_phys, unsigned long bcsr2_phys)
+{
+        int i;
+
+        bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys));
+        bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys));
+
+        for (i = 0; i < BCSR_CNT; i++) {
+                if (i >= BCSR_HEXLEDS)
+                        bcsr_regs[i].raddr = (void __iomem *)bcsr2_phys +
+                                        (0x04 * (i - BCSR_HEXLEDS));
+                else
+                        bcsr_regs[i].raddr = (void __iomem *)bcsr1_phys +
+                                        (0x04 * i);
+
+                spin_lock_init(&bcsr_regs[i].lock);
+        }
+}
+
+unsigned short bcsr_read(enum bcsr_id reg)
+{
+        unsigned short r;
+        unsigned long flags;
+
+        spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
+        r = __raw_readw(bcsr_regs[reg].raddr);
+        spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
+        return r;
+}
+EXPORT_SYMBOL_GPL(bcsr_read);
+
+void bcsr_write(enum bcsr_id reg, unsigned short val)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
+        __raw_writew(val, bcsr_regs[reg].raddr);
+        wmb();
+        spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
+}
+EXPORT_SYMBOL_GPL(bcsr_write);
+
+void bcsr_mod(enum bcsr_id reg, unsigned short clr, unsigned short set)
+{
+        unsigned short r;
+        unsigned long flags;
+
+        spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
+        r = __raw_readw(bcsr_regs[reg].raddr);
+        r &= ~clr;
+        r |= set;
+        __raw_writew(r, bcsr_regs[reg].raddr);
+        wmb();
+        spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
+}
+EXPORT_SYMBOL_GPL(bcsr_mod);
diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c
index de30d8ea7176..e713390c69e6 100644
--- a/arch/mips/alchemy/devboards/db1x00/board_setup.c
+++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c
@@ -32,12 +32,10 @@
 
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-db1x00/db1x00.h>
+#include <asm/mach-db1x00/bcsr.h>
 
 #include <prom.h>
 
-
-static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
-
 const char *get_system_type(void)
 {
 #ifdef CONFIG_MIPS_BOSPORUS
@@ -49,15 +47,43 @@ const char *get_system_type(void)
 
 void board_reset(void)
 {
-        /* Hit BCSR.SW_RESET[RESET] */
-        bcsr->swreset = 0x0000;
+        bcsr_write(BCSR_SYSTEM, 0);
 }
 
 void __init board_setup(void)
 {
+        unsigned long bcsr1, bcsr2;
         u32 pin_func = 0;
         char *argptr;
 
+        bcsr1 = DB1000_BCSR_PHYS_ADDR;
+        bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS;
+
+#ifdef CONFIG_MIPS_DB1000
+        printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
+#endif
+#ifdef CONFIG_MIPS_DB1500
+        printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
+#endif
+#ifdef CONFIG_MIPS_DB1100
+        printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
+#endif
+#ifdef CONFIG_MIPS_BOSPORUS
+        printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
+#endif
+#ifdef CONFIG_MIPS_MIRAGE
+        printk(KERN_INFO "AMD Alchemy Mirage Board\n");
+#endif
+#ifdef CONFIG_MIPS_DB1550
+        printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
+
+        bcsr1 = DB1550_BCSR_PHYS_ADDR;
+        bcsr2 = DB1550_BCSR_PHYS_ADDR + DB1550_BCSR_HEXLED_OFS;
+#endif
+
+        /* initialize board register space */
+        bcsr_init(bcsr1, bcsr2);
+
         argptr = prom_getcmdline();
 #ifdef CONFIG_SERIAL_8250_CONSOLE
         argptr = strstr(argptr, "console=");
@@ -89,11 +115,10 @@ void __init board_setup(void)
         pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
         au_writel(pin_func, SYS_PINFUNC);
         /* Power off until the driver is in use */
-        bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
-        bcsr->resets |=  BCSR_RESETS_IRDA_MODE_OFF;
-        au_sync();
+        bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
+                                BCSR_RESETS_IRDA_MODE_OFF);
 #endif
-        bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */
+        bcsr_write(BCSR_PCMCIA, 0);     /* turn off PCMCIA power */
 
         /* Enable GPIO[31:0] inputs */
         alchemy_gpio1_input_enable();
@@ -123,23 +148,4 @@ void __init board_setup(void)
 #endif
 
         au_sync();
-
-#ifdef CONFIG_MIPS_DB1000
-        printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
-#endif
-#ifdef CONFIG_MIPS_DB1500
-        printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
-#endif
-#ifdef CONFIG_MIPS_DB1100
-        printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
-#endif
-#ifdef CONFIG_MIPS_BOSPORUS
-        printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
-#endif
-#ifdef CONFIG_MIPS_MIRAGE
-        printk(KERN_INFO "AMD Alchemy Mirage Board\n");
-#endif
-#ifdef CONFIG_MIPS_DB1550
-        printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
-#endif
 }
diff --git a/arch/mips/alchemy/devboards/pb1100/board_setup.c b/arch/mips/alchemy/devboards/pb1100/board_setup.c
index 61263081ef58..eb749fb9daa1 100644
--- a/arch/mips/alchemy/devboards/pb1100/board_setup.c
+++ b/arch/mips/alchemy/devboards/pb1100/board_setup.c
@@ -30,6 +30,7 @@
 
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-pb1x00/pb1100.h>
+#include <asm/mach-db1x00/bcsr.h>
 
 #include <prom.h>
 
@@ -49,8 +50,7 @@ const char *get_system_type(void)
 
 void board_reset(void)
 {
-        /* Hit BCSR.RST_VDDI[SOFT_RESET] */
-        au_writel(0x00000000, PB1100_RST_VDDI);
+        bcsr_write(BCSR_SYSTEM, 0);
 }
 
 void __init board_init_irq(void)
@@ -63,6 +63,9 @@ void __init board_setup(void)
         volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
         char *argptr;
 
+        bcsr_init(DB1000_BCSR_PHYS_ADDR,
+                  DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
+
         argptr = prom_getcmdline();
 #ifdef CONFIG_SERIAL_8250_CONSOLE
         argptr = strstr(argptr, "console=");
diff --git a/arch/mips/alchemy/devboards/pb1200/board_setup.c b/arch/mips/alchemy/devboards/pb1200/board_setup.c
index 94e6b7e7753d..db563800c31d 100644
--- a/arch/mips/alchemy/devboards/pb1200/board_setup.c
+++ b/arch/mips/alchemy/devboards/pb1200/board_setup.c
@@ -27,6 +27,8 @@
 #include <linux/init.h>
 #include <linux/sched.h>
 
+#include <asm/mach-db1x00/bcsr.h>
+
 #include <prom.h>
 #include <au1xxx.h>
 
@@ -38,14 +40,25 @@ const char *get_system_type(void)
 
 void board_reset(void)
 {
-        bcsr->resets = 0;
-        bcsr->system = 0;
+        bcsr_write(BCSR_RESETS, 0);
+        bcsr_write(BCSR_SYSTEM, 0);
 }
 
 void __init board_setup(void)
 {
         char *argptr;
 
+#ifdef CONFIG_MIPS_PB1200
+        printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
+        bcsr_init(PB1200_BCSR_PHYS_ADDR,
+                  PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
+#endif
+#ifdef CONFIG_MIPS_DB1200
+        printk(KERN_INFO "AMD Alchemy Db1200 Board\n");
+        bcsr_init(DB1200_BCSR_PHYS_ADDR,
+                  DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
+#endif
+
         argptr = prom_getcmdline();
 #ifdef CONFIG_SERIAL_8250_CONSOLE
         argptr = strstr(argptr, "console=");
@@ -82,7 +95,7 @@ void __init board_setup(void)
                 u32 pin_func;
 
                 /* Select SMBus in CPLD */
-                bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
+                bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
 
                 pin_func = au_readl(SYS_PINFUNC);
                 au_sync();
@@ -116,38 +129,24 @@ void __init board_setup(void)
 
         /*
          * The Pb1200 development board uses external MUX for PSC0 to
-         * support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
+         * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
          */
 #ifdef CONFIG_I2C_AU1550
-        bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
+        bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
 #endif
         au_sync();
-
-#ifdef CONFIG_MIPS_PB1200
-        printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
-#endif
-#ifdef CONFIG_MIPS_DB1200
-        printk(KERN_INFO "AMD Alchemy Db1200 Board\n");
-#endif
 }
 
 int board_au1200fb_panel(void)
 {
-        BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
-        int p;
-
-        p = bcsr->switches;
-        p >>= 8;
-        p &= 0x0F;
-        return p;
+        return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
 }
 
 int board_au1200fb_panel_init(void)
 {
         /* Apply power */
-        BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
-
-        bcsr->board |= BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL;
+        bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
+                                BCSR_BOARD_LCDBL);
         /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
         return 0;
 }
@@ -155,10 +154,8 @@ int board_au1200fb_panel_init(void)
 int board_au1200fb_panel_shutdown(void)
 {
         /* Remove power */
-        BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
-
-        bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
-                         BCSR_BOARD_LCDBL);
+        bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
+                             BCSR_BOARD_LCDBL, 0);
         /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
         return 0;
 }
diff --git a/arch/mips/alchemy/devboards/pb1200/irqmap.c b/arch/mips/alchemy/devboards/pb1200/irqmap.c
index fe47498da280..f379b02213f1 100644
--- a/arch/mips/alchemy/devboards/pb1200/irqmap.c
+++ b/arch/mips/alchemy/devboards/pb1200/irqmap.c
@@ -38,11 +38,14 @@
 #define PB1200_INT_END DB1200_INT_END
 #endif
 
+#include <asm/mach-db1x00/bcsr.h>
+
 struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
         /* This is external interrupt cascade */
         { AU1000_GPIO_7, IRQF_TRIGGER_LOW, 0 },
 };
 
+static void __iomem *bcsr_virt;
 
 /*
  * Support for External interrupts on the Pb1200 Development platform.
@@ -50,7 +53,7 @@ struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
 
 static void pb1200_cascade_handler(unsigned int irq, struct irq_desc *d)
 {
-        unsigned short bisr = bcsr->int_status;
+        unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT);
 
         for ( ; bisr; bisr &= bisr - 1)
                 generic_handle_irq(PB1200_INT_BEGIN + __ffs(bisr));
@@ -61,24 +64,27 @@ static void pb1200_cascade_handler(unsigned int irq, struct irq_desc *d)
  */
 static void pb1200_mask_irq(unsigned int irq_nr)
 {
-        bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
-        bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN);
-        au_sync();
+        unsigned short v = 1 << (irq_nr - PB1200_INT_BEGIN);
+        __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
+        __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
+        wmb();
 }
 
 static void pb1200_maskack_irq(unsigned int irq_nr)
 {
-        bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
-        bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN);
-        bcsr->int_status = 1 << (irq_nr - PB1200_INT_BEGIN);    /* ack */
-        au_sync();
+        unsigned short v = 1 << (irq_nr - PB1200_INT_BEGIN);
+        __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
+        __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
+        __raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT);  /* ack */
+        wmb();
 }
 
 static void pb1200_unmask_irq(unsigned int irq_nr)
 {
-        bcsr->intset = 1 << (irq_nr - PB1200_INT_BEGIN);
-        bcsr->intset_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
-        au_sync();
+        unsigned short v = 1 << (irq_nr - PB1200_INT_BEGIN);
+        __raw_writew(v, bcsr_virt + BCSR_REG_INTSET);
+        __raw_writew(v, bcsr_virt + BCSR_REG_MASKSET);
+        wmb();
 }
 
 static struct irq_chip pb1200_cpld_irq_type = {
@@ -100,8 +106,10 @@ void __init board_init_irq(void)
         au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
 
 #ifdef CONFIG_MIPS_PB1200
+        bcsr_virt = (void __iomem *)KSEG1ADDR(PB1200_BCSR_PHYS_ADDR);
+
         /* We have a problem with CPLD rev 3. */
-        if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
+        if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
                 printk(KERN_ERR "WARNING!!!\n");
                 printk(KERN_ERR "WARNING!!!\n");
                 printk(KERN_ERR "WARNING!!!\n");
@@ -119,12 +127,14 @@ void __init board_init_irq(void)
                 printk(KERN_ERR "WARNING!!!\n");
                 panic("Game over.  Your score is 0.");
         }
+#else
+        bcsr_virt = (void __iomem *)KSEG1ADDR(DB1200_BCSR_PHYS_ADDR);
 #endif
+
         /* mask & disable & ack all */
-        bcsr->intclr_mask = 0xffff;
-        bcsr->intclr = 0xffff;
-        bcsr->int_status = 0xffff;
-        au_sync();
+        bcsr_write(BCSR_INTCLR, 0xffff);
+        bcsr_write(BCSR_MASKCLR, 0xffff);
+        bcsr_write(BCSR_INTSTAT, 0xffff);
 
         for (irq = PB1200_INT_BEGIN; irq <= PB1200_INT_END; irq++)
                 set_irq_chip_and_handler_name(irq, &pb1200_cpld_irq_type,
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c
index b93dff4a6789..dfdaabf77909 100644
--- a/arch/mips/alchemy/devboards/pb1200/platform.c
+++ b/arch/mips/alchemy/devboards/pb1200/platform.c
@@ -26,27 +26,28 @@
 
 #include <asm/mach-au1x00/au1xxx.h>
 #include <asm/mach-au1x00/au1100_mmc.h>
+#include <asm/mach-db1x00/bcsr.h>
 
 static int mmc_activity;
 
 static void pb1200mmc0_set_power(void *mmc_host, int state)
 {
         if (state)
-                bcsr->board |= BCSR_BOARD_SD0PWR;
+                bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
         else
-                bcsr->board &= ~BCSR_BOARD_SD0PWR;
+                bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
 
-        au_sync_delay(1);
+        msleep(1);
 }
 
 static int pb1200mmc0_card_readonly(void *mmc_host)
 {
-        return (bcsr->status & BCSR_STATUS_SD0WP) ? 1 : 0;
+        return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 1 : 0;
 }
 
 static int pb1200mmc0_card_inserted(void *mmc_host)
 {
-        return (bcsr->sig_status & BCSR_INT_SD0INSERT) ? 1 : 0;
+        return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT) ? 1 : 0;
 }
 
 static void pb1200_mmcled_set(struct led_classdev *led,
@@ -54,10 +55,10 @@ static void pb1200_mmcled_set(struct led_classdev *led,
 {
         if (brightness != LED_OFF) {
                 if (++mmc_activity == 1)
-                        bcsr->disk_leds &= ~(1 << 8);
+                        bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
         } else {
                 if (--mmc_activity == 0)
-                        bcsr->disk_leds |= (1 << 8);
+                        bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
         }
 }
 
@@ -69,21 +70,21 @@ static struct led_classdev pb1200mmc_led = {
 static void pb1200mmc1_set_power(void *mmc_host, int state)
 {
         if (state)
-                bcsr->board |= BCSR_BOARD_SD1PWR;
+                bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);
         else
-                bcsr->board &= ~BCSR_BOARD_SD1PWR;
+                bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);
 
-        au_sync_delay(1);
+        msleep(1);
 }
 
 static int pb1200mmc1_card_readonly(void *mmc_host)
 {
-        return (bcsr->status & BCSR_STATUS_SD1WP) ? 1 : 0;
+        return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD1WP) ? 1 : 0;
 }
 
 static int pb1200mmc1_card_inserted(void *mmc_host)
 {
-        return (bcsr->sig_status & BCSR_INT_SD1INSERT) ? 1 : 0;
+        return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0;
 }
 #endif
 
diff --git a/arch/mips/alchemy/devboards/pb1500/board_setup.c b/arch/mips/alchemy/devboards/pb1500/board_setup.c
index d7a56569e7ed..c5389e5afb93 100644
--- a/arch/mips/alchemy/devboards/pb1500/board_setup.c
+++ b/arch/mips/alchemy/devboards/pb1500/board_setup.c
@@ -30,6 +30,7 @@
 
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-pb1x00/pb1500.h>
+#include <asm/mach-db1x00/bcsr.h>
 
 #include <prom.h>
 
@@ -55,8 +56,7 @@ const char *get_system_type(void)
 
 void board_reset(void)
 {
-        /* Hit BCSR.RST_VDDI[SOFT_RESET] */
-        au_writel(0x00000000, PB1500_RST_VDDI);
+        bcsr_write(BCSR_SYSTEM, 0);
 }
 
 void __init board_init_irq(void)
@@ -70,6 +70,9 @@ void __init board_setup(void)
         u32 sys_freqctrl, sys_clksrc;
         char *argptr;
 
+        bcsr_init(DB1000_BCSR_PHYS_ADDR,
+                  DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
+
         argptr = prom_getcmdline();
 #ifdef CONFIG_SERIAL_8250_CONSOLE
         argptr = strstr(argptr, "console=");
diff --git a/arch/mips/alchemy/devboards/pb1550/board_setup.c b/arch/mips/alchemy/devboards/pb1550/board_setup.c
index b6e9e7d247a3..af7a1b5fe7c7 100644
--- a/arch/mips/alchemy/devboards/pb1550/board_setup.c
+++ b/arch/mips/alchemy/devboards/pb1550/board_setup.c
@@ -32,6 +32,7 @@
 
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-pb1x00/pb1550.h>
+#include <asm/mach-db1x00/bcsr.h>
 
 #include <prom.h>
 
@@ -53,8 +54,7 @@ const char *get_system_type(void)
 
 void board_reset(void)
 {
-        /* Hit BCSR.SYSTEM[RESET] */
-        au_writew(au_readw(0xAF00001C) & ~BCSR_SYSTEM_RESET, 0xAF00001C);
+        bcsr_write(BCSR_SYSTEM, 0);
 }
 
 void __init board_init_irq(void)
@@ -66,6 +66,10 @@ void __init board_setup(void)
 {
         u32 pin_func;
 
+        bcsr_init(PB1550_BCSR_PHYS_ADDR,
+                  PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS);
+
+
 #ifdef CONFIG_SERIAL_8250_CONSOLE
         char *argptr;
         argptr = prom_getcmdline();
@@ -85,8 +89,7 @@ void __init board_setup(void)
         pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
         au_writel(pin_func, SYS_PINFUNC);
 
-        au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
-        au_sync();
+        bcsr_write(BCSR_PCMCIA, 0);     /* turn off PCMCIA power */
 
         printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
 }