diff options
Diffstat (limited to 'arch/blackfin/mach-bf561/include/mach')
4 files changed, 9 insertions, 3 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index 1a9e17562821..d0b0b3506440 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * File: include/asm-blackfin/mach-bf561/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf561/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
@@ -224,7 +224,7 @@ | |||
224 | #define ANOMALY_05000301 (1) | 224 | #define ANOMALY_05000301 (1) |
225 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ | 225 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ |
226 | #define ANOMALY_05000302 (1) | 226 | #define ANOMALY_05000302 (1) |
227 | /* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ | 227 | /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */ |
228 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) | 228 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) |
229 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ | 229 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ |
230 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 5) | 230 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 5) |
@@ -283,8 +283,11 @@ | |||
283 | #define ANOMALY_05000273 (0) | 283 | #define ANOMALY_05000273 (0) |
284 | #define ANOMALY_05000311 (0) | 284 | #define ANOMALY_05000311 (0) |
285 | #define ANOMALY_05000353 (1) | 285 | #define ANOMALY_05000353 (1) |
286 | #define ANOMALY_05000380 (0) | ||
286 | #define ANOMALY_05000386 (1) | 287 | #define ANOMALY_05000386 (1) |
287 | #define ANOMALY_05000432 (0) | 288 | #define ANOMALY_05000432 (0) |
288 | #define ANOMALY_05000435 (0) | 289 | #define ANOMALY_05000435 (0) |
290 | #define ANOMALY_05000447 (0) | ||
291 | #define ANOMALY_05000448 (0) | ||
289 | 292 | ||
290 | #endif | 293 | #endif |
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h index 043bfcf26c52..ca8c5f645209 100644 --- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | |||
@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
134 | CH_UART_TX, | 134 | CH_UART_TX, |
135 | CH_UART_RX, | 135 | CH_UART_RX, |
136 | #endif | 136 | #endif |
137 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 137 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
138 | CONFIG_UART0_CTS_PIN, | 138 | CONFIG_UART0_CTS_PIN, |
139 | CONFIG_UART0_RTS_PIN, | 139 | CONFIG_UART0_RTS_PIN, |
140 | #endif | 140 | #endif |
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h index d7c509759659..cf922295f4ce 100644 --- a/arch/blackfin/mach-bf561/include/mach/defBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h | |||
@@ -1106,6 +1106,8 @@ | |||
1106 | #define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */ | 1106 | #define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */ |
1107 | #define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */ | 1107 | #define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */ |
1108 | #define POL 0x0000C000 /* PPI Signal Polarities */ | 1108 | #define POL 0x0000C000 /* PPI Signal Polarities */ |
1109 | #define POLC 0x4000 /* PPI Clock Polarity */ | ||
1110 | #define POLS 0x8000 /* PPI Frame Sync Polarity */ | ||
1109 | 1111 | ||
1110 | /* PPI_STATUS Masks */ | 1112 | /* PPI_STATUS Masks */ |
1111 | #define FLD 0x00000400 /* Field Indicator */ | 1113 | #define FLD 0x00000400 /* Field Indicator */ |
diff --git a/arch/blackfin/mach-bf561/include/mach/portmux.h b/arch/blackfin/mach-bf561/include/mach/portmux.h index a6ee8206efb6..2e5ad6347dea 100644 --- a/arch/blackfin/mach-bf561/include/mach/portmux.h +++ b/arch/blackfin/mach-bf561/include/mach/portmux.h | |||
@@ -85,5 +85,6 @@ | |||
85 | #define P_SPI0_MOSI (P_DONTCARE) | 85 | #define P_SPI0_MOSI (P_DONTCARE) |
86 | #define P_SPI0_MISO (P_DONTCARE) | 86 | #define P_SPI0_MISO (P_DONTCARE) |
87 | #define P_SPI0_SCK (P_DONTCARE) | 87 | #define P_SPI0_SCK (P_DONTCARE) |
88 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 | ||
88 | 89 | ||
89 | #endif /* _MACH_PORTMUX_H_ */ | 90 | #endif /* _MACH_PORTMUX_H_ */ |