diff options
Diffstat (limited to 'arch/blackfin')
110 files changed, 1604 insertions, 2492 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index a949c4fbbddd..0c1f86e3e44a 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig | |||
@@ -169,26 +169,51 @@ config BF542 | |||
169 | help | 169 | help |
170 | BF542 Processor Support. | 170 | BF542 Processor Support. |
171 | 171 | ||
172 | config BF542M | ||
173 | bool "BF542m" | ||
174 | help | ||
175 | BF542 Processor Support. | ||
176 | |||
172 | config BF544 | 177 | config BF544 |
173 | bool "BF544" | 178 | bool "BF544" |
174 | help | 179 | help |
175 | BF544 Processor Support. | 180 | BF544 Processor Support. |
176 | 181 | ||
182 | config BF544M | ||
183 | bool "BF544m" | ||
184 | help | ||
185 | BF544 Processor Support. | ||
186 | |||
177 | config BF547 | 187 | config BF547 |
178 | bool "BF547" | 188 | bool "BF547" |
179 | help | 189 | help |
180 | BF547 Processor Support. | 190 | BF547 Processor Support. |
181 | 191 | ||
192 | config BF547M | ||
193 | bool "BF547m" | ||
194 | help | ||
195 | BF547 Processor Support. | ||
196 | |||
182 | config BF548 | 197 | config BF548 |
183 | bool "BF548" | 198 | bool "BF548" |
184 | help | 199 | help |
185 | BF548 Processor Support. | 200 | BF548 Processor Support. |
186 | 201 | ||
202 | config BF548M | ||
203 | bool "BF548m" | ||
204 | help | ||
205 | BF548 Processor Support. | ||
206 | |||
187 | config BF549 | 207 | config BF549 |
188 | bool "BF549" | 208 | bool "BF549" |
189 | help | 209 | help |
190 | BF549 Processor Support. | 210 | BF549 Processor Support. |
191 | 211 | ||
212 | config BF549M | ||
213 | bool "BF549m" | ||
214 | help | ||
215 | BF549 Processor Support. | ||
216 | |||
192 | config BF561 | 217 | config BF561 |
193 | bool "BF561" | 218 | bool "BF561" |
194 | help | 219 | help |
@@ -224,39 +249,39 @@ config TICK_SOURCE_SYSTMR0 | |||
224 | 249 | ||
225 | config BF_REV_MIN | 250 | config BF_REV_MIN |
226 | int | 251 | int |
227 | default 0 if (BF51x || BF52x || BF54x) | 252 | default 0 if (BF51x || BF52x || (BF54x && !BF54xM)) |
228 | default 2 if (BF537 || BF536 || BF534) | 253 | default 2 if (BF537 || BF536 || BF534) |
229 | default 3 if (BF561 ||BF533 || BF532 || BF531) | 254 | default 3 if (BF561 || BF533 || BF532 || BF531 || BF54xM) |
230 | default 4 if (BF538 || BF539) | 255 | default 4 if (BF538 || BF539) |
231 | 256 | ||
232 | config BF_REV_MAX | 257 | config BF_REV_MAX |
233 | int | 258 | int |
234 | default 2 if (BF51x || BF52x || BF54x) | 259 | default 2 if (BF51x || BF52x || (BF54x && !BF54xM)) |
235 | default 3 if (BF537 || BF536 || BF534) | 260 | default 3 if (BF537 || BF536 || BF534 || BF54xM) |
236 | default 5 if (BF561 || BF538 || BF539) | 261 | default 5 if (BF561 || BF538 || BF539) |
237 | default 6 if (BF533 || BF532 || BF531) | 262 | default 6 if (BF533 || BF532 || BF531) |
238 | 263 | ||
239 | choice | 264 | choice |
240 | prompt "Silicon Rev" | 265 | prompt "Silicon Rev" |
241 | default BF_REV_0_1 if (BF51x || BF52x || BF54x) | 266 | default BF_REV_0_1 if (BF51x || BF52x || (BF54x && !BF54xM)) |
242 | default BF_REV_0_2 if (BF534 || BF536 || BF537) | 267 | default BF_REV_0_2 if (BF534 || BF536 || BF537) |
243 | default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF561) | 268 | default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561) |
244 | 269 | ||
245 | config BF_REV_0_0 | 270 | config BF_REV_0_0 |
246 | bool "0.0" | 271 | bool "0.0" |
247 | depends on (BF51x || BF52x || BF54x) | 272 | depends on (BF51x || BF52x || (BF54x && !BF54xM)) |
248 | 273 | ||
249 | config BF_REV_0_1 | 274 | config BF_REV_0_1 |
250 | bool "0.1" | 275 | bool "0.1" |
251 | depends on (BF52x || BF54x) | 276 | depends on (BF52x || (BF54x && !BF54xM)) |
252 | 277 | ||
253 | config BF_REV_0_2 | 278 | config BF_REV_0_2 |
254 | bool "0.2" | 279 | bool "0.2" |
255 | depends on (BF52x || BF537 || BF536 || BF534 || BF54x) | 280 | depends on (BF52x || BF537 || BF536 || BF534 || (BF54x && !BF54xM)) |
256 | 281 | ||
257 | config BF_REV_0_3 | 282 | config BF_REV_0_3 |
258 | bool "0.3" | 283 | bool "0.3" |
259 | depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531) | 284 | depends on (BF54xM || BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531) |
260 | 285 | ||
261 | config BF_REV_0_4 | 286 | config BF_REV_0_4 |
262 | bool "0.4" | 287 | bool "0.4" |
@@ -293,9 +318,14 @@ config BF53x | |||
293 | depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537) | 318 | depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537) |
294 | default y | 319 | default y |
295 | 320 | ||
321 | config BF54xM | ||
322 | bool | ||
323 | depends on (BF542M || BF544M || BF547M || BF548M || BF549M) | ||
324 | default y | ||
325 | |||
296 | config BF54x | 326 | config BF54x |
297 | bool | 327 | bool |
298 | depends on (BF542 || BF544 || BF547 || BF548 || BF549) | 328 | depends on (BF542 || BF544 || BF547 || BF548 || BF549 || BF54xM) |
299 | default y | 329 | default y |
300 | 330 | ||
301 | config MEM_GENERIC_BOARD | 331 | config MEM_GENERIC_BOARD |
@@ -1099,6 +1129,7 @@ endchoice | |||
1099 | 1129 | ||
1100 | config PM_WAKEUP_BY_GPIO | 1130 | config PM_WAKEUP_BY_GPIO |
1101 | bool "Allow Wakeup from Standby by GPIO" | 1131 | bool "Allow Wakeup from Standby by GPIO" |
1132 | depends on PM && !BF54x | ||
1102 | 1133 | ||
1103 | config PM_WAKEUP_GPIO_NUMBER | 1134 | config PM_WAKEUP_GPIO_NUMBER |
1104 | int "GPIO number" | 1135 | int "GPIO number" |
@@ -1138,6 +1169,12 @@ config PM_BFIN_WAKE_GP | |||
1138 | default n | 1169 | default n |
1139 | help | 1170 | help |
1140 | Enable General-Purpose Wake-Up (Voltage Regulator Power-Up) | 1171 | Enable General-Purpose Wake-Up (Voltage Regulator Power-Up) |
1172 | (all processors, except ADSP-BF549). This option sets | ||
1173 | the general-purpose wake-up enable (GPWE) control bit to enable | ||
1174 | wake-up upon detection of an active low signal on the /GPW (PH7) pin. | ||
1175 | On ADSP-BF549 this option enables the the same functionality on the | ||
1176 | /MRXON pin also PH7. | ||
1177 | |||
1141 | endmenu | 1178 | endmenu |
1142 | 1179 | ||
1143 | menu "CPU Frequency scaling" | 1180 | menu "CPU Frequency scaling" |
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug index 5f981d9ca625..79e7e63ab709 100644 --- a/arch/blackfin/Kconfig.debug +++ b/arch/blackfin/Kconfig.debug | |||
@@ -21,12 +21,6 @@ config DEBUG_STACK_USAGE | |||
21 | config HAVE_ARCH_KGDB | 21 | config HAVE_ARCH_KGDB |
22 | def_bool y | 22 | def_bool y |
23 | 23 | ||
24 | config KGDB_TESTCASE | ||
25 | tristate "KGDB: for test case in expect" | ||
26 | default n | ||
27 | help | ||
28 | This is a kgdb test case for automated testing. | ||
29 | |||
30 | config DEBUG_VERBOSE | 24 | config DEBUG_VERBOSE |
31 | bool "Verbose fault messages" | 25 | bool "Verbose fault messages" |
32 | default y | 26 | default y |
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile index e550c8d46066..d54c8283825c 100644 --- a/arch/blackfin/Makefile +++ b/arch/blackfin/Makefile | |||
@@ -21,57 +21,67 @@ KALLSYMS += --symbol-prefix=_ | |||
21 | KBUILD_DEFCONFIG := BF537-STAMP_defconfig | 21 | KBUILD_DEFCONFIG := BF537-STAMP_defconfig |
22 | 22 | ||
23 | # setup the machine name and the machine dependent settings | 23 | # setup the machine name and the machine dependent settings |
24 | machine-$(CONFIG_BF512) := bf518 | 24 | machine-$(CONFIG_BF512) := bf518 |
25 | machine-$(CONFIG_BF514) := bf518 | 25 | machine-$(CONFIG_BF514) := bf518 |
26 | machine-$(CONFIG_BF516) := bf518 | 26 | machine-$(CONFIG_BF516) := bf518 |
27 | machine-$(CONFIG_BF518) := bf518 | 27 | machine-$(CONFIG_BF518) := bf518 |
28 | machine-$(CONFIG_BF522) := bf527 | 28 | machine-$(CONFIG_BF522) := bf527 |
29 | machine-$(CONFIG_BF523) := bf527 | 29 | machine-$(CONFIG_BF523) := bf527 |
30 | machine-$(CONFIG_BF524) := bf527 | 30 | machine-$(CONFIG_BF524) := bf527 |
31 | machine-$(CONFIG_BF525) := bf527 | 31 | machine-$(CONFIG_BF525) := bf527 |
32 | machine-$(CONFIG_BF526) := bf527 | 32 | machine-$(CONFIG_BF526) := bf527 |
33 | machine-$(CONFIG_BF527) := bf527 | 33 | machine-$(CONFIG_BF527) := bf527 |
34 | machine-$(CONFIG_BF531) := bf533 | 34 | machine-$(CONFIG_BF531) := bf533 |
35 | machine-$(CONFIG_BF532) := bf533 | 35 | machine-$(CONFIG_BF532) := bf533 |
36 | machine-$(CONFIG_BF533) := bf533 | 36 | machine-$(CONFIG_BF533) := bf533 |
37 | machine-$(CONFIG_BF534) := bf537 | 37 | machine-$(CONFIG_BF534) := bf537 |
38 | machine-$(CONFIG_BF536) := bf537 | 38 | machine-$(CONFIG_BF536) := bf537 |
39 | machine-$(CONFIG_BF537) := bf537 | 39 | machine-$(CONFIG_BF537) := bf537 |
40 | machine-$(CONFIG_BF538) := bf538 | 40 | machine-$(CONFIG_BF538) := bf538 |
41 | machine-$(CONFIG_BF539) := bf538 | 41 | machine-$(CONFIG_BF539) := bf538 |
42 | machine-$(CONFIG_BF542) := bf548 | 42 | machine-$(CONFIG_BF542) := bf548 |
43 | machine-$(CONFIG_BF544) := bf548 | 43 | machine-$(CONFIG_BF542M) := bf548 |
44 | machine-$(CONFIG_BF547) := bf548 | 44 | machine-$(CONFIG_BF544) := bf548 |
45 | machine-$(CONFIG_BF548) := bf548 | 45 | machine-$(CONFIG_BF544M) := bf548 |
46 | machine-$(CONFIG_BF549) := bf548 | 46 | machine-$(CONFIG_BF547) := bf548 |
47 | machine-$(CONFIG_BF561) := bf561 | 47 | machine-$(CONFIG_BF547M) := bf548 |
48 | machine-$(CONFIG_BF548) := bf548 | ||
49 | machine-$(CONFIG_BF548M) := bf548 | ||
50 | machine-$(CONFIG_BF549) := bf548 | ||
51 | machine-$(CONFIG_BF549M) := bf548 | ||
52 | machine-$(CONFIG_BF561) := bf561 | ||
48 | MACHINE := $(machine-y) | 53 | MACHINE := $(machine-y) |
49 | export MACHINE | 54 | export MACHINE |
50 | 55 | ||
51 | cpu-$(CONFIG_BF512) := bf512 | 56 | cpu-$(CONFIG_BF512) := bf512 |
52 | cpu-$(CONFIG_BF514) := bf514 | 57 | cpu-$(CONFIG_BF514) := bf514 |
53 | cpu-$(CONFIG_BF516) := bf516 | 58 | cpu-$(CONFIG_BF516) := bf516 |
54 | cpu-$(CONFIG_BF518) := bf518 | 59 | cpu-$(CONFIG_BF518) := bf518 |
55 | cpu-$(CONFIG_BF522) := bf522 | 60 | cpu-$(CONFIG_BF522) := bf522 |
56 | cpu-$(CONFIG_BF523) := bf523 | 61 | cpu-$(CONFIG_BF523) := bf523 |
57 | cpu-$(CONFIG_BF524) := bf524 | 62 | cpu-$(CONFIG_BF524) := bf524 |
58 | cpu-$(CONFIG_BF525) := bf525 | 63 | cpu-$(CONFIG_BF525) := bf525 |
59 | cpu-$(CONFIG_BF526) := bf526 | 64 | cpu-$(CONFIG_BF526) := bf526 |
60 | cpu-$(CONFIG_BF527) := bf527 | 65 | cpu-$(CONFIG_BF527) := bf527 |
61 | cpu-$(CONFIG_BF531) := bf531 | 66 | cpu-$(CONFIG_BF531) := bf531 |
62 | cpu-$(CONFIG_BF532) := bf532 | 67 | cpu-$(CONFIG_BF532) := bf532 |
63 | cpu-$(CONFIG_BF533) := bf533 | 68 | cpu-$(CONFIG_BF533) := bf533 |
64 | cpu-$(CONFIG_BF534) := bf534 | 69 | cpu-$(CONFIG_BF534) := bf534 |
65 | cpu-$(CONFIG_BF536) := bf536 | 70 | cpu-$(CONFIG_BF536) := bf536 |
66 | cpu-$(CONFIG_BF537) := bf537 | 71 | cpu-$(CONFIG_BF537) := bf537 |
67 | cpu-$(CONFIG_BF538) := bf538 | 72 | cpu-$(CONFIG_BF538) := bf538 |
68 | cpu-$(CONFIG_BF539) := bf539 | 73 | cpu-$(CONFIG_BF539) := bf539 |
69 | cpu-$(CONFIG_BF542) := bf542 | 74 | cpu-$(CONFIG_BF542) := bf542 |
70 | cpu-$(CONFIG_BF544) := bf544 | 75 | cpu-$(CONFIG_BF542M) := bf542m |
71 | cpu-$(CONFIG_BF547) := bf547 | 76 | cpu-$(CONFIG_BF544) := bf544 |
72 | cpu-$(CONFIG_BF548) := bf548 | 77 | cpu-$(CONFIG_BF544M) := bf544m |
73 | cpu-$(CONFIG_BF549) := bf549 | 78 | cpu-$(CONFIG_BF547) := bf547 |
74 | cpu-$(CONFIG_BF561) := bf561 | 79 | cpu-$(CONFIG_BF547M) := bf547m |
80 | cpu-$(CONFIG_BF548) := bf548 | ||
81 | cpu-$(CONFIG_BF548M) := bf548m | ||
82 | cpu-$(CONFIG_BF549) := bf549 | ||
83 | cpu-$(CONFIG_BF549M) := bf549m | ||
84 | cpu-$(CONFIG_BF561) := bf561 | ||
75 | 85 | ||
76 | rev-$(CONFIG_BF_REV_0_0) := 0.0 | 86 | rev-$(CONFIG_BF_REV_0_0) := 0.0 |
77 | rev-$(CONFIG_BF_REV_0_1) := 0.1 | 87 | rev-$(CONFIG_BF_REV_0_1) := 0.1 |
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig index e0b3f242b555..281f4b60e603 100644 --- a/arch/blackfin/configs/BF518F-EZBRD_defconfig +++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig | |||
@@ -1,6 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.28-rc2 | 3 | # Linux kernel version: 2.6.28 |
4 | # Fri Feb 20 10:01:44 2009 | ||
4 | # | 5 | # |
5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
@@ -132,10 +133,15 @@ CONFIG_BF518=y | |||
132 | # CONFIG_BF538 is not set | 133 | # CONFIG_BF538 is not set |
133 | # CONFIG_BF539 is not set | 134 | # CONFIG_BF539 is not set |
134 | # CONFIG_BF542 is not set | 135 | # CONFIG_BF542 is not set |
136 | # CONFIG_BF542M is not set | ||
135 | # CONFIG_BF544 is not set | 137 | # CONFIG_BF544 is not set |
138 | # CONFIG_BF544M is not set | ||
136 | # CONFIG_BF547 is not set | 139 | # CONFIG_BF547 is not set |
140 | # CONFIG_BF547M is not set | ||
137 | # CONFIG_BF548 is not set | 141 | # CONFIG_BF548 is not set |
142 | # CONFIG_BF548M is not set | ||
138 | # CONFIG_BF549 is not set | 143 | # CONFIG_BF549 is not set |
144 | # CONFIG_BF549M is not set | ||
139 | # CONFIG_BF561 is not set | 145 | # CONFIG_BF561 is not set |
140 | CONFIG_BF_REV_MIN=0 | 146 | CONFIG_BF_REV_MIN=0 |
141 | CONFIG_BF_REV_MAX=2 | 147 | CONFIG_BF_REV_MAX=2 |
@@ -149,6 +155,7 @@ CONFIG_BF_REV_0_0=y | |||
149 | # CONFIG_BF_REV_ANY is not set | 155 | # CONFIG_BF_REV_ANY is not set |
150 | # CONFIG_BF_REV_NONE is not set | 156 | # CONFIG_BF_REV_NONE is not set |
151 | CONFIG_BF51x=y | 157 | CONFIG_BF51x=y |
158 | CONFIG_MEM_MT48LC32M8A2_75=y | ||
152 | CONFIG_BFIN518F_EZBRD=y | 159 | CONFIG_BFIN518F_EZBRD=y |
153 | 160 | ||
154 | # | 161 | # |
@@ -424,7 +431,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
424 | # CONFIG_TIPC is not set | 431 | # CONFIG_TIPC is not set |
425 | # CONFIG_ATM is not set | 432 | # CONFIG_ATM is not set |
426 | # CONFIG_BRIDGE is not set | 433 | # CONFIG_BRIDGE is not set |
427 | # CONFIG_NET_DSA is not set | 434 | CONFIG_NET_DSA=y |
435 | # CONFIG_NET_DSA_TAG_DSA is not set | ||
436 | # CONFIG_NET_DSA_TAG_EDSA is not set | ||
437 | # CONFIG_NET_DSA_TAG_TRAILER is not set | ||
438 | CONFIG_NET_DSA_TAG_STPID=y | ||
439 | # CONFIG_NET_DSA_MV88E6XXX is not set | ||
440 | # CONFIG_NET_DSA_MV88E6060 is not set | ||
441 | # CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set | ||
442 | # CONFIG_NET_DSA_MV88E6131 is not set | ||
443 | # CONFIG_NET_DSA_MV88E6123_61_65 is not set | ||
444 | CONFIG_NET_DSA_KSZ8893M=y | ||
428 | # CONFIG_VLAN_8021Q is not set | 445 | # CONFIG_VLAN_8021Q is not set |
429 | # CONFIG_DECNET is not set | 446 | # CONFIG_DECNET is not set |
430 | # CONFIG_LLC2 is not set | 447 | # CONFIG_LLC2 is not set |
@@ -527,6 +544,8 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y | |||
527 | # | 544 | # |
528 | # Self-contained MTD device drivers | 545 | # Self-contained MTD device drivers |
529 | # | 546 | # |
547 | # CONFIG_MTD_DATAFLASH is not set | ||
548 | # CONFIG_MTD_M25P80 is not set | ||
530 | # CONFIG_MTD_SLRAM is not set | 549 | # CONFIG_MTD_SLRAM is not set |
531 | # CONFIG_MTD_PHRAM is not set | 550 | # CONFIG_MTD_PHRAM is not set |
532 | # CONFIG_MTD_MTDRAM is not set | 551 | # CONFIG_MTD_MTDRAM is not set |
@@ -559,7 +578,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 | |||
559 | # CONFIG_BLK_DEV_HD is not set | 578 | # CONFIG_BLK_DEV_HD is not set |
560 | CONFIG_MISC_DEVICES=y | 579 | CONFIG_MISC_DEVICES=y |
561 | # CONFIG_EEPROM_93CX6 is not set | 580 | # CONFIG_EEPROM_93CX6 is not set |
581 | # CONFIG_ICS932S401 is not set | ||
562 | # CONFIG_ENCLOSURE_SERVICES is not set | 582 | # CONFIG_ENCLOSURE_SERVICES is not set |
583 | # CONFIG_C2PORT is not set | ||
563 | CONFIG_HAVE_IDE=y | 584 | CONFIG_HAVE_IDE=y |
564 | # CONFIG_IDE is not set | 585 | # CONFIG_IDE is not set |
565 | 586 | ||
@@ -598,10 +619,14 @@ CONFIG_PHYLIB=y | |||
598 | # CONFIG_MDIO_BITBANG is not set | 619 | # CONFIG_MDIO_BITBANG is not set |
599 | CONFIG_NET_ETHERNET=y | 620 | CONFIG_NET_ETHERNET=y |
600 | CONFIG_MII=y | 621 | CONFIG_MII=y |
601 | # CONFIG_BFIN_MAC is not set | 622 | CONFIG_BFIN_MAC=y |
623 | CONFIG_BFIN_TX_DESC_NUM=10 | ||
624 | CONFIG_BFIN_RX_DESC_NUM=20 | ||
625 | # CONFIG_BFIN_MAC_RMII is not set | ||
602 | # CONFIG_SMC91X is not set | 626 | # CONFIG_SMC91X is not set |
603 | # CONFIG_SMSC911X is not set | 627 | # CONFIG_SMSC911X is not set |
604 | # CONFIG_DM9000 is not set | 628 | # CONFIG_DM9000 is not set |
629 | # CONFIG_ENC28J60 is not set | ||
605 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 630 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
606 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 631 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
607 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 632 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
@@ -679,7 +704,7 @@ CONFIG_VT_CONSOLE=y | |||
679 | CONFIG_HW_CONSOLE=y | 704 | CONFIG_HW_CONSOLE=y |
680 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | 705 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
681 | # CONFIG_DEVKMEM is not set | 706 | # CONFIG_DEVKMEM is not set |
682 | # CONFIG_BFIN_JTAG_COMM is not set | 707 | CONFIG_BFIN_JTAG_COMM=m |
683 | # CONFIG_SERIAL_NONSTANDARD is not set | 708 | # CONFIG_SERIAL_NONSTANDARD is not set |
684 | 709 | ||
685 | # | 710 | # |
@@ -746,9 +771,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
746 | # Miscellaneous I2C Chip support | 771 | # Miscellaneous I2C Chip support |
747 | # | 772 | # |
748 | # CONFIG_DS1682 is not set | 773 | # CONFIG_DS1682 is not set |
749 | # CONFIG_AT24 is not set | 774 | # CONFIG_EEPROM_AT24 is not set |
750 | # CONFIG_SENSORS_AD5252 is not set | 775 | # CONFIG_SENSORS_AD5252 is not set |
751 | # CONFIG_SENSORS_EEPROM is not set | 776 | # CONFIG_EEPROM_LEGACY is not set |
752 | # CONFIG_SENSORS_PCF8574 is not set | 777 | # CONFIG_SENSORS_PCF8574 is not set |
753 | # CONFIG_PCF8575 is not set | 778 | # CONFIG_PCF8575 is not set |
754 | # CONFIG_SENSORS_PCA9539 is not set | 779 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -759,7 +784,23 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
759 | # CONFIG_I2C_DEBUG_ALGO is not set | 784 | # CONFIG_I2C_DEBUG_ALGO is not set |
760 | # CONFIG_I2C_DEBUG_BUS is not set | 785 | # CONFIG_I2C_DEBUG_BUS is not set |
761 | # CONFIG_I2C_DEBUG_CHIP is not set | 786 | # CONFIG_I2C_DEBUG_CHIP is not set |
762 | # CONFIG_SPI is not set | 787 | CONFIG_SPI=y |
788 | # CONFIG_SPI_DEBUG is not set | ||
789 | CONFIG_SPI_MASTER=y | ||
790 | |||
791 | # | ||
792 | # SPI Master Controller Drivers | ||
793 | # | ||
794 | CONFIG_SPI_BFIN=y | ||
795 | # CONFIG_SPI_BFIN_LOCK is not set | ||
796 | # CONFIG_SPI_BITBANG is not set | ||
797 | |||
798 | # | ||
799 | # SPI Protocol Masters | ||
800 | # | ||
801 | # CONFIG_SPI_AT25 is not set | ||
802 | # CONFIG_SPI_SPIDEV is not set | ||
803 | # CONFIG_SPI_TLE62X0 is not set | ||
763 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 804 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
764 | # CONFIG_GPIOLIB is not set | 805 | # CONFIG_GPIOLIB is not set |
765 | # CONFIG_W1 is not set | 806 | # CONFIG_W1 is not set |
@@ -783,8 +824,10 @@ CONFIG_BFIN_WDT=y | |||
783 | # CONFIG_MFD_SM501 is not set | 824 | # CONFIG_MFD_SM501 is not set |
784 | # CONFIG_HTC_PASIC3 is not set | 825 | # CONFIG_HTC_PASIC3 is not set |
785 | # CONFIG_MFD_TMIO is not set | 826 | # CONFIG_MFD_TMIO is not set |
827 | # CONFIG_PMIC_DA903X is not set | ||
786 | # CONFIG_MFD_WM8400 is not set | 828 | # CONFIG_MFD_WM8400 is not set |
787 | # CONFIG_MFD_WM8350_I2C is not set | 829 | # CONFIG_MFD_WM8350_I2C is not set |
830 | # CONFIG_REGULATOR is not set | ||
788 | 831 | ||
789 | # | 832 | # |
790 | # Multimedia devices | 833 | # Multimedia devices |
@@ -856,10 +899,18 @@ CONFIG_RTC_INTF_DEV=y | |||
856 | # CONFIG_RTC_DRV_M41T80 is not set | 899 | # CONFIG_RTC_DRV_M41T80 is not set |
857 | # CONFIG_RTC_DRV_S35390A is not set | 900 | # CONFIG_RTC_DRV_S35390A is not set |
858 | # CONFIG_RTC_DRV_FM3130 is not set | 901 | # CONFIG_RTC_DRV_FM3130 is not set |
902 | # CONFIG_RTC_DRV_RX8581 is not set | ||
859 | 903 | ||
860 | # | 904 | # |
861 | # SPI RTC drivers | 905 | # SPI RTC drivers |
862 | # | 906 | # |
907 | # CONFIG_RTC_DRV_M41T94 is not set | ||
908 | # CONFIG_RTC_DRV_DS1305 is not set | ||
909 | # CONFIG_RTC_DRV_DS1390 is not set | ||
910 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
911 | # CONFIG_RTC_DRV_R9701 is not set | ||
912 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
913 | # CONFIG_RTC_DRV_DS3234 is not set | ||
863 | 914 | ||
864 | # | 915 | # |
865 | # Platform RTC drivers | 916 | # Platform RTC drivers |
@@ -1057,12 +1108,20 @@ CONFIG_DEBUG_INFO=y | |||
1057 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1108 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
1058 | # CONFIG_FAULT_INJECTION is not set | 1109 | # CONFIG_FAULT_INJECTION is not set |
1059 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 1110 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
1111 | |||
1112 | # | ||
1113 | # Tracers | ||
1114 | # | ||
1115 | # CONFIG_SCHED_TRACER is not set | ||
1116 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
1117 | # CONFIG_BOOT_TRACER is not set | ||
1060 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 1118 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set |
1061 | # CONFIG_SAMPLES is not set | 1119 | # CONFIG_SAMPLES is not set |
1062 | CONFIG_HAVE_ARCH_KGDB=y | 1120 | CONFIG_HAVE_ARCH_KGDB=y |
1063 | # CONFIG_KGDB is not set | 1121 | # CONFIG_KGDB is not set |
1064 | # CONFIG_DEBUG_STACKOVERFLOW is not set | 1122 | # CONFIG_DEBUG_STACKOVERFLOW is not set |
1065 | # CONFIG_DEBUG_STACK_USAGE is not set | 1123 | # CONFIG_DEBUG_STACK_USAGE is not set |
1124 | # CONFIG_KGDB_TESTCASE is not set | ||
1066 | CONFIG_DEBUG_VERBOSE=y | 1125 | CONFIG_DEBUG_VERBOSE=y |
1067 | CONFIG_DEBUG_MMRS=y | 1126 | CONFIG_DEBUG_MMRS=y |
1068 | # CONFIG_DEBUG_HWERR is not set | 1127 | # CONFIG_DEBUG_HWERR is not set |
@@ -1095,6 +1154,7 @@ CONFIG_CRYPTO=y | |||
1095 | # | 1154 | # |
1096 | # CONFIG_CRYPTO_FIPS is not set | 1155 | # CONFIG_CRYPTO_FIPS is not set |
1097 | # CONFIG_CRYPTO_MANAGER is not set | 1156 | # CONFIG_CRYPTO_MANAGER is not set |
1157 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
1098 | # CONFIG_CRYPTO_GF128MUL is not set | 1158 | # CONFIG_CRYPTO_GF128MUL is not set |
1099 | # CONFIG_CRYPTO_NULL is not set | 1159 | # CONFIG_CRYPTO_NULL is not set |
1100 | # CONFIG_CRYPTO_CRYPTD is not set | 1160 | # CONFIG_CRYPTO_CRYPTD is not set |
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig index 69f66c35b2a5..8e2b855b8db7 100644 --- a/arch/blackfin/configs/BF526-EZBRD_defconfig +++ b/arch/blackfin/configs/BF526-EZBRD_defconfig | |||
@@ -723,7 +723,7 @@ CONFIG_VT_CONSOLE=y | |||
723 | CONFIG_HW_CONSOLE=y | 723 | CONFIG_HW_CONSOLE=y |
724 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | 724 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
725 | # CONFIG_DEVKMEM is not set | 725 | # CONFIG_DEVKMEM is not set |
726 | # CONFIG_BFIN_JTAG_COMM is not set | 726 | CONFIG_BFIN_JTAG_COMM=m |
727 | # CONFIG_SERIAL_NONSTANDARD is not set | 727 | # CONFIG_SERIAL_NONSTANDARD is not set |
728 | 728 | ||
729 | # | 729 | # |
@@ -793,9 +793,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
793 | # Miscellaneous I2C Chip support | 793 | # Miscellaneous I2C Chip support |
794 | # | 794 | # |
795 | # CONFIG_DS1682 is not set | 795 | # CONFIG_DS1682 is not set |
796 | # CONFIG_AT24 is not set | 796 | # CONFIG_EEPROM_AT24 is not set |
797 | # CONFIG_SENSORS_AD5252 is not set | 797 | # CONFIG_SENSORS_AD5252 is not set |
798 | # CONFIG_SENSORS_EEPROM is not set | 798 | # CONFIG_EEPROM_LEGACY is not set |
799 | # CONFIG_SENSORS_PCF8574 is not set | 799 | # CONFIG_SENSORS_PCF8574 is not set |
800 | # CONFIG_PCF8575 is not set | 800 | # CONFIG_PCF8575 is not set |
801 | # CONFIG_SENSORS_PCA9539 is not set | 801 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -820,7 +820,7 @@ CONFIG_SPI_BFIN=y | |||
820 | # | 820 | # |
821 | # SPI Protocol Masters | 821 | # SPI Protocol Masters |
822 | # | 822 | # |
823 | # CONFIG_SPI_AT25 is not set | 823 | # CONFIG_EEPROM_AT25 is not set |
824 | # CONFIG_SPI_SPIDEV is not set | 824 | # CONFIG_SPI_SPIDEV is not set |
825 | # CONFIG_SPI_TLE62X0 is not set | 825 | # CONFIG_SPI_TLE62X0 is not set |
826 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 826 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig index f92668af00b0..a50050f17706 100644 --- a/arch/blackfin/configs/BF527-EZKIT_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT_defconfig | |||
@@ -327,8 +327,8 @@ CONFIG_BFIN_ICACHE=y | |||
327 | CONFIG_BFIN_DCACHE=y | 327 | CONFIG_BFIN_DCACHE=y |
328 | # CONFIG_BFIN_DCACHE_BANKA is not set | 328 | # CONFIG_BFIN_DCACHE_BANKA is not set |
329 | # CONFIG_BFIN_ICACHE_LOCK is not set | 329 | # CONFIG_BFIN_ICACHE_LOCK is not set |
330 | # CONFIG_BFIN_WB is not set | 330 | CONFIG_BFIN_WB=y |
331 | CONFIG_BFIN_WT=y | 331 | # CONFIG_BFIN_WT is not set |
332 | # CONFIG_MPU is not set | 332 | # CONFIG_MPU is not set |
333 | 333 | ||
334 | # | 334 | # |
@@ -767,7 +767,7 @@ CONFIG_VT_CONSOLE=y | |||
767 | CONFIG_HW_CONSOLE=y | 767 | CONFIG_HW_CONSOLE=y |
768 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | 768 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
769 | # CONFIG_DEVKMEM is not set | 769 | # CONFIG_DEVKMEM is not set |
770 | # CONFIG_BFIN_JTAG_COMM is not set | 770 | CONFIG_BFIN_JTAG_COMM=m |
771 | # CONFIG_SERIAL_NONSTANDARD is not set | 771 | # CONFIG_SERIAL_NONSTANDARD is not set |
772 | 772 | ||
773 | # | 773 | # |
@@ -837,9 +837,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
837 | # Miscellaneous I2C Chip support | 837 | # Miscellaneous I2C Chip support |
838 | # | 838 | # |
839 | # CONFIG_DS1682 is not set | 839 | # CONFIG_DS1682 is not set |
840 | # CONFIG_AT24 is not set | 840 | # CONFIG_EEPROM_AT24 is not set |
841 | # CONFIG_SENSORS_AD5252 is not set | 841 | # CONFIG_SENSORS_AD5252 is not set |
842 | # CONFIG_SENSORS_EEPROM is not set | 842 | # CONFIG_EEPROM_LEGACY is not set |
843 | # CONFIG_SENSORS_PCF8574 is not set | 843 | # CONFIG_SENSORS_PCF8574 is not set |
844 | # CONFIG_PCF8575 is not set | 844 | # CONFIG_PCF8575 is not set |
845 | # CONFIG_SENSORS_PCA9539 is not set | 845 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -864,7 +864,7 @@ CONFIG_SPI_BFIN=y | |||
864 | # | 864 | # |
865 | # SPI Protocol Masters | 865 | # SPI Protocol Masters |
866 | # | 866 | # |
867 | # CONFIG_SPI_AT25 is not set | 867 | # CONFIG_EEPROM_AT25 is not set |
868 | # CONFIG_SPI_SPIDEV is not set | 868 | # CONFIG_SPI_SPIDEV is not set |
869 | # CONFIG_SPI_TLE62X0 is not set | 869 | # CONFIG_SPI_TLE62X0 is not set |
870 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 870 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig index 92afd988449b..0a2a00d63887 100644 --- a/arch/blackfin/configs/BF533-EZKIT_defconfig +++ b/arch/blackfin/configs/BF533-EZKIT_defconfig | |||
@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y | |||
290 | CONFIG_BFIN_DCACHE=y | 290 | CONFIG_BFIN_DCACHE=y |
291 | # CONFIG_BFIN_DCACHE_BANKA is not set | 291 | # CONFIG_BFIN_DCACHE_BANKA is not set |
292 | # CONFIG_BFIN_ICACHE_LOCK is not set | 292 | # CONFIG_BFIN_ICACHE_LOCK is not set |
293 | # CONFIG_BFIN_WB is not set | 293 | CONFIG_BFIN_WB=y |
294 | CONFIG_BFIN_WT=y | 294 | # CONFIG_BFIN_WT is not set |
295 | # CONFIG_MPU is not set | 295 | # CONFIG_MPU is not set |
296 | 296 | ||
297 | # | 297 | # |
@@ -672,7 +672,7 @@ CONFIG_BFIN_DMA_INTERFACE=m | |||
672 | CONFIG_SIMPLE_GPIO=m | 672 | CONFIG_SIMPLE_GPIO=m |
673 | # CONFIG_VT is not set | 673 | # CONFIG_VT is not set |
674 | # CONFIG_DEVKMEM is not set | 674 | # CONFIG_DEVKMEM is not set |
675 | # CONFIG_BFIN_JTAG_COMM is not set | 675 | CONFIG_BFIN_JTAG_COMM=m |
676 | # CONFIG_SERIAL_NONSTANDARD is not set | 676 | # CONFIG_SERIAL_NONSTANDARD is not set |
677 | 677 | ||
678 | # | 678 | # |
@@ -719,7 +719,7 @@ CONFIG_SPI_BFIN=y | |||
719 | # | 719 | # |
720 | # SPI Protocol Masters | 720 | # SPI Protocol Masters |
721 | # | 721 | # |
722 | # CONFIG_SPI_AT25 is not set | 722 | # CONFIG_EEPROM_AT25 is not set |
723 | # CONFIG_SPI_SPIDEV is not set | 723 | # CONFIG_SPI_SPIDEV is not set |
724 | # CONFIG_SPI_TLE62X0 is not set | 724 | # CONFIG_SPI_TLE62X0 is not set |
725 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 725 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig index 49eabb41e9e5..eb027587a355 100644 --- a/arch/blackfin/configs/BF533-STAMP_defconfig +++ b/arch/blackfin/configs/BF533-STAMP_defconfig | |||
@@ -290,8 +290,8 @@ CONFIG_BFIN_ICACHE=y | |||
290 | CONFIG_BFIN_DCACHE=y | 290 | CONFIG_BFIN_DCACHE=y |
291 | # CONFIG_BFIN_DCACHE_BANKA is not set | 291 | # CONFIG_BFIN_DCACHE_BANKA is not set |
292 | # CONFIG_BFIN_ICACHE_LOCK is not set | 292 | # CONFIG_BFIN_ICACHE_LOCK is not set |
293 | # CONFIG_BFIN_WB is not set | 293 | CONFIG_BFIN_WB=y |
294 | CONFIG_BFIN_WT=y | 294 | # CONFIG_BFIN_WT is not set |
295 | # CONFIG_MPU is not set | 295 | # CONFIG_MPU is not set |
296 | 296 | ||
297 | # | 297 | # |
@@ -679,7 +679,7 @@ CONFIG_BFIN_DMA_INTERFACE=m | |||
679 | CONFIG_SIMPLE_GPIO=m | 679 | CONFIG_SIMPLE_GPIO=m |
680 | # CONFIG_VT is not set | 680 | # CONFIG_VT is not set |
681 | # CONFIG_DEVKMEM is not set | 681 | # CONFIG_DEVKMEM is not set |
682 | # CONFIG_BFIN_JTAG_COMM is not set | 682 | CONFIG_BFIN_JTAG_COMM=m |
683 | # CONFIG_SERIAL_NONSTANDARD is not set | 683 | # CONFIG_SERIAL_NONSTANDARD is not set |
684 | 684 | ||
685 | # | 685 | # |
@@ -743,9 +743,9 @@ CONFIG_I2C_HELPER_AUTO=y | |||
743 | # Miscellaneous I2C Chip support | 743 | # Miscellaneous I2C Chip support |
744 | # | 744 | # |
745 | # CONFIG_DS1682 is not set | 745 | # CONFIG_DS1682 is not set |
746 | # CONFIG_AT24 is not set | 746 | # CONFIG_EEPROM_AT24 is not set |
747 | # CONFIG_SENSORS_AD5252 is not set | 747 | # CONFIG_SENSORS_AD5252 is not set |
748 | # CONFIG_SENSORS_EEPROM is not set | 748 | # CONFIG_EEPROM_LEGACY is not set |
749 | # CONFIG_SENSORS_PCF8574 is not set | 749 | # CONFIG_SENSORS_PCF8574 is not set |
750 | # CONFIG_PCF8575 is not set | 750 | # CONFIG_PCF8575 is not set |
751 | # CONFIG_SENSORS_PCA9539 is not set | 751 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -770,7 +770,7 @@ CONFIG_SPI_BFIN=y | |||
770 | # | 770 | # |
771 | # SPI Protocol Masters | 771 | # SPI Protocol Masters |
772 | # | 772 | # |
773 | # CONFIG_SPI_AT25 is not set | 773 | # CONFIG_EEPROM_AT25 is not set |
774 | # CONFIG_SPI_SPIDEV is not set | 774 | # CONFIG_SPI_SPIDEV is not set |
775 | # CONFIG_SPI_TLE62X0 is not set | 775 | # CONFIG_SPI_TLE62X0 is not set |
776 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 776 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig index 332142f7f9b4..9e62b9f40eb1 100644 --- a/arch/blackfin/configs/BF537-STAMP_defconfig +++ b/arch/blackfin/configs/BF537-STAMP_defconfig | |||
@@ -298,8 +298,8 @@ CONFIG_BFIN_ICACHE=y | |||
298 | CONFIG_BFIN_DCACHE=y | 298 | CONFIG_BFIN_DCACHE=y |
299 | # CONFIG_BFIN_DCACHE_BANKA is not set | 299 | # CONFIG_BFIN_DCACHE_BANKA is not set |
300 | # CONFIG_BFIN_ICACHE_LOCK is not set | 300 | # CONFIG_BFIN_ICACHE_LOCK is not set |
301 | # CONFIG_BFIN_WB is not set | 301 | CONFIG_BFIN_WB=y |
302 | CONFIG_BFIN_WT=y | 302 | # CONFIG_BFIN_WT is not set |
303 | # CONFIG_MPU is not set | 303 | # CONFIG_MPU is not set |
304 | 304 | ||
305 | # | 305 | # |
@@ -568,15 +568,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | |||
568 | # CONFIG_MTD_DOC2000 is not set | 568 | # CONFIG_MTD_DOC2000 is not set |
569 | # CONFIG_MTD_DOC2001 is not set | 569 | # CONFIG_MTD_DOC2001 is not set |
570 | # CONFIG_MTD_DOC2001PLUS is not set | 570 | # CONFIG_MTD_DOC2001PLUS is not set |
571 | CONFIG_MTD_NAND=m | 571 | # CONFIG_MTD_NAND is not set |
572 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
573 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
574 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
575 | # CONFIG_MTD_NAND_BFIN is not set | ||
576 | CONFIG_MTD_NAND_IDS=m | ||
577 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
578 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
579 | CONFIG_MTD_NAND_PLATFORM=m | ||
580 | # CONFIG_MTD_ONENAND is not set | 572 | # CONFIG_MTD_ONENAND is not set |
581 | 573 | ||
582 | # | 574 | # |
@@ -722,7 +714,7 @@ CONFIG_BFIN_DMA_INTERFACE=m | |||
722 | CONFIG_SIMPLE_GPIO=m | 714 | CONFIG_SIMPLE_GPIO=m |
723 | # CONFIG_VT is not set | 715 | # CONFIG_VT is not set |
724 | # CONFIG_DEVKMEM is not set | 716 | # CONFIG_DEVKMEM is not set |
725 | # CONFIG_BFIN_JTAG_COMM is not set | 717 | CONFIG_BFIN_JTAG_COMM=m |
726 | # CONFIG_SERIAL_NONSTANDARD is not set | 718 | # CONFIG_SERIAL_NONSTANDARD is not set |
727 | 719 | ||
728 | # | 720 | # |
@@ -794,9 +786,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
794 | # Miscellaneous I2C Chip support | 786 | # Miscellaneous I2C Chip support |
795 | # | 787 | # |
796 | # CONFIG_DS1682 is not set | 788 | # CONFIG_DS1682 is not set |
797 | # CONFIG_AT24 is not set | 789 | # CONFIG_EEPROM_AT24 is not set |
798 | CONFIG_SENSORS_AD5252=m | 790 | CONFIG_SENSORS_AD5252=m |
799 | # CONFIG_SENSORS_EEPROM is not set | 791 | # CONFIG_EEPROM_LEGACY is not set |
800 | # CONFIG_SENSORS_PCF8574 is not set | 792 | # CONFIG_SENSORS_PCF8574 is not set |
801 | # CONFIG_PCF8575 is not set | 793 | # CONFIG_PCF8575 is not set |
802 | # CONFIG_SENSORS_PCA9539 is not set | 794 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -821,7 +813,7 @@ CONFIG_SPI_BFIN=y | |||
821 | # | 813 | # |
822 | # SPI Protocol Masters | 814 | # SPI Protocol Masters |
823 | # | 815 | # |
824 | # CONFIG_SPI_AT25 is not set | 816 | # CONFIG_EEPROM_AT25 is not set |
825 | # CONFIG_SPI_SPIDEV is not set | 817 | # CONFIG_SPI_SPIDEV is not set |
826 | # CONFIG_SPI_TLE62X0 is not set | 818 | # CONFIG_SPI_TLE62X0 is not set |
827 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 819 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig index ed15934c67c2..dd6ad6be1c87 100644 --- a/arch/blackfin/configs/BF538-EZKIT_defconfig +++ b/arch/blackfin/configs/BF538-EZKIT_defconfig | |||
@@ -306,8 +306,8 @@ CONFIG_BFIN_ICACHE=y | |||
306 | CONFIG_BFIN_DCACHE=y | 306 | CONFIG_BFIN_DCACHE=y |
307 | # CONFIG_BFIN_DCACHE_BANKA is not set | 307 | # CONFIG_BFIN_DCACHE_BANKA is not set |
308 | # CONFIG_BFIN_ICACHE_LOCK is not set | 308 | # CONFIG_BFIN_ICACHE_LOCK is not set |
309 | # CONFIG_BFIN_WB is not set | 309 | CONFIG_BFIN_WB=y |
310 | CONFIG_BFIN_WT=y | 310 | # CONFIG_BFIN_WT is not set |
311 | # CONFIG_MPU is not set | 311 | # CONFIG_MPU is not set |
312 | 312 | ||
313 | # | 313 | # |
@@ -726,7 +726,7 @@ CONFIG_BFIN_DMA_INTERFACE=m | |||
726 | CONFIG_SIMPLE_GPIO=m | 726 | CONFIG_SIMPLE_GPIO=m |
727 | # CONFIG_VT is not set | 727 | # CONFIG_VT is not set |
728 | # CONFIG_DEVKMEM is not set | 728 | # CONFIG_DEVKMEM is not set |
729 | # CONFIG_BFIN_JTAG_COMM is not set | 729 | CONFIG_BFIN_JTAG_COMM=m |
730 | # CONFIG_SERIAL_NONSTANDARD is not set | 730 | # CONFIG_SERIAL_NONSTANDARD is not set |
731 | 731 | ||
732 | # | 732 | # |
@@ -796,9 +796,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
796 | # Miscellaneous I2C Chip support | 796 | # Miscellaneous I2C Chip support |
797 | # | 797 | # |
798 | # CONFIG_DS1682 is not set | 798 | # CONFIG_DS1682 is not set |
799 | # CONFIG_AT24 is not set | 799 | # CONFIG_EEPROM_AT24 is not set |
800 | # CONFIG_SENSORS_AD5252 is not set | 800 | # CONFIG_SENSORS_AD5252 is not set |
801 | # CONFIG_SENSORS_EEPROM is not set | 801 | # CONFIG_EEPROM_LEGACY is not set |
802 | # CONFIG_SENSORS_PCF8574 is not set | 802 | # CONFIG_SENSORS_PCF8574 is not set |
803 | # CONFIG_PCF8575 is not set | 803 | # CONFIG_PCF8575 is not set |
804 | # CONFIG_SENSORS_PCA9539 is not set | 804 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -823,7 +823,7 @@ CONFIG_SPI_BFIN=y | |||
823 | # | 823 | # |
824 | # SPI Protocol Masters | 824 | # SPI Protocol Masters |
825 | # | 825 | # |
826 | # CONFIG_SPI_AT25 is not set | 826 | # CONFIG_EEPROM_AT25 is not set |
827 | # CONFIG_SPI_SPIDEV is not set | 827 | # CONFIG_SPI_SPIDEV is not set |
828 | # CONFIG_SPI_TLE62X0 is not set | 828 | # CONFIG_SPI_TLE62X0 is not set |
829 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 829 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig index d4ed9ce1f62f..6bc2fb1b2a70 100644 --- a/arch/blackfin/configs/BF548-EZKIT_defconfig +++ b/arch/blackfin/configs/BF548-EZKIT_defconfig | |||
@@ -361,8 +361,8 @@ CONFIG_BFIN_ICACHE=y | |||
361 | CONFIG_BFIN_DCACHE=y | 361 | CONFIG_BFIN_DCACHE=y |
362 | # CONFIG_BFIN_DCACHE_BANKA is not set | 362 | # CONFIG_BFIN_DCACHE_BANKA is not set |
363 | # CONFIG_BFIN_ICACHE_LOCK is not set | 363 | # CONFIG_BFIN_ICACHE_LOCK is not set |
364 | # CONFIG_BFIN_WB is not set | 364 | CONFIG_BFIN_WB=y |
365 | CONFIG_BFIN_WT=y | 365 | # CONFIG_BFIN_WT is not set |
366 | # CONFIG_BFIN_L2_CACHEABLE is not set | 366 | # CONFIG_BFIN_L2_CACHEABLE is not set |
367 | # CONFIG_MPU is not set | 367 | # CONFIG_MPU is not set |
368 | 368 | ||
@@ -680,7 +680,7 @@ CONFIG_SCSI=y | |||
680 | CONFIG_SCSI_DMA=y | 680 | CONFIG_SCSI_DMA=y |
681 | # CONFIG_SCSI_TGT is not set | 681 | # CONFIG_SCSI_TGT is not set |
682 | # CONFIG_SCSI_NETLINK is not set | 682 | # CONFIG_SCSI_NETLINK is not set |
683 | CONFIG_SCSI_PROC_FS=y | 683 | # CONFIG_SCSI_PROC_FS is not set |
684 | 684 | ||
685 | # | 685 | # |
686 | # SCSI support type (disk, tape, CD-ROM) | 686 | # SCSI support type (disk, tape, CD-ROM) |
@@ -856,7 +856,7 @@ CONFIG_VT_CONSOLE=y | |||
856 | CONFIG_HW_CONSOLE=y | 856 | CONFIG_HW_CONSOLE=y |
857 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | 857 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
858 | # CONFIG_DEVKMEM is not set | 858 | # CONFIG_DEVKMEM is not set |
859 | # CONFIG_BFIN_JTAG_COMM is not set | 859 | CONFIG_BFIN_JTAG_COMM=m |
860 | # CONFIG_SERIAL_NONSTANDARD is not set | 860 | # CONFIG_SERIAL_NONSTANDARD is not set |
861 | 861 | ||
862 | # | 862 | # |
@@ -928,9 +928,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
928 | # Miscellaneous I2C Chip support | 928 | # Miscellaneous I2C Chip support |
929 | # | 929 | # |
930 | # CONFIG_DS1682 is not set | 930 | # CONFIG_DS1682 is not set |
931 | # CONFIG_AT24 is not set | 931 | # CONFIG_EEPROM_AT24 is not set |
932 | # CONFIG_SENSORS_AD5252 is not set | 932 | # CONFIG_SENSORS_AD5252 is not set |
933 | # CONFIG_SENSORS_EEPROM is not set | 933 | # CONFIG_EEPROM_LEGACY is not set |
934 | # CONFIG_SENSORS_PCF8574 is not set | 934 | # CONFIG_SENSORS_PCF8574 is not set |
935 | # CONFIG_PCF8575 is not set | 935 | # CONFIG_PCF8575 is not set |
936 | # CONFIG_SENSORS_PCA9539 is not set | 936 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -955,7 +955,7 @@ CONFIG_SPI_BFIN=y | |||
955 | # | 955 | # |
956 | # SPI Protocol Masters | 956 | # SPI Protocol Masters |
957 | # | 957 | # |
958 | # CONFIG_SPI_AT25 is not set | 958 | # CONFIG_EEPROM_AT25 is not set |
959 | # CONFIG_SPI_SPIDEV is not set | 959 | # CONFIG_SPI_SPIDEV is not set |
960 | # CONFIG_SPI_TLE62X0 is not set | 960 | # CONFIG_SPI_TLE62X0 is not set |
961 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 961 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig index 1ecb7a38c905..69714fb3e608 100644 --- a/arch/blackfin/configs/BF561-EZKIT_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT_defconfig | |||
@@ -329,8 +329,8 @@ CONFIG_BFIN_ICACHE=y | |||
329 | CONFIG_BFIN_DCACHE=y | 329 | CONFIG_BFIN_DCACHE=y |
330 | # CONFIG_BFIN_DCACHE_BANKA is not set | 330 | # CONFIG_BFIN_DCACHE_BANKA is not set |
331 | # CONFIG_BFIN_ICACHE_LOCK is not set | 331 | # CONFIG_BFIN_ICACHE_LOCK is not set |
332 | # CONFIG_BFIN_WB is not set | 332 | CONFIG_BFIN_WB=y |
333 | CONFIG_BFIN_WT=y | 333 | # CONFIG_BFIN_WT is not set |
334 | # CONFIG_BFIN_L2_CACHEABLE is not set | 334 | # CONFIG_BFIN_L2_CACHEABLE is not set |
335 | # CONFIG_MPU is not set | 335 | # CONFIG_MPU is not set |
336 | 336 | ||
@@ -709,7 +709,7 @@ CONFIG_BFIN_DMA_INTERFACE=m | |||
709 | CONFIG_SIMPLE_GPIO=m | 709 | CONFIG_SIMPLE_GPIO=m |
710 | # CONFIG_VT is not set | 710 | # CONFIG_VT is not set |
711 | # CONFIG_DEVKMEM is not set | 711 | # CONFIG_DEVKMEM is not set |
712 | # CONFIG_BFIN_JTAG_COMM is not set | 712 | CONFIG_BFIN_JTAG_COMM=m |
713 | # CONFIG_SERIAL_NONSTANDARD is not set | 713 | # CONFIG_SERIAL_NONSTANDARD is not set |
714 | 714 | ||
715 | # | 715 | # |
@@ -756,7 +756,7 @@ CONFIG_SPI_BFIN=y | |||
756 | # | 756 | # |
757 | # SPI Protocol Masters | 757 | # SPI Protocol Masters |
758 | # | 758 | # |
759 | # CONFIG_SPI_AT25 is not set | 759 | # CONFIG_EEPROM_AT25 is not set |
760 | # CONFIG_SPI_SPIDEV is not set | 760 | # CONFIG_SPI_SPIDEV is not set |
761 | # CONFIG_SPI_TLE62X0 is not set | 761 | # CONFIG_SPI_TLE62X0 is not set |
762 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 762 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig index 9683b2e13097..017c6ea071b5 100644 --- a/arch/blackfin/configs/BlackStamp_defconfig +++ b/arch/blackfin/configs/BlackStamp_defconfig | |||
@@ -288,8 +288,8 @@ CONFIG_BFIN_ICACHE=y | |||
288 | CONFIG_BFIN_DCACHE=y | 288 | CONFIG_BFIN_DCACHE=y |
289 | # CONFIG_BFIN_DCACHE_BANKA is not set | 289 | # CONFIG_BFIN_DCACHE_BANKA is not set |
290 | # CONFIG_BFIN_ICACHE_LOCK is not set | 290 | # CONFIG_BFIN_ICACHE_LOCK is not set |
291 | # CONFIG_BFIN_WB is not set | 291 | CONFIG_BFIN_WB=y |
292 | CONFIG_BFIN_WT=y | 292 | # CONFIG_BFIN_WT is not set |
293 | # CONFIG_MPU is not set | 293 | # CONFIG_MPU is not set |
294 | 294 | ||
295 | # | 295 | # |
@@ -691,7 +691,7 @@ CONFIG_I2C_GPIO=m | |||
691 | # | 691 | # |
692 | # CONFIG_DS1682 is not set | 692 | # CONFIG_DS1682 is not set |
693 | # CONFIG_SENSORS_AD5252 is not set | 693 | # CONFIG_SENSORS_AD5252 is not set |
694 | # CONFIG_SENSORS_EEPROM is not set | 694 | # CONFIG_EEPROM_LEGACY is not set |
695 | # CONFIG_SENSORS_PCF8574 is not set | 695 | # CONFIG_SENSORS_PCF8574 is not set |
696 | # CONFIG_PCF8575 is not set | 696 | # CONFIG_PCF8575 is not set |
697 | # CONFIG_SENSORS_PCF8591 is not set | 697 | # CONFIG_SENSORS_PCF8591 is not set |
@@ -713,7 +713,7 @@ CONFIG_SPI_BFIN=y | |||
713 | # | 713 | # |
714 | # SPI Protocol Masters | 714 | # SPI Protocol Masters |
715 | # | 715 | # |
716 | CONFIG_SPI_AT25=y | 716 | CONFIG_EEPROM_AT25=y |
717 | CONFIG_SPI_SPIDEV=m | 717 | CONFIG_SPI_SPIDEV=m |
718 | # CONFIG_SPI_TLE62X0 is not set | 718 | # CONFIG_SPI_TLE62X0 is not set |
719 | # CONFIG_W1 is not set | 719 | # CONFIG_W1 is not set |
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig index a041e7eba770..d880ef786770 100644 --- a/arch/blackfin/configs/CM-BF527_defconfig +++ b/arch/blackfin/configs/CM-BF527_defconfig | |||
@@ -1,7 +1,6 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.24.7 | 3 | # Linux kernel version: 2.6.28 |
4 | # Fri Jul 18 18:00:41 2008 | ||
5 | # | 4 | # |
6 | # CONFIG_MMU is not set | 5 | # CONFIG_MMU is not set |
7 | # CONFIG_FPU is not set | 6 | # CONFIG_FPU is not set |
@@ -9,7 +8,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
9 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set | 8 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set |
10 | CONFIG_BLACKFIN=y | 9 | CONFIG_BLACKFIN=y |
11 | CONFIG_ZONE_DMA=y | 10 | CONFIG_ZONE_DMA=y |
12 | CONFIG_SEMAPHORE_SLEEPERS=y | ||
13 | CONFIG_GENERIC_FIND_NEXT_BIT=y | 11 | CONFIG_GENERIC_FIND_NEXT_BIT=y |
14 | CONFIG_GENERIC_HWEIGHT=y | 12 | CONFIG_GENERIC_HWEIGHT=y |
15 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
@@ -32,18 +30,16 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
32 | # CONFIG_POSIX_MQUEUE is not set | 30 | # CONFIG_POSIX_MQUEUE is not set |
33 | # CONFIG_BSD_PROCESS_ACCT is not set | 31 | # CONFIG_BSD_PROCESS_ACCT is not set |
34 | # CONFIG_TASKSTATS is not set | 32 | # CONFIG_TASKSTATS is not set |
35 | # CONFIG_USER_NS is not set | ||
36 | # CONFIG_PID_NS is not set | ||
37 | # CONFIG_AUDIT is not set | 33 | # CONFIG_AUDIT is not set |
38 | CONFIG_IKCONFIG=y | 34 | CONFIG_IKCONFIG=y |
39 | CONFIG_IKCONFIG_PROC=y | 35 | CONFIG_IKCONFIG_PROC=y |
40 | CONFIG_LOG_BUF_SHIFT=14 | 36 | CONFIG_LOG_BUF_SHIFT=14 |
41 | # CONFIG_CGROUPS is not set | 37 | # CONFIG_CGROUPS is not set |
42 | CONFIG_FAIR_GROUP_SCHED=y | 38 | # CONFIG_GROUP_SCHED is not set |
43 | CONFIG_FAIR_USER_SCHED=y | 39 | CONFIG_SYSFS_DEPRECATED=y |
44 | # CONFIG_FAIR_CGROUP_SCHED is not set | 40 | CONFIG_SYSFS_DEPRECATED_V2=y |
45 | # CONFIG_SYSFS_DEPRECATED is not set | ||
46 | # CONFIG_RELAY is not set | 41 | # CONFIG_RELAY is not set |
42 | # CONFIG_NAMESPACES is not set | ||
47 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
48 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
49 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
@@ -52,26 +48,35 @@ CONFIG_EMBEDDED=y | |||
52 | CONFIG_UID16=y | 48 | CONFIG_UID16=y |
53 | CONFIG_SYSCTL_SYSCALL=y | 49 | CONFIG_SYSCTL_SYSCALL=y |
54 | CONFIG_KALLSYMS=y | 50 | CONFIG_KALLSYMS=y |
51 | # CONFIG_KALLSYMS_ALL is not set | ||
55 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 52 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
56 | CONFIG_HOTPLUG=y | 53 | CONFIG_HOTPLUG=y |
57 | CONFIG_PRINTK=y | 54 | CONFIG_PRINTK=y |
58 | CONFIG_BUG=y | 55 | CONFIG_BUG=y |
59 | # CONFIG_ELF_CORE is not set | 56 | # CONFIG_ELF_CORE is not set |
57 | CONFIG_COMPAT_BRK=y | ||
60 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
61 | CONFIG_FUTEX=y | 59 | CONFIG_FUTEX=y |
62 | CONFIG_ANON_INODES=y | 60 | CONFIG_ANON_INODES=y |
63 | CONFIG_EPOLL=y | 61 | CONFIG_EPOLL=y |
64 | CONFIG_SIGNALFD=y | 62 | CONFIG_SIGNALFD=y |
63 | CONFIG_TIMERFD=y | ||
65 | CONFIG_EVENTFD=y | 64 | CONFIG_EVENTFD=y |
65 | CONFIG_AIO=y | ||
66 | CONFIG_VM_EVENT_COUNTERS=y | 66 | CONFIG_VM_EVENT_COUNTERS=y |
67 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
68 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
69 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
70 | # CONFIG_PROFILING is not set | ||
71 | # CONFIG_MARKERS is not set | ||
72 | CONFIG_HAVE_OPROFILE=y | ||
73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
70 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
71 | CONFIG_RT_MUTEXES=y | 75 | CONFIG_RT_MUTEXES=y |
72 | CONFIG_TINY_SHMEM=y | 76 | CONFIG_TINY_SHMEM=y |
73 | CONFIG_BASE_SMALL=0 | 77 | CONFIG_BASE_SMALL=0 |
74 | CONFIG_MODULES=y | 78 | CONFIG_MODULES=y |
79 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
75 | CONFIG_MODULE_UNLOAD=y | 80 | CONFIG_MODULE_UNLOAD=y |
76 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 81 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
77 | # CONFIG_MODVERSIONS is not set | 82 | # CONFIG_MODVERSIONS is not set |
@@ -82,6 +87,7 @@ CONFIG_BLOCK=y | |||
82 | # CONFIG_BLK_DEV_IO_TRACE is not set | 87 | # CONFIG_BLK_DEV_IO_TRACE is not set |
83 | # CONFIG_LSF is not set | 88 | # CONFIG_LSF is not set |
84 | # CONFIG_BLK_DEV_BSG is not set | 89 | # CONFIG_BLK_DEV_BSG is not set |
90 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
85 | 91 | ||
86 | # | 92 | # |
87 | # IO Schedulers | 93 | # IO Schedulers |
@@ -95,9 +101,11 @@ CONFIG_IOSCHED_CFQ=y | |||
95 | CONFIG_DEFAULT_CFQ=y | 101 | CONFIG_DEFAULT_CFQ=y |
96 | # CONFIG_DEFAULT_NOOP is not set | 102 | # CONFIG_DEFAULT_NOOP is not set |
97 | CONFIG_DEFAULT_IOSCHED="cfq" | 103 | CONFIG_DEFAULT_IOSCHED="cfq" |
104 | CONFIG_CLASSIC_RCU=y | ||
98 | # CONFIG_PREEMPT_NONE is not set | 105 | # CONFIG_PREEMPT_NONE is not set |
99 | CONFIG_PREEMPT_VOLUNTARY=y | 106 | CONFIG_PREEMPT_VOLUNTARY=y |
100 | # CONFIG_PREEMPT is not set | 107 | # CONFIG_PREEMPT is not set |
108 | # CONFIG_FREEZER is not set | ||
101 | 109 | ||
102 | # | 110 | # |
103 | # Blackfin Processor Options | 111 | # Blackfin Processor Options |
@@ -106,6 +114,10 @@ CONFIG_PREEMPT_VOLUNTARY=y | |||
106 | # | 114 | # |
107 | # Processor and Board Settings | 115 | # Processor and Board Settings |
108 | # | 116 | # |
117 | # CONFIG_BF512 is not set | ||
118 | # CONFIG_BF514 is not set | ||
119 | # CONFIG_BF516 is not set | ||
120 | # CONFIG_BF518 is not set | ||
109 | # CONFIG_BF522 is not set | 121 | # CONFIG_BF522 is not set |
110 | # CONFIG_BF523 is not set | 122 | # CONFIG_BF523 is not set |
111 | # CONFIG_BF524 is not set | 123 | # CONFIG_BF524 is not set |
@@ -118,48 +130,32 @@ CONFIG_BF527=y | |||
118 | # CONFIG_BF534 is not set | 130 | # CONFIG_BF534 is not set |
119 | # CONFIG_BF536 is not set | 131 | # CONFIG_BF536 is not set |
120 | # CONFIG_BF537 is not set | 132 | # CONFIG_BF537 is not set |
133 | # CONFIG_BF538 is not set | ||
134 | # CONFIG_BF539 is not set | ||
121 | # CONFIG_BF542 is not set | 135 | # CONFIG_BF542 is not set |
136 | # CONFIG_BF542M is not set | ||
122 | # CONFIG_BF544 is not set | 137 | # CONFIG_BF544 is not set |
138 | # CONFIG_BF544M is not set | ||
123 | # CONFIG_BF547 is not set | 139 | # CONFIG_BF547 is not set |
140 | # CONFIG_BF547M is not set | ||
124 | # CONFIG_BF548 is not set | 141 | # CONFIG_BF548 is not set |
142 | # CONFIG_BF548M is not set | ||
125 | # CONFIG_BF549 is not set | 143 | # CONFIG_BF549 is not set |
144 | # CONFIG_BF549M is not set | ||
126 | # CONFIG_BF561 is not set | 145 | # CONFIG_BF561 is not set |
146 | CONFIG_BF_REV_MIN=0 | ||
147 | CONFIG_BF_REV_MAX=2 | ||
127 | # CONFIG_BF_REV_0_0 is not set | 148 | # CONFIG_BF_REV_0_0 is not set |
128 | CONFIG_BF_REV_0_1=y | 149 | CONFIG_BF_REV_0_1=y |
129 | # CONFIG_BF_REV_0_2 is not set | 150 | # CONFIG_BF_REV_0_2 is not set |
130 | # CONFIG_BF_REV_0_3 is not set | 151 | # CONFIG_BF_REV_0_3 is not set |
131 | # CONFIG_BF_REV_0_4 is not set | 152 | # CONFIG_BF_REV_0_4 is not set |
132 | # CONFIG_BF_REV_0_5 is not set | 153 | # CONFIG_BF_REV_0_5 is not set |
154 | # CONFIG_BF_REV_0_6 is not set | ||
133 | # CONFIG_BF_REV_ANY is not set | 155 | # CONFIG_BF_REV_ANY is not set |
134 | # CONFIG_BF_REV_NONE is not set | 156 | # CONFIG_BF_REV_NONE is not set |
135 | CONFIG_BF52x=y | 157 | CONFIG_BF52x=y |
136 | CONFIG_MEM_MT48LC16M16A2TG_75=y | 158 | CONFIG_MEM_MT48LC16M16A2TG_75=y |
137 | # CONFIG_BFIN527_EZKIT is not set | ||
138 | CONFIG_BFIN527_BLUETECHNIX_CM=y | ||
139 | |||
140 | # | ||
141 | # BF527 Specific Configuration | ||
142 | # | ||
143 | |||
144 | # | ||
145 | # Alternative Multiplexing Scheme | ||
146 | # | ||
147 | # CONFIG_BF527_SPORT0_PORTF is not set | ||
148 | CONFIG_BF527_SPORT0_PORTG=y | ||
149 | CONFIG_BF527_SPORT0_TSCLK_PG10=y | ||
150 | # CONFIG_BF527_SPORT0_TSCLK_PG14 is not set | ||
151 | CONFIG_BF527_UART1_PORTF=y | ||
152 | # CONFIG_BF527_UART1_PORTG is not set | ||
153 | # CONFIG_BF527_NAND_D_PORTF is not set | ||
154 | CONFIG_BF527_NAND_D_PORTH=y | ||
155 | |||
156 | # | ||
157 | # Interrupt Priority Assignment | ||
158 | # | ||
159 | |||
160 | # | ||
161 | # Priority | ||
162 | # | ||
163 | CONFIG_IRQ_PLL_WAKEUP=7 | 159 | CONFIG_IRQ_PLL_WAKEUP=7 |
164 | CONFIG_IRQ_DMA0_ERROR=7 | 160 | CONFIG_IRQ_DMA0_ERROR=7 |
165 | CONFIG_IRQ_DMAR0_BLK=7 | 161 | CONFIG_IRQ_DMAR0_BLK=7 |
@@ -179,7 +175,6 @@ CONFIG_IRQ_SPORT0_TX=9 | |||
179 | CONFIG_IRQ_SPORT1_RX=9 | 175 | CONFIG_IRQ_SPORT1_RX=9 |
180 | CONFIG_IRQ_SPORT1_TX=9 | 176 | CONFIG_IRQ_SPORT1_TX=9 |
181 | CONFIG_IRQ_TWI=10 | 177 | CONFIG_IRQ_TWI=10 |
182 | CONFIG_IRQ_SPI=10 | ||
183 | CONFIG_IRQ_UART0_RX=10 | 178 | CONFIG_IRQ_UART0_RX=10 |
184 | CONFIG_IRQ_UART0_TX=10 | 179 | CONFIG_IRQ_UART0_TX=10 |
185 | CONFIG_IRQ_UART1_RX=10 | 180 | CONFIG_IRQ_UART1_RX=10 |
@@ -205,6 +200,34 @@ CONFIG_IRQ_MEM_DMA1=13 | |||
205 | CONFIG_IRQ_WATCH=13 | 200 | CONFIG_IRQ_WATCH=13 |
206 | CONFIG_IRQ_PORTF_INTA=13 | 201 | CONFIG_IRQ_PORTF_INTA=13 |
207 | CONFIG_IRQ_PORTF_INTB=13 | 202 | CONFIG_IRQ_PORTF_INTB=13 |
203 | # CONFIG_BFIN527_EZKIT is not set | ||
204 | CONFIG_BFIN527_BLUETECHNIX_CM=y | ||
205 | # CONFIG_BFIN526_EZBRD is not set | ||
206 | |||
207 | # | ||
208 | # BF527 Specific Configuration | ||
209 | # | ||
210 | |||
211 | # | ||
212 | # Alternative Multiplexing Scheme | ||
213 | # | ||
214 | # CONFIG_BF527_SPORT0_PORTF is not set | ||
215 | CONFIG_BF527_SPORT0_PORTG=y | ||
216 | CONFIG_BF527_SPORT0_TSCLK_PG10=y | ||
217 | # CONFIG_BF527_SPORT0_TSCLK_PG14 is not set | ||
218 | CONFIG_BF527_UART1_PORTF=y | ||
219 | # CONFIG_BF527_UART1_PORTG is not set | ||
220 | # CONFIG_BF527_NAND_D_PORTF is not set | ||
221 | CONFIG_BF527_NAND_D_PORTH=y | ||
222 | |||
223 | # | ||
224 | # Interrupt Priority Assignment | ||
225 | # | ||
226 | |||
227 | # | ||
228 | # Priority | ||
229 | # | ||
230 | CONFIG_IRQ_SPI=10 | ||
208 | CONFIG_IRQ_SPI_ERROR=7 | 231 | CONFIG_IRQ_SPI_ERROR=7 |
209 | CONFIG_IRQ_NFC_ERROR=7 | 232 | CONFIG_IRQ_NFC_ERROR=7 |
210 | CONFIG_IRQ_HDMA_ERROR=7 | 233 | CONFIG_IRQ_HDMA_ERROR=7 |
@@ -226,7 +249,6 @@ CONFIG_BOOT_LOAD=0x1000 | |||
226 | # | 249 | # |
227 | CONFIG_CLKIN_HZ=25000000 | 250 | CONFIG_CLKIN_HZ=25000000 |
228 | # CONFIG_BFIN_KERNEL_CLOCK is not set | 251 | # CONFIG_BFIN_KERNEL_CLOCK is not set |
229 | CONFIG_MAX_MEM_SIZE=512 | ||
230 | CONFIG_MAX_VCO_HZ=600000000 | 252 | CONFIG_MAX_VCO_HZ=600000000 |
231 | CONFIG_MIN_VCO_HZ=50000000 | 253 | CONFIG_MIN_VCO_HZ=50000000 |
232 | CONFIG_MAX_SCLK_HZ=133333333 | 254 | CONFIG_MAX_SCLK_HZ=133333333 |
@@ -240,10 +262,10 @@ CONFIG_HZ_250=y | |||
240 | # CONFIG_HZ_300 is not set | 262 | # CONFIG_HZ_300 is not set |
241 | # CONFIG_HZ_1000 is not set | 263 | # CONFIG_HZ_1000 is not set |
242 | CONFIG_HZ=250 | 264 | CONFIG_HZ=250 |
265 | # CONFIG_SCHED_HRTICK is not set | ||
243 | CONFIG_GENERIC_TIME=y | 266 | CONFIG_GENERIC_TIME=y |
244 | CONFIG_GENERIC_CLOCKEVENTS=y | 267 | CONFIG_GENERIC_CLOCKEVENTS=y |
245 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 268 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
246 | # CONFIG_TICK_ONESHOT is not set | ||
247 | # CONFIG_NO_HZ is not set | 269 | # CONFIG_NO_HZ is not set |
248 | # CONFIG_HIGH_RES_TIMERS is not set | 270 | # CONFIG_HIGH_RES_TIMERS is not set |
249 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 271 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
@@ -277,6 +299,12 @@ CONFIG_ACCESS_OK_L1=y | |||
277 | CONFIG_CACHELINE_ALIGNED_L1=y | 299 | CONFIG_CACHELINE_ALIGNED_L1=y |
278 | # CONFIG_SYSCALL_TAB_L1 is not set | 300 | # CONFIG_SYSCALL_TAB_L1 is not set |
279 | # CONFIG_CPLB_SWITCH_TAB_L1 is not set | 301 | # CONFIG_CPLB_SWITCH_TAB_L1 is not set |
302 | CONFIG_APP_STACK_L1=y | ||
303 | |||
304 | # | ||
305 | # Speed Optimizations | ||
306 | # | ||
307 | CONFIG_BFIN_INS_LOWOVERHEAD=y | ||
280 | CONFIG_RAMKERNEL=y | 308 | CONFIG_RAMKERNEL=y |
281 | # CONFIG_ROMKERNEL is not set | 309 | # CONFIG_ROMKERNEL is not set |
282 | CONFIG_SELECT_MEMORY_MODEL=y | 310 | CONFIG_SELECT_MEMORY_MODEL=y |
@@ -285,10 +313,10 @@ CONFIG_FLATMEM_MANUAL=y | |||
285 | # CONFIG_SPARSEMEM_MANUAL is not set | 313 | # CONFIG_SPARSEMEM_MANUAL is not set |
286 | CONFIG_FLATMEM=y | 314 | CONFIG_FLATMEM=y |
287 | CONFIG_FLAT_NODE_MEM_MAP=y | 315 | CONFIG_FLAT_NODE_MEM_MAP=y |
288 | # CONFIG_SPARSEMEM_STATIC is not set | 316 | CONFIG_PAGEFLAGS_EXTENDED=y |
289 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
290 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 317 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
291 | # CONFIG_RESOURCES_64BIT is not set | 318 | # CONFIG_RESOURCES_64BIT is not set |
319 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
292 | CONFIG_ZONE_DMA_FLAG=1 | 320 | CONFIG_ZONE_DMA_FLAG=1 |
293 | CONFIG_VIRT_TO_BUS=y | 321 | CONFIG_VIRT_TO_BUS=y |
294 | CONFIG_BFIN_GPTIMERS=y | 322 | CONFIG_BFIN_GPTIMERS=y |
@@ -304,8 +332,8 @@ CONFIG_BFIN_ICACHE=y | |||
304 | CONFIG_BFIN_DCACHE=y | 332 | CONFIG_BFIN_DCACHE=y |
305 | # CONFIG_BFIN_DCACHE_BANKA is not set | 333 | # CONFIG_BFIN_DCACHE_BANKA is not set |
306 | # CONFIG_BFIN_ICACHE_LOCK is not set | 334 | # CONFIG_BFIN_ICACHE_LOCK is not set |
307 | # CONFIG_BFIN_WB is not set | 335 | CONFIG_BFIN_WB=y |
308 | CONFIG_BFIN_WT=y | 336 | # CONFIG_BFIN_WT is not set |
309 | # CONFIG_MPU is not set | 337 | # CONFIG_MPU is not set |
310 | 338 | ||
311 | # | 339 | # |
@@ -334,7 +362,6 @@ CONFIG_BANK_3=0xFFC0 | |||
334 | # | 362 | # |
335 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) | 363 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) |
336 | # | 364 | # |
337 | # CONFIG_PCI is not set | ||
338 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 365 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
339 | # CONFIG_PCCARD is not set | 366 | # CONFIG_PCCARD is not set |
340 | 367 | ||
@@ -345,25 +372,20 @@ CONFIG_BINFMT_ELF_FDPIC=y | |||
345 | CONFIG_BINFMT_FLAT=y | 372 | CONFIG_BINFMT_FLAT=y |
346 | CONFIG_BINFMT_ZFLAT=y | 373 | CONFIG_BINFMT_ZFLAT=y |
347 | # CONFIG_BINFMT_SHARED_FLAT is not set | 374 | # CONFIG_BINFMT_SHARED_FLAT is not set |
375 | # CONFIG_HAVE_AOUT is not set | ||
348 | # CONFIG_BINFMT_MISC is not set | 376 | # CONFIG_BINFMT_MISC is not set |
349 | 377 | ||
350 | # | 378 | # |
351 | # Power management options | 379 | # Power management options |
352 | # | 380 | # |
353 | # CONFIG_PM is not set | 381 | # CONFIG_PM is not set |
354 | CONFIG_SUSPEND_UP_POSSIBLE=y | 382 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
355 | # CONFIG_PM_BFIN_SLEEP_DEEPER is not set | ||
356 | # CONFIG_PM_BFIN_SLEEP is not set | ||
357 | # CONFIG_PM_WAKEUP_BY_GPIO is not set | 383 | # CONFIG_PM_WAKEUP_BY_GPIO is not set |
358 | 384 | ||
359 | # | 385 | # |
360 | # CPU Frequency scaling | 386 | # CPU Frequency scaling |
361 | # | 387 | # |
362 | # CONFIG_CPU_FREQ is not set | 388 | # CONFIG_CPU_FREQ is not set |
363 | |||
364 | # | ||
365 | # Networking | ||
366 | # | ||
367 | CONFIG_NET=y | 389 | CONFIG_NET=y |
368 | 390 | ||
369 | # | 391 | # |
@@ -376,6 +398,7 @@ CONFIG_XFRM=y | |||
376 | # CONFIG_XFRM_USER is not set | 398 | # CONFIG_XFRM_USER is not set |
377 | # CONFIG_XFRM_SUB_POLICY is not set | 399 | # CONFIG_XFRM_SUB_POLICY is not set |
378 | # CONFIG_XFRM_MIGRATE is not set | 400 | # CONFIG_XFRM_MIGRATE is not set |
401 | # CONFIG_XFRM_STATISTICS is not set | ||
379 | # CONFIG_NET_KEY is not set | 402 | # CONFIG_NET_KEY is not set |
380 | CONFIG_INET=y | 403 | CONFIG_INET=y |
381 | # CONFIG_IP_MULTICAST is not set | 404 | # CONFIG_IP_MULTICAST is not set |
@@ -405,8 +428,6 @@ CONFIG_TCP_CONG_CUBIC=y | |||
405 | CONFIG_DEFAULT_TCP_CONG="cubic" | 428 | CONFIG_DEFAULT_TCP_CONG="cubic" |
406 | # CONFIG_TCP_MD5SIG is not set | 429 | # CONFIG_TCP_MD5SIG is not set |
407 | # CONFIG_IPV6 is not set | 430 | # CONFIG_IPV6 is not set |
408 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
409 | # CONFIG_INET6_TUNNEL is not set | ||
410 | # CONFIG_NETLABEL is not set | 431 | # CONFIG_NETLABEL is not set |
411 | # CONFIG_NETWORK_SECMARK is not set | 432 | # CONFIG_NETWORK_SECMARK is not set |
412 | # CONFIG_NETFILTER is not set | 433 | # CONFIG_NETFILTER is not set |
@@ -415,6 +436,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
415 | # CONFIG_TIPC is not set | 436 | # CONFIG_TIPC is not set |
416 | # CONFIG_ATM is not set | 437 | # CONFIG_ATM is not set |
417 | # CONFIG_BRIDGE is not set | 438 | # CONFIG_BRIDGE is not set |
439 | # CONFIG_NET_DSA is not set | ||
418 | # CONFIG_VLAN_8021Q is not set | 440 | # CONFIG_VLAN_8021Q is not set |
419 | # CONFIG_DECNET is not set | 441 | # CONFIG_DECNET is not set |
420 | # CONFIG_LLC2 is not set | 442 | # CONFIG_LLC2 is not set |
@@ -431,14 +453,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
431 | # | 453 | # |
432 | # CONFIG_NET_PKTGEN is not set | 454 | # CONFIG_NET_PKTGEN is not set |
433 | # CONFIG_HAMRADIO is not set | 455 | # CONFIG_HAMRADIO is not set |
456 | # CONFIG_CAN is not set | ||
434 | # CONFIG_IRDA is not set | 457 | # CONFIG_IRDA is not set |
435 | # CONFIG_BT is not set | 458 | # CONFIG_BT is not set |
436 | # CONFIG_AF_RXRPC is not set | 459 | # CONFIG_AF_RXRPC is not set |
437 | 460 | # CONFIG_PHONET is not set | |
438 | # | 461 | CONFIG_WIRELESS=y |
439 | # Wireless | ||
440 | # | ||
441 | # CONFIG_CFG80211 is not set | 462 | # CONFIG_CFG80211 is not set |
463 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
442 | # CONFIG_WIRELESS_EXT is not set | 464 | # CONFIG_WIRELESS_EXT is not set |
443 | # CONFIG_MAC80211 is not set | 465 | # CONFIG_MAC80211 is not set |
444 | # CONFIG_IEEE80211 is not set | 466 | # CONFIG_IEEE80211 is not set |
@@ -456,6 +478,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |||
456 | CONFIG_STANDALONE=y | 478 | CONFIG_STANDALONE=y |
457 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 479 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
458 | # CONFIG_FW_LOADER is not set | 480 | # CONFIG_FW_LOADER is not set |
481 | # CONFIG_DEBUG_DRIVER is not set | ||
482 | # CONFIG_DEBUG_DEVRES is not set | ||
459 | # CONFIG_SYS_HYPERVISOR is not set | 483 | # CONFIG_SYS_HYPERVISOR is not set |
460 | # CONFIG_CONNECTOR is not set | 484 | # CONFIG_CONNECTOR is not set |
461 | CONFIG_MTD=y | 485 | CONFIG_MTD=y |
@@ -464,6 +488,7 @@ CONFIG_MTD=y | |||
464 | CONFIG_MTD_PARTITIONS=y | 488 | CONFIG_MTD_PARTITIONS=y |
465 | # CONFIG_MTD_REDBOOT_PARTS is not set | 489 | # CONFIG_MTD_REDBOOT_PARTS is not set |
466 | # CONFIG_MTD_CMDLINE_PARTS is not set | 490 | # CONFIG_MTD_CMDLINE_PARTS is not set |
491 | # CONFIG_MTD_AR7_PARTS is not set | ||
467 | 492 | ||
468 | # | 493 | # |
469 | # User Modules And Translation Layers | 494 | # User Modules And Translation Layers |
@@ -507,6 +532,7 @@ CONFIG_MTD_ROM=m | |||
507 | # | 532 | # |
508 | CONFIG_MTD_COMPLEX_MAPPINGS=y | 533 | CONFIG_MTD_COMPLEX_MAPPINGS=y |
509 | # CONFIG_MTD_PHYSMAP is not set | 534 | # CONFIG_MTD_PHYSMAP is not set |
535 | # CONFIG_MTD_GPIO_ADDR is not set | ||
510 | # CONFIG_MTD_UCLINUX is not set | 536 | # CONFIG_MTD_UCLINUX is not set |
511 | # CONFIG_MTD_PLATRAM is not set | 537 | # CONFIG_MTD_PLATRAM is not set |
512 | 538 | ||
@@ -542,10 +568,12 @@ CONFIG_BLK_DEV=y | |||
542 | CONFIG_BLK_DEV_RAM=y | 568 | CONFIG_BLK_DEV_RAM=y |
543 | CONFIG_BLK_DEV_RAM_COUNT=16 | 569 | CONFIG_BLK_DEV_RAM_COUNT=16 |
544 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 570 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
545 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | 571 | # CONFIG_BLK_DEV_XIP is not set |
546 | # CONFIG_CDROM_PKTCDVD is not set | 572 | # CONFIG_CDROM_PKTCDVD is not set |
547 | # CONFIG_ATA_OVER_ETH is not set | 573 | # CONFIG_ATA_OVER_ETH is not set |
574 | # CONFIG_BLK_DEV_HD is not set | ||
548 | # CONFIG_MISC_DEVICES is not set | 575 | # CONFIG_MISC_DEVICES is not set |
576 | CONFIG_HAVE_IDE=y | ||
549 | # CONFIG_IDE is not set | 577 | # CONFIG_IDE is not set |
550 | 578 | ||
551 | # | 579 | # |
@@ -558,7 +586,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | |||
558 | # CONFIG_ATA is not set | 586 | # CONFIG_ATA is not set |
559 | # CONFIG_MD is not set | 587 | # CONFIG_MD is not set |
560 | CONFIG_NETDEVICES=y | 588 | CONFIG_NETDEVICES=y |
561 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
562 | # CONFIG_DUMMY is not set | 589 | # CONFIG_DUMMY is not set |
563 | # CONFIG_BONDING is not set | 590 | # CONFIG_BONDING is not set |
564 | # CONFIG_MACVLAN is not set | 591 | # CONFIG_MACVLAN is not set |
@@ -579,6 +606,7 @@ CONFIG_PHYLIB=y | |||
579 | # CONFIG_SMSC_PHY is not set | 606 | # CONFIG_SMSC_PHY is not set |
580 | # CONFIG_BROADCOM_PHY is not set | 607 | # CONFIG_BROADCOM_PHY is not set |
581 | # CONFIG_ICPLUS_PHY is not set | 608 | # CONFIG_ICPLUS_PHY is not set |
609 | # CONFIG_REALTEK_PHY is not set | ||
582 | # CONFIG_FIXED_PHY is not set | 610 | # CONFIG_FIXED_PHY is not set |
583 | # CONFIG_MDIO_BITBANG is not set | 611 | # CONFIG_MDIO_BITBANG is not set |
584 | CONFIG_NET_ETHERNET=y | 612 | CONFIG_NET_ETHERNET=y |
@@ -591,11 +619,14 @@ CONFIG_BFIN_MAC_RMII=y | |||
591 | # CONFIG_SMC91X is not set | 619 | # CONFIG_SMC91X is not set |
592 | # CONFIG_SMSC911X is not set | 620 | # CONFIG_SMSC911X is not set |
593 | # CONFIG_DM9000 is not set | 621 | # CONFIG_DM9000 is not set |
622 | # CONFIG_ENC28J60 is not set | ||
594 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 623 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
595 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 624 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
596 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 625 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
597 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 626 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
598 | # CONFIG_B44 is not set | 627 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set |
628 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
629 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
599 | # CONFIG_NETDEV_1000 is not set | 630 | # CONFIG_NETDEV_1000 is not set |
600 | # CONFIG_NETDEV_10000 is not set | 631 | # CONFIG_NETDEV_10000 is not set |
601 | 632 | ||
@@ -604,6 +635,7 @@ CONFIG_BFIN_MAC_RMII=y | |||
604 | # | 635 | # |
605 | # CONFIG_WLAN_PRE80211 is not set | 636 | # CONFIG_WLAN_PRE80211 is not set |
606 | # CONFIG_WLAN_80211 is not set | 637 | # CONFIG_WLAN_80211 is not set |
638 | # CONFIG_IWLWIFI_LEDS is not set | ||
607 | 639 | ||
608 | # | 640 | # |
609 | # USB Network Adapters | 641 | # USB Network Adapters |
@@ -616,7 +648,6 @@ CONFIG_BFIN_MAC_RMII=y | |||
616 | # CONFIG_WAN is not set | 648 | # CONFIG_WAN is not set |
617 | # CONFIG_PPP is not set | 649 | # CONFIG_PPP is not set |
618 | # CONFIG_SLIP is not set | 650 | # CONFIG_SLIP is not set |
619 | # CONFIG_SHAPER is not set | ||
620 | # CONFIG_NETCONSOLE is not set | 651 | # CONFIG_NETCONSOLE is not set |
621 | # CONFIG_NETPOLL is not set | 652 | # CONFIG_NETPOLL is not set |
622 | # CONFIG_NET_POLL_CONTROLLER is not set | 653 | # CONFIG_NET_POLL_CONTROLLER is not set |
@@ -642,14 +673,15 @@ CONFIG_BFIN_MAC_RMII=y | |||
642 | # CONFIG_BF5xx_PPIFCD is not set | 673 | # CONFIG_BF5xx_PPIFCD is not set |
643 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 674 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
644 | # CONFIG_BF5xx_PPI is not set | 675 | # CONFIG_BF5xx_PPI is not set |
645 | CONFIG_BFIN_OTP=y | 676 | # CONFIG_BF5xx_EPPI is not set |
646 | # CONFIG_BFIN_OTP_WRITE_ENABLE is not set | ||
647 | # CONFIG_BFIN_SPORT is not set | 677 | # CONFIG_BFIN_SPORT is not set |
648 | # CONFIG_BFIN_TIMER_LATENCY is not set | 678 | # CONFIG_BFIN_TIMER_LATENCY is not set |
649 | # CONFIG_TWI_LCD is not set | 679 | # CONFIG_TWI_LCD is not set |
680 | CONFIG_BFIN_DMA_INTERFACE=m | ||
650 | CONFIG_SIMPLE_GPIO=m | 681 | CONFIG_SIMPLE_GPIO=m |
651 | # CONFIG_VT is not set | 682 | # CONFIG_VT is not set |
652 | # CONFIG_DEVKMEM is not set | 683 | # CONFIG_DEVKMEM is not set |
684 | # CONFIG_BFIN_JTAG_COMM is not set | ||
653 | # CONFIG_SERIAL_NONSTANDARD is not set | 685 | # CONFIG_SERIAL_NONSTANDARD is not set |
654 | 686 | ||
655 | # | 687 | # |
@@ -673,6 +705,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
673 | # CONFIG_SERIAL_BFIN_SPORT is not set | 705 | # CONFIG_SERIAL_BFIN_SPORT is not set |
674 | CONFIG_UNIX98_PTYS=y | 706 | CONFIG_UNIX98_PTYS=y |
675 | # CONFIG_LEGACY_PTYS is not set | 707 | # CONFIG_LEGACY_PTYS is not set |
708 | CONFIG_BFIN_OTP=y | ||
709 | # CONFIG_BFIN_OTP_WRITE_ENABLE is not set | ||
676 | 710 | ||
677 | # | 711 | # |
678 | # CAN, the car bus and industrial fieldbus | 712 | # CAN, the car bus and industrial fieldbus |
@@ -680,44 +714,49 @@ CONFIG_UNIX98_PTYS=y | |||
680 | # CONFIG_CAN4LINUX is not set | 714 | # CONFIG_CAN4LINUX is not set |
681 | # CONFIG_IPMI_HANDLER is not set | 715 | # CONFIG_IPMI_HANDLER is not set |
682 | # CONFIG_HW_RANDOM is not set | 716 | # CONFIG_HW_RANDOM is not set |
683 | # CONFIG_GEN_RTC is not set | ||
684 | # CONFIG_R3964 is not set | 717 | # CONFIG_R3964 is not set |
685 | # CONFIG_RAW_DRIVER is not set | 718 | # CONFIG_RAW_DRIVER is not set |
686 | # CONFIG_TCG_TPM is not set | 719 | # CONFIG_TCG_TPM is not set |
687 | CONFIG_I2C=y | 720 | CONFIG_I2C=y |
688 | CONFIG_I2C_BOARDINFO=y | 721 | CONFIG_I2C_BOARDINFO=y |
689 | CONFIG_I2C_CHARDEV=m | 722 | CONFIG_I2C_CHARDEV=m |
723 | CONFIG_I2C_HELPER_AUTO=y | ||
690 | 724 | ||
691 | # | 725 | # |
692 | # I2C Algorithms | 726 | # I2C Hardware Bus support |
693 | # | 727 | # |
694 | # CONFIG_I2C_ALGOBIT is not set | ||
695 | # CONFIG_I2C_ALGOPCF is not set | ||
696 | # CONFIG_I2C_ALGOPCA is not set | ||
697 | 728 | ||
698 | # | 729 | # |
699 | # I2C Hardware Bus support | 730 | # I2C system bus drivers (mostly embedded / system-on-chip) |
700 | # | 731 | # |
701 | CONFIG_I2C_BLACKFIN_TWI=m | 732 | CONFIG_I2C_BLACKFIN_TWI=m |
702 | CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | 733 | CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 |
703 | # CONFIG_I2C_GPIO is not set | 734 | # CONFIG_I2C_GPIO is not set |
704 | # CONFIG_I2C_OCORES is not set | 735 | # CONFIG_I2C_OCORES is not set |
705 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
706 | # CONFIG_I2C_SIMTEC is not set | 736 | # CONFIG_I2C_SIMTEC is not set |
737 | |||
738 | # | ||
739 | # External I2C/SMBus adapter drivers | ||
740 | # | ||
741 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
707 | # CONFIG_I2C_TAOS_EVM is not set | 742 | # CONFIG_I2C_TAOS_EVM is not set |
708 | # CONFIG_I2C_STUB is not set | ||
709 | # CONFIG_I2C_TINY_USB is not set | 743 | # CONFIG_I2C_TINY_USB is not set |
710 | 744 | ||
711 | # | 745 | # |
746 | # Other I2C/SMBus bus drivers | ||
747 | # | ||
748 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
749 | # CONFIG_I2C_STUB is not set | ||
750 | |||
751 | # | ||
712 | # Miscellaneous I2C Chip support | 752 | # Miscellaneous I2C Chip support |
713 | # | 753 | # |
714 | # CONFIG_SENSORS_DS1337 is not set | ||
715 | # CONFIG_SENSORS_DS1374 is not set | ||
716 | # CONFIG_DS1682 is not set | 754 | # CONFIG_DS1682 is not set |
755 | # CONFIG_AT24 is not set | ||
717 | # CONFIG_SENSORS_AD5252 is not set | 756 | # CONFIG_SENSORS_AD5252 is not set |
718 | # CONFIG_SENSORS_EEPROM is not set | 757 | # CONFIG_SENSORS_EEPROM is not set |
719 | # CONFIG_SENSORS_PCF8574 is not set | 758 | # CONFIG_SENSORS_PCF8574 is not set |
720 | # CONFIG_SENSORS_PCF8575 is not set | 759 | # CONFIG_PCF8575 is not set |
721 | # CONFIG_SENSORS_PCA9539 is not set | 760 | # CONFIG_SENSORS_PCA9539 is not set |
722 | # CONFIG_SENSORS_PCF8591 is not set | 761 | # CONFIG_SENSORS_PCF8591 is not set |
723 | # CONFIG_SENSORS_MAX6875 is not set | 762 | # CONFIG_SENSORS_MAX6875 is not set |
@@ -726,17 +765,15 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
726 | # CONFIG_I2C_DEBUG_ALGO is not set | 765 | # CONFIG_I2C_DEBUG_ALGO is not set |
727 | # CONFIG_I2C_DEBUG_BUS is not set | 766 | # CONFIG_I2C_DEBUG_BUS is not set |
728 | # CONFIG_I2C_DEBUG_CHIP is not set | 767 | # CONFIG_I2C_DEBUG_CHIP is not set |
729 | |||
730 | # | ||
731 | # SPI support | ||
732 | # | ||
733 | CONFIG_SPI=y | 768 | CONFIG_SPI=y |
769 | # CONFIG_SPI_DEBUG is not set | ||
734 | CONFIG_SPI_MASTER=y | 770 | CONFIG_SPI_MASTER=y |
735 | 771 | ||
736 | # | 772 | # |
737 | # SPI Master Controller Drivers | 773 | # SPI Master Controller Drivers |
738 | # | 774 | # |
739 | CONFIG_SPI_BFIN=y | 775 | CONFIG_SPI_BFIN=y |
776 | # CONFIG_SPI_BFIN_LOCK is not set | ||
740 | # CONFIG_SPI_BITBANG is not set | 777 | # CONFIG_SPI_BITBANG is not set |
741 | 778 | ||
742 | # | 779 | # |
@@ -745,18 +782,24 @@ CONFIG_SPI_BFIN=y | |||
745 | # CONFIG_SPI_AT25 is not set | 782 | # CONFIG_SPI_AT25 is not set |
746 | # CONFIG_SPI_SPIDEV is not set | 783 | # CONFIG_SPI_SPIDEV is not set |
747 | # CONFIG_SPI_TLE62X0 is not set | 784 | # CONFIG_SPI_TLE62X0 is not set |
785 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
786 | # CONFIG_GPIOLIB is not set | ||
748 | # CONFIG_W1 is not set | 787 | # CONFIG_W1 is not set |
749 | # CONFIG_POWER_SUPPLY is not set | 788 | # CONFIG_POWER_SUPPLY is not set |
750 | CONFIG_HWMON=y | 789 | CONFIG_HWMON=y |
751 | # CONFIG_HWMON_VID is not set | 790 | # CONFIG_HWMON_VID is not set |
791 | # CONFIG_SENSORS_AD7414 is not set | ||
752 | # CONFIG_SENSORS_AD7418 is not set | 792 | # CONFIG_SENSORS_AD7418 is not set |
793 | # CONFIG_SENSORS_ADCXX is not set | ||
753 | # CONFIG_SENSORS_ADM1021 is not set | 794 | # CONFIG_SENSORS_ADM1021 is not set |
754 | # CONFIG_SENSORS_ADM1025 is not set | 795 | # CONFIG_SENSORS_ADM1025 is not set |
755 | # CONFIG_SENSORS_ADM1026 is not set | 796 | # CONFIG_SENSORS_ADM1026 is not set |
756 | # CONFIG_SENSORS_ADM1029 is not set | 797 | # CONFIG_SENSORS_ADM1029 is not set |
757 | # CONFIG_SENSORS_ADM1031 is not set | 798 | # CONFIG_SENSORS_ADM1031 is not set |
758 | # CONFIG_SENSORS_ADM9240 is not set | 799 | # CONFIG_SENSORS_ADM9240 is not set |
800 | # CONFIG_SENSORS_ADT7462 is not set | ||
759 | # CONFIG_SENSORS_ADT7470 is not set | 801 | # CONFIG_SENSORS_ADT7470 is not set |
802 | # CONFIG_SENSORS_ADT7473 is not set | ||
760 | # CONFIG_SENSORS_ATXP1 is not set | 803 | # CONFIG_SENSORS_ATXP1 is not set |
761 | # CONFIG_SENSORS_DS1621 is not set | 804 | # CONFIG_SENSORS_DS1621 is not set |
762 | # CONFIG_SENSORS_F71805F is not set | 805 | # CONFIG_SENSORS_F71805F is not set |
@@ -777,6 +820,7 @@ CONFIG_HWMON=y | |||
777 | # CONFIG_SENSORS_LM90 is not set | 820 | # CONFIG_SENSORS_LM90 is not set |
778 | # CONFIG_SENSORS_LM92 is not set | 821 | # CONFIG_SENSORS_LM92 is not set |
779 | # CONFIG_SENSORS_LM93 is not set | 822 | # CONFIG_SENSORS_LM93 is not set |
823 | # CONFIG_SENSORS_MAX1111 is not set | ||
780 | # CONFIG_SENSORS_MAX1619 is not set | 824 | # CONFIG_SENSORS_MAX1619 is not set |
781 | # CONFIG_SENSORS_MAX6650 is not set | 825 | # CONFIG_SENSORS_MAX6650 is not set |
782 | # CONFIG_SENSORS_PC87360 is not set | 826 | # CONFIG_SENSORS_PC87360 is not set |
@@ -785,6 +829,7 @@ CONFIG_HWMON=y | |||
785 | # CONFIG_SENSORS_SMSC47M1 is not set | 829 | # CONFIG_SENSORS_SMSC47M1 is not set |
786 | # CONFIG_SENSORS_SMSC47M192 is not set | 830 | # CONFIG_SENSORS_SMSC47M192 is not set |
787 | # CONFIG_SENSORS_SMSC47B397 is not set | 831 | # CONFIG_SENSORS_SMSC47B397 is not set |
832 | # CONFIG_SENSORS_ADS7828 is not set | ||
788 | # CONFIG_SENSORS_THMC50 is not set | 833 | # CONFIG_SENSORS_THMC50 is not set |
789 | # CONFIG_SENSORS_VT1211 is not set | 834 | # CONFIG_SENSORS_VT1211 is not set |
790 | # CONFIG_SENSORS_W83781D is not set | 835 | # CONFIG_SENSORS_W83781D is not set |
@@ -792,9 +837,12 @@ CONFIG_HWMON=y | |||
792 | # CONFIG_SENSORS_W83792D is not set | 837 | # CONFIG_SENSORS_W83792D is not set |
793 | # CONFIG_SENSORS_W83793 is not set | 838 | # CONFIG_SENSORS_W83793 is not set |
794 | # CONFIG_SENSORS_W83L785TS is not set | 839 | # CONFIG_SENSORS_W83L785TS is not set |
840 | # CONFIG_SENSORS_W83L786NG is not set | ||
795 | # CONFIG_SENSORS_W83627HF is not set | 841 | # CONFIG_SENSORS_W83627HF is not set |
796 | # CONFIG_SENSORS_W83627EHF is not set | 842 | # CONFIG_SENSORS_W83627EHF is not set |
797 | # CONFIG_HWMON_DEBUG_CHIP is not set | 843 | # CONFIG_HWMON_DEBUG_CHIP is not set |
844 | # CONFIG_THERMAL is not set | ||
845 | # CONFIG_THERMAL_HWMON is not set | ||
798 | CONFIG_WATCHDOG=y | 846 | CONFIG_WATCHDOG=y |
799 | # CONFIG_WATCHDOG_NOWAYOUT is not set | 847 | # CONFIG_WATCHDOG_NOWAYOUT is not set |
800 | 848 | ||
@@ -810,21 +858,31 @@ CONFIG_BFIN_WDT=y | |||
810 | # CONFIG_USBPCWATCHDOG is not set | 858 | # CONFIG_USBPCWATCHDOG is not set |
811 | 859 | ||
812 | # | 860 | # |
813 | # Sonics Silicon Backplane | ||
814 | # | ||
815 | CONFIG_SSB_POSSIBLE=y | ||
816 | # CONFIG_SSB is not set | ||
817 | |||
818 | # | ||
819 | # Multifunction device drivers | 861 | # Multifunction device drivers |
820 | # | 862 | # |
863 | # CONFIG_MFD_CORE is not set | ||
821 | # CONFIG_MFD_SM501 is not set | 864 | # CONFIG_MFD_SM501 is not set |
865 | # CONFIG_HTC_PASIC3 is not set | ||
866 | # CONFIG_MFD_TMIO is not set | ||
867 | # CONFIG_PMIC_DA903X is not set | ||
868 | # CONFIG_MFD_WM8400 is not set | ||
869 | # CONFIG_MFD_WM8350_I2C is not set | ||
870 | # CONFIG_REGULATOR is not set | ||
822 | 871 | ||
823 | # | 872 | # |
824 | # Multimedia devices | 873 | # Multimedia devices |
825 | # | 874 | # |
875 | |||
876 | # | ||
877 | # Multimedia core support | ||
878 | # | ||
826 | # CONFIG_VIDEO_DEV is not set | 879 | # CONFIG_VIDEO_DEV is not set |
827 | # CONFIG_DVB_CORE is not set | 880 | # CONFIG_DVB_CORE is not set |
881 | # CONFIG_VIDEO_MEDIA is not set | ||
882 | |||
883 | # | ||
884 | # Multimedia drivers | ||
885 | # | ||
828 | # CONFIG_DAB is not set | 886 | # CONFIG_DAB is not set |
829 | 887 | ||
830 | # | 888 | # |
@@ -839,10 +897,6 @@ CONFIG_SSB_POSSIBLE=y | |||
839 | # Display device support | 897 | # Display device support |
840 | # | 898 | # |
841 | # CONFIG_DISPLAY_SUPPORT is not set | 899 | # CONFIG_DISPLAY_SUPPORT is not set |
842 | |||
843 | # | ||
844 | # Sound | ||
845 | # | ||
846 | # CONFIG_SOUND is not set | 900 | # CONFIG_SOUND is not set |
847 | CONFIG_USB_SUPPORT=y | 901 | CONFIG_USB_SUPPORT=y |
848 | CONFIG_USB_ARCH_HAS_HCD=y | 902 | CONFIG_USB_ARCH_HAS_HCD=y |
@@ -850,6 +904,7 @@ CONFIG_USB_ARCH_HAS_HCD=y | |||
850 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 904 | # CONFIG_USB_ARCH_HAS_EHCI is not set |
851 | CONFIG_USB=y | 905 | CONFIG_USB=y |
852 | # CONFIG_USB_DEBUG is not set | 906 | # CONFIG_USB_DEBUG is not set |
907 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
853 | 908 | ||
854 | # | 909 | # |
855 | # Miscellaneous USB options | 910 | # Miscellaneous USB options |
@@ -860,40 +915,48 @@ CONFIG_USB_DEVICE_CLASS=y | |||
860 | # CONFIG_USB_OTG is not set | 915 | # CONFIG_USB_OTG is not set |
861 | # CONFIG_USB_OTG_WHITELIST is not set | 916 | # CONFIG_USB_OTG_WHITELIST is not set |
862 | CONFIG_USB_OTG_BLACKLIST_HUB=y | 917 | CONFIG_USB_OTG_BLACKLIST_HUB=y |
918 | CONFIG_USB_MON=y | ||
919 | # CONFIG_USB_WUSB is not set | ||
920 | # CONFIG_USB_WUSB_CBAF is not set | ||
863 | 921 | ||
864 | # | 922 | # |
865 | # USB Host Controller Drivers | 923 | # USB Host Controller Drivers |
866 | # | 924 | # |
925 | # CONFIG_USB_C67X00_HCD is not set | ||
867 | # CONFIG_USB_ISP116X_HCD is not set | 926 | # CONFIG_USB_ISP116X_HCD is not set |
868 | # CONFIG_USB_ISP1362_HCD is not set | ||
869 | # CONFIG_USB_ISP1760_HCD is not set | 927 | # CONFIG_USB_ISP1760_HCD is not set |
928 | # CONFIG_USB_ISP1362_HCD is not set | ||
870 | # CONFIG_USB_SL811_HCD is not set | 929 | # CONFIG_USB_SL811_HCD is not set |
871 | # CONFIG_USB_R8A66597_HCD is not set | 930 | # CONFIG_USB_R8A66597_HCD is not set |
931 | # CONFIG_USB_HWA_HCD is not set | ||
872 | CONFIG_USB_MUSB_HDRC=y | 932 | CONFIG_USB_MUSB_HDRC=y |
873 | CONFIG_USB_MUSB_SOC=y | 933 | CONFIG_USB_MUSB_SOC=y |
874 | 934 | ||
875 | # | 935 | # |
876 | # Blackfin high speed USB support | 936 | # Blackfin high speed USB Support |
877 | # | 937 | # |
878 | CONFIG_USB_MUSB_HOST=y | 938 | CONFIG_USB_MUSB_HOST=y |
879 | # CONFIG_USB_MUSB_PERIPHERAL is not set | 939 | # CONFIG_USB_MUSB_PERIPHERAL is not set |
880 | # CONFIG_USB_MUSB_OTG is not set | 940 | # CONFIG_USB_MUSB_OTG is not set |
881 | CONFIG_USB_MUSB_HDRC_HCD=y | 941 | CONFIG_USB_MUSB_HDRC_HCD=y |
882 | CONFIG_MUSB_PIO_ONLY=y | 942 | CONFIG_MUSB_PIO_ONLY=y |
883 | CONFIG_USB_MUSB_LOGLEVEL=0 | 943 | CONFIG_MUSB_DMA_POLL=y |
944 | # CONFIG_USB_MUSB_DEBUG is not set | ||
884 | 945 | ||
885 | # | 946 | # |
886 | # USB Device Class drivers | 947 | # USB Device Class drivers |
887 | # | 948 | # |
888 | # CONFIG_USB_ACM is not set | 949 | # CONFIG_USB_ACM is not set |
889 | # CONFIG_USB_PRINTER is not set | 950 | # CONFIG_USB_PRINTER is not set |
951 | # CONFIG_USB_WDM is not set | ||
952 | # CONFIG_USB_TMC is not set | ||
890 | 953 | ||
891 | # | 954 | # |
892 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 955 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; |
893 | # | 956 | # |
894 | 957 | ||
895 | # | 958 | # |
896 | # may also be needed; see USB_STORAGE Help for more information | 959 | # see USB_STORAGE Help for more information |
897 | # | 960 | # |
898 | # CONFIG_USB_LIBUSUAL is not set | 961 | # CONFIG_USB_LIBUSUAL is not set |
899 | 962 | ||
@@ -901,15 +964,10 @@ CONFIG_USB_MUSB_LOGLEVEL=0 | |||
901 | # USB Imaging devices | 964 | # USB Imaging devices |
902 | # | 965 | # |
903 | # CONFIG_USB_MDC800 is not set | 966 | # CONFIG_USB_MDC800 is not set |
904 | CONFIG_USB_MON=y | ||
905 | 967 | ||
906 | # | 968 | # |
907 | # USB port drivers | 969 | # USB port drivers |
908 | # | 970 | # |
909 | |||
910 | # | ||
911 | # USB Serial Converter support | ||
912 | # | ||
913 | # CONFIG_USB_SERIAL is not set | 971 | # CONFIG_USB_SERIAL is not set |
914 | 972 | ||
915 | # | 973 | # |
@@ -918,7 +976,7 @@ CONFIG_USB_MON=y | |||
918 | # CONFIG_USB_EMI62 is not set | 976 | # CONFIG_USB_EMI62 is not set |
919 | # CONFIG_USB_EMI26 is not set | 977 | # CONFIG_USB_EMI26 is not set |
920 | # CONFIG_USB_ADUTUX is not set | 978 | # CONFIG_USB_ADUTUX is not set |
921 | # CONFIG_USB_AUERSWALD is not set | 979 | # CONFIG_USB_SEVSEG is not set |
922 | # CONFIG_USB_RIO500 is not set | 980 | # CONFIG_USB_RIO500 is not set |
923 | # CONFIG_USB_LEGOTOWER is not set | 981 | # CONFIG_USB_LEGOTOWER is not set |
924 | # CONFIG_USB_LCD is not set | 982 | # CONFIG_USB_LCD is not set |
@@ -934,17 +992,13 @@ CONFIG_USB_MON=y | |||
934 | # CONFIG_USB_LD is not set | 992 | # CONFIG_USB_LD is not set |
935 | # CONFIG_USB_TRANCEVIBRATOR is not set | 993 | # CONFIG_USB_TRANCEVIBRATOR is not set |
936 | # CONFIG_USB_IOWARRIOR is not set | 994 | # CONFIG_USB_IOWARRIOR is not set |
937 | 995 | # CONFIG_USB_ISIGHTFW is not set | |
938 | # | 996 | # CONFIG_USB_VST is not set |
939 | # USB DSL modem support | ||
940 | # | ||
941 | |||
942 | # | ||
943 | # USB Gadget Support | ||
944 | # | ||
945 | # CONFIG_USB_GADGET is not set | 997 | # CONFIG_USB_GADGET is not set |
946 | # CONFIG_MMC is not set | 998 | # CONFIG_MMC is not set |
999 | # CONFIG_MEMSTICK is not set | ||
947 | # CONFIG_NEW_LEDS is not set | 1000 | # CONFIG_NEW_LEDS is not set |
1001 | # CONFIG_ACCESSIBILITY is not set | ||
948 | CONFIG_RTC_LIB=y | 1002 | CONFIG_RTC_LIB=y |
949 | CONFIG_RTC_CLASS=y | 1003 | CONFIG_RTC_CLASS=y |
950 | CONFIG_RTC_HCTOSYS=y | 1004 | CONFIG_RTC_HCTOSYS=y |
@@ -973,51 +1027,59 @@ CONFIG_RTC_INTF_DEV=y | |||
973 | # CONFIG_RTC_DRV_PCF8563 is not set | 1027 | # CONFIG_RTC_DRV_PCF8563 is not set |
974 | # CONFIG_RTC_DRV_PCF8583 is not set | 1028 | # CONFIG_RTC_DRV_PCF8583 is not set |
975 | # CONFIG_RTC_DRV_M41T80 is not set | 1029 | # CONFIG_RTC_DRV_M41T80 is not set |
1030 | # CONFIG_RTC_DRV_S35390A is not set | ||
1031 | # CONFIG_RTC_DRV_FM3130 is not set | ||
1032 | # CONFIG_RTC_DRV_RX8581 is not set | ||
976 | 1033 | ||
977 | # | 1034 | # |
978 | # SPI RTC drivers | 1035 | # SPI RTC drivers |
979 | # | 1036 | # |
980 | # CONFIG_RTC_DRV_RS5C348 is not set | 1037 | # CONFIG_RTC_DRV_M41T94 is not set |
1038 | # CONFIG_RTC_DRV_DS1305 is not set | ||
1039 | # CONFIG_RTC_DRV_DS1390 is not set | ||
981 | # CONFIG_RTC_DRV_MAX6902 is not set | 1040 | # CONFIG_RTC_DRV_MAX6902 is not set |
1041 | # CONFIG_RTC_DRV_R9701 is not set | ||
1042 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
1043 | # CONFIG_RTC_DRV_DS3234 is not set | ||
982 | 1044 | ||
983 | # | 1045 | # |
984 | # Platform RTC drivers | 1046 | # Platform RTC drivers |
985 | # | 1047 | # |
1048 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1049 | # CONFIG_RTC_DRV_DS1511 is not set | ||
986 | # CONFIG_RTC_DRV_DS1553 is not set | 1050 | # CONFIG_RTC_DRV_DS1553 is not set |
987 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
988 | # CONFIG_RTC_DRV_DS1742 is not set | 1051 | # CONFIG_RTC_DRV_DS1742 is not set |
1052 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
989 | # CONFIG_RTC_DRV_M48T86 is not set | 1053 | # CONFIG_RTC_DRV_M48T86 is not set |
1054 | # CONFIG_RTC_DRV_M48T35 is not set | ||
990 | # CONFIG_RTC_DRV_M48T59 is not set | 1055 | # CONFIG_RTC_DRV_M48T59 is not set |
1056 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
991 | # CONFIG_RTC_DRV_V3020 is not set | 1057 | # CONFIG_RTC_DRV_V3020 is not set |
992 | 1058 | ||
993 | # | 1059 | # |
994 | # on-CPU RTC drivers | 1060 | # on-CPU RTC drivers |
995 | # | 1061 | # |
996 | CONFIG_RTC_DRV_BFIN=y | 1062 | CONFIG_RTC_DRV_BFIN=y |
997 | 1063 | # CONFIG_DMADEVICES is not set | |
998 | # | ||
999 | # Userspace I/O | ||
1000 | # | ||
1001 | # CONFIG_UIO is not set | 1064 | # CONFIG_UIO is not set |
1065 | # CONFIG_STAGING is not set | ||
1002 | 1066 | ||
1003 | # | 1067 | # |
1004 | # File systems | 1068 | # File systems |
1005 | # | 1069 | # |
1006 | # CONFIG_EXT2_FS is not set | 1070 | # CONFIG_EXT2_FS is not set |
1007 | # CONFIG_EXT3_FS is not set | 1071 | # CONFIG_EXT3_FS is not set |
1008 | # CONFIG_EXT4DEV_FS is not set | 1072 | # CONFIG_EXT4_FS is not set |
1009 | # CONFIG_REISERFS_FS is not set | 1073 | # CONFIG_REISERFS_FS is not set |
1010 | # CONFIG_JFS_FS is not set | 1074 | # CONFIG_JFS_FS is not set |
1011 | # CONFIG_FS_POSIX_ACL is not set | 1075 | # CONFIG_FS_POSIX_ACL is not set |
1076 | CONFIG_FILE_LOCKING=y | ||
1012 | # CONFIG_XFS_FS is not set | 1077 | # CONFIG_XFS_FS is not set |
1013 | # CONFIG_GFS2_FS is not set | ||
1014 | # CONFIG_OCFS2_FS is not set | 1078 | # CONFIG_OCFS2_FS is not set |
1015 | # CONFIG_MINIX_FS is not set | 1079 | # CONFIG_DNOTIFY is not set |
1016 | # CONFIG_ROMFS_FS is not set | ||
1017 | CONFIG_INOTIFY=y | 1080 | CONFIG_INOTIFY=y |
1018 | CONFIG_INOTIFY_USER=y | 1081 | CONFIG_INOTIFY_USER=y |
1019 | # CONFIG_QUOTA is not set | 1082 | # CONFIG_QUOTA is not set |
1020 | # CONFIG_DNOTIFY is not set | ||
1021 | # CONFIG_AUTOFS_FS is not set | 1083 | # CONFIG_AUTOFS_FS is not set |
1022 | # CONFIG_AUTOFS4_FS is not set | 1084 | # CONFIG_AUTOFS4_FS is not set |
1023 | # CONFIG_FUSE_FS is not set | 1085 | # CONFIG_FUSE_FS is not set |
@@ -1059,8 +1121,11 @@ CONFIG_SYSFS=y | |||
1059 | # CONFIG_JFFS2_FS is not set | 1121 | # CONFIG_JFFS2_FS is not set |
1060 | # CONFIG_CRAMFS is not set | 1122 | # CONFIG_CRAMFS is not set |
1061 | # CONFIG_VXFS_FS is not set | 1123 | # CONFIG_VXFS_FS is not set |
1124 | # CONFIG_MINIX_FS is not set | ||
1125 | # CONFIG_OMFS_FS is not set | ||
1062 | # CONFIG_HPFS_FS is not set | 1126 | # CONFIG_HPFS_FS is not set |
1063 | # CONFIG_QNX4FS_FS is not set | 1127 | # CONFIG_QNX4FS_FS is not set |
1128 | # CONFIG_ROMFS_FS is not set | ||
1064 | # CONFIG_SYSV_FS is not set | 1129 | # CONFIG_SYSV_FS is not set |
1065 | # CONFIG_UFS_FS is not set | 1130 | # CONFIG_UFS_FS is not set |
1066 | CONFIG_NETWORK_FILESYSTEMS=y | 1131 | CONFIG_NETWORK_FILESYSTEMS=y |
@@ -1068,13 +1133,12 @@ CONFIG_NFS_FS=m | |||
1068 | CONFIG_NFS_V3=y | 1133 | CONFIG_NFS_V3=y |
1069 | # CONFIG_NFS_V3_ACL is not set | 1134 | # CONFIG_NFS_V3_ACL is not set |
1070 | # CONFIG_NFS_V4 is not set | 1135 | # CONFIG_NFS_V4 is not set |
1071 | # CONFIG_NFS_DIRECTIO is not set | ||
1072 | # CONFIG_NFSD is not set | 1136 | # CONFIG_NFSD is not set |
1073 | CONFIG_LOCKD=m | 1137 | CONFIG_LOCKD=m |
1074 | CONFIG_LOCKD_V4=y | 1138 | CONFIG_LOCKD_V4=y |
1075 | CONFIG_NFS_COMMON=y | 1139 | CONFIG_NFS_COMMON=y |
1076 | CONFIG_SUNRPC=m | 1140 | CONFIG_SUNRPC=m |
1077 | # CONFIG_SUNRPC_BIND34 is not set | 1141 | # CONFIG_SUNRPC_REGISTER_V4 is not set |
1078 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 1142 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
1079 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1143 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
1080 | CONFIG_SMB_FS=m | 1144 | CONFIG_SMB_FS=m |
@@ -1130,7 +1194,6 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
1130 | # CONFIG_NLS_KOI8_U is not set | 1194 | # CONFIG_NLS_KOI8_U is not set |
1131 | # CONFIG_NLS_UTF8 is not set | 1195 | # CONFIG_NLS_UTF8 is not set |
1132 | # CONFIG_DLM is not set | 1196 | # CONFIG_DLM is not set |
1133 | # CONFIG_INSTRUMENTATION is not set | ||
1134 | 1197 | ||
1135 | # | 1198 | # |
1136 | # Kernel hacking | 1199 | # Kernel hacking |
@@ -1138,14 +1201,61 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
1138 | # CONFIG_PRINTK_TIME is not set | 1201 | # CONFIG_PRINTK_TIME is not set |
1139 | CONFIG_ENABLE_WARN_DEPRECATED=y | 1202 | CONFIG_ENABLE_WARN_DEPRECATED=y |
1140 | CONFIG_ENABLE_MUST_CHECK=y | 1203 | CONFIG_ENABLE_MUST_CHECK=y |
1204 | CONFIG_FRAME_WARN=1024 | ||
1141 | # CONFIG_MAGIC_SYSRQ is not set | 1205 | # CONFIG_MAGIC_SYSRQ is not set |
1142 | # CONFIG_UNUSED_SYMBOLS is not set | 1206 | # CONFIG_UNUSED_SYMBOLS is not set |
1143 | CONFIG_DEBUG_FS=y | 1207 | CONFIG_DEBUG_FS=y |
1144 | # CONFIG_HEADERS_CHECK is not set | 1208 | # CONFIG_HEADERS_CHECK is not set |
1145 | # CONFIG_DEBUG_KERNEL is not set | 1209 | CONFIG_DEBUG_KERNEL=y |
1210 | # CONFIG_DEBUG_SHIRQ is not set | ||
1211 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1212 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
1213 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
1214 | # CONFIG_SCHED_DEBUG is not set | ||
1215 | # CONFIG_SCHEDSTATS is not set | ||
1216 | # CONFIG_TIMER_STATS is not set | ||
1217 | # CONFIG_DEBUG_OBJECTS is not set | ||
1218 | # CONFIG_DEBUG_SLAB is not set | ||
1219 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1220 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1221 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1222 | # CONFIG_DEBUG_MUTEXES is not set | ||
1223 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1224 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1225 | # CONFIG_DEBUG_KOBJECT is not set | ||
1146 | # CONFIG_DEBUG_BUGVERBOSE is not set | 1226 | # CONFIG_DEBUG_BUGVERBOSE is not set |
1227 | # CONFIG_DEBUG_INFO is not set | ||
1228 | # CONFIG_DEBUG_VM is not set | ||
1229 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1230 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1231 | # CONFIG_DEBUG_LIST is not set | ||
1232 | # CONFIG_DEBUG_SG is not set | ||
1233 | # CONFIG_FRAME_POINTER is not set | ||
1234 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1235 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1236 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1237 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1238 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1239 | # CONFIG_FAULT_INJECTION is not set | ||
1240 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
1241 | |||
1242 | # | ||
1243 | # Tracers | ||
1244 | # | ||
1245 | # CONFIG_SCHED_TRACER is not set | ||
1246 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
1247 | # CONFIG_BOOT_TRACER is not set | ||
1248 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
1147 | # CONFIG_SAMPLES is not set | 1249 | # CONFIG_SAMPLES is not set |
1250 | CONFIG_HAVE_ARCH_KGDB=y | ||
1251 | # CONFIG_KGDB is not set | ||
1252 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
1253 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1254 | # CONFIG_KGDB_TESTCASE is not set | ||
1255 | CONFIG_DEBUG_VERBOSE=y | ||
1148 | CONFIG_DEBUG_MMRS=y | 1256 | CONFIG_DEBUG_MMRS=y |
1257 | # CONFIG_DEBUG_HWERR is not set | ||
1258 | # CONFIG_DEBUG_DOUBLEFAULT is not set | ||
1149 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1259 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
1150 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1260 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
1151 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1261 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y |
@@ -1154,7 +1264,7 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | |||
1154 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1264 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 |
1155 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1265 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
1156 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1266 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set |
1157 | CONFIG_EARLY_PRINTK=y | 1267 | # CONFIG_EARLY_PRINTK is not set |
1158 | # CONFIG_CPLB_INFO is not set | 1268 | # CONFIG_CPLB_INFO is not set |
1159 | CONFIG_ACCESS_CHECK=y | 1269 | CONFIG_ACCESS_CHECK=y |
1160 | 1270 | ||
@@ -1163,10 +1273,96 @@ CONFIG_ACCESS_CHECK=y | |||
1163 | # | 1273 | # |
1164 | # CONFIG_KEYS is not set | 1274 | # CONFIG_KEYS is not set |
1165 | CONFIG_SECURITY=y | 1275 | CONFIG_SECURITY=y |
1276 | # CONFIG_SECURITYFS is not set | ||
1166 | # CONFIG_SECURITY_NETWORK is not set | 1277 | # CONFIG_SECURITY_NETWORK is not set |
1167 | # CONFIG_SECURITY_CAPABILITIES is not set | 1278 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
1168 | # CONFIG_SECURITY_ROOTPLUG is not set | 1279 | # CONFIG_SECURITY_ROOTPLUG is not set |
1169 | # CONFIG_CRYPTO is not set | 1280 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 |
1281 | CONFIG_CRYPTO=y | ||
1282 | |||
1283 | # | ||
1284 | # Crypto core or helper | ||
1285 | # | ||
1286 | # CONFIG_CRYPTO_FIPS is not set | ||
1287 | # CONFIG_CRYPTO_MANAGER is not set | ||
1288 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
1289 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1290 | # CONFIG_CRYPTO_NULL is not set | ||
1291 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1292 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1293 | # CONFIG_CRYPTO_TEST is not set | ||
1294 | |||
1295 | # | ||
1296 | # Authenticated Encryption with Associated Data | ||
1297 | # | ||
1298 | # CONFIG_CRYPTO_CCM is not set | ||
1299 | # CONFIG_CRYPTO_GCM is not set | ||
1300 | # CONFIG_CRYPTO_SEQIV is not set | ||
1301 | |||
1302 | # | ||
1303 | # Block modes | ||
1304 | # | ||
1305 | # CONFIG_CRYPTO_CBC is not set | ||
1306 | # CONFIG_CRYPTO_CTR is not set | ||
1307 | # CONFIG_CRYPTO_CTS is not set | ||
1308 | # CONFIG_CRYPTO_ECB is not set | ||
1309 | # CONFIG_CRYPTO_LRW is not set | ||
1310 | # CONFIG_CRYPTO_PCBC is not set | ||
1311 | # CONFIG_CRYPTO_XTS is not set | ||
1312 | |||
1313 | # | ||
1314 | # Hash modes | ||
1315 | # | ||
1316 | # CONFIG_CRYPTO_HMAC is not set | ||
1317 | # CONFIG_CRYPTO_XCBC is not set | ||
1318 | |||
1319 | # | ||
1320 | # Digest | ||
1321 | # | ||
1322 | # CONFIG_CRYPTO_CRC32C is not set | ||
1323 | # CONFIG_CRYPTO_MD4 is not set | ||
1324 | # CONFIG_CRYPTO_MD5 is not set | ||
1325 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1326 | # CONFIG_CRYPTO_RMD128 is not set | ||
1327 | # CONFIG_CRYPTO_RMD160 is not set | ||
1328 | # CONFIG_CRYPTO_RMD256 is not set | ||
1329 | # CONFIG_CRYPTO_RMD320 is not set | ||
1330 | # CONFIG_CRYPTO_SHA1 is not set | ||
1331 | # CONFIG_CRYPTO_SHA256 is not set | ||
1332 | # CONFIG_CRYPTO_SHA512 is not set | ||
1333 | # CONFIG_CRYPTO_TGR192 is not set | ||
1334 | # CONFIG_CRYPTO_WP512 is not set | ||
1335 | |||
1336 | # | ||
1337 | # Ciphers | ||
1338 | # | ||
1339 | # CONFIG_CRYPTO_AES is not set | ||
1340 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1341 | # CONFIG_CRYPTO_ARC4 is not set | ||
1342 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1343 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1344 | # CONFIG_CRYPTO_CAST5 is not set | ||
1345 | # CONFIG_CRYPTO_CAST6 is not set | ||
1346 | # CONFIG_CRYPTO_DES is not set | ||
1347 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1348 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1349 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1350 | # CONFIG_CRYPTO_SEED is not set | ||
1351 | # CONFIG_CRYPTO_SERPENT is not set | ||
1352 | # CONFIG_CRYPTO_TEA is not set | ||
1353 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1354 | |||
1355 | # | ||
1356 | # Compression | ||
1357 | # | ||
1358 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1359 | # CONFIG_CRYPTO_LZO is not set | ||
1360 | |||
1361 | # | ||
1362 | # Random Number Generation | ||
1363 | # | ||
1364 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1365 | CONFIG_CRYPTO_HW=y | ||
1170 | 1366 | ||
1171 | # | 1367 | # |
1172 | # Library routines | 1368 | # Library routines |
@@ -1174,6 +1370,7 @@ CONFIG_SECURITY=y | |||
1174 | CONFIG_BITREVERSE=y | 1370 | CONFIG_BITREVERSE=y |
1175 | CONFIG_CRC_CCITT=m | 1371 | CONFIG_CRC_CCITT=m |
1176 | # CONFIG_CRC16 is not set | 1372 | # CONFIG_CRC16 is not set |
1373 | # CONFIG_CRC_T10DIF is not set | ||
1177 | # CONFIG_CRC_ITU_T is not set | 1374 | # CONFIG_CRC_ITU_T is not set |
1178 | CONFIG_CRC32=y | 1375 | CONFIG_CRC32=y |
1179 | # CONFIG_CRC7 is not set | 1376 | # CONFIG_CRC7 is not set |
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig index efd68bc78f35..f410430b4e3d 100644 --- a/arch/blackfin/configs/CM-BF548_defconfig +++ b/arch/blackfin/configs/CM-BF548_defconfig | |||
@@ -336,8 +336,8 @@ CONFIG_BFIN_ICACHE=y | |||
336 | CONFIG_BFIN_DCACHE=y | 336 | CONFIG_BFIN_DCACHE=y |
337 | # CONFIG_BFIN_DCACHE_BANKA is not set | 337 | # CONFIG_BFIN_DCACHE_BANKA is not set |
338 | # CONFIG_BFIN_ICACHE_LOCK is not set | 338 | # CONFIG_BFIN_ICACHE_LOCK is not set |
339 | # CONFIG_BFIN_WB is not set | 339 | CONFIG_BFIN_WB=y |
340 | CONFIG_BFIN_WT=y | 340 | # CONFIG_BFIN_WT is not set |
341 | CONFIG_L1_MAX_PIECE=16 | 341 | CONFIG_L1_MAX_PIECE=16 |
342 | # CONFIG_MPU is not set | 342 | # CONFIG_MPU is not set |
343 | 343 | ||
@@ -595,7 +595,7 @@ CONFIG_SCSI=y | |||
595 | CONFIG_SCSI_DMA=y | 595 | CONFIG_SCSI_DMA=y |
596 | # CONFIG_SCSI_TGT is not set | 596 | # CONFIG_SCSI_TGT is not set |
597 | # CONFIG_SCSI_NETLINK is not set | 597 | # CONFIG_SCSI_NETLINK is not set |
598 | CONFIG_SCSI_PROC_FS=y | 598 | # CONFIG_SCSI_PROC_FS is not set |
599 | 599 | ||
600 | # | 600 | # |
601 | # SCSI support type (disk, tape, CD-ROM) | 601 | # SCSI support type (disk, tape, CD-ROM) |
@@ -798,7 +798,7 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
798 | # CONFIG_SENSORS_DS1374 is not set | 798 | # CONFIG_SENSORS_DS1374 is not set |
799 | # CONFIG_DS1682 is not set | 799 | # CONFIG_DS1682 is not set |
800 | # CONFIG_SENSORS_AD5252 is not set | 800 | # CONFIG_SENSORS_AD5252 is not set |
801 | # CONFIG_SENSORS_EEPROM is not set | 801 | # CONFIG_EEPROM_LEGACY is not set |
802 | # CONFIG_SENSORS_PCF8574 is not set | 802 | # CONFIG_SENSORS_PCF8574 is not set |
803 | # CONFIG_SENSORS_PCF8575 is not set | 803 | # CONFIG_SENSORS_PCF8575 is not set |
804 | # CONFIG_SENSORS_PCA9543 is not set | 804 | # CONFIG_SENSORS_PCA9543 is not set |
@@ -826,7 +826,7 @@ CONFIG_SPI_BFIN=y | |||
826 | # | 826 | # |
827 | # SPI Protocol Masters | 827 | # SPI Protocol Masters |
828 | # | 828 | # |
829 | # CONFIG_SPI_AT25 is not set | 829 | # CONFIG_EEPROM_AT25 is not set |
830 | # CONFIG_SPI_SPIDEV is not set | 830 | # CONFIG_SPI_SPIDEV is not set |
831 | # CONFIG_SPI_TLE62X0 is not set | 831 | # CONFIG_SPI_TLE62X0 is not set |
832 | # CONFIG_W1 is not set | 832 | # CONFIG_W1 is not set |
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig index 5d3901d23fd1..bd553da15db8 100644 --- a/arch/blackfin/configs/H8606_defconfig +++ b/arch/blackfin/configs/H8606_defconfig | |||
@@ -750,7 +750,7 @@ CONFIG_SPI_BFIN=y | |||
750 | # | 750 | # |
751 | # SPI Protocol Masters | 751 | # SPI Protocol Masters |
752 | # | 752 | # |
753 | CONFIG_SPI_AT25=y | 753 | CONFIG_EEPROM_AT25=y |
754 | CONFIG_SPI_SPIDEV=y | 754 | CONFIG_SPI_SPIDEV=y |
755 | 755 | ||
756 | # | 756 | # |
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig index e66f5daaa828..7db93874c987 100644 --- a/arch/blackfin/configs/IP0X_defconfig +++ b/arch/blackfin/configs/IP0X_defconfig | |||
@@ -612,7 +612,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | |||
612 | CONFIG_SCSI=y | 612 | CONFIG_SCSI=y |
613 | # CONFIG_SCSI_TGT is not set | 613 | # CONFIG_SCSI_TGT is not set |
614 | # CONFIG_SCSI_NETLINK is not set | 614 | # CONFIG_SCSI_NETLINK is not set |
615 | CONFIG_SCSI_PROC_FS=y | 615 | # CONFIG_SCSI_PROC_FS is not set |
616 | 616 | ||
617 | # | 617 | # |
618 | # SCSI support type (disk, tape, CD-ROM) | 618 | # SCSI support type (disk, tape, CD-ROM) |
@@ -803,7 +803,7 @@ CONFIG_SPI_BFIN=y | |||
803 | # | 803 | # |
804 | # SPI Protocol Masters | 804 | # SPI Protocol Masters |
805 | # | 805 | # |
806 | # CONFIG_SPI_AT25 is not set | 806 | # CONFIG_EEPROM_AT25 is not set |
807 | # CONFIG_SPI_SPIDEV is not set | 807 | # CONFIG_SPI_SPIDEV is not set |
808 | 808 | ||
809 | # | 809 | # |
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig index ce5dde9de9db..ad096702ac16 100644 --- a/arch/blackfin/configs/PNAV-10_defconfig +++ b/arch/blackfin/configs/PNAV-10_defconfig | |||
@@ -755,9 +755,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
755 | # Miscellaneous I2C Chip support | 755 | # Miscellaneous I2C Chip support |
756 | # | 756 | # |
757 | # CONFIG_DS1682 is not set | 757 | # CONFIG_DS1682 is not set |
758 | # CONFIG_AT24 is not set | 758 | # CONFIG_EEPROM_AT24 is not set |
759 | # CONFIG_SENSORS_AD5252 is not set | 759 | # CONFIG_SENSORS_AD5252 is not set |
760 | # CONFIG_SENSORS_EEPROM is not set | 760 | # CONFIG_EEPROM_LEGACY is not set |
761 | CONFIG_SENSORS_PCF8574=m | 761 | CONFIG_SENSORS_PCF8574=m |
762 | # CONFIG_PCF8575 is not set | 762 | # CONFIG_PCF8575 is not set |
763 | # CONFIG_SENSORS_PCA9539 is not set | 763 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -781,7 +781,7 @@ CONFIG_SPI_BFIN=y | |||
781 | # | 781 | # |
782 | # SPI Protocol Masters | 782 | # SPI Protocol Masters |
783 | # | 783 | # |
784 | # CONFIG_SPI_AT25 is not set | 784 | # CONFIG_EEPROM_AT25 is not set |
785 | # CONFIG_SPI_SPIDEV is not set | 785 | # CONFIG_SPI_SPIDEV is not set |
786 | # CONFIG_SPI_TLE62X0 is not set | 786 | # CONFIG_SPI_TLE62X0 is not set |
787 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 787 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig index 7c8250d6fa66..a46529c6ade3 100644 --- a/arch/blackfin/configs/SRV1_defconfig +++ b/arch/blackfin/configs/SRV1_defconfig | |||
@@ -282,8 +282,8 @@ CONFIG_BFIN_ICACHE=y | |||
282 | CONFIG_BFIN_DCACHE=y | 282 | CONFIG_BFIN_DCACHE=y |
283 | # CONFIG_BFIN_DCACHE_BANKA is not set | 283 | # CONFIG_BFIN_DCACHE_BANKA is not set |
284 | # CONFIG_BFIN_ICACHE_LOCK is not set | 284 | # CONFIG_BFIN_ICACHE_LOCK is not set |
285 | # CONFIG_BFIN_WB is not set | 285 | CONFIG_BFIN_WB=y |
286 | CONFIG_BFIN_WT=y | 286 | # CONFIG_BFIN_WT is not set |
287 | CONFIG_L1_MAX_PIECE=16 | 287 | CONFIG_L1_MAX_PIECE=16 |
288 | 288 | ||
289 | # | 289 | # |
@@ -798,7 +798,7 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
798 | # CONFIG_SENSORS_DS1337 is not set | 798 | # CONFIG_SENSORS_DS1337 is not set |
799 | # CONFIG_SENSORS_DS1374 is not set | 799 | # CONFIG_SENSORS_DS1374 is not set |
800 | # CONFIG_SENSORS_AD5252 is not set | 800 | # CONFIG_SENSORS_AD5252 is not set |
801 | # CONFIG_SENSORS_EEPROM is not set | 801 | # CONFIG_EEPROM_LEGACY is not set |
802 | # CONFIG_SENSORS_PCF8574 is not set | 802 | # CONFIG_SENSORS_PCF8574 is not set |
803 | # CONFIG_SENSORS_PCF8575 is not set | 803 | # CONFIG_SENSORS_PCF8575 is not set |
804 | # CONFIG_SENSORS_PCA9543 is not set | 804 | # CONFIG_SENSORS_PCA9543 is not set |
@@ -826,7 +826,7 @@ CONFIG_SPI_BFIN=y | |||
826 | # | 826 | # |
827 | # SPI Protocol Masters | 827 | # SPI Protocol Masters |
828 | # | 828 | # |
829 | CONFIG_SPI_AT25=m | 829 | CONFIG_EEPROM_AT25=m |
830 | # CONFIG_SPI_SPIDEV is not set | 830 | # CONFIG_SPI_SPIDEV is not set |
831 | 831 | ||
832 | # | 832 | # |
diff --git a/arch/blackfin/configs/TCM-BF537_defconfig b/arch/blackfin/configs/TCM-BF537_defconfig index 9af522c7dadf..97a1f1d20dcf 100644 --- a/arch/blackfin/configs/TCM-BF537_defconfig +++ b/arch/blackfin/configs/TCM-BF537_defconfig | |||
@@ -533,7 +533,7 @@ CONFIG_SPI_BFIN=y | |||
533 | # | 533 | # |
534 | # SPI Protocol Masters | 534 | # SPI Protocol Masters |
535 | # | 535 | # |
536 | # CONFIG_SPI_AT25 is not set | 536 | # CONFIG_EEPROM_AT25 is not set |
537 | # CONFIG_SPI_SPIDEV is not set | 537 | # CONFIG_SPI_SPIDEV is not set |
538 | # CONFIG_SPI_TLE62X0 is not set | 538 | # CONFIG_SPI_TLE62X0 is not set |
539 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 539 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild index d0d1ac435544..09c31418cc08 100644 --- a/arch/blackfin/include/asm/Kbuild +++ b/arch/blackfin/include/asm/Kbuild | |||
@@ -1,4 +1,4 @@ | |||
1 | include include/asm-generic/Kbuild.asm | 1 | include include/asm-generic/Kbuild.asm |
2 | 2 | ||
3 | unifdef-y += bfin_sport.h | ||
3 | unifdef-y += fixed_code.h | 4 | unifdef-y += fixed_code.h |
4 | unifdef-y += swab.h | ||
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h index fe88a2c19213..65a651db5b07 100644 --- a/arch/blackfin/include/asm/bfin_sport.h +++ b/arch/blackfin/include/asm/bfin_sport.h | |||
@@ -1,30 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * File: include/asm-blackfin/bfin_sport.h | 2 | * bfin_sport.h - userspace header for bfin sport driver |
3 | * Based on: | ||
4 | * Author: Roy Huang (roy.huang@analog.com) | ||
5 | * | 3 | * |
6 | * Created: Thu Aug. 24 2006 | 4 | * Copyright 2004-2008 Analog Devices Inc. |
7 | * Description: | ||
8 | * | 5 | * |
9 | * Modified: | 6 | * Licensed under the GPL-2 or later. |
10 | * Copyright 2004-2006 Analog Devices Inc. | ||
11 | * | ||
12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, see the file COPYING, or write | ||
26 | * to the Free Software Foundation, Inc., | ||
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
28 | */ | 7 | */ |
29 | 8 | ||
30 | #ifndef __BFIN_SPORT_H__ | 9 | #ifndef __BFIN_SPORT_H__ |
@@ -42,11 +21,10 @@ | |||
42 | #define NORM_FORMAT 0x0 | 21 | #define NORM_FORMAT 0x0 |
43 | #define ALAW_FORMAT 0x2 | 22 | #define ALAW_FORMAT 0x2 |
44 | #define ULAW_FORMAT 0x3 | 23 | #define ULAW_FORMAT 0x3 |
45 | struct sport_register; | ||
46 | 24 | ||
47 | /* Function driver which use sport must initialize the structure */ | 25 | /* Function driver which use sport must initialize the structure */ |
48 | struct sport_config { | 26 | struct sport_config { |
49 | /*TDM (multichannels), I2S or other mode */ | 27 | /* TDM (multichannels), I2S or other mode */ |
50 | unsigned int mode:3; | 28 | unsigned int mode:3; |
51 | 29 | ||
52 | /* if TDM mode is selected, channels must be set */ | 30 | /* if TDM mode is selected, channels must be set */ |
@@ -72,12 +50,18 @@ struct sport_config { | |||
72 | int serial_clk; | 50 | int serial_clk; |
73 | int fsync_clk; | 51 | int fsync_clk; |
74 | 52 | ||
75 | unsigned int data_format:2; /*Normal, u-law or a-law */ | 53 | unsigned int data_format:2; /* Normal, u-law or a-law */ |
76 | 54 | ||
77 | int word_len; /* How length of the word in bits, 3-32 bits */ | 55 | int word_len; /* How length of the word in bits, 3-32 bits */ |
78 | int dma_enabled; | 56 | int dma_enabled; |
79 | }; | 57 | }; |
80 | 58 | ||
59 | /* Userspace interface */ | ||
60 | #define SPORT_IOC_MAGIC 'P' | ||
61 | #define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config) | ||
62 | |||
63 | #ifdef __KERNEL__ | ||
64 | |||
81 | struct sport_register { | 65 | struct sport_register { |
82 | unsigned short tcr1; | 66 | unsigned short tcr1; |
83 | unsigned short reserved0; | 67 | unsigned short reserved0; |
@@ -117,9 +101,6 @@ struct sport_register { | |||
117 | unsigned long mrcs3; | 101 | unsigned long mrcs3; |
118 | }; | 102 | }; |
119 | 103 | ||
120 | #define SPORT_IOC_MAGIC 'P' | ||
121 | #define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config) | ||
122 | |||
123 | struct sport_dev { | 104 | struct sport_dev { |
124 | struct cdev cdev; /* Char device structure */ | 105 | struct cdev cdev; /* Char device structure */ |
125 | 106 | ||
@@ -149,6 +130,8 @@ struct sport_dev { | |||
149 | struct sport_config config; | 130 | struct sport_config config; |
150 | }; | 131 | }; |
151 | 132 | ||
133 | #endif | ||
134 | |||
152 | #define SPORT_TCR1 0 | 135 | #define SPORT_TCR1 0 |
153 | #define SPORT_TCR2 1 | 136 | #define SPORT_TCR2 1 |
154 | #define SPORT_TCLKDIV 2 | 137 | #define SPORT_TCLKDIV 2 |
@@ -169,4 +152,4 @@ struct sport_dev { | |||
169 | #define SPORT_MRCS2 22 | 152 | #define SPORT_MRCS2 22 |
170 | #define SPORT_MRCS3 23 | 153 | #define SPORT_MRCS3 23 |
171 | 154 | ||
172 | #endif /*__BFIN_SPORT_H__*/ | 155 | #endif |
diff --git a/arch/blackfin/include/asm/byteorder.h b/arch/blackfin/include/asm/byteorder.h index b9e797a497b4..3e69106a4d37 100644 --- a/arch/blackfin/include/asm/byteorder.h +++ b/arch/blackfin/include/asm/byteorder.h | |||
@@ -1,7 +1,6 @@ | |||
1 | #ifndef _BLACKFIN_BYTEORDER_H | 1 | #ifndef _BLACKFIN_BYTEORDER_H |
2 | #define _BLACKFIN_BYTEORDER_H | 2 | #define _BLACKFIN_BYTEORDER_H |
3 | 3 | ||
4 | #include <asm/swab.h> | ||
5 | #include <linux/byteorder/little_endian.h> | 4 | #include <linux/byteorder/little_endian.h> |
6 | 5 | ||
7 | #endif /* _BLACKFIN_BYTEORDER_H */ | 6 | #endif /* _BLACKFIN_BYTEORDER_H */ |
diff --git a/arch/blackfin/include/asm/checksum.h b/arch/blackfin/include/asm/checksum.h index f67289a0d8d2..793581fc9556 100644 --- a/arch/blackfin/include/asm/checksum.h +++ b/arch/blackfin/include/asm/checksum.h | |||
@@ -63,23 +63,23 @@ static inline __wsum | |||
63 | csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, | 63 | csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, |
64 | unsigned short proto, __wsum sum) | 64 | unsigned short proto, __wsum sum) |
65 | { | 65 | { |
66 | 66 | unsigned int carry; | |
67 | __asm__ ("%0 = %0 + %1;\n\t" | 67 | |
68 | "CC = AC0;\n\t" | 68 | __asm__ ("%0 = %0 + %2;\n\t" |
69 | "if !CC jump 4;\n\t" | 69 | "CC = AC0;\n\t" |
70 | "%0 = %0 + %4;\n\t" | 70 | "%1 = CC;\n\t" |
71 | "%0 = %0 + %2;\n\t" | 71 | "%0 = %0 + %1;\n\t" |
72 | "CC = AC0;\n\t" | 72 | "%0 = %0 + %3;\n\t" |
73 | "if !CC jump 4;\n\t" | 73 | "CC = AC0;\n\t" |
74 | "%0 = %0 + %4;\n\t" | 74 | "%1 = CC;\n\t" |
75 | "%0 = %0 + %3;\n\t" | 75 | "%0 = %0 + %1;\n\t" |
76 | "CC = AC0;\n\t" | 76 | "%0 = %0 + %4;\n\t" |
77 | "if !CC jump 4;\n\t" | 77 | "CC = AC0;\n\t" |
78 | "%0 = %0 + %4;\n\t" | 78 | "%1 = CC;\n\t" |
79 | "NOP;\n\t" | 79 | "%0 = %0 + %1;\n\t" |
80 | : "=d" (sum) | 80 | : "=d" (sum), "=&d" (carry) |
81 | : "d" (daddr), "d" (saddr), "d" ((ntohs(len)<<16)+proto*256), "d" (1), "0"(sum) | 81 | : "d" (daddr), "d" (saddr), "d" ((len + proto) << 8), "0"(sum) |
82 | : "CC"); | 82 | : "CC"); |
83 | 83 | ||
84 | return (sum); | 84 | return (sum); |
85 | } | 85 | } |
diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h index 0889c3abb593..c31f91cc1d5d 100644 --- a/arch/blackfin/include/asm/delay.h +++ b/arch/blackfin/include/asm/delay.h | |||
@@ -13,29 +13,7 @@ | |||
13 | 13 | ||
14 | static inline void __delay(unsigned long loops) | 14 | static inline void __delay(unsigned long loops) |
15 | { | 15 | { |
16 | if (ANOMALY_05000312) { | 16 | __asm__ __volatile__ ( |
17 | /* Interrupted loads to loop registers -> bad */ | ||
18 | unsigned long tmp; | ||
19 | __asm__ __volatile__( | ||
20 | "[--SP] = LC0;" | ||
21 | "[--SP] = LT0;" | ||
22 | "[--SP] = LB0;" | ||
23 | "LSETUP (1f,1f) LC0 = %1;" | ||
24 | "1: NOP;" | ||
25 | /* We take advantage of the fact that LC0 is 0 at | ||
26 | * the end of the loop. Otherwise we'd need some | ||
27 | * NOPs after the CLI here. | ||
28 | */ | ||
29 | "CLI %0;" | ||
30 | "LB0 = [SP++];" | ||
31 | "LT0 = [SP++];" | ||
32 | "LC0 = [SP++];" | ||
33 | "STI %0;" | ||
34 | : "=d" (tmp) | ||
35 | : "a" (loops) | ||
36 | ); | ||
37 | } else | ||
38 | __asm__ __volatile__ ( | ||
39 | "LSETUP(1f, 1f) LC0 = %0;" | 17 | "LSETUP(1f, 1f) LC0 = %0;" |
40 | "1: NOP;" | 18 | "1: NOP;" |
41 | : | 19 | : |
@@ -47,16 +25,15 @@ static inline void __delay(unsigned long loops) | |||
47 | #include <linux/param.h> /* needed for HZ */ | 25 | #include <linux/param.h> /* needed for HZ */ |
48 | 26 | ||
49 | /* | 27 | /* |
50 | * Use only for very small delays ( < 1 msec). Should probably use a | 28 | * close approximation borrowed from m68knommu to avoid 64-bit math |
51 | * lookup table, really, as the multiplications take much too long with | ||
52 | * short delays. This is a "reasonable" implementation, though (and the | ||
53 | * first constant multiplications gets optimized away if the delay is | ||
54 | * a constant) | ||
55 | */ | 29 | */ |
30 | |||
31 | #define HZSCALE (268435456 / (1000000/HZ)) | ||
32 | |||
56 | static inline void udelay(unsigned long usecs) | 33 | static inline void udelay(unsigned long usecs) |
57 | { | 34 | { |
58 | extern unsigned long loops_per_jiffy; | 35 | extern unsigned long loops_per_jiffy; |
59 | __delay(usecs * loops_per_jiffy / (1000000 / HZ)); | 36 | __delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6); |
60 | } | 37 | } |
61 | 38 | ||
62 | #endif | 39 | #endif |
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h index 9477d82fcad2..d4a082ef75b4 100644 --- a/arch/blackfin/include/asm/gpio.h +++ b/arch/blackfin/include/asm/gpio.h | |||
@@ -27,60 +27,6 @@ | |||
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | 27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
28 | */ | 28 | */ |
29 | 29 | ||
30 | /* | ||
31 | * Number BF537/6/4 BF561 BF533/2/1 | ||
32 | * BF527/5/2 | ||
33 | * | ||
34 | * GPIO_0 PF0 PF0 PF0 | ||
35 | * GPIO_1 PF1 PF1 PF1 | ||
36 | * GPIO_2 PF2 PF2 PF2 | ||
37 | * GPIO_3 PF3 PF3 PF3 | ||
38 | * GPIO_4 PF4 PF4 PF4 | ||
39 | * GPIO_5 PF5 PF5 PF5 | ||
40 | * GPIO_6 PF6 PF6 PF6 | ||
41 | * GPIO_7 PF7 PF7 PF7 | ||
42 | * GPIO_8 PF8 PF8 PF8 | ||
43 | * GPIO_9 PF9 PF9 PF9 | ||
44 | * GPIO_10 PF10 PF10 PF10 | ||
45 | * GPIO_11 PF11 PF11 PF11 | ||
46 | * GPIO_12 PF12 PF12 PF12 | ||
47 | * GPIO_13 PF13 PF13 PF13 | ||
48 | * GPIO_14 PF14 PF14 PF14 | ||
49 | * GPIO_15 PF15 PF15 PF15 | ||
50 | * GPIO_16 PG0 PF16 | ||
51 | * GPIO_17 PG1 PF17 | ||
52 | * GPIO_18 PG2 PF18 | ||
53 | * GPIO_19 PG3 PF19 | ||
54 | * GPIO_20 PG4 PF20 | ||
55 | * GPIO_21 PG5 PF21 | ||
56 | * GPIO_22 PG6 PF22 | ||
57 | * GPIO_23 PG7 PF23 | ||
58 | * GPIO_24 PG8 PF24 | ||
59 | * GPIO_25 PG9 PF25 | ||
60 | * GPIO_26 PG10 PF26 | ||
61 | * GPIO_27 PG11 PF27 | ||
62 | * GPIO_28 PG12 PF28 | ||
63 | * GPIO_29 PG13 PF29 | ||
64 | * GPIO_30 PG14 PF30 | ||
65 | * GPIO_31 PG15 PF31 | ||
66 | * GPIO_32 PH0 PF32 | ||
67 | * GPIO_33 PH1 PF33 | ||
68 | * GPIO_34 PH2 PF34 | ||
69 | * GPIO_35 PH3 PF35 | ||
70 | * GPIO_36 PH4 PF36 | ||
71 | * GPIO_37 PH5 PF37 | ||
72 | * GPIO_38 PH6 PF38 | ||
73 | * GPIO_39 PH7 PF39 | ||
74 | * GPIO_40 PH8 PF40 | ||
75 | * GPIO_41 PH9 PF41 | ||
76 | * GPIO_42 PH10 PF42 | ||
77 | * GPIO_43 PH11 PF43 | ||
78 | * GPIO_44 PH12 PF44 | ||
79 | * GPIO_45 PH13 PF45 | ||
80 | * GPIO_46 PH14 PF46 | ||
81 | * GPIO_47 PH15 PF47 | ||
82 | */ | ||
83 | |||
84 | #ifndef __ARCH_BLACKFIN_GPIO_H__ | 30 | #ifndef __ARCH_BLACKFIN_GPIO_H__ |
85 | #define __ARCH_BLACKFIN_GPIO_H__ | 31 | #define __ARCH_BLACKFIN_GPIO_H__ |
86 | 32 | ||
@@ -295,10 +241,6 @@ int bfin_gpio_direction_output(unsigned gpio, int value); | |||
295 | int bfin_gpio_get_value(unsigned gpio); | 241 | int bfin_gpio_get_value(unsigned gpio); |
296 | void bfin_gpio_set_value(unsigned gpio, int value); | 242 | void bfin_gpio_set_value(unsigned gpio, int value); |
297 | 243 | ||
298 | #ifndef BF548_FAMILY | ||
299 | #define bfin_gpio_set_value(gpio, value) set_gpio_data(gpio, value) | ||
300 | #endif | ||
301 | |||
302 | #ifdef CONFIG_GPIOLIB | 244 | #ifdef CONFIG_GPIOLIB |
303 | #include <asm-generic/gpio.h> /* cansleep wrappers */ | 245 | #include <asm-generic/gpio.h> /* cansleep wrappers */ |
304 | 246 | ||
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h index 76f53d8b9a0d..343b56361ec9 100644 --- a/arch/blackfin/include/asm/ipipe.h +++ b/arch/blackfin/include/asm/ipipe.h | |||
@@ -35,9 +35,9 @@ | |||
35 | #include <asm/atomic.h> | 35 | #include <asm/atomic.h> |
36 | #include <asm/traps.h> | 36 | #include <asm/traps.h> |
37 | 37 | ||
38 | #define IPIPE_ARCH_STRING "1.8-00" | 38 | #define IPIPE_ARCH_STRING "1.9-00" |
39 | #define IPIPE_MAJOR_NUMBER 1 | 39 | #define IPIPE_MAJOR_NUMBER 1 |
40 | #define IPIPE_MINOR_NUMBER 8 | 40 | #define IPIPE_MINOR_NUMBER 9 |
41 | #define IPIPE_PATCH_NUMBER 0 | 41 | #define IPIPE_PATCH_NUMBER 0 |
42 | 42 | ||
43 | #ifdef CONFIG_SMP | 43 | #ifdef CONFIG_SMP |
@@ -83,9 +83,9 @@ struct ipipe_sysinfo { | |||
83 | "%2 = CYCLES2\n" \ | 83 | "%2 = CYCLES2\n" \ |
84 | "CC = %2 == %0\n" \ | 84 | "CC = %2 == %0\n" \ |
85 | "if ! CC jump 1b\n" \ | 85 | "if ! CC jump 1b\n" \ |
86 | : "=r" (((unsigned long *)&t)[1]), \ | 86 | : "=d,a" (((unsigned long *)&t)[1]), \ |
87 | "=r" (((unsigned long *)&t)[0]), \ | 87 | "=d,a" (((unsigned long *)&t)[0]), \ |
88 | "=r" (__cy2) \ | 88 | "=d,a" (__cy2) \ |
89 | : /*no input*/ : "CC"); \ | 89 | : /*no input*/ : "CC"); \ |
90 | t; \ | 90 | t; \ |
91 | }) | 91 | }) |
@@ -118,35 +118,40 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, | |||
118 | 118 | ||
119 | #define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) | 119 | #define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) |
120 | 120 | ||
121 | #define __ipipe_lock_root() \ | 121 | static inline int __ipipe_check_tickdev(const char *devname) |
122 | set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) | 122 | { |
123 | return 1; | ||
124 | } | ||
123 | 125 | ||
124 | #define __ipipe_unlock_root() \ | 126 | static inline void __ipipe_lock_root(void) |
125 | clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) | 127 | { |
128 | set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); | ||
129 | } | ||
130 | |||
131 | static inline void __ipipe_unlock_root(void) | ||
132 | { | ||
133 | clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); | ||
134 | } | ||
126 | 135 | ||
127 | void __ipipe_enable_pipeline(void); | 136 | void __ipipe_enable_pipeline(void); |
128 | 137 | ||
129 | #define __ipipe_hook_critical_ipi(ipd) do { } while (0) | 138 | #define __ipipe_hook_critical_ipi(ipd) do { } while (0) |
130 | 139 | ||
131 | #define __ipipe_sync_pipeline(syncmask) \ | 140 | #define __ipipe_sync_pipeline ___ipipe_sync_pipeline |
132 | do { \ | 141 | void ___ipipe_sync_pipeline(unsigned long syncmask); |
133 | struct ipipe_domain *ipd = ipipe_current_domain; \ | ||
134 | if (likely(ipd != ipipe_root_domain || !test_bit(IPIPE_ROOTLOCK_FLAG, &ipd->flags))) \ | ||
135 | __ipipe_sync_stage(syncmask); \ | ||
136 | } while (0) | ||
137 | 142 | ||
138 | void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); | 143 | void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); |
139 | 144 | ||
140 | int __ipipe_get_irq_priority(unsigned irq); | 145 | int __ipipe_get_irq_priority(unsigned irq); |
141 | 146 | ||
142 | int __ipipe_get_irqthread_priority(unsigned irq); | ||
143 | |||
144 | void __ipipe_stall_root_raw(void); | 147 | void __ipipe_stall_root_raw(void); |
145 | 148 | ||
146 | void __ipipe_unstall_root_raw(void); | 149 | void __ipipe_unstall_root_raw(void); |
147 | 150 | ||
148 | void __ipipe_serial_debug(const char *fmt, ...); | 151 | void __ipipe_serial_debug(const char *fmt, ...); |
149 | 152 | ||
153 | asmlinkage void __ipipe_call_irqtail(unsigned long addr); | ||
154 | |||
150 | DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs); | 155 | DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs); |
151 | 156 | ||
152 | extern unsigned long __ipipe_core_clock; | 157 | extern unsigned long __ipipe_core_clock; |
@@ -162,42 +167,25 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul) | |||
162 | 167 | ||
163 | #define __ipipe_run_irqtail() /* Must be a macro */ \ | 168 | #define __ipipe_run_irqtail() /* Must be a macro */ \ |
164 | do { \ | 169 | do { \ |
165 | asmlinkage void __ipipe_call_irqtail(void); \ | ||
166 | unsigned long __pending; \ | 170 | unsigned long __pending; \ |
167 | CSYNC(); \ | 171 | CSYNC(); \ |
168 | __pending = bfin_read_IPEND(); \ | 172 | __pending = bfin_read_IPEND(); \ |
169 | if (__pending & 0x8000) { \ | 173 | if (__pending & 0x8000) { \ |
170 | __pending &= ~0x8010; \ | 174 | __pending &= ~0x8010; \ |
171 | if (__pending && (__pending & (__pending - 1)) == 0) \ | 175 | if (__pending && (__pending & (__pending - 1)) == 0) \ |
172 | __ipipe_call_irqtail(); \ | 176 | __ipipe_call_irqtail(__ipipe_irq_tail_hook); \ |
173 | } \ | 177 | } \ |
174 | } while (0) | 178 | } while (0) |
175 | 179 | ||
176 | #define __ipipe_run_isr(ipd, irq) \ | 180 | #define __ipipe_run_isr(ipd, irq) \ |
177 | do { \ | 181 | do { \ |
178 | if (ipd == ipipe_root_domain) { \ | 182 | if (ipd == ipipe_root_domain) { \ |
179 | /* \ | 183 | local_irq_enable_hw(); \ |
180 | * Note: the I-pipe implements a threaded interrupt model on \ | 184 | if (ipipe_virtual_irq_p(irq)) \ |
181 | * this arch for Linux external IRQs. The interrupt handler we \ | ||
182 | * call here only wakes up the associated IRQ thread. \ | ||
183 | */ \ | ||
184 | if (ipipe_virtual_irq_p(irq)) { \ | ||
185 | /* No irqtail here; virtual interrupts have no effect \ | ||
186 | on IPEND so there is no need for processing \ | ||
187 | deferral. */ \ | ||
188 | local_irq_enable_nohead(ipd); \ | ||
189 | ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ | 185 | ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ |
190 | local_irq_disable_nohead(ipd); \ | 186 | else \ |
191 | } else \ | ||
192 | /* \ | ||
193 | * No need to run the irqtail here either; \ | ||
194 | * we can't be preempted by hw IRQs, so \ | ||
195 | * non-Linux IRQs cannot stack over the short \ | ||
196 | * thread wakeup code. Which in turn means \ | ||
197 | * that no irqtail condition could be pending \ | ||
198 | * for domains above Linux in the pipeline. \ | ||
199 | */ \ | ||
200 | ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ | 187 | ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ |
188 | local_irq_disable_hw(); \ | ||
201 | } else { \ | 189 | } else { \ |
202 | __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ | 190 | __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ |
203 | local_irq_enable_nohead(ipd); \ | 191 | local_irq_enable_nohead(ipd); \ |
@@ -217,42 +205,24 @@ void ipipe_init_irq_threads(void); | |||
217 | 205 | ||
218 | int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); | 206 | int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); |
219 | 207 | ||
220 | #define IS_SYSIRQ(irq) ((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS) | 208 | #ifdef CONFIG_GENERIC_CLOCKEVENTS |
221 | #define IS_GPIOIRQ(irq) ((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS) | 209 | #define IRQ_SYSTMR IRQ_CORETMR |
222 | 210 | #define IRQ_PRIOTMR IRQ_CORETMR | |
211 | #else | ||
223 | #define IRQ_SYSTMR IRQ_TIMER0 | 212 | #define IRQ_SYSTMR IRQ_TIMER0 |
224 | #define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 | 213 | #define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 |
214 | #endif | ||
225 | 215 | ||
226 | #if defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533) | 216 | #ifdef CONFIG_BF561 |
227 | #define PRIO_GPIODEMUX(irq) CONFIG_PFA | ||
228 | #elif defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537) | ||
229 | #define PRIO_GPIODEMUX(irq) CONFIG_IRQ_PROG_INTA | ||
230 | #elif defined(CONFIG_BF52x) | ||
231 | #define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \ | ||
232 | (irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \ | ||
233 | (irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \ | ||
234 | -1) | ||
235 | #elif defined(CONFIG_BF561) | ||
236 | #define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \ | ||
237 | (irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \ | ||
238 | (irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \ | ||
239 | -1) | ||
240 | #define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) | 217 | #define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) |
241 | #define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val) | 218 | #define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val) |
242 | #define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val) | 219 | #define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val) |
243 | #define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS() | 220 | #define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS() |
244 | #elif defined(CONFIG_BF54x) | 221 | #elif defined(CONFIG_BF54x) |
245 | #define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \ | ||
246 | (irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \ | ||
247 | (irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \ | ||
248 | (irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \ | ||
249 | -1) | ||
250 | #define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) | 222 | #define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) |
251 | #define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) | 223 | #define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) |
252 | #define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) | 224 | #define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) |
253 | #define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) | 225 | #define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) |
254 | #else | ||
255 | # error "no PRIO_GPIODEMUX() for this part" | ||
256 | #endif | 226 | #endif |
257 | 227 | ||
258 | #define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0) | 228 | #define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0) |
@@ -275,4 +245,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); | |||
275 | 245 | ||
276 | #endif /* !CONFIG_IPIPE */ | 246 | #endif /* !CONFIG_IPIPE */ |
277 | 247 | ||
248 | #define ipipe_update_tick_evtdev(evtdev) do { } while (0) | ||
249 | |||
278 | #endif /* !__ASM_BLACKFIN_IPIPE_H */ | 250 | #endif /* !__ASM_BLACKFIN_IPIPE_H */ |
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h index cb1025aeabcf..3e8acbd1a3be 100644 --- a/arch/blackfin/include/asm/ipipe_base.h +++ b/arch/blackfin/include/asm/ipipe_base.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* -*- linux-c -*- | 1 | /* -*- linux-c -*- |
2 | * include/asm-blackfin/_baseipipe.h | 2 | * include/asm-blackfin/ipipe_base.h |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Philippe Gerum. | 4 | * Copyright (C) 2007 Philippe Gerum. |
5 | * | 5 | * |
@@ -27,8 +27,9 @@ | |||
27 | #define IPIPE_NR_XIRQS NR_IRQS | 27 | #define IPIPE_NR_XIRQS NR_IRQS |
28 | #define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ | 28 | #define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ |
29 | 29 | ||
30 | /* Blackfin-specific, global domain flags */ | 30 | /* Blackfin-specific, per-cpu pipeline status */ |
31 | #define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */ | 31 | #define IPIPE_SYNCDEFER_FLAG 15 |
32 | #define IPIPE_SYNCDEFER_MASK (1L << IPIPE_SYNCDEFER_MASK) | ||
32 | 33 | ||
33 | /* Blackfin traps -- i.e. exception vector numbers */ | 34 | /* Blackfin traps -- i.e. exception vector numbers */ |
34 | #define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */ | 35 | #define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */ |
@@ -48,11 +49,6 @@ | |||
48 | 49 | ||
49 | #ifndef __ASSEMBLY__ | 50 | #ifndef __ASSEMBLY__ |
50 | 51 | ||
51 | #include <linux/bitops.h> | ||
52 | |||
53 | extern int test_bit(int nr, const void *addr); | ||
54 | |||
55 | |||
56 | extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ | 52 | extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ |
57 | 53 | ||
58 | static inline void __ipipe_stall_root(void) | 54 | static inline void __ipipe_stall_root(void) |
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h index 3d977909ce7d..7645e85a5f6f 100644 --- a/arch/blackfin/include/asm/irq.h +++ b/arch/blackfin/include/asm/irq.h | |||
@@ -61,20 +61,38 @@ void __ipipe_restore_root(unsigned long flags); | |||
61 | #define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags)) | 61 | #define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags)) |
62 | #define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) | 62 | #define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) |
63 | 63 | ||
64 | #define local_save_flags(x) \ | 64 | #define local_save_flags(x) \ |
65 | do { \ | 65 | do { \ |
66 | (x) = __ipipe_test_root() ? \ | 66 | (x) = __ipipe_test_root() ? \ |
67 | __all_masked_irq_flags : bfin_irq_flags; \ | 67 | __all_masked_irq_flags : bfin_irq_flags; \ |
68 | barrier(); \ | ||
68 | } while (0) | 69 | } while (0) |
69 | 70 | ||
70 | #define local_irq_save(x) \ | 71 | #define local_irq_save(x) \ |
71 | do { \ | 72 | do { \ |
72 | (x) = __ipipe_test_and_stall_root(); \ | 73 | (x) = __ipipe_test_and_stall_root() ? \ |
74 | __all_masked_irq_flags : bfin_irq_flags; \ | ||
75 | barrier(); \ | ||
76 | } while (0) | ||
77 | |||
78 | static inline void local_irq_restore(unsigned long x) | ||
79 | { | ||
80 | barrier(); | ||
81 | __ipipe_restore_root(x == __all_masked_irq_flags); | ||
82 | } | ||
83 | |||
84 | #define local_irq_disable() \ | ||
85 | do { \ | ||
86 | __ipipe_stall_root(); \ | ||
87 | barrier(); \ | ||
73 | } while (0) | 88 | } while (0) |
74 | 89 | ||
75 | #define local_irq_restore(x) __ipipe_restore_root(x) | 90 | static inline void local_irq_enable(void) |
76 | #define local_irq_disable() __ipipe_stall_root() | 91 | { |
77 | #define local_irq_enable() __ipipe_unstall_root() | 92 | barrier(); |
93 | __ipipe_unstall_root(); | ||
94 | } | ||
95 | |||
78 | #define irqs_disabled() __ipipe_test_root() | 96 | #define irqs_disabled() __ipipe_test_root() |
79 | 97 | ||
80 | #define local_save_flags_hw(x) \ | 98 | #define local_save_flags_hw(x) \ |
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h index 26ebac6646d8..c8b256d2ea30 100644 --- a/arch/blackfin/include/asm/kgdb.h +++ b/arch/blackfin/include/asm/kgdb.h | |||
@@ -1,32 +1,8 @@ | |||
1 | /* | 1 | /* Blackfin KGDB header |
2 | * File: include/asm-blackfin/kgdb.h | ||
3 | * Based on: | ||
4 | * Author: Sonic Zhang | ||
5 | * | ||
6 | * Created: | ||
7 | * Description: | ||
8 | * | ||
9 | * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $ | ||
10 | * | ||
11 | * Modified: | ||
12 | * Copyright 2005-2006 Analog Devices Inc. | ||
13 | * | ||
14 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
15 | * | 2 | * |
16 | * This program is free software; you can redistribute it and/or modify | 3 | * Copyright 2005-2009 Analog Devices Inc. |
17 | * it under the terms of the GNU General Public License as published by | ||
18 | * the Free Software Foundation; either version 2 of the License, or | ||
19 | * (at your option) any later version. | ||
20 | * | 4 | * |
21 | * This program is distributed in the hope that it will be useful, | 5 | * Licensed under the GPL-2 or later. |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
24 | * GNU General Public License for more details. | ||
25 | * | ||
26 | * You should have received a copy of the GNU General Public License | ||
27 | * along with this program; if not, see the file COPYING, or write | ||
28 | * to the Free Software Foundation, Inc., | ||
29 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
30 | */ | 6 | */ |
31 | 7 | ||
32 | #ifndef __ASM_BLACKFIN_KGDB_H__ | 8 | #ifndef __ASM_BLACKFIN_KGDB_H__ |
@@ -37,17 +13,18 @@ | |||
37 | /* gdb locks */ | 13 | /* gdb locks */ |
38 | #define KGDB_MAX_NO_CPUS 8 | 14 | #define KGDB_MAX_NO_CPUS 8 |
39 | 15 | ||
40 | /************************************************************************/ | 16 | /* |
41 | /* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/ | 17 | * BUFMAX defines the maximum number of characters in inbound/outbound buffers. |
42 | /* at least NUMREGBYTES*2 are needed for register packets */ | 18 | * At least NUMREGBYTES*2 are needed for register packets. |
43 | /* Longer buffer is needed to list all threads */ | 19 | * Longer buffer is needed to list all threads. |
20 | */ | ||
44 | #define BUFMAX 2048 | 21 | #define BUFMAX 2048 |
45 | 22 | ||
46 | /* | 23 | /* |
47 | * Note that this register image is different from | 24 | * Note that this register image is different from |
48 | * the register image that Linux produces at interrupt time. | 25 | * the register image that Linux produces at interrupt time. |
49 | * | 26 | * |
50 | * Linux's register image is defined by struct pt_regs in ptrace.h. | 27 | * Linux's register image is defined by struct pt_regs in ptrace.h. |
51 | */ | 28 | */ |
52 | enum regnames { | 29 | enum regnames { |
53 | /* Core Registers */ | 30 | /* Core Registers */ |
@@ -104,14 +81,14 @@ enum regnames { | |||
104 | BFIN_RETX, | 81 | BFIN_RETX, |
105 | BFIN_RETN, | 82 | BFIN_RETN, |
106 | BFIN_RETE, | 83 | BFIN_RETE, |
107 | 84 | ||
108 | /* Pseudo Registers */ | 85 | /* Pseudo Registers */ |
109 | BFIN_PC, | 86 | BFIN_PC, |
110 | BFIN_CC, | 87 | BFIN_CC, |
111 | BFIN_EXTRA1, /* Address of .text section. */ | 88 | BFIN_EXTRA1, /* Address of .text section. */ |
112 | BFIN_EXTRA2, /* Address of .data section. */ | 89 | BFIN_EXTRA2, /* Address of .data section. */ |
113 | BFIN_EXTRA3, /* Address of .bss section. */ | 90 | BFIN_EXTRA3, /* Address of .bss section. */ |
114 | BFIN_FDPIC_EXEC, | 91 | BFIN_FDPIC_EXEC, |
115 | BFIN_FDPIC_INTERP, | 92 | BFIN_FDPIC_INTERP, |
116 | 93 | ||
117 | /* MMRs */ | 94 | /* MMRs */ |
@@ -126,7 +103,7 @@ enum regnames { | |||
126 | 103 | ||
127 | static inline void arch_kgdb_breakpoint(void) | 104 | static inline void arch_kgdb_breakpoint(void) |
128 | { | 105 | { |
129 | asm(" EXCPT 2;"); | 106 | asm("EXCPT 2;"); |
130 | } | 107 | } |
131 | #define BREAK_INSTR_SIZE 2 | 108 | #define BREAK_INSTR_SIZE 2 |
132 | #define CACHE_FLUSH_IS_SAFE 1 | 109 | #define CACHE_FLUSH_IS_SAFE 1 |
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h index 255a9316ad36..61f7487fbf12 100644 --- a/arch/blackfin/include/asm/mem_init.h +++ b/arch/blackfin/include/asm/mem_init.h | |||
@@ -115,7 +115,7 @@ | |||
115 | #define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) | 115 | #define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) |
116 | 116 | ||
117 | /* Enable SCLK Out */ | 117 | /* Enable SCLK Out */ |
118 | #define mem_SDGCTL (0x80000000 | SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS) | 118 | #define mem_SDGCTL (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS) |
119 | #else | 119 | #else |
120 | #define mem_SDRRC CONFIG_MEM_SDRRC | 120 | #define mem_SDRRC CONFIG_MEM_SDRRC |
121 | #define mem_SDGCTL CONFIG_MEM_SDGCTL | 121 | #define mem_SDGCTL CONFIG_MEM_SDGCTL |
diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h index bd8d4a7efeb2..a67142740df0 100644 --- a/arch/blackfin/include/asm/pda.h +++ b/arch/blackfin/include/asm/pda.h | |||
@@ -59,6 +59,7 @@ struct blackfin_pda { /* Per-processor Data Area */ | |||
59 | unsigned long icplb_fault_addr; | 59 | unsigned long icplb_fault_addr; |
60 | unsigned long retx; | 60 | unsigned long retx; |
61 | unsigned long seqstat; | 61 | unsigned long seqstat; |
62 | unsigned int __nmi_count; /* number of times NMI asserted on this CPU */ | ||
62 | }; | 63 | }; |
63 | 64 | ||
64 | extern struct blackfin_pda cpu_pda[]; | 65 | extern struct blackfin_pda cpu_pda[]; |
diff --git a/arch/blackfin/include/asm/percpu.h b/arch/blackfin/include/asm/percpu.h index 797c0c165069..c94c7bc88c71 100644 --- a/arch/blackfin/include/asm/percpu.h +++ b/arch/blackfin/include/asm/percpu.h | |||
@@ -3,14 +3,4 @@ | |||
3 | 3 | ||
4 | #include <asm-generic/percpu.h> | 4 | #include <asm-generic/percpu.h> |
5 | 5 | ||
6 | #ifdef CONFIG_MODULES | ||
7 | #define PERCPU_MODULE_RESERVE 8192 | ||
8 | #else | ||
9 | #define PERCPU_MODULE_RESERVE 0 | ||
10 | #endif | ||
11 | |||
12 | #define PERCPU_ENOUGH_ROOM \ | ||
13 | (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \ | ||
14 | PERCPU_MODULE_RESERVE) | ||
15 | |||
16 | #endif /* __ARCH_BLACKFIN_PERCPU__ */ | 6 | #endif /* __ARCH_BLACKFIN_PERCPU__ */ |
diff --git a/arch/blackfin/include/asm/reboot.h b/arch/blackfin/include/asm/reboot.h index 4856d62b7467..ae1e36329bec 100644 --- a/arch/blackfin/include/asm/reboot.h +++ b/arch/blackfin/include/asm/reboot.h | |||
@@ -15,6 +15,6 @@ extern void native_machine_halt(void); | |||
15 | extern void native_machine_power_off(void); | 15 | extern void native_machine_power_off(void); |
16 | 16 | ||
17 | /* common reboot workarounds */ | 17 | /* common reboot workarounds */ |
18 | extern void bfin_gpio_reset_spi0_ssel1(void); | 18 | extern void bfin_reset_boot_spi_cs(unsigned short pin); |
19 | 19 | ||
20 | #endif | 20 | #endif |
diff --git a/arch/blackfin/include/asm/swab.h b/arch/blackfin/include/asm/swab.h index 69a051b612bd..6403ad2932eb 100644 --- a/arch/blackfin/include/asm/swab.h +++ b/arch/blackfin/include/asm/swab.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef _BLACKFIN_SWAB_H | 1 | #ifndef _BLACKFIN_SWAB_H |
2 | #define _BLACKFIN_SWAB_H | 2 | #define _BLACKFIN_SWAB_H |
3 | 3 | ||
4 | #include <asm/types.h> | 4 | #include <linux/types.h> |
5 | #include <linux/compiler.h> | 5 | #include <linux/compiler.h> |
6 | 6 | ||
7 | #if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) | 7 | #if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) |
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h index e721ce55956c..2920087516f2 100644 --- a/arch/blackfin/include/asm/thread_info.h +++ b/arch/blackfin/include/asm/thread_info.h | |||
@@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void) | |||
122 | #define TIF_MEMDIE 4 | 122 | #define TIF_MEMDIE 4 |
123 | #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ | 123 | #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ |
124 | #define TIF_FREEZE 6 /* is freezing for suspend */ | 124 | #define TIF_FREEZE 6 /* is freezing for suspend */ |
125 | #define TIF_IRQ_SYNC 7 /* sync pipeline stage */ | ||
125 | 126 | ||
126 | /* as above, but as bit values */ | 127 | /* as above, but as bit values */ |
127 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | 128 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) |
@@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void) | |||
130 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | 131 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) |
131 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) | 132 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) |
132 | #define _TIF_FREEZE (1<<TIF_FREEZE) | 133 | #define _TIF_FREEZE (1<<TIF_FREEZE) |
134 | #define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC) | ||
133 | 135 | ||
134 | #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ | 136 | #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ |
135 | 137 | ||
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index 38a233374f07..fd4d4328a0f2 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile | |||
@@ -21,5 +21,9 @@ obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o | |||
21 | obj-$(CONFIG_CPLB_INFO) += cplbinfo.o | 21 | obj-$(CONFIG_CPLB_INFO) += cplbinfo.o |
22 | obj-$(CONFIG_MODULES) += module.o | 22 | obj-$(CONFIG_MODULES) += module.o |
23 | obj-$(CONFIG_KGDB) += kgdb.o | 23 | obj-$(CONFIG_KGDB) += kgdb.o |
24 | obj-$(CONFIG_KGDB_TESTCASE) += kgdb_test.o | 24 | obj-$(CONFIG_KGDB_TESTS) += kgdb_test.o |
25 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 25 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
26 | |||
27 | # the kgdb test puts code into L2 and without linker | ||
28 | # relaxation, we need to force long calls to/from it | ||
29 | CFLAGS_kgdb_test.o := -mlong-calls -O0 | ||
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c index 07e02c0d1c07..8531693fb48d 100644 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ b/arch/blackfin/kernel/bfin_dma_5xx.c | |||
@@ -249,6 +249,13 @@ static void __dma_memcpy(u32 daddr, s16 dmod, u32 saddr, s16 smod, size_t cnt, u | |||
249 | 249 | ||
250 | spin_lock_irqsave(&mdma_lock, flags); | 250 | spin_lock_irqsave(&mdma_lock, flags); |
251 | 251 | ||
252 | /* Force a sync in case a previous config reset on this channel | ||
253 | * occurred. This is needed so subsequent writes to DMA registers | ||
254 | * are not spuriously lost/corrupted. Do it under irq lock and | ||
255 | * without the anomaly version (because we are atomic already). | ||
256 | */ | ||
257 | __builtin_bfin_ssync(); | ||
258 | |||
252 | if (bfin_read_MDMA_S0_CONFIG()) | 259 | if (bfin_read_MDMA_S0_CONFIG()) |
253 | while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) | 260 | while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) |
254 | continue; | 261 | continue; |
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index 4c14331978f6..51dac55c524a 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c | |||
@@ -27,59 +27,6 @@ | |||
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | 27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
28 | */ | 28 | */ |
29 | 29 | ||
30 | /* | ||
31 | * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2 | ||
32 | * | ||
33 | * GPIO_0 PF0 PF0 PF0 PA0...PJ13 | ||
34 | * GPIO_1 PF1 PF1 PF1 | ||
35 | * GPIO_2 PF2 PF2 PF2 | ||
36 | * GPIO_3 PF3 PF3 PF3 | ||
37 | * GPIO_4 PF4 PF4 PF4 | ||
38 | * GPIO_5 PF5 PF5 PF5 | ||
39 | * GPIO_6 PF6 PF6 PF6 | ||
40 | * GPIO_7 PF7 PF7 PF7 | ||
41 | * GPIO_8 PF8 PF8 PF8 | ||
42 | * GPIO_9 PF9 PF9 PF9 | ||
43 | * GPIO_10 PF10 PF10 PF10 | ||
44 | * GPIO_11 PF11 PF11 PF11 | ||
45 | * GPIO_12 PF12 PF12 PF12 | ||
46 | * GPIO_13 PF13 PF13 PF13 | ||
47 | * GPIO_14 PF14 PF14 PF14 | ||
48 | * GPIO_15 PF15 PF15 PF15 | ||
49 | * GPIO_16 PG0 PF16 | ||
50 | * GPIO_17 PG1 PF17 | ||
51 | * GPIO_18 PG2 PF18 | ||
52 | * GPIO_19 PG3 PF19 | ||
53 | * GPIO_20 PG4 PF20 | ||
54 | * GPIO_21 PG5 PF21 | ||
55 | * GPIO_22 PG6 PF22 | ||
56 | * GPIO_23 PG7 PF23 | ||
57 | * GPIO_24 PG8 PF24 | ||
58 | * GPIO_25 PG9 PF25 | ||
59 | * GPIO_26 PG10 PF26 | ||
60 | * GPIO_27 PG11 PF27 | ||
61 | * GPIO_28 PG12 PF28 | ||
62 | * GPIO_29 PG13 PF29 | ||
63 | * GPIO_30 PG14 PF30 | ||
64 | * GPIO_31 PG15 PF31 | ||
65 | * GPIO_32 PH0 PF32 | ||
66 | * GPIO_33 PH1 PF33 | ||
67 | * GPIO_34 PH2 PF34 | ||
68 | * GPIO_35 PH3 PF35 | ||
69 | * GPIO_36 PH4 PF36 | ||
70 | * GPIO_37 PH5 PF37 | ||
71 | * GPIO_38 PH6 PF38 | ||
72 | * GPIO_39 PH7 PF39 | ||
73 | * GPIO_40 PH8 PF40 | ||
74 | * GPIO_41 PH9 PF41 | ||
75 | * GPIO_42 PH10 PF42 | ||
76 | * GPIO_43 PH11 PF43 | ||
77 | * GPIO_44 PH12 PF44 | ||
78 | * GPIO_45 PH13 PF45 | ||
79 | * GPIO_46 PH14 PF46 | ||
80 | * GPIO_47 PH15 PF47 | ||
81 | */ | ||
82 | |||
83 | #include <linux/delay.h> | 30 | #include <linux/delay.h> |
84 | #include <linux/module.h> | 31 | #include <linux/module.h> |
85 | #include <linux/err.h> | 32 | #include <linux/err.h> |
@@ -119,62 +66,61 @@ enum { | |||
119 | #define AWA_DUMMY_READ(...) do { } while (0) | 66 | #define AWA_DUMMY_READ(...) do { } while (0) |
120 | #endif | 67 | #endif |
121 | 68 | ||
69 | static struct gpio_port_t * const gpio_array[] = { | ||
122 | #if defined(BF533_FAMILY) || defined(BF538_FAMILY) | 70 | #if defined(BF533_FAMILY) || defined(BF538_FAMILY) |
123 | static struct gpio_port_t *gpio_bankb[] = { | ||
124 | (struct gpio_port_t *) FIO_FLAG_D, | 71 | (struct gpio_port_t *) FIO_FLAG_D, |
125 | }; | 72 | #elif defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) |
126 | #endif | ||
127 | |||
128 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) | ||
129 | static struct gpio_port_t *gpio_bankb[] = { | ||
130 | (struct gpio_port_t *) PORTFIO, | 73 | (struct gpio_port_t *) PORTFIO, |
131 | (struct gpio_port_t *) PORTGIO, | 74 | (struct gpio_port_t *) PORTGIO, |
132 | (struct gpio_port_t *) PORTHIO, | 75 | (struct gpio_port_t *) PORTHIO, |
76 | #elif defined(BF561_FAMILY) | ||
77 | (struct gpio_port_t *) FIO0_FLAG_D, | ||
78 | (struct gpio_port_t *) FIO1_FLAG_D, | ||
79 | (struct gpio_port_t *) FIO2_FLAG_D, | ||
80 | #elif defined(BF548_FAMILY) | ||
81 | (struct gpio_port_t *)PORTA_FER, | ||
82 | (struct gpio_port_t *)PORTB_FER, | ||
83 | (struct gpio_port_t *)PORTC_FER, | ||
84 | (struct gpio_port_t *)PORTD_FER, | ||
85 | (struct gpio_port_t *)PORTE_FER, | ||
86 | (struct gpio_port_t *)PORTF_FER, | ||
87 | (struct gpio_port_t *)PORTG_FER, | ||
88 | (struct gpio_port_t *)PORTH_FER, | ||
89 | (struct gpio_port_t *)PORTI_FER, | ||
90 | (struct gpio_port_t *)PORTJ_FER, | ||
91 | #else | ||
92 | # error no gpio arrays defined | ||
93 | #endif | ||
133 | }; | 94 | }; |
134 | 95 | ||
135 | static unsigned short *port_fer[] = { | 96 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) |
97 | static unsigned short * const port_fer[] = { | ||
136 | (unsigned short *) PORTF_FER, | 98 | (unsigned short *) PORTF_FER, |
137 | (unsigned short *) PORTG_FER, | 99 | (unsigned short *) PORTG_FER, |
138 | (unsigned short *) PORTH_FER, | 100 | (unsigned short *) PORTH_FER, |
139 | }; | 101 | }; |
140 | #endif | ||
141 | 102 | ||
142 | #if defined(BF527_FAMILY) || defined(BF518_FAMILY) | 103 | # if !defined(BF537_FAMILY) |
143 | static unsigned short *port_mux[] = { | 104 | static unsigned short * const port_mux[] = { |
144 | (unsigned short *) PORTF_MUX, | 105 | (unsigned short *) PORTF_MUX, |
145 | (unsigned short *) PORTG_MUX, | 106 | (unsigned short *) PORTG_MUX, |
146 | (unsigned short *) PORTH_MUX, | 107 | (unsigned short *) PORTH_MUX, |
147 | }; | 108 | }; |
148 | 109 | ||
149 | static const | 110 | static const |
150 | u8 pmux_offset[][16] = | 111 | u8 pmux_offset[][16] = { |
151 | {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */ | 112 | # if defined(BF527_FAMILY) |
152 | { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */ | 113 | { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */ |
153 | { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */ | 114 | { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */ |
154 | }; | 115 | { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */ |
155 | #endif | 116 | # elif defined(BF518_FAMILY) |
156 | 117 | { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */ | |
157 | #ifdef BF561_FAMILY | 118 | { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */ |
158 | static struct gpio_port_t *gpio_bankb[] = { | 119 | { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */ |
159 | (struct gpio_port_t *) FIO0_FLAG_D, | 120 | # endif |
160 | (struct gpio_port_t *) FIO1_FLAG_D, | ||
161 | (struct gpio_port_t *) FIO2_FLAG_D, | ||
162 | }; | 121 | }; |
163 | #endif | 122 | # endif |
164 | 123 | ||
165 | #ifdef BF548_FAMILY | ||
166 | static struct gpio_port_t *gpio_array[] = { | ||
167 | (struct gpio_port_t *)PORTA_FER, | ||
168 | (struct gpio_port_t *)PORTB_FER, | ||
169 | (struct gpio_port_t *)PORTC_FER, | ||
170 | (struct gpio_port_t *)PORTD_FER, | ||
171 | (struct gpio_port_t *)PORTE_FER, | ||
172 | (struct gpio_port_t *)PORTF_FER, | ||
173 | (struct gpio_port_t *)PORTG_FER, | ||
174 | (struct gpio_port_t *)PORTH_FER, | ||
175 | (struct gpio_port_t *)PORTI_FER, | ||
176 | (struct gpio_port_t *)PORTJ_FER, | ||
177 | }; | ||
178 | #endif | 124 | #endif |
179 | 125 | ||
180 | static unsigned short reserved_gpio_map[GPIO_BANK_NUM]; | 126 | static unsigned short reserved_gpio_map[GPIO_BANK_NUM]; |
@@ -188,35 +134,9 @@ static struct str_ident { | |||
188 | } str_ident[MAX_RESOURCES]; | 134 | } str_ident[MAX_RESOURCES]; |
189 | 135 | ||
190 | #if defined(CONFIG_PM) | 136 | #if defined(CONFIG_PM) |
191 | #if defined(CONFIG_BF54x) | ||
192 | static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM]; | ||
193 | #else | ||
194 | static unsigned short wakeup_map[GPIO_BANK_NUM]; | ||
195 | static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS]; | ||
196 | static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM]; | 137 | static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM]; |
197 | |||
198 | #ifdef BF533_FAMILY | ||
199 | static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB}; | ||
200 | #endif | ||
201 | |||
202 | #ifdef BF537_FAMILY | ||
203 | static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX}; | ||
204 | #endif | ||
205 | |||
206 | #ifdef BF538_FAMILY | ||
207 | static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB}; | ||
208 | #endif | 138 | #endif |
209 | 139 | ||
210 | #if defined(BF527_FAMILY) || defined(BF518_FAMILY) | ||
211 | static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB}; | ||
212 | #endif | ||
213 | |||
214 | #ifdef BF561_FAMILY | ||
215 | static unsigned int sic_iwr_irqs[] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB}; | ||
216 | #endif | ||
217 | #endif | ||
218 | #endif /* CONFIG_PM */ | ||
219 | |||
220 | inline int check_gpio(unsigned gpio) | 140 | inline int check_gpio(unsigned gpio) |
221 | { | 141 | { |
222 | #if defined(BF548_FAMILY) | 142 | #if defined(BF548_FAMILY) |
@@ -330,9 +250,10 @@ static struct { | |||
330 | {.res = P_SPI0_SSEL3, .offset = 0}, | 250 | {.res = P_SPI0_SSEL3, .offset = 0}, |
331 | }; | 251 | }; |
332 | 252 | ||
333 | static void portmux_setup(unsigned short per, unsigned short function) | 253 | static void portmux_setup(unsigned short per) |
334 | { | 254 | { |
335 | u16 y, offset, muxreg; | 255 | u16 y, offset, muxreg; |
256 | u16 function = P_FUNCT2MUX(per); | ||
336 | 257 | ||
337 | for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) { | 258 | for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) { |
338 | if (port_mux_lut[y].res == per) { | 259 | if (port_mux_lut[y].res == per) { |
@@ -353,30 +274,33 @@ static void portmux_setup(unsigned short per, unsigned short function) | |||
353 | } | 274 | } |
354 | } | 275 | } |
355 | #elif defined(BF548_FAMILY) | 276 | #elif defined(BF548_FAMILY) |
356 | inline void portmux_setup(unsigned short portno, unsigned short function) | 277 | inline void portmux_setup(unsigned short per) |
357 | { | 278 | { |
358 | u32 pmux; | 279 | u32 pmux; |
280 | u16 ident = P_IDENT(per); | ||
281 | u16 function = P_FUNCT2MUX(per); | ||
359 | 282 | ||
360 | pmux = gpio_array[gpio_bank(portno)]->port_mux; | 283 | pmux = gpio_array[gpio_bank(ident)]->port_mux; |
361 | 284 | ||
362 | pmux &= ~(0x3 << (2 * gpio_sub_n(portno))); | 285 | pmux &= ~(0x3 << (2 * gpio_sub_n(ident))); |
363 | pmux |= (function & 0x3) << (2 * gpio_sub_n(portno)); | 286 | pmux |= (function & 0x3) << (2 * gpio_sub_n(ident)); |
364 | 287 | ||
365 | gpio_array[gpio_bank(portno)]->port_mux = pmux; | 288 | gpio_array[gpio_bank(ident)]->port_mux = pmux; |
366 | } | 289 | } |
367 | 290 | ||
368 | inline u16 get_portmux(unsigned short portno) | 291 | inline u16 get_portmux(unsigned short per) |
369 | { | 292 | { |
370 | u32 pmux; | 293 | u32 pmux; |
294 | u16 ident = P_IDENT(per); | ||
371 | 295 | ||
372 | pmux = gpio_array[gpio_bank(portno)]->port_mux; | 296 | pmux = gpio_array[gpio_bank(ident)]->port_mux; |
373 | 297 | ||
374 | return (pmux >> (2 * gpio_sub_n(portno)) & 0x3); | 298 | return (pmux >> (2 * gpio_sub_n(ident)) & 0x3); |
375 | } | 299 | } |
376 | #elif defined(BF527_FAMILY) || defined(BF518_FAMILY) | 300 | #elif defined(BF527_FAMILY) || defined(BF518_FAMILY) |
377 | inline void portmux_setup(unsigned short portno, unsigned short function) | 301 | inline void portmux_setup(unsigned short per) |
378 | { | 302 | { |
379 | u16 pmux, ident = P_IDENT(portno); | 303 | u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per); |
380 | u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)]; | 304 | u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)]; |
381 | 305 | ||
382 | pmux = *port_mux[gpio_bank(ident)]; | 306 | pmux = *port_mux[gpio_bank(ident)]; |
@@ -424,90 +348,71 @@ void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ | |||
424 | unsigned long flags; \ | 348 | unsigned long flags; \ |
425 | local_irq_save_hw(flags); \ | 349 | local_irq_save_hw(flags); \ |
426 | if (arg) \ | 350 | if (arg) \ |
427 | gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \ | 351 | gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \ |
428 | else \ | 352 | else \ |
429 | gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \ | 353 | gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \ |
430 | AWA_DUMMY_READ(name); \ | 354 | AWA_DUMMY_READ(name); \ |
431 | local_irq_restore_hw(flags); \ | 355 | local_irq_restore_hw(flags); \ |
432 | } \ | 356 | } \ |
433 | EXPORT_SYMBOL(set_gpio_ ## name); | 357 | EXPORT_SYMBOL(set_gpio_ ## name); |
434 | 358 | ||
435 | SET_GPIO(dir) | 359 | SET_GPIO(dir) /* set_gpio_dir() */ |
436 | SET_GPIO(inen) | 360 | SET_GPIO(inen) /* set_gpio_inen() */ |
437 | SET_GPIO(polar) | 361 | SET_GPIO(polar) /* set_gpio_polar() */ |
438 | SET_GPIO(edge) | 362 | SET_GPIO(edge) /* set_gpio_edge() */ |
439 | SET_GPIO(both) | 363 | SET_GPIO(both) /* set_gpio_both() */ |
440 | 364 | ||
441 | 365 | ||
442 | #if ANOMALY_05000311 || ANOMALY_05000323 | ||
443 | #define SET_GPIO_SC(name) \ | 366 | #define SET_GPIO_SC(name) \ |
444 | void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ | 367 | void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ |
445 | { \ | 368 | { \ |
446 | unsigned long flags; \ | 369 | unsigned long flags; \ |
447 | local_irq_save_hw(flags); \ | 370 | if (ANOMALY_05000311 || ANOMALY_05000323) \ |
448 | if (arg) \ | 371 | local_irq_save_hw(flags); \ |
449 | gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ | ||
450 | else \ | ||
451 | gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \ | ||
452 | AWA_DUMMY_READ(name); \ | ||
453 | local_irq_restore_hw(flags); \ | ||
454 | } \ | ||
455 | EXPORT_SYMBOL(set_gpio_ ## name); | ||
456 | #else | ||
457 | #define SET_GPIO_SC(name) \ | ||
458 | void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ | ||
459 | { \ | ||
460 | if (arg) \ | 372 | if (arg) \ |
461 | gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ | 373 | gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ |
462 | else \ | 374 | else \ |
463 | gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \ | 375 | gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \ |
376 | if (ANOMALY_05000311 || ANOMALY_05000323) { \ | ||
377 | AWA_DUMMY_READ(name); \ | ||
378 | local_irq_restore_hw(flags); \ | ||
379 | } \ | ||
464 | } \ | 380 | } \ |
465 | EXPORT_SYMBOL(set_gpio_ ## name); | 381 | EXPORT_SYMBOL(set_gpio_ ## name); |
466 | #endif | ||
467 | 382 | ||
468 | SET_GPIO_SC(maska) | 383 | SET_GPIO_SC(maska) |
469 | SET_GPIO_SC(maskb) | 384 | SET_GPIO_SC(maskb) |
470 | SET_GPIO_SC(data) | 385 | SET_GPIO_SC(data) |
471 | 386 | ||
472 | #if ANOMALY_05000311 || ANOMALY_05000323 | ||
473 | void set_gpio_toggle(unsigned gpio) | 387 | void set_gpio_toggle(unsigned gpio) |
474 | { | 388 | { |
475 | unsigned long flags; | 389 | unsigned long flags; |
476 | local_irq_save_hw(flags); | 390 | if (ANOMALY_05000311 || ANOMALY_05000323) |
477 | gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio); | 391 | local_irq_save_hw(flags); |
478 | AWA_DUMMY_READ(toggle); | 392 | gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio); |
479 | local_irq_restore_hw(flags); | 393 | if (ANOMALY_05000311 || ANOMALY_05000323) { |
480 | } | 394 | AWA_DUMMY_READ(toggle); |
481 | #else | 395 | local_irq_restore_hw(flags); |
482 | void set_gpio_toggle(unsigned gpio) | 396 | } |
483 | { | ||
484 | gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio); | ||
485 | } | 397 | } |
486 | #endif | ||
487 | EXPORT_SYMBOL(set_gpio_toggle); | 398 | EXPORT_SYMBOL(set_gpio_toggle); |
488 | 399 | ||
489 | 400 | ||
490 | /*Set current PORT date (16-bit word)*/ | 401 | /*Set current PORT date (16-bit word)*/ |
491 | 402 | ||
492 | #if ANOMALY_05000311 || ANOMALY_05000323 | ||
493 | #define SET_GPIO_P(name) \ | 403 | #define SET_GPIO_P(name) \ |
494 | void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \ | 404 | void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \ |
495 | { \ | 405 | { \ |
496 | unsigned long flags; \ | 406 | unsigned long flags; \ |
497 | local_irq_save_hw(flags); \ | 407 | if (ANOMALY_05000311 || ANOMALY_05000323) \ |
498 | gpio_bankb[gpio_bank(gpio)]->name = arg; \ | 408 | local_irq_save_hw(flags); \ |
499 | AWA_DUMMY_READ(name); \ | 409 | gpio_array[gpio_bank(gpio)]->name = arg; \ |
500 | local_irq_restore_hw(flags); \ | 410 | if (ANOMALY_05000311 || ANOMALY_05000323) { \ |
411 | AWA_DUMMY_READ(name); \ | ||
412 | local_irq_restore_hw(flags); \ | ||
413 | } \ | ||
501 | } \ | 414 | } \ |
502 | EXPORT_SYMBOL(set_gpiop_ ## name); | 415 | EXPORT_SYMBOL(set_gpiop_ ## name); |
503 | #else | ||
504 | #define SET_GPIO_P(name) \ | ||
505 | void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \ | ||
506 | { \ | ||
507 | gpio_bankb[gpio_bank(gpio)]->name = arg; \ | ||
508 | } \ | ||
509 | EXPORT_SYMBOL(set_gpiop_ ## name); | ||
510 | #endif | ||
511 | 416 | ||
512 | SET_GPIO_P(data) | 417 | SET_GPIO_P(data) |
513 | SET_GPIO_P(dir) | 418 | SET_GPIO_P(dir) |
@@ -519,27 +424,21 @@ SET_GPIO_P(maska) | |||
519 | SET_GPIO_P(maskb) | 424 | SET_GPIO_P(maskb) |
520 | 425 | ||
521 | /* Get a specific bit */ | 426 | /* Get a specific bit */ |
522 | #if ANOMALY_05000311 || ANOMALY_05000323 | ||
523 | #define GET_GPIO(name) \ | 427 | #define GET_GPIO(name) \ |
524 | unsigned short get_gpio_ ## name(unsigned gpio) \ | 428 | unsigned short get_gpio_ ## name(unsigned gpio) \ |
525 | { \ | 429 | { \ |
526 | unsigned long flags; \ | 430 | unsigned long flags; \ |
527 | unsigned short ret; \ | 431 | unsigned short ret; \ |
528 | local_irq_save_hw(flags); \ | 432 | if (ANOMALY_05000311 || ANOMALY_05000323) \ |
529 | ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \ | 433 | local_irq_save_hw(flags); \ |
530 | AWA_DUMMY_READ(name); \ | 434 | ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \ |
531 | local_irq_restore_hw(flags); \ | 435 | if (ANOMALY_05000311 || ANOMALY_05000323) { \ |
436 | AWA_DUMMY_READ(name); \ | ||
437 | local_irq_restore_hw(flags); \ | ||
438 | } \ | ||
532 | return ret; \ | 439 | return ret; \ |
533 | } \ | 440 | } \ |
534 | EXPORT_SYMBOL(get_gpio_ ## name); | 441 | EXPORT_SYMBOL(get_gpio_ ## name); |
535 | #else | ||
536 | #define GET_GPIO(name) \ | ||
537 | unsigned short get_gpio_ ## name(unsigned gpio) \ | ||
538 | { \ | ||
539 | return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \ | ||
540 | } \ | ||
541 | EXPORT_SYMBOL(get_gpio_ ## name); | ||
542 | #endif | ||
543 | 442 | ||
544 | GET_GPIO(data) | 443 | GET_GPIO(data) |
545 | GET_GPIO(dir) | 444 | GET_GPIO(dir) |
@@ -552,27 +451,21 @@ GET_GPIO(maskb) | |||
552 | 451 | ||
553 | /*Get current PORT date (16-bit word)*/ | 452 | /*Get current PORT date (16-bit word)*/ |
554 | 453 | ||
555 | #if ANOMALY_05000311 || ANOMALY_05000323 | ||
556 | #define GET_GPIO_P(name) \ | 454 | #define GET_GPIO_P(name) \ |
557 | unsigned short get_gpiop_ ## name(unsigned gpio) \ | 455 | unsigned short get_gpiop_ ## name(unsigned gpio) \ |
558 | { \ | 456 | { \ |
559 | unsigned long flags; \ | 457 | unsigned long flags; \ |
560 | unsigned short ret; \ | 458 | unsigned short ret; \ |
561 | local_irq_save_hw(flags); \ | 459 | if (ANOMALY_05000311 || ANOMALY_05000323) \ |
562 | ret = (gpio_bankb[gpio_bank(gpio)]->name); \ | 460 | local_irq_save_hw(flags); \ |
563 | AWA_DUMMY_READ(name); \ | 461 | ret = (gpio_array[gpio_bank(gpio)]->name); \ |
564 | local_irq_restore_hw(flags); \ | 462 | if (ANOMALY_05000311 || ANOMALY_05000323) { \ |
463 | AWA_DUMMY_READ(name); \ | ||
464 | local_irq_restore_hw(flags); \ | ||
465 | } \ | ||
565 | return ret; \ | 466 | return ret; \ |
566 | } \ | 467 | } \ |
567 | EXPORT_SYMBOL(get_gpiop_ ## name); | 468 | EXPORT_SYMBOL(get_gpiop_ ## name); |
568 | #else | ||
569 | #define GET_GPIO_P(name) \ | ||
570 | unsigned short get_gpiop_ ## name(unsigned gpio) \ | ||
571 | { \ | ||
572 | return (gpio_bankb[gpio_bank(gpio)]->name);\ | ||
573 | } \ | ||
574 | EXPORT_SYMBOL(get_gpiop_ ## name); | ||
575 | #endif | ||
576 | 469 | ||
577 | GET_GPIO_P(data) | 470 | GET_GPIO_P(data) |
578 | GET_GPIO_P(dir) | 471 | GET_GPIO_P(dir) |
@@ -585,6 +478,26 @@ GET_GPIO_P(maskb) | |||
585 | 478 | ||
586 | 479 | ||
587 | #ifdef CONFIG_PM | 480 | #ifdef CONFIG_PM |
481 | |||
482 | static unsigned short wakeup_map[GPIO_BANK_NUM]; | ||
483 | static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS]; | ||
484 | |||
485 | static const unsigned int sic_iwr_irqs[] = { | ||
486 | #if defined(BF533_FAMILY) | ||
487 | IRQ_PROG_INTB | ||
488 | #elif defined(BF537_FAMILY) | ||
489 | IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX | ||
490 | #elif defined(BF538_FAMILY) | ||
491 | IRQ_PORTF_INTB | ||
492 | #elif defined(BF527_FAMILY) || defined(BF518_FAMILY) | ||
493 | IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB | ||
494 | #elif defined(BF561_FAMILY) | ||
495 | IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB | ||
496 | #else | ||
497 | # error no SIC_IWR defined | ||
498 | #endif | ||
499 | }; | ||
500 | |||
588 | /*********************************************************** | 501 | /*********************************************************** |
589 | * | 502 | * |
590 | * FUNCTIONS: Blackfin PM Setup API | 503 | * FUNCTIONS: Blackfin PM Setup API |
@@ -669,18 +582,18 @@ u32 bfin_pm_standby_setup(void) | |||
669 | mask = wakeup_map[gpio_bank(i)]; | 582 | mask = wakeup_map[gpio_bank(i)]; |
670 | bank = gpio_bank(i); | 583 | bank = gpio_bank(i); |
671 | 584 | ||
672 | gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb; | 585 | gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb; |
673 | gpio_bankb[bank]->maskb = 0; | 586 | gpio_array[bank]->maskb = 0; |
674 | 587 | ||
675 | if (mask) { | 588 | if (mask) { |
676 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) | 589 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) |
677 | gpio_bank_saved[bank].fer = *port_fer[bank]; | 590 | gpio_bank_saved[bank].fer = *port_fer[bank]; |
678 | #endif | 591 | #endif |
679 | gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen; | 592 | gpio_bank_saved[bank].inen = gpio_array[bank]->inen; |
680 | gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar; | 593 | gpio_bank_saved[bank].polar = gpio_array[bank]->polar; |
681 | gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir; | 594 | gpio_bank_saved[bank].dir = gpio_array[bank]->dir; |
682 | gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge; | 595 | gpio_bank_saved[bank].edge = gpio_array[bank]->edge; |
683 | gpio_bank_saved[bank].both = gpio_bankb[bank]->both; | 596 | gpio_bank_saved[bank].both = gpio_array[bank]->both; |
684 | gpio_bank_saved[bank].reserved = | 597 | gpio_bank_saved[bank].reserved = |
685 | reserved_gpio_map[bank]; | 598 | reserved_gpio_map[bank]; |
686 | 599 | ||
@@ -700,7 +613,7 @@ u32 bfin_pm_standby_setup(void) | |||
700 | } | 613 | } |
701 | 614 | ||
702 | bfin_internal_set_wake(sic_iwr_irqs[bank], 1); | 615 | bfin_internal_set_wake(sic_iwr_irqs[bank], 1); |
703 | gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)]; | 616 | gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)]; |
704 | } | 617 | } |
705 | } | 618 | } |
706 | 619 | ||
@@ -721,18 +634,18 @@ void bfin_pm_standby_restore(void) | |||
721 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) | 634 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) |
722 | *port_fer[bank] = gpio_bank_saved[bank].fer; | 635 | *port_fer[bank] = gpio_bank_saved[bank].fer; |
723 | #endif | 636 | #endif |
724 | gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen; | 637 | gpio_array[bank]->inen = gpio_bank_saved[bank].inen; |
725 | gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir; | 638 | gpio_array[bank]->dir = gpio_bank_saved[bank].dir; |
726 | gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar; | 639 | gpio_array[bank]->polar = gpio_bank_saved[bank].polar; |
727 | gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge; | 640 | gpio_array[bank]->edge = gpio_bank_saved[bank].edge; |
728 | gpio_bankb[bank]->both = gpio_bank_saved[bank].both; | 641 | gpio_array[bank]->both = gpio_bank_saved[bank].both; |
729 | 642 | ||
730 | reserved_gpio_map[bank] = | 643 | reserved_gpio_map[bank] = |
731 | gpio_bank_saved[bank].reserved; | 644 | gpio_bank_saved[bank].reserved; |
732 | bfin_internal_set_wake(sic_iwr_irqs[bank], 0); | 645 | bfin_internal_set_wake(sic_iwr_irqs[bank], 0); |
733 | } | 646 | } |
734 | 647 | ||
735 | gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb; | 648 | gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb; |
736 | } | 649 | } |
737 | AWA_DUMMY_READ(maskb); | 650 | AWA_DUMMY_READ(maskb); |
738 | } | 651 | } |
@@ -745,21 +658,21 @@ void bfin_gpio_pm_hibernate_suspend(void) | |||
745 | bank = gpio_bank(i); | 658 | bank = gpio_bank(i); |
746 | 659 | ||
747 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) | 660 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) |
748 | gpio_bank_saved[bank].fer = *port_fer[bank]; | 661 | gpio_bank_saved[bank].fer = *port_fer[bank]; |
749 | #if defined(BF527_FAMILY) || defined(BF518_FAMILY) | 662 | #if defined(BF527_FAMILY) || defined(BF518_FAMILY) |
750 | gpio_bank_saved[bank].mux = *port_mux[bank]; | 663 | gpio_bank_saved[bank].mux = *port_mux[bank]; |
751 | #else | 664 | #else |
752 | if (bank == 0) | 665 | if (bank == 0) |
753 | gpio_bank_saved[bank].mux = bfin_read_PORT_MUX(); | 666 | gpio_bank_saved[bank].mux = bfin_read_PORT_MUX(); |
754 | #endif | 667 | #endif |
755 | #endif | 668 | #endif |
756 | gpio_bank_saved[bank].data = gpio_bankb[bank]->data; | 669 | gpio_bank_saved[bank].data = gpio_array[bank]->data; |
757 | gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen; | 670 | gpio_bank_saved[bank].inen = gpio_array[bank]->inen; |
758 | gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar; | 671 | gpio_bank_saved[bank].polar = gpio_array[bank]->polar; |
759 | gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir; | 672 | gpio_bank_saved[bank].dir = gpio_array[bank]->dir; |
760 | gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge; | 673 | gpio_bank_saved[bank].edge = gpio_array[bank]->edge; |
761 | gpio_bank_saved[bank].both = gpio_bankb[bank]->both; | 674 | gpio_bank_saved[bank].both = gpio_array[bank]->both; |
762 | gpio_bank_saved[bank].maska = gpio_bankb[bank]->maska; | 675 | gpio_bank_saved[bank].maska = gpio_array[bank]->maska; |
763 | } | 676 | } |
764 | 677 | ||
765 | AWA_DUMMY_READ(maska); | 678 | AWA_DUMMY_READ(maska); |
@@ -770,27 +683,27 @@ void bfin_gpio_pm_hibernate_restore(void) | |||
770 | int i, bank; | 683 | int i, bank; |
771 | 684 | ||
772 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | 685 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { |
773 | bank = gpio_bank(i); | 686 | bank = gpio_bank(i); |
774 | 687 | ||
775 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) | 688 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) |
776 | #if defined(BF527_FAMILY) || defined(BF518_FAMILY) | 689 | #if defined(BF527_FAMILY) || defined(BF518_FAMILY) |
777 | *port_mux[bank] = gpio_bank_saved[bank].mux; | 690 | *port_mux[bank] = gpio_bank_saved[bank].mux; |
778 | #else | 691 | #else |
779 | if (bank == 0) | 692 | if (bank == 0) |
780 | bfin_write_PORT_MUX(gpio_bank_saved[bank].mux); | 693 | bfin_write_PORT_MUX(gpio_bank_saved[bank].mux); |
781 | #endif | 694 | #endif |
782 | *port_fer[bank] = gpio_bank_saved[bank].fer; | 695 | *port_fer[bank] = gpio_bank_saved[bank].fer; |
783 | #endif | 696 | #endif |
784 | gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen; | 697 | gpio_array[bank]->inen = gpio_bank_saved[bank].inen; |
785 | gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir; | 698 | gpio_array[bank]->dir = gpio_bank_saved[bank].dir; |
786 | gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar; | 699 | gpio_array[bank]->polar = gpio_bank_saved[bank].polar; |
787 | gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge; | 700 | gpio_array[bank]->edge = gpio_bank_saved[bank].edge; |
788 | gpio_bankb[bank]->both = gpio_bank_saved[bank].both; | 701 | gpio_array[bank]->both = gpio_bank_saved[bank].both; |
789 | 702 | ||
790 | gpio_bankb[bank]->data_set = gpio_bank_saved[bank].data | 703 | gpio_array[bank]->data_set = gpio_bank_saved[bank].data |
791 | | gpio_bank_saved[bank].dir; | 704 | | gpio_bank_saved[bank].dir; |
792 | 705 | ||
793 | gpio_bankb[bank]->maska = gpio_bank_saved[bank].maska; | 706 | gpio_array[bank]->maska = gpio_bank_saved[bank].maska; |
794 | } | 707 | } |
795 | AWA_DUMMY_READ(maska); | 708 | AWA_DUMMY_READ(maska); |
796 | } | 709 | } |
@@ -817,12 +730,12 @@ void bfin_gpio_pm_hibernate_suspend(void) | |||
817 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | 730 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { |
818 | bank = gpio_bank(i); | 731 | bank = gpio_bank(i); |
819 | 732 | ||
820 | gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer; | 733 | gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer; |
821 | gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux; | 734 | gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux; |
822 | gpio_bank_saved[bank].data = gpio_array[bank]->port_data; | 735 | gpio_bank_saved[bank].data = gpio_array[bank]->data; |
823 | gpio_bank_saved[bank].data = gpio_array[bank]->port_data; | 736 | gpio_bank_saved[bank].data = gpio_array[bank]->data; |
824 | gpio_bank_saved[bank].inen = gpio_array[bank]->port_inen; | 737 | gpio_bank_saved[bank].inen = gpio_array[bank]->inen; |
825 | gpio_bank_saved[bank].dir = gpio_array[bank]->port_dir_set; | 738 | gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set; |
826 | } | 739 | } |
827 | } | 740 | } |
828 | 741 | ||
@@ -831,21 +744,21 @@ void bfin_gpio_pm_hibernate_restore(void) | |||
831 | int i, bank; | 744 | int i, bank; |
832 | 745 | ||
833 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { | 746 | for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { |
834 | bank = gpio_bank(i); | 747 | bank = gpio_bank(i); |
835 | 748 | ||
836 | gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux; | 749 | gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux; |
837 | gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer; | 750 | gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer; |
838 | gpio_array[bank]->port_inen = gpio_bank_saved[bank].inen; | 751 | gpio_array[bank]->inen = gpio_bank_saved[bank].inen; |
839 | gpio_array[bank]->port_dir_set = gpio_bank_saved[bank].dir; | 752 | gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir; |
840 | gpio_array[bank]->port_set = gpio_bank_saved[bank].data | 753 | gpio_array[bank]->data_set = gpio_bank_saved[bank].data |
841 | | gpio_bank_saved[bank].dir; | 754 | | gpio_bank_saved[bank].dir; |
842 | } | 755 | } |
843 | } | 756 | } |
844 | #endif | 757 | #endif |
845 | 758 | ||
846 | unsigned short get_gpio_dir(unsigned gpio) | 759 | unsigned short get_gpio_dir(unsigned gpio) |
847 | { | 760 | { |
848 | return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio))); | 761 | return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio))); |
849 | } | 762 | } |
850 | EXPORT_SYMBOL(get_gpio_dir); | 763 | EXPORT_SYMBOL(get_gpio_dir); |
851 | 764 | ||
@@ -905,9 +818,7 @@ int peripheral_request(unsigned short per, const char *label) | |||
905 | */ | 818 | */ |
906 | 819 | ||
907 | #ifdef BF548_FAMILY | 820 | #ifdef BF548_FAMILY |
908 | u16 funct = get_portmux(ident); | 821 | if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) { |
909 | |||
910 | if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) { | ||
911 | #else | 822 | #else |
912 | if (!(per & P_MAYSHARE)) { | 823 | if (!(per & P_MAYSHARE)) { |
913 | #endif | 824 | #endif |
@@ -931,11 +842,7 @@ int peripheral_request(unsigned short per, const char *label) | |||
931 | anyway: | 842 | anyway: |
932 | reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident); | 843 | reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident); |
933 | 844 | ||
934 | #ifdef BF548_FAMILY | 845 | portmux_setup(per); |
935 | portmux_setup(ident, P_FUNCT2MUX(per)); | ||
936 | #else | ||
937 | portmux_setup(per, P_FUNCT2MUX(per)); | ||
938 | #endif | ||
939 | port_setup(ident, PERIPHERAL_USAGE); | 846 | port_setup(ident, PERIPHERAL_USAGE); |
940 | 847 | ||
941 | local_irq_restore_hw(flags); | 848 | local_irq_restore_hw(flags); |
@@ -977,9 +884,6 @@ void peripheral_free(unsigned short per) | |||
977 | if (!(per & P_DEFINED)) | 884 | if (!(per & P_DEFINED)) |
978 | return; | 885 | return; |
979 | 886 | ||
980 | if (check_gpio(ident) < 0) | ||
981 | return; | ||
982 | |||
983 | local_irq_save_hw(flags); | 887 | local_irq_save_hw(flags); |
984 | 888 | ||
985 | if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) { | 889 | if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) { |
@@ -1056,9 +960,15 @@ int bfin_gpio_request(unsigned gpio, const char *label) | |||
1056 | local_irq_restore_hw(flags); | 960 | local_irq_restore_hw(flags); |
1057 | return -EBUSY; | 961 | return -EBUSY; |
1058 | } | 962 | } |
1059 | if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) | 963 | if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) { |
1060 | printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!" | 964 | printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!" |
1061 | " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio); | 965 | " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio); |
966 | } | ||
967 | #ifndef BF548_FAMILY | ||
968 | else { /* Reset POLAR setting when acquiring a gpio for the first time */ | ||
969 | set_gpio_polar(gpio, 0); | ||
970 | } | ||
971 | #endif | ||
1062 | 972 | ||
1063 | reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio); | 973 | reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio); |
1064 | set_label(gpio, label); | 974 | set_label(gpio, label); |
@@ -1078,6 +988,8 @@ void bfin_gpio_free(unsigned gpio) | |||
1078 | if (check_gpio(gpio) < 0) | 988 | if (check_gpio(gpio) < 0) |
1079 | return; | 989 | return; |
1080 | 990 | ||
991 | might_sleep(); | ||
992 | |||
1081 | local_irq_save_hw(flags); | 993 | local_irq_save_hw(flags); |
1082 | 994 | ||
1083 | if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) { | 995 | if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) { |
@@ -1158,8 +1070,16 @@ void bfin_gpio_irq_free(unsigned gpio) | |||
1158 | local_irq_restore_hw(flags); | 1070 | local_irq_restore_hw(flags); |
1159 | } | 1071 | } |
1160 | 1072 | ||
1161 | 1073 | static inline void __bfin_gpio_direction_input(unsigned gpio) | |
1074 | { | ||
1162 | #ifdef BF548_FAMILY | 1075 | #ifdef BF548_FAMILY |
1076 | gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio); | ||
1077 | #else | ||
1078 | gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio); | ||
1079 | #endif | ||
1080 | gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio); | ||
1081 | } | ||
1082 | |||
1163 | int bfin_gpio_direction_input(unsigned gpio) | 1083 | int bfin_gpio_direction_input(unsigned gpio) |
1164 | { | 1084 | { |
1165 | unsigned long flags; | 1085 | unsigned long flags; |
@@ -1170,125 +1090,85 @@ int bfin_gpio_direction_input(unsigned gpio) | |||
1170 | } | 1090 | } |
1171 | 1091 | ||
1172 | local_irq_save_hw(flags); | 1092 | local_irq_save_hw(flags); |
1173 | gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio); | 1093 | __bfin_gpio_direction_input(gpio); |
1174 | gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio); | 1094 | AWA_DUMMY_READ(inen); |
1175 | local_irq_restore_hw(flags); | 1095 | local_irq_restore_hw(flags); |
1176 | 1096 | ||
1177 | return 0; | 1097 | return 0; |
1178 | } | 1098 | } |
1179 | EXPORT_SYMBOL(bfin_gpio_direction_input); | 1099 | EXPORT_SYMBOL(bfin_gpio_direction_input); |
1180 | 1100 | ||
1181 | int bfin_gpio_direction_output(unsigned gpio, int value) | 1101 | void bfin_gpio_irq_prepare(unsigned gpio) |
1182 | { | 1102 | { |
1103 | #ifdef BF548_FAMILY | ||
1183 | unsigned long flags; | 1104 | unsigned long flags; |
1105 | #endif | ||
1184 | 1106 | ||
1185 | if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { | 1107 | port_setup(gpio, GPIO_USAGE); |
1186 | gpio_error(gpio); | ||
1187 | return -EINVAL; | ||
1188 | } | ||
1189 | 1108 | ||
1109 | #ifdef BF548_FAMILY | ||
1190 | local_irq_save_hw(flags); | 1110 | local_irq_save_hw(flags); |
1191 | gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio); | 1111 | __bfin_gpio_direction_input(gpio); |
1192 | gpio_set_value(gpio, value); | ||
1193 | gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio); | ||
1194 | local_irq_restore_hw(flags); | 1112 | local_irq_restore_hw(flags); |
1195 | 1113 | #endif | |
1196 | return 0; | ||
1197 | } | 1114 | } |
1198 | EXPORT_SYMBOL(bfin_gpio_direction_output); | ||
1199 | 1115 | ||
1200 | void bfin_gpio_set_value(unsigned gpio, int arg) | 1116 | void bfin_gpio_set_value(unsigned gpio, int arg) |
1201 | { | 1117 | { |
1202 | if (arg) | 1118 | if (arg) |
1203 | gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio); | 1119 | gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); |
1204 | else | 1120 | else |
1205 | gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio); | 1121 | gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio); |
1206 | } | 1122 | } |
1207 | EXPORT_SYMBOL(bfin_gpio_set_value); | 1123 | EXPORT_SYMBOL(bfin_gpio_set_value); |
1208 | 1124 | ||
1209 | int bfin_gpio_get_value(unsigned gpio) | 1125 | int bfin_gpio_direction_output(unsigned gpio, int value) |
1210 | { | ||
1211 | return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio))); | ||
1212 | } | ||
1213 | EXPORT_SYMBOL(bfin_gpio_get_value); | ||
1214 | |||
1215 | void bfin_gpio_irq_prepare(unsigned gpio) | ||
1216 | { | 1126 | { |
1217 | unsigned long flags; | 1127 | unsigned long flags; |
1218 | 1128 | ||
1219 | port_setup(gpio, GPIO_USAGE); | 1129 | if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { |
1130 | gpio_error(gpio); | ||
1131 | return -EINVAL; | ||
1132 | } | ||
1220 | 1133 | ||
1221 | local_irq_save_hw(flags); | 1134 | local_irq_save_hw(flags); |
1222 | gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio); | ||
1223 | gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio); | ||
1224 | local_irq_restore_hw(flags); | ||
1225 | } | ||
1226 | 1135 | ||
1136 | gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); | ||
1137 | gpio_set_value(gpio, value); | ||
1138 | #ifdef BF548_FAMILY | ||
1139 | gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio); | ||
1227 | #else | 1140 | #else |
1141 | gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio); | ||
1142 | #endif | ||
1143 | |||
1144 | AWA_DUMMY_READ(dir); | ||
1145 | local_irq_restore_hw(flags); | ||
1146 | |||
1147 | return 0; | ||
1148 | } | ||
1149 | EXPORT_SYMBOL(bfin_gpio_direction_output); | ||
1228 | 1150 | ||
1229 | int bfin_gpio_get_value(unsigned gpio) | 1151 | int bfin_gpio_get_value(unsigned gpio) |
1230 | { | 1152 | { |
1153 | #ifdef BF548_FAMILY | ||
1154 | return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio))); | ||
1155 | #else | ||
1231 | unsigned long flags; | 1156 | unsigned long flags; |
1232 | int ret; | ||
1233 | 1157 | ||
1234 | if (unlikely(get_gpio_edge(gpio))) { | 1158 | if (unlikely(get_gpio_edge(gpio))) { |
1159 | int ret; | ||
1235 | local_irq_save_hw(flags); | 1160 | local_irq_save_hw(flags); |
1236 | set_gpio_edge(gpio, 0); | 1161 | set_gpio_edge(gpio, 0); |
1237 | ret = get_gpio_data(gpio); | 1162 | ret = get_gpio_data(gpio); |
1238 | set_gpio_edge(gpio, 1); | 1163 | set_gpio_edge(gpio, 1); |
1239 | local_irq_restore_hw(flags); | 1164 | local_irq_restore_hw(flags); |
1240 | |||
1241 | return ret; | 1165 | return ret; |
1242 | } else | 1166 | } else |
1243 | return get_gpio_data(gpio); | 1167 | return get_gpio_data(gpio); |
1168 | #endif | ||
1244 | } | 1169 | } |
1245 | EXPORT_SYMBOL(bfin_gpio_get_value); | 1170 | EXPORT_SYMBOL(bfin_gpio_get_value); |
1246 | 1171 | ||
1247 | |||
1248 | int bfin_gpio_direction_input(unsigned gpio) | ||
1249 | { | ||
1250 | unsigned long flags; | ||
1251 | |||
1252 | if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { | ||
1253 | gpio_error(gpio); | ||
1254 | return -EINVAL; | ||
1255 | } | ||
1256 | |||
1257 | local_irq_save_hw(flags); | ||
1258 | gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio); | ||
1259 | gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio); | ||
1260 | AWA_DUMMY_READ(inen); | ||
1261 | local_irq_restore_hw(flags); | ||
1262 | |||
1263 | return 0; | ||
1264 | } | ||
1265 | EXPORT_SYMBOL(bfin_gpio_direction_input); | ||
1266 | |||
1267 | int bfin_gpio_direction_output(unsigned gpio, int value) | ||
1268 | { | ||
1269 | unsigned long flags; | ||
1270 | |||
1271 | if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { | ||
1272 | gpio_error(gpio); | ||
1273 | return -EINVAL; | ||
1274 | } | ||
1275 | |||
1276 | local_irq_save_hw(flags); | ||
1277 | gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); | ||
1278 | |||
1279 | if (value) | ||
1280 | gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio); | ||
1281 | else | ||
1282 | gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio); | ||
1283 | |||
1284 | gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio); | ||
1285 | AWA_DUMMY_READ(dir); | ||
1286 | local_irq_restore_hw(flags); | ||
1287 | |||
1288 | return 0; | ||
1289 | } | ||
1290 | EXPORT_SYMBOL(bfin_gpio_direction_output); | ||
1291 | |||
1292 | /* If we are booting from SPI and our board lacks a strong enough pull up, | 1172 | /* If we are booting from SPI and our board lacks a strong enough pull up, |
1293 | * the core can reset and execute the bootrom faster than the resistor can | 1173 | * the core can reset and execute the bootrom faster than the resistor can |
1294 | * pull the signal logically high. To work around this (common) error in | 1174 | * pull the signal logically high. To work around this (common) error in |
@@ -1299,23 +1179,15 @@ EXPORT_SYMBOL(bfin_gpio_direction_output); | |||
1299 | * lives here as we need to force all the GPIO states w/out going through | 1179 | * lives here as we need to force all the GPIO states w/out going through |
1300 | * BUG() checks and such. | 1180 | * BUG() checks and such. |
1301 | */ | 1181 | */ |
1302 | void bfin_gpio_reset_spi0_ssel1(void) | 1182 | void bfin_reset_boot_spi_cs(unsigned short pin) |
1303 | { | 1183 | { |
1304 | u16 gpio = P_IDENT(P_SPI0_SSEL1); | 1184 | unsigned short gpio = P_IDENT(pin); |
1305 | |||
1306 | port_setup(gpio, GPIO_USAGE); | 1185 | port_setup(gpio, GPIO_USAGE); |
1307 | gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio); | 1186 | gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); |
1308 | AWA_DUMMY_READ(data_set); | 1187 | AWA_DUMMY_READ(data_set); |
1309 | udelay(1); | 1188 | udelay(1); |
1310 | } | 1189 | } |
1311 | 1190 | ||
1312 | void bfin_gpio_irq_prepare(unsigned gpio) | ||
1313 | { | ||
1314 | port_setup(gpio, GPIO_USAGE); | ||
1315 | } | ||
1316 | |||
1317 | #endif /*BF548_FAMILY */ | ||
1318 | |||
1319 | #if defined(CONFIG_PROC_FS) | 1191 | #if defined(CONFIG_PROC_FS) |
1320 | static int gpio_proc_read(char *buf, char **start, off_t offset, | 1192 | static int gpio_proc_read(char *buf, char **start, off_t offset, |
1321 | int len, int *unused_i, void *unused_v) | 1193 | int len, int *unused_i, void *unused_v) |
@@ -1369,11 +1241,7 @@ int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio) | |||
1369 | 1241 | ||
1370 | void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value) | 1242 | void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value) |
1371 | { | 1243 | { |
1372 | #ifdef BF548_FAMILY | ||
1373 | return bfin_gpio_set_value(gpio, value); | 1244 | return bfin_gpio_set_value(gpio, value); |
1374 | #else | ||
1375 | return set_gpio_data(gpio, value); | ||
1376 | #endif | ||
1377 | } | 1245 | } |
1378 | 1246 | ||
1379 | int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio) | 1247 | int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio) |
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index bdb958486e76..3e329a6ce041 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c | |||
@@ -63,10 +63,8 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) | |||
63 | dcplb_tbl[cpu][i_d].addr = 0; | 63 | dcplb_tbl[cpu][i_d].addr = 0; |
64 | dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | 64 | dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; |
65 | 65 | ||
66 | #if 0 | ||
67 | icplb_tbl[cpu][i_i].addr = 0; | 66 | icplb_tbl[cpu][i_i].addr = 0; |
68 | icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB; | 67 | icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB; |
69 | #endif | ||
70 | 68 | ||
71 | /* Cover kernel memory with 4M pages. */ | 69 | /* Cover kernel memory with 4M pages. */ |
72 | addr = 0; | 70 | addr = 0; |
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 0e28f7595733..d6c067782e63 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c | |||
@@ -53,9 +53,13 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) | |||
53 | 53 | ||
54 | i_d = i_i = 0; | 54 | i_d = i_i = 0; |
55 | 55 | ||
56 | #ifdef CONFIG_DEBUG_HUNT_FOR_ZERO | ||
56 | /* Set up the zero page. */ | 57 | /* Set up the zero page. */ |
57 | d_tbl[i_d].addr = 0; | 58 | d_tbl[i_d].addr = 0; |
58 | d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | 59 | d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; |
60 | i_tbl[i_i].addr = 0; | ||
61 | i_tbl[i_i++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | ||
62 | #endif | ||
59 | 63 | ||
60 | /* Cover kernel memory with 4M pages. */ | 64 | /* Cover kernel memory with 4M pages. */ |
61 | addr = 0; | 65 | addr = 0; |
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c index 376249ab2694..8cbb47c7b663 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c | |||
@@ -163,12 +163,14 @@ MGR_ATTR static int icplb_miss(int cpu) | |||
163 | nr_icplb_supv_miss[cpu]++; | 163 | nr_icplb_supv_miss[cpu]++; |
164 | 164 | ||
165 | base = 0; | 165 | base = 0; |
166 | for (idx = 0; idx < icplb_nr_bounds; idx++) { | 166 | idx = 0; |
167 | do { | ||
167 | eaddr = icplb_bounds[idx].eaddr; | 168 | eaddr = icplb_bounds[idx].eaddr; |
168 | if (addr < eaddr) | 169 | if (addr < eaddr) |
169 | break; | 170 | break; |
170 | base = eaddr; | 171 | base = eaddr; |
171 | } | 172 | } while (++idx < icplb_nr_bounds); |
173 | |||
172 | if (unlikely(idx == icplb_nr_bounds)) | 174 | if (unlikely(idx == icplb_nr_bounds)) |
173 | return CPLB_NO_ADDR_MATCH; | 175 | return CPLB_NO_ADDR_MATCH; |
174 | 176 | ||
@@ -208,12 +210,14 @@ MGR_ATTR static int dcplb_miss(int cpu) | |||
208 | nr_dcplb_supv_miss[cpu]++; | 210 | nr_dcplb_supv_miss[cpu]++; |
209 | 211 | ||
210 | base = 0; | 212 | base = 0; |
211 | for (idx = 0; idx < dcplb_nr_bounds; idx++) { | 213 | idx = 0; |
214 | do { | ||
212 | eaddr = dcplb_bounds[idx].eaddr; | 215 | eaddr = dcplb_bounds[idx].eaddr; |
213 | if (addr < eaddr) | 216 | if (addr < eaddr) |
214 | break; | 217 | break; |
215 | base = eaddr; | 218 | base = eaddr; |
216 | } | 219 | } while (++idx < dcplb_nr_bounds); |
220 | |||
217 | if (unlikely(idx == dcplb_nr_bounds)) | 221 | if (unlikely(idx == dcplb_nr_bounds)) |
218 | return CPLB_NO_ADDR_MATCH; | 222 | return CPLB_NO_ADDR_MATCH; |
219 | 223 | ||
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c index 339be5a3ae6a..a5de8d45424c 100644 --- a/arch/blackfin/kernel/ipipe.c +++ b/arch/blackfin/kernel/ipipe.c | |||
@@ -35,14 +35,8 @@ | |||
35 | #include <asm/atomic.h> | 35 | #include <asm/atomic.h> |
36 | #include <asm/io.h> | 36 | #include <asm/io.h> |
37 | 37 | ||
38 | static int create_irq_threads; | ||
39 | |||
40 | DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); | 38 | DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); |
41 | 39 | ||
42 | static DEFINE_PER_CPU(unsigned long, pending_irqthread_mask); | ||
43 | |||
44 | static DEFINE_PER_CPU(int [IVG13 + 1], pending_irq_count); | ||
45 | |||
46 | asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); | 40 | asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); |
47 | 41 | ||
48 | static void __ipipe_no_irqtail(void); | 42 | static void __ipipe_no_irqtail(void); |
@@ -93,6 +87,7 @@ void __ipipe_enable_pipeline(void) | |||
93 | */ | 87 | */ |
94 | void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) | 88 | void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) |
95 | { | 89 | { |
90 | struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr(); | ||
96 | struct ipipe_domain *this_domain, *next_domain; | 91 | struct ipipe_domain *this_domain, *next_domain; |
97 | struct list_head *head, *pos; | 92 | struct list_head *head, *pos; |
98 | int m_ack, s = -1; | 93 | int m_ack, s = -1; |
@@ -104,7 +99,6 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) | |||
104 | * interrupt. | 99 | * interrupt. |
105 | */ | 100 | */ |
106 | m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); | 101 | m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); |
107 | |||
108 | this_domain = ipipe_current_domain; | 102 | this_domain = ipipe_current_domain; |
109 | 103 | ||
110 | if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) | 104 | if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) |
@@ -114,49 +108,28 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) | |||
114 | next_domain = list_entry(head, struct ipipe_domain, p_link); | 108 | next_domain = list_entry(head, struct ipipe_domain, p_link); |
115 | if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { | 109 | if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { |
116 | if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) | 110 | if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) |
117 | next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); | 111 | next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); |
118 | if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) | 112 | if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) |
119 | s = __test_and_set_bit(IPIPE_STALL_FLAG, | 113 | s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); |
120 | &ipipe_root_cpudom_var(status)); | ||
121 | __ipipe_dispatch_wired(next_domain, irq); | 114 | __ipipe_dispatch_wired(next_domain, irq); |
122 | goto finalize; | 115 | goto out; |
123 | return; | ||
124 | } | 116 | } |
125 | } | 117 | } |
126 | 118 | ||
127 | /* Ack the interrupt. */ | 119 | /* Ack the interrupt. */ |
128 | 120 | ||
129 | pos = head; | 121 | pos = head; |
130 | |||
131 | while (pos != &__ipipe_pipeline) { | 122 | while (pos != &__ipipe_pipeline) { |
132 | next_domain = list_entry(pos, struct ipipe_domain, p_link); | 123 | next_domain = list_entry(pos, struct ipipe_domain, p_link); |
133 | /* | ||
134 | * For each domain handling the incoming IRQ, mark it | ||
135 | * as pending in its log. | ||
136 | */ | ||
137 | if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { | 124 | if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { |
138 | /* | ||
139 | * Domains that handle this IRQ are polled for | ||
140 | * acknowledging it by decreasing priority | ||
141 | * order. The interrupt must be made pending | ||
142 | * _first_ in the domain's status flags before | ||
143 | * the PIC is unlocked. | ||
144 | */ | ||
145 | __ipipe_set_irq_pending(next_domain, irq); | 125 | __ipipe_set_irq_pending(next_domain, irq); |
146 | |||
147 | if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { | 126 | if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { |
148 | next_domain->irqs[irq].acknowledge(irq, irq_desc + irq); | 127 | next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); |
149 | m_ack = 1; | 128 | m_ack = 1; |
150 | } | 129 | } |
151 | } | 130 | } |
152 | |||
153 | /* | ||
154 | * If the domain does not want the IRQ to be passed | ||
155 | * down the interrupt pipe, exit the loop now. | ||
156 | */ | ||
157 | if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) | 131 | if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) |
158 | break; | 132 | break; |
159 | |||
160 | pos = next_domain->p_link.next; | 133 | pos = next_domain->p_link.next; |
161 | } | 134 | } |
162 | 135 | ||
@@ -166,18 +139,24 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) | |||
166 | * immediately to the current domain if the interrupt has been | 139 | * immediately to the current domain if the interrupt has been |
167 | * marked as 'sticky'. This search does not go beyond the | 140 | * marked as 'sticky'. This search does not go beyond the |
168 | * current domain in the pipeline. We also enforce the | 141 | * current domain in the pipeline. We also enforce the |
169 | * additional root stage lock (blackfin-specific). */ | 142 | * additional root stage lock (blackfin-specific). |
143 | */ | ||
144 | if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) | ||
145 | s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); | ||
170 | 146 | ||
171 | if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)) | 147 | /* |
172 | s = __test_and_set_bit(IPIPE_STALL_FLAG, | 148 | * If the interrupt preempted the head domain, then do not |
173 | &ipipe_root_cpudom_var(status)); | 149 | * even try to walk the pipeline, unless an interrupt is |
174 | finalize: | 150 | * pending for it. |
151 | */ | ||
152 | if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) && | ||
153 | ipipe_head_cpudom_var(irqpend_himask) == 0) | ||
154 | goto out; | ||
175 | 155 | ||
176 | __ipipe_walk_pipeline(head); | 156 | __ipipe_walk_pipeline(head); |
177 | 157 | out: | |
178 | if (!s) | 158 | if (!s) |
179 | __clear_bit(IPIPE_STALL_FLAG, | 159 | __clear_bit(IPIPE_STALL_FLAG, &p->status); |
180 | &ipipe_root_cpudom_var(status)); | ||
181 | } | 160 | } |
182 | 161 | ||
183 | int __ipipe_check_root(void) | 162 | int __ipipe_check_root(void) |
@@ -187,7 +166,7 @@ int __ipipe_check_root(void) | |||
187 | 166 | ||
188 | void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) | 167 | void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) |
189 | { | 168 | { |
190 | struct irq_desc *desc = irq_desc + irq; | 169 | struct irq_desc *desc = irq_to_desc(irq); |
191 | int prio = desc->ic_prio; | 170 | int prio = desc->ic_prio; |
192 | 171 | ||
193 | desc->depth = 0; | 172 | desc->depth = 0; |
@@ -199,7 +178,7 @@ EXPORT_SYMBOL(__ipipe_enable_irqdesc); | |||
199 | 178 | ||
200 | void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) | 179 | void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) |
201 | { | 180 | { |
202 | struct irq_desc *desc = irq_desc + irq; | 181 | struct irq_desc *desc = irq_to_desc(irq); |
203 | int prio = desc->ic_prio; | 182 | int prio = desc->ic_prio; |
204 | 183 | ||
205 | if (ipd != &ipipe_root && | 184 | if (ipd != &ipipe_root && |
@@ -236,15 +215,18 @@ int __ipipe_syscall_root(struct pt_regs *regs) | |||
236 | { | 215 | { |
237 | unsigned long flags; | 216 | unsigned long flags; |
238 | 217 | ||
239 | /* We need to run the IRQ tail hook whenever we don't | 218 | /* |
219 | * We need to run the IRQ tail hook whenever we don't | ||
240 | * propagate a syscall to higher domains, because we know that | 220 | * propagate a syscall to higher domains, because we know that |
241 | * important operations might be pending there (e.g. Xenomai | 221 | * important operations might be pending there (e.g. Xenomai |
242 | * deferred rescheduling). */ | 222 | * deferred rescheduling). |
223 | */ | ||
243 | 224 | ||
244 | if (!__ipipe_syscall_watched_p(current, regs->orig_p0)) { | 225 | if (regs->orig_p0 < NR_syscalls) { |
245 | void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; | 226 | void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; |
246 | hook(); | 227 | hook(); |
247 | return 0; | 228 | if ((current->flags & PF_EVNOTIFY) == 0) |
229 | return 0; | ||
248 | } | 230 | } |
249 | 231 | ||
250 | /* | 232 | /* |
@@ -312,112 +294,46 @@ int ipipe_trigger_irq(unsigned irq) | |||
312 | { | 294 | { |
313 | unsigned long flags; | 295 | unsigned long flags; |
314 | 296 | ||
297 | #ifdef CONFIG_IPIPE_DEBUG | ||
315 | if (irq >= IPIPE_NR_IRQS || | 298 | if (irq >= IPIPE_NR_IRQS || |
316 | (ipipe_virtual_irq_p(irq) | 299 | (ipipe_virtual_irq_p(irq) |
317 | && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map))) | 300 | && !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map))) |
318 | return -EINVAL; | 301 | return -EINVAL; |
302 | #endif | ||
319 | 303 | ||
320 | local_irq_save_hw(flags); | 304 | local_irq_save_hw(flags); |
321 | |||
322 | __ipipe_handle_irq(irq, NULL); | 305 | __ipipe_handle_irq(irq, NULL); |
323 | |||
324 | local_irq_restore_hw(flags); | 306 | local_irq_restore_hw(flags); |
325 | 307 | ||
326 | return 1; | 308 | return 1; |
327 | } | 309 | } |
328 | 310 | ||
329 | /* Move Linux IRQ to threads. */ | 311 | asmlinkage void __ipipe_sync_root(void) |
330 | |||
331 | static int do_irqd(void *__desc) | ||
332 | { | 312 | { |
333 | struct irq_desc *desc = __desc; | 313 | unsigned long flags; |
334 | unsigned irq = desc - irq_desc; | ||
335 | int thrprio = desc->thr_prio; | ||
336 | int thrmask = 1 << thrprio; | ||
337 | int cpu = smp_processor_id(); | ||
338 | cpumask_t cpumask; | ||
339 | |||
340 | sigfillset(¤t->blocked); | ||
341 | current->flags |= PF_NOFREEZE; | ||
342 | cpumask = cpumask_of_cpu(cpu); | ||
343 | set_cpus_allowed(current, cpumask); | ||
344 | ipipe_setscheduler_root(current, SCHED_FIFO, 50 + thrprio); | ||
345 | |||
346 | while (!kthread_should_stop()) { | ||
347 | local_irq_disable(); | ||
348 | if (!(desc->status & IRQ_SCHEDULED)) { | ||
349 | set_current_state(TASK_INTERRUPTIBLE); | ||
350 | resched: | ||
351 | local_irq_enable(); | ||
352 | schedule(); | ||
353 | local_irq_disable(); | ||
354 | } | ||
355 | __set_current_state(TASK_RUNNING); | ||
356 | /* | ||
357 | * If higher priority interrupt servers are ready to | ||
358 | * run, reschedule immediately. We need this for the | ||
359 | * GPIO demux IRQ handler to unmask the interrupt line | ||
360 | * _last_, after all GPIO IRQs have run. | ||
361 | */ | ||
362 | if (per_cpu(pending_irqthread_mask, cpu) & ~(thrmask|(thrmask-1))) | ||
363 | goto resched; | ||
364 | if (--per_cpu(pending_irq_count[thrprio], cpu) == 0) | ||
365 | per_cpu(pending_irqthread_mask, cpu) &= ~thrmask; | ||
366 | desc->status &= ~IRQ_SCHEDULED; | ||
367 | desc->thr_handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); | ||
368 | local_irq_enable(); | ||
369 | } | ||
370 | __set_current_state(TASK_RUNNING); | ||
371 | return 0; | ||
372 | } | ||
373 | 314 | ||
374 | static void kick_irqd(unsigned irq, void *cookie) | 315 | BUG_ON(irqs_disabled()); |
375 | { | ||
376 | struct irq_desc *desc = irq_desc + irq; | ||
377 | int thrprio = desc->thr_prio; | ||
378 | int thrmask = 1 << thrprio; | ||
379 | int cpu = smp_processor_id(); | ||
380 | |||
381 | if (!(desc->status & IRQ_SCHEDULED)) { | ||
382 | desc->status |= IRQ_SCHEDULED; | ||
383 | per_cpu(pending_irqthread_mask, cpu) |= thrmask; | ||
384 | ++per_cpu(pending_irq_count[thrprio], cpu); | ||
385 | wake_up_process(desc->thread); | ||
386 | } | ||
387 | } | ||
388 | 316 | ||
389 | int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc) | 317 | local_irq_save_hw(flags); |
390 | { | ||
391 | if (desc->thread || !create_irq_threads) | ||
392 | return 0; | ||
393 | |||
394 | desc->thread = kthread_create(do_irqd, desc, "IRQ %d", irq); | ||
395 | if (desc->thread == NULL) { | ||
396 | printk(KERN_ERR "irqd: could not create IRQ thread %d!\n", irq); | ||
397 | return -ENOMEM; | ||
398 | } | ||
399 | 318 | ||
400 | wake_up_process(desc->thread); | 319 | clear_thread_flag(TIF_IRQ_SYNC); |
401 | 320 | ||
402 | desc->thr_handler = ipipe_root_domain->irqs[irq].handler; | 321 | if (ipipe_root_cpudom_var(irqpend_himask) != 0) |
403 | ipipe_root_domain->irqs[irq].handler = &kick_irqd; | 322 | __ipipe_sync_pipeline(IPIPE_IRQMASK_ANY); |
404 | 323 | ||
405 | return 0; | 324 | local_irq_restore_hw(flags); |
406 | } | 325 | } |
407 | 326 | ||
408 | void __init ipipe_init_irq_threads(void) | 327 | void ___ipipe_sync_pipeline(unsigned long syncmask) |
409 | { | 328 | { |
410 | unsigned irq; | 329 | struct ipipe_domain *ipd = ipipe_current_domain; |
411 | struct irq_desc *desc; | ||
412 | |||
413 | create_irq_threads = 1; | ||
414 | 330 | ||
415 | for (irq = 0; irq < NR_IRQS; irq++) { | 331 | if (ipd == ipipe_root_domain) { |
416 | desc = irq_desc + irq; | 332 | if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) |
417 | if (desc->action != NULL || | 333 | return; |
418 | (desc->status & IRQ_NOREQUEST) != 0) | ||
419 | ipipe_start_irq_thread(irq, desc); | ||
420 | } | 334 | } |
335 | |||
336 | __ipipe_sync_stage(syncmask); | ||
421 | } | 337 | } |
422 | 338 | ||
423 | EXPORT_SYMBOL(show_stack); | 339 | EXPORT_SYMBOL(show_stack); |
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c index 5780d6df1542..1ab5b532ec72 100644 --- a/arch/blackfin/kernel/irqchip.c +++ b/arch/blackfin/kernel/irqchip.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <linux/interrupt.h> | 35 | #include <linux/interrupt.h> |
36 | #include <linux/irq.h> | 36 | #include <linux/irq.h> |
37 | #include <asm/trace.h> | 37 | #include <asm/trace.h> |
38 | #include <asm/pda.h> | ||
38 | 39 | ||
39 | static atomic_t irq_err_count; | 40 | static atomic_t irq_err_count; |
40 | static spinlock_t irq_controller_lock; | 41 | static spinlock_t irq_controller_lock; |
@@ -96,8 +97,13 @@ int show_interrupts(struct seq_file *p, void *v) | |||
96 | seq_putc(p, '\n'); | 97 | seq_putc(p, '\n'); |
97 | skip: | 98 | skip: |
98 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); | 99 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); |
99 | } else if (i == NR_IRQS) | 100 | } else if (i == NR_IRQS) { |
101 | seq_printf(p, "NMI: "); | ||
102 | for_each_online_cpu(j) | ||
103 | seq_printf(p, "%10u ", cpu_pda[j].__nmi_count); | ||
104 | seq_printf(p, " CORE Non Maskable Interrupt\n"); | ||
100 | seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count)); | 105 | seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count)); |
106 | } | ||
101 | return 0; | 107 | return 0; |
102 | } | 108 | } |
103 | 109 | ||
@@ -143,11 +149,15 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) | |||
143 | #endif | 149 | #endif |
144 | generic_handle_irq(irq); | 150 | generic_handle_irq(irq); |
145 | 151 | ||
146 | #ifndef CONFIG_IPIPE /* Useless and bugous over the I-pipe: IRQs are threaded. */ | 152 | #ifndef CONFIG_IPIPE |
147 | /* If we're the only interrupt running (ignoring IRQ15 which is for | 153 | /* |
148 | syscalls), lower our priority to IRQ14 so that softirqs run at | 154 | * If we're the only interrupt running (ignoring IRQ15 which |
149 | that level. If there's another, lower-level interrupt, irq_exit | 155 | * is for syscalls), lower our priority to IRQ14 so that |
150 | will defer softirqs to that. */ | 156 | * softirqs run at that level. If there's another, |
157 | * lower-level interrupt, irq_exit will defer softirqs to | ||
158 | * that. If the interrupt pipeline is enabled, we are already | ||
159 | * running at IRQ14 priority, so we don't need this code. | ||
160 | */ | ||
151 | CSYNC(); | 161 | CSYNC(); |
152 | pending = bfin_read_IPEND() & ~0x8000; | 162 | pending = bfin_read_IPEND() & ~0x8000; |
153 | other_ints = pending & (pending - 1); | 163 | other_ints = pending & (pending - 1); |
diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c index 3dba9c17304a..dbcf3e45cb0b 100644 --- a/arch/blackfin/kernel/kgdb_test.c +++ b/arch/blackfin/kernel/kgdb_test.c | |||
@@ -20,6 +20,7 @@ | |||
20 | static char cmdline[256]; | 20 | static char cmdline[256]; |
21 | static unsigned long len; | 21 | static unsigned long len; |
22 | 22 | ||
23 | #ifndef CONFIG_SMP | ||
23 | static int num1 __attribute__((l1_data)); | 24 | static int num1 __attribute__((l1_data)); |
24 | 25 | ||
25 | void kgdb_l1_test(void) __attribute__((l1_text)); | 26 | void kgdb_l1_test(void) __attribute__((l1_text)); |
@@ -32,6 +33,8 @@ void kgdb_l1_test(void) | |||
32 | printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); | 33 | printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1); |
33 | return ; | 34 | return ; |
34 | } | 35 | } |
36 | #endif | ||
37 | |||
35 | #if L2_LENGTH | 38 | #if L2_LENGTH |
36 | 39 | ||
37 | static int num2 __attribute__((l2)); | 40 | static int num2 __attribute__((l2)); |
@@ -59,10 +62,12 @@ int kgdb_test(char *name, int len, int count, int z) | |||
59 | static int test_proc_output(char *buf) | 62 | static int test_proc_output(char *buf) |
60 | { | 63 | { |
61 | kgdb_test("hello world!", 12, 0x55, 0x10); | 64 | kgdb_test("hello world!", 12, 0x55, 0x10); |
65 | #ifndef CONFIG_SMP | ||
62 | kgdb_l1_test(); | 66 | kgdb_l1_test(); |
63 | #if L2_LENGTH | 67 | #endif |
68 | #if L2_LENGTH | ||
64 | kgdb_l2_test(); | 69 | kgdb_l2_test(); |
65 | #endif | 70 | #endif |
66 | 71 | ||
67 | return 0; | 72 | return 0; |
68 | } | 73 | } |
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c index 594e325b40e4..d76618db50df 100644 --- a/arch/blackfin/kernel/ptrace.c +++ b/arch/blackfin/kernel/ptrace.c | |||
@@ -45,6 +45,7 @@ | |||
45 | #include <asm/asm-offsets.h> | 45 | #include <asm/asm-offsets.h> |
46 | #include <asm/dma.h> | 46 | #include <asm/dma.h> |
47 | #include <asm/fixed_code.h> | 47 | #include <asm/fixed_code.h> |
48 | #include <asm/cacheflush.h> | ||
48 | #include <asm/mem_map.h> | 49 | #include <asm/mem_map.h> |
49 | 50 | ||
50 | #define TEXT_OFFSET 0 | 51 | #define TEXT_OFFSET 0 |
@@ -240,7 +241,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
240 | 241 | ||
241 | } else if (addr >= FIXED_CODE_START | 242 | } else if (addr >= FIXED_CODE_START |
242 | && addr + sizeof(tmp) <= FIXED_CODE_END) { | 243 | && addr + sizeof(tmp) <= FIXED_CODE_END) { |
243 | memcpy(&tmp, (const void *)(addr), sizeof(tmp)); | 244 | copy_from_user_page(0, 0, 0, &tmp, (const void *)(addr), sizeof(tmp)); |
244 | copied = sizeof(tmp); | 245 | copied = sizeof(tmp); |
245 | 246 | ||
246 | } else | 247 | } else |
@@ -320,7 +321,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
320 | 321 | ||
321 | } else if (addr >= FIXED_CODE_START | 322 | } else if (addr >= FIXED_CODE_START |
322 | && addr + sizeof(data) <= FIXED_CODE_END) { | 323 | && addr + sizeof(data) <= FIXED_CODE_END) { |
323 | memcpy((void *)(addr), &data, sizeof(data)); | 324 | copy_to_user_page(0, 0, 0, (void *)(addr), &data, sizeof(data)); |
324 | copied = sizeof(data); | 325 | copied = sizeof(data); |
325 | 326 | ||
326 | } else | 327 | } else |
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c index eeee8cb43360..53d08dee8531 100644 --- a/arch/blackfin/kernel/reboot.c +++ b/arch/blackfin/kernel/reboot.c | |||
@@ -20,8 +20,8 @@ | |||
20 | * reset while the Core B bit (on dual core parts) is cleared by | 20 | * reset while the Core B bit (on dual core parts) is cleared by |
21 | * the core reset. | 21 | * the core reset. |
22 | */ | 22 | */ |
23 | __attribute__((l1_text)) | 23 | __attribute__ ((__l1_text__, __noreturn__)) |
24 | static void _bfin_reset(void) | 24 | static void bfin_reset(void) |
25 | { | 25 | { |
26 | /* Wait for completion of "system" events such as cache line | 26 | /* Wait for completion of "system" events such as cache line |
27 | * line fills so that we avoid infinite stalls later on as | 27 | * line fills so that we avoid infinite stalls later on as |
@@ -30,7 +30,11 @@ static void _bfin_reset(void) | |||
30 | */ | 30 | */ |
31 | __builtin_bfin_ssync(); | 31 | __builtin_bfin_ssync(); |
32 | 32 | ||
33 | while (1) { | 33 | /* The bootrom checks to see how it was reset and will |
34 | * automatically perform a software reset for us when | ||
35 | * it starts executing after the core reset. | ||
36 | */ | ||
37 | if (ANOMALY_05000353 || ANOMALY_05000386) { | ||
34 | /* Initiate System software reset. */ | 38 | /* Initiate System software reset. */ |
35 | bfin_write_SWRST(0x7); | 39 | bfin_write_SWRST(0x7); |
36 | 40 | ||
@@ -50,6 +54,11 @@ static void _bfin_reset(void) | |||
50 | /* Clear System software reset */ | 54 | /* Clear System software reset */ |
51 | bfin_write_SWRST(0); | 55 | bfin_write_SWRST(0); |
52 | 56 | ||
57 | /* The BF526 ROM will crash during reset */ | ||
58 | #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__) | ||
59 | bfin_read_SWRST(); | ||
60 | #endif | ||
61 | |||
53 | /* Wait for the SWRST write to complete. Cannot rely on SSYNC | 62 | /* Wait for the SWRST write to complete. Cannot rely on SSYNC |
54 | * though as the System state is all reset now. | 63 | * though as the System state is all reset now. |
55 | */ | 64 | */ |
@@ -60,22 +69,11 @@ static void _bfin_reset(void) | |||
60 | : "a" (15 * 1) | 69 | : "a" (15 * 1) |
61 | : "LC1", "LB1", "LT1" | 70 | : "LC1", "LB1", "LT1" |
62 | ); | 71 | ); |
72 | } | ||
63 | 73 | ||
74 | while (1) | ||
64 | /* Issue core reset */ | 75 | /* Issue core reset */ |
65 | asm("raise 1"); | 76 | asm("raise 1"); |
66 | } | ||
67 | } | ||
68 | |||
69 | static void bfin_reset(void) | ||
70 | { | ||
71 | if (ANOMALY_05000353 || ANOMALY_05000386) | ||
72 | _bfin_reset(); | ||
73 | else | ||
74 | /* the bootrom checks to see how it was reset and will | ||
75 | * automatically perform a software reset for us when | ||
76 | * it starts executing boot | ||
77 | */ | ||
78 | asm("raise 1;"); | ||
79 | } | 77 | } |
80 | 78 | ||
81 | __attribute__((weak)) | 79 | __attribute__((weak)) |
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index b2a811347b65..a58687bdee6a 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
@@ -60,7 +60,7 @@ void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat, | |||
60 | #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */ | 60 | #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */ |
61 | #define BFIN_MEMMAP_RAM 1 | 61 | #define BFIN_MEMMAP_RAM 1 |
62 | #define BFIN_MEMMAP_RESERVED 2 | 62 | #define BFIN_MEMMAP_RESERVED 2 |
63 | struct bfin_memmap { | 63 | static struct bfin_memmap { |
64 | int nr_map; | 64 | int nr_map; |
65 | struct bfin_memmap_entry { | 65 | struct bfin_memmap_entry { |
66 | unsigned long long addr; /* start of memory segment */ | 66 | unsigned long long addr; /* start of memory segment */ |
@@ -824,7 +824,15 @@ void __init setup_arch(char **cmdline_p) | |||
824 | flash_probe(); | 824 | flash_probe(); |
825 | #endif | 825 | #endif |
826 | 826 | ||
827 | printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF); | ||
828 | |||
829 | /* Newer parts mirror SWRST bits in SYSCR */ | ||
830 | #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \ | ||
831 | defined(CONFIG_BF538) || defined(CONFIG_BF539) | ||
827 | _bfin_swrst = bfin_read_SWRST(); | 832 | _bfin_swrst = bfin_read_SWRST(); |
833 | #else | ||
834 | _bfin_swrst = bfin_read_SYSCR(); | ||
835 | #endif | ||
828 | 836 | ||
829 | #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT | 837 | #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT |
830 | bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT); | 838 | bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT); |
@@ -853,7 +861,7 @@ void __init setup_arch(char **cmdline_p) | |||
853 | else if (_bfin_swrst & RESET_SOFTWARE) | 861 | else if (_bfin_swrst & RESET_SOFTWARE) |
854 | printk(KERN_NOTICE "Reset caused by Software reset\n"); | 862 | printk(KERN_NOTICE "Reset caused by Software reset\n"); |
855 | 863 | ||
856 | printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n"); | 864 | printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n"); |
857 | if (bfin_compiled_revid() == 0xffff) | 865 | if (bfin_compiled_revid() == 0xffff) |
858 | printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU); | 866 | printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU); |
859 | else if (bfin_compiled_revid() == -1) | 867 | else if (bfin_compiled_revid() == -1) |
@@ -881,6 +889,10 @@ void __init setup_arch(char **cmdline_p) | |||
881 | CPU, bfin_revid()); | 889 | CPU, bfin_revid()); |
882 | } | 890 | } |
883 | 891 | ||
892 | /* We can't run on BF548-0.1 due to ANOMALY 05000448 */ | ||
893 | if (bfin_cpuid() == 0x27de && bfin_revid() == 1) | ||
894 | panic("You can't run on this processor due to 05000448\n"); | ||
895 | |||
884 | printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); | 896 | printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); |
885 | 897 | ||
886 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", | 898 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", |
@@ -1133,12 +1145,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
1133 | icache_size = 0; | 1145 | icache_size = 0; |
1134 | 1146 | ||
1135 | seq_printf(m, "cache size\t: %d KB(L1 icache) " | 1147 | seq_printf(m, "cache size\t: %d KB(L1 icache) " |
1136 | "%d KB(L1 dcache-%s) %d KB(L2 cache)\n", | 1148 | "%d KB(L1 dcache%s) %d KB(L2 cache)\n", |
1137 | icache_size, dcache_size, | 1149 | icache_size, dcache_size, |
1138 | #if defined CONFIG_BFIN_WB | 1150 | #if defined CONFIG_BFIN_WB |
1139 | "wb" | 1151 | "-wb" |
1140 | #elif defined CONFIG_BFIN_WT | 1152 | #elif defined CONFIG_BFIN_WT |
1141 | "wt" | 1153 | "-wt" |
1142 | #endif | 1154 | #endif |
1143 | "", 0); | 1155 | "", 0); |
1144 | 1156 | ||
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c index 172b4c588467..1bbacfbd4c5d 100644 --- a/arch/blackfin/kernel/time.c +++ b/arch/blackfin/kernel/time.c | |||
@@ -134,7 +134,10 @@ irqreturn_t timer_interrupt(int irq, void *dummy) | |||
134 | 134 | ||
135 | write_seqlock(&xtime_lock); | 135 | write_seqlock(&xtime_lock); |
136 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) | 136 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) |
137 | /* FIXME: Here TIMIL0 is not set when IPIPE enabled, why? */ | 137 | /* |
138 | * TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is | ||
139 | * enabled. | ||
140 | */ | ||
138 | if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { | 141 | if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { |
139 | #endif | 142 | #endif |
140 | do_timer(1); | 143 | do_timer(1); |
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 5b0667da8d05..ffe7fb53eccb 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c | |||
@@ -673,6 +673,14 @@ static void decode_instruction(unsigned short *address) | |||
673 | verbose_printk("RTI"); | 673 | verbose_printk("RTI"); |
674 | else if (opcode == 0x0012) | 674 | else if (opcode == 0x0012) |
675 | verbose_printk("RTX"); | 675 | verbose_printk("RTX"); |
676 | else if (opcode == 0x0013) | ||
677 | verbose_printk("RTN"); | ||
678 | else if (opcode == 0x0014) | ||
679 | verbose_printk("RTE"); | ||
680 | else if (opcode == 0x0025) | ||
681 | verbose_printk("EMUEXCPT"); | ||
682 | else if (opcode == 0x0040 && opcode <= 0x0047) | ||
683 | verbose_printk("STI R%i", opcode & 7); | ||
676 | else if (opcode >= 0x0050 && opcode <= 0x0057) | 684 | else if (opcode >= 0x0050 && opcode <= 0x0057) |
677 | verbose_printk("JUMP (P%i)", opcode & 7); | 685 | verbose_printk("JUMP (P%i)", opcode & 7); |
678 | else if (opcode >= 0x0060 && opcode <= 0x0067) | 686 | else if (opcode >= 0x0060 && opcode <= 0x0067) |
@@ -681,6 +689,10 @@ static void decode_instruction(unsigned short *address) | |||
681 | verbose_printk("CALL (PC+P%i)", opcode & 7); | 689 | verbose_printk("CALL (PC+P%i)", opcode & 7); |
682 | else if (opcode >= 0x0080 && opcode <= 0x0087) | 690 | else if (opcode >= 0x0080 && opcode <= 0x0087) |
683 | verbose_printk("JUMP (PC+P%i)", opcode & 7); | 691 | verbose_printk("JUMP (PC+P%i)", opcode & 7); |
692 | else if (opcode >= 0x0090 && opcode <= 0x009F) | ||
693 | verbose_printk("RAISE 0x%x", opcode & 0xF); | ||
694 | else if (opcode >= 0x00A0 && opcode <= 0x00AF) | ||
695 | verbose_printk("EXCPT 0x%x", opcode & 0xF); | ||
684 | else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF)) | 696 | else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF)) |
685 | verbose_printk("IF !CC JUMP"); | 697 | verbose_printk("IF !CC JUMP"); |
686 | else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff)) | 698 | else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff)) |
@@ -820,11 +832,8 @@ void show_stack(struct task_struct *task, unsigned long *stack) | |||
820 | decode_address(buf, (unsigned int)stack); | 832 | decode_address(buf, (unsigned int)stack); |
821 | printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf); | 833 | printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf); |
822 | 834 | ||
823 | addr = (unsigned int *)((unsigned int)stack & ~0x3F); | ||
824 | |||
825 | /* First thing is to look for a frame pointer */ | 835 | /* First thing is to look for a frame pointer */ |
826 | for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0; | 836 | for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) { |
827 | addr < endstack; addr++, i++) { | ||
828 | if (*addr & 0x1) | 837 | if (*addr & 0x1) |
829 | continue; | 838 | continue; |
830 | ins_addr = (unsigned short *)*addr; | 839 | ins_addr = (unsigned short *)*addr; |
@@ -834,7 +843,8 @@ void show_stack(struct task_struct *task, unsigned long *stack) | |||
834 | 843 | ||
835 | if (fp) { | 844 | if (fp) { |
836 | /* Let's check to see if it is a frame pointer */ | 845 | /* Let's check to see if it is a frame pointer */ |
837 | while (fp >= (addr - 1) && fp < endstack && fp) | 846 | while (fp >= (addr - 1) && fp < endstack |
847 | && fp && ((unsigned int) fp & 0x3) == 0) | ||
838 | fp = (unsigned int *)*fp; | 848 | fp = (unsigned int *)*fp; |
839 | if (fp == 0 || fp == endstack) { | 849 | if (fp == 0 || fp == endstack) { |
840 | fp = addr - 1; | 850 | fp = addr - 1; |
@@ -1052,8 +1062,9 @@ void show_regs(struct pt_regs *fp) | |||
1052 | char buf [150]; | 1062 | char buf [150]; |
1053 | struct irqaction *action; | 1063 | struct irqaction *action; |
1054 | unsigned int i; | 1064 | unsigned int i; |
1055 | unsigned long flags; | 1065 | unsigned long flags = 0; |
1056 | unsigned int cpu = smp_processor_id(); | 1066 | unsigned int cpu = smp_processor_id(); |
1067 | unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic(); | ||
1057 | 1068 | ||
1058 | verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted()); | 1069 | verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted()); |
1059 | verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n", | 1070 | verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n", |
@@ -1073,17 +1084,22 @@ void show_regs(struct pt_regs *fp) | |||
1073 | } | 1084 | } |
1074 | verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n", | 1085 | verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n", |
1075 | fp->seqstat & SEQSTAT_EXCAUSE); | 1086 | fp->seqstat & SEQSTAT_EXCAUSE); |
1076 | for (i = 6; i <= 15 ; i++) { | 1087 | for (i = 2; i <= 15 ; i++) { |
1077 | if (fp->ipend & (1 << i)) { | 1088 | if (fp->ipend & (1 << i)) { |
1078 | decode_address(buf, bfin_read32(EVT0 + 4*i)); | 1089 | if (i != 4) { |
1079 | verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf); | 1090 | decode_address(buf, bfin_read32(EVT0 + 4*i)); |
1091 | verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf); | ||
1092 | } else | ||
1093 | verbose_printk(KERN_NOTICE " interrupts disabled\n"); | ||
1080 | } | 1094 | } |
1081 | } | 1095 | } |
1082 | 1096 | ||
1083 | /* if no interrupts are going off, don't print this out */ | 1097 | /* if no interrupts are going off, don't print this out */ |
1084 | if (fp->ipend & ~0x3F) { | 1098 | if (fp->ipend & ~0x3F) { |
1085 | for (i = 0; i < (NR_IRQS - 1); i++) { | 1099 | for (i = 0; i < (NR_IRQS - 1); i++) { |
1086 | spin_lock_irqsave(&irq_desc[i].lock, flags); | 1100 | if (!in_atomic) |
1101 | spin_lock_irqsave(&irq_desc[i].lock, flags); | ||
1102 | |||
1087 | action = irq_desc[i].action; | 1103 | action = irq_desc[i].action; |
1088 | if (!action) | 1104 | if (!action) |
1089 | goto unlock; | 1105 | goto unlock; |
@@ -1096,7 +1112,8 @@ void show_regs(struct pt_regs *fp) | |||
1096 | } | 1112 | } |
1097 | verbose_printk("\n"); | 1113 | verbose_printk("\n"); |
1098 | unlock: | 1114 | unlock: |
1099 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); | 1115 | if (!in_atomic) |
1116 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); | ||
1100 | } | 1117 | } |
1101 | } | 1118 | } |
1102 | 1119 | ||
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c index 15f1351c8645..41f2eacfef20 100644 --- a/arch/blackfin/mach-bf518/boards/ezbrd.c +++ b/arch/blackfin/mach-bf518/boards/ezbrd.c | |||
@@ -46,6 +46,7 @@ | |||
46 | #include <asm/dpmc.h> | 46 | #include <asm/dpmc.h> |
47 | #include <asm/bfin_sdh.h> | 47 | #include <asm/bfin_sdh.h> |
48 | #include <linux/spi/ad7877.h> | 48 | #include <linux/spi/ad7877.h> |
49 | #include <net/dsa.h> | ||
49 | 50 | ||
50 | /* | 51 | /* |
51 | * Name the Board for the /proc/cpuinfo | 52 | * Name the Board for the /proc/cpuinfo |
@@ -104,9 +105,32 @@ static struct platform_device rtc_device = { | |||
104 | #endif | 105 | #endif |
105 | 106 | ||
106 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 107 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
108 | static struct platform_device bfin_mii_bus = { | ||
109 | .name = "bfin_mii_bus", | ||
110 | }; | ||
111 | |||
107 | static struct platform_device bfin_mac_device = { | 112 | static struct platform_device bfin_mac_device = { |
108 | .name = "bfin_mac", | 113 | .name = "bfin_mac", |
114 | .dev.platform_data = &bfin_mii_bus, | ||
115 | }; | ||
116 | |||
117 | #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | ||
118 | static struct dsa_platform_data ksz8893m_switch_data = { | ||
119 | .mii_bus = &bfin_mii_bus.dev, | ||
120 | .netdev = &bfin_mac_device.dev, | ||
121 | .port_names[0] = NULL, | ||
122 | .port_names[1] = "eth%d", | ||
123 | .port_names[2] = "eth%d", | ||
124 | .port_names[3] = "cpu", | ||
109 | }; | 125 | }; |
126 | |||
127 | static struct platform_device ksz8893m_switch_device = { | ||
128 | .name = "dsa", | ||
129 | .id = 0, | ||
130 | .num_resources = 0, | ||
131 | .dev.platform_data = &ksz8893m_switch_data, | ||
132 | }; | ||
133 | #endif | ||
110 | #endif | 134 | #endif |
111 | 135 | ||
112 | #if defined(CONFIG_MTD_M25P80) \ | 136 | #if defined(CONFIG_MTD_M25P80) \ |
@@ -147,9 +171,20 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = { | |||
147 | }; | 171 | }; |
148 | #endif | 172 | #endif |
149 | 173 | ||
150 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 174 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
151 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 175 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ |
152 | .enable_dma = 1, | 176 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) |
177 | /* SPI SWITCH CHIP */ | ||
178 | static struct bfin5xx_spi_chip spi_switch_info = { | ||
179 | .enable_dma = 0, | ||
180 | .bits_per_word = 8, | ||
181 | }; | ||
182 | #endif | ||
183 | #endif | ||
184 | |||
185 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | ||
186 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | ||
187 | .enable_dma = 0, | ||
153 | .bits_per_word = 8, | 188 | .bits_per_word = 8, |
154 | }; | 189 | }; |
155 | #endif | 190 | #endif |
@@ -226,23 +261,28 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
226 | }, | 261 | }, |
227 | #endif | 262 | #endif |
228 | 263 | ||
229 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 264 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
265 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ | ||
266 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | ||
230 | { | 267 | { |
231 | .modalias = "spi_mmc_dummy", | 268 | .modalias = "ksz8893m", |
232 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 269 | .max_speed_hz = 5000000, |
233 | .bus_num = 0, | 270 | .bus_num = 0, |
234 | .chip_select = 0, | 271 | .chip_select = 1, |
235 | .platform_data = NULL, | 272 | .platform_data = NULL, |
236 | .controller_data = &spi_mmc_chip_info, | 273 | .controller_data = &spi_switch_info, |
237 | .mode = SPI_MODE_3, | 274 | .mode = SPI_MODE_3, |
238 | }, | 275 | }, |
276 | #endif | ||
277 | #endif | ||
278 | |||
279 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | ||
239 | { | 280 | { |
240 | .modalias = "spi_mmc", | 281 | .modalias = "mmc_spi", |
241 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 282 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
242 | .bus_num = 0, | 283 | .bus_num = 0, |
243 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 284 | .chip_select = 5, |
244 | .platform_data = NULL, | 285 | .controller_data = &mmc_spi_chip_info, |
245 | .controller_data = &spi_mmc_chip_info, | ||
246 | .mode = SPI_MODE_3, | 286 | .mode = SPI_MODE_3, |
247 | }, | 287 | }, |
248 | #endif | 288 | #endif |
@@ -473,7 +513,6 @@ static struct platform_device i2c_bfin_twi_device = { | |||
473 | }; | 513 | }; |
474 | #endif | 514 | #endif |
475 | 515 | ||
476 | #ifdef CONFIG_I2C_BOARDINFO | ||
477 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 516 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
478 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 517 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
479 | { | 518 | { |
@@ -487,7 +526,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
487 | }, | 526 | }, |
488 | #endif | 527 | #endif |
489 | }; | 528 | }; |
490 | #endif | ||
491 | 529 | ||
492 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | 530 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
493 | static struct platform_device bfin_sport0_uart_device = { | 531 | static struct platform_device bfin_sport0_uart_device = { |
@@ -584,7 +622,11 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
584 | #endif | 622 | #endif |
585 | 623 | ||
586 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 624 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
625 | &bfin_mii_bus, | ||
587 | &bfin_mac_device, | 626 | &bfin_mac_device, |
627 | #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | ||
628 | &ksz8893m_switch_device, | ||
629 | #endif | ||
588 | #endif | 630 | #endif |
589 | 631 | ||
590 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | 632 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
@@ -632,12 +674,8 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
632 | static int __init ezbrd_init(void) | 674 | static int __init ezbrd_init(void) |
633 | { | 675 | { |
634 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 676 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
635 | |||
636 | #ifdef CONFIG_I2C_BOARDINFO | ||
637 | i2c_register_board_info(0, bfin_i2c_board_info, | 677 | i2c_register_board_info(0, bfin_i2c_board_info, |
638 | ARRAY_SIZE(bfin_i2c_board_info)); | 678 | ARRAY_SIZE(bfin_i2c_board_info)); |
639 | #endif | ||
640 | |||
641 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 679 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
642 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | 680 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
643 | return 0; | 681 | return 0; |
@@ -649,7 +687,7 @@ void native_machine_restart(char *cmd) | |||
649 | { | 687 | { |
650 | /* workaround reboot hang when booting from SPI */ | 688 | /* workaround reboot hang when booting from SPI */ |
651 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | 689 | if ((bfin_read_SYSCR() & 0x7) == 0x3) |
652 | bfin_gpio_reset_spi0_ssel1(); | 690 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
653 | } | 691 | } |
654 | 692 | ||
655 | void bfin_get_ether_addr(char *addr) | 693 | void bfin_get_ether_addr(char *addr) |
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h index e5b4bef0edae..c847bb101076 100644 --- a/arch/blackfin/mach-bf518/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h | |||
@@ -2,12 +2,12 @@ | |||
2 | * File: include/asm-blackfin/mach-bf518/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf518/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | /* This file shoule be up to date with: | 9 | /* This file shoule be up to date with: |
10 | * - ???? | 10 | * - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef _MACH_ANOMALY_H_ | 13 | #ifndef _MACH_ANOMALY_H_ |
@@ -19,6 +19,8 @@ | |||
19 | #define ANOMALY_05000122 (1) | 19 | #define ANOMALY_05000122 (1) |
20 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ | 20 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
21 | #define ANOMALY_05000245 (1) | 21 | #define ANOMALY_05000245 (1) |
22 | /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */ | ||
23 | #define ANOMALY_05000254 (1) | ||
22 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ | 24 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ |
23 | #define ANOMALY_05000265 (1) | 25 | #define ANOMALY_05000265 (1) |
24 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ | 26 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ |
@@ -53,6 +55,12 @@ | |||
53 | #define ANOMALY_05000443 (1) | 55 | #define ANOMALY_05000443 (1) |
54 | /* Incorrect L1 Instruction Bank B Memory Map Location */ | 56 | /* Incorrect L1 Instruction Bank B Memory Map Location */ |
55 | #define ANOMALY_05000444 (1) | 57 | #define ANOMALY_05000444 (1) |
58 | /* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */ | ||
59 | #define ANOMALY_05000452 (1) | ||
60 | /* PWM_TRIPB Signal Not Available on PG10 */ | ||
61 | #define ANOMALY_05000453 (1) | ||
62 | /* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */ | ||
63 | #define ANOMALY_05000455 (1) | ||
56 | 64 | ||
57 | /* Anomalies that don't exist on this proc */ | 65 | /* Anomalies that don't exist on this proc */ |
58 | #define ANOMALY_05000125 (0) | 66 | #define ANOMALY_05000125 (0) |
@@ -65,15 +73,20 @@ | |||
65 | #define ANOMALY_05000263 (0) | 73 | #define ANOMALY_05000263 (0) |
66 | #define ANOMALY_05000266 (0) | 74 | #define ANOMALY_05000266 (0) |
67 | #define ANOMALY_05000273 (0) | 75 | #define ANOMALY_05000273 (0) |
76 | #define ANOMALY_05000278 (0) | ||
68 | #define ANOMALY_05000285 (0) | 77 | #define ANOMALY_05000285 (0) |
78 | #define ANOMALY_05000305 (0) | ||
69 | #define ANOMALY_05000307 (0) | 79 | #define ANOMALY_05000307 (0) |
70 | #define ANOMALY_05000311 (0) | 80 | #define ANOMALY_05000311 (0) |
71 | #define ANOMALY_05000312 (0) | 81 | #define ANOMALY_05000312 (0) |
72 | #define ANOMALY_05000323 (0) | 82 | #define ANOMALY_05000323 (0) |
73 | #define ANOMALY_05000353 (0) | 83 | #define ANOMALY_05000353 (0) |
74 | #define ANOMALY_05000363 (0) | 84 | #define ANOMALY_05000363 (0) |
85 | #define ANOMALY_05000380 (0) | ||
75 | #define ANOMALY_05000386 (0) | 86 | #define ANOMALY_05000386 (0) |
76 | #define ANOMALY_05000412 (0) | 87 | #define ANOMALY_05000412 (0) |
77 | #define ANOMALY_05000432 (0) | 88 | #define ANOMALY_05000432 (0) |
89 | #define ANOMALY_05000447 (0) | ||
90 | #define ANOMALY_05000448 (0) | ||
78 | 91 | ||
79 | #endif | 92 | #endif |
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h index b50a63b975a2..e21c1c3e4ec7 100644 --- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h | |||
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
144 | CH_UART0_TX, | 144 | CH_UART0_TX, |
145 | CH_UART0_RX, | 145 | CH_UART0_RX, |
146 | #endif | 146 | #endif |
147 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
148 | CONFIG_UART0_CTS_PIN, | 148 | CONFIG_UART0_CTS_PIN, |
149 | CONFIG_UART0_RTS_PIN, | 149 | CONFIG_UART0_RTS_PIN, |
150 | #endif | 150 | #endif |
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
158 | CH_UART1_TX, | 158 | CH_UART1_TX, |
159 | CH_UART1_RX, | 159 | CH_UART1_RX, |
160 | #endif | 160 | #endif |
161 | #ifdef CONFIG_BFIN_UART1_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
162 | CONFIG_UART1_CTS_PIN, | 162 | CONFIG_UART1_CTS_PIN, |
163 | CONFIG_UART1_RTS_PIN, | 163 | CONFIG_UART1_RTS_PIN, |
164 | #endif | 164 | #endif |
diff --git a/arch/blackfin/mach-bf518/include/mach/portmux.h b/arch/blackfin/mach-bf518/include/mach/portmux.h index ac16d54734d4..f618b487b2b0 100644 --- a/arch/blackfin/mach-bf518/include/mach/portmux.h +++ b/arch/blackfin/mach-bf518/include/mach/portmux.h | |||
@@ -103,6 +103,8 @@ | |||
103 | #define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2)) | 103 | #define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2)) |
104 | #define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2)) | 104 | #define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2)) |
105 | 105 | ||
106 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 | ||
107 | |||
106 | /* SPORT Port Mux */ | 108 | /* SPORT Port Mux */ |
107 | #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) | 109 | #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) |
108 | #define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0)) | 110 | #define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0)) |
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c index a2c3578f4b6c..48e69eecdba4 100644 --- a/arch/blackfin/mach-bf527/boards/cm_bf527.c +++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c | |||
@@ -403,8 +403,13 @@ static struct platform_device isp1362_hcd_device = { | |||
403 | #endif | 403 | #endif |
404 | 404 | ||
405 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 405 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
406 | static struct platform_device bfin_mii_bus = { | ||
407 | .name = "bfin_mii_bus", | ||
408 | }; | ||
409 | |||
406 | static struct platform_device bfin_mac_device = { | 410 | static struct platform_device bfin_mac_device = { |
407 | .name = "bfin_mac", | 411 | .name = "bfin_mac", |
412 | .dev.platform_data = &bfin_mii_bus, | ||
408 | }; | 413 | }; |
409 | #endif | 414 | #endif |
410 | 415 | ||
@@ -482,9 +487,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
482 | }; | 487 | }; |
483 | #endif | 488 | #endif |
484 | 489 | ||
485 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 490 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
486 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 491 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
487 | .enable_dma = 1, | 492 | .enable_dma = 0, |
488 | .bits_per_word = 8, | 493 | .bits_per_word = 8, |
489 | }; | 494 | }; |
490 | #endif | 495 | #endif |
@@ -580,23 +585,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
580 | .controller_data = &ad9960_spi_chip_info, | 585 | .controller_data = &ad9960_spi_chip_info, |
581 | }, | 586 | }, |
582 | #endif | 587 | #endif |
583 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 588 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
584 | { | 589 | { |
585 | .modalias = "spi_mmc_dummy", | 590 | .modalias = "mmc_spi", |
586 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 591 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
587 | .bus_num = 0, | 592 | .bus_num = 0, |
588 | .chip_select = 0, | 593 | .chip_select = 5, |
589 | .platform_data = NULL, | 594 | .controller_data = &mmc_spi_chip_info, |
590 | .controller_data = &spi_mmc_chip_info, | ||
591 | .mode = SPI_MODE_3, | ||
592 | }, | ||
593 | { | ||
594 | .modalias = "spi_mmc", | ||
595 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
596 | .bus_num = 0, | ||
597 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | ||
598 | .platform_data = NULL, | ||
599 | .controller_data = &spi_mmc_chip_info, | ||
600 | .mode = SPI_MODE_3, | 595 | .mode = SPI_MODE_3, |
601 | }, | 596 | }, |
602 | #endif | 597 | #endif |
@@ -793,7 +788,6 @@ static struct platform_device i2c_bfin_twi_device = { | |||
793 | }; | 788 | }; |
794 | #endif | 789 | #endif |
795 | 790 | ||
796 | #ifdef CONFIG_I2C_BOARDINFO | ||
797 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 791 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
798 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 792 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
799 | { | 793 | { |
@@ -809,7 +803,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
809 | }, | 803 | }, |
810 | #endif | 804 | #endif |
811 | }; | 805 | }; |
812 | #endif | ||
813 | 806 | ||
814 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | 807 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
815 | static struct platform_device bfin_sport0_uart_device = { | 808 | static struct platform_device bfin_sport0_uart_device = { |
@@ -920,6 +913,7 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
920 | #endif | 913 | #endif |
921 | 914 | ||
922 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 915 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
916 | &bfin_mii_bus, | ||
923 | &bfin_mac_device, | 917 | &bfin_mac_device, |
924 | #endif | 918 | #endif |
925 | 919 | ||
@@ -968,27 +962,23 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
968 | &bfin_gpios_device, | 962 | &bfin_gpios_device, |
969 | }; | 963 | }; |
970 | 964 | ||
971 | static int __init stamp_init(void) | 965 | static int __init cm_init(void) |
972 | { | 966 | { |
973 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 967 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
974 | |||
975 | #ifdef CONFIG_I2C_BOARDINFO | ||
976 | i2c_register_board_info(0, bfin_i2c_board_info, | 968 | i2c_register_board_info(0, bfin_i2c_board_info, |
977 | ARRAY_SIZE(bfin_i2c_board_info)); | 969 | ARRAY_SIZE(bfin_i2c_board_info)); |
978 | #endif | ||
979 | |||
980 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 970 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
981 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | 971 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
982 | return 0; | 972 | return 0; |
983 | } | 973 | } |
984 | 974 | ||
985 | arch_initcall(stamp_init); | 975 | arch_initcall(cm_init); |
986 | 976 | ||
987 | void native_machine_restart(char *cmd) | 977 | void native_machine_restart(char *cmd) |
988 | { | 978 | { |
989 | /* workaround reboot hang when booting from SPI */ | 979 | /* workaround reboot hang when booting from SPI */ |
990 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | 980 | if ((bfin_read_SYSCR() & 0x7) == 0x3) |
991 | bfin_gpio_reset_spi0_ssel1(); | 981 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
992 | } | 982 | } |
993 | 983 | ||
994 | void bfin_get_ether_addr(char *addr) | 984 | void bfin_get_ether_addr(char *addr) |
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c index 0314bd3355eb..7fe480e4ebe8 100644 --- a/arch/blackfin/mach-bf527/boards/ezbrd.c +++ b/arch/blackfin/mach-bf527/boards/ezbrd.c | |||
@@ -208,8 +208,13 @@ static struct platform_device rtc_device = { | |||
208 | 208 | ||
209 | 209 | ||
210 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 210 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
211 | static struct platform_device bfin_mii_bus = { | ||
212 | .name = "bfin_mii_bus", | ||
213 | }; | ||
214 | |||
211 | static struct platform_device bfin_mac_device = { | 215 | static struct platform_device bfin_mac_device = { |
212 | .name = "bfin_mac", | 216 | .name = "bfin_mac", |
217 | .dev.platform_data = &bfin_mii_bus, | ||
213 | }; | 218 | }; |
214 | #endif | 219 | #endif |
215 | 220 | ||
@@ -251,9 +256,9 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = { | |||
251 | }; | 256 | }; |
252 | #endif | 257 | #endif |
253 | 258 | ||
254 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 259 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
255 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 260 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
256 | .enable_dma = 1, | 261 | .enable_dma = 0, |
257 | .bits_per_word = 8, | 262 | .bits_per_word = 8, |
258 | }; | 263 | }; |
259 | #endif | 264 | #endif |
@@ -361,23 +366,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
361 | }, | 366 | }, |
362 | #endif | 367 | #endif |
363 | 368 | ||
364 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 369 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
365 | { | 370 | { |
366 | .modalias = "spi_mmc_dummy", | 371 | .modalias = "mmc_spi", |
367 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 372 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
368 | .bus_num = 0, | 373 | .bus_num = 0, |
369 | .chip_select = 0, | 374 | .chip_select = 5, |
370 | .platform_data = NULL, | 375 | .controller_data = &mmc_spi_chip_info, |
371 | .controller_data = &spi_mmc_chip_info, | ||
372 | .mode = SPI_MODE_3, | ||
373 | }, | ||
374 | { | ||
375 | .modalias = "spi_mmc", | ||
376 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
377 | .bus_num = 0, | ||
378 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | ||
379 | .platform_data = NULL, | ||
380 | .controller_data = &spi_mmc_chip_info, | ||
381 | .mode = SPI_MODE_3, | 376 | .mode = SPI_MODE_3, |
382 | }, | 377 | }, |
383 | #endif | 378 | #endif |
@@ -590,7 +585,6 @@ static struct platform_device i2c_bfin_twi_device = { | |||
590 | }; | 585 | }; |
591 | #endif | 586 | #endif |
592 | 587 | ||
593 | #ifdef CONFIG_I2C_BOARDINFO | ||
594 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 588 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
595 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 589 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
596 | { | 590 | { |
@@ -604,7 +598,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
604 | }, | 598 | }, |
605 | #endif | 599 | #endif |
606 | }; | 600 | }; |
607 | #endif | ||
608 | 601 | ||
609 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | 602 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
610 | static struct platform_device bfin_sport0_uart_device = { | 603 | static struct platform_device bfin_sport0_uart_device = { |
@@ -720,6 +713,7 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
720 | #endif | 713 | #endif |
721 | 714 | ||
722 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 715 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
716 | &bfin_mii_bus, | ||
723 | &bfin_mac_device, | 717 | &bfin_mac_device, |
724 | #endif | 718 | #endif |
725 | 719 | ||
@@ -764,27 +758,23 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
764 | &bfin_gpios_device, | 758 | &bfin_gpios_device, |
765 | }; | 759 | }; |
766 | 760 | ||
767 | static int __init stamp_init(void) | 761 | static int __init ezbrd_init(void) |
768 | { | 762 | { |
769 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 763 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
770 | |||
771 | #ifdef CONFIG_I2C_BOARDINFO | ||
772 | i2c_register_board_info(0, bfin_i2c_board_info, | 764 | i2c_register_board_info(0, bfin_i2c_board_info, |
773 | ARRAY_SIZE(bfin_i2c_board_info)); | 765 | ARRAY_SIZE(bfin_i2c_board_info)); |
774 | #endif | ||
775 | |||
776 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 766 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
777 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | 767 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
778 | return 0; | 768 | return 0; |
779 | } | 769 | } |
780 | 770 | ||
781 | arch_initcall(stamp_init); | 771 | arch_initcall(ezbrd_init); |
782 | 772 | ||
783 | void native_machine_restart(char *cmd) | 773 | void native_machine_restart(char *cmd) |
784 | { | 774 | { |
785 | /* workaround reboot hang when booting from SPI */ | 775 | /* workaround reboot hang when booting from SPI */ |
786 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | 776 | if ((bfin_read_SYSCR() & 0x7) == 0x3) |
787 | bfin_gpio_reset_spi0_ssel1(); | 777 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
788 | } | 778 | } |
789 | 779 | ||
790 | void bfin_get_ether_addr(char *addr) | 780 | void bfin_get_ether_addr(char *addr) |
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c index 9454fb7b18c3..d0864111ef59 100644 --- a/arch/blackfin/mach-bf527/boards/ezkit.c +++ b/arch/blackfin/mach-bf527/boards/ezkit.c | |||
@@ -425,8 +425,13 @@ static struct platform_device isp1362_hcd_device = { | |||
425 | #endif | 425 | #endif |
426 | 426 | ||
427 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 427 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
428 | static struct platform_device bfin_mii_bus = { | ||
429 | .name = "bfin_mii_bus", | ||
430 | }; | ||
431 | |||
428 | static struct platform_device bfin_mac_device = { | 432 | static struct platform_device bfin_mac_device = { |
429 | .name = "bfin_mac", | 433 | .name = "bfin_mac", |
434 | .dev.platform_data = &bfin_mii_bus, | ||
430 | }; | 435 | }; |
431 | #endif | 436 | #endif |
432 | 437 | ||
@@ -830,7 +835,6 @@ static struct platform_device i2c_bfin_twi_device = { | |||
830 | }; | 835 | }; |
831 | #endif | 836 | #endif |
832 | 837 | ||
833 | #ifdef CONFIG_I2C_BOARDINFO | ||
834 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 838 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
835 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 839 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
836 | { | 840 | { |
@@ -844,7 +848,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
844 | }, | 848 | }, |
845 | #endif | 849 | #endif |
846 | }; | 850 | }; |
847 | #endif | ||
848 | 851 | ||
849 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | 852 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
850 | static struct platform_device bfin_sport0_uart_device = { | 853 | static struct platform_device bfin_sport0_uart_device = { |
@@ -988,6 +991,7 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
988 | #endif | 991 | #endif |
989 | 992 | ||
990 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 993 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
994 | &bfin_mii_bus, | ||
991 | &bfin_mac_device, | 995 | &bfin_mac_device, |
992 | #endif | 996 | #endif |
993 | 997 | ||
@@ -1048,27 +1052,23 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
1048 | &bfin_gpios_device, | 1052 | &bfin_gpios_device, |
1049 | }; | 1053 | }; |
1050 | 1054 | ||
1051 | static int __init stamp_init(void) | 1055 | static int __init ezkit_init(void) |
1052 | { | 1056 | { |
1053 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 1057 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
1054 | |||
1055 | #ifdef CONFIG_I2C_BOARDINFO | ||
1056 | i2c_register_board_info(0, bfin_i2c_board_info, | 1058 | i2c_register_board_info(0, bfin_i2c_board_info, |
1057 | ARRAY_SIZE(bfin_i2c_board_info)); | 1059 | ARRAY_SIZE(bfin_i2c_board_info)); |
1058 | #endif | ||
1059 | |||
1060 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 1060 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
1061 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | 1061 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
1062 | return 0; | 1062 | return 0; |
1063 | } | 1063 | } |
1064 | 1064 | ||
1065 | arch_initcall(stamp_init); | 1065 | arch_initcall(ezkit_init); |
1066 | 1066 | ||
1067 | void native_machine_restart(char *cmd) | 1067 | void native_machine_restart(char *cmd) |
1068 | { | 1068 | { |
1069 | /* workaround reboot hang when booting from SPI */ | 1069 | /* workaround reboot hang when booting from SPI */ |
1070 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | 1070 | if ((bfin_read_SYSCR() & 0x7) == 0x3) |
1071 | bfin_gpio_reset_spi0_ssel1(); | 1071 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
1072 | } | 1072 | } |
1073 | 1073 | ||
1074 | void bfin_get_ether_addr(char *addr) | 1074 | void bfin_get_ether_addr(char *addr) |
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h index 035e8d835058..df6808d8a6ef 100644 --- a/arch/blackfin/mach-bf527/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * File: include/asm-blackfin/mach-bf527/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf527/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
@@ -167,12 +167,16 @@ | |||
167 | #define ANOMALY_05000263 (0) | 167 | #define ANOMALY_05000263 (0) |
168 | #define ANOMALY_05000266 (0) | 168 | #define ANOMALY_05000266 (0) |
169 | #define ANOMALY_05000273 (0) | 169 | #define ANOMALY_05000273 (0) |
170 | #define ANOMALY_05000278 (0) | ||
170 | #define ANOMALY_05000285 (0) | 171 | #define ANOMALY_05000285 (0) |
172 | #define ANOMALY_05000305 (0) | ||
171 | #define ANOMALY_05000307 (0) | 173 | #define ANOMALY_05000307 (0) |
172 | #define ANOMALY_05000311 (0) | 174 | #define ANOMALY_05000311 (0) |
173 | #define ANOMALY_05000312 (0) | 175 | #define ANOMALY_05000312 (0) |
174 | #define ANOMALY_05000323 (0) | 176 | #define ANOMALY_05000323 (0) |
175 | #define ANOMALY_05000363 (0) | 177 | #define ANOMALY_05000363 (0) |
176 | #define ANOMALY_05000412 (0) | 178 | #define ANOMALY_05000412 (0) |
179 | #define ANOMALY_05000447 (0) | ||
180 | #define ANOMALY_05000448 (0) | ||
177 | 181 | ||
178 | #endif | 182 | #endif |
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h index 75722d6008b0..e8c41fd842b5 100644 --- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h | |||
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
144 | CH_UART0_TX, | 144 | CH_UART0_TX, |
145 | CH_UART0_RX, | 145 | CH_UART0_RX, |
146 | #endif | 146 | #endif |
147 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
148 | CONFIG_UART0_CTS_PIN, | 148 | CONFIG_UART0_CTS_PIN, |
149 | CONFIG_UART0_RTS_PIN, | 149 | CONFIG_UART0_RTS_PIN, |
150 | #endif | 150 | #endif |
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
158 | CH_UART1_TX, | 158 | CH_UART1_TX, |
159 | CH_UART1_RX, | 159 | CH_UART1_RX, |
160 | #endif | 160 | #endif |
161 | #ifdef CONFIG_BFIN_UART1_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
162 | CONFIG_UART1_CTS_PIN, | 162 | CONFIG_UART1_CTS_PIN, |
163 | CONFIG_UART1_RTS_PIN, | 163 | CONFIG_UART1_RTS_PIN, |
164 | #endif | 164 | #endif |
diff --git a/arch/blackfin/mach-bf527/include/mach/portmux.h b/arch/blackfin/mach-bf527/include/mach/portmux.h index 7f6da2c386bb..72b1652be4da 100644 --- a/arch/blackfin/mach-bf527/include/mach/portmux.h +++ b/arch/blackfin/mach-bf527/include/mach/portmux.h | |||
@@ -73,6 +73,8 @@ | |||
73 | 73 | ||
74 | #define P_HWAIT (P_DONTCARE) | 74 | #define P_HWAIT (P_DONTCARE) |
75 | 75 | ||
76 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1 | ||
77 | |||
76 | #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) | 78 | #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) |
77 | #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2)) | 79 | #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2)) |
78 | #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2)) | 80 | #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2)) |
diff --git a/arch/blackfin/mach-bf533/boards/Kconfig b/arch/blackfin/mach-bf533/boards/Kconfig index 308c98dc5aba..8d8b3e7321e6 100644 --- a/arch/blackfin/mach-bf533/boards/Kconfig +++ b/arch/blackfin/mach-bf533/boards/Kconfig | |||
@@ -38,9 +38,4 @@ config BFIN532_IP0X | |||
38 | help | 38 | help |
39 | Core support for IP04/IP04 open hardware IP-PBX. | 39 | Core support for IP04/IP04 open hardware IP-PBX. |
40 | 40 | ||
41 | config GENERIC_BF533_BOARD | ||
42 | bool "Generic" | ||
43 | help | ||
44 | Generic or Custom board support. | ||
45 | |||
46 | endchoice | 41 | endchoice |
diff --git a/arch/blackfin/mach-bf533/boards/Makefile b/arch/blackfin/mach-bf533/boards/Makefile index 9afbe72b484f..ff1e832f80d2 100644 --- a/arch/blackfin/mach-bf533/boards/Makefile +++ b/arch/blackfin/mach-bf533/boards/Makefile | |||
@@ -2,7 +2,6 @@ | |||
2 | # arch/blackfin/mach-bf533/boards/Makefile | 2 | # arch/blackfin/mach-bf533/boards/Makefile |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_GENERIC_BF533_BOARD) += generic_board.o | ||
6 | obj-$(CONFIG_BFIN533_STAMP) += stamp.o | 5 | obj-$(CONFIG_BFIN533_STAMP) += stamp.o |
7 | obj-$(CONFIG_BFIN532_IP0X) += ip0x.o | 6 | obj-$(CONFIG_BFIN532_IP0X) += ip0x.o |
8 | obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o | 7 | obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o |
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c index 6ee607c259ac..0765872a8ada 100644 --- a/arch/blackfin/mach-bf533/boards/blackstamp.c +++ b/arch/blackfin/mach-bf533/boards/blackstamp.c | |||
@@ -101,9 +101,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
101 | }; | 101 | }; |
102 | #endif | 102 | #endif |
103 | 103 | ||
104 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 104 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
105 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 105 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
106 | .enable_dma = 1, | 106 | .enable_dma = 0, |
107 | .bits_per_word = 8, | 107 | .bits_per_word = 8, |
108 | }; | 108 | }; |
109 | #endif | 109 | #endif |
@@ -129,23 +129,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
129 | }, | 129 | }, |
130 | #endif | 130 | #endif |
131 | 131 | ||
132 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 132 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
133 | { | ||
134 | .modalias = "spi_mmc_dummy", | ||
135 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | ||
136 | .bus_num = 0, | ||
137 | .chip_select = 0, | ||
138 | .platform_data = NULL, | ||
139 | .controller_data = &spi_mmc_chip_info, | ||
140 | .mode = SPI_MODE_3, | ||
141 | }, | ||
142 | { | 133 | { |
143 | .modalias = "spi_mmc", | 134 | .modalias = "mmc_spi", |
144 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 135 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
145 | .bus_num = 0, | 136 | .bus_num = 0, |
146 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 137 | .chip_select = 5, |
147 | .platform_data = NULL, | 138 | .controller_data = &mmc_spi_chip_info, |
148 | .controller_data = &spi_mmc_chip_info, | ||
149 | .mode = SPI_MODE_3, | 139 | .mode = SPI_MODE_3, |
150 | }, | 140 | }, |
151 | #endif | 141 | #endif |
@@ -309,10 +299,8 @@ static struct platform_device i2c_gpio_device = { | |||
309 | }; | 299 | }; |
310 | #endif | 300 | #endif |
311 | 301 | ||
312 | #ifdef CONFIG_I2C_BOARDINFO | ||
313 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 302 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
314 | }; | 303 | }; |
315 | #endif | ||
316 | 304 | ||
317 | static const unsigned int cclk_vlev_datasheet[] = | 305 | static const unsigned int cclk_vlev_datasheet[] = |
318 | { | 306 | { |
@@ -390,10 +378,8 @@ static int __init blackstamp_init(void) | |||
390 | 378 | ||
391 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 379 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
392 | 380 | ||
393 | #ifdef CONFIG_I2C_BOARDINFO | ||
394 | i2c_register_board_info(0, bfin_i2c_board_info, | 381 | i2c_register_board_info(0, bfin_i2c_board_info, |
395 | ARRAY_SIZE(bfin_i2c_board_info)); | 382 | ARRAY_SIZE(bfin_i2c_board_info)); |
396 | #endif | ||
397 | 383 | ||
398 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 384 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
399 | if (ret < 0) | 385 | if (ret < 0) |
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c index e7061c7e8c42..e8974878d8c2 100644 --- a/arch/blackfin/mach-bf533/boards/cm_bf533.c +++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c | |||
@@ -96,9 +96,9 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |||
96 | }; | 96 | }; |
97 | #endif | 97 | #endif |
98 | 98 | ||
99 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 99 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
100 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 100 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
101 | .enable_dma = 1, | 101 | .enable_dma = 0, |
102 | .bits_per_word = 8, | 102 | .bits_per_word = 8, |
103 | }; | 103 | }; |
104 | #endif | 104 | #endif |
@@ -138,23 +138,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
138 | }, | 138 | }, |
139 | #endif | 139 | #endif |
140 | 140 | ||
141 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 141 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
142 | { | ||
143 | .modalias = "spi_mmc_dummy", | ||
144 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
145 | .bus_num = 0, | ||
146 | .chip_select = 0, | ||
147 | .platform_data = NULL, | ||
148 | .controller_data = &spi_mmc_chip_info, | ||
149 | .mode = SPI_MODE_3, | ||
150 | }, | ||
151 | { | 142 | { |
152 | .modalias = "spi_mmc", | 143 | .modalias = "mmc_spi", |
153 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 144 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
154 | .bus_num = 0, | 145 | .bus_num = 0, |
155 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 146 | .chip_select = 5, |
156 | .platform_data = NULL, | 147 | .controller_data = &mmc_spi_chip_info, |
157 | .controller_data = &spi_mmc_chip_info, | ||
158 | .mode = SPI_MODE_3, | 148 | .mode = SPI_MODE_3, |
159 | }, | 149 | }, |
160 | #endif | 150 | #endif |
diff --git a/arch/blackfin/mach-bf533/boards/generic_board.c b/arch/blackfin/mach-bf533/boards/generic_board.c deleted file mode 100644 index 986eeec53b1f..000000000000 --- a/arch/blackfin/mach-bf533/boards/generic_board.c +++ /dev/null | |||
@@ -1,126 +0,0 @@ | |||
1 | /* | ||
2 | * File: arch/blackfin/mach-bf533/generic_board.c | ||
3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | ||
4 | * Author: Aidan Williams <aidan@nicta.com.au> | ||
5 | * | ||
6 | * Created: 2005 | ||
7 | * Description: | ||
8 | * | ||
9 | * Modified: | ||
10 | * Copyright 2005 National ICT Australia (NICTA) | ||
11 | * Copyright 2004-2006 Analog Devices Inc. | ||
12 | * | ||
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License as published by | ||
17 | * the Free Software Foundation; either version 2 of the License, or | ||
18 | * (at your option) any later version. | ||
19 | * | ||
20 | * This program is distributed in the hope that it will be useful, | ||
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
23 | * GNU General Public License for more details. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License | ||
26 | * along with this program; if not, see the file COPYING, or write | ||
27 | * to the Free Software Foundation, Inc., | ||
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
29 | */ | ||
30 | |||
31 | #include <linux/device.h> | ||
32 | #include <linux/platform_device.h> | ||
33 | #include <linux/irq.h> | ||
34 | |||
35 | /* | ||
36 | * Name the Board for the /proc/cpuinfo | ||
37 | */ | ||
38 | const char bfin_board_name[] = "UNKNOWN BOARD"; | ||
39 | |||
40 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
41 | static struct platform_device rtc_device = { | ||
42 | .name = "rtc-bfin", | ||
43 | .id = -1, | ||
44 | }; | ||
45 | #endif | ||
46 | |||
47 | /* | ||
48 | * Driver needs to know address, irq and flag pin. | ||
49 | */ | ||
50 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
51 | static struct resource smc91x_resources[] = { | ||
52 | { | ||
53 | .start = 0x20300300, | ||
54 | .end = 0x20300300 + 16, | ||
55 | .flags = IORESOURCE_MEM, | ||
56 | }, { | ||
57 | .start = IRQ_PROG_INTB, | ||
58 | .end = IRQ_PROG_INTB, | ||
59 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
60 | }, { | ||
61 | .start = IRQ_PF7, | ||
62 | .end = IRQ_PF7, | ||
63 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
64 | }, | ||
65 | }; | ||
66 | |||
67 | static struct platform_device smc91x_device = { | ||
68 | .name = "smc91x", | ||
69 | .id = 0, | ||
70 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
71 | .resource = smc91x_resources, | ||
72 | }; | ||
73 | #endif | ||
74 | |||
75 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
76 | #ifdef CONFIG_BFIN_SIR0 | ||
77 | static struct resource bfin_sir0_resources[] = { | ||
78 | { | ||
79 | .start = 0xFFC00400, | ||
80 | .end = 0xFFC004FF, | ||
81 | .flags = IORESOURCE_MEM, | ||
82 | }, | ||
83 | { | ||
84 | .start = IRQ_UART0_RX, | ||
85 | .end = IRQ_UART0_RX+1, | ||
86 | .flags = IORESOURCE_IRQ, | ||
87 | }, | ||
88 | { | ||
89 | .start = CH_UART0_RX, | ||
90 | .end = CH_UART0_RX+1, | ||
91 | .flags = IORESOURCE_DMA, | ||
92 | }, | ||
93 | }; | ||
94 | |||
95 | static struct platform_device bfin_sir0_device = { | ||
96 | .name = "bfin_sir", | ||
97 | .id = 0, | ||
98 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | ||
99 | .resource = bfin_sir0_resources, | ||
100 | }; | ||
101 | #endif | ||
102 | #endif | ||
103 | |||
104 | static struct platform_device *generic_board_devices[] __initdata = { | ||
105 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
106 | &rtc_device, | ||
107 | #endif | ||
108 | |||
109 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
110 | &smc91x_device, | ||
111 | #endif | ||
112 | |||
113 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
114 | #ifdef CONFIG_BFIN_SIR0 | ||
115 | &bfin_sir0_device, | ||
116 | #endif | ||
117 | #endif | ||
118 | }; | ||
119 | |||
120 | static int __init generic_board_init(void) | ||
121 | { | ||
122 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | ||
123 | return platform_add_devices(generic_board_devices, ARRAY_SIZE(generic_board_devices)); | ||
124 | } | ||
125 | |||
126 | arch_initcall(generic_board_init); | ||
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c index e30b1b7d1442..f19b63378b12 100644 --- a/arch/blackfin/mach-bf533/boards/ip0x.c +++ b/arch/blackfin/mach-bf533/boards/ip0x.c | |||
@@ -127,8 +127,8 @@ static struct platform_device dm9000_device2 = { | |||
127 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | 127 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
128 | /* all SPI peripherals info goes here */ | 128 | /* all SPI peripherals info goes here */ |
129 | 129 | ||
130 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 130 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
131 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 131 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
132 | /* | 132 | /* |
133 | * CPOL (Clock Polarity) | 133 | * CPOL (Clock Polarity) |
134 | * 0 - Active high SCK | 134 | * 0 - Active high SCK |
@@ -152,14 +152,13 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |||
152 | /* Notice: for blackfin, the speed_hz is the value of register | 152 | /* Notice: for blackfin, the speed_hz is the value of register |
153 | * SPI_BAUD, not the real baudrate */ | 153 | * SPI_BAUD, not the real baudrate */ |
154 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 154 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
155 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 155 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
156 | { | 156 | { |
157 | .modalias = "spi_mmc", | 157 | .modalias = "mmc_spi", |
158 | .max_speed_hz = 2, | 158 | .max_speed_hz = 2, |
159 | .bus_num = 1, | 159 | .bus_num = 1, |
160 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 160 | .chip_select = 5, |
161 | .platform_data = NULL, | 161 | .controller_data = &mmc_spi_chip_info, |
162 | .controller_data = &spi_mmc_chip_info, | ||
163 | }, | 162 | }, |
164 | #endif | 163 | #endif |
165 | }; | 164 | }; |
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c index 07f9ad1e189c..db96f33f72e2 100644 --- a/arch/blackfin/mach-bf533/boards/stamp.c +++ b/arch/blackfin/mach-bf533/boards/stamp.c | |||
@@ -441,7 +441,6 @@ static struct platform_device i2c_gpio_device = { | |||
441 | }; | 441 | }; |
442 | #endif | 442 | #endif |
443 | 443 | ||
444 | #ifdef CONFIG_I2C_BOARDINFO | ||
445 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 444 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
446 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) | 445 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) |
447 | { | 446 | { |
@@ -461,7 +460,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
461 | }, | 460 | }, |
462 | #endif | 461 | #endif |
463 | }; | 462 | }; |
464 | #endif | ||
465 | 463 | ||
466 | static const unsigned int cclk_vlev_datasheet[] = | 464 | static const unsigned int cclk_vlev_datasheet[] = |
467 | { | 465 | { |
@@ -550,10 +548,8 @@ static int __init stamp_init(void) | |||
550 | 548 | ||
551 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 549 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
552 | 550 | ||
553 | #ifdef CONFIG_I2C_BOARDINFO | ||
554 | i2c_register_board_info(0, bfin_i2c_board_info, | 551 | i2c_register_board_info(0, bfin_i2c_board_info, |
555 | ARRAY_SIZE(bfin_i2c_board_info)); | 552 | ARRAY_SIZE(bfin_i2c_board_info)); |
556 | #endif | ||
557 | 553 | ||
558 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 554 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
559 | if (ret < 0) | 555 | if (ret < 0) |
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h index 0d3a03429fb9..1cf893e2e55b 100644 --- a/arch/blackfin/mach-bf533/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * File: include/asm-blackfin/mach-bf533/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf533/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
@@ -160,7 +160,7 @@ | |||
160 | #define ANOMALY_05000301 (__SILICON_REVISION__ < 6) | 160 | #define ANOMALY_05000301 (__SILICON_REVISION__ < 6) |
161 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ | 161 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ |
162 | #define ANOMALY_05000302 (__SILICON_REVISION__ < 5) | 162 | #define ANOMALY_05000302 (__SILICON_REVISION__ < 5) |
163 | /* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ | 163 | /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */ |
164 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) | 164 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) |
165 | /* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ | 165 | /* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ |
166 | #define ANOMALY_05000306 (__SILICON_REVISION__ < 5) | 166 | #define ANOMALY_05000306 (__SILICON_REVISION__ < 5) |
@@ -278,9 +278,12 @@ | |||
278 | #define ANOMALY_05000266 (0) | 278 | #define ANOMALY_05000266 (0) |
279 | #define ANOMALY_05000323 (0) | 279 | #define ANOMALY_05000323 (0) |
280 | #define ANOMALY_05000353 (1) | 280 | #define ANOMALY_05000353 (1) |
281 | #define ANOMALY_05000380 (0) | ||
281 | #define ANOMALY_05000386 (1) | 282 | #define ANOMALY_05000386 (1) |
282 | #define ANOMALY_05000412 (0) | 283 | #define ANOMALY_05000412 (0) |
283 | #define ANOMALY_05000432 (0) | 284 | #define ANOMALY_05000432 (0) |
284 | #define ANOMALY_05000435 (0) | 285 | #define ANOMALY_05000435 (0) |
286 | #define ANOMALY_05000447 (0) | ||
287 | #define ANOMALY_05000448 (0) | ||
285 | 288 | ||
286 | #endif | 289 | #endif |
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h index f3d9e495230c..5f517f53b0fd 100644 --- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h | |||
@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
134 | CH_UART_TX, | 134 | CH_UART_TX, |
135 | CH_UART_RX, | 135 | CH_UART_RX, |
136 | #endif | 136 | #endif |
137 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 137 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
138 | CONFIG_UART0_CTS_PIN, | 138 | CONFIG_UART0_CTS_PIN, |
139 | CONFIG_UART0_RTS_PIN, | 139 | CONFIG_UART0_RTS_PIN, |
140 | #endif | 140 | #endif |
diff --git a/arch/blackfin/mach-bf533/include/mach/portmux.h b/arch/blackfin/mach-bf533/include/mach/portmux.h index 685a2651dcda..2f59ce0b0cb5 100644 --- a/arch/blackfin/mach-bf533/include/mach/portmux.h +++ b/arch/blackfin/mach-bf533/include/mach/portmux.h | |||
@@ -54,14 +54,11 @@ | |||
54 | #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) | 54 | #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) |
55 | #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) | 55 | #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) |
56 | #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) | 56 | #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) |
57 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 | ||
57 | 58 | ||
58 | #define P_TMR2 (P_DONTCARE) | 59 | #define P_TMR2 (P_DONTCARE) |
59 | #define P_TMR1 (P_DONTCARE) | 60 | #define P_TMR1 (P_DONTCARE) |
60 | #define P_TMR0 (P_DONTCARE) | 61 | #define P_TMR0 (P_DONTCARE) |
61 | #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1)) | 62 | #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1)) |
62 | 63 | ||
63 | |||
64 | |||
65 | |||
66 | |||
67 | #endif /* _MACH_PORTMUX_H_ */ | 64 | #endif /* _MACH_PORTMUX_H_ */ |
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig index 42a57b0acb29..77c59da87e85 100644 --- a/arch/blackfin/mach-bf537/boards/Kconfig +++ b/arch/blackfin/mach-bf537/boards/Kconfig | |||
@@ -33,9 +33,4 @@ config CAMSIG_MINOTAUR | |||
33 | help | 33 | help |
34 | Board supply package for CSP Minotaur | 34 | Board supply package for CSP Minotaur |
35 | 35 | ||
36 | config GENERIC_BF537_BOARD | ||
37 | bool "Generic" | ||
38 | help | ||
39 | Generic or Custom board support. | ||
40 | |||
41 | endchoice | 36 | endchoice |
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile index 7168cc14afd8..68b98a7af6a6 100644 --- a/arch/blackfin/mach-bf537/boards/Makefile +++ b/arch/blackfin/mach-bf537/boards/Makefile | |||
@@ -2,7 +2,6 @@ | |||
2 | # arch/blackfin/mach-bf537/boards/Makefile | 2 | # arch/blackfin/mach-bf537/boards/Makefile |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o | ||
6 | obj-$(CONFIG_BFIN537_STAMP) += stamp.o | 5 | obj-$(CONFIG_BFIN537_STAMP) += stamp.o |
7 | obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o | 6 | obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o |
8 | obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o | 7 | obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o |
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c index 6ac8e4d5bd38..41c75b9bfac0 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c | |||
@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
108 | }; | 108 | }; |
109 | #endif | 109 | #endif |
110 | 110 | ||
111 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 111 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
112 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 112 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
113 | .enable_dma = 1, | 113 | .enable_dma = 0, |
114 | .bits_per_word = 8, | 114 | .bits_per_word = 8, |
115 | }; | 115 | }; |
116 | #endif | 116 | #endif |
@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
160 | }, | 160 | }, |
161 | #endif | 161 | #endif |
162 | 162 | ||
163 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 163 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
164 | { | ||
165 | .modalias = "spi_mmc_dummy", | ||
166 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
167 | .bus_num = 0, | ||
168 | .chip_select = 7, | ||
169 | .platform_data = NULL, | ||
170 | .controller_data = &spi_mmc_chip_info, | ||
171 | .mode = SPI_MODE_3, | ||
172 | }, | ||
173 | { | 164 | { |
174 | .modalias = "spi_mmc", | 165 | .modalias = "mmc_spi", |
175 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 166 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
176 | .bus_num = 0, | 167 | .bus_num = 0, |
177 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 168 | .chip_select = 1, |
178 | .platform_data = NULL, | 169 | .controller_data = &mmc_spi_chip_info, |
179 | .controller_data = &spi_mmc_chip_info, | ||
180 | .mode = SPI_MODE_3, | 170 | .mode = SPI_MODE_3, |
181 | }, | 171 | }, |
182 | #endif | 172 | #endif |
@@ -479,8 +469,13 @@ static struct platform_device bfin_sport1_uart_device = { | |||
479 | #endif | 469 | #endif |
480 | 470 | ||
481 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 471 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
472 | static struct platform_device bfin_mii_bus = { | ||
473 | .name = "bfin_mii_bus", | ||
474 | }; | ||
475 | |||
482 | static struct platform_device bfin_mac_device = { | 476 | static struct platform_device bfin_mac_device = { |
483 | .name = "bfin_mac", | 477 | .name = "bfin_mac", |
478 | .dev.platform_data = &bfin_mii_bus, | ||
484 | }; | 479 | }; |
485 | #endif | 480 | #endif |
486 | 481 | ||
@@ -591,6 +586,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = { | |||
591 | #endif | 586 | #endif |
592 | 587 | ||
593 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 588 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
589 | &bfin_mii_bus, | ||
594 | &bfin_mac_device, | 590 | &bfin_mac_device, |
595 | #endif | 591 | #endif |
596 | 592 | ||
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c deleted file mode 100644 index dd6e6bfb98ea..000000000000 --- a/arch/blackfin/mach-bf537/boards/generic_board.c +++ /dev/null | |||
@@ -1,739 +0,0 @@ | |||
1 | /* | ||
2 | * File: arch/blackfin/mach-bf537/boards/generic_board.c | ||
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | ||
4 | * Author: Aidan Williams <aidan@nicta.com.au> | ||
5 | * | ||
6 | * Created: | ||
7 | * Description: | ||
8 | * | ||
9 | * Modified: | ||
10 | * Copyright 2005 National ICT Australia (NICTA) | ||
11 | * Copyright 2004-2008 Analog Devices Inc. | ||
12 | * | ||
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License as published by | ||
17 | * the Free Software Foundation; either version 2 of the License, or | ||
18 | * (at your option) any later version. | ||
19 | * | ||
20 | * This program is distributed in the hope that it will be useful, | ||
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
23 | * GNU General Public License for more details. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License | ||
26 | * along with this program; if not, see the file COPYING, or write | ||
27 | * to the Free Software Foundation, Inc., | ||
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
29 | */ | ||
30 | |||
31 | #include <linux/device.h> | ||
32 | #include <linux/etherdevice.h> | ||
33 | #include <linux/platform_device.h> | ||
34 | #include <linux/mtd/mtd.h> | ||
35 | #include <linux/mtd/partitions.h> | ||
36 | #include <linux/spi/spi.h> | ||
37 | #include <linux/spi/flash.h> | ||
38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
39 | #include <linux/usb/isp1362.h> | ||
40 | #endif | ||
41 | #include <linux/irq.h> | ||
42 | #include <linux/interrupt.h> | ||
43 | #include <linux/usb/sl811.h> | ||
44 | #include <asm/dma.h> | ||
45 | #include <asm/bfin5xx_spi.h> | ||
46 | #include <asm/reboot.h> | ||
47 | #include <asm/portmux.h> | ||
48 | #include <linux/spi/ad7877.h> | ||
49 | |||
50 | /* | ||
51 | * Name the Board for the /proc/cpuinfo | ||
52 | */ | ||
53 | const char bfin_board_name[] = "UNKNOWN BOARD"; | ||
54 | |||
55 | /* | ||
56 | * Driver needs to know address, irq and flag pin. | ||
57 | */ | ||
58 | |||
59 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | ||
60 | #include <linux/usb/isp1760.h> | ||
61 | static struct resource bfin_isp1760_resources[] = { | ||
62 | [0] = { | ||
63 | .start = 0x203C0000, | ||
64 | .end = 0x203C0000 + 0x000fffff, | ||
65 | .flags = IORESOURCE_MEM, | ||
66 | }, | ||
67 | [1] = { | ||
68 | .start = IRQ_PF7, | ||
69 | .end = IRQ_PF7, | ||
70 | .flags = IORESOURCE_IRQ, | ||
71 | }, | ||
72 | }; | ||
73 | |||
74 | static struct isp1760_platform_data isp1760_priv = { | ||
75 | .is_isp1761 = 0, | ||
76 | .port1_disable = 0, | ||
77 | .bus_width_16 = 1, | ||
78 | .port1_otg = 0, | ||
79 | .analog_oc = 0, | ||
80 | .dack_polarity_high = 0, | ||
81 | .dreq_polarity_high = 0, | ||
82 | }; | ||
83 | |||
84 | static struct platform_device bfin_isp1760_device = { | ||
85 | .name = "isp1760-hcd", | ||
86 | .id = 0, | ||
87 | .dev = { | ||
88 | .platform_data = &isp1760_priv, | ||
89 | }, | ||
90 | .num_resources = ARRAY_SIZE(bfin_isp1760_resources), | ||
91 | .resource = bfin_isp1760_resources, | ||
92 | }; | ||
93 | #endif | ||
94 | |||
95 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | ||
96 | static struct resource bfin_pcmcia_cf_resources[] = { | ||
97 | { | ||
98 | .start = 0x20310000, /* IO PORT */ | ||
99 | .end = 0x20312000, | ||
100 | .flags = IORESOURCE_MEM, | ||
101 | }, { | ||
102 | .start = 0x20311000, /* Attribute Memory */ | ||
103 | .end = 0x20311FFF, | ||
104 | .flags = IORESOURCE_MEM, | ||
105 | }, { | ||
106 | .start = IRQ_PF4, | ||
107 | .end = IRQ_PF4, | ||
108 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
109 | }, { | ||
110 | .start = 6, /* Card Detect PF6 */ | ||
111 | .end = 6, | ||
112 | .flags = IORESOURCE_IRQ, | ||
113 | }, | ||
114 | }; | ||
115 | |||
116 | static struct platform_device bfin_pcmcia_cf_device = { | ||
117 | .name = "bfin_cf_pcmcia", | ||
118 | .id = -1, | ||
119 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | ||
120 | .resource = bfin_pcmcia_cf_resources, | ||
121 | }; | ||
122 | #endif | ||
123 | |||
124 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
125 | static struct platform_device rtc_device = { | ||
126 | .name = "rtc-bfin", | ||
127 | .id = -1, | ||
128 | }; | ||
129 | #endif | ||
130 | |||
131 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
132 | static struct resource smc91x_resources[] = { | ||
133 | { | ||
134 | .name = "smc91x-regs", | ||
135 | .start = 0x20300300, | ||
136 | .end = 0x20300300 + 16, | ||
137 | .flags = IORESOURCE_MEM, | ||
138 | }, { | ||
139 | |||
140 | .start = IRQ_PF7, | ||
141 | .end = IRQ_PF7, | ||
142 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
143 | }, | ||
144 | }; | ||
145 | static struct platform_device smc91x_device = { | ||
146 | .name = "smc91x", | ||
147 | .id = 0, | ||
148 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
149 | .resource = smc91x_resources, | ||
150 | }; | ||
151 | #endif | ||
152 | |||
153 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
154 | static struct resource dm9000_resources[] = { | ||
155 | [0] = { | ||
156 | .start = 0x203FB800, | ||
157 | .end = 0x203FB800 + 1, | ||
158 | .flags = IORESOURCE_MEM, | ||
159 | }, | ||
160 | [1] = { | ||
161 | .start = 0x203FB800 + 4, | ||
162 | .end = 0x203FB800 + 5, | ||
163 | .flags = IORESOURCE_MEM, | ||
164 | }, | ||
165 | [2] = { | ||
166 | .start = IRQ_PF9, | ||
167 | .end = IRQ_PF9, | ||
168 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | ||
169 | }, | ||
170 | }; | ||
171 | |||
172 | static struct platform_device dm9000_device = { | ||
173 | .name = "dm9000", | ||
174 | .id = -1, | ||
175 | .num_resources = ARRAY_SIZE(dm9000_resources), | ||
176 | .resource = dm9000_resources, | ||
177 | }; | ||
178 | #endif | ||
179 | |||
180 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | ||
181 | static struct resource sl811_hcd_resources[] = { | ||
182 | { | ||
183 | .start = 0x20340000, | ||
184 | .end = 0x20340000, | ||
185 | .flags = IORESOURCE_MEM, | ||
186 | }, { | ||
187 | .start = 0x20340004, | ||
188 | .end = 0x20340004, | ||
189 | .flags = IORESOURCE_MEM, | ||
190 | }, { | ||
191 | .start = CONFIG_USB_SL811_BFIN_IRQ, | ||
192 | .end = CONFIG_USB_SL811_BFIN_IRQ, | ||
193 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
194 | }, | ||
195 | }; | ||
196 | |||
197 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | ||
198 | void sl811_port_power(struct device *dev, int is_on) | ||
199 | { | ||
200 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); | ||
201 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); | ||
202 | |||
203 | } | ||
204 | #endif | ||
205 | |||
206 | static struct sl811_platform_data sl811_priv = { | ||
207 | .potpg = 10, | ||
208 | .power = 250, /* == 500mA */ | ||
209 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | ||
210 | .port_power = &sl811_port_power, | ||
211 | #endif | ||
212 | }; | ||
213 | |||
214 | static struct platform_device sl811_hcd_device = { | ||
215 | .name = "sl811-hcd", | ||
216 | .id = 0, | ||
217 | .dev = { | ||
218 | .platform_data = &sl811_priv, | ||
219 | }, | ||
220 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | ||
221 | .resource = sl811_hcd_resources, | ||
222 | }; | ||
223 | #endif | ||
224 | |||
225 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
226 | static struct resource isp1362_hcd_resources[] = { | ||
227 | { | ||
228 | .start = 0x20360000, | ||
229 | .end = 0x20360000, | ||
230 | .flags = IORESOURCE_MEM, | ||
231 | }, { | ||
232 | .start = 0x20360004, | ||
233 | .end = 0x20360004, | ||
234 | .flags = IORESOURCE_MEM, | ||
235 | }, { | ||
236 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | ||
237 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | ||
238 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
239 | }, | ||
240 | }; | ||
241 | |||
242 | static struct isp1362_platform_data isp1362_priv = { | ||
243 | .sel15Kres = 1, | ||
244 | .clknotstop = 0, | ||
245 | .oc_enable = 0, | ||
246 | .int_act_high = 0, | ||
247 | .int_edge_triggered = 0, | ||
248 | .remote_wakeup_connected = 0, | ||
249 | .no_power_switching = 1, | ||
250 | .power_switching_mode = 0, | ||
251 | }; | ||
252 | |||
253 | static struct platform_device isp1362_hcd_device = { | ||
254 | .name = "isp1362-hcd", | ||
255 | .id = 0, | ||
256 | .dev = { | ||
257 | .platform_data = &isp1362_priv, | ||
258 | }, | ||
259 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | ||
260 | .resource = isp1362_hcd_resources, | ||
261 | }; | ||
262 | #endif | ||
263 | |||
264 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
265 | static struct platform_device bfin_mac_device = { | ||
266 | .name = "bfin_mac", | ||
267 | }; | ||
268 | #endif | ||
269 | |||
270 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | ||
271 | static struct resource net2272_bfin_resources[] = { | ||
272 | { | ||
273 | .start = 0x20300000, | ||
274 | .end = 0x20300000 + 0x100, | ||
275 | .flags = IORESOURCE_MEM, | ||
276 | }, { | ||
277 | .start = IRQ_PF7, | ||
278 | .end = IRQ_PF7, | ||
279 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
280 | }, | ||
281 | }; | ||
282 | |||
283 | static struct platform_device net2272_bfin_device = { | ||
284 | .name = "net2272", | ||
285 | .id = -1, | ||
286 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | ||
287 | .resource = net2272_bfin_resources, | ||
288 | }; | ||
289 | #endif | ||
290 | |||
291 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
292 | /* all SPI peripherals info goes here */ | ||
293 | |||
294 | #if defined(CONFIG_MTD_M25P80) \ | ||
295 | || defined(CONFIG_MTD_M25P80_MODULE) | ||
296 | static struct mtd_partition bfin_spi_flash_partitions[] = { | ||
297 | { | ||
298 | .name = "bootloader(spi)", | ||
299 | .size = 0x00020000, | ||
300 | .offset = 0, | ||
301 | .mask_flags = MTD_CAP_ROM | ||
302 | }, { | ||
303 | .name = "linux kernel(spi)", | ||
304 | .size = 0xe0000, | ||
305 | .offset = 0x20000 | ||
306 | }, { | ||
307 | .name = "file system(spi)", | ||
308 | .size = 0x700000, | ||
309 | .offset = 0x00100000, | ||
310 | } | ||
311 | }; | ||
312 | |||
313 | static struct flash_platform_data bfin_spi_flash_data = { | ||
314 | .name = "m25p80", | ||
315 | .parts = bfin_spi_flash_partitions, | ||
316 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | ||
317 | .type = "m25p64", | ||
318 | }; | ||
319 | |||
320 | /* SPI flash chip (m25p64) */ | ||
321 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | ||
322 | .enable_dma = 0, /* use dma transfer with this chip*/ | ||
323 | .bits_per_word = 8, | ||
324 | }; | ||
325 | #endif | ||
326 | |||
327 | #if defined(CONFIG_SPI_ADC_BF533) \ | ||
328 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | ||
329 | /* SPI ADC chip */ | ||
330 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
331 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
332 | .bits_per_word = 16, | ||
333 | }; | ||
334 | #endif | ||
335 | |||
336 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | ||
337 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | ||
338 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
339 | .enable_dma = 0, | ||
340 | .bits_per_word = 16, | ||
341 | }; | ||
342 | #endif | ||
343 | |||
344 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | ||
345 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | ||
346 | .enable_dma = 0, | ||
347 | .bits_per_word = 16, | ||
348 | }; | ||
349 | #endif | ||
350 | |||
351 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | ||
352 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | ||
353 | .enable_dma = 1, | ||
354 | .bits_per_word = 8, | ||
355 | }; | ||
356 | #endif | ||
357 | |||
358 | #if defined(CONFIG_PBX) | ||
359 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | ||
360 | .ctl_reg = 0x4, /* send zero */ | ||
361 | .enable_dma = 0, | ||
362 | .bits_per_word = 8, | ||
363 | .cs_change_per_word = 1, | ||
364 | }; | ||
365 | #endif | ||
366 | |||
367 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | ||
368 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
369 | .enable_dma = 0, | ||
370 | .bits_per_word = 16, | ||
371 | }; | ||
372 | |||
373 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | ||
374 | .model = 7877, | ||
375 | .vref_delay_usecs = 50, /* internal, no capacitor */ | ||
376 | .x_plate_ohms = 419, | ||
377 | .y_plate_ohms = 486, | ||
378 | .pressure_max = 1000, | ||
379 | .pressure_min = 0, | ||
380 | .stopacq_polarity = 1, | ||
381 | .first_conversion_delay = 3, | ||
382 | .acquisition_time = 1, | ||
383 | .averaging = 1, | ||
384 | .pen_down_acc_interval = 1, | ||
385 | }; | ||
386 | #endif | ||
387 | |||
388 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | ||
389 | #if defined(CONFIG_MTD_M25P80) \ | ||
390 | || defined(CONFIG_MTD_M25P80_MODULE) | ||
391 | { | ||
392 | /* the modalias must be the same as spi device driver name */ | ||
393 | .modalias = "m25p80", /* Name of spi_driver for this device */ | ||
394 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
395 | .bus_num = 0, /* Framework bus number */ | ||
396 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ | ||
397 | .platform_data = &bfin_spi_flash_data, | ||
398 | .controller_data = &spi_flash_chip_info, | ||
399 | .mode = SPI_MODE_3, | ||
400 | }, | ||
401 | #endif | ||
402 | |||
403 | #if defined(CONFIG_SPI_ADC_BF533) \ | ||
404 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | ||
405 | { | ||
406 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
407 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
408 | .bus_num = 0, /* Framework bus number */ | ||
409 | .chip_select = 1, /* Framework chip select. */ | ||
410 | .platform_data = NULL, /* No spi_driver specific config */ | ||
411 | .controller_data = &spi_adc_chip_info, | ||
412 | }, | ||
413 | #endif | ||
414 | |||
415 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | ||
416 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | ||
417 | { | ||
418 | .modalias = "ad1836-spi", | ||
419 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
420 | .bus_num = 0, | ||
421 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, | ||
422 | .controller_data = &ad1836_spi_chip_info, | ||
423 | }, | ||
424 | #endif | ||
425 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | ||
426 | { | ||
427 | .modalias = "ad9960-spi", | ||
428 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | ||
429 | .bus_num = 0, | ||
430 | .chip_select = 1, | ||
431 | .controller_data = &ad9960_spi_chip_info, | ||
432 | }, | ||
433 | #endif | ||
434 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | ||
435 | { | ||
436 | .modalias = "spi_mmc_dummy", | ||
437 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
438 | .bus_num = 0, | ||
439 | .chip_select = 0, | ||
440 | .platform_data = NULL, | ||
441 | .controller_data = &spi_mmc_chip_info, | ||
442 | .mode = SPI_MODE_3, | ||
443 | }, | ||
444 | { | ||
445 | .modalias = "spi_mmc", | ||
446 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
447 | .bus_num = 0, | ||
448 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | ||
449 | .platform_data = NULL, | ||
450 | .controller_data = &spi_mmc_chip_info, | ||
451 | .mode = SPI_MODE_3, | ||
452 | }, | ||
453 | #endif | ||
454 | #if defined(CONFIG_PBX) | ||
455 | { | ||
456 | .modalias = "fxs-spi", | ||
457 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | ||
458 | .bus_num = 0, | ||
459 | .chip_select = 8 - CONFIG_J11_JUMPER, | ||
460 | .controller_data = &spi_si3xxx_chip_info, | ||
461 | .mode = SPI_MODE_3, | ||
462 | }, | ||
463 | { | ||
464 | .modalias = "fxo-spi", | ||
465 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | ||
466 | .bus_num = 0, | ||
467 | .chip_select = 8 - CONFIG_J19_JUMPER, | ||
468 | .controller_data = &spi_si3xxx_chip_info, | ||
469 | .mode = SPI_MODE_3, | ||
470 | }, | ||
471 | #endif | ||
472 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | ||
473 | { | ||
474 | .modalias = "ad7877", | ||
475 | .platform_data = &bfin_ad7877_ts_info, | ||
476 | .irq = IRQ_PF6, | ||
477 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | ||
478 | .bus_num = 0, | ||
479 | .chip_select = 1, | ||
480 | .controller_data = &spi_ad7877_chip_info, | ||
481 | }, | ||
482 | #endif | ||
483 | }; | ||
484 | |||
485 | /* SPI controller data */ | ||
486 | static struct bfin5xx_spi_master bfin_spi0_info = { | ||
487 | .num_chipselect = 8, | ||
488 | .enable_dma = 1, /* master has the ability to do dma transfer */ | ||
489 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, | ||
490 | }; | ||
491 | |||
492 | /* SPI (0) */ | ||
493 | static struct resource bfin_spi0_resource[] = { | ||
494 | [0] = { | ||
495 | .start = SPI0_REGBASE, | ||
496 | .end = SPI0_REGBASE + 0xFF, | ||
497 | .flags = IORESOURCE_MEM, | ||
498 | }, | ||
499 | [1] = { | ||
500 | .start = CH_SPI, | ||
501 | .end = CH_SPI, | ||
502 | .flags = IORESOURCE_IRQ, | ||
503 | }, | ||
504 | }; | ||
505 | |||
506 | static struct platform_device bfin_spi0_device = { | ||
507 | .name = "bfin-spi", | ||
508 | .id = 0, /* Bus number */ | ||
509 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | ||
510 | .resource = bfin_spi0_resource, | ||
511 | .dev = { | ||
512 | .platform_data = &bfin_spi0_info, /* Passed to driver */ | ||
513 | }, | ||
514 | }; | ||
515 | #endif /* spi master and devices */ | ||
516 | |||
517 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | ||
518 | static struct platform_device bfin_fb_device = { | ||
519 | .name = "bf537-lq035", | ||
520 | }; | ||
521 | #endif | ||
522 | |||
523 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | ||
524 | static struct platform_device bfin_fb_adv7393_device = { | ||
525 | .name = "bfin-adv7393", | ||
526 | }; | ||
527 | #endif | ||
528 | |||
529 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | ||
530 | static struct resource bfin_uart_resources[] = { | ||
531 | { | ||
532 | .start = 0xFFC00400, | ||
533 | .end = 0xFFC004FF, | ||
534 | .flags = IORESOURCE_MEM, | ||
535 | }, { | ||
536 | .start = 0xFFC02000, | ||
537 | .end = 0xFFC020FF, | ||
538 | .flags = IORESOURCE_MEM, | ||
539 | }, | ||
540 | }; | ||
541 | |||
542 | static struct platform_device bfin_uart_device = { | ||
543 | .name = "bfin-uart", | ||
544 | .id = 1, | ||
545 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | ||
546 | .resource = bfin_uart_resources, | ||
547 | }; | ||
548 | #endif | ||
549 | |||
550 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
551 | #ifdef CONFIG_BFIN_SIR0 | ||
552 | static struct resource bfin_sir0_resources[] = { | ||
553 | { | ||
554 | .start = 0xFFC00400, | ||
555 | .end = 0xFFC004FF, | ||
556 | .flags = IORESOURCE_MEM, | ||
557 | }, | ||
558 | { | ||
559 | .start = IRQ_UART0_RX, | ||
560 | .end = IRQ_UART0_RX+1, | ||
561 | .flags = IORESOURCE_IRQ, | ||
562 | }, | ||
563 | { | ||
564 | .start = CH_UART0_RX, | ||
565 | .end = CH_UART0_RX+1, | ||
566 | .flags = IORESOURCE_DMA, | ||
567 | }, | ||
568 | }; | ||
569 | |||
570 | static struct platform_device bfin_sir0_device = { | ||
571 | .name = "bfin_sir", | ||
572 | .id = 0, | ||
573 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | ||
574 | .resource = bfin_sir0_resources, | ||
575 | }; | ||
576 | #endif | ||
577 | #ifdef CONFIG_BFIN_SIR1 | ||
578 | static struct resource bfin_sir1_resources[] = { | ||
579 | { | ||
580 | .start = 0xFFC02000, | ||
581 | .end = 0xFFC020FF, | ||
582 | .flags = IORESOURCE_MEM, | ||
583 | }, | ||
584 | { | ||
585 | .start = IRQ_UART1_RX, | ||
586 | .end = IRQ_UART1_RX+1, | ||
587 | .flags = IORESOURCE_IRQ, | ||
588 | }, | ||
589 | { | ||
590 | .start = CH_UART1_RX, | ||
591 | .end = CH_UART1_RX+1, | ||
592 | .flags = IORESOURCE_DMA, | ||
593 | }, | ||
594 | }; | ||
595 | |||
596 | static struct platform_device bfin_sir1_device = { | ||
597 | .name = "bfin_sir", | ||
598 | .id = 1, | ||
599 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), | ||
600 | .resource = bfin_sir1_resources, | ||
601 | }; | ||
602 | #endif | ||
603 | #endif | ||
604 | |||
605 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | ||
606 | static struct resource bfin_twi0_resource[] = { | ||
607 | [0] = { | ||
608 | .start = TWI0_REGBASE, | ||
609 | .end = TWI0_REGBASE + 0xFF, | ||
610 | .flags = IORESOURCE_MEM, | ||
611 | }, | ||
612 | [1] = { | ||
613 | .start = IRQ_TWI, | ||
614 | .end = IRQ_TWI, | ||
615 | .flags = IORESOURCE_IRQ, | ||
616 | }, | ||
617 | }; | ||
618 | |||
619 | static struct platform_device i2c_bfin_twi_device = { | ||
620 | .name = "i2c-bfin-twi", | ||
621 | .id = 0, | ||
622 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), | ||
623 | .resource = bfin_twi0_resource, | ||
624 | }; | ||
625 | #endif | ||
626 | |||
627 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | ||
628 | static struct platform_device bfin_sport0_uart_device = { | ||
629 | .name = "bfin-sport-uart", | ||
630 | .id = 0, | ||
631 | }; | ||
632 | |||
633 | static struct platform_device bfin_sport1_uart_device = { | ||
634 | .name = "bfin-sport-uart", | ||
635 | .id = 1, | ||
636 | }; | ||
637 | #endif | ||
638 | |||
639 | static struct platform_device *stamp_devices[] __initdata = { | ||
640 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | ||
641 | &bfin_pcmcia_cf_device, | ||
642 | #endif | ||
643 | |||
644 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
645 | &rtc_device, | ||
646 | #endif | ||
647 | |||
648 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | ||
649 | &sl811_hcd_device, | ||
650 | #endif | ||
651 | |||
652 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
653 | &isp1362_hcd_device, | ||
654 | #endif | ||
655 | |||
656 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
657 | &smc91x_device, | ||
658 | #endif | ||
659 | |||
660 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
661 | &dm9000_device, | ||
662 | #endif | ||
663 | |||
664 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
665 | &bfin_mac_device, | ||
666 | #endif | ||
667 | |||
668 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | ||
669 | &net2272_bfin_device, | ||
670 | #endif | ||
671 | |||
672 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | ||
673 | &bfin_isp1760_device, | ||
674 | #endif | ||
675 | |||
676 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
677 | &bfin_spi0_device, | ||
678 | #endif | ||
679 | |||
680 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | ||
681 | &bfin_fb_device, | ||
682 | #endif | ||
683 | |||
684 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | ||
685 | &bfin_fb_adv7393_device, | ||
686 | #endif | ||
687 | |||
688 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | ||
689 | &bfin_uart_device, | ||
690 | #endif | ||
691 | |||
692 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
693 | #ifdef CONFIG_BFIN_SIR0 | ||
694 | &bfin_sir0_device, | ||
695 | #endif | ||
696 | #ifdef CONFIG_BFIN_SIR1 | ||
697 | &bfin_sir1_device, | ||
698 | #endif | ||
699 | #endif | ||
700 | |||
701 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | ||
702 | &i2c_bfin_twi_device, | ||
703 | #endif | ||
704 | |||
705 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | ||
706 | &bfin_sport0_uart_device, | ||
707 | &bfin_sport1_uart_device, | ||
708 | #endif | ||
709 | }; | ||
710 | |||
711 | static int __init stamp_init(void) | ||
712 | { | ||
713 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | ||
714 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | ||
715 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
716 | spi_register_board_info(bfin_spi_board_info, | ||
717 | ARRAY_SIZE(bfin_spi_board_info)); | ||
718 | #endif | ||
719 | |||
720 | return 0; | ||
721 | } | ||
722 | |||
723 | arch_initcall(stamp_init); | ||
724 | |||
725 | void native_machine_restart(char *cmd) | ||
726 | { | ||
727 | /* workaround reboot hang when booting from SPI */ | ||
728 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | ||
729 | bfin_gpio_reset_spi0_ssel1(); | ||
730 | } | ||
731 | |||
732 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
733 | void bfin_get_ether_addr(char *addr) | ||
734 | { | ||
735 | random_ether_addr(addr); | ||
736 | printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); | ||
737 | } | ||
738 | EXPORT_SYMBOL(bfin_get_ether_addr); | ||
739 | #endif | ||
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c index bb795341cb17..3c159819e555 100644 --- a/arch/blackfin/mach-bf537/boards/minotaur.c +++ b/arch/blackfin/mach-bf537/boards/minotaur.c | |||
@@ -61,8 +61,13 @@ static struct platform_device rtc_device = { | |||
61 | #endif | 61 | #endif |
62 | 62 | ||
63 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 63 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
64 | static struct platform_device bfin_mii_bus = { | ||
65 | .name = "bfin_mii_bus", | ||
66 | }; | ||
67 | |||
64 | static struct platform_device bfin_mac_device = { | 68 | static struct platform_device bfin_mac_device = { |
65 | .name = "bfin_mac", | 69 | .name = "bfin_mac", |
70 | .dev.platform_data = &bfin_mii_bus, | ||
66 | }; | 71 | }; |
67 | #endif | 72 | #endif |
68 | 73 | ||
@@ -129,9 +134,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
129 | }; | 134 | }; |
130 | #endif | 135 | #endif |
131 | 136 | ||
132 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 137 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
133 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 138 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
134 | .enable_dma = 1, | 139 | .enable_dma = 0, |
135 | .bits_per_word = 8, | 140 | .bits_per_word = 8, |
136 | }; | 141 | }; |
137 | #endif | 142 | #endif |
@@ -151,23 +156,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
151 | }, | 156 | }, |
152 | #endif | 157 | #endif |
153 | 158 | ||
154 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 159 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
155 | { | ||
156 | .modalias = "spi_mmc_dummy", | ||
157 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | ||
158 | .bus_num = 0, | ||
159 | .chip_select = 0, | ||
160 | .platform_data = NULL, | ||
161 | .controller_data = &spi_mmc_chip_info, | ||
162 | .mode = SPI_MODE_3, | ||
163 | }, | ||
164 | { | 160 | { |
165 | .modalias = "spi_mmc", | 161 | .modalias = "mmc_spi", |
166 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 162 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
167 | .bus_num = 0, | 163 | .bus_num = 0, |
168 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 164 | .chip_select = 5, |
169 | .platform_data = NULL, | 165 | .controller_data = &mmc_spi_chip_info, |
170 | .controller_data = &spi_mmc_chip_info, | ||
171 | .mode = SPI_MODE_3, | 166 | .mode = SPI_MODE_3, |
172 | }, | 167 | }, |
173 | #endif | 168 | #endif |
@@ -324,6 +319,7 @@ static struct platform_device *minotaur_devices[] __initdata = { | |||
324 | #endif | 319 | #endif |
325 | 320 | ||
326 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 321 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
322 | &bfin_mii_bus, | ||
327 | &bfin_mac_device, | 323 | &bfin_mac_device, |
328 | #endif | 324 | #endif |
329 | 325 | ||
@@ -377,5 +373,5 @@ void native_machine_restart(char *cmd) | |||
377 | { | 373 | { |
378 | /* workaround reboot hang when booting from SPI */ | 374 | /* workaround reboot hang when booting from SPI */ |
379 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | 375 | if ((bfin_read_SYSCR() & 0x7) == 0x3) |
380 | bfin_gpio_reset_spi0_ssel1(); | 376 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
381 | } | 377 | } |
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c index 89de94f4545d..4e1de1e53f89 100644 --- a/arch/blackfin/mach-bf537/boards/pnav10.c +++ b/arch/blackfin/mach-bf537/boards/pnav10.c | |||
@@ -198,8 +198,13 @@ static struct platform_device isp1362_hcd_device = { | |||
198 | #endif | 198 | #endif |
199 | 199 | ||
200 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 200 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
201 | static struct platform_device bfin_mii_bus = { | ||
202 | .name = "bfin_mii_bus", | ||
203 | }; | ||
204 | |||
201 | static struct platform_device bfin_mac_device = { | 205 | static struct platform_device bfin_mac_device = { |
202 | .name = "bfin_mac", | 206 | .name = "bfin_mac", |
207 | .dev.platform_data = &bfin_mii_bus, | ||
203 | }; | 208 | }; |
204 | #endif | 209 | #endif |
205 | 210 | ||
@@ -284,9 +289,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
284 | }; | 289 | }; |
285 | #endif | 290 | #endif |
286 | 291 | ||
287 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 292 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
288 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 293 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
289 | .enable_dma = 1, | 294 | .enable_dma = 0, |
290 | .bits_per_word = 8, | 295 | .bits_per_word = 8, |
291 | }; | 296 | }; |
292 | #endif | 297 | #endif |
@@ -359,23 +364,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
359 | .controller_data = &ad9960_spi_chip_info, | 364 | .controller_data = &ad9960_spi_chip_info, |
360 | }, | 365 | }, |
361 | #endif | 366 | #endif |
362 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 367 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
363 | { | ||
364 | .modalias = "spi_mmc_dummy", | ||
365 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
366 | .bus_num = 0, | ||
367 | .chip_select = 7, | ||
368 | .platform_data = NULL, | ||
369 | .controller_data = &spi_mmc_chip_info, | ||
370 | .mode = SPI_MODE_3, | ||
371 | }, | ||
372 | { | 368 | { |
373 | .modalias = "spi_mmc", | 369 | .modalias = "mmc_spi", |
374 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 370 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
375 | .bus_num = 0, | 371 | .bus_num = 0, |
376 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 372 | .chip_select = 5, |
377 | .platform_data = NULL, | 373 | .controller_data = &mmc_spi_chip_info, |
378 | .controller_data = &spi_mmc_chip_info, | ||
379 | .mode = SPI_MODE_3, | 374 | .mode = SPI_MODE_3, |
380 | }, | 375 | }, |
381 | #endif | 376 | #endif |
@@ -529,6 +524,7 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
529 | #endif | 524 | #endif |
530 | 525 | ||
531 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 526 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
527 | &bfin_mii_bus, | ||
532 | &bfin_mac_device, | 528 | &bfin_mac_device, |
533 | #endif | 529 | #endif |
534 | 530 | ||
@@ -558,7 +554,7 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
558 | #endif | 554 | #endif |
559 | }; | 555 | }; |
560 | 556 | ||
561 | static int __init stamp_init(void) | 557 | static int __init pnav_init(void) |
562 | { | 558 | { |
563 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 559 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
564 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 560 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
@@ -569,7 +565,7 @@ static int __init stamp_init(void) | |||
569 | return 0; | 565 | return 0; |
570 | } | 566 | } |
571 | 567 | ||
572 | arch_initcall(stamp_init); | 568 | arch_initcall(pnav_init); |
573 | 569 | ||
574 | void bfin_get_ether_addr(char *addr) | 570 | void bfin_get_ether_addr(char *addr) |
575 | { | 571 | { |
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index d812e2514a2f..cd04c5e44878 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c | |||
@@ -321,8 +321,13 @@ static struct platform_device isp1362_hcd_device = { | |||
321 | #endif | 321 | #endif |
322 | 322 | ||
323 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 323 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
324 | static struct platform_device bfin_mii_bus = { | ||
325 | .name = "bfin_mii_bus", | ||
326 | }; | ||
327 | |||
324 | static struct platform_device bfin_mac_device = { | 328 | static struct platform_device bfin_mac_device = { |
325 | .name = "bfin_mac", | 329 | .name = "bfin_mac", |
330 | .dev.platform_data = &bfin_mii_bus, | ||
326 | }; | 331 | }; |
327 | #endif | 332 | #endif |
328 | 333 | ||
@@ -1068,7 +1073,6 @@ static struct adp5588_kpad_platform_data adp5588_kpad_data = { | |||
1068 | }; | 1073 | }; |
1069 | #endif | 1074 | #endif |
1070 | 1075 | ||
1071 | #ifdef CONFIG_I2C_BOARDINFO | ||
1072 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 1076 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
1073 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) | 1077 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) |
1074 | { | 1078 | { |
@@ -1102,7 +1106,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
1102 | }, | 1106 | }, |
1103 | #endif | 1107 | #endif |
1104 | }; | 1108 | }; |
1105 | #endif | ||
1106 | 1109 | ||
1107 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | 1110 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
1108 | static struct platform_device bfin_sport0_uart_device = { | 1111 | static struct platform_device bfin_sport0_uart_device = { |
@@ -1217,6 +1220,7 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
1217 | #endif | 1220 | #endif |
1218 | 1221 | ||
1219 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 1222 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
1223 | &bfin_mii_bus, | ||
1220 | &bfin_mac_device, | 1224 | &bfin_mac_device, |
1221 | #endif | 1225 | #endif |
1222 | 1226 | ||
@@ -1284,12 +1288,8 @@ static struct platform_device *stamp_devices[] __initdata = { | |||
1284 | static int __init stamp_init(void) | 1288 | static int __init stamp_init(void) |
1285 | { | 1289 | { |
1286 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 1290 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
1287 | |||
1288 | #ifdef CONFIG_I2C_BOARDINFO | ||
1289 | i2c_register_board_info(0, bfin_i2c_board_info, | 1291 | i2c_register_board_info(0, bfin_i2c_board_info, |
1290 | ARRAY_SIZE(bfin_i2c_board_info)); | 1292 | ARRAY_SIZE(bfin_i2c_board_info)); |
1291 | #endif | ||
1292 | |||
1293 | bfin_plat_nand_init(); | 1293 | bfin_plat_nand_init(); |
1294 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 1294 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
1295 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | 1295 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
@@ -1307,7 +1307,7 @@ void native_machine_restart(char *cmd) | |||
1307 | { | 1307 | { |
1308 | /* workaround reboot hang when booting from SPI */ | 1308 | /* workaround reboot hang when booting from SPI */ |
1309 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | 1309 | if ((bfin_read_SYSCR() & 0x7) == 0x3) |
1310 | bfin_gpio_reset_spi0_ssel1(); | 1310 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
1311 | } | 1311 | } |
1312 | 1312 | ||
1313 | /* | 1313 | /* |
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c index 2f4b066153c5..53ad10f3cd76 100644 --- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c | |||
@@ -108,9 +108,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
108 | }; | 108 | }; |
109 | #endif | 109 | #endif |
110 | 110 | ||
111 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 111 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
112 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 112 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
113 | .enable_dma = 1, | 113 | .enable_dma = 0, |
114 | .bits_per_word = 8, | 114 | .bits_per_word = 8, |
115 | }; | 115 | }; |
116 | #endif | 116 | #endif |
@@ -160,23 +160,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
160 | }, | 160 | }, |
161 | #endif | 161 | #endif |
162 | 162 | ||
163 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 163 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
164 | { | ||
165 | .modalias = "spi_mmc_dummy", | ||
166 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
167 | .bus_num = 0, | ||
168 | .chip_select = 7, | ||
169 | .platform_data = NULL, | ||
170 | .controller_data = &spi_mmc_chip_info, | ||
171 | .mode = SPI_MODE_3, | ||
172 | }, | ||
173 | { | 164 | { |
174 | .modalias = "spi_mmc", | 165 | .modalias = "mmc_spi", |
175 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 166 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
176 | .bus_num = 0, | 167 | .bus_num = 0, |
177 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 168 | .chip_select = 5, |
178 | .platform_data = NULL, | 169 | .controller_data = &mmc_spi_chip_info, |
179 | .controller_data = &spi_mmc_chip_info, | ||
180 | .mode = SPI_MODE_3, | 170 | .mode = SPI_MODE_3, |
181 | }, | 171 | }, |
182 | #endif | 172 | #endif |
@@ -481,8 +471,13 @@ static struct platform_device bfin_sport1_uart_device = { | |||
481 | #endif | 471 | #endif |
482 | 472 | ||
483 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 473 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
474 | static struct platform_device bfin_mii_bus = { | ||
475 | .name = "bfin_mii_bus", | ||
476 | }; | ||
477 | |||
484 | static struct platform_device bfin_mac_device = { | 478 | static struct platform_device bfin_mac_device = { |
485 | .name = "bfin_mac", | 479 | .name = "bfin_mac", |
480 | .dev.platform_data = &bfin_mii_bus, | ||
486 | }; | 481 | }; |
487 | #endif | 482 | #endif |
488 | 483 | ||
@@ -593,6 +588,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = { | |||
593 | #endif | 588 | #endif |
594 | 589 | ||
595 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 590 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
591 | &bfin_mii_bus, | ||
596 | &bfin_mac_device, | 592 | &bfin_mac_device, |
597 | #endif | 593 | #endif |
598 | 594 | ||
@@ -615,7 +611,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = { | |||
615 | &bfin_gpios_device, | 611 | &bfin_gpios_device, |
616 | }; | 612 | }; |
617 | 613 | ||
618 | static int __init cm_bf537_init(void) | 614 | static int __init tcm_bf537_init(void) |
619 | { | 615 | { |
620 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 616 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
621 | platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices)); | 617 | platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices)); |
@@ -629,7 +625,7 @@ static int __init cm_bf537_init(void) | |||
629 | return 0; | 625 | return 0; |
630 | } | 626 | } |
631 | 627 | ||
632 | arch_initcall(cm_bf537_init); | 628 | arch_initcall(tcm_bf537_init); |
633 | 629 | ||
634 | void bfin_get_ether_addr(char *addr) | 630 | void bfin_get_ether_addr(char *addr) |
635 | { | 631 | { |
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h index 9cb39121d1cb..1bfd80c26c90 100644 --- a/arch/blackfin/mach-bf537/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * File: include/asm-blackfin/mach-bf537/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf537/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
@@ -110,7 +110,7 @@ | |||
110 | #define ANOMALY_05000301 (1) | 110 | #define ANOMALY_05000301 (1) |
111 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ | 111 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ |
112 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 3) | 112 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 3) |
113 | /* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ | 113 | /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */ |
114 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 3) | 114 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 3) |
115 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ | 115 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ |
116 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 3) | 116 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 3) |
@@ -168,9 +168,12 @@ | |||
168 | #define ANOMALY_05000323 (0) | 168 | #define ANOMALY_05000323 (0) |
169 | #define ANOMALY_05000353 (1) | 169 | #define ANOMALY_05000353 (1) |
170 | #define ANOMALY_05000363 (0) | 170 | #define ANOMALY_05000363 (0) |
171 | #define ANOMALY_05000380 (0) | ||
171 | #define ANOMALY_05000386 (1) | 172 | #define ANOMALY_05000386 (1) |
172 | #define ANOMALY_05000412 (0) | 173 | #define ANOMALY_05000412 (0) |
173 | #define ANOMALY_05000432 (0) | 174 | #define ANOMALY_05000432 (0) |
174 | #define ANOMALY_05000435 (0) | 175 | #define ANOMALY_05000435 (0) |
176 | #define ANOMALY_05000447 (0) | ||
177 | #define ANOMALY_05000448 (0) | ||
175 | 178 | ||
176 | #endif | 179 | #endif |
diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h index b3f87e1d16a2..9e34700844a2 100644 --- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h | |||
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
144 | CH_UART0_TX, | 144 | CH_UART0_TX, |
145 | CH_UART0_RX, | 145 | CH_UART0_RX, |
146 | #endif | 146 | #endif |
147 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
148 | CONFIG_UART0_CTS_PIN, | 148 | CONFIG_UART0_CTS_PIN, |
149 | CONFIG_UART0_RTS_PIN, | 149 | CONFIG_UART0_RTS_PIN, |
150 | #endif | 150 | #endif |
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
158 | CH_UART1_TX, | 158 | CH_UART1_TX, |
159 | CH_UART1_RX, | 159 | CH_UART1_RX, |
160 | #endif | 160 | #endif |
161 | #ifdef CONFIG_BFIN_UART1_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
162 | CONFIG_UART1_CTS_PIN, | 162 | CONFIG_UART1_CTS_PIN, |
163 | CONFIG_UART1_RTS_PIN, | 163 | CONFIG_UART1_RTS_PIN, |
164 | #endif | 164 | #endif |
diff --git a/arch/blackfin/mach-bf537/include/mach/portmux.h b/arch/blackfin/mach-bf537/include/mach/portmux.h index 78fee6e0f237..87285e75e903 100644 --- a/arch/blackfin/mach-bf537/include/mach/portmux.h +++ b/arch/blackfin/mach-bf537/include/mach/portmux.h | |||
@@ -31,6 +31,7 @@ | |||
31 | #define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) | 31 | #define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) |
32 | #define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) | 32 | #define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) |
33 | #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) | 33 | #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) |
34 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1 | ||
34 | 35 | ||
35 | #define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) | 36 | #define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) |
36 | #define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) | 37 | #define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) |
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h index e130b4f8a05d..3a5699827363 100644 --- a/arch/blackfin/mach-bf538/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * File: include/asm-blackfin/mach-bf538/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf538/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
@@ -120,13 +120,17 @@ | |||
120 | #define ANOMALY_05000198 (0) | 120 | #define ANOMALY_05000198 (0) |
121 | #define ANOMALY_05000230 (0) | 121 | #define ANOMALY_05000230 (0) |
122 | #define ANOMALY_05000263 (0) | 122 | #define ANOMALY_05000263 (0) |
123 | #define ANOMALY_05000305 (0) | ||
123 | #define ANOMALY_05000311 (0) | 124 | #define ANOMALY_05000311 (0) |
124 | #define ANOMALY_05000323 (0) | 125 | #define ANOMALY_05000323 (0) |
125 | #define ANOMALY_05000353 (1) | 126 | #define ANOMALY_05000353 (1) |
126 | #define ANOMALY_05000363 (0) | 127 | #define ANOMALY_05000363 (0) |
128 | #define ANOMALY_05000380 (0) | ||
127 | #define ANOMALY_05000386 (1) | 129 | #define ANOMALY_05000386 (1) |
128 | #define ANOMALY_05000412 (0) | 130 | #define ANOMALY_05000412 (0) |
129 | #define ANOMALY_05000432 (0) | 131 | #define ANOMALY_05000432 (0) |
130 | #define ANOMALY_05000435 (0) | 132 | #define ANOMALY_05000435 (0) |
133 | #define ANOMALY_05000447 (0) | ||
134 | #define ANOMALY_05000448 (0) | ||
131 | 135 | ||
132 | #endif | 136 | #endif |
diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h index 40503b6b89a3..3c2811ebecdd 100644 --- a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h | |||
@@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
144 | CH_UART0_TX, | 144 | CH_UART0_TX, |
145 | CH_UART0_RX, | 145 | CH_UART0_RX, |
146 | #endif | 146 | #endif |
147 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
148 | CONFIG_UART0_CTS_PIN, | 148 | CONFIG_UART0_CTS_PIN, |
149 | CONFIG_UART0_RTS_PIN, | 149 | CONFIG_UART0_RTS_PIN, |
150 | #endif | 150 | #endif |
@@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
158 | CH_UART1_TX, | 158 | CH_UART1_TX, |
159 | CH_UART1_RX, | 159 | CH_UART1_RX, |
160 | #endif | 160 | #endif |
161 | #ifdef CONFIG_BFIN_UART1_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
162 | CONFIG_UART1_CTS_PIN, | 162 | CONFIG_UART1_CTS_PIN, |
163 | CONFIG_UART1_RTS_PIN, | 163 | CONFIG_UART1_RTS_PIN, |
164 | #endif | 164 | #endif |
diff --git a/arch/blackfin/mach-bf538/include/mach/portmux.h b/arch/blackfin/mach-bf538/include/mach/portmux.h index 1e031b588b47..c8db264e3e4d 100644 --- a/arch/blackfin/mach-bf538/include/mach/portmux.h +++ b/arch/blackfin/mach-bf538/include/mach/portmux.h | |||
@@ -102,5 +102,6 @@ | |||
102 | #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) | 102 | #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) |
103 | #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) | 103 | #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) |
104 | #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) | 104 | #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) |
105 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 | ||
105 | 106 | ||
106 | #endif /* _MACH_PORTMUX_H_ */ | 107 | #endif /* _MACH_PORTMUX_H_ */ |
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 309c16014cae..096e661700a7 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c | |||
@@ -781,7 +781,6 @@ static struct platform_device i2c_bfin_twi1_device = { | |||
781 | #endif | 781 | #endif |
782 | #endif | 782 | #endif |
783 | 783 | ||
784 | #ifdef CONFIG_I2C_BOARDINFO | ||
785 | static struct i2c_board_info __initdata bfin_i2c_board_info0[] = { | 784 | static struct i2c_board_info __initdata bfin_i2c_board_info0[] = { |
786 | }; | 785 | }; |
787 | 786 | ||
@@ -800,7 +799,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info1[] = { | |||
800 | #endif | 799 | #endif |
801 | }; | 800 | }; |
802 | #endif | 801 | #endif |
803 | #endif | ||
804 | 802 | ||
805 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | 803 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
806 | #include <linux/gpio_keys.h> | 804 | #include <linux/gpio_keys.h> |
@@ -956,14 +954,12 @@ static int __init ezkit_init(void) | |||
956 | { | 954 | { |
957 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | 955 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
958 | 956 | ||
959 | #ifdef CONFIG_I2C_BOARDINFO | ||
960 | i2c_register_board_info(0, bfin_i2c_board_info0, | 957 | i2c_register_board_info(0, bfin_i2c_board_info0, |
961 | ARRAY_SIZE(bfin_i2c_board_info0)); | 958 | ARRAY_SIZE(bfin_i2c_board_info0)); |
962 | #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ | 959 | #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ |
963 | i2c_register_board_info(1, bfin_i2c_board_info1, | 960 | i2c_register_board_info(1, bfin_i2c_board_info1, |
964 | ARRAY_SIZE(bfin_i2c_board_info1)); | 961 | ARRAY_SIZE(bfin_i2c_board_info1)); |
965 | #endif | 962 | #endif |
966 | #endif | ||
967 | 963 | ||
968 | platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); | 964 | platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); |
969 | 965 | ||
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h index 3b5430999f4f..882e40ccf0d1 100644 --- a/arch/blackfin/mach-bf548/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h | |||
@@ -2,12 +2,12 @@ | |||
2 | * File: include/asm-blackfin/mach-bf548/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf548/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | /* This file shoule be up to date with: | 9 | /* This file shoule be up to date with: |
10 | * - Revision G, 08/07/2008; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List | 10 | * - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef _MACH_ANOMALY_H_ | 13 | #ifndef _MACH_ANOMALY_H_ |
@@ -91,8 +91,6 @@ | |||
91 | #define ANOMALY_05000371 (__SILICON_REVISION__ < 2) | 91 | #define ANOMALY_05000371 (__SILICON_REVISION__ < 2) |
92 | /* USB DP/DM Data Pins May Lose State When Entering Hibernate */ | 92 | /* USB DP/DM Data Pins May Lose State When Entering Hibernate */ |
93 | #define ANOMALY_05000372 (__SILICON_REVISION__ < 1) | 93 | #define ANOMALY_05000372 (__SILICON_REVISION__ < 1) |
94 | /* Mobile DDR Operation Not Functional */ | ||
95 | #define ANOMALY_05000377 (1) | ||
96 | /* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ | 94 | /* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ |
97 | #define ANOMALY_05000378 (__SILICON_REVISION__ < 2) | 95 | #define ANOMALY_05000378 (__SILICON_REVISION__ < 2) |
98 | /* 16-Bit NAND FLASH Boot Mode Is Not Functional */ | 96 | /* 16-Bit NAND FLASH Boot Mode Is Not Functional */ |
@@ -157,8 +155,22 @@ | |||
157 | #define ANOMALY_05000429 (__SILICON_REVISION__ < 2) | 155 | #define ANOMALY_05000429 (__SILICON_REVISION__ < 2) |
158 | /* Software System Reset Corrupts PLL_LOCKCNT Register */ | 156 | /* Software System Reset Corrupts PLL_LOCKCNT Register */ |
159 | #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) | 157 | #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) |
158 | /* Incorrect Use of Stack in Lockbox Firmware During Authentication */ | ||
159 | #define ANOMALY_05000431 (__SILICON_REVISION__ < 3) | ||
160 | /* OTP Write Accesses Not Supported */ | ||
161 | #define ANOMALY_05000442 (__SILICON_REVISION__ < 1) | ||
160 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ | 162 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ |
161 | #define ANOMALY_05000443 (1) | 163 | #define ANOMALY_05000443 (1) |
164 | /* CDMAPRIO and L2DMAPRIO Bits in the SYSCR Register Are Not Functional */ | ||
165 | #define ANOMALY_05000446 (1) | ||
166 | /* UART IrDA Receiver Fails on Extended Bit Pulses */ | ||
167 | #define ANOMALY_05000447 (1) | ||
168 | /* DDR Clock Duty Cycle Spec Violation (tCH, tCL) */ | ||
169 | #define ANOMALY_05000448 (__SILICON_REVISION__ == 1) | ||
170 | /* Reduced Timing Margins on DDR Output Setup and Hold (tDS and tDH) */ | ||
171 | #define ANOMALY_05000449 (__SILICON_REVISION__ == 1) | ||
172 | /* USB DMA Mode 1 Short Packet Data Corruption */ | ||
173 | #define ANOMALY_05000450 (1 | ||
162 | 174 | ||
163 | /* Anomalies that don't exist on this proc */ | 175 | /* Anomalies that don't exist on this proc */ |
164 | #define ANOMALY_05000125 (0) | 176 | #define ANOMALY_05000125 (0) |
@@ -171,10 +183,13 @@ | |||
171 | #define ANOMALY_05000263 (0) | 183 | #define ANOMALY_05000263 (0) |
172 | #define ANOMALY_05000266 (0) | 184 | #define ANOMALY_05000266 (0) |
173 | #define ANOMALY_05000273 (0) | 185 | #define ANOMALY_05000273 (0) |
186 | #define ANOMALY_05000278 (0) | ||
187 | #define ANOMALY_05000305 (0) | ||
174 | #define ANOMALY_05000307 (0) | 188 | #define ANOMALY_05000307 (0) |
175 | #define ANOMALY_05000311 (0) | 189 | #define ANOMALY_05000311 (0) |
176 | #define ANOMALY_05000323 (0) | 190 | #define ANOMALY_05000323 (0) |
177 | #define ANOMALY_05000363 (0) | 191 | #define ANOMALY_05000363 (0) |
192 | #define ANOMALY_05000380 (0) | ||
178 | #define ANOMALY_05000412 (0) | 193 | #define ANOMALY_05000412 (0) |
179 | #define ANOMALY_05000432 (0) | 194 | #define ANOMALY_05000432 (0) |
180 | #define ANOMALY_05000435 (0) | 195 | #define ANOMALY_05000435 (0) |
diff --git a/arch/blackfin/mach-bf548/include/mach/bf548.h b/arch/blackfin/mach-bf548/include/mach/bf548.h index f0e569984810..cd31f72bdd82 100644 --- a/arch/blackfin/mach-bf548/include/mach/bf548.h +++ b/arch/blackfin/mach-bf548/include/mach/bf548.h | |||
@@ -104,6 +104,18 @@ | |||
104 | 104 | ||
105 | #define AMGCTLVAL (V_AMBEN | V_AMCKEN) | 105 | #define AMGCTLVAL (V_AMBEN | V_AMCKEN) |
106 | 106 | ||
107 | #if defined(CONFIG_BF542M) | ||
108 | # define CONFIG_BF542 | ||
109 | #elif defined(CONFIG_BF544M) | ||
110 | # define CONFIG_BF544 | ||
111 | #elif defined(CONFIG_BF547M) | ||
112 | # define CONFIG_BF547 | ||
113 | #elif defined(CONFIG_BF548M) | ||
114 | # define CONFIG_BF548 | ||
115 | #elif defined(CONFIG_BF549M) | ||
116 | # define CONFIG_BF549 | ||
117 | #endif | ||
118 | |||
107 | #if defined(CONFIG_BF542) | 119 | #if defined(CONFIG_BF542) |
108 | # define CPU "BF542" | 120 | # define CPU "BF542" |
109 | # define CPUID 0x27de | 121 | # define CPUID 0x27de |
diff --git a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h index e4cf35e7ab9f..c05e79cba257 100644 --- a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h | |||
@@ -63,7 +63,7 @@ | |||
63 | #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) | 63 | #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) |
64 | #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) | 64 | #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) |
65 | 65 | ||
66 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) | 66 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS) |
67 | # define CONFIG_SERIAL_BFIN_CTSRTS | 67 | # define CONFIG_SERIAL_BFIN_CTSRTS |
68 | 68 | ||
69 | # ifndef CONFIG_UART0_CTS_PIN | 69 | # ifndef CONFIG_UART0_CTS_PIN |
@@ -74,12 +74,12 @@ | |||
74 | # define CONFIG_UART0_RTS_PIN -1 | 74 | # define CONFIG_UART0_RTS_PIN -1 |
75 | # endif | 75 | # endif |
76 | 76 | ||
77 | # ifndef CONFIG_UART1_CTS_PIN | 77 | # ifndef CONFIG_UART2_CTS_PIN |
78 | # define CONFIG_UART1_CTS_PIN -1 | 78 | # define CONFIG_UART2_CTS_PIN -1 |
79 | # endif | 79 | # endif |
80 | 80 | ||
81 | # ifndef CONFIG_UART1_RTS_PIN | 81 | # ifndef CONFIG_UART2_RTS_PIN |
82 | # define CONFIG_UART1_RTS_PIN -1 | 82 | # define CONFIG_UART2_RTS_PIN -1 |
83 | # endif | 83 | # endif |
84 | #endif | 84 | #endif |
85 | 85 | ||
@@ -130,7 +130,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
130 | CH_UART0_TX, | 130 | CH_UART0_TX, |
131 | CH_UART0_RX, | 131 | CH_UART0_RX, |
132 | #endif | 132 | #endif |
133 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 133 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
134 | CONFIG_UART0_CTS_PIN, | 134 | CONFIG_UART0_CTS_PIN, |
135 | CONFIG_UART0_RTS_PIN, | 135 | CONFIG_UART0_RTS_PIN, |
136 | #endif | 136 | #endif |
@@ -144,6 +144,10 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
144 | CH_UART1_TX, | 144 | CH_UART1_TX, |
145 | CH_UART1_RX, | 145 | CH_UART1_RX, |
146 | #endif | 146 | #endif |
147 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
148 | 0, | ||
149 | 0, | ||
150 | #endif | ||
147 | }, | 151 | }, |
148 | #endif | 152 | #endif |
149 | #ifdef CONFIG_SERIAL_BFIN_UART2 | 153 | #ifdef CONFIG_SERIAL_BFIN_UART2 |
@@ -154,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
154 | CH_UART2_TX, | 158 | CH_UART2_TX, |
155 | CH_UART2_RX, | 159 | CH_UART2_RX, |
156 | #endif | 160 | #endif |
157 | #ifdef CONFIG_BFIN_UART2_CTSRTS | 161 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
158 | CONFIG_UART2_CTS_PIN, | 162 | CONFIG_UART2_CTS_PIN, |
159 | CONFIG_UART2_RTS_PIN, | 163 | CONFIG_UART2_RTS_PIN, |
160 | #endif | 164 | #endif |
@@ -168,6 +172,10 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
168 | CH_UART3_TX, | 172 | CH_UART3_TX, |
169 | CH_UART3_RX, | 173 | CH_UART3_RX, |
170 | #endif | 174 | #endif |
175 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
176 | 0, | ||
177 | 0, | ||
178 | #endif | ||
171 | }, | 179 | }, |
172 | #endif | 180 | #endif |
173 | }; | 181 | }; |
diff --git a/arch/blackfin/mach-bf548/include/mach/gpio.h b/arch/blackfin/mach-bf548/include/mach/gpio.h index bba82dc75f16..3a2051709787 100644 --- a/arch/blackfin/mach-bf548/include/mach/gpio.h +++ b/arch/blackfin/mach-bf548/include/mach/gpio.h | |||
@@ -195,17 +195,17 @@ | |||
195 | struct gpio_port_t { | 195 | struct gpio_port_t { |
196 | unsigned short port_fer; | 196 | unsigned short port_fer; |
197 | unsigned short dummy1; | 197 | unsigned short dummy1; |
198 | unsigned short port_data; | 198 | unsigned short data; |
199 | unsigned short dummy2; | 199 | unsigned short dummy2; |
200 | unsigned short port_set; | 200 | unsigned short data_set; |
201 | unsigned short dummy3; | 201 | unsigned short dummy3; |
202 | unsigned short port_clear; | 202 | unsigned short data_clear; |
203 | unsigned short dummy4; | 203 | unsigned short dummy4; |
204 | unsigned short port_dir_set; | 204 | unsigned short dir_set; |
205 | unsigned short dummy5; | 205 | unsigned short dummy5; |
206 | unsigned short port_dir_clear; | 206 | unsigned short dir_clear; |
207 | unsigned short dummy6; | 207 | unsigned short dummy6; |
208 | unsigned short port_inen; | 208 | unsigned short inen; |
209 | unsigned short dummy7; | 209 | unsigned short dummy7; |
210 | unsigned int port_mux; | 210 | unsigned int port_mux; |
211 | }; | 211 | }; |
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h index 60299a71e090..f194625f6821 100644 --- a/arch/blackfin/mach-bf548/include/mach/irq.h +++ b/arch/blackfin/mach-bf548/include/mach/irq.h | |||
@@ -123,8 +123,8 @@ Events (highest priority) EMU 0 | |||
123 | #define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ | 123 | #define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ |
124 | #define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ | 124 | #define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ |
125 | #define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ | 125 | #define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ |
126 | #define IRQ_EPP1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ | 126 | #define IRQ_EPPI1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ |
127 | #define IRQ_EPP2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ | 127 | #define IRQ_EPPI2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ |
128 | #define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ | 128 | #define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ |
129 | #define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ | 129 | #define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ |
130 | #define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ | 130 | #define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ |
@@ -361,8 +361,8 @@ Events (highest priority) EMU 0 | |||
361 | #define IRQ_UART2_ERR IRQ_UART2_ERROR | 361 | #define IRQ_UART2_ERR IRQ_UART2_ERROR |
362 | #define IRQ_CAN0_ERR IRQ_CAN0_ERROR | 362 | #define IRQ_CAN0_ERR IRQ_CAN0_ERROR |
363 | #define IRQ_MXVR_ERR IRQ_MXVR_ERROR | 363 | #define IRQ_MXVR_ERR IRQ_MXVR_ERROR |
364 | #define IRQ_EPP1_ERR IRQ_EPP1_ERROR | 364 | #define IRQ_EPPI1_ERR IRQ_EPPI1_ERROR |
365 | #define IRQ_EPP2_ERR IRQ_EPP2_ERROR | 365 | #define IRQ_EPPI2_ERR IRQ_EPPI2_ERROR |
366 | #define IRQ_UART3_ERR IRQ_UART3_ERROR | 366 | #define IRQ_UART3_ERR IRQ_UART3_ERROR |
367 | #define IRQ_HOST_ERR IRQ_HOST_ERROR | 367 | #define IRQ_HOST_ERR IRQ_HOST_ERROR |
368 | #define IRQ_PIXC_ERR IRQ_PIXC_ERROR | 368 | #define IRQ_PIXC_ERR IRQ_PIXC_ERROR |
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h b/arch/blackfin/mach-bf548/include/mach/portmux.h index 8177a567dcdb..ffb1d0a44b4d 100644 --- a/arch/blackfin/mach-bf548/include/mach/portmux.h +++ b/arch/blackfin/mach-bf548/include/mach/portmux.h | |||
@@ -125,6 +125,7 @@ | |||
125 | #define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3)) | 125 | #define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3)) |
126 | #define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3)) | 126 | #define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3)) |
127 | 127 | ||
128 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1 | ||
128 | #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0)) | 129 | #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0)) |
129 | #define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0)) | 130 | #define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0)) |
130 | #define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0)) | 131 | #define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0)) |
diff --git a/arch/blackfin/mach-bf561/boards/Kconfig b/arch/blackfin/mach-bf561/boards/Kconfig index e41a67b1fb53..e4bc6d7c5a6a 100644 --- a/arch/blackfin/mach-bf561/boards/Kconfig +++ b/arch/blackfin/mach-bf561/boards/Kconfig | |||
@@ -19,9 +19,4 @@ config BFIN561_BLUETECHNIX_CM | |||
19 | help | 19 | help |
20 | CM-BF561 support for EVAL- and DEV-Board. | 20 | CM-BF561 support for EVAL- and DEV-Board. |
21 | 21 | ||
22 | config GENERIC_BF561_BOARD | ||
23 | bool "Generic" | ||
24 | help | ||
25 | Generic or Custom board support. | ||
26 | |||
27 | endchoice | 22 | endchoice |
diff --git a/arch/blackfin/mach-bf561/boards/Makefile b/arch/blackfin/mach-bf561/boards/Makefile index 04add010b568..3a152559e957 100644 --- a/arch/blackfin/mach-bf561/boards/Makefile +++ b/arch/blackfin/mach-bf561/boards/Makefile | |||
@@ -2,7 +2,6 @@ | |||
2 | # arch/blackfin/mach-bf561/boards/Makefile | 2 | # arch/blackfin/mach-bf561/boards/Makefile |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_GENERIC_BF561_BOARD) += generic_board.o | ||
6 | obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o | 5 | obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o |
7 | obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o | 6 | obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o |
8 | obj-$(CONFIG_BFIN561_TEPLA) += tepla.o | 7 | obj-$(CONFIG_BFIN561_TEPLA) += tepla.o |
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c index 6880d1ebfe60..f623c6b0719f 100644 --- a/arch/blackfin/mach-bf561/boards/cm_bf561.c +++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c | |||
@@ -105,9 +105,9 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
105 | }; | 105 | }; |
106 | #endif | 106 | #endif |
107 | 107 | ||
108 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 108 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
109 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | 109 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
110 | .enable_dma = 1, | 110 | .enable_dma = 0, |
111 | .bits_per_word = 8, | 111 | .bits_per_word = 8, |
112 | }; | 112 | }; |
113 | #endif | 113 | #endif |
@@ -155,14 +155,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
155 | .controller_data = &ad9960_spi_chip_info, | 155 | .controller_data = &ad9960_spi_chip_info, |
156 | }, | 156 | }, |
157 | #endif | 157 | #endif |
158 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | 158 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
159 | { | 159 | { |
160 | .modalias = "spi_mmc", | 160 | .modalias = "mmc_spi", |
161 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | 161 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
162 | .bus_num = 0, | 162 | .bus_num = 0, |
163 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | 163 | .chip_select = 5, |
164 | .platform_data = NULL, | 164 | .controller_data = &mmc_spi_chip_info, |
165 | .controller_data = &spi_mmc_chip_info, | ||
166 | .mode = SPI_MODE_3, | 165 | .mode = SPI_MODE_3, |
167 | }, | 166 | }, |
168 | #endif | 167 | #endif |
diff --git a/arch/blackfin/mach-bf561/boards/generic_board.c b/arch/blackfin/mach-bf561/boards/generic_board.c deleted file mode 100644 index 0ba366a0e696..000000000000 --- a/arch/blackfin/mach-bf561/boards/generic_board.c +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | /* | ||
2 | * File: arch/blackfin/mach-bf561/generic_board.c | ||
3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | ||
4 | * Author: Aidan Williams <aidan@nicta.com.au> | ||
5 | * | ||
6 | * Created: | ||
7 | * Description: | ||
8 | * | ||
9 | * Modified: | ||
10 | * Copyright 2005 National ICT Australia (NICTA) | ||
11 | * Copyright 2004-2006 Analog Devices Inc. | ||
12 | * | ||
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License as published by | ||
17 | * the Free Software Foundation; either version 2 of the License, or | ||
18 | * (at your option) any later version. | ||
19 | * | ||
20 | * This program is distributed in the hope that it will be useful, | ||
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
23 | * GNU General Public License for more details. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License | ||
26 | * along with this program; if not, see the file COPYING, or write | ||
27 | * to the Free Software Foundation, Inc., | ||
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
29 | */ | ||
30 | |||
31 | #include <linux/device.h> | ||
32 | #include <linux/platform_device.h> | ||
33 | #include <linux/irq.h> | ||
34 | |||
35 | const char bfin_board_name[] = "UNKNOWN BOARD"; | ||
36 | |||
37 | /* | ||
38 | * Driver needs to know address, irq and flag pin. | ||
39 | */ | ||
40 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
41 | static struct resource smc91x_resources[] = { | ||
42 | { | ||
43 | .start = 0x2C010300, | ||
44 | .end = 0x2C010300 + 16, | ||
45 | .flags = IORESOURCE_MEM, | ||
46 | }, { | ||
47 | .start = IRQ_PROG_INTB, | ||
48 | .end = IRQ_PROG_INTB, | ||
49 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
50 | }, { | ||
51 | .start = IRQ_PF9, | ||
52 | .end = IRQ_PF9, | ||
53 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
54 | }, | ||
55 | }; | ||
56 | |||
57 | static struct platform_device smc91x_device = { | ||
58 | .name = "smc91x", | ||
59 | .id = 0, | ||
60 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
61 | .resource = smc91x_resources, | ||
62 | }; | ||
63 | #endif | ||
64 | |||
65 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
66 | #ifdef CONFIG_BFIN_SIR0 | ||
67 | static struct resource bfin_sir0_resources[] = { | ||
68 | { | ||
69 | .start = 0xFFC00400, | ||
70 | .end = 0xFFC004FF, | ||
71 | .flags = IORESOURCE_MEM, | ||
72 | }, | ||
73 | { | ||
74 | .start = IRQ_UART0_RX, | ||
75 | .end = IRQ_UART0_RX+1, | ||
76 | .flags = IORESOURCE_IRQ, | ||
77 | }, | ||
78 | { | ||
79 | .start = CH_UART0_RX, | ||
80 | .end = CH_UART0_RX+1, | ||
81 | .flags = IORESOURCE_DMA, | ||
82 | }, | ||
83 | }; | ||
84 | |||
85 | static struct platform_device bfin_sir0_device = { | ||
86 | .name = "bfin_sir", | ||
87 | .id = 0, | ||
88 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | ||
89 | .resource = bfin_sir0_resources, | ||
90 | }; | ||
91 | #endif | ||
92 | #endif | ||
93 | |||
94 | static struct platform_device *generic_board_devices[] __initdata = { | ||
95 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
96 | &smc91x_device, | ||
97 | #endif | ||
98 | |||
99 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
100 | #ifdef CONFIG_BFIN_SIR0 | ||
101 | &bfin_sir0_device, | ||
102 | #endif | ||
103 | #endif | ||
104 | }; | ||
105 | |||
106 | static int __init generic_board_init(void) | ||
107 | { | ||
108 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | ||
109 | return platform_add_devices(generic_board_devices, | ||
110 | ARRAY_SIZE(generic_board_devices)); | ||
111 | } | ||
112 | |||
113 | arch_initcall(generic_board_init); | ||
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index 1a9e17562821..d0b0b3506440 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * File: include/asm-blackfin/mach-bf561/anomaly.h | 2 | * File: include/asm-blackfin/mach-bf561/anomaly.h |
3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
4 | * | 4 | * |
5 | * Copyright (C) 2004-2008 Analog Devices Inc. | 5 | * Copyright (C) 2004-2009 Analog Devices Inc. |
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
@@ -224,7 +224,7 @@ | |||
224 | #define ANOMALY_05000301 (1) | 224 | #define ANOMALY_05000301 (1) |
225 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ | 225 | /* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ |
226 | #define ANOMALY_05000302 (1) | 226 | #define ANOMALY_05000302 (1) |
227 | /* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ | 227 | /* SPORT_HYS Bit in PLL_CTL Register Is Not Functional */ |
228 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) | 228 | #define ANOMALY_05000305 (__SILICON_REVISION__ < 5) |
229 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ | 229 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ |
230 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 5) | 230 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 5) |
@@ -283,8 +283,11 @@ | |||
283 | #define ANOMALY_05000273 (0) | 283 | #define ANOMALY_05000273 (0) |
284 | #define ANOMALY_05000311 (0) | 284 | #define ANOMALY_05000311 (0) |
285 | #define ANOMALY_05000353 (1) | 285 | #define ANOMALY_05000353 (1) |
286 | #define ANOMALY_05000380 (0) | ||
286 | #define ANOMALY_05000386 (1) | 287 | #define ANOMALY_05000386 (1) |
287 | #define ANOMALY_05000432 (0) | 288 | #define ANOMALY_05000432 (0) |
288 | #define ANOMALY_05000435 (0) | 289 | #define ANOMALY_05000435 (0) |
290 | #define ANOMALY_05000447 (0) | ||
291 | #define ANOMALY_05000448 (0) | ||
289 | 292 | ||
290 | #endif | 293 | #endif |
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h index 043bfcf26c52..ca8c5f645209 100644 --- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | |||
@@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
134 | CH_UART_TX, | 134 | CH_UART_TX, |
135 | CH_UART_RX, | 135 | CH_UART_RX, |
136 | #endif | 136 | #endif |
137 | #ifdef CONFIG_BFIN_UART0_CTSRTS | 137 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
138 | CONFIG_UART0_CTS_PIN, | 138 | CONFIG_UART0_CTS_PIN, |
139 | CONFIG_UART0_RTS_PIN, | 139 | CONFIG_UART0_RTS_PIN, |
140 | #endif | 140 | #endif |
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h index d7c509759659..cf922295f4ce 100644 --- a/arch/blackfin/mach-bf561/include/mach/defBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h | |||
@@ -1106,6 +1106,8 @@ | |||
1106 | #define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */ | 1106 | #define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */ |
1107 | #define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */ | 1107 | #define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */ |
1108 | #define POL 0x0000C000 /* PPI Signal Polarities */ | 1108 | #define POL 0x0000C000 /* PPI Signal Polarities */ |
1109 | #define POLC 0x4000 /* PPI Clock Polarity */ | ||
1110 | #define POLS 0x8000 /* PPI Frame Sync Polarity */ | ||
1109 | 1111 | ||
1110 | /* PPI_STATUS Masks */ | 1112 | /* PPI_STATUS Masks */ |
1111 | #define FLD 0x00000400 /* Field Indicator */ | 1113 | #define FLD 0x00000400 /* Field Indicator */ |
diff --git a/arch/blackfin/mach-bf561/include/mach/portmux.h b/arch/blackfin/mach-bf561/include/mach/portmux.h index a6ee8206efb6..2e5ad6347dea 100644 --- a/arch/blackfin/mach-bf561/include/mach/portmux.h +++ b/arch/blackfin/mach-bf561/include/mach/portmux.h | |||
@@ -85,5 +85,6 @@ | |||
85 | #define P_SPI0_MOSI (P_DONTCARE) | 85 | #define P_SPI0_MOSI (P_DONTCARE) |
86 | #define P_SPI0_MISO (P_DONTCARE) | 86 | #define P_SPI0_MISO (P_DONTCARE) |
87 | #define P_SPI0_SCK (P_DONTCARE) | 87 | #define P_SPI0_SCK (P_DONTCARE) |
88 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 | ||
88 | 89 | ||
89 | #endif /* _MACH_PORTMUX_H_ */ | 90 | #endif /* _MACH_PORTMUX_H_ */ |
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c index 98133b968f7b..80d39b2f9db2 100644 --- a/arch/blackfin/mach-common/arch_checks.c +++ b/arch/blackfin/mach-common/arch_checks.c | |||
@@ -62,3 +62,12 @@ | |||
62 | #if (CONFIG_BOOT_LOAD & 0x3) | 62 | #if (CONFIG_BOOT_LOAD & 0x3) |
63 | # error "The kernel load address must be 4 byte aligned" | 63 | # error "The kernel load address must be 4 byte aligned" |
64 | #endif | 64 | #endif |
65 | |||
66 | /* The entire kernel must be able to make a 24bit pcrel call to start of L1 */ | ||
67 | #if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000 | ||
68 | # error "The kernel load address is too high; keep it below 10meg for safety" | ||
69 | #endif | ||
70 | |||
71 | #if ANOMALY_05000448 | ||
72 | # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes. | ||
73 | #endif | ||
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index 3c98dacbf289..aa0648c6a9fe 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S | |||
@@ -66,11 +66,33 @@ | |||
66 | 66 | ||
67 | /* Invalidate all instruction cache lines assocoiated with this memory area */ | 67 | /* Invalidate all instruction cache lines assocoiated with this memory area */ |
68 | ENTRY(_blackfin_icache_flush_range) | 68 | ENTRY(_blackfin_icache_flush_range) |
69 | /* | ||
70 | * Walkaround to avoid loading wrong instruction after invalidating icache | ||
71 | * and following sequence is met. | ||
72 | * | ||
73 | * 1) One instruction address is cached in the instruction cache. | ||
74 | * 2) This instruction in SDRAM is changed. | ||
75 | * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range(). | ||
76 | * 4) This instruction is executed again, but the old one is loaded. | ||
77 | */ | ||
78 | P0 = R0; | ||
79 | IFLUSH[P0]; | ||
69 | do_flush IFLUSH, , nop | 80 | do_flush IFLUSH, , nop |
70 | ENDPROC(_blackfin_icache_flush_range) | 81 | ENDPROC(_blackfin_icache_flush_range) |
71 | 82 | ||
72 | /* Flush all cache lines assocoiated with this area of memory. */ | 83 | /* Flush all cache lines assocoiated with this area of memory. */ |
73 | ENTRY(_blackfin_icache_dcache_flush_range) | 84 | ENTRY(_blackfin_icache_dcache_flush_range) |
85 | /* | ||
86 | * Walkaround to avoid loading wrong instruction after invalidating icache | ||
87 | * and following sequence is met. | ||
88 | * | ||
89 | * 1) One instruction address is cached in the instruction cache. | ||
90 | * 2) This instruction in SDRAM is changed. | ||
91 | * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range(). | ||
92 | * 4) This instruction is executed again, but the old one is loaded. | ||
93 | */ | ||
94 | P0 = R0; | ||
95 | IFLUSH[P0]; | ||
74 | do_flush FLUSH, IFLUSH | 96 | do_flush FLUSH, IFLUSH |
75 | ENDPROC(_blackfin_icache_dcache_flush_range) | 97 | ENDPROC(_blackfin_icache_dcache_flush_range) |
76 | 98 | ||
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c index 5d182abefc7b..35393651359b 100644 --- a/arch/blackfin/mach-common/clocks-init.c +++ b/arch/blackfin/mach-common/clocks-init.c | |||
@@ -14,9 +14,10 @@ | |||
14 | #include <asm/clocks.h> | 14 | #include <asm/clocks.h> |
15 | #include <asm/mem_init.h> | 15 | #include <asm/mem_init.h> |
16 | 16 | ||
17 | #define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ | ||
17 | #define PLL_CTL_VAL \ | 18 | #define PLL_CTL_VAL \ |
18 | (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ | 19 | (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ |
19 | (PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0)) | 20 | (PLL_BYPASS << 8) | (ANOMALY_05000305 ? 0 : 0x8000)) |
20 | 21 | ||
21 | __attribute__((l1_text)) | 22 | __attribute__((l1_text)) |
22 | static void do_sync(void) | 23 | static void do_sync(void) |
@@ -76,7 +77,7 @@ void init_clocks(void) | |||
76 | bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); | 77 | bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); |
77 | #ifdef EBIU_SDGCTL | 78 | #ifdef EBIU_SDGCTL |
78 | bfin_write_EBIU_SDRRC(mem_SDRRC); | 79 | bfin_write_EBIU_SDRRC(mem_SDRRC); |
79 | bfin_write_EBIU_SDGCTL(mem_SDGCTL); | 80 | bfin_write_EBIU_SDGCTL((bfin_read_EBIU_SDGCTL() & SDGCTL_WIDTH) | mem_SDGCTL); |
80 | #else | 81 | #else |
81 | bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ)); | 82 | bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ)); |
82 | do_sync(); | 83 | do_sync(); |
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S index 4da50bcd9300..8009a512fb11 100644 --- a/arch/blackfin/mach-common/dpmc_modes.S +++ b/arch/blackfin/mach-common/dpmc_modes.S | |||
@@ -376,10 +376,22 @@ ENTRY(_do_hibernate) | |||
376 | #endif | 376 | #endif |
377 | 377 | ||
378 | #ifdef PINT0_ASSIGN | 378 | #ifdef PINT0_ASSIGN |
379 | PM_SYS_PUSH(PINT0_MASK_SET) | ||
380 | PM_SYS_PUSH(PINT1_MASK_SET) | ||
381 | PM_SYS_PUSH(PINT2_MASK_SET) | ||
382 | PM_SYS_PUSH(PINT3_MASK_SET) | ||
379 | PM_SYS_PUSH(PINT0_ASSIGN) | 383 | PM_SYS_PUSH(PINT0_ASSIGN) |
380 | PM_SYS_PUSH(PINT1_ASSIGN) | 384 | PM_SYS_PUSH(PINT1_ASSIGN) |
381 | PM_SYS_PUSH(PINT2_ASSIGN) | 385 | PM_SYS_PUSH(PINT2_ASSIGN) |
382 | PM_SYS_PUSH(PINT3_ASSIGN) | 386 | PM_SYS_PUSH(PINT3_ASSIGN) |
387 | PM_SYS_PUSH(PINT0_INVERT_SET) | ||
388 | PM_SYS_PUSH(PINT1_INVERT_SET) | ||
389 | PM_SYS_PUSH(PINT2_INVERT_SET) | ||
390 | PM_SYS_PUSH(PINT3_INVERT_SET) | ||
391 | PM_SYS_PUSH(PINT0_EDGE_SET) | ||
392 | PM_SYS_PUSH(PINT1_EDGE_SET) | ||
393 | PM_SYS_PUSH(PINT2_EDGE_SET) | ||
394 | PM_SYS_PUSH(PINT3_EDGE_SET) | ||
383 | #endif | 395 | #endif |
384 | 396 | ||
385 | PM_SYS_PUSH(EBIU_AMBCTL0) | 397 | PM_SYS_PUSH(EBIU_AMBCTL0) |
@@ -714,10 +726,22 @@ ENTRY(_do_hibernate) | |||
714 | PM_SYS_POP(EBIU_AMBCTL0) | 726 | PM_SYS_POP(EBIU_AMBCTL0) |
715 | 727 | ||
716 | #ifdef PINT0_ASSIGN | 728 | #ifdef PINT0_ASSIGN |
729 | PM_SYS_POP(PINT3_EDGE_SET) | ||
730 | PM_SYS_POP(PINT2_EDGE_SET) | ||
731 | PM_SYS_POP(PINT1_EDGE_SET) | ||
732 | PM_SYS_POP(PINT0_EDGE_SET) | ||
733 | PM_SYS_POP(PINT3_INVERT_SET) | ||
734 | PM_SYS_POP(PINT2_INVERT_SET) | ||
735 | PM_SYS_POP(PINT1_INVERT_SET) | ||
736 | PM_SYS_POP(PINT0_INVERT_SET) | ||
717 | PM_SYS_POP(PINT3_ASSIGN) | 737 | PM_SYS_POP(PINT3_ASSIGN) |
718 | PM_SYS_POP(PINT2_ASSIGN) | 738 | PM_SYS_POP(PINT2_ASSIGN) |
719 | PM_SYS_POP(PINT1_ASSIGN) | 739 | PM_SYS_POP(PINT1_ASSIGN) |
720 | PM_SYS_POP(PINT0_ASSIGN) | 740 | PM_SYS_POP(PINT0_ASSIGN) |
741 | PM_SYS_POP(PINT3_MASK_SET) | ||
742 | PM_SYS_POP(PINT2_MASK_SET) | ||
743 | PM_SYS_POP(PINT1_MASK_SET) | ||
744 | PM_SYS_POP(PINT0_MASK_SET) | ||
721 | #endif | 745 | #endif |
722 | 746 | ||
723 | #ifdef SICA_IWR1 | 747 | #ifdef SICA_IWR1 |
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index fae774651374..21e65a339a22 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S | |||
@@ -151,13 +151,6 @@ ENTRY(_ex_syscall) | |||
151 | jump.s _bfin_return_from_exception; | 151 | jump.s _bfin_return_from_exception; |
152 | ENDPROC(_ex_syscall) | 152 | ENDPROC(_ex_syscall) |
153 | 153 | ||
154 | ENTRY(_ex_soft_bp) | ||
155 | r7 = retx; | ||
156 | r7 += -2; | ||
157 | retx = r7; | ||
158 | jump.s _ex_trap_c; | ||
159 | ENDPROC(_ex_soft_bp) | ||
160 | |||
161 | ENTRY(_ex_single_step) | 154 | ENTRY(_ex_single_step) |
162 | /* If we just returned from an interrupt, the single step event is | 155 | /* If we just returned from an interrupt, the single step event is |
163 | for the RTI instruction. */ | 156 | for the RTI instruction. */ |
@@ -607,6 +600,19 @@ ENTRY(_system_call) | |||
607 | p2 = [p2]; | 600 | p2 = [p2]; |
608 | 601 | ||
609 | [p2+(TASK_THREAD+THREAD_KSP)] = sp; | 602 | [p2+(TASK_THREAD+THREAD_KSP)] = sp; |
603 | #ifdef CONFIG_IPIPE | ||
604 | r0 = sp; | ||
605 | SP += -12; | ||
606 | call ___ipipe_syscall_root; | ||
607 | SP += 12; | ||
608 | cc = r0 == 1; | ||
609 | if cc jump .Lsyscall_really_exit; | ||
610 | cc = r0 == -1; | ||
611 | if cc jump .Lresume_userspace; | ||
612 | r3 = [sp + PT_R3]; | ||
613 | r4 = [sp + PT_R4]; | ||
614 | p0 = [sp + PT_ORIG_P0]; | ||
615 | #endif /* CONFIG_IPIPE */ | ||
610 | 616 | ||
611 | /* Check the System Call */ | 617 | /* Check the System Call */ |
612 | r7 = __NR_syscall; | 618 | r7 = __NR_syscall; |
@@ -661,6 +667,17 @@ ENTRY(_system_call) | |||
661 | r7 = r7 & r4; | 667 | r7 = r7 & r4; |
662 | 668 | ||
663 | .Lsyscall_resched: | 669 | .Lsyscall_resched: |
670 | #ifdef CONFIG_IPIPE | ||
671 | cc = BITTST(r7, TIF_IRQ_SYNC); | ||
672 | if !cc jump .Lsyscall_no_irqsync; | ||
673 | [--sp] = reti; | ||
674 | r0 = [sp++]; | ||
675 | SP += -12; | ||
676 | call ___ipipe_sync_root; | ||
677 | SP += 12; | ||
678 | jump .Lresume_userspace_1; | ||
679 | .Lsyscall_no_irqsync: | ||
680 | #endif | ||
664 | cc = BITTST(r7, TIF_NEED_RESCHED); | 681 | cc = BITTST(r7, TIF_NEED_RESCHED); |
665 | if !cc jump .Lsyscall_sigpending; | 682 | if !cc jump .Lsyscall_sigpending; |
666 | 683 | ||
@@ -692,6 +709,10 @@ ENTRY(_system_call) | |||
692 | .Lsyscall_really_exit: | 709 | .Lsyscall_really_exit: |
693 | r5 = [sp + PT_RESERVED]; | 710 | r5 = [sp + PT_RESERVED]; |
694 | rets = r5; | 711 | rets = r5; |
712 | #ifdef CONFIG_IPIPE | ||
713 | [--sp] = reti; | ||
714 | r5 = [sp++]; | ||
715 | #endif /* CONFIG_IPIPE */ | ||
695 | rts; | 716 | rts; |
696 | ENDPROC(_system_call) | 717 | ENDPROC(_system_call) |
697 | 718 | ||
@@ -778,6 +799,15 @@ _new_old_task: | |||
778 | ENDPROC(_resume) | 799 | ENDPROC(_resume) |
779 | 800 | ||
780 | ENTRY(_ret_from_exception) | 801 | ENTRY(_ret_from_exception) |
802 | #ifdef CONFIG_IPIPE | ||
803 | [--sp] = rets; | ||
804 | SP += -12; | ||
805 | call ___ipipe_check_root | ||
806 | SP += 12 | ||
807 | rets = [sp++]; | ||
808 | cc = r0 == 0; | ||
809 | if cc jump 4f; /* not on behalf of Linux, get out */ | ||
810 | #endif /* CONFIG_IPIPE */ | ||
781 | p2.l = lo(IPEND); | 811 | p2.l = lo(IPEND); |
782 | p2.h = hi(IPEND); | 812 | p2.h = hi(IPEND); |
783 | 813 | ||
@@ -834,6 +864,28 @@ ENTRY(_ret_from_exception) | |||
834 | rts; | 864 | rts; |
835 | ENDPROC(_ret_from_exception) | 865 | ENDPROC(_ret_from_exception) |
836 | 866 | ||
867 | #ifdef CONFIG_IPIPE | ||
868 | |||
869 | _sync_root_irqs: | ||
870 | [--sp] = reti; /* Reenable interrupts */ | ||
871 | r0 = [sp++]; | ||
872 | jump.l ___ipipe_sync_root | ||
873 | |||
874 | _resume_kernel_from_int: | ||
875 | r0.l = _sync_root_irqs | ||
876 | r0.h = _sync_root_irqs | ||
877 | [--sp] = rets; | ||
878 | [--sp] = ( r7:4, p5:3 ); | ||
879 | SP += -12; | ||
880 | call ___ipipe_call_irqtail | ||
881 | SP += 12; | ||
882 | ( r7:4, p5:3 ) = [sp++]; | ||
883 | rets = [sp++]; | ||
884 | rts | ||
885 | #else | ||
886 | #define _resume_kernel_from_int 2f | ||
887 | #endif | ||
888 | |||
837 | ENTRY(_return_from_int) | 889 | ENTRY(_return_from_int) |
838 | /* If someone else already raised IRQ 15, do nothing. */ | 890 | /* If someone else already raised IRQ 15, do nothing. */ |
839 | csync; | 891 | csync; |
@@ -855,7 +907,7 @@ ENTRY(_return_from_int) | |||
855 | r1 = r0 - r1; | 907 | r1 = r0 - r1; |
856 | r2 = r0 & r1; | 908 | r2 = r0 & r1; |
857 | cc = r2 == 0; | 909 | cc = r2 == 0; |
858 | if !cc jump 2f; | 910 | if !cc jump _resume_kernel_from_int; |
859 | 911 | ||
860 | /* Lower the interrupt level to 15. */ | 912 | /* Lower the interrupt level to 15. */ |
861 | p0.l = lo(EVT15); | 913 | p0.l = lo(EVT15); |
@@ -1087,7 +1139,7 @@ ENTRY(_ex_table) | |||
1087 | * EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined | 1139 | * EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined |
1088 | */ | 1140 | */ |
1089 | .long _ex_syscall /* 0x00 - User Defined - Linux Syscall */ | 1141 | .long _ex_syscall /* 0x00 - User Defined - Linux Syscall */ |
1090 | .long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */ | 1142 | .long _ex_trap_c /* 0x01 - User Defined - Software breakpoint */ |
1091 | #ifdef CONFIG_KGDB | 1143 | #ifdef CONFIG_KGDB |
1092 | .long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection | 1144 | .long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection |
1093 | and break signal trap */ | 1145 | and break signal trap */ |
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index e1e42c029e15..698d4c05947e 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S | |||
@@ -17,6 +17,19 @@ | |||
17 | 17 | ||
18 | __INIT | 18 | __INIT |
19 | 19 | ||
20 | ENTRY(__init_clear_bss) | ||
21 | r2 = r2 - r1; | ||
22 | cc = r2 == 0; | ||
23 | if cc jump .L_bss_done; | ||
24 | r2 >>= 2; | ||
25 | p1 = r1; | ||
26 | p2 = r2; | ||
27 | lsetup (1f, 1f) lc0 = p2; | ||
28 | 1: [p1++] = r0; | ||
29 | .L_bss_done: | ||
30 | rts; | ||
31 | ENDPROC(__init_clear_bss) | ||
32 | |||
20 | #define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12) | 33 | #define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12) |
21 | 34 | ||
22 | ENTRY(__start) | 35 | ENTRY(__start) |
@@ -144,6 +157,35 @@ ENTRY(__start) | |||
144 | call _init_early_exception_vectors; | 157 | call _init_early_exception_vectors; |
145 | #endif | 158 | #endif |
146 | 159 | ||
160 | r0 = 0 (x); | ||
161 | /* Zero out all of the fun bss regions */ | ||
162 | #if L1_DATA_A_LENGTH > 0 | ||
163 | r1.l = __sbss_l1; | ||
164 | r1.h = __sbss_l1; | ||
165 | r2.l = __ebss_l1; | ||
166 | r2.h = __ebss_l1; | ||
167 | call __init_clear_bss | ||
168 | #endif | ||
169 | #if L1_DATA_B_LENGTH > 0 | ||
170 | r1.l = __sbss_b_l1; | ||
171 | r1.h = __sbss_b_l1; | ||
172 | r2.l = __ebss_b_l1; | ||
173 | r2.h = __ebss_b_l1; | ||
174 | call __init_clear_bss | ||
175 | #endif | ||
176 | #if L2_LENGTH > 0 | ||
177 | r1.l = __sbss_l2; | ||
178 | r1.h = __sbss_l2; | ||
179 | r2.l = __ebss_l2; | ||
180 | r2.h = __ebss_l2; | ||
181 | call __init_clear_bss | ||
182 | #endif | ||
183 | r1.l = ___bss_start; | ||
184 | r1.h = ___bss_start; | ||
185 | r2.l = ___bss_stop; | ||
186 | r2.h = ___bss_stop; | ||
187 | call __init_clear_bss | ||
188 | |||
147 | /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ | 189 | /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ |
148 | call _bfin_relocate_l1_mem; | 190 | call _bfin_relocate_l1_mem; |
149 | #ifdef CONFIG_BFIN_KERNEL_CLOCK | 191 | #ifdef CONFIG_BFIN_KERNEL_CLOCK |
@@ -185,19 +227,6 @@ ENDPROC(__start) | |||
185 | # define WDOG_CTL WDOGA_CTL | 227 | # define WDOG_CTL WDOGA_CTL |
186 | #endif | 228 | #endif |
187 | 229 | ||
188 | ENTRY(__init_clear_bss) | ||
189 | r2 = r2 - r1; | ||
190 | cc = r2 == 0; | ||
191 | if cc jump .L_bss_done; | ||
192 | r2 >>= 2; | ||
193 | p1 = r1; | ||
194 | p2 = r2; | ||
195 | lsetup (1f, 1f) lc0 = p2; | ||
196 | 1: [p1++] = r0; | ||
197 | .L_bss_done: | ||
198 | rts; | ||
199 | ENDPROC(__init_clear_bss) | ||
200 | |||
201 | ENTRY(_real_start) | 230 | ENTRY(_real_start) |
202 | /* Enable nested interrupts */ | 231 | /* Enable nested interrupts */ |
203 | [--sp] = reti; | 232 | [--sp] = reti; |
@@ -209,35 +238,6 @@ ENTRY(_real_start) | |||
209 | w[p0] = r0; | 238 | w[p0] = r0; |
210 | ssync; | 239 | ssync; |
211 | 240 | ||
212 | r0 = 0 (x); | ||
213 | /* Zero out all of the fun bss regions */ | ||
214 | #if L1_DATA_A_LENGTH > 0 | ||
215 | r1.l = __sbss_l1; | ||
216 | r1.h = __sbss_l1; | ||
217 | r2.l = __ebss_l1; | ||
218 | r2.h = __ebss_l1; | ||
219 | call __init_clear_bss | ||
220 | #endif | ||
221 | #if L1_DATA_B_LENGTH > 0 | ||
222 | r1.l = __sbss_b_l1; | ||
223 | r1.h = __sbss_b_l1; | ||
224 | r2.l = __ebss_b_l1; | ||
225 | r2.h = __ebss_b_l1; | ||
226 | call __init_clear_bss | ||
227 | #endif | ||
228 | #if L2_LENGTH > 0 | ||
229 | r1.l = __sbss_l2; | ||
230 | r1.h = __sbss_l2; | ||
231 | r2.l = __ebss_l2; | ||
232 | r2.h = __ebss_l2; | ||
233 | call __init_clear_bss | ||
234 | #endif | ||
235 | r1.l = ___bss_start; | ||
236 | r1.h = ___bss_start; | ||
237 | r2.l = ___bss_stop; | ||
238 | r2.h = ___bss_stop; | ||
239 | call __init_clear_bss | ||
240 | |||
241 | /* Pass the u-boot arguments to the global value command line */ | 241 | /* Pass the u-boot arguments to the global value command line */ |
242 | R0 = R7; | 242 | R0 = R7; |
243 | call _cmdline_init; | 243 | call _cmdline_init; |
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S index 473df0f7fa78..0069c2dd4625 100644 --- a/arch/blackfin/mach-common/interrupt.S +++ b/arch/blackfin/mach-common/interrupt.S | |||
@@ -195,7 +195,7 @@ ENDPROC(_evt_ivhw) | |||
195 | /* Interrupt routine for evt2 (NMI). | 195 | /* Interrupt routine for evt2 (NMI). |
196 | * We don't actually use this, so just return. | 196 | * We don't actually use this, so just return. |
197 | * For inner circle type details, please see: | 197 | * For inner circle type details, please see: |
198 | * http://docs.blackfin.uclinux.org/doku.php?id=linux:nmi | 198 | * http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:nmi |
199 | */ | 199 | */ |
200 | ENTRY(_evt_nmi) | 200 | ENTRY(_evt_nmi) |
201 | .weak _evt_nmi | 201 | .weak _evt_nmi |
@@ -235,6 +235,7 @@ ENDPROC(_evt_system_call) | |||
235 | 235 | ||
236 | #ifdef CONFIG_IPIPE | 236 | #ifdef CONFIG_IPIPE |
237 | ENTRY(___ipipe_call_irqtail) | 237 | ENTRY(___ipipe_call_irqtail) |
238 | p0 = r0; | ||
238 | r0.l = 1f; | 239 | r0.l = 1f; |
239 | r0.h = 1f; | 240 | r0.h = 1f; |
240 | reti = r0; | 241 | reti = r0; |
@@ -242,9 +243,6 @@ ENTRY(___ipipe_call_irqtail) | |||
242 | 1: | 243 | 1: |
243 | [--sp] = rets; | 244 | [--sp] = rets; |
244 | [--sp] = ( r7:4, p5:3 ); | 245 | [--sp] = ( r7:4, p5:3 ); |
245 | p0.l = ___ipipe_irq_tail_hook; | ||
246 | p0.h = ___ipipe_irq_tail_hook; | ||
247 | p0 = [p0]; | ||
248 | sp += -12; | 246 | sp += -12; |
249 | call (p0); | 247 | call (p0); |
250 | sp += 12; | 248 | sp += 12; |
@@ -259,7 +257,7 @@ ENTRY(___ipipe_call_irqtail) | |||
259 | p0.h = hi(EVT14); | 257 | p0.h = hi(EVT14); |
260 | [p0] = r0; | 258 | [p0] = r0; |
261 | csync; | 259 | csync; |
262 | r0 = 0x401f; | 260 | r0 = 0x401f (z); |
263 | sti r0; | 261 | sti r0; |
264 | raise 14; | 262 | raise 14; |
265 | [--sp] = reti; /* IRQs on. */ | 263 | [--sp] = reti; /* IRQs on. */ |
@@ -277,11 +275,7 @@ ENTRY(___ipipe_call_irqtail) | |||
277 | p0.h = _bfin_irq_flags; | 275 | p0.h = _bfin_irq_flags; |
278 | r0 = [p0]; | 276 | r0 = [p0]; |
279 | sti r0; | 277 | sti r0; |
280 | #if 0 /* FIXME: this actually raises scheduling latencies */ | ||
281 | /* Reenable interrupts */ | ||
282 | [--sp] = reti; | ||
283 | r0 = [sp++]; | ||
284 | #endif | ||
285 | rts; | 278 | rts; |
286 | ENDPROC(___ipipe_call_irqtail) | 279 | ENDPROC(___ipipe_call_irqtail) |
280 | |||
287 | #endif /* CONFIG_IPIPE */ | 281 | #endif /* CONFIG_IPIPE */ |
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 1bba6030dce9..a7d7b2dd4059 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
@@ -161,11 +161,15 @@ static void bfin_core_unmask_irq(unsigned int irq) | |||
161 | 161 | ||
162 | static void bfin_internal_mask_irq(unsigned int irq) | 162 | static void bfin_internal_mask_irq(unsigned int irq) |
163 | { | 163 | { |
164 | unsigned long flags; | ||
165 | |||
164 | #ifdef CONFIG_BF53x | 166 | #ifdef CONFIG_BF53x |
167 | local_irq_save_hw(flags); | ||
165 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & | 168 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & |
166 | ~(1 << SIC_SYSIRQ(irq))); | 169 | ~(1 << SIC_SYSIRQ(irq))); |
167 | #else | 170 | #else |
168 | unsigned mask_bank, mask_bit; | 171 | unsigned mask_bank, mask_bit; |
172 | local_irq_save_hw(flags); | ||
169 | mask_bank = SIC_SYSIRQ(irq) / 32; | 173 | mask_bank = SIC_SYSIRQ(irq) / 32; |
170 | mask_bit = SIC_SYSIRQ(irq) % 32; | 174 | mask_bit = SIC_SYSIRQ(irq) % 32; |
171 | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & | 175 | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & |
@@ -175,15 +179,20 @@ static void bfin_internal_mask_irq(unsigned int irq) | |||
175 | ~(1 << mask_bit)); | 179 | ~(1 << mask_bit)); |
176 | #endif | 180 | #endif |
177 | #endif | 181 | #endif |
182 | local_irq_restore_hw(flags); | ||
178 | } | 183 | } |
179 | 184 | ||
180 | static void bfin_internal_unmask_irq(unsigned int irq) | 185 | static void bfin_internal_unmask_irq(unsigned int irq) |
181 | { | 186 | { |
187 | unsigned long flags; | ||
188 | |||
182 | #ifdef CONFIG_BF53x | 189 | #ifdef CONFIG_BF53x |
190 | local_irq_save_hw(flags); | ||
183 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | | 191 | bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | |
184 | (1 << SIC_SYSIRQ(irq))); | 192 | (1 << SIC_SYSIRQ(irq))); |
185 | #else | 193 | #else |
186 | unsigned mask_bank, mask_bit; | 194 | unsigned mask_bank, mask_bit; |
195 | local_irq_save_hw(flags); | ||
187 | mask_bank = SIC_SYSIRQ(irq) / 32; | 196 | mask_bank = SIC_SYSIRQ(irq) / 32; |
188 | mask_bit = SIC_SYSIRQ(irq) % 32; | 197 | mask_bit = SIC_SYSIRQ(irq) % 32; |
189 | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | | 198 | bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | |
@@ -193,6 +202,7 @@ static void bfin_internal_unmask_irq(unsigned int irq) | |||
193 | (1 << mask_bit)); | 202 | (1 << mask_bit)); |
194 | #endif | 203 | #endif |
195 | #endif | 204 | #endif |
205 | local_irq_restore_hw(flags); | ||
196 | } | 206 | } |
197 | 207 | ||
198 | #ifdef CONFIG_PM | 208 | #ifdef CONFIG_PM |
@@ -390,7 +400,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq, | |||
390 | static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) | 400 | static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) |
391 | { | 401 | { |
392 | #ifdef CONFIG_IPIPE | 402 | #ifdef CONFIG_IPIPE |
393 | _set_irq_handler(irq, handle_edge_irq); | 403 | _set_irq_handler(irq, handle_level_irq); |
394 | #else | 404 | #else |
395 | struct irq_desc *desc = irq_desc + irq; | 405 | struct irq_desc *desc = irq_desc + irq; |
396 | /* May not call generic set_irq_handler() due to spinlock | 406 | /* May not call generic set_irq_handler() due to spinlock |
@@ -1055,13 +1065,18 @@ int __init init_arch_irq(void) | |||
1055 | #endif | 1065 | #endif |
1056 | default: | 1066 | default: |
1057 | #ifdef CONFIG_IPIPE | 1067 | #ifdef CONFIG_IPIPE |
1058 | /* | 1068 | /* |
1059 | * We want internal interrupt sources to be masked, because | 1069 | * We want internal interrupt sources to be |
1060 | * ISRs may trigger interrupts recursively (e.g. DMA), but | 1070 | * masked, because ISRs may trigger interrupts |
1061 | * interrupts are _not_ masked at CPU level. So let's handle | 1071 | * recursively (e.g. DMA), but interrupts are |
1062 | * them as level interrupts. | 1072 | * _not_ masked at CPU level. So let's handle |
1063 | */ | 1073 | * most of them as level interrupts, except |
1064 | set_irq_handler(irq, handle_level_irq); | 1074 | * the timer interrupt which is special. |
1075 | */ | ||
1076 | if (irq == IRQ_SYSTMR || irq == IRQ_CORETMR) | ||
1077 | set_irq_handler(irq, handle_simple_irq); | ||
1078 | else | ||
1079 | set_irq_handler(irq, handle_level_irq); | ||
1065 | #else /* !CONFIG_IPIPE */ | 1080 | #else /* !CONFIG_IPIPE */ |
1066 | set_irq_handler(irq, handle_simple_irq); | 1081 | set_irq_handler(irq, handle_simple_irq); |
1067 | #endif /* !CONFIG_IPIPE */ | 1082 | #endif /* !CONFIG_IPIPE */ |
@@ -1101,10 +1116,9 @@ int __init init_arch_irq(void) | |||
1101 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | | 1116 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | |
1102 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; | 1117 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; |
1103 | 1118 | ||
1104 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ | 1119 | #ifdef SIC_IWR0 |
1105 | || defined(BF538_FAMILY) || defined(CONFIG_BF51x) | ||
1106 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); | 1120 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); |
1107 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) | 1121 | # ifdef SIC_IWR1 |
1108 | /* BF52x/BF51x system reset does not properly reset SIC_IWR1 which | 1122 | /* BF52x/BF51x system reset does not properly reset SIC_IWR1 which |
1109 | * will screw up the bootrom as it relies on MDMA0/1 waking it | 1123 | * will screw up the bootrom as it relies on MDMA0/1 waking it |
1110 | * up from IDLE instructions. See this report for more info: | 1124 | * up from IDLE instructions. See this report for more info: |
@@ -1114,10 +1128,8 @@ int __init init_arch_irq(void) | |||
1114 | bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); | 1128 | bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); |
1115 | else | 1129 | else |
1116 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); | 1130 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); |
1117 | #else | 1131 | # endif |
1118 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); | 1132 | # ifdef SIC_IWR2 |
1119 | #endif | ||
1120 | # ifdef CONFIG_BF54x | ||
1121 | bfin_write_SIC_IWR2(IWR_DISABLE_ALL); | 1133 | bfin_write_SIC_IWR2(IWR_DISABLE_ALL); |
1122 | # endif | 1134 | # endif |
1123 | #else | 1135 | #else |
@@ -1126,9 +1138,8 @@ int __init init_arch_irq(void) | |||
1126 | 1138 | ||
1127 | #ifdef CONFIG_IPIPE | 1139 | #ifdef CONFIG_IPIPE |
1128 | for (irq = 0; irq < NR_IRQS; irq++) { | 1140 | for (irq = 0; irq < NR_IRQS; irq++) { |
1129 | struct irq_desc *desc = irq_desc + irq; | 1141 | struct irq_desc *desc = irq_to_desc(irq); |
1130 | desc->ic_prio = __ipipe_get_irq_priority(irq); | 1142 | desc->ic_prio = __ipipe_get_irq_priority(irq); |
1131 | desc->thr_prio = __ipipe_get_irqthread_priority(irq); | ||
1132 | } | 1143 | } |
1133 | #endif /* CONFIG_IPIPE */ | 1144 | #endif /* CONFIG_IPIPE */ |
1134 | 1145 | ||
@@ -1211,76 +1222,21 @@ int __ipipe_get_irq_priority(unsigned irq) | |||
1211 | return IVG15; | 1222 | return IVG15; |
1212 | } | 1223 | } |
1213 | 1224 | ||
1214 | int __ipipe_get_irqthread_priority(unsigned irq) | ||
1215 | { | ||
1216 | int ient, prio; | ||
1217 | int demux_irq; | ||
1218 | |||
1219 | /* The returned priority value is rescaled to [0..IVG13+1] | ||
1220 | * with 0 being the lowest effective priority level. */ | ||
1221 | |||
1222 | if (irq <= IRQ_CORETMR) | ||
1223 | return IVG13 - irq + 1; | ||
1224 | |||
1225 | /* GPIO IRQs are given the priority of the demux | ||
1226 | * interrupt. */ | ||
1227 | if (IS_GPIOIRQ(irq)) { | ||
1228 | #if defined(CONFIG_BF54x) | ||
1229 | u32 bank = PINT_2_BANK(irq2pint_lut[irq - SYS_IRQS]); | ||
1230 | demux_irq = (bank == 0 ? IRQ_PINT0 : | ||
1231 | bank == 1 ? IRQ_PINT1 : | ||
1232 | bank == 2 ? IRQ_PINT2 : | ||
1233 | IRQ_PINT3); | ||
1234 | #elif defined(CONFIG_BF561) | ||
1235 | demux_irq = (irq >= IRQ_PF32 ? IRQ_PROG2_INTA : | ||
1236 | irq >= IRQ_PF16 ? IRQ_PROG1_INTA : | ||
1237 | IRQ_PROG0_INTA); | ||
1238 | #elif defined(CONFIG_BF52x) | ||
1239 | demux_irq = (irq >= IRQ_PH0 ? IRQ_PORTH_INTA : | ||
1240 | irq >= IRQ_PG0 ? IRQ_PORTG_INTA : | ||
1241 | IRQ_PORTF_INTA); | ||
1242 | #else | ||
1243 | demux_irq = irq; | ||
1244 | #endif | ||
1245 | return IVG13 - PRIO_GPIODEMUX(demux_irq) + 1; | ||
1246 | } | ||
1247 | |||
1248 | /* The GPIO demux interrupt is given a lower priority | ||
1249 | * than the GPIO IRQs, so that its threaded handler | ||
1250 | * unmasks the interrupt line after the decoded IRQs | ||
1251 | * have been processed. */ | ||
1252 | prio = PRIO_GPIODEMUX(irq); | ||
1253 | /* demux irq? */ | ||
1254 | if (prio != -1) | ||
1255 | return IVG13 - prio; | ||
1256 | |||
1257 | for (ient = 0; ient < NR_PERI_INTS; ient++) { | ||
1258 | struct ivgx *ivg = ivg_table + ient; | ||
1259 | if (ivg->irqno == irq) { | ||
1260 | for (prio = 0; prio <= IVG13-IVG7; prio++) { | ||
1261 | if (ivg7_13[prio].ifirst <= ivg && | ||
1262 | ivg7_13[prio].istop > ivg) | ||
1263 | return IVG7 - prio; | ||
1264 | } | ||
1265 | } | ||
1266 | } | ||
1267 | |||
1268 | return 0; | ||
1269 | } | ||
1270 | |||
1271 | /* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */ | 1225 | /* Hw interrupts are disabled on entry (check SAVE_CONTEXT). */ |
1272 | #ifdef CONFIG_DO_IRQ_L1 | 1226 | #ifdef CONFIG_DO_IRQ_L1 |
1273 | __attribute__((l1_text)) | 1227 | __attribute__((l1_text)) |
1274 | #endif | 1228 | #endif |
1275 | asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | 1229 | asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) |
1276 | { | 1230 | { |
1231 | struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr(); | ||
1232 | struct ipipe_domain *this_domain = ipipe_current_domain; | ||
1277 | struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; | 1233 | struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; |
1278 | struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; | 1234 | struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; |
1279 | int irq; | 1235 | int irq, s; |
1280 | 1236 | ||
1281 | if (likely(vec == EVT_IVTMR_P)) { | 1237 | if (likely(vec == EVT_IVTMR_P)) { |
1282 | irq = IRQ_CORETMR; | 1238 | irq = IRQ_CORETMR; |
1283 | goto handle_irq; | 1239 | goto core_tick; |
1284 | } | 1240 | } |
1285 | 1241 | ||
1286 | SSYNC(); | 1242 | SSYNC(); |
@@ -1322,24 +1278,39 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | |||
1322 | irq = ivg->irqno; | 1278 | irq = ivg->irqno; |
1323 | 1279 | ||
1324 | if (irq == IRQ_SYSTMR) { | 1280 | if (irq == IRQ_SYSTMR) { |
1281 | #ifdef CONFIG_GENERIC_CLOCKEVENTS | ||
1282 | core_tick: | ||
1283 | #else | ||
1325 | bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ | 1284 | bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ |
1285 | #endif | ||
1326 | /* This is basically what we need from the register frame. */ | 1286 | /* This is basically what we need from the register frame. */ |
1327 | __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend; | 1287 | __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend; |
1328 | __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc; | 1288 | __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc; |
1329 | if (!ipipe_root_domain_p) | 1289 | if (this_domain != ipipe_root_domain) |
1330 | __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10; | ||
1331 | else | ||
1332 | __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10; | 1290 | __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10; |
1291 | else | ||
1292 | __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10; | ||
1333 | } | 1293 | } |
1334 | 1294 | ||
1335 | handle_irq: | 1295 | #ifndef CONFIG_GENERIC_CLOCKEVENTS |
1296 | core_tick: | ||
1297 | #endif | ||
1298 | if (this_domain == ipipe_root_domain) { | ||
1299 | s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status); | ||
1300 | barrier(); | ||
1301 | } | ||
1336 | 1302 | ||
1337 | ipipe_trace_irq_entry(irq); | 1303 | ipipe_trace_irq_entry(irq); |
1338 | __ipipe_handle_irq(irq, regs); | 1304 | __ipipe_handle_irq(irq, regs); |
1339 | ipipe_trace_irq_exit(irq); | 1305 | ipipe_trace_irq_exit(irq); |
1340 | 1306 | ||
1341 | if (ipipe_root_domain_p) | 1307 | if (this_domain == ipipe_root_domain) { |
1342 | return !test_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); | 1308 | set_thread_flag(TIF_IRQ_SYNC); |
1309 | if (!s) { | ||
1310 | __clear_bit(IPIPE_SYNCDEFER_FLAG, &p->status); | ||
1311 | return !test_bit(IPIPE_STALL_FLAG, &p->status); | ||
1312 | } | ||
1313 | } | ||
1343 | 1314 | ||
1344 | return 0; | 1315 | return 0; |
1345 | } | 1316 | } |
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c index d3d70fd67c16..f48a6aebb49b 100644 --- a/arch/blackfin/mach-common/pm.c +++ b/arch/blackfin/mach-common/pm.c | |||
@@ -82,10 +82,9 @@ void bfin_pm_suspend_standby_enter(void) | |||
82 | 82 | ||
83 | bfin_pm_standby_restore(); | 83 | bfin_pm_standby_restore(); |
84 | 84 | ||
85 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \ | 85 | #ifdef SIC_IWR0 |
86 | defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x) | ||
87 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); | 86 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); |
88 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) | 87 | # ifdef SIC_IWR1 |
89 | /* BF52x system reset does not properly reset SIC_IWR1 which | 88 | /* BF52x system reset does not properly reset SIC_IWR1 which |
90 | * will screw up the bootrom as it relies on MDMA0/1 waking it | 89 | * will screw up the bootrom as it relies on MDMA0/1 waking it |
91 | * up from IDLE instructions. See this report for more info: | 90 | * up from IDLE instructions. See this report for more info: |
@@ -95,10 +94,8 @@ void bfin_pm_suspend_standby_enter(void) | |||
95 | bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); | 94 | bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); |
96 | else | 95 | else |
97 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); | 96 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); |
98 | #else | 97 | # endif |
99 | bfin_write_SIC_IWR1(IWR_DISABLE_ALL); | 98 | # ifdef SIC_IWR2 |
100 | #endif | ||
101 | # ifdef CONFIG_BF54x | ||
102 | bfin_write_SIC_IWR2(IWR_DISABLE_ALL); | 99 | bfin_write_SIC_IWR2(IWR_DISABLE_ALL); |
103 | # endif | 100 | # endif |
104 | #else | 101 | #else |
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index 77c992847094..93eab6146079 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c | |||
@@ -158,10 +158,14 @@ static irqreturn_t ipi_handler(int irq, void *dev_instance) | |||
158 | kfree(msg); | 158 | kfree(msg); |
159 | break; | 159 | break; |
160 | case BFIN_IPI_CALL_FUNC: | 160 | case BFIN_IPI_CALL_FUNC: |
161 | spin_unlock(&msg_queue->lock); | ||
161 | ipi_call_function(cpu, msg); | 162 | ipi_call_function(cpu, msg); |
163 | spin_lock(&msg_queue->lock); | ||
162 | break; | 164 | break; |
163 | case BFIN_IPI_CPU_STOP: | 165 | case BFIN_IPI_CPU_STOP: |
166 | spin_unlock(&msg_queue->lock); | ||
164 | ipi_cpu_stop(cpu); | 167 | ipi_cpu_stop(cpu); |
168 | spin_lock(&msg_queue->lock); | ||
165 | kfree(msg); | 169 | kfree(msg); |
166 | break; | 170 | break; |
167 | default: | 171 | default: |
@@ -457,7 +461,7 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end) | |||
457 | smp_flush_data.start = start; | 461 | smp_flush_data.start = start; |
458 | smp_flush_data.end = end; | 462 | smp_flush_data.end = end; |
459 | 463 | ||
460 | if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 1)) | 464 | if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0)) |
461 | printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n"); | 465 | printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n"); |
462 | } | 466 | } |
463 | EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); | 467 | EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); |
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c index d0532b72bba5..9c3629b9a689 100644 --- a/arch/blackfin/mm/init.c +++ b/arch/blackfin/mm/init.c | |||
@@ -104,7 +104,7 @@ void __init paging_init(void) | |||
104 | } | 104 | } |
105 | } | 105 | } |
106 | 106 | ||
107 | asmlinkage void init_pda(void) | 107 | asmlinkage void __init init_pda(void) |
108 | { | 108 | { |
109 | unsigned int cpu = raw_smp_processor_id(); | 109 | unsigned int cpu = raw_smp_processor_id(); |
110 | 110 | ||