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-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/boot/dts/omap2.dtsi2
-rw-r--r--arch/arm/boot/dts/spear1310-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear1310.dtsi2
-rw-r--r--arch/arm/boot/dts/spear1340-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear1340.dtsi2
-rw-r--r--arch/arm/boot/dts/spear13xx.dtsi2
-rw-r--r--arch/arm/boot/dts/spear300-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear300.dtsi2
-rw-r--r--arch/arm/boot/dts/spear310-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear310.dtsi2
-rw-r--r--arch/arm/boot/dts/spear320-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear320.dtsi2
-rw-r--r--arch/arm/boot/dts/spear3xx.dtsi2
-rw-r--r--arch/arm/include/asm/atomic.h2
-rw-r--r--arch/arm/include/asm/domain.h18
-rw-r--r--arch/arm/include/asm/futex.h1
-rw-r--r--arch/arm/include/asm/hardware/sp810.h2
-rw-r--r--arch/arm/include/asm/thread_info.h5
-rw-r--r--arch/arm/kernel/entry-armv.S1
-rw-r--r--arch/arm/kernel/kprobes-test-arm.c4
-rw-r--r--arch/arm/kernel/kprobes-thumb.c2
-rw-r--r--arch/arm/kernel/perf_event.c2
-rw-r--r--arch/arm/kernel/ptrace.c3
-rw-r--r--arch/arm/kernel/signal.c46
-rw-r--r--arch/arm/kernel/signal.h2
-rw-r--r--arch/arm/kernel/traps.c2
-rw-r--r--arch/arm/kernel/vmlinux.lds.S2
-rw-r--r--arch/arm/mach-dove/include/mach/bridge-regs.h1
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h1
-rw-r--r--arch/arm/mach-exynos/Kconfig8
-rw-r--r--arch/arm/mach-imx/clk-imx35.c9
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c6
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c2
-rw-r--r--arch/arm/mach-kirkwood/board-iconnect.c3
-rw-r--r--arch/arm/mach-kirkwood/common.c1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/bridge-regs.h1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h1
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h29
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/bridge-regs.h1
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h2
-rw-r--r--arch/arm/mach-mxs/mach-apx4devkit.c11
-rw-r--r--arch/arm/mach-omap2/board-flash.c5
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c6
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c28
-rw-r--r--arch/arm/mach-omap2/board-overo.c2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c10
-rw-r--r--arch/arm/mach-omap2/cm.h11
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c4
-rw-r--r--arch/arm/mach-omap2/mux.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c36
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c6
-rw-r--r--arch/arm/mach-omap2/twl-common.c2
-rw-r--r--arch/arm/mach-omap2/usb-musb.c6
-rw-r--r--arch/arm/mach-omap2/usb-tusb6010.c2
-rw-r--r--arch/arm/mach-orion5x/include/mach/bridge-regs.h2
-rw-r--r--arch/arm/mach-orion5x/include/mach/io.h22
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h1
-rw-r--r--arch/arm/mach-pxa/hx4700.c15
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c1
-rw-r--r--arch/arm/mach-shmobile/board-kzm9d.c1
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c1
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c3
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c8
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c7
-rw-r--r--arch/arm/mach-shmobile/platsmp.c5
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/dma.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/generic.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/spear.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/timex.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-spear13xx/spear1310.c2
-rw-r--r--arch/arm/mach-spear13xx/spear1340.c2
-rw-r--r--arch/arm/mach-spear13xx/spear13xx.c2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/generic.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/misc_regs.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/spear.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/timex.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-spear3xx/spear300.c2
-rw-r--r--arch/arm/mach-spear3xx/spear310.c2
-rw-r--r--arch/arm/mach-spear3xx/spear320.c2
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c2
-rw-r--r--arch/arm/mach-spear6xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-spear6xx/include/mach/misc_regs.h2
-rw-r--r--arch/arm/mach-tegra/reset.c2
-rw-r--r--arch/arm/mach-ux500/board-mop500.c54
-rw-r--r--arch/arm/mach-versatile/pci.c1
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/mm/mm.h2
-rw-r--r--arch/arm/mm/mmu.c74
-rw-r--r--arch/arm/net/bpf_jit_32.c5
-rw-r--r--arch/arm/net/bpf_jit_32.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx2_cam.h2
-rw-r--r--arch/arm/plat-omap/clock.c2
-rw-r--r--arch/arm/plat-orion/common.c2
-rw-r--r--arch/arm/plat-pxa/ssp.c1
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s3c.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/watchdog-reset.h2
-rw-r--r--arch/arm/plat-spear/include/plat/debug-macro.S2
-rw-r--r--arch/arm/plat-spear/include/plat/pl080.h2
-rw-r--r--arch/arm/plat-spear/include/plat/shirq.h2
-rw-r--r--arch/arm/plat-spear/include/plat/timex.h2
-rw-r--r--arch/arm/plat-spear/include/plat/uncompress.h2
-rw-r--r--arch/arm/plat-spear/pl080.c2
-rw-r--r--arch/arm/plat-spear/restart.c2
-rw-r--r--arch/arm/plat-spear/shirq.c2
115 files changed, 368 insertions, 237 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b1b27525b24d..a91009c61870 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -589,6 +589,7 @@ config ARCH_ORION5X
589 select PCI 589 select PCI
590 select ARCH_REQUIRE_GPIOLIB 590 select ARCH_REQUIRE_GPIOLIB
591 select GENERIC_CLOCKEVENTS 591 select GENERIC_CLOCKEVENTS
592 select NEED_MACH_IO_H
592 select PLAT_ORION 593 select PLAT_ORION
593 help 594 help
594 Support for the following Marvell Orion 5x series SoCs: 595 Support for the following Marvell Orion 5x series SoCs:
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index f2ab4ea7cc0e..581cb081cb0f 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -44,6 +44,8 @@
44 compatible = "ti,omap2-intc"; 44 compatible = "ti,omap2-intc";
45 interrupt-controller; 45 interrupt-controller;
46 #interrupt-cells = <1>; 46 #interrupt-cells = <1>;
47 ti,intc-size = <96>;
48 reg = <0x480FE000 0x1000>;
47 }; 49 };
48 50
49 uart1: serial@4806a000 { 51 uart1: serial@4806a000 {
diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts
index 8314e4171884..dd4358bc26e2 100644
--- a/arch/arm/boot/dts/spear1310-evb.dts
+++ b/arch/arm/boot/dts/spear1310-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr1310 Evaluation Baord 2 * DTS file for SPEAr1310 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 9e61da404d57..419ea7413d23 100644
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for all SPEAr1310 SoCs 2 * DTS file for all SPEAr1310 SoCs
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts
index 0d8472e5ab9f..c9a54e06fb68 100644
--- a/arch/arm/boot/dts/spear1340-evb.dts
+++ b/arch/arm/boot/dts/spear1340-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr1340 Evaluation Baord 2 * DTS file for SPEAr1340 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index a26fc47a55e8..d71fe2a68f09 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for all SPEAr1340 SoCs 2 * DTS file for all SPEAr1340 SoCs
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi
index 1f8e1e1481df..10dcec7e7321 100644
--- a/arch/arm/boot/dts/spear13xx.dtsi
+++ b/arch/arm/boot/dts/spear13xx.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for all SPEAr13xx SoCs 2 * DTS file for all SPEAr13xx SoCs
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts
index fc82b1a26458..d71b8d581e3d 100644
--- a/arch/arm/boot/dts/spear300-evb.dts
+++ b/arch/arm/boot/dts/spear300-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr300 Evaluation Baord 2 * DTS file for SPEAr300 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi
index 01c5e358fdb2..ed3627c116cc 100644
--- a/arch/arm/boot/dts/spear300.dtsi
+++ b/arch/arm/boot/dts/spear300.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr300 SoC 2 * DTS file for SPEAr300 SoC
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts
index dc5e2d445a93..b00544e0cd5d 100644
--- a/arch/arm/boot/dts/spear310-evb.dts
+++ b/arch/arm/boot/dts/spear310-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr310 Evaluation Baord 2 * DTS file for SPEAr310 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
index e47081c494d9..62fc4fb3e5f9 100644
--- a/arch/arm/boot/dts/spear310.dtsi
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr310 SoC 2 * DTS file for SPEAr310 SoC
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index 6308fa3bec1e..c13fd1f3b09f 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr320 Evaluation Baord 2 * DTS file for SPEAr320 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
index 5372ca399b1f..1f49d69595a0 100644
--- a/arch/arm/boot/dts/spear320.dtsi
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr320 SoC 2 * DTS file for SPEAr320 SoC
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi
index 91072553963f..3a8bb5736928 100644
--- a/arch/arm/boot/dts/spear3xx.dtsi
+++ b/arch/arm/boot/dts/spear3xx.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for all SPEAr3xx SoCs 2 * DTS file for all SPEAr3xx SoCs
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 68374ba6a943..c79f61faa3a5 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -243,7 +243,7 @@ typedef struct {
243 243
244#define ATOMIC64_INIT(i) { (i) } 244#define ATOMIC64_INIT(i) { (i) }
245 245
246static inline u64 atomic64_read(atomic64_t *v) 246static inline u64 atomic64_read(const atomic64_t *v)
247{ 247{
248 u64 result; 248 u64 result;
249 249
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index 3d2220498abc..6ddbe446425e 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -60,13 +60,13 @@
60#ifndef __ASSEMBLY__ 60#ifndef __ASSEMBLY__
61 61
62#ifdef CONFIG_CPU_USE_DOMAINS 62#ifdef CONFIG_CPU_USE_DOMAINS
63#define set_domain(x) \ 63static inline void set_domain(unsigned val)
64 do { \ 64{
65 __asm__ __volatile__( \ 65 asm volatile(
66 "mcr p15, 0, %0, c3, c0 @ set domain" \ 66 "mcr p15, 0, %0, c3, c0 @ set domain"
67 : : "r" (x)); \ 67 : : "r" (val));
68 isb(); \ 68 isb();
69 } while (0) 69}
70 70
71#define modify_domain(dom,type) \ 71#define modify_domain(dom,type) \
72 do { \ 72 do { \
@@ -78,8 +78,8 @@
78 } while (0) 78 } while (0)
79 79
80#else 80#else
81#define set_domain(x) do { } while (0) 81static inline void set_domain(unsigned val) { }
82#define modify_domain(dom,type) do { } while (0) 82static inline void modify_domain(unsigned dom, unsigned type) { }
83#endif 83#endif
84 84
85/* 85/*
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 7be54690aeec..e42cf597f6e6 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -19,6 +19,7 @@
19 " .long 1b, 4f, 2b, 4f\n" \ 19 " .long 1b, 4f, 2b, 4f\n" \
20 " .popsection\n" \ 20 " .popsection\n" \
21 " .pushsection .fixup,\"ax\"\n" \ 21 " .pushsection .fixup,\"ax\"\n" \
22 " .align 2\n" \
22 "4: mov %0, " err_reg "\n" \ 23 "4: mov %0, " err_reg "\n" \
23 " b 3b\n" \ 24 " b 3b\n" \
24 " .popsection" 25 " .popsection"
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
index e0d1c0cfa548..6b9b077d86b3 100644
--- a/arch/arm/include/asm/hardware/sp810.h
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -4,7 +4,7 @@
4 * ARM PrimeXsys System Controller SP810 header file 4 * ARM PrimeXsys System Controller SP810 header file
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index b79f8e97f775..af7b0bda3355 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -148,7 +148,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
148#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ 148#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */
149#define TIF_SYSCALL_TRACE 8 149#define TIF_SYSCALL_TRACE 8
150#define TIF_SYSCALL_AUDIT 9 150#define TIF_SYSCALL_AUDIT 9
151#define TIF_SYSCALL_RESTARTSYS 10
152#define TIF_POLLING_NRFLAG 16 151#define TIF_POLLING_NRFLAG 16
153#define TIF_USING_IWMMXT 17 152#define TIF_USING_IWMMXT 17
154#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ 153#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
@@ -164,11 +163,9 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
164#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 163#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
165#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) 164#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
166#define _TIF_SECCOMP (1 << TIF_SECCOMP) 165#define _TIF_SECCOMP (1 << TIF_SECCOMP)
167#define _TIF_SYSCALL_RESTARTSYS (1 << TIF_SYSCALL_RESTARTSYS)
168 166
169/* Checks for any syscall work in entry-common.S */ 167/* Checks for any syscall work in entry-common.S */
170#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ 168#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
171 _TIF_SYSCALL_RESTARTSYS)
172 169
173/* 170/*
174 * Change these and you break ASM code in entry-common.S 171 * Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 437f0c426517..0d1851ca6eb9 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -495,6 +495,7 @@ ENDPROC(__und_usr)
495 * The out of line fixup for the ldrt above. 495 * The out of line fixup for the ldrt above.
496 */ 496 */
497 .pushsection .fixup, "ax" 497 .pushsection .fixup, "ax"
498 .align 2
4984: mov pc, r9 4994: mov pc, r9
499 .popsection 500 .popsection
500 .pushsection __ex_table,"a" 501 .pushsection __ex_table,"a"
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index ba32b393b3f0..38c1a3b103a0 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -187,8 +187,8 @@ void kprobe_arm_test_cases(void)
187 TEST_BF_R ("mov pc, r",0,2f,"") 187 TEST_BF_R ("mov pc, r",0,2f,"")
188 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"") 188 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"")
189 TEST_BB( "sub pc, pc, #1b-2b+8") 189 TEST_BB( "sub pc, pc, #1b-2b+8")
190#if __LINUX_ARM_ARCH__ >= 6 190#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
191 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before ARMv6 */ 191 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
192#endif 192#endif
193 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"") 193 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
194 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc") 194 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
diff --git a/arch/arm/kernel/kprobes-thumb.c b/arch/arm/kernel/kprobes-thumb.c
index 8f96ec778e8d..6123daf397a7 100644
--- a/arch/arm/kernel/kprobes-thumb.c
+++ b/arch/arm/kernel/kprobes-thumb.c
@@ -660,7 +660,7 @@ static const union decode_item t32_table_1111_100x[] = {
660 /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */ 660 /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */
661 /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */ 661 /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */
662 /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */ 662 /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */
663 DECODE_EMULATEX (0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal, 663 DECODE_SIMULATEX(0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal,
664 REGS(PC, NOSPPCX, 0, 0, 0)), 664 REGS(PC, NOSPPCX, 0, 0, 0)),
665 665
666 /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */ 666 /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 186c8cb982c5..a02eada3aa5d 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -503,7 +503,7 @@ __hw_perf_event_init(struct perf_event *event)
503 event_requires_mode_exclusion(&event->attr)) { 503 event_requires_mode_exclusion(&event->attr)) {
504 pr_debug("ARM performance counters do not support " 504 pr_debug("ARM performance counters do not support "
505 "mode exclusion\n"); 505 "mode exclusion\n");
506 return -EPERM; 506 return -EOPNOTSUPP;
507 } 507 }
508 508
509 /* 509 /*
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 5700a7ae7f0b..14e38261cd31 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -25,7 +25,6 @@
25#include <linux/regset.h> 25#include <linux/regset.h>
26#include <linux/audit.h> 26#include <linux/audit.h>
27#include <linux/tracehook.h> 27#include <linux/tracehook.h>
28#include <linux/unistd.h>
29 28
30#include <asm/pgtable.h> 29#include <asm/pgtable.h>
31#include <asm/traps.h> 30#include <asm/traps.h>
@@ -918,8 +917,6 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
918 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, 917 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
919 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); 918 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
920 919
921 if (why == 0 && test_and_clear_thread_flag(TIF_SYSCALL_RESTARTSYS))
922 scno = __NR_restart_syscall - __NR_SYSCALL_BASE;
923 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 920 if (!test_thread_flag(TIF_SYSCALL_TRACE))
924 return scno; 921 return scno;
925 922
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index fd2392a17ac1..536c5d6b340b 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -27,6 +27,7 @@
27 */ 27 */
28#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 28#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))
29#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 29#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))
30#define SWI_SYS_RESTART (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE)
30 31
31/* 32/*
32 * With EABI, the syscall number has to be loaded into r7. 33 * With EABI, the syscall number has to be loaded into r7.
@@ -47,6 +48,18 @@ const unsigned long sigreturn_codes[7] = {
47}; 48};
48 49
49/* 50/*
51 * Either we support OABI only, or we have EABI with the OABI
52 * compat layer enabled. In the later case we don't know if
53 * user space is EABI or not, and if not we must not clobber r7.
54 * Always using the OABI syscall solves that issue and works for
55 * all those cases.
56 */
57const unsigned long syscall_restart_code[2] = {
58 SWI_SYS_RESTART, /* swi __NR_restart_syscall */
59 0xe49df004, /* ldr pc, [sp], #4 */
60};
61
62/*
50 * atomically swap in the new signal mask, and wait for a signal. 63 * atomically swap in the new signal mask, and wait for a signal.
51 */ 64 */
52asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) 65asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)
@@ -592,10 +605,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
592 case -ERESTARTNOHAND: 605 case -ERESTARTNOHAND:
593 case -ERESTARTSYS: 606 case -ERESTARTSYS:
594 case -ERESTARTNOINTR: 607 case -ERESTARTNOINTR:
595 case -ERESTART_RESTARTBLOCK:
596 regs->ARM_r0 = regs->ARM_ORIG_r0; 608 regs->ARM_r0 = regs->ARM_ORIG_r0;
597 regs->ARM_pc = restart_addr; 609 regs->ARM_pc = restart_addr;
598 break; 610 break;
611 case -ERESTART_RESTARTBLOCK:
612 regs->ARM_r0 = -EINTR;
613 break;
599 } 614 }
600 } 615 }
601 616
@@ -611,14 +626,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
611 * debugger has chosen to restart at a different PC. 626 * debugger has chosen to restart at a different PC.
612 */ 627 */
613 if (regs->ARM_pc == restart_addr) { 628 if (regs->ARM_pc == restart_addr) {
614 if (retval == -ERESTARTNOHAND || 629 if (retval == -ERESTARTNOHAND
615 retval == -ERESTART_RESTARTBLOCK
616 || (retval == -ERESTARTSYS 630 || (retval == -ERESTARTSYS
617 && !(ka.sa.sa_flags & SA_RESTART))) { 631 && !(ka.sa.sa_flags & SA_RESTART))) {
618 regs->ARM_r0 = -EINTR; 632 regs->ARM_r0 = -EINTR;
619 regs->ARM_pc = continue_addr; 633 regs->ARM_pc = continue_addr;
620 } 634 }
621 clear_thread_flag(TIF_SYSCALL_RESTARTSYS);
622 } 635 }
623 636
624 handle_signal(signr, &ka, &info, regs); 637 handle_signal(signr, &ka, &info, regs);
@@ -632,8 +645,29 @@ static void do_signal(struct pt_regs *regs, int syscall)
632 * ignore the restart. 645 * ignore the restart.
633 */ 646 */
634 if (retval == -ERESTART_RESTARTBLOCK 647 if (retval == -ERESTART_RESTARTBLOCK
635 && regs->ARM_pc == restart_addr) 648 && regs->ARM_pc == continue_addr) {
636 set_thread_flag(TIF_SYSCALL_RESTARTSYS); 649 if (thumb_mode(regs)) {
650 regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
651 regs->ARM_pc -= 2;
652 } else {
653#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT)
654 regs->ARM_r7 = __NR_restart_syscall;
655 regs->ARM_pc -= 4;
656#else
657 u32 __user *usp;
658
659 regs->ARM_sp -= 4;
660 usp = (u32 __user *)regs->ARM_sp;
661
662 if (put_user(regs->ARM_pc, usp) == 0) {
663 regs->ARM_pc = KERN_RESTART_CODE;
664 } else {
665 regs->ARM_sp += 4;
666 force_sigsegv(0, current);
667 }
668#endif
669 }
670 }
637 } 671 }
638 672
639 restore_saved_sigmask(); 673 restore_saved_sigmask();
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
index 5ff067b7c752..6fcfe8398aa4 100644
--- a/arch/arm/kernel/signal.h
+++ b/arch/arm/kernel/signal.h
@@ -8,5 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) 10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
11#define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes))
11 12
12extern const unsigned long sigreturn_codes[7]; 13extern const unsigned long sigreturn_codes[7];
14extern const unsigned long syscall_restart_code[2];
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 4928d89758f4..3647170e9a16 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -820,6 +820,8 @@ void __init early_trap_init(void *vectors_base)
820 */ 820 */
821 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), 821 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
822 sigreturn_codes, sizeof(sigreturn_codes)); 822 sigreturn_codes, sizeof(sigreturn_codes));
823 memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE),
824 syscall_restart_code, sizeof(syscall_restart_code));
823 825
824 flush_icache_range(vectors, vectors + PAGE_SIZE); 826 flush_icache_range(vectors, vectors + PAGE_SIZE);
825 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); 827 modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 43a31fb06318..36ff15bbfdd4 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -183,7 +183,9 @@ SECTIONS
183 } 183 }
184#endif 184#endif
185 185
186#ifdef CONFIG_SMP
186 PERCPU_SECTION(L1_CACHE_BYTES) 187 PERCPU_SECTION(L1_CACHE_BYTES)
188#endif
187 189
188#ifdef CONFIG_XIP_KERNEL 190#ifdef CONFIG_XIP_KERNEL
189 __data_loc = ALIGN(4); /* location in binary */ 191 __data_loc = ALIGN(4); /* location in binary */
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 226949dc4ac0..f953bb54aa9d 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -50,5 +50,6 @@
50#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c) 50#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c)
51 51
52#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 52#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
53#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
53 54
54#endif 55#endif
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index ad1165d488c1..d52b0ef313b7 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -78,6 +78,7 @@
78 78
79/* North-South Bridge */ 79/* North-South Bridge */
80#define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000) 80#define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000)
81#define BRIDGE_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x20000)
81 82
82/* Cryptographic Engine */ 83/* Cryptographic Engine */
83#define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000) 84#define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 573be57d3d28..6f6d13f91e4c 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -212,7 +212,7 @@ config MACH_SMDKV310
212 select EXYNOS_DEV_SYSMMU 212 select EXYNOS_DEV_SYSMMU
213 select EXYNOS4_DEV_AHCI 213 select EXYNOS4_DEV_AHCI
214 select SAMSUNG_DEV_KEYPAD 214 select SAMSUNG_DEV_KEYPAD
215 select EXYNOS4_DEV_DMA 215 select EXYNOS_DEV_DMA
216 select SAMSUNG_DEV_PWM 216 select SAMSUNG_DEV_PWM
217 select EXYNOS4_DEV_USB_OHCI 217 select EXYNOS4_DEV_USB_OHCI
218 select EXYNOS4_SETUP_FIMD0 218 select EXYNOS4_SETUP_FIMD0
@@ -264,7 +264,7 @@ config MACH_UNIVERSAL_C210
264 select S5P_DEV_ONENAND 264 select S5P_DEV_ONENAND
265 select S5P_DEV_TV 265 select S5P_DEV_TV
266 select EXYNOS_DEV_SYSMMU 266 select EXYNOS_DEV_SYSMMU
267 select EXYNOS4_DEV_DMA 267 select EXYNOS_DEV_DMA
268 select EXYNOS_DEV_DRM 268 select EXYNOS_DEV_DRM
269 select EXYNOS4_SETUP_FIMD0 269 select EXYNOS4_SETUP_FIMD0
270 select EXYNOS4_SETUP_I2C1 270 select EXYNOS4_SETUP_I2C1
@@ -303,7 +303,7 @@ config MACH_NURI
303 select S5P_DEV_MFC 303 select S5P_DEV_MFC
304 select S5P_DEV_USB_EHCI 304 select S5P_DEV_USB_EHCI
305 select S5P_SETUP_MIPIPHY 305 select S5P_SETUP_MIPIPHY
306 select EXYNOS4_DEV_DMA 306 select EXYNOS_DEV_DMA
307 select EXYNOS_DEV_DRM 307 select EXYNOS_DEV_DRM
308 select EXYNOS4_SETUP_FIMC 308 select EXYNOS4_SETUP_FIMC
309 select EXYNOS4_SETUP_FIMD0 309 select EXYNOS4_SETUP_FIMD0
@@ -341,7 +341,7 @@ config MACH_ORIGEN
341 select SAMSUNG_DEV_PWM 341 select SAMSUNG_DEV_PWM
342 select EXYNOS_DEV_DRM 342 select EXYNOS_DEV_DRM
343 select EXYNOS_DEV_SYSMMU 343 select EXYNOS_DEV_SYSMMU
344 select EXYNOS4_DEV_DMA 344 select EXYNOS_DEV_DMA
345 select EXYNOS4_DEV_USB_OHCI 345 select EXYNOS4_DEV_USB_OHCI
346 select EXYNOS4_SETUP_FIMD0 346 select EXYNOS4_SETUP_FIMD0
347 select EXYNOS4_SETUP_SDHCI 347 select EXYNOS4_SETUP_SDHCI
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 920a8cc42726..c6422fb10bae 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -201,7 +201,6 @@ int __init mx35_clocks_init()
201 pr_err("i.MX35 clk %d: register failed with %ld\n", 201 pr_err("i.MX35 clk %d: register failed with %ld\n",
202 i, PTR_ERR(clk[i])); 202 i, PTR_ERR(clk[i]));
203 203
204
205 clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); 204 clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
206 clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); 205 clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
207 clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1"); 206 clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -264,6 +263,14 @@ int __init mx35_clocks_init()
264 clk_prepare_enable(clk[iim_gate]); 263 clk_prepare_enable(clk[iim_gate]);
265 clk_prepare_enable(clk[emi_gate]); 264 clk_prepare_enable(clk[emi_gate]);
266 265
266 /*
267 * SCC is needed to boot via mmc after a watchdog reset. The clock code
268 * before conversion to common clk also enabled UART1 (which isn't
269 * handled here and not needed for mmc) and IIM (which is enabled
270 * unconditionally above).
271 */
272 clk_prepare_enable(clk[scc_gate]);
273
267 imx_print_silicon_rev("i.MX35", mx35_revision()); 274 imx_print_silicon_rev("i.MX35", mx35_revision());
268 275
269#ifdef CONFIG_MXC_USE_EPIT 276#ifdef CONFIG_MXC_USE_EPIT
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 17dc66a085a5..e1a17ac7b3b4 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -152,13 +152,14 @@ enum mx6q_clks {
152 ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3, 152 ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
153 usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg, 153 usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
154 pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg, 154 pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
155 ssi2_ipg, ssi3_ipg, clk_max 155 ssi2_ipg, ssi3_ipg, rom,
156 clk_max
156}; 157};
157 158
158static struct clk *clk[clk_max]; 159static struct clk *clk[clk_max];
159 160
160static enum mx6q_clks const clks_init_on[] __initconst = { 161static enum mx6q_clks const clks_init_on[] __initconst = {
161 mmdc_ch0_axi, mmdc_ch1_axi, 162 mmdc_ch0_axi, rom,
162}; 163};
163 164
164int __init mx6q_clocks_init(void) 165int __init mx6q_clocks_init(void)
@@ -364,6 +365,7 @@ int __init mx6q_clocks_init(void)
364 clk[gpmi_bch] = imx_clk_gate2("gpmi_bch", "usdhc4", base + 0x78, 26); 365 clk[gpmi_bch] = imx_clk_gate2("gpmi_bch", "usdhc4", base + 0x78, 26);
365 clk[gpmi_io] = imx_clk_gate2("gpmi_io", "enfc", base + 0x78, 28); 366 clk[gpmi_io] = imx_clk_gate2("gpmi_io", "enfc", base + 0x78, 28);
366 clk[gpmi_apb] = imx_clk_gate2("gpmi_apb", "usdhc3", base + 0x78, 30); 367 clk[gpmi_apb] = imx_clk_gate2("gpmi_apb", "usdhc3", base + 0x78, 30);
368 clk[rom] = imx_clk_gate2("rom", "ahb", base + 0x7c, 0);
367 clk[sata] = imx_clk_gate2("sata", "ipg", base + 0x7c, 4); 369 clk[sata] = imx_clk_gate2("sata", "ipg", base + 0x7c, 4);
368 clk[sdma] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6); 370 clk[sdma] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6);
369 clk[spba] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12); 371 clk[spba] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index f76edb96a48a..ba09552fe5fe 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -38,7 +38,7 @@
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
40#include <asm/mach/time.h> 40#include <asm/mach/time.h>
41#include <asm/system.h> 41#include <asm/system_info.h>
42#include <mach/common.h> 42#include <mach/common.h>
43#include <mach/iomux-mx27.h> 43#include <mach/iomux-mx27.h>
44 44
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c
index 2222c5739519..b0d3cc49269d 100644
--- a/arch/arm/mach-kirkwood/board-iconnect.c
+++ b/arch/arm/mach-kirkwood/board-iconnect.c
@@ -20,9 +20,6 @@
20#include <linux/mv643xx_eth.h> 20#include <linux/mv643xx_eth.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/leds.h> 22#include <linux/leds.h>
23#include <linux/spi/flash.h>
24#include <linux/spi/spi.h>
25#include <linux/spi/orion_spi.h>
26#include <linux/i2c.h> 23#include <linux/i2c.h>
27#include <linux/input.h> 24#include <linux/input.h>
28#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index e1d2c6def5e6..f261cd242643 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -159,6 +159,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev,
159 gate_fn->gate.flags = clk_gate_flags; 159 gate_fn->gate.flags = clk_gate_flags;
160 gate_fn->gate.lock = lock; 160 gate_fn->gate.lock = lock;
161 gate_fn->gate.hw.init = &init; 161 gate_fn->gate.hw.init = &init;
162 gate_fn->fn = fn;
162 163
163 /* ops is the gate ops, but with our disable function */ 164 /* ops is the gate ops, but with our disable function */
164 if (clk_gate_fn_ops.disable != clk_gate_fn_disable) { 165 if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 3eee37a3b501..a115142f8690 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -38,6 +38,7 @@
38#define IRQ_MASK_HIGH_OFF 0x0014 38#define IRQ_MASK_HIGH_OFF 0x0014
39 39
40#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 40#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
41#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
41 42
42#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) 43#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
43#define L2_WRITETHROUGH 0x00000010 44#define L2_WRITETHROUGH 0x00000010
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index fede3d503efa..c5b68510776b 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -80,6 +80,7 @@
80#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) 80#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)
81 81
82#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) 82#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
83#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x20000)
83 84
84#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000) 85#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000)
85 86
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
deleted file mode 100644
index 0e135a599f3e..000000000000
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __ASM_MACH_GPIO_PXA_H
2#define __ASM_MACH_GPIO_PXA_H
3
4#include <mach/addr-map.h>
5#include <mach/cputype.h>
6#include <mach/irqs.h>
7
8#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
9
10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
11#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
12
13#define gpio_to_bank(gpio) ((gpio) >> 5)
14
15/* NOTE: these macros are defined here to make optimization of
16 * gpio_{get,set}_value() to work when 'gpio' is a constant.
17 * Usage of these macros otherwise is no longer recommended,
18 * use generic GPIO API whenever possible.
19 */
20#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f))
21
22#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
23#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
24#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
25#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
26
27#include <plat/gpio-pxa.h>
28
29#endif /* __ASM_MACH_GPIO_PXA_H */
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index c64dbb96dbad..eb187e0e059b 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -31,5 +31,6 @@
31#define IRQ_MASK_HIGH_OFF 0x0014 31#define IRQ_MASK_HIGH_OFF 0x0014
32 32
33#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 33#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
34#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
34 35
35#endif 36#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 3674497162e3..e807c4c52a0b 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -42,6 +42,7 @@
42#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 42#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
43#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 43#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
44#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 44#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000
45#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
45#define MV78XX0_CORE_REGS_SIZE SZ_16K 46#define MV78XX0_CORE_REGS_SIZE SZ_16K
46 47
47#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) 48#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
@@ -59,6 +60,7 @@
59 * Core-specific peripheral registers. 60 * Core-specific peripheral registers.
60 */ 61 */
61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) 62#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
63#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE)
62 64
63/* 65/*
64 * Register Map 66 * Register Map
diff --git a/arch/arm/mach-mxs/mach-apx4devkit.c b/arch/arm/mach-mxs/mach-apx4devkit.c
index 5e90b9dcdef8..f5f061757deb 100644
--- a/arch/arm/mach-mxs/mach-apx4devkit.c
+++ b/arch/arm/mach-mxs/mach-apx4devkit.c
@@ -205,6 +205,16 @@ static int apx4devkit_phy_fixup(struct phy_device *phy)
205 return 0; 205 return 0;
206} 206}
207 207
208static void __init apx4devkit_fec_phy_clk_enable(void)
209{
210 struct clk *clk;
211
212 /* Enable fec phy clock */
213 clk = clk_get_sys("enet_out", NULL);
214 if (!IS_ERR(clk))
215 clk_prepare_enable(clk);
216}
217
208static void __init apx4devkit_init(void) 218static void __init apx4devkit_init(void)
209{ 219{
210 mx28_soc_init(); 220 mx28_soc_init();
@@ -225,6 +235,7 @@ static void __init apx4devkit_init(void)
225 phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK, 235 phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
226 apx4devkit_phy_fixup); 236 apx4devkit_phy_fixup);
227 237
238 apx4devkit_fec_phy_clk_enable();
228 mx28_add_fec(0, &mx28_fec_pdata); 239 mx28_add_fec(0, &mx28_fec_pdata);
229 240
230 mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata); 241 mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata);
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 70a81f900bb5..53c39d239d6e 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -97,11 +97,6 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,
97 97
98 gpmc_onenand_init(&board_onenand_data); 98 gpmc_onenand_init(&board_onenand_data);
99} 99}
100#else
101void
102__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
103{
104}
105#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */ 100#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
106 101
107#if defined(CONFIG_MTD_NAND_OMAP2) || \ 102#if defined(CONFIG_MTD_NAND_OMAP2) || \
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 8ca14e88a31a..2c5d0ed75285 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -83,11 +83,9 @@ static struct musb_hdrc_config musb_config = {
83}; 83};
84 84
85static struct musb_hdrc_platform_data tusb_data = { 85static struct musb_hdrc_platform_data tusb_data = {
86#if defined(CONFIG_USB_MUSB_OTG) 86#ifdef CONFIG_USB_GADGET_MUSB_HDRC
87 .mode = MUSB_OTG, 87 .mode = MUSB_OTG,
88#elif defined(CONFIG_USB_MUSB_PERIPHERAL) 88#else
89 .mode = MUSB_PERIPHERAL,
90#else /* defined(CONFIG_USB_MUSB_HOST) */
91 .mode = MUSB_HOST, 89 .mode = MUSB_HOST,
92#endif 90#endif
93 .set_power = tusb_set_power, 91 .set_power = tusb_set_power,
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 79c6909eeb78..580fd17208da 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -81,13 +81,13 @@ static u8 omap3_beagle_version;
81static struct { 81static struct {
82 int mmc1_gpio_wp; 82 int mmc1_gpio_wp;
83 int usb_pwr_level; 83 int usb_pwr_level;
84 int reset_gpio; 84 int dvi_pd_gpio;
85 int usr_button_gpio; 85 int usr_button_gpio;
86 int mmc_caps; 86 int mmc_caps;
87} beagle_config = { 87} beagle_config = {
88 .mmc1_gpio_wp = -EINVAL, 88 .mmc1_gpio_wp = -EINVAL,
89 .usb_pwr_level = GPIOF_OUT_INIT_LOW, 89 .usb_pwr_level = GPIOF_OUT_INIT_LOW,
90 .reset_gpio = 129, 90 .dvi_pd_gpio = -EINVAL,
91 .usr_button_gpio = 4, 91 .usr_button_gpio = 4,
92 .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 92 .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
93}; 93};
@@ -126,21 +126,21 @@ static void __init omap3_beagle_init_rev(void)
126 printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); 126 printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n");
127 omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; 127 omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX;
128 beagle_config.mmc1_gpio_wp = 29; 128 beagle_config.mmc1_gpio_wp = 29;
129 beagle_config.reset_gpio = 170; 129 beagle_config.dvi_pd_gpio = 170;
130 beagle_config.usr_button_gpio = 7; 130 beagle_config.usr_button_gpio = 7;
131 break; 131 break;
132 case 6: 132 case 6:
133 printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); 133 printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n");
134 omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; 134 omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3;
135 beagle_config.mmc1_gpio_wp = 23; 135 beagle_config.mmc1_gpio_wp = 23;
136 beagle_config.reset_gpio = 170; 136 beagle_config.dvi_pd_gpio = 170;
137 beagle_config.usr_button_gpio = 7; 137 beagle_config.usr_button_gpio = 7;
138 break; 138 break;
139 case 5: 139 case 5:
140 printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); 140 printk(KERN_INFO "OMAP3 Beagle Rev: C4\n");
141 omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; 141 omap3_beagle_version = OMAP3BEAGLE_BOARD_C4;
142 beagle_config.mmc1_gpio_wp = 23; 142 beagle_config.mmc1_gpio_wp = 23;
143 beagle_config.reset_gpio = 170; 143 beagle_config.dvi_pd_gpio = 170;
144 beagle_config.usr_button_gpio = 7; 144 beagle_config.usr_button_gpio = 7;
145 break; 145 break;
146 case 0: 146 case 0:
@@ -274,11 +274,9 @@ static int beagle_twl_gpio_setup(struct device *dev,
274 if (r) 274 if (r)
275 pr_err("%s: unable to configure nDVI_PWR_EN\n", 275 pr_err("%s: unable to configure nDVI_PWR_EN\n",
276 __func__); 276 __func__);
277 r = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH, 277
278 "DVI_LDO_EN"); 278 beagle_config.dvi_pd_gpio = gpio + 2;
279 if (r) 279
280 pr_err("%s: unable to configure DVI_LDO_EN\n",
281 __func__);
282 } else { 280 } else {
283 /* 281 /*
284 * REVISIT: need ehci-omap hooks for external VBUS 282 * REVISIT: need ehci-omap hooks for external VBUS
@@ -287,7 +285,7 @@ static int beagle_twl_gpio_setup(struct device *dev,
287 if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) 285 if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"))
288 pr_err("%s: unable to configure EHCI_nOC\n", __func__); 286 pr_err("%s: unable to configure EHCI_nOC\n", __func__);
289 } 287 }
290 dvi_panel.power_down_gpio = beagle_config.reset_gpio; 288 dvi_panel.power_down_gpio = beagle_config.dvi_pd_gpio;
291 289
292 gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level, 290 gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level,
293 "nEN_USB_PWR"); 291 "nEN_USB_PWR");
@@ -499,7 +497,7 @@ static void __init omap3_beagle_init(void)
499 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 497 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
500 omap3_beagle_init_rev(); 498 omap3_beagle_init_rev();
501 499
502 if (beagle_config.mmc1_gpio_wp != -EINVAL) 500 if (gpio_is_valid(beagle_config.mmc1_gpio_wp))
503 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); 501 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
504 mmc[0].caps = beagle_config.mmc_caps; 502 mmc[0].caps = beagle_config.mmc_caps;
505 omap_hsmmc_init(mmc); 503 omap_hsmmc_init(mmc);
@@ -510,15 +508,13 @@ static void __init omap3_beagle_init(void)
510 508
511 platform_add_devices(omap3_beagle_devices, 509 platform_add_devices(omap3_beagle_devices,
512 ARRAY_SIZE(omap3_beagle_devices)); 510 ARRAY_SIZE(omap3_beagle_devices));
511 if (gpio_is_valid(beagle_config.dvi_pd_gpio))
512 omap_mux_init_gpio(beagle_config.dvi_pd_gpio, OMAP_PIN_OUTPUT);
513 omap_display_init(&beagle_dss_data); 513 omap_display_init(&beagle_dss_data);
514 omap_serial_init(); 514 omap_serial_init();
515 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 515 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
516 mt46h32m32lf6_sdrc_params); 516 mt46h32m32lf6_sdrc_params);
517 517
518 omap_mux_init_gpio(170, OMAP_PIN_INPUT);
519 /* REVISIT leave DVI powered down until it's needed ... */
520 gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD");
521
522 usb_musb_init(NULL); 518 usb_musb_init(NULL);
523 usbhs_init(&usbhs_bdata); 519 usbhs_init(&usbhs_bdata);
524 omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, 520 omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 8fa2fc3a4c3c..779734d8ba37 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -494,8 +494,8 @@ static void __init overo_init(void)
494 494
495 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); 495 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
496 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 496 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
497 omap_hsmmc_init(mmc);
498 overo_i2c_init(); 497 overo_i2c_init();
498 omap_hsmmc_init(mmc);
499 omap_display_init(&overo_dss_data); 499 omap_display_init(&overo_dss_data);
500 omap_serial_init(); 500 omap_serial_init();
501 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 501 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2172f6603848..ba6f9a0a43e9 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -84,6 +84,7 @@ static struct clk slimbus_clk = {
84 84
85static struct clk sys_32k_ck = { 85static struct clk sys_32k_ck = {
86 .name = "sys_32k_ck", 86 .name = "sys_32k_ck",
87 .clkdm_name = "prm_clkdm",
87 .rate = 32768, 88 .rate = 32768,
88 .ops = &clkops_null, 89 .ops = &clkops_null,
89}; 90};
@@ -512,6 +513,7 @@ static struct clk ddrphy_ck = {
512 .name = "ddrphy_ck", 513 .name = "ddrphy_ck",
513 .parent = &dpll_core_m2_ck, 514 .parent = &dpll_core_m2_ck,
514 .ops = &clkops_null, 515 .ops = &clkops_null,
516 .clkdm_name = "l3_emif_clkdm",
515 .fixed_div = 2, 517 .fixed_div = 2,
516 .recalc = &omap_fixed_divisor_recalc, 518 .recalc = &omap_fixed_divisor_recalc,
517}; 519};
@@ -769,6 +771,7 @@ static const struct clksel dpll_mpu_m2_div[] = {
769static struct clk dpll_mpu_m2_ck = { 771static struct clk dpll_mpu_m2_ck = {
770 .name = "dpll_mpu_m2_ck", 772 .name = "dpll_mpu_m2_ck",
771 .parent = &dpll_mpu_ck, 773 .parent = &dpll_mpu_ck,
774 .clkdm_name = "cm_clkdm",
772 .clksel = dpll_mpu_m2_div, 775 .clksel = dpll_mpu_m2_div,
773 .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU, 776 .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU,
774 .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, 777 .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
@@ -1149,6 +1152,7 @@ static const struct clksel l3_div_div[] = {
1149static struct clk l3_div_ck = { 1152static struct clk l3_div_ck = {
1150 .name = "l3_div_ck", 1153 .name = "l3_div_ck",
1151 .parent = &div_core_ck, 1154 .parent = &div_core_ck,
1155 .clkdm_name = "cm_clkdm",
1152 .clksel = l3_div_div, 1156 .clksel = l3_div_div,
1153 .clksel_reg = OMAP4430_CM_CLKSEL_CORE, 1157 .clksel_reg = OMAP4430_CM_CLKSEL_CORE,
1154 .clksel_mask = OMAP4430_CLKSEL_L3_MASK, 1158 .clksel_mask = OMAP4430_CLKSEL_L3_MASK,
@@ -2824,6 +2828,7 @@ static const struct clksel trace_clk_div_div[] = {
2824static struct clk trace_clk_div_ck = { 2828static struct clk trace_clk_div_ck = {
2825 .name = "trace_clk_div_ck", 2829 .name = "trace_clk_div_ck",
2826 .parent = &pmd_trace_clk_mux_ck, 2830 .parent = &pmd_trace_clk_mux_ck,
2831 .clkdm_name = "emu_sys_clkdm",
2827 .clksel = trace_clk_div_div, 2832 .clksel = trace_clk_div_div,
2828 .clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, 2833 .clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL,
2829 .clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK, 2834 .clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK,
@@ -3412,9 +3417,12 @@ int __init omap4xxx_clk_init(void)
3412 if (cpu_is_omap443x()) { 3417 if (cpu_is_omap443x()) {
3413 cpu_mask = RATE_IN_4430; 3418 cpu_mask = RATE_IN_4430;
3414 cpu_clkflg = CK_443X; 3419 cpu_clkflg = CK_443X;
3415 } else if (cpu_is_omap446x()) { 3420 } else if (cpu_is_omap446x() || cpu_is_omap447x()) {
3416 cpu_mask = RATE_IN_4460 | RATE_IN_4430; 3421 cpu_mask = RATE_IN_4460 | RATE_IN_4430;
3417 cpu_clkflg = CK_446X | CK_443X; 3422 cpu_clkflg = CK_446X | CK_443X;
3423
3424 if (cpu_is_omap447x())
3425 pr_warn("WARNING: OMAP4470 clock data incomplete!\n");
3418 } else { 3426 } else {
3419 return 0; 3427 return 0;
3420 } 3428 }
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index a7bc096bd407..f24e3f7a2bbc 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -22,4 +22,15 @@
22 */ 22 */
23#define MAX_MODULE_READY_TIME 2000 23#define MAX_MODULE_READY_TIME 2000
24 24
25/*
26 * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
27 * the PRCM to request that a module enter the inactive state in the
28 * case of OMAP2 & 3. In the case of OMAP4 this is the max duration
29 * in microseconds for the module to reach the inactive state from
30 * a functional state.
31 * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
32 * kernel init.
33 */
34#define MAX_MODULE_DISABLE_TIME 5000
35
25#endif 36#endif
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 8c86d294b1a3..1a39945d9ff8 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -313,9 +313,9 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off
313 313
314 omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == 314 omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) ==
315 CLKCTRL_IDLEST_DISABLED), 315 CLKCTRL_IDLEST_DISABLED),
316 MAX_MODULE_READY_TIME, i); 316 MAX_MODULE_DISABLE_TIME, i);
317 317
318 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; 318 return (i < MAX_MODULE_DISABLE_TIME) ? 0 : -EBUSY;
319} 319}
320 320
321/** 321/**
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 4b46b91cca5c..9fe6829f4c16 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -41,6 +41,7 @@
41#include "control.h" 41#include "control.h"
42#include "mux.h" 42#include "mux.h"
43#include "prm.h" 43#include "prm.h"
44#include "common.h"
44 45
45#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ 46#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
46#define OMAP_MUX_BASE_SZ 0x5ca 47#define OMAP_MUX_BASE_SZ 0x5ca
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index bf86f7e8f91f..773193670ea2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -530,7 +530,7 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
530 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 530 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
531 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); 531 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
532 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 532 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
533 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 533 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
534 534
535 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 535 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
536 536
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 950454a3fa31..b7bcba5221ba 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -393,8 +393,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
393 .rev_offs = 0x0000, 393 .rev_offs = 0x0000,
394 .sysc_offs = 0x0004, 394 .sysc_offs = 0x0004,
395 .sysc_flags = SYSC_HAS_SIDLEMODE, 395 .sysc_flags = SYSC_HAS_SIDLEMODE,
396 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 396 .idlemodes = (SIDLE_FORCE | SIDLE_NO),
397 SIDLE_SMART_WKUP),
398 .sysc_fields = &omap_hwmod_sysc_type1, 397 .sysc_fields = &omap_hwmod_sysc_type1,
399}; 398};
400 399
@@ -854,6 +853,11 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
854 .name = "dss_hdmi", 853 .name = "dss_hdmi",
855 .class = &omap44xx_hdmi_hwmod_class, 854 .class = &omap44xx_hdmi_hwmod_class,
856 .clkdm_name = "l3_dss_clkdm", 855 .clkdm_name = "l3_dss_clkdm",
856 /*
857 * HDMI audio requires to use no-idle mode. Hence,
858 * set idle mode by software.
859 */
860 .flags = HWMOD_SWSUP_SIDLE,
857 .mpu_irqs = omap44xx_dss_hdmi_irqs, 861 .mpu_irqs = omap44xx_dss_hdmi_irqs,
858 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 862 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
859 .main_clk = "dss_48mhz_clk", 863 .main_clk = "dss_48mhz_clk",
@@ -1924,7 +1928,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
1924 1928
1925static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = { 1929static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
1926 { .role = "pad_fck", .clk = "pad_clks_ck" }, 1930 { .role = "pad_fck", .clk = "pad_clks_ck" },
1927 { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" }, 1931 { .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" },
1928}; 1932};
1929 1933
1930static struct omap_hwmod omap44xx_mcbsp1_hwmod = { 1934static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
@@ -1959,7 +1963,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
1959 1963
1960static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = { 1964static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
1961 { .role = "pad_fck", .clk = "pad_clks_ck" }, 1965 { .role = "pad_fck", .clk = "pad_clks_ck" },
1962 { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" }, 1966 { .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" },
1963}; 1967};
1964 1968
1965static struct omap_hwmod omap44xx_mcbsp2_hwmod = { 1969static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
@@ -1994,7 +1998,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
1994 1998
1995static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = { 1999static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
1996 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2000 { .role = "pad_fck", .clk = "pad_clks_ck" },
1997 { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" }, 2001 { .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" },
1998}; 2002};
1999 2003
2000static struct omap_hwmod omap44xx_mcbsp3_hwmod = { 2004static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
@@ -2029,7 +2033,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
2029 2033
2030static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = { 2034static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
2031 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2035 { .role = "pad_fck", .clk = "pad_clks_ck" },
2032 { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" }, 2036 { .role = "prcm_fck", .clk = "mcbsp4_sync_mux_ck" },
2033}; 2037};
2034 2038
2035static struct omap_hwmod omap44xx_mcbsp4_hwmod = { 2039static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
@@ -3860,7 +3864,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
3860}; 3864};
3861 3865
3862/* usb_host_fs -> l3_main_2 */ 3866/* usb_host_fs -> l3_main_2 */
3863static struct omap_hwmod_ocp_if omap44xx_usb_host_fs__l3_main_2 = { 3867static struct omap_hwmod_ocp_if __maybe_unused omap44xx_usb_host_fs__l3_main_2 = {
3864 .master = &omap44xx_usb_host_fs_hwmod, 3868 .master = &omap44xx_usb_host_fs_hwmod,
3865 .slave = &omap44xx_l3_main_2_hwmod, 3869 .slave = &omap44xx_l3_main_2_hwmod,
3866 .clk = "l3_div_ck", 3870 .clk = "l3_div_ck",
@@ -3918,7 +3922,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
3918}; 3922};
3919 3923
3920/* aess -> l4_abe */ 3924/* aess -> l4_abe */
3921static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { 3925static struct omap_hwmod_ocp_if __maybe_unused omap44xx_aess__l4_abe = {
3922 .master = &omap44xx_aess_hwmod, 3926 .master = &omap44xx_aess_hwmod,
3923 .slave = &omap44xx_l4_abe_hwmod, 3927 .slave = &omap44xx_l4_abe_hwmod,
3924 .clk = "ocp_abe_iclk", 3928 .clk = "ocp_abe_iclk",
@@ -4009,7 +4013,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {
4009}; 4013};
4010 4014
4011/* l4_abe -> aess */ 4015/* l4_abe -> aess */
4012static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { 4016static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess = {
4013 .master = &omap44xx_l4_abe_hwmod, 4017 .master = &omap44xx_l4_abe_hwmod,
4014 .slave = &omap44xx_aess_hwmod, 4018 .slave = &omap44xx_aess_hwmod,
4015 .clk = "ocp_abe_iclk", 4019 .clk = "ocp_abe_iclk",
@@ -4027,7 +4031,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {
4027}; 4031};
4028 4032
4029/* l4_abe -> aess (dma) */ 4033/* l4_abe -> aess (dma) */
4030static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { 4034static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess_dma = {
4031 .master = &omap44xx_l4_abe_hwmod, 4035 .master = &omap44xx_l4_abe_hwmod,
4032 .slave = &omap44xx_aess_hwmod, 4036 .slave = &omap44xx_aess_hwmod,
4033 .clk = "ocp_abe_iclk", 4037 .clk = "ocp_abe_iclk",
@@ -5853,7 +5857,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_host_fs_addrs[] = {
5853}; 5857};
5854 5858
5855/* l4_cfg -> usb_host_fs */ 5859/* l4_cfg -> usb_host_fs */
5856static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_fs = { 5860static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
5857 .master = &omap44xx_l4_cfg_hwmod, 5861 .master = &omap44xx_l4_cfg_hwmod,
5858 .slave = &omap44xx_usb_host_fs_hwmod, 5862 .slave = &omap44xx_usb_host_fs_hwmod,
5859 .clk = "l4_div_ck", 5863 .clk = "l4_div_ck",
@@ -6010,13 +6014,13 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6010 &omap44xx_iva__l3_main_2, 6014 &omap44xx_iva__l3_main_2,
6011 &omap44xx_l3_main_1__l3_main_2, 6015 &omap44xx_l3_main_1__l3_main_2,
6012 &omap44xx_l4_cfg__l3_main_2, 6016 &omap44xx_l4_cfg__l3_main_2,
6013 &omap44xx_usb_host_fs__l3_main_2, 6017 /* &omap44xx_usb_host_fs__l3_main_2, */
6014 &omap44xx_usb_host_hs__l3_main_2, 6018 &omap44xx_usb_host_hs__l3_main_2,
6015 &omap44xx_usb_otg_hs__l3_main_2, 6019 &omap44xx_usb_otg_hs__l3_main_2,
6016 &omap44xx_l3_main_1__l3_main_3, 6020 &omap44xx_l3_main_1__l3_main_3,
6017 &omap44xx_l3_main_2__l3_main_3, 6021 &omap44xx_l3_main_2__l3_main_3,
6018 &omap44xx_l4_cfg__l3_main_3, 6022 &omap44xx_l4_cfg__l3_main_3,
6019 &omap44xx_aess__l4_abe, 6023 /* &omap44xx_aess__l4_abe, */
6020 &omap44xx_dsp__l4_abe, 6024 &omap44xx_dsp__l4_abe,
6021 &omap44xx_l3_main_1__l4_abe, 6025 &omap44xx_l3_main_1__l4_abe,
6022 &omap44xx_mpu__l4_abe, 6026 &omap44xx_mpu__l4_abe,
@@ -6025,8 +6029,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6025 &omap44xx_l4_cfg__l4_wkup, 6029 &omap44xx_l4_cfg__l4_wkup,
6026 &omap44xx_mpu__mpu_private, 6030 &omap44xx_mpu__mpu_private,
6027 &omap44xx_l4_cfg__ocp_wp_noc, 6031 &omap44xx_l4_cfg__ocp_wp_noc,
6028 &omap44xx_l4_abe__aess, 6032 /* &omap44xx_l4_abe__aess, */
6029 &omap44xx_l4_abe__aess_dma, 6033 /* &omap44xx_l4_abe__aess_dma, */
6030 &omap44xx_l3_main_2__c2c, 6034 &omap44xx_l3_main_2__c2c,
6031 &omap44xx_l4_wkup__counter_32k, 6035 &omap44xx_l4_wkup__counter_32k,
6032 &omap44xx_l4_cfg__ctrl_module_core, 6036 &omap44xx_l4_cfg__ctrl_module_core,
@@ -6132,7 +6136,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6132 &omap44xx_l4_per__uart2, 6136 &omap44xx_l4_per__uart2,
6133 &omap44xx_l4_per__uart3, 6137 &omap44xx_l4_per__uart3,
6134 &omap44xx_l4_per__uart4, 6138 &omap44xx_l4_per__uart4,
6135 &omap44xx_l4_cfg__usb_host_fs, 6139 /* &omap44xx_l4_cfg__usb_host_fs, */
6136 &omap44xx_l4_cfg__usb_host_hs, 6140 &omap44xx_l4_cfg__usb_host_hs,
6137 &omap44xx_l4_cfg__usb_otg_hs, 6141 &omap44xx_l4_cfg__usb_otg_hs,
6138 &omap44xx_l4_cfg__usb_tll_hs, 6142 &omap44xx_l4_cfg__usb_tll_hs,
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 4c90477e6f82..d52651a05daa 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -239,21 +239,15 @@ void am35x_set_mode(u8 musb_mode)
239 239
240 devconf2 &= ~CONF2_OTGMODE; 240 devconf2 &= ~CONF2_OTGMODE;
241 switch (musb_mode) { 241 switch (musb_mode) {
242#ifdef CONFIG_USB_MUSB_HDRC_HCD
243 case MUSB_HOST: /* Force VBUS valid, ID = 0 */ 242 case MUSB_HOST: /* Force VBUS valid, ID = 0 */
244 devconf2 |= CONF2_FORCE_HOST; 243 devconf2 |= CONF2_FORCE_HOST;
245 break; 244 break;
246#endif
247#ifdef CONFIG_USB_GADGET_MUSB_HDRC
248 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ 245 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
249 devconf2 |= CONF2_FORCE_DEVICE; 246 devconf2 |= CONF2_FORCE_DEVICE;
250 break; 247 break;
251#endif
252#ifdef CONFIG_USB_MUSB_OTG
253 case MUSB_OTG: /* Don't override the VBUS/ID comparators */ 248 case MUSB_OTG: /* Don't override the VBUS/ID comparators */
254 devconf2 |= CONF2_NO_OVERRIDE; 249 devconf2 |= CONF2_NO_OVERRIDE;
255 break; 250 break;
256#endif
257 default: 251 default:
258 pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode); 252 pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
259 } 253 }
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 119d5a910f3a..43a979075338 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -32,6 +32,7 @@
32#include "twl-common.h" 32#include "twl-common.h"
33#include "pm.h" 33#include "pm.h"
34#include "voltage.h" 34#include "voltage.h"
35#include "mux.h"
35 36
36static struct i2c_board_info __initdata pmic_i2c_board_info = { 37static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .addr = 0x48, 38 .addr = 0x48,
@@ -77,6 +78,7 @@ void __init omap4_pmic_init(const char *pmic_type,
77 struct twl6040_platform_data *twl6040_data, int twl6040_irq) 78 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
78{ 79{
79 /* PMIC part*/ 80 /* PMIC part*/
81 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
80 strncpy(omap4_i2c1_board_info[0].type, pmic_type, 82 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
81 sizeof(omap4_i2c1_board_info[0].type)); 83 sizeof(omap4_i2c1_board_info[0].type));
82 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N; 84 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index b19d1b43c12e..c4a576856661 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -41,12 +41,10 @@ static struct musb_hdrc_config musb_config = {
41}; 41};
42 42
43static struct musb_hdrc_platform_data musb_plat = { 43static struct musb_hdrc_platform_data musb_plat = {
44#ifdef CONFIG_USB_MUSB_OTG 44#ifdef CONFIG_USB_GADGET_MUSB_HDRC
45 .mode = MUSB_OTG, 45 .mode = MUSB_OTG,
46#elif defined(CONFIG_USB_MUSB_HDRC_HCD) 46#else
47 .mode = MUSB_HOST, 47 .mode = MUSB_HOST,
48#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
49 .mode = MUSB_PERIPHERAL,
50#endif 48#endif
51 /* .clock is set dynamically */ 49 /* .clock is set dynamically */
52 .config = &musb_config, 50 .config = &musb_config,
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index db84a46ce7fd..805bea6edf17 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -300,7 +300,7 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
300 printk(error, 3, status); 300 printk(error, 3, status);
301 return status; 301 return status;
302 } 302 }
303 tusb_resources[2].start = irq + IH_GPIO_BASE; 303 tusb_resources[2].start = gpio_to_irq(irq);
304 304
305 /* set up memory timings ... can speed them up later */ 305 /* set up memory timings ... can speed them up later */
306 if (!ps_refclk) { 306 if (!ps_refclk) {
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 96484bcd34ca..11a3c1e9801f 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -35,5 +35,5 @@
35#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204) 35#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204)
36 36
37#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) 37#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300)
38 38#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE | 0x300)
39#endif 39#endif
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
new file mode 100644
index 000000000000..1aa5d0a50a0b
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -0,0 +1,22 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/io.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_IO_H
10#define __ASM_ARCH_IO_H
11
12#include <mach/orion5x.h>
13#include <asm/sizes.h>
14
15#define IO_SPACE_LIMIT SZ_2M
16static inline void __iomem *__io(unsigned long addr)
17{
18 return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE);
19}
20
21#define __io(a) __io(a)
22#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 2745f5d95b3f..683e085ce162 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -82,6 +82,7 @@
82#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) 82#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100)
83 83
84#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) 84#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000)
85#define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x20000)
85 86
86#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) 87#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000)
87 88
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index d09da6a746b8..d3de84b0dcbe 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -127,7 +127,11 @@ static unsigned long hx4700_pin_config[] __initdata = {
127 GPIO19_SSP2_SCLK, 127 GPIO19_SSP2_SCLK,
128 GPIO86_SSP2_RXD, 128 GPIO86_SSP2_RXD,
129 GPIO87_SSP2_TXD, 129 GPIO87_SSP2_TXD,
130 GPIO88_GPIO, 130 GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */
131
132 /* BQ24022 Regulator */
133 GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */
134 GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */
131 135
132 /* HX4700 specific input GPIOs */ 136 /* HX4700 specific input GPIOs */
133 GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */ 137 GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */
@@ -135,6 +139,10 @@ static unsigned long hx4700_pin_config[] __initdata = {
135 GPIO14_GPIO, /* nWLAN_IRQ */ 139 GPIO14_GPIO, /* nWLAN_IRQ */
136 140
137 /* HX4700 specific output GPIOs */ 141 /* HX4700 specific output GPIOs */
142 GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */
143 GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */
144 GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */
145 GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */
138 GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */ 146 GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */
139 147
140 GPIO10_GPIO, /* GSM_IRQ */ 148 GPIO10_GPIO, /* GSM_IRQ */
@@ -872,14 +880,19 @@ static struct gpio global_gpios[] = {
872 { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" }, 880 { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
873 { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" }, 881 { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
874 { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" }, 882 { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" },
883 { GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" },
875 { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" }, 884 { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
885 { GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" },
876 { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" }, 886 { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
887 { GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" },
877}; 888};
878 889
879static void __init hx4700_init(void) 890static void __init hx4700_init(void)
880{ 891{
881 int ret; 892 int ret;
882 893
894 PCFR = PCFR_GPR_EN | PCFR_OPDE;
895
883 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config)); 896 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
884 gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1); 897 gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
885 ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios)); 898 ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 9e37026ef9dd..9bd135531d76 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -779,6 +779,7 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
779 .init_irq = r8a7740_init_irq, 779 .init_irq = r8a7740_init_irq,
780 .handle_irq = shmobile_handle_irq_intc, 780 .handle_irq = shmobile_handle_irq_intc,
781 .init_machine = eva_init, 781 .init_machine = eva_init,
782 .init_late = shmobile_init_late,
782 .timer = &shmobile_timer, 783 .timer = &shmobile_timer,
783 .dt_compat = eva_boards_compat_dt, 784 .dt_compat = eva_boards_compat_dt,
784MACHINE_END 785MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index 7bc5e7d39f9b..6a33cf393428 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -80,6 +80,7 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
80 .init_irq = emev2_init_irq, 80 .init_irq = emev2_init_irq,
81 .handle_irq = gic_handle_irq, 81 .handle_irq = gic_handle_irq,
82 .init_machine = kzm9d_add_standard_devices, 82 .init_machine = kzm9d_add_standard_devices,
83 .init_late = shmobile_init_late,
83 .timer = &shmobile_timer, 84 .timer = &shmobile_timer,
84 .dt_compat = kzm9d_boards_compat_dt, 85 .dt_compat = kzm9d_boards_compat_dt,
85MACHINE_END 86MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index d8e33b682832..c0ae815e7beb 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -455,6 +455,7 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
455 .init_irq = sh73a0_init_irq, 455 .init_irq = sh73a0_init_irq,
456 .handle_irq = gic_handle_irq, 456 .handle_irq = gic_handle_irq,
457 .init_machine = kzm_init, 457 .init_machine = kzm_init,
458 .init_late = shmobile_init_late,
458 .timer = &shmobile_timer, 459 .timer = &shmobile_timer,
459 .dt_compat = kzm9g_boards_compat_dt, 460 .dt_compat = kzm9g_boards_compat_dt,
460MACHINE_END 461MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index b577f7c44678..150122a44630 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1512,6 +1512,9 @@ static void __init mackerel_init(void)
1512 gpio_request(GPIO_FN_SDHID0_1, NULL); 1512 gpio_request(GPIO_FN_SDHID0_1, NULL);
1513 gpio_request(GPIO_FN_SDHID0_0, NULL); 1513 gpio_request(GPIO_FN_SDHID0_0, NULL);
1514 1514
1515 /* SDHI0 PORT172 card-detect IRQ26 */
1516 gpio_request(GPIO_FN_IRQ26_172, NULL);
1517
1515#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) 1518#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1516 /* enable SDHI1 */ 1519 /* enable SDHI1 */
1517 gpio_request(GPIO_FN_SDHICMD1, NULL); 1520 gpio_request(GPIO_FN_SDHICMD1, NULL);
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 472d1f5361e5..3946c4ba2aa8 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -475,9 +475,9 @@ static struct clk *late_main_clks[] = {
475 475
476enum { MSTP001, 476enum { MSTP001,
477 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, 477 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
478 MSTP219, 478 MSTP219, MSTP218,
479 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 479 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
480 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, 480 MSTP331, MSTP329, MSTP325, MSTP323,
481 MSTP314, MSTP313, MSTP312, MSTP311, 481 MSTP314, MSTP313, MSTP312, MSTP311,
482 MSTP303, MSTP302, MSTP301, MSTP300, 482 MSTP303, MSTP302, MSTP301, MSTP300,
483 MSTP411, MSTP410, MSTP403, 483 MSTP411, MSTP410, MSTP403,
@@ -497,6 +497,7 @@ static struct clk mstp_clks[MSTP_NR] = {
497 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ 497 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
498 [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */ 498 [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
499 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */ 499 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
500 [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */
500 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ 501 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
501 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ 502 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
502 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ 503 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
@@ -508,7 +509,6 @@ static struct clk mstp_clks[MSTP_NR] = {
508 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ 509 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
509 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */ 510 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
510 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ 511 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
511 [MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */
512 [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */ 512 [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
513 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ 513 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
514 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 514 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
@@ -552,6 +552,7 @@ static struct clk_lookup lookups[] = {
552 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ 552 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
553 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ 553 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
554 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ 554 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
555 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
555 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ 556 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
556 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ 557 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
557 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ 558 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
@@ -563,7 +564,6 @@ static struct clk_lookup lookups[] = {
563 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ 564 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
564 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ 565 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
565 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ 566 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
566 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP318]), /* SY-DMAC */
567 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 567 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
568 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 568 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
569 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 569 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index 550b23df4fd4..f04fad4ec4fb 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -35,6 +35,9 @@
35#define INT2SMSKCR3 0xfe7822ac 35#define INT2SMSKCR3 0xfe7822ac
36#define INT2SMSKCR4 0xfe7822b0 36#define INT2SMSKCR4 0xfe7822b0
37 37
38#define INT2NTSR0 0xfe700060
39#define INT2NTSR1 0xfe700064
40
38static int r8a7779_set_wake(struct irq_data *data, unsigned int on) 41static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
39{ 42{
40 return 0; /* always allow wakeup */ 43 return 0; /* always allow wakeup */
@@ -49,6 +52,10 @@ void __init r8a7779_init_irq(void)
49 gic_init(0, 29, gic_dist_base, gic_cpu_base); 52 gic_init(0, 29, gic_dist_base, gic_cpu_base);
50 gic_arch_extn.irq_set_wake = r8a7779_set_wake; 53 gic_arch_extn.irq_set_wake = r8a7779_set_wake;
51 54
55 /* route all interrupts to ARM */
56 __raw_writel(0xffffffff, INT2NTSR0);
57 __raw_writel(0x3fffffff, INT2NTSR1);
58
52 /* unmask all known interrupts in INTCS2 */ 59 /* unmask all known interrupts in INTCS2 */
53 __raw_writel(0xfffffff0, INT2SMSKCR0); 60 __raw_writel(0xfffffff0, INT2SMSKCR0);
54 __raw_writel(0xfff7ffff, INT2SMSKCR1); 61 __raw_writel(0xfff7ffff, INT2SMSKCR1);
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index bacdd667e3b1..e859fcdb3d58 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -25,7 +25,12 @@
25#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \ 25#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
26 of_machine_is_compatible("renesas,sh73a0")) 26 of_machine_is_compatible("renesas,sh73a0"))
27#define is_r8a7779() machine_is_marzen() 27#define is_r8a7779() machine_is_marzen()
28
29#ifdef CONFIG_ARCH_EMEV2
28#define is_emev2() of_machine_is_compatible("renesas,emev2") 30#define is_emev2() of_machine_is_compatible("renesas,emev2")
31#else
32#define is_emev2() (0)
33#endif
29 34
30static unsigned int __init shmobile_smp_get_core_count(void) 35static unsigned int __init shmobile_smp_get_core_count(void)
31{ 36{
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 6a4bd582c028..fafce9ce8218 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -484,7 +484,7 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
484 }, 484 },
485}; 485};
486 486
487#define SH7372_CHCLR 0x220 487#define SH7372_CHCLR (0x220 - 0x20)
488 488
489static const struct sh_dmae_channel sh7372_dmae_channels[] = { 489static const struct sh_dmae_channel sh7372_dmae_channels[] = {
490 { 490 {
diff --git a/arch/arm/mach-spear13xx/include/mach/debug-macro.S b/arch/arm/mach-spear13xx/include/mach/debug-macro.S
index ea1564609bd4..9e3ae6bfe50d 100644
--- a/arch/arm/mach-spear13xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-spear13xx/include/mach/debug-macro.S
@@ -4,7 +4,7 @@
4 * Debugging macro include header spear13xx machine family 4 * Debugging macro include header spear13xx machine family
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/dma.h b/arch/arm/mach-spear13xx/include/mach/dma.h
index 383ab04dc6c9..d50bdb605925 100644
--- a/arch/arm/mach-spear13xx/include/mach/dma.h
+++ b/arch/arm/mach-spear13xx/include/mach/dma.h
@@ -4,7 +4,7 @@
4 * DMA information for SPEAr13xx machine family 4 * DMA information for SPEAr13xx machine family
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/generic.h b/arch/arm/mach-spear13xx/include/mach/generic.h
index 6d8c45b9f298..dac57fd0cdfd 100644
--- a/arch/arm/mach-spear13xx/include/mach/generic.h
+++ b/arch/arm/mach-spear13xx/include/mach/generic.h
@@ -4,7 +4,7 @@
4 * spear13xx machine family generic header file 4 * spear13xx machine family generic header file
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/gpio.h b/arch/arm/mach-spear13xx/include/mach/gpio.h
index cd6f4f86a56b..85f176311f63 100644
--- a/arch/arm/mach-spear13xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear13xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
4 * GPIO macros for SPEAr13xx machine family 4 * GPIO macros for SPEAr13xx machine family
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/irqs.h b/arch/arm/mach-spear13xx/include/mach/irqs.h
index f542a24aa5f2..271a62b4cd31 100644
--- a/arch/arm/mach-spear13xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear13xx/include/mach/irqs.h
@@ -4,7 +4,7 @@
4 * IRQ helper macros for spear13xx machine family 4 * IRQ helper macros for spear13xx machine family
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h
index 30c57ef72686..65f27def239b 100644
--- a/arch/arm/mach-spear13xx/include/mach/spear.h
+++ b/arch/arm/mach-spear13xx/include/mach/spear.h
@@ -4,7 +4,7 @@
4 * spear13xx Machine family specific definition 4 * spear13xx Machine family specific definition
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/timex.h b/arch/arm/mach-spear13xx/include/mach/timex.h
index 31af3e8d976e..3a58b8284a6a 100644
--- a/arch/arm/mach-spear13xx/include/mach/timex.h
+++ b/arch/arm/mach-spear13xx/include/mach/timex.h
@@ -4,7 +4,7 @@
4 * SPEAr3XX machine family specific timex definitions 4 * SPEAr3XX machine family specific timex definitions
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/uncompress.h b/arch/arm/mach-spear13xx/include/mach/uncompress.h
index c7840896ae6e..70fe72f05dea 100644
--- a/arch/arm/mach-spear13xx/include/mach/uncompress.h
+++ b/arch/arm/mach-spear13xx/include/mach/uncompress.h
@@ -4,7 +4,7 @@
4 * Serial port stubs for kernel decompress status messages 4 * Serial port stubs for kernel decompress status messages
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear1310.c b/arch/arm/mach-spear13xx/spear1310.c
index fefd15b2f380..732d29bc7330 100644
--- a/arch/arm/mach-spear13xx/spear1310.c
+++ b/arch/arm/mach-spear13xx/spear1310.c
@@ -4,7 +4,7 @@
4 * SPEAr1310 machine source file 4 * SPEAr1310 machine source file
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear1340.c b/arch/arm/mach-spear13xx/spear1340.c
index ee38cbc56869..81e4ed76ad06 100644
--- a/arch/arm/mach-spear13xx/spear1340.c
+++ b/arch/arm/mach-spear13xx/spear1340.c
@@ -4,7 +4,7 @@
4 * SPEAr1340 machine source file 4 * SPEAr1340 machine source file
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index 50b349ae863d..cf936b106e27 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -4,7 +4,7 @@
4 * SPEAr13XX machines common source file 4 * SPEAr13XX machines common source file
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/debug-macro.S b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
index 590519f10d6e..0a6381fad5d9 100644
--- a/arch/arm/mach-spear3xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
@@ -4,7 +4,7 @@
4 * Debugging macro include header spear3xx machine family 4 * Debugging macro include header spear3xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar<viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 4a95b9453c2a..ce19113ca791 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -4,7 +4,7 @@
4 * SPEAr3XX machine family generic header file 4 * SPEAr3XX machine family generic header file
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar<viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/gpio.h b/arch/arm/mach-spear3xx/include/mach/gpio.h
index 451b2081bfc9..2ac74c6db7f1 100644
--- a/arch/arm/mach-spear3xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear3xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
4 * GPIO macros for SPEAr3xx machine family 4 * GPIO macros for SPEAr3xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar<viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
index 51bd62a0254c..803de76f5f36 100644
--- a/arch/arm/mach-spear3xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear3xx/include/mach/irqs.h
@@ -4,7 +4,7 @@
4 * IRQ helper macros for SPEAr3xx machine family 4 * IRQ helper macros for SPEAr3xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
index 18e2ac576f25..6309bf68d6f8 100644
--- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
@@ -4,7 +4,7 @@
4 * Miscellaneous registers definitions for SPEAr3xx machine family 4 * Miscellaneous registers definitions for SPEAr3xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
index 51eb953148a9..8cca95193d4d 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -4,7 +4,7 @@
4 * SPEAr3xx Machine family specific definition 4 * SPEAr3xx Machine family specific definition
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/timex.h b/arch/arm/mach-spear3xx/include/mach/timex.h
index a38cc9de876f..9f5d08bd0c44 100644
--- a/arch/arm/mach-spear3xx/include/mach/timex.h
+++ b/arch/arm/mach-spear3xx/include/mach/timex.h
@@ -4,7 +4,7 @@
4 * SPEAr3XX machine family specific timex definitions 4 * SPEAr3XX machine family specific timex definitions
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/uncompress.h b/arch/arm/mach-spear3xx/include/mach/uncompress.h
index 53ba8bbc0dfa..b909b011f7c8 100644
--- a/arch/arm/mach-spear3xx/include/mach/uncompress.h
+++ b/arch/arm/mach-spear3xx/include/mach/uncompress.h
@@ -4,7 +4,7 @@
4 * Serial port stubs for kernel decompress status messages 4 * Serial port stubs for kernel decompress status messages
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index f74a05bdb829..0f882ecb7d81 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -4,7 +4,7 @@
4 * SPEAr300 machine source file 4 * SPEAr300 machine source file
5 * 5 *
6 * Copyright (C) 2009-2012 ST Microelectronics 6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 84dfb0900747..bbcf4571d361 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -4,7 +4,7 @@
4 * SPEAr310 machine source file 4 * SPEAr310 machine source file
5 * 5 *
6 * Copyright (C) 2009-2012 ST Microelectronics 6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index a88fa841d29d..88d483bcd66a 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -4,7 +4,7 @@
4 * SPEAr320 machine source file 4 * SPEAr320 machine source file
5 * 5 *
6 * Copyright (C) 2009-2012 ST Microelectronics 6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index f22419ed74a8..0f41bd1c47c3 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -4,7 +4,7 @@
4 * SPEAr3XX machines common source file 4 * SPEAr3XX machines common source file
5 * 5 *
6 * Copyright (C) 2009-2012 ST Microelectronics 6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear6xx/include/mach/gpio.h b/arch/arm/mach-spear6xx/include/mach/gpio.h
index 3a789dbb69f7..d42cefc0356d 100644
--- a/arch/arm/mach-spear6xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear6xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
4 * GPIO macros for SPEAr6xx machine family 4 * GPIO macros for SPEAr6xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
index 179e45774b3a..c34acc201d34 100644
--- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
@@ -4,7 +4,7 @@
4 * Miscellaneous registers definitions for SPEAr6xx machine family 4 * Miscellaneous registers definitions for SPEAr6xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index 4d6a2ee99c3b..5beb7ebe2948 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -33,7 +33,7 @@
33 33
34static bool is_enabled; 34static bool is_enabled;
35 35
36static void tegra_cpu_reset_handler_enable(void) 36static void __init tegra_cpu_reset_handler_enable(void)
37{ 37{
38 void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE); 38 void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE);
39 void __iomem *evp_cpu_reset = 39 void __iomem *evp_cpu_reset =
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 9c74ac545849..1509a3cb5833 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -580,43 +580,12 @@ static void ux500_uart0_reset(void)
580 udelay(1); 580 udelay(1);
581} 581}
582 582
583/* This needs to be referenced by callbacks */
584struct pinctrl *u0_p;
585struct pinctrl_state *u0_def;
586struct pinctrl_state *u0_sleep;
587
588static void ux500_uart0_init(void)
589{
590 int ret;
591
592 if (IS_ERR(u0_p) || IS_ERR(u0_def))
593 return;
594
595 ret = pinctrl_select_state(u0_p, u0_def);
596 if (ret)
597 pr_err("could not set UART0 defstate\n");
598}
599
600static void ux500_uart0_exit(void)
601{
602 int ret;
603
604 if (IS_ERR(u0_p) || IS_ERR(u0_sleep))
605 return;
606
607 ret = pinctrl_select_state(u0_p, u0_sleep);
608 if (ret)
609 pr_err("could not set UART0 idlestate\n");
610}
611
612static struct amba_pl011_data uart0_plat = { 583static struct amba_pl011_data uart0_plat = {
613#ifdef CONFIG_STE_DMA40 584#ifdef CONFIG_STE_DMA40
614 .dma_filter = stedma40_filter, 585 .dma_filter = stedma40_filter,
615 .dma_rx_param = &uart0_dma_cfg_rx, 586 .dma_rx_param = &uart0_dma_cfg_rx,
616 .dma_tx_param = &uart0_dma_cfg_tx, 587 .dma_tx_param = &uart0_dma_cfg_tx,
617#endif 588#endif
618 .init = ux500_uart0_init,
619 .exit = ux500_uart0_exit,
620 .reset = ux500_uart0_reset, 589 .reset = ux500_uart0_reset,
621}; 590};
622 591
@@ -638,28 +607,7 @@ static struct amba_pl011_data uart2_plat = {
638 607
639static void __init mop500_uart_init(struct device *parent) 608static void __init mop500_uart_init(struct device *parent)
640{ 609{
641 struct amba_device *uart0_device; 610 db8500_add_uart0(parent, &uart0_plat);
642
643 uart0_device = db8500_add_uart0(parent, &uart0_plat);
644 if (uart0_device) {
645 u0_p = pinctrl_get(&uart0_device->dev);
646 if (IS_ERR(u0_p))
647 dev_err(&uart0_device->dev,
648 "could not get UART0 pinctrl\n");
649 else {
650 u0_def = pinctrl_lookup_state(u0_p,
651 PINCTRL_STATE_DEFAULT);
652 if (IS_ERR(u0_def)) {
653 dev_err(&uart0_device->dev,
654 "could not get UART0 defstate\n");
655 }
656 u0_sleep = pinctrl_lookup_state(u0_p,
657 PINCTRL_STATE_SLEEP);
658 if (IS_ERR(u0_sleep))
659 dev_err(&uart0_device->dev,
660 "could not get UART0 idlestate\n");
661 }
662 }
663 db8500_add_uart1(parent, &uart1_plat); 611 db8500_add_uart1(parent, &uart1_plat);
664 db8500_add_uart2(parent, &uart2_plat); 612 db8500_add_uart2(parent, &uart2_plat);
665} 613}
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index bec933b04ef0..e95bf84cc837 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -339,7 +339,6 @@ void __init pci_versatile_preinit(void)
339static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 339static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
340{ 340{
341 int irq; 341 int irq;
342 int devslot = PCI_SLOT(dev->devfn);
343 342
344 /* slot, pin, irq 343 /* slot, pin, irq
345 * 24 1 27 344 * 24 1 27
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index d766e4256b74..4044abcf6f9d 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1067,7 +1067,7 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t
1067 return NULL; 1067 return NULL;
1068 1068
1069 while (count) { 1069 while (count) {
1070 int j, order = __ffs(count); 1070 int j, order = __fls(count);
1071 1071
1072 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order); 1072 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
1073 while (!pages[i] && order) 1073 while (!pages[i] && order)
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index c471436c7952..2e8a1efdf7b8 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -64,7 +64,7 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
64#ifdef CONFIG_ZONE_DMA 64#ifdef CONFIG_ZONE_DMA
65extern phys_addr_t arm_dma_limit; 65extern phys_addr_t arm_dma_limit;
66#else 66#else
67#define arm_dma_limit ((u32)~0) 67#define arm_dma_limit ((phys_addr_t)~0)
68#endif 68#endif
69 69
70extern phys_addr_t arm_lowmem_limit; 70extern phys_addr_t arm_lowmem_limit;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index e5dad60b558b..cf4528d51774 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -791,6 +791,79 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
791 } 791 }
792} 792}
793 793
794#ifndef CONFIG_ARM_LPAE
795
796/*
797 * The Linux PMD is made of two consecutive section entries covering 2MB
798 * (see definition in include/asm/pgtable-2level.h). However a call to
799 * create_mapping() may optimize static mappings by using individual
800 * 1MB section mappings. This leaves the actual PMD potentially half
801 * initialized if the top or bottom section entry isn't used, leaving it
802 * open to problems if a subsequent ioremap() or vmalloc() tries to use
803 * the virtual space left free by that unused section entry.
804 *
805 * Let's avoid the issue by inserting dummy vm entries covering the unused
806 * PMD halves once the static mappings are in place.
807 */
808
809static void __init pmd_empty_section_gap(unsigned long addr)
810{
811 struct vm_struct *vm;
812
813 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
814 vm->addr = (void *)addr;
815 vm->size = SECTION_SIZE;
816 vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
817 vm->caller = pmd_empty_section_gap;
818 vm_area_add_early(vm);
819}
820
821static void __init fill_pmd_gaps(void)
822{
823 struct vm_struct *vm;
824 unsigned long addr, next = 0;
825 pmd_t *pmd;
826
827 /* we're still single threaded hence no lock needed here */
828 for (vm = vmlist; vm; vm = vm->next) {
829 if (!(vm->flags & VM_ARM_STATIC_MAPPING))
830 continue;
831 addr = (unsigned long)vm->addr;
832 if (addr < next)
833 continue;
834
835 /*
836 * Check if this vm starts on an odd section boundary.
837 * If so and the first section entry for this PMD is free
838 * then we block the corresponding virtual address.
839 */
840 if ((addr & ~PMD_MASK) == SECTION_SIZE) {
841 pmd = pmd_off_k(addr);
842 if (pmd_none(*pmd))
843 pmd_empty_section_gap(addr & PMD_MASK);
844 }
845
846 /*
847 * Then check if this vm ends on an odd section boundary.
848 * If so and the second section entry for this PMD is empty
849 * then we block the corresponding virtual address.
850 */
851 addr += vm->size;
852 if ((addr & ~PMD_MASK) == SECTION_SIZE) {
853 pmd = pmd_off_k(addr) + 1;
854 if (pmd_none(*pmd))
855 pmd_empty_section_gap(addr);
856 }
857
858 /* no need to look at any vm entry until we hit the next PMD */
859 next = (addr + PMD_SIZE - 1) & PMD_MASK;
860 }
861}
862
863#else
864#define fill_pmd_gaps() do { } while (0)
865#endif
866
794static void * __initdata vmalloc_min = 867static void * __initdata vmalloc_min =
795 (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET); 868 (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
796 869
@@ -1072,6 +1145,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
1072 */ 1145 */
1073 if (mdesc->map_io) 1146 if (mdesc->map_io)
1074 mdesc->map_io(); 1147 mdesc->map_io();
1148 fill_pmd_gaps();
1075 1149
1076 /* 1150 /*
1077 * Finally flush the caches and tlb to ensure that we're in a 1151 * Finally flush the caches and tlb to ensure that we're in a
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
index 62135849f48b..c641fb685017 100644
--- a/arch/arm/net/bpf_jit_32.c
+++ b/arch/arm/net/bpf_jit_32.c
@@ -762,6 +762,11 @@ b_epilogue:
762 update_on_xread(ctx); 762 update_on_xread(ctx);
763 emit(ARM_MOV_R(r_A, r_X), ctx); 763 emit(ARM_MOV_R(r_A, r_X), ctx);
764 break; 764 break;
765 case BPF_S_ANC_ALU_XOR_X:
766 /* A ^= X */
767 update_on_xread(ctx);
768 emit(ARM_EOR_R(r_A, r_A, r_X), ctx);
769 break;
765 case BPF_S_ANC_PROTOCOL: 770 case BPF_S_ANC_PROTOCOL:
766 /* A = ntohs(skb->protocol) */ 771 /* A = ntohs(skb->protocol) */
767 ctx->seen |= SEEN_SKB; 772 ctx->seen |= SEEN_SKB;
diff --git a/arch/arm/net/bpf_jit_32.h b/arch/arm/net/bpf_jit_32.h
index 99ae5e3f46d2..7fa2f7d3cb90 100644
--- a/arch/arm/net/bpf_jit_32.h
+++ b/arch/arm/net/bpf_jit_32.h
@@ -68,6 +68,8 @@
68#define ARM_INST_CMP_R 0x01500000 68#define ARM_INST_CMP_R 0x01500000
69#define ARM_INST_CMP_I 0x03500000 69#define ARM_INST_CMP_I 0x03500000
70 70
71#define ARM_INST_EOR_R 0x00200000
72
71#define ARM_INST_LDRB_I 0x05d00000 73#define ARM_INST_LDRB_I 0x05d00000
72#define ARM_INST_LDRB_R 0x07d00000 74#define ARM_INST_LDRB_R 0x07d00000
73#define ARM_INST_LDRH_I 0x01d000b0 75#define ARM_INST_LDRH_I 0x01d000b0
@@ -132,6 +134,8 @@
132#define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm) 134#define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm)
133#define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm) 135#define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm)
134 136
137#define ARM_EOR_R(rd, rn, rm) _AL3_R(ARM_INST_EOR, rd, rn, rm)
138
135#define ARM_LDR_I(rt, rn, off) (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \ 139#define ARM_LDR_I(rt, rn, off) (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \
136 | (off)) 140 | (off))
137#define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \ 141#define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \
diff --git a/arch/arm/plat-mxc/include/mach/mx2_cam.h b/arch/arm/plat-mxc/include/mach/mx2_cam.h
index 7ded6f1f74bc..3c080a32dbf5 100644
--- a/arch/arm/plat-mxc/include/mach/mx2_cam.h
+++ b/arch/arm/plat-mxc/include/mach/mx2_cam.h
@@ -23,6 +23,7 @@
23#ifndef __MACH_MX2_CAM_H_ 23#ifndef __MACH_MX2_CAM_H_
24#define __MACH_MX2_CAM_H_ 24#define __MACH_MX2_CAM_H_
25 25
26#define MX2_CAMERA_SWAP16 (1 << 0)
26#define MX2_CAMERA_EXT_VSYNC (1 << 1) 27#define MX2_CAMERA_EXT_VSYNC (1 << 1)
27#define MX2_CAMERA_CCIR (1 << 2) 28#define MX2_CAMERA_CCIR (1 << 2)
28#define MX2_CAMERA_CCIR_INTERLACE (1 << 3) 29#define MX2_CAMERA_CCIR_INTERLACE (1 << 3)
@@ -30,6 +31,7 @@
30#define MX2_CAMERA_GATED_CLOCK (1 << 5) 31#define MX2_CAMERA_GATED_CLOCK (1 << 5)
31#define MX2_CAMERA_INV_DATA (1 << 6) 32#define MX2_CAMERA_INV_DATA (1 << 6)
32#define MX2_CAMERA_PCLK_SAMPLE_RISING (1 << 7) 33#define MX2_CAMERA_PCLK_SAMPLE_RISING (1 << 7)
34#define MX2_CAMERA_PACK_DIR_MSB (1 << 8)
33 35
34/** 36/**
35 * struct mx2_camera_platform_data - optional platform data for mx2_camera 37 * struct mx2_camera_platform_data - optional platform data for mx2_camera
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 62ec5c452792..706b7e29397f 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -461,6 +461,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
461 struct clk *c; 461 struct clk *c;
462 struct clk *pa; 462 struct clk *pa;
463 463
464 mutex_lock(&clocks_mutex);
464 seq_printf(s, "%-30s %-30s %-10s %s\n", 465 seq_printf(s, "%-30s %-30s %-10s %s\n",
465 "clock-name", "parent-name", "rate", "use-count"); 466 "clock-name", "parent-name", "rate", "use-count");
466 467
@@ -469,6 +470,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
469 seq_printf(s, "%-30s %-30s %-10lu %d\n", 470 seq_printf(s, "%-30s %-30s %-10lu %d\n",
470 c->name, pa ? pa->name : "none", c->rate, c->usecount); 471 c->name, pa ? pa->name : "none", c->rate, c->usecount);
471 } 472 }
473 mutex_unlock(&clocks_mutex);
472 474
473 return 0; 475 return 0;
474} 476}
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 61fd837624a8..c1793786aea9 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -582,7 +582,7 @@ void __init orion_spi_1_init(unsigned long mapbase)
582 * Watchdog 582 * Watchdog
583 ****************************************************************************/ 583 ****************************************************************************/
584static struct resource orion_wdt_resource = 584static struct resource orion_wdt_resource =
585 DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28); 585 DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
586 586
587static struct platform_device orion_wdt_device = { 587static struct platform_device orion_wdt_device = {
588 .name = "orion_wdt", 588 .name = "orion_wdt",
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
index 58b79809d20c..584c9bf8ed2d 100644
--- a/arch/arm/plat-pxa/ssp.c
+++ b/arch/arm/plat-pxa/ssp.c
@@ -193,6 +193,7 @@ static const struct platform_device_id ssp_id_table[] = {
193 { "pxa25x-nssp", PXA25x_NSSP }, 193 { "pxa25x-nssp", PXA25x_NSSP },
194 { "pxa27x-ssp", PXA27x_SSP }, 194 { "pxa27x-ssp", PXA27x_SSP },
195 { "pxa168-ssp", PXA168_SSP }, 195 { "pxa168-ssp", PXA168_SSP },
196 { "pxa910-ssp", PXA910_SSP },
196 { }, 197 { },
197}; 198};
198 199
diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h
index 7d048759b772..c0c70a895ca8 100644
--- a/arch/arm/plat-samsung/include/plat/map-s3c.h
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -22,7 +22,7 @@
22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG 22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
23 23
24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) 24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000) 25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
26 26
27#define S3C2410_PA_UART (0x50000000) 27#define S3C2410_PA_UART (0x50000000)
28#define S3C24XX_PA_UART S3C2410_PA_UART 28#define S3C24XX_PA_UART S3C2410_PA_UART
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index f19aff19205c..bc4db9b04e36 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -25,7 +25,7 @@ static inline void arch_wdt_reset(void)
25 25
26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ 26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
27 27
28 if (s3c2410_wdtclk) 28 if (!IS_ERR(s3c2410_wdtclk))
29 clk_enable(s3c2410_wdtclk); 29 clk_enable(s3c2410_wdtclk);
30 30
31 /* put initial values into count and data */ 31 /* put initial values into count and data */
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
index ab3de721c5db..75b05ad0fbad 100644
--- a/arch/arm/plat-spear/include/plat/debug-macro.S
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -4,7 +4,7 @@
4 * Debugging macro include header for spear platform 4 * Debugging macro include header for spear platform
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/plat-spear/include/plat/pl080.h
index e14a3e4932f9..2bc6b54460a8 100644
--- a/arch/arm/plat-spear/include/plat/pl080.h
+++ b/arch/arm/plat-spear/include/plat/pl080.h
@@ -4,7 +4,7 @@
4 * DMAC pl080 definitions for SPEAr platform 4 * DMAC pl080 definitions for SPEAr platform
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/shirq.h b/arch/arm/plat-spear/include/plat/shirq.h
index 03ed8b585dcf..88a7fbd24793 100644
--- a/arch/arm/plat-spear/include/plat/shirq.h
+++ b/arch/arm/plat-spear/include/plat/shirq.h
@@ -4,7 +4,7 @@
4 * SPEAr platform shared irq layer header file 4 * SPEAr platform shared irq layer header file
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/timex.h b/arch/arm/plat-spear/include/plat/timex.h
index 914d09dd50fd..ef95e5b780bd 100644
--- a/arch/arm/plat-spear/include/plat/timex.h
+++ b/arch/arm/plat-spear/include/plat/timex.h
@@ -4,7 +4,7 @@
4 * SPEAr platform specific timex definitions 4 * SPEAr platform specific timex definitions
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h
index 6dd455bafdfd..2ce6cb17a98b 100644
--- a/arch/arm/plat-spear/include/plat/uncompress.h
+++ b/arch/arm/plat-spear/include/plat/uncompress.h
@@ -4,7 +4,7 @@
4 * Serial port stubs for kernel decompress status messages 4 * Serial port stubs for kernel decompress status messages
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c
index a56a067717c1..12cf27f935f9 100644
--- a/arch/arm/plat-spear/pl080.c
+++ b/arch/arm/plat-spear/pl080.c
@@ -4,7 +4,7 @@
4 * DMAC pl080 definitions for SPEAr platform 4 * DMAC pl080 definitions for SPEAr platform
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
index ea0a61302b7e..4f990115b1bd 100644
--- a/arch/arm/plat-spear/restart.c
+++ b/arch/arm/plat-spear/restart.c
@@ -4,7 +4,7 @@
4 * SPEAr platform specific restart functions 4 * SPEAr platform specific restart functions
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
index 961fb7261243..853e891e1184 100644
--- a/arch/arm/plat-spear/shirq.c
+++ b/arch/arm/plat-spear/shirq.c
@@ -4,7 +4,7 @@
4 * SPEAr platform shared irq layer source file 4 * SPEAr platform shared irq layer source file
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any