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-rw-r--r--arch/arm/plat-omap/sram.c60
1 files changed, 38 insertions, 22 deletions
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 75d1f26e5b17..51f4dfb82e2b 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -25,11 +25,12 @@
25 25
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include <mach/sram.h> 28#include <plat/sram.h>
29#include <mach/board.h> 29#include <plat/board.h>
30#include <mach/cpu.h> 30#include <plat/cpu.h>
31#include <plat/vram.h>
31 32
32#include <mach/control.h> 33#include <plat/control.h>
33 34
34#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 35#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
35# include "../mach-omap2/prm.h" 36# include "../mach-omap2/prm.h"
@@ -41,31 +42,33 @@
41#define OMAP1_SRAM_VA VMALLOC_END 42#define OMAP1_SRAM_VA VMALLOC_END
42#define OMAP2_SRAM_PA 0x40200000 43#define OMAP2_SRAM_PA 0x40200000
43#define OMAP2_SRAM_PUB_PA 0x4020f800 44#define OMAP2_SRAM_PUB_PA 0x4020f800
44#define OMAP2_SRAM_VA 0xe3000000 45#define OMAP2_SRAM_VA 0xfe400000
45#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) 46#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800)
46#define OMAP3_SRAM_PA 0x40200000 47#define OMAP3_SRAM_PA 0x40200000
47#define OMAP3_SRAM_VA 0xe3000000 48#define OMAP3_SRAM_VA 0xfe400000
48#define OMAP3_SRAM_PUB_PA 0x40208000 49#define OMAP3_SRAM_PUB_PA 0x40208000
49#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000) 50#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000)
50#define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/ 51#define OMAP4_SRAM_PA 0x40300000
51#define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/ 52#define OMAP4_SRAM_VA 0xfe400000
53#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
54#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000)
52 55
53#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 56#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
54#define SRAM_BOOTLOADER_SZ 0x00 57#define SRAM_BOOTLOADER_SZ 0x00
55#else 58#else
56#define SRAM_BOOTLOADER_SZ 0x80 59#define SRAM_BOOTLOADER_SZ 0x80
57#endif 60#endif
58 61
59#define OMAP24XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68005048) 62#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048)
60#define OMAP24XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68005050) 63#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050)
61#define OMAP24XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68005058) 64#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058)
62 65
63#define OMAP34XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68012848) 66#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848)
64#define OMAP34XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68012850) 67#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850)
65#define OMAP34XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68012858) 68#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
66#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_IO_ADDRESS(0x68012880) 69#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
67#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_IO_ADDRESS(0x6C000048) 70#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
68#define OMAP34XX_VA_CONTROL_STAT OMAP2_IO_ADDRESS(0x480022F0) 71#define OMAP34XX_VA_CONTROL_STAT OMAP2_L4_IO_ADDRESS(0x480022F0)
69 72
70#define GP_DEVICE 0x300 73#define GP_DEVICE 0x300
71 74
@@ -139,6 +142,10 @@ void __init omap_detect_sram(void)
139 } else { 142 } else {
140 omap_sram_size = 0x8000; /* 32K */ 143 omap_sram_size = 0x8000; /* 32K */
141 } 144 }
145 } else if (cpu_is_omap44xx()) {
146 omap_sram_base = OMAP4_SRAM_PUB_VA;
147 omap_sram_start = OMAP4_SRAM_PUB_PA;
148 omap_sram_size = 0xa000; /* 40K */
142 } else { 149 } else {
143 omap_sram_base = OMAP2_SRAM_PUB_VA; 150 omap_sram_base = OMAP2_SRAM_PUB_VA;
144 omap_sram_start = OMAP2_SRAM_PUB_PA; 151 omap_sram_start = OMAP2_SRAM_PUB_PA;
@@ -152,7 +159,7 @@ void __init omap_detect_sram(void)
152 } else if (cpu_is_omap44xx()) { 159 } else if (cpu_is_omap44xx()) {
153 omap_sram_base = OMAP4_SRAM_VA; 160 omap_sram_base = OMAP4_SRAM_VA;
154 omap_sram_start = OMAP4_SRAM_PA; 161 omap_sram_start = OMAP4_SRAM_PA;
155 omap_sram_size = 0x8000; /* 32K */ 162 omap_sram_size = 0xe000; /* 56K */
156 } else { 163 } else {
157 omap_sram_base = OMAP2_SRAM_VA; 164 omap_sram_base = OMAP2_SRAM_VA;
158 omap_sram_start = OMAP2_SRAM_PA; 165 omap_sram_start = OMAP2_SRAM_PA;
@@ -185,6 +192,13 @@ void __init omap_detect_sram(void)
185 omap_sram_start + SRAM_BOOTLOADER_SZ, 192 omap_sram_start + SRAM_BOOTLOADER_SZ,
186 omap_sram_size - SRAM_BOOTLOADER_SZ); 193 omap_sram_size - SRAM_BOOTLOADER_SZ);
187 omap_sram_size -= reserved; 194 omap_sram_size -= reserved;
195
196 reserved = omap_vram_reserve_sram(omap_sram_start, omap_sram_base,
197 omap_sram_size,
198 omap_sram_start + SRAM_BOOTLOADER_SZ,
199 omap_sram_size - SRAM_BOOTLOADER_SZ);
200 omap_sram_size -= reserved;
201
188 omap_sram_ceil = omap_sram_base + omap_sram_size; 202 omap_sram_ceil = omap_sram_base + omap_sram_size;
189} 203}
190 204
@@ -396,22 +410,24 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
396 sdrc_actim_ctrl_b_1, sdrc_mr_1); 410 sdrc_actim_ctrl_b_1, sdrc_mr_1);
397} 411}
398 412
399/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ 413#ifdef CONFIG_PM
400void restore_sram_functions(void) 414void omap3_sram_restore_context(void)
401{ 415{
402 omap_sram_ceil = omap_sram_base + omap_sram_size; 416 omap_sram_ceil = omap_sram_base + omap_sram_size;
403 417
404 _omap3_sram_configure_core_dpll = 418 _omap3_sram_configure_core_dpll =
405 omap_sram_push(omap3_sram_configure_core_dpll, 419 omap_sram_push(omap3_sram_configure_core_dpll,
406 omap3_sram_configure_core_dpll_sz); 420 omap3_sram_configure_core_dpll_sz);
421 omap_push_sram_idle();
407} 422}
423#endif /* CONFIG_PM */
408 424
409int __init omap34xx_sram_init(void) 425int __init omap34xx_sram_init(void)
410{ 426{
411 _omap3_sram_configure_core_dpll = 427 _omap3_sram_configure_core_dpll =
412 omap_sram_push(omap3_sram_configure_core_dpll, 428 omap_sram_push(omap3_sram_configure_core_dpll,
413 omap3_sram_configure_core_dpll_sz); 429 omap3_sram_configure_core_dpll_sz);
414 430 omap_push_sram_idle();
415 return 0; 431 return 0;
416} 432}
417#else 433#else