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-rw-r--r--arch/arm/plat-omap/include/mach/board-apollon.h4
-rw-r--r--arch/arm/plat-omap/include/mach/board-h2.h6
-rw-r--r--arch/arm/plat-omap/include/mach/board-ldp.h5
-rw-r--r--arch/arm/plat-omap/include/mach/board.h22
-rw-r--r--arch/arm/plat-omap/include/mach/control.h17
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h82
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h31
-rw-r--r--arch/arm/plat-omap/include/mach/io.h6
-rw-r--r--arch/arm/plat-omap/include/mach/memory.h17
-rw-r--r--arch/arm/plat-omap/include/mach/mmc.h74
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h41
11 files changed, 191 insertions, 114 deletions
diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h
index 731c858cf3fe..61bd5e8f09b1 100644
--- a/arch/arm/plat-omap/include/mach/board-apollon.h
+++ b/arch/arm/plat-omap/include/mach/board-apollon.h
@@ -29,12 +29,14 @@
29#ifndef __ASM_ARCH_OMAP_APOLLON_H 29#ifndef __ASM_ARCH_OMAP_APOLLON_H
30#define __ASM_ARCH_OMAP_APOLLON_H 30#define __ASM_ARCH_OMAP_APOLLON_H
31 31
32#include <mach/cpu.h>
33
32extern void apollon_mmc_init(void); 34extern void apollon_mmc_init(void);
33 35
34static inline int apollon_plus(void) 36static inline int apollon_plus(void)
35{ 37{
36 /* The apollon plus has IDCODE revision 5 */ 38 /* The apollon plus has IDCODE revision 5 */
37 return system_rev & 0xc0; 39 return omap_rev() & 0xc0;
38} 40}
39 41
40/* Placeholder for APOLLON specific defines */ 42/* Placeholder for APOLLON specific defines */
diff --git a/arch/arm/plat-omap/include/mach/board-h2.h b/arch/arm/plat-omap/include/mach/board-h2.h
index 2a050e9be65f..15531c8dc0e6 100644
--- a/arch/arm/plat-omap/include/mach/board-h2.h
+++ b/arch/arm/plat-omap/include/mach/board-h2.h
@@ -29,13 +29,13 @@
29#ifndef __ASM_ARCH_OMAP_H2_H 29#ifndef __ASM_ARCH_OMAP_H2_H
30#define __ASM_ARCH_OMAP_H2_H 30#define __ASM_ARCH_OMAP_H2_H
31 31
32/* Placeholder for H2 specific defines */
33
34/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 32/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
35#define OMAP1610_ETHR_START 0x04000300 33#define OMAP1610_ETHR_START 0x04000300
36 34
35#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
36# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3)
37
37extern void h2_mmc_init(void); 38extern void h2_mmc_init(void);
38extern void h2_mmc_slot_cover_handler(void *arg, int state);
39 39
40#endif /* __ASM_ARCH_OMAP_H2_H */ 40#endif /* __ASM_ARCH_OMAP_H2_H */
41 41
diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h
index 66e2746c04ca..f23399665212 100644
--- a/arch/arm/plat-omap/include/mach/board-ldp.h
+++ b/arch/arm/plat-omap/include/mach/board-ldp.h
@@ -32,5 +32,8 @@
32extern void twl4030_bci_battery_init(void); 32extern void twl4030_bci_battery_init(void);
33 33
34#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ 34#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ
35 35#define LDP_SMC911X_CS 1
36#define LDP_SMC911X_GPIO 152
37#define DEBUG_BASE 0x08000000
38#define OMAP34XX_ETHR_START DEBUG_BASE
36#endif /* __ASM_ARCH_OMAP_LDP_H */ 39#endif /* __ASM_ARCH_OMAP_LDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index c23c12ccb353..9466772fc7c8 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -16,7 +16,6 @@
16 16
17/* Different peripheral ids */ 17/* Different peripheral ids */
18#define OMAP_TAG_CLOCK 0x4f01 18#define OMAP_TAG_CLOCK 0x4f01
19#define OMAP_TAG_MMC 0x4f02
20#define OMAP_TAG_SERIAL_CONSOLE 0x4f03 19#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
21#define OMAP_TAG_USB 0x4f04 20#define OMAP_TAG_USB 0x4f04
22#define OMAP_TAG_LCD 0x4f05 21#define OMAP_TAG_LCD 0x4f05
@@ -35,27 +34,6 @@ struct omap_clock_config {
35 u8 system_clock_type; 34 u8 system_clock_type;
36}; 35};
37 36
38struct omap_mmc_conf {
39 unsigned enabled:1;
40 /* nomux means "standard" muxing is wrong on this board, and that
41 * board-specific code handled it before common init logic.
42 */
43 unsigned nomux:1;
44 /* switch pin can be for card detect (default) or card cover */
45 unsigned cover:1;
46 /* 4 wire signaling is optional, and is only used for SD/SDIO */
47 unsigned wire4:1;
48 /* use the internal clock */
49 unsigned internal_clock:1;
50 s16 power_pin;
51 s16 switch_pin;
52 s16 wp_pin;
53};
54
55struct omap_mmc_config {
56 struct omap_mmc_conf mmc[2];
57};
58
59struct omap_serial_console_config { 37struct omap_serial_console_config {
60 u8 console_uart; 38 u8 console_uart;
61 u32 console_speed; 39 u32 console_speed;
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index dc9886760577..269147f3836f 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -74,6 +74,7 @@
74#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) 74#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190)
75#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) 75#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194)
76#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) 76#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198)
77#define OMAP243X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x0230)
77 78
78/* 24xx-only CONTROL_GENERAL register offsets */ 79/* 24xx-only CONTROL_GENERAL register offsets */
79#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) 80#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000)
@@ -140,6 +141,7 @@
140#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) 141#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc)
141#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) 142#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190)
142#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) 143#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194)
144#define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0)
143#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) 145#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4)
144 146
145/* 147/*
@@ -154,11 +156,14 @@
154 * and the security mode (secure, non-secure, don't care) 156 * and the security mode (secure, non-secure, don't care)
155 */ 157 */
156/* CONTROL_DEVCONF0 bits */ 158/* CONTROL_DEVCONF0 bits */
159#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */
157#define OMAP24XX_USBSTANDBYCTRL (1 << 15) 160#define OMAP24XX_USBSTANDBYCTRL (1 << 15)
158#define OMAP2_MCBSP2_CLKS_MASK (1 << 6) 161#define OMAP2_MCBSP2_CLKS_MASK (1 << 6)
159#define OMAP2_MCBSP1_CLKS_MASK (1 << 2) 162#define OMAP2_MCBSP1_CLKS_MASK (1 << 2)
160 163
161/* CONTROL_DEVCONF1 bits */ 164/* CONTROL_DEVCONF1 bits */
165#define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 << 31)
166#define OMAP2_MMCSDIO2ADPCLKISEL (1 << 6) /* MMC2 loop back clock */
162#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ 167#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */
163#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ 168#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */
164#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ 169#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */
@@ -172,6 +177,18 @@
172#define OMAP2_SYSBOOT_1_MASK (1 << 1) 177#define OMAP2_SYSBOOT_1_MASK (1 << 1)
173#define OMAP2_SYSBOOT_0_MASK (1 << 0) 178#define OMAP2_SYSBOOT_0_MASK (1 << 0)
174 179
180/* CONTROL_PBIAS_LITE bits */
181#define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15)
182#define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11)
183#define OMAP343X_PBIASSPEEDCTRL1 (1 << 10)
184#define OMAP343X_PBIASLITEPWRDNZ1 (1 << 9)
185#define OMAP343X_PBIASLITEVMODE1 (1 << 8)
186#define OMAP343X_PBIASLITESUPPLY_HIGH0 (1 << 7)
187#define OMAP343X_PBIASLITEVMODEERROR0 (1 << 3)
188#define OMAP2_PBIASSPEEDCTRL0 (1 << 2)
189#define OMAP2_PBIASLITEPWRDNZ0 (1 << 1)
190#define OMAP2_PBIASLITEVMODE0 (1 << 0)
191
175#ifndef __ASSEMBLY__ 192#ifndef __ASSEMBLY__
176#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 193#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
177extern void __iomem *omap_ctrl_base_get(void); 194extern void __iomem *omap_ctrl_base_get(void);
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index e0464187209d..b2062f1175de 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -28,13 +28,18 @@
28 28
29struct omap_chip_id { 29struct omap_chip_id {
30 u8 oc; 30 u8 oc;
31 u8 type;
31}; 32};
32 33
33#define OMAP_CHIP_INIT(x) { .oc = x } 34#define OMAP_CHIP_INIT(x) { .oc = x }
34 35
35extern unsigned int system_rev; 36/*
36 37 * omap_rev bits:
37#define omap2_cpu_rev() ((system_rev >> 12) & 0x0f) 38 * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
39 * CPU revision (See _REV_ defined in cpu.h) [15:08]
40 * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
41 */
42unsigned int omap_rev(void);
38 43
39/* 44/*
40 * Test if multicore OMAP support is needed 45 * Test if multicore OMAP support is needed
@@ -108,7 +113,7 @@ extern unsigned int system_rev;
108 * cpu_is_omap243x(): True for OMAP2430 113 * cpu_is_omap243x(): True for OMAP2430
109 * cpu_is_omap343x(): True for OMAP3430 114 * cpu_is_omap343x(): True for OMAP3430
110 */ 115 */
111#define GET_OMAP_CLASS ((system_rev >> 24) & 0xff) 116#define GET_OMAP_CLASS (omap_rev() & 0xff)
112 117
113#define IS_OMAP_CLASS(class, id) \ 118#define IS_OMAP_CLASS(class, id) \
114static inline int is_omap ##class (void) \ 119static inline int is_omap ##class (void) \
@@ -116,7 +121,7 @@ static inline int is_omap ##class (void) \
116 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ 121 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
117} 122}
118 123
119#define GET_OMAP_SUBCLASS ((system_rev >> 20) & 0x0fff) 124#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
120 125
121#define IS_OMAP_SUBCLASS(subclass, id) \ 126#define IS_OMAP_SUBCLASS(subclass, id) \
122static inline int is_omap ##subclass (void) \ 127static inline int is_omap ##subclass (void) \
@@ -226,7 +231,7 @@ IS_OMAP_SUBCLASS(343x, 0x343)
226 * cpu_is_omap2430(): True for OMAP2430 231 * cpu_is_omap2430(): True for OMAP2430
227 * cpu_is_omap3430(): True for OMAP3430 232 * cpu_is_omap3430(): True for OMAP3430
228 */ 233 */
229#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff) 234#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
230 235
231#define IS_OMAP_TYPE(type, id) \ 236#define IS_OMAP_TYPE(type, id) \
232static inline int is_omap ##type (void) \ 237static inline int is_omap ##type (void) \
@@ -320,44 +325,20 @@ IS_OMAP_TYPE(3430, 0x3430)
320#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx()) 325#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
321 326
322#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 327#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
323/*
324 * Macros to detect silicon revision of OMAP2/3 processors.
325 * is_sil_rev_greater_than: true if passed cpu type & its rev is greater.
326 * is_sil_rev_lesser_than: true if passed cpu type & its rev is lesser.
327 * is_sil_rev_equal_to: true if passed cpu type & its rev is equal.
328 * get_sil_rev: return the silicon rev value.
329 */
330#define get_sil_omap_type(rev) ((rev & 0xffff0000) >> 16)
331#define get_sil_revision(rev) ((rev & 0x0000f000) >> 12)
332 328
333#define is_sil_rev_greater_than(rev) \ 329/* Various silicon revisions for omap2 */
334 ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ 330#define OMAP242X_CLASS 0x24200024
335 (get_sil_revision(system_rev) > get_sil_revision(rev))) 331#define OMAP2420_REV_ES1_0 0x24200024
332#define OMAP2420_REV_ES2_0 0x24201024
336 333
337#define is_sil_rev_less_than(rev) \ 334#define OMAP243X_CLASS 0x24300024
338 ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ 335#define OMAP2430_REV_ES1_0 0x24300024
339 (get_sil_revision(system_rev) < get_sil_revision(rev)))
340 336
341#define is_sil_rev_equal_to(rev) \ 337#define OMAP343X_CLASS 0x34300034
342 ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ 338#define OMAP3430_REV_ES1_0 0x34300034
343 (get_sil_revision(system_rev) == get_sil_revision(rev))) 339#define OMAP3430_REV_ES2_0 0x34301034
344 340#define OMAP3430_REV_ES2_1 0x34302034
345#define get_sil_rev() \ 341#define OMAP3430_REV_ES3_0 0x34303034
346 get_sil_revision(system_rev)
347
348/* Various silicon macros defined here */
349#define OMAP242X_CLASS 0x24200000
350#define OMAP2420_REV_ES1_0 0x24200000
351#define OMAP2420_REV_ES2_0 0x24201000
352
353#define OMAP243X_CLASS 0x24300000
354#define OMAP2430_REV_ES1_0 0x24300000
355
356#define OMAP343X_CLASS 0x34300000
357#define OMAP3430_REV_ES1_0 0x34300000
358#define OMAP3430_REV_ES2_0 0x34301000
359#define OMAP3430_REV_ES2_1 0x34302000
360#define OMAP3430_REV_ES2_2 0x34303000
361 342
362/* 343/*
363 * omap_chip bits 344 * omap_chip bits
@@ -382,23 +363,16 @@ IS_OMAP_TYPE(3430, 0x3430)
382#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) 363#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
383 364
384int omap_chip_is(struct omap_chip_id oci); 365int omap_chip_is(struct omap_chip_id oci);
385 366int omap_type(void);
386 367
387/* 368/*
388 * Macro to detect device type i.e. EMU/HS/TST/GP/BAD 369 * Macro to detect device type i.e. EMU/HS/TST/GP/BAD
389 */ 370 */
390#define DEVICE_TYPE_TEST 0 371#define OMAP2_DEVICE_TYPE_TEST 0
391#define DEVICE_TYPE_EMU 1 372#define OMAP2_DEVICE_TYPE_EMU 1
392#define DEVICE_TYPE_SEC 2 373#define OMAP2_DEVICE_TYPE_SEC 2
393#define DEVICE_TYPE_GP 3 374#define OMAP2_DEVICE_TYPE_GP 3
394#define DEVICE_TYPE_BAD 4 375#define OMAP2_DEVICE_TYPE_BAD 4
395
396#define get_device_type() ((system_rev & 0x700) >> 8)
397#define is_device_type_test() (get_device_type() == DEVICE_TYPE_TEST)
398#define is_device_type_emu() (get_device_type() == DEVICE_TYPE_EMU)
399#define is_device_type_sec() (get_device_type() == DEVICE_TYPE_SEC)
400#define is_device_type_gp() (get_device_type() == DEVICE_TYPE_GP)
401#define is_device_type_bad() (get_device_type() == DEVICE_TYPE_BAD)
402 376
403void omap2_check_revision(void); 377void omap2_check_revision(void);
404 378
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 98e9008b7e9d..04e68e88f134 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -71,11 +71,6 @@
71 IH_GPIO_BASE + (nr)) 71 IH_GPIO_BASE + (nr))
72 72
73extern int omap_gpio_init(void); /* Call from board init only */ 73extern int omap_gpio_init(void); /* Call from board init only */
74extern int omap_request_gpio(int gpio);
75extern void omap_free_gpio(int gpio);
76extern void omap_set_gpio_direction(int gpio, int is_input);
77extern void omap_set_gpio_dataout(int gpio, int enable);
78extern int omap_get_gpio_datain(int gpio);
79extern void omap2_gpio_prepare_for_retention(void); 74extern void omap2_gpio_prepare_for_retention(void);
80extern void omap2_gpio_resume_after_retention(void); 75extern void omap2_gpio_resume_after_retention(void);
81extern void omap_set_gpio_debounce(int gpio, int enable); 76extern void omap_set_gpio_debounce(int gpio, int enable);
@@ -92,6 +87,16 @@ extern void omap_set_gpio_debounce_time(int gpio, int enable);
92#include <linux/errno.h> 87#include <linux/errno.h>
93#include <asm-generic/gpio.h> 88#include <asm-generic/gpio.h>
94 89
90static inline int omap_request_gpio(int gpio)
91{
92 return gpio_request(gpio, "FIXME");
93}
94
95static inline void omap_free_gpio(int gpio)
96{
97 gpio_free(gpio);
98}
99
95static inline int gpio_get_value(unsigned gpio) 100static inline int gpio_get_value(unsigned gpio)
96{ 101{
97 return __gpio_get_value(gpio); 102 return __gpio_get_value(gpio);
@@ -109,16 +114,24 @@ static inline int gpio_cansleep(unsigned gpio)
109 114
110static inline int gpio_to_irq(unsigned gpio) 115static inline int gpio_to_irq(unsigned gpio)
111{ 116{
112 if (gpio < (OMAP_MAX_GPIO_LINES + 16)) 117 return __gpio_to_irq(gpio);
113 return OMAP_GPIO_IRQ(gpio);
114 return -EINVAL;
115} 118}
116 119
117static inline int irq_to_gpio(unsigned irq) 120static inline int irq_to_gpio(unsigned irq)
118{ 121{
122 int tmp;
123
124 /* omap1 SOC mpuio */
119 if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16))) 125 if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
120 return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES; 126 return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
121 return irq - IH_GPIO_BASE; 127
128 /* SOC gpio */
129 tmp = irq - IH_GPIO_BASE;
130 if (tmp < OMAP_MAX_GPIO_LINES)
131 return tmp;
132
133 /* we don't supply reverse mappings for non-SOC gpios */
134 return -EIO;
122} 135}
123 136
124#endif 137#endif
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index adc83b7b8205..d92bf7964481 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -42,8 +42,8 @@
42 * We don't actually have real ISA nor PCI buses, but there is so many 42 * We don't actually have real ISA nor PCI buses, but there is so many
43 * drivers out there that might just work if we fake them... 43 * drivers out there that might just work if we fake them...
44 */ 44 */
45#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) 45#define __io(a) __typesafe_io(a)
46#define __mem_pci(a) (a) 46#define __mem_pci(a) (a)
47 47
48/* 48/*
49 * ---------------------------------------------------------------------------- 49 * ----------------------------------------------------------------------------
@@ -51,8 +51,6 @@
51 * ---------------------------------------------------------------------------- 51 * ----------------------------------------------------------------------------
52 */ 52 */
53 53
54#define PCIO_BASE 0
55
56#if defined(CONFIG_ARCH_OMAP1) 54#if defined(CONFIG_ARCH_OMAP1)
57 55
58#define IO_PHYS 0xFFFB0000 56#define IO_PHYS 0xFFFB0000
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index d40cac60b959..211c9f6619e9 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -43,18 +43,7 @@
43#endif 43#endif
44 44
45/* 45/*
46 * Conversion between SDRAM and fake PCI bus, used by USB
47 * NOTE: Physical address must be converted to Local Bus address
48 * on OMAP-1510 only
49 */
50
51/*
52 * Bus address is physical address, except for OMAP-1510 Local Bus. 46 * Bus address is physical address, except for OMAP-1510 Local Bus.
53 */
54#define __virt_to_bus(x) __virt_to_phys(x)
55#define __bus_to_virt(x) __phys_to_virt(x)
56
57/*
58 * OMAP-1510 bus address is translated into a Local Bus address if the 47 * OMAP-1510 bus address is translated into a Local Bus address if the
59 * OMAP bus type is lbus. We do the address translation based on the 48 * OMAP bus type is lbus. We do the address translation based on the
60 * device overriding the defaults used in the dma-mapping API. 49 * device overriding the defaults used in the dma-mapping API.
@@ -74,16 +63,16 @@
74 63
75#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ 64#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \
76 (dma_addr_t)virt_to_lbus(page_address(page)) : \ 65 (dma_addr_t)virt_to_lbus(page_address(page)) : \
77 (dma_addr_t)__virt_to_bus(page_address(page));}) 66 (dma_addr_t)__virt_to_phys(page_address(page));})
78 67
79#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ 68#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \
80 lbus_to_virt(addr) : \ 69 lbus_to_virt(addr) : \
81 __bus_to_virt(addr)); }) 70 __phys_to_virt(addr)); })
82 71
83#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ 72#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \
84 (dma_addr_t) (is_lbus_device(dev) ? \ 73 (dma_addr_t) (is_lbus_device(dev) ? \
85 virt_to_lbus(__addr) : \ 74 virt_to_lbus(__addr) : \
86 __virt_to_bus(__addr)); }) 75 __virt_to_phys(__addr)); })
87 76
88#endif /* CONFIG_ARCH_OMAP15XX */ 77#endif /* CONFIG_ARCH_OMAP15XX */
89 78
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index fc15d13058fc..031250f02805 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -17,12 +17,28 @@
17 17
18#include <mach/board.h> 18#include <mach/board.h>
19 19
20#define OMAP15XX_NR_MMC 1
21#define OMAP16XX_NR_MMC 2
22#define OMAP1_MMC_SIZE 0x080
23#define OMAP1_MMC1_BASE 0xfffb7800
24#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */
25
26#define OMAP24XX_NR_MMC 2
27#define OMAP34XX_NR_MMC 3
28#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
29#define HSMMC_SIZE 0x200
30#define OMAP2_MMC1_BASE 0x4809c000
31#define OMAP2_MMC2_BASE 0x480b4000
32#define OMAP3_MMC3_BASE 0x480ad000
33#define HSMMC3 (1 << 2)
34#define HSMMC2 (1 << 1)
35#define HSMMC1 (1 << 0)
36
20#define OMAP_MMC_MAX_SLOTS 2 37#define OMAP_MMC_MAX_SLOTS 2
21 38
22struct omap_mmc_platform_data { 39struct omap_mmc_platform_data {
23 struct omap_mmc_conf conf;
24 40
25 /* number of slots on board */ 41 /* number of slots per controller */
26 unsigned nr_slots:2; 42 unsigned nr_slots:2;
27 43
28 /* set if your board has components or wiring that limits the 44 /* set if your board has components or wiring that limits the
@@ -41,7 +57,31 @@ struct omap_mmc_platform_data {
41 int (*suspend)(struct device *dev, int slot); 57 int (*suspend)(struct device *dev, int slot);
42 int (*resume)(struct device *dev, int slot); 58 int (*resume)(struct device *dev, int slot);
43 59
60 u64 dma_mask;
61
44 struct omap_mmc_slot_data { 62 struct omap_mmc_slot_data {
63
64 /* 4 wire signaling is optional, and is used for SD/SDIO/HSMMC;
65 * 8 wire signaling is also optional, and is used with HSMMC
66 */
67 u8 wires;
68
69 /*
70 * nomux means "standard" muxing is wrong on this board, and
71 * that board-specific code handled it before common init logic.
72 */
73 unsigned nomux:1;
74
75 /* switch pin can be for card detect (default) or card cover */
76 unsigned cover:1;
77
78 /* use the internal clock */
79 unsigned internal_clock:1;
80 s16 power_pin;
81
82 int switch_pin; /* gpio (card detect) */
83 int gpio_wp; /* gpio (write protect) */
84
45 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); 85 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
46 int (* set_power)(struct device *dev, int slot, int power_on, int vdd); 86 int (* set_power)(struct device *dev, int slot, int power_on, int vdd);
47 int (* get_ro)(struct device *dev, int slot); 87 int (* get_ro)(struct device *dev, int slot);
@@ -49,8 +89,8 @@ struct omap_mmc_platform_data {
49 /* return MMC cover switch state, can be NULL if not supported. 89 /* return MMC cover switch state, can be NULL if not supported.
50 * 90 *
51 * possible return values: 91 * possible return values:
52 * 0 - open 92 * 0 - closed
53 * 1 - closed 93 * 1 - open
54 */ 94 */
55 int (* get_cover_state)(struct device *dev, int slot); 95 int (* get_cover_state)(struct device *dev, int slot);
56 96
@@ -66,9 +106,31 @@ struct omap_mmc_platform_data {
66 } slots[OMAP_MMC_MAX_SLOTS]; 106 } slots[OMAP_MMC_MAX_SLOTS];
67}; 107};
68 108
69extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info);
70
71/* called from board-specific card detection service routine */ 109/* called from board-specific card detection service routine */
72extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); 110extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed);
73 111
112#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
113 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
114void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
115 int nr_controllers);
116void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
117 int nr_controllers);
118int omap_mmc_add(int id, unsigned long base, unsigned long size,
119 unsigned int irq, struct omap_mmc_platform_data *data);
120#else
121static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
122 int nr_controllers)
123{
124}
125static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
126 int nr_controllers)
127{
128}
129static inline int omap_mmc_add(int id, unsigned long base, unsigned long size,
130 unsigned int irq, struct omap_mmc_platform_data *data)
131{
132 return 0;
133}
134
135#endif
74#endif 136#endif
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 6bbf1789bed5..f4362b8682c7 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -632,6 +632,15 @@ enum omap24xx_index {
632 AC7_2430_USB0HS_DATA7, 632 AC7_2430_USB0HS_DATA7,
633 633
634 /* 2430 McBSP */ 634 /* 2430 McBSP */
635 AD6_2430_MCBSP_CLKS,
636
637 AB2_2430_MCBSP1_CLKR,
638 AD5_2430_MCBSP1_FSR,
639 AA1_2430_MCBSP1_DX,
640 AF3_2430_MCBSP1_DR,
641 AB3_2430_MCBSP1_FSX,
642 Y9_2430_MCBSP1_CLKX,
643
635 AC10_2430_MCBSP2_FSX, 644 AC10_2430_MCBSP2_FSX,
636 AD16_2430_MCBSP2_CLX, 645 AD16_2430_MCBSP2_CLX,
637 AE13_2430_MCBSP2_DX, 646 AE13_2430_MCBSP2_DX,
@@ -641,6 +650,30 @@ enum omap24xx_index {
641 AE13_2430_MCBSP2_DX_OFF, 650 AE13_2430_MCBSP2_DX_OFF,
642 AD13_2430_MCBSP2_DR_OFF, 651 AD13_2430_MCBSP2_DR_OFF,
643 652
653 AC9_2430_MCBSP3_CLKX,
654 AE4_2430_MCBSP3_FSX,
655 AE2_2430_MCBSP3_DR,
656 AF4_2430_MCBSP3_DX,
657
658 N3_2430_MCBSP4_CLKX,
659 AD23_2430_MCBSP4_DR,
660 AB25_2430_MCBSP4_DX,
661 AC25_2430_MCBSP4_FSX,
662
663 AE16_2430_MCBSP5_CLKX,
664 AF12_2430_MCBSP5_FSX,
665 K7_2430_MCBSP5_DX,
666 M1_2430_MCBSP5_DR,
667
668 /* 2430 McSPI*/
669 Y18_2430_MCSPI1_CLK,
670 AD15_2430_MCSPI1_SIMO,
671 AE17_2430_MCSPI1_SOMI,
672 U1_2430_MCSPI1_CS0,
673
674 /* Touchscreen GPIO */
675 AF19_2430_GPIO_85,
676
644}; 677};
645 678
646enum omap34xx_index { 679enum omap34xx_index {
@@ -749,6 +782,14 @@ enum omap34xx_index {
749 AD2_3430_USB3FS_PHY_MM3_TXDAT, 782 AD2_3430_USB3FS_PHY_MM3_TXDAT,
750 AC1_3430_USB3FS_PHY_MM3_TXEN_N, 783 AC1_3430_USB3FS_PHY_MM3_TXEN_N,
751 784
785 /* 34xx GPIO
786 * - normally these are bidirectional, no internal pullup/pulldown
787 * - "_UP" suffix (GPIO3_UP) if internal pullup is configured
788 * - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown
789 * - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx)
790 */
791 AH8_34XX_GPIO29,
792 J25_34XX_GPIO170,
752}; 793};
753 794
754struct omap_mux_cfg { 795struct omap_mux_cfg {