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-rw-r--r--arch/arm/plat-omap/include/mach/control.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index dc9886760577..269147f3836f 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -74,6 +74,7 @@
74#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) 74#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190)
75#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) 75#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194)
76#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) 76#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198)
77#define OMAP243X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x0230)
77 78
78/* 24xx-only CONTROL_GENERAL register offsets */ 79/* 24xx-only CONTROL_GENERAL register offsets */
79#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) 80#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000)
@@ -140,6 +141,7 @@
140#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) 141#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc)
141#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) 142#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190)
142#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) 143#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194)
144#define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0)
143#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) 145#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4)
144 146
145/* 147/*
@@ -154,11 +156,14 @@
154 * and the security mode (secure, non-secure, don't care) 156 * and the security mode (secure, non-secure, don't care)
155 */ 157 */
156/* CONTROL_DEVCONF0 bits */ 158/* CONTROL_DEVCONF0 bits */
159#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */
157#define OMAP24XX_USBSTANDBYCTRL (1 << 15) 160#define OMAP24XX_USBSTANDBYCTRL (1 << 15)
158#define OMAP2_MCBSP2_CLKS_MASK (1 << 6) 161#define OMAP2_MCBSP2_CLKS_MASK (1 << 6)
159#define OMAP2_MCBSP1_CLKS_MASK (1 << 2) 162#define OMAP2_MCBSP1_CLKS_MASK (1 << 2)
160 163
161/* CONTROL_DEVCONF1 bits */ 164/* CONTROL_DEVCONF1 bits */
165#define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 << 31)
166#define OMAP2_MMCSDIO2ADPCLKISEL (1 << 6) /* MMC2 loop back clock */
162#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ 167#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */
163#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ 168#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */
164#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ 169#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */
@@ -172,6 +177,18 @@
172#define OMAP2_SYSBOOT_1_MASK (1 << 1) 177#define OMAP2_SYSBOOT_1_MASK (1 << 1)
173#define OMAP2_SYSBOOT_0_MASK (1 << 0) 178#define OMAP2_SYSBOOT_0_MASK (1 << 0)
174 179
180/* CONTROL_PBIAS_LITE bits */
181#define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15)
182#define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11)
183#define OMAP343X_PBIASSPEEDCTRL1 (1 << 10)
184#define OMAP343X_PBIASLITEPWRDNZ1 (1 << 9)
185#define OMAP343X_PBIASLITEVMODE1 (1 << 8)
186#define OMAP343X_PBIASLITESUPPLY_HIGH0 (1 << 7)
187#define OMAP343X_PBIASLITEVMODEERROR0 (1 << 3)
188#define OMAP2_PBIASSPEEDCTRL0 (1 << 2)
189#define OMAP2_PBIASLITEPWRDNZ0 (1 << 1)
190#define OMAP2_PBIASLITEVMODE0 (1 << 0)
191
175#ifndef __ASSEMBLY__ 192#ifndef __ASSEMBLY__
176#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 193#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
177extern void __iomem *omap_ctrl_base_get(void); 194extern void __iomem *omap_ctrl_base_get(void);