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-rw-r--r--arch/arm/plat-omap/include/mach/board-2430sdp.h41
-rw-r--r--arch/arm/plat-omap/include/mach/board-apollon.h46
-rw-r--r--arch/arm/plat-omap/include/mach/board-fsample.h51
-rw-r--r--arch/arm/plat-omap/include/mach/board-h2.h41
-rw-r--r--arch/arm/plat-omap/include/mach/board-h3.h38
-rw-r--r--arch/arm/plat-omap/include/mach/board-h4.h38
-rw-r--r--arch/arm/plat-omap/include/mach/board-innovator.h52
-rw-r--r--arch/arm/plat-omap/include/mach/board-ldp.h39
-rw-r--r--arch/arm/plat-omap/include/mach/board-nokia.h54
-rw-r--r--arch/arm/plat-omap/include/mach/board-omap3beagle.h33
-rw-r--r--arch/arm/plat-omap/include/mach/board-osk.h47
-rw-r--r--arch/arm/plat-omap/include/mach/board-overo.h26
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmte.h32
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmtt.h23
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmz71.h26
-rw-r--r--arch/arm/plat-omap/include/mach/board-perseus2.h39
-rw-r--r--arch/arm/plat-omap/include/mach/board-voiceblue.h1
-rw-r--r--arch/arm/plat-omap/include/mach/board.h4
-rw-r--r--arch/arm/plat-omap/include/mach/clkdev.h13
-rw-r--r--arch/arm/plat-omap/include/mach/clock.h80
-rw-r--r--arch/arm/plat-omap/include/mach/clockdomain.h24
-rw-r--r--arch/arm/plat-omap/include/mach/common.h2
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h61
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h3
-rw-r--r--arch/arm/plat-omap/include/mach/gpmc.h2
-rw-r--r--arch/arm/plat-omap/include/mach/hardware.h74
-rw-r--r--arch/arm/plat-omap/include/mach/io.h4
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h83
-rw-r--r--arch/arm/plat-omap/include/mach/mailbox.h27
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h6
-rw-r--r--arch/arm/plat-omap/include/mach/memory.h8
-rw-r--r--arch/arm/plat-omap/include/mach/mmc.h2
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h65
-rw-r--r--arch/arm/plat-omap/include/mach/omap34xx.h28
-rw-r--r--arch/arm/plat-omap/include/mach/omap850.h102
-rw-r--r--arch/arm/plat-omap/include/mach/pm.h12
-rw-r--r--arch/arm/plat-omap/include/mach/powerdomain.h5
-rw-r--r--arch/arm/plat-omap/include/mach/prcm.h5
-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h64
-rw-r--r--arch/arm/plat-omap/include/mach/system.h8
-rw-r--r--arch/arm/plat-omap/include/mach/usb.h10
41 files changed, 510 insertions, 809 deletions
diff --git a/arch/arm/plat-omap/include/mach/board-2430sdp.h b/arch/arm/plat-omap/include/mach/board-2430sdp.h
deleted file mode 100644
index 10d449ea7ed0..000000000000
--- a/arch/arm/plat-omap/include/mach/board-2430sdp.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-2430sdp.h
3 *
4 * Hardware definitions for TI OMAP2430 SDP board.
5 *
6 * Based on board-h4.h by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_2430SDP_H
30#define __ASM_ARCH_OMAP_2430SDP_H
31
32/* Placeholder for 2430SDP specific defines */
33#define OMAP24XX_ETHR_START 0x08000300
34#define OMAP24XX_ETHR_GPIO_IRQ 149
35#define SDP2430_CS0_BASE 0x04000000
36
37/* Function prototypes */
38extern void sdp2430_flash_init(void);
39extern void sdp2430_usb_init(void);
40
41#endif /* __ASM_ARCH_OMAP_2430SDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h
deleted file mode 100644
index 61bd5e8f09b1..000000000000
--- a/arch/arm/plat-omap/include/mach/board-apollon.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-apollon.h
3 *
4 * Hardware definitions for Samsung OMAP24XX Apollon board.
5 *
6 * Initial creation by Kyungmin Park <kyungmin.park@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_APOLLON_H
30#define __ASM_ARCH_OMAP_APOLLON_H
31
32#include <mach/cpu.h>
33
34extern void apollon_mmc_init(void);
35
36static inline int apollon_plus(void)
37{
38 /* The apollon plus has IDCODE revision 5 */
39 return omap_rev() & 0xc0;
40}
41
42/* Placeholder for APOLLON specific defines */
43#define APOLLON_ETHR_GPIO_IRQ 74
44
45#endif /* __ASM_ARCH_OMAP_APOLLON_H */
46
diff --git a/arch/arm/plat-omap/include/mach/board-fsample.h b/arch/arm/plat-omap/include/mach/board-fsample.h
deleted file mode 100644
index cb3c5ae12776..000000000000
--- a/arch/arm/plat-omap/include/mach/board-fsample.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-fsample.h
3 *
4 * Board-specific goodies for TI F-Sample.
5 *
6 * Copyright (C) 2006 Google, Inc.
7 * Author: Brian Swetland <swetland@google.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_OMAP_FSAMPLE_H
15#define __ASM_ARCH_OMAP_FSAMPLE_H
16
17/* fsample is pretty close to p2-sample */
18#include <mach/board-perseus2.h>
19
20#define fsample_cpld_read(reg) __raw_readb(reg)
21#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
22
23#define FSAMPLE_CPLD_BASE 0xE8100000
24#define FSAMPLE_CPLD_SIZE SZ_4K
25#define FSAMPLE_CPLD_START 0x05080000
26
27#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
28#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
29#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
30#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
31#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
32#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
33
34#define FSAMPLE_CPLD_BIT_BT_RESET 0
35#define FSAMPLE_CPLD_BIT_LCD_RESET 1
36#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
37#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
38#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
39#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
40#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
41#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
42#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
43#define FSAMPLE_CPLD_BIT_OTG_RESET 9
44
45#define fsample_cpld_set(bit) \
46 fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
47
48#define fsample_cpld_clear(bit) \
49 fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
50
51#endif
diff --git a/arch/arm/plat-omap/include/mach/board-h2.h b/arch/arm/plat-omap/include/mach/board-h2.h
deleted file mode 100644
index 15531c8dc0e6..000000000000
--- a/arch/arm/plat-omap/include/mach/board-h2.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-h2.h
3 *
4 * Hardware definitions for TI OMAP1610 H2 board.
5 *
6 * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_H2_H
30#define __ASM_ARCH_OMAP_H2_H
31
32/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
33#define OMAP1610_ETHR_START 0x04000300
34
35#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
36# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3)
37
38extern void h2_mmc_init(void);
39
40#endif /* __ASM_ARCH_OMAP_H2_H */
41
diff --git a/arch/arm/plat-omap/include/mach/board-h3.h b/arch/arm/plat-omap/include/mach/board-h3.h
deleted file mode 100644
index 1888326da7ea..000000000000
--- a/arch/arm/plat-omap/include/mach/board-h3.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-h3.h
3 *
4 * Copyright (C) 2001 RidgeRun, Inc.
5 * Copyright (C) 2004 Texas Instruments, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#ifndef __ASM_ARCH_OMAP_H3_H
28#define __ASM_ARCH_OMAP_H3_H
29
30/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
31#define OMAP1710_ETHR_START 0x04000300
32
33#define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
34# define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4)
35
36extern void h3_mmc_init(void);
37
38#endif /* __ASM_ARCH_OMAP_H3_H */
diff --git a/arch/arm/plat-omap/include/mach/board-h4.h b/arch/arm/plat-omap/include/mach/board-h4.h
deleted file mode 100644
index 7c3fa0f0a65e..000000000000
--- a/arch/arm/plat-omap/include/mach/board-h4.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-h4.h
3 *
4 * Hardware definitions for TI OMAP2420 H4 board.
5 *
6 * Initial creation by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_H4_H
30#define __ASM_ARCH_OMAP_H4_H
31
32/* MMC Prototypes */
33extern void h4_mmc_init(void);
34
35/* Placeholder for H4 specific defines */
36#define OMAP24XX_ETHR_GPIO_IRQ 92
37#endif /* __ASM_ARCH_OMAP_H4_H */
38
diff --git a/arch/arm/plat-omap/include/mach/board-innovator.h b/arch/arm/plat-omap/include/mach/board-innovator.h
deleted file mode 100644
index 5ae3e79b9f9c..000000000000
--- a/arch/arm/plat-omap/include/mach/board-innovator.h
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-innovator.h
3 *
4 * Copyright (C) 2001 RidgeRun, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#ifndef __ASM_ARCH_OMAP_INNOVATOR_H
27#define __ASM_ARCH_OMAP_INNOVATOR_H
28
29#if defined (CONFIG_ARCH_OMAP15XX)
30
31#ifndef OMAP_SDRAM_DEVICE
32#define OMAP_SDRAM_DEVICE D256M_1X16_4B
33#endif
34
35#define OMAP1510P1_IMIF_PRI_VALUE 0x00
36#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
37#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
38
39#ifndef __ASSEMBLY__
40void fpga_write(unsigned char val, int reg);
41unsigned char fpga_read(int reg);
42#endif
43
44#endif /* CONFIG_ARCH_OMAP15XX */
45
46#if defined (CONFIG_ARCH_OMAP16XX)
47
48/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
49#define INNOVATOR1610_ETHR_START 0x04000300
50
51#endif /* CONFIG_ARCH_OMAP1610 */
52#endif /* __ASM_ARCH_OMAP_INNOVATOR_H */
diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h
deleted file mode 100644
index f23399665212..000000000000
--- a/arch/arm/plat-omap/include/mach/board-ldp.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-ldp.h
3 *
4 * Hardware definitions for TI OMAP3 LDP.
5 *
6 * Copyright (C) 2008 Texas Instruments Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_LDP_H
30#define __ASM_ARCH_OMAP_LDP_H
31
32extern void twl4030_bci_battery_init(void);
33
34#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ
35#define LDP_SMC911X_CS 1
36#define LDP_SMC911X_GPIO 152
37#define DEBUG_BASE 0x08000000
38#define OMAP34XX_ETHR_START DEBUG_BASE
39#endif /* __ASM_ARCH_OMAP_LDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board-nokia.h b/arch/arm/plat-omap/include/mach/board-nokia.h
deleted file mode 100644
index 2abbe001af8c..000000000000
--- a/arch/arm/plat-omap/include/mach/board-nokia.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-nokia.h
3 *
4 * Information structures for Nokia-specific board config data
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 */
8
9#ifndef _OMAP_BOARD_NOKIA_H
10#define _OMAP_BOARD_NOKIA_H
11
12#include <linux/types.h>
13
14#define OMAP_TAG_NOKIA_BT 0x4e01
15#define OMAP_TAG_WLAN_CX3110X 0x4e02
16#define OMAP_TAG_CBUS 0x4e03
17#define OMAP_TAG_EM_ASIC_BB5 0x4e04
18
19
20#define BT_CHIP_CSR 1
21#define BT_CHIP_TI 2
22
23#define BT_SYSCLK_12 1
24#define BT_SYSCLK_38_4 2
25
26struct omap_bluetooth_config {
27 u8 chip_type;
28 u8 bt_wakeup_gpio;
29 u8 host_wakeup_gpio;
30 u8 reset_gpio;
31 u8 bt_uart;
32 u8 bd_addr[6];
33 u8 bt_sysclk;
34};
35
36struct omap_wlan_cx3110x_config {
37 u8 chip_type;
38 s16 power_gpio;
39 s16 irq_gpio;
40 s16 spi_cs_gpio;
41};
42
43struct omap_cbus_config {
44 s16 clk_gpio;
45 s16 dat_gpio;
46 s16 sel_gpio;
47};
48
49struct omap_em_asic_bb5_config {
50 s16 retu_irq_gpio;
51 s16 tahvo_irq_gpio;
52};
53
54#endif
diff --git a/arch/arm/plat-omap/include/mach/board-omap3beagle.h b/arch/arm/plat-omap/include/mach/board-omap3beagle.h
deleted file mode 100644
index 3080d52d877a..000000000000
--- a/arch/arm/plat-omap/include/mach/board-omap3beagle.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-omap3beagle.h
3 *
4 * Hardware definitions for TI OMAP3 BEAGLE.
5 *
6 * Initial creation by Syed Mohammed Khasim <khasim@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP3_BEAGLE_H
30#define __ASM_ARCH_OMAP3_BEAGLE_H
31
32#endif /* __ASM_ARCH_OMAP3_BEAGLE_H */
33
diff --git a/arch/arm/plat-omap/include/mach/board-osk.h b/arch/arm/plat-omap/include/mach/board-osk.h
deleted file mode 100644
index 3850cb1f220a..000000000000
--- a/arch/arm/plat-omap/include/mach/board-osk.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-osk.h
3 *
4 * Hardware definitions for TI OMAP5912 OSK board.
5 *
6 * Written by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_OSK_H
30#define __ASM_ARCH_OMAP_OSK_H
31
32/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
33#define OMAP_OSK_ETHR_START 0x04800300
34
35/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with
36 * alternate pin configurations for hardware-controlled blinking.
37 */
38#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
39# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0)
40# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1)
41# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2)
42# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3)
43# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4)
44# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5)
45
46#endif /* __ASM_ARCH_OMAP_OSK_H */
47
diff --git a/arch/arm/plat-omap/include/mach/board-overo.h b/arch/arm/plat-omap/include/mach/board-overo.h
deleted file mode 100644
index 7ecae66966d1..000000000000
--- a/arch/arm/plat-omap/include/mach/board-overo.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * board-overo.h (Gumstix Overo)
3 *
4 * Initial code: Steve Sakoman <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 675 Mass Ave, Cambridge, MA 02139, USA.
14 */
15
16#ifndef __ASM_ARCH_OVERO_H
17#define __ASM_ARCH_OVERO_H
18
19#define OVERO_GPIO_BT_XGATE 15
20#define OVERO_GPIO_W2W_NRESET 16
21#define OVERO_GPIO_BT_NRESET 164
22#define OVERO_GPIO_USBH_CPEN 168
23#define OVERO_GPIO_USBH_NRESET 183
24
25#endif /* ____ASM_ARCH_OVERO_H */
26
diff --git a/arch/arm/plat-omap/include/mach/board-palmte.h b/arch/arm/plat-omap/include/mach/board-palmte.h
deleted file mode 100644
index 6906cdebbcfb..000000000000
--- a/arch/arm/plat-omap/include/mach/board-palmte.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-palmte.h
3 *
4 * Hardware definitions for the Palm Tungsten E device.
5 *
6 * Maintainters : http://palmtelinux.sf.net
7 * palmtelinux-developpers@lists.sf.net
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __OMAP_BOARD_PALMTE_H
15#define __OMAP_BOARD_PALMTE_H
16
17#define PALMTE_USBDETECT_GPIO 0
18#define PALMTE_USB_OR_DC_GPIO 1
19#define PALMTE_TSC_GPIO 4
20#define PALMTE_PINTDAV_GPIO 6
21#define PALMTE_MMC_WP_GPIO 8
22#define PALMTE_MMC_POWER_GPIO 9
23#define PALMTE_HDQ_GPIO 11
24#define PALMTE_HEADPHONES_GPIO 14
25#define PALMTE_SPEAKER_GPIO 15
26#define PALMTE_DC_GPIO OMAP_MPUIO(2)
27#define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4)
28#define PALMTE_MMC1_GPIO OMAP_MPUIO(6)
29#define PALMTE_MMC2_GPIO OMAP_MPUIO(7)
30#define PALMTE_MMC3_GPIO OMAP_MPUIO(11)
31
32#endif /* __OMAP_BOARD_PALMTE_H */
diff --git a/arch/arm/plat-omap/include/mach/board-palmtt.h b/arch/arm/plat-omap/include/mach/board-palmtt.h
deleted file mode 100644
index e79f382b5931..000000000000
--- a/arch/arm/plat-omap/include/mach/board-palmtt.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-palmte.h
3 *
4 * Hardware definitions for the Palm Tungsten|T device.
5 *
6 * Maintainters : Marek Vasut <marek.vasut@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __OMAP_BOARD_PALMTT_H
14#define __OMAP_BOARD_PALMTT_H
15
16#define PALMTT_USBDETECT_GPIO 0
17#define PALMTT_CABLE_GPIO 1
18#define PALMTT_LED_GPIO 3
19#define PALMTT_PENIRQ_GPIO 6
20#define PALMTT_MMC_WP_GPIO 8
21#define PALMTT_HDQ_GPIO 11
22
23#endif /* __OMAP_BOARD_PALMTT_H */
diff --git a/arch/arm/plat-omap/include/mach/board-palmz71.h b/arch/arm/plat-omap/include/mach/board-palmz71.h
deleted file mode 100644
index b1d7d579b313..000000000000
--- a/arch/arm/plat-omap/include/mach/board-palmz71.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-palmz71.h
3 *
4 * Hardware definitions for the Palm Zire71 device.
5 *
6 * Maintainters : Marek Vasut <marek.vasut@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __OMAP_BOARD_PALMZ71_H
14#define __OMAP_BOARD_PALMZ71_H
15
16#define PALMZ71_USBDETECT_GPIO 0
17#define PALMZ71_PENIRQ_GPIO 6
18#define PALMZ71_MMC_WP_GPIO 8
19#define PALMZ71_HDQ_GPIO 11
20
21#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1)
22#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2)
23#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3)
24#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4)
25
26#endif /* __OMAP_BOARD_PALMZ71_H */
diff --git a/arch/arm/plat-omap/include/mach/board-perseus2.h b/arch/arm/plat-omap/include/mach/board-perseus2.h
deleted file mode 100644
index c06c3d717d57..000000000000
--- a/arch/arm/plat-omap/include/mach/board-perseus2.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-perseus2.h
3 *
4 * Copyright 2003 by Texas Instruments Incorporated
5 * OMAP730 / Perseus2 support by Jean Pihet
6 *
7 * Copyright (C) 2001 RidgeRun, Inc. (http://www.ridgerun.com)
8 * Author: RidgeRun, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#ifndef __ASM_ARCH_OMAP_PERSEUS2_H
31#define __ASM_ARCH_OMAP_PERSEUS2_H
32
33#include <mach/fpga.h>
34
35#ifndef OMAP_SDRAM_DEVICE
36#define OMAP_SDRAM_DEVICE D256M_1X16_4B
37#endif
38
39#endif
diff --git a/arch/arm/plat-omap/include/mach/board-voiceblue.h b/arch/arm/plat-omap/include/mach/board-voiceblue.h
index ed6d346ee123..27916b210f57 100644
--- a/arch/arm/plat-omap/include/mach/board-voiceblue.h
+++ b/arch/arm/plat-omap/include/mach/board-voiceblue.h
@@ -14,7 +14,6 @@
14extern void voiceblue_wdt_enable(void); 14extern void voiceblue_wdt_enable(void);
15extern void voiceblue_wdt_disable(void); 15extern void voiceblue_wdt_disable(void);
16extern void voiceblue_wdt_ping(void); 16extern void voiceblue_wdt_ping(void);
17extern void voiceblue_reset(void);
18 17
19#endif /* __ASM_ARCH_VOICEBLUE_H */ 18#endif /* __ASM_ARCH_VOICEBLUE_H */
20 19
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index 9466772fc7c8..50ea79a0efa2 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -17,7 +17,6 @@
17/* Different peripheral ids */ 17/* Different peripheral ids */
18#define OMAP_TAG_CLOCK 0x4f01 18#define OMAP_TAG_CLOCK 0x4f01
19#define OMAP_TAG_SERIAL_CONSOLE 0x4f03 19#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
20#define OMAP_TAG_USB 0x4f04
21#define OMAP_TAG_LCD 0x4f05 20#define OMAP_TAG_LCD 0x4f05
22#define OMAP_TAG_GPIO_SWITCH 0x4f06 21#define OMAP_TAG_GPIO_SWITCH 0x4f06
23#define OMAP_TAG_UART 0x4f07 22#define OMAP_TAG_UART 0x4f07
@@ -133,9 +132,6 @@ struct omap_version_config {
133 char version[12]; 132 char version[12];
134}; 133};
135 134
136
137#include <mach/board-nokia.h>
138
139struct omap_board_config_entry { 135struct omap_board_config_entry {
140 u16 tag; 136 u16 tag;
141 u16 len; 137 u16 len;
diff --git a/arch/arm/plat-omap/include/mach/clkdev.h b/arch/arm/plat-omap/include/mach/clkdev.h
new file mode 100644
index 000000000000..730c49d1ebd8
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/clkdev.h
@@ -0,0 +1,13 @@
1#ifndef __MACH_CLKDEV_H
2#define __MACH_CLKDEV_H
3
4static inline int __clk_get(struct clk *clk)
5{
6 return 1;
7}
8
9static inline void __clk_put(struct clk *clk)
10{
11}
12
13#endif
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 719298554ed7..073a2c5569f0 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -17,11 +17,16 @@ struct module;
17struct clk; 17struct clk;
18struct clockdomain; 18struct clockdomain;
19 19
20struct clkops {
21 int (*enable)(struct clk *);
22 void (*disable)(struct clk *);
23};
24
20#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 25#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
21 26
22struct clksel_rate { 27struct clksel_rate {
23 u8 div;
24 u32 val; 28 u32 val;
29 u8 div;
25 u8 flags; 30 u8 flags;
26}; 31};
27 32
@@ -34,24 +39,28 @@ struct dpll_data {
34 void __iomem *mult_div1_reg; 39 void __iomem *mult_div1_reg;
35 u32 mult_mask; 40 u32 mult_mask;
36 u32 div1_mask; 41 u32 div1_mask;
42 struct clk *clk_bypass;
43 struct clk *clk_ref;
44 void __iomem *control_reg;
45 u32 enable_mask;
46 unsigned int rate_tolerance;
47 unsigned long last_rounded_rate;
37 u16 last_rounded_m; 48 u16 last_rounded_m;
38 u8 last_rounded_n; 49 u8 last_rounded_n;
39 unsigned long last_rounded_rate; 50 u8 min_divider;
40 unsigned int rate_tolerance;
41 u16 max_multiplier;
42 u8 max_divider; 51 u8 max_divider;
43 u32 max_tolerance; 52 u32 max_tolerance;
53 u16 max_multiplier;
44# if defined(CONFIG_ARCH_OMAP3) 54# if defined(CONFIG_ARCH_OMAP3)
45 u8 modes; 55 u8 modes;
46 void __iomem *control_reg; 56 void __iomem *autoidle_reg;
47 u32 enable_mask; 57 void __iomem *idlest_reg;
58 u32 autoidle_mask;
59 u32 freqsel_mask;
60 u32 idlest_mask;
48 u8 auto_recal_bit; 61 u8 auto_recal_bit;
49 u8 recal_en_bit; 62 u8 recal_en_bit;
50 u8 recal_st_bit; 63 u8 recal_st_bit;
51 void __iomem *autoidle_reg;
52 u32 autoidle_mask;
53 void __iomem *idlest_reg;
54 u8 idlest_bit;
55# endif 64# endif
56}; 65};
57 66
@@ -59,21 +68,21 @@ struct dpll_data {
59 68
60struct clk { 69struct clk {
61 struct list_head node; 70 struct list_head node;
62 struct module *owner; 71 const struct clkops *ops;
63 const char *name; 72 const char *name;
64 int id; 73 int id;
65 struct clk *parent; 74 struct clk *parent;
75 struct list_head children;
76 struct list_head sibling; /* node for children */
66 unsigned long rate; 77 unsigned long rate;
67 __u32 flags; 78 __u32 flags;
68 void __iomem *enable_reg; 79 void __iomem *enable_reg;
69 __u8 enable_bit; 80 unsigned long (*recalc)(struct clk *);
70 __s8 usecount;
71 void (*recalc)(struct clk *);
72 int (*set_rate)(struct clk *, unsigned long); 81 int (*set_rate)(struct clk *, unsigned long);
73 long (*round_rate)(struct clk *, unsigned long); 82 long (*round_rate)(struct clk *, unsigned long);
74 void (*init)(struct clk *); 83 void (*init)(struct clk *);
75 int (*enable)(struct clk *); 84 __u8 enable_bit;
76 void (*disable)(struct clk *); 85 __s8 usecount;
77#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 86#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
78 u8 fixed_div; 87 u8 fixed_div;
79 void __iomem *clksel_reg; 88 void __iomem *clksel_reg;
@@ -99,7 +108,6 @@ struct clk_functions {
99 long (*clk_round_rate)(struct clk *clk, unsigned long rate); 108 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
100 int (*clk_set_rate)(struct clk *clk, unsigned long rate); 109 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
101 int (*clk_set_parent)(struct clk *clk, struct clk *parent); 110 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
102 struct clk * (*clk_get_parent)(struct clk *clk);
103 void (*clk_allow_idle)(struct clk *clk); 111 void (*clk_allow_idle)(struct clk *clk);
104 void (*clk_deny_idle)(struct clk *clk); 112 void (*clk_deny_idle)(struct clk *clk);
105 void (*clk_disable_unused)(struct clk *clk); 113 void (*clk_disable_unused)(struct clk *clk);
@@ -110,42 +118,33 @@ struct clk_functions {
110 118
111extern unsigned int mpurate; 119extern unsigned int mpurate;
112 120
113extern int clk_init(struct clk_functions * custom_clocks); 121extern int clk_init(struct clk_functions *custom_clocks);
122extern void clk_init_one(struct clk *clk);
114extern int clk_register(struct clk *clk); 123extern int clk_register(struct clk *clk);
124extern void clk_reparent(struct clk *child, struct clk *parent);
115extern void clk_unregister(struct clk *clk); 125extern void clk_unregister(struct clk *clk);
116extern void propagate_rate(struct clk *clk); 126extern void propagate_rate(struct clk *clk);
117extern void recalculate_root_clocks(void); 127extern void recalculate_root_clocks(void);
118extern void followparent_recalc(struct clk * clk); 128extern unsigned long followparent_recalc(struct clk *clk);
119extern void clk_allow_idle(struct clk *clk);
120extern void clk_deny_idle(struct clk *clk);
121extern int clk_get_usecount(struct clk *clk);
122extern void clk_enable_init_clocks(void); 129extern void clk_enable_init_clocks(void);
130#ifdef CONFIG_CPU_FREQ
131extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
132#endif
133
134extern const struct clkops clkops_null;
123 135
124/* Clock flags */ 136/* Clock flags */
125#define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */ 137/* bit 0 is free */
126#define RATE_FIXED (1 << 1) /* Fixed clock rate */ 138#define RATE_FIXED (1 << 1) /* Fixed clock rate */
127#define RATE_PROPAGATES (1 << 2) /* Program children too */ 139/* bits 2-4 are free */
128#define VIRTUAL_CLOCK (1 << 3) /* Composite clock from table */
129#define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */
130#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */ 140#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
131#define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */
132#define CLOCK_IDLE_CONTROL (1 << 7) 141#define CLOCK_IDLE_CONTROL (1 << 7)
133#define CLOCK_NO_IDLE_PARENT (1 << 8) 142#define CLOCK_NO_IDLE_PARENT (1 << 8)
134#define DELAYED_APP (1 << 9) /* Delay application of clock */ 143#define DELAYED_APP (1 << 9) /* Delay application of clock */
135#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */ 144#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
136#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */ 145#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
137#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */ 146#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
138/* bits 13-20 are currently free */ 147/* bits 13-31 are currently free */
139#define CLOCK_IN_OMAP310 (1 << 21)
140#define CLOCK_IN_OMAP730 (1 << 22)
141#define CLOCK_IN_OMAP1510 (1 << 23)
142#define CLOCK_IN_OMAP16XX (1 << 24)
143#define CLOCK_IN_OMAP242X (1 << 25)
144#define CLOCK_IN_OMAP243X (1 << 26)
145#define CLOCK_IN_OMAP343X (1 << 27) /* clocks common to all 343X */
146#define PARENT_CONTROLS_CLOCK (1 << 28)
147#define CLOCK_IN_OMAP3430ES1 (1 << 29) /* 3430ES1 clocks only */
148#define CLOCK_IN_OMAP3430ES2 (1 << 30) /* 3430ES2 clocks only */
149 148
150/* Clksel_rate flags */ 149/* Clksel_rate flags */
151#define DEFAULT_RATE (1 << 0) 150#define DEFAULT_RATE (1 << 0)
@@ -157,9 +156,4 @@ extern void clk_enable_init_clocks(void);
157#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) 156#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
158 157
159 158
160/* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */
161#define CORE_CLK_SRC_32K 0
162#define CORE_CLK_SRC_DPLL 1
163#define CORE_CLK_SRC_DPLL_X2 2
164
165#endif 159#endif
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h
index 1f51f0173784..b9d0dd2da89b 100644
--- a/arch/arm/plat-omap/include/mach/clockdomain.h
+++ b/arch/arm/plat-omap/include/mach/clockdomain.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/include/asm-arm/arch-omap/clockdomain.h 2 * arch/arm/plat-omap/include/mach/clockdomain.h
3 * 3 *
4 * OMAP2/3 clockdomain framework functions 4 * OMAP2/3 clockdomain framework functions
5 * 5 *
@@ -48,11 +48,13 @@
48 */ 48 */
49struct clkdm_pwrdm_autodep { 49struct clkdm_pwrdm_autodep {
50 50
51 /* Name of the powerdomain to add a wkdep/sleepdep on */ 51 union {
52 const char *pwrdm_name; 52 /* Name of the powerdomain to add a wkdep/sleepdep on */
53 const char *name;
53 54
54 /* Powerdomain pointer (looked up at clkdm_init() time) */ 55 /* Powerdomain pointer (looked up at clkdm_init() time) */
55 struct powerdomain *pwrdm; 56 struct powerdomain *ptr;
57 } pwrdm;
56 58
57 /* OMAP chip types that this clockdomain dep is valid on */ 59 /* OMAP chip types that this clockdomain dep is valid on */
58 const struct omap_chip_id omap_chip; 60 const struct omap_chip_id omap_chip;
@@ -64,8 +66,13 @@ struct clockdomain {
64 /* Clockdomain name */ 66 /* Clockdomain name */
65 const char *name; 67 const char *name;
66 68
67 /* Powerdomain enclosing this clockdomain */ 69 union {
68 const char *pwrdm_name; 70 /* Powerdomain enclosing this clockdomain */
71 const char *name;
72
73 /* Powerdomain pointer assigned at clkdm_register() */
74 struct powerdomain *ptr;
75 } pwrdm;
69 76
70 /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */ 77 /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */
71 const u16 clktrctrl_mask; 78 const u16 clktrctrl_mask;
@@ -79,9 +86,6 @@ struct clockdomain {
79 /* Usecount tracking */ 86 /* Usecount tracking */
80 atomic_t usecount; 87 atomic_t usecount;
81 88
82 /* Powerdomain pointer assigned at clkdm_register() */
83 struct powerdomain *pwrdm;
84
85 struct list_head node; 89 struct list_head node;
86 90
87}; 91};
diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h
index e746ec7e785e..0ecf36deb17b 100644
--- a/arch/arm/plat-omap/include/mach/common.h
+++ b/arch/arm/plat-omap/include/mach/common.h
@@ -65,7 +65,7 @@ void omap2_set_globals_343x(void);
65 65
66/* These get called from omap2_set_globals_xxxx(), do not call these */ 66/* These get called from omap2_set_globals_xxxx(), do not call these */
67void omap2_set_globals_tap(struct omap_globals *); 67void omap2_set_globals_tap(struct omap_globals *);
68void omap2_set_globals_memory(struct omap_globals *); 68void omap2_set_globals_sdrc(struct omap_globals *);
69void omap2_set_globals_control(struct omap_globals *); 69void omap2_set_globals_control(struct omap_globals *);
70void omap2_set_globals_prcm(struct omap_globals *); 70void omap2_set_globals_prcm(struct omap_globals *);
71 71
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index a8e1178a9468..98b144252364 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -56,6 +56,14 @@ unsigned int omap_rev(void);
56# define OMAP_NAME omap730 56# define OMAP_NAME omap730
57# endif 57# endif
58#endif 58#endif
59#ifdef CONFIG_ARCH_OMAP850
60# ifdef OMAP_NAME
61# undef MULTI_OMAP1
62# define MULTI_OMAP1
63# else
64# define OMAP_NAME omap850
65# endif
66#endif
59#ifdef CONFIG_ARCH_OMAP15XX 67#ifdef CONFIG_ARCH_OMAP15XX
60# ifdef OMAP_NAME 68# ifdef OMAP_NAME
61# undef MULTI_OMAP1 69# undef MULTI_OMAP1
@@ -105,7 +113,7 @@ unsigned int omap_rev(void);
105/* 113/*
106 * Macros to group OMAP into cpu classes. 114 * Macros to group OMAP into cpu classes.
107 * These can be used in most places. 115 * These can be used in most places.
108 * cpu_is_omap7xx(): True for OMAP730 116 * cpu_is_omap7xx(): True for OMAP730, OMAP850
109 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310 117 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
110 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 118 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
111 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430 119 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
@@ -153,6 +161,10 @@ IS_OMAP_SUBCLASS(343x, 0x343)
153# undef cpu_is_omap7xx 161# undef cpu_is_omap7xx
154# define cpu_is_omap7xx() is_omap7xx() 162# define cpu_is_omap7xx() is_omap7xx()
155# endif 163# endif
164# if defined(CONFIG_ARCH_OMAP850)
165# undef cpu_is_omap7xx
166# define cpu_is_omap7xx() is_omap7xx()
167# endif
156# if defined(CONFIG_ARCH_OMAP15XX) 168# if defined(CONFIG_ARCH_OMAP15XX)
157# undef cpu_is_omap15xx 169# undef cpu_is_omap15xx
158# define cpu_is_omap15xx() is_omap15xx() 170# define cpu_is_omap15xx() is_omap15xx()
@@ -166,6 +178,10 @@ IS_OMAP_SUBCLASS(343x, 0x343)
166# undef cpu_is_omap7xx 178# undef cpu_is_omap7xx
167# define cpu_is_omap7xx() 1 179# define cpu_is_omap7xx() 1
168# endif 180# endif
181# if defined(CONFIG_ARCH_OMAP850)
182# undef cpu_is_omap7xx
183# define cpu_is_omap7xx() 1
184# endif
169# if defined(CONFIG_ARCH_OMAP15XX) 185# if defined(CONFIG_ARCH_OMAP15XX)
170# undef cpu_is_omap15xx 186# undef cpu_is_omap15xx
171# define cpu_is_omap15xx() 1 187# define cpu_is_omap15xx() 1
@@ -219,6 +235,7 @@ IS_OMAP_SUBCLASS(343x, 0x343)
219 * These are only rarely needed. 235 * These are only rarely needed.
220 * cpu_is_omap330(): True for OMAP330 236 * cpu_is_omap330(): True for OMAP330
221 * cpu_is_omap730(): True for OMAP730 237 * cpu_is_omap730(): True for OMAP730
238 * cpu_is_omap850(): True for OMAP850
222 * cpu_is_omap1510(): True for OMAP1510 239 * cpu_is_omap1510(): True for OMAP1510
223 * cpu_is_omap1610(): True for OMAP1610 240 * cpu_is_omap1610(): True for OMAP1610
224 * cpu_is_omap1611(): True for OMAP1611 241 * cpu_is_omap1611(): True for OMAP1611
@@ -241,6 +258,7 @@ static inline int is_omap ##type (void) \
241 258
242IS_OMAP_TYPE(310, 0x0310) 259IS_OMAP_TYPE(310, 0x0310)
243IS_OMAP_TYPE(730, 0x0730) 260IS_OMAP_TYPE(730, 0x0730)
261IS_OMAP_TYPE(850, 0x0850)
244IS_OMAP_TYPE(1510, 0x1510) 262IS_OMAP_TYPE(1510, 0x1510)
245IS_OMAP_TYPE(1610, 0x1610) 263IS_OMAP_TYPE(1610, 0x1610)
246IS_OMAP_TYPE(1611, 0x1611) 264IS_OMAP_TYPE(1611, 0x1611)
@@ -255,6 +273,7 @@ IS_OMAP_TYPE(3430, 0x3430)
255 273
256#define cpu_is_omap310() 0 274#define cpu_is_omap310() 0
257#define cpu_is_omap730() 0 275#define cpu_is_omap730() 0
276#define cpu_is_omap850() 0
258#define cpu_is_omap1510() 0 277#define cpu_is_omap1510() 0
259#define cpu_is_omap1610() 0 278#define cpu_is_omap1610() 0
260#define cpu_is_omap5912() 0 279#define cpu_is_omap5912() 0
@@ -272,12 +291,22 @@ IS_OMAP_TYPE(3430, 0x3430)
272# undef cpu_is_omap730 291# undef cpu_is_omap730
273# define cpu_is_omap730() is_omap730() 292# define cpu_is_omap730() is_omap730()
274# endif 293# endif
294# if defined(CONFIG_ARCH_OMAP850)
295# undef cpu_is_omap850
296# define cpu_is_omap850() is_omap850()
297# endif
275#else 298#else
276# if defined(CONFIG_ARCH_OMAP730) 299# if defined(CONFIG_ARCH_OMAP730)
277# undef cpu_is_omap730 300# undef cpu_is_omap730
278# define cpu_is_omap730() 1 301# define cpu_is_omap730() 1
279# endif 302# endif
280#endif 303#endif
304#else
305# if defined(CONFIG_ARCH_OMAP850)
306# undef cpu_is_omap850
307# define cpu_is_omap850() 1
308# endif
309#endif
281 310
282/* 311/*
283 * Whether we have MULTI_OMAP1 or not, we still need to distinguish 312 * Whether we have MULTI_OMAP1 or not, we still need to distinguish
@@ -320,7 +349,7 @@ IS_OMAP_TYPE(3430, 0x3430)
320#endif 349#endif
321 350
322/* Macros to detect if we have OMAP1 or OMAP2 */ 351/* Macros to detect if we have OMAP1 or OMAP2 */
323#define cpu_class_is_omap1() (cpu_is_omap730() || cpu_is_omap15xx() || \ 352#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
324 cpu_is_omap16xx()) 353 cpu_is_omap16xx())
325#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx()) 354#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
326 355
@@ -355,13 +384,27 @@ IS_OMAP_TYPE(3430, 0x3430)
355 * use omap_chip_is(). 384 * use omap_chip_is().
356 * 385 *
357 */ 386 */
358#define CHIP_IS_OMAP2420 (1 << 0) 387#define CHIP_IS_OMAP2420 (1 << 0)
359#define CHIP_IS_OMAP2430 (1 << 1) 388#define CHIP_IS_OMAP2430 (1 << 1)
360#define CHIP_IS_OMAP3430 (1 << 2) 389#define CHIP_IS_OMAP3430 (1 << 2)
361#define CHIP_IS_OMAP3430ES1 (1 << 3) 390#define CHIP_IS_OMAP3430ES1 (1 << 3)
362#define CHIP_IS_OMAP3430ES2 (1 << 4) 391#define CHIP_IS_OMAP3430ES2 (1 << 4)
392#define CHIP_IS_OMAP3430ES3_0 (1 << 5)
393#define CHIP_IS_OMAP3430ES3_1 (1 << 6)
394
395#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
396
397/*
398 * "GE" here represents "greater than or equal to" in terms of ES
399 * levels. So CHIP_GE_OMAP3430ES2 is intended to match all OMAP3430
400 * chips at ES2 and beyond, but not, for example, any OMAP lines after
401 * OMAP3.
402 */
403#define CHIP_GE_OMAP3430ES2 (CHIP_IS_OMAP3430ES2 | \
404 CHIP_IS_OMAP3430ES3_0 | \
405 CHIP_IS_OMAP3430ES3_1)
406#define CHIP_GE_OMAP3430ES3_1 (CHIP_IS_OMAP3430ES3_1)
363 407
364#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
365 408
366int omap_chip_is(struct omap_chip_id oci); 409int omap_chip_is(struct omap_chip_id oci);
367int omap_type(void); 410int omap_type(void);
@@ -378,5 +421,3 @@ int omap_type(void);
378void omap2_check_revision(void); 421void omap2_check_revision(void);
379 422
380#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */ 423#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */
381
382#endif
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 8d9dfe314387..2b22a8799bc6 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -31,7 +31,8 @@
31 31
32#define OMAP_MPUIO_BASE 0xfffb5000 32#define OMAP_MPUIO_BASE 0xfffb5000
33 33
34#ifdef CONFIG_ARCH_OMAP730 34#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
35
35#define OMAP_MPUIO_INPUT_LATCH 0x00 36#define OMAP_MPUIO_INPUT_LATCH 0x00
36#define OMAP_MPUIO_OUTPUT 0x02 37#define OMAP_MPUIO_OUTPUT 0x02
37#define OMAP_MPUIO_IO_CNTL 0x04 38#define OMAP_MPUIO_IO_CNTL 0x04
diff --git a/arch/arm/plat-omap/include/mach/gpmc.h b/arch/arm/plat-omap/include/mach/gpmc.h
index 45b678439bb7..921b16532ff5 100644
--- a/arch/arm/plat-omap/include/mach/gpmc.h
+++ b/arch/arm/plat-omap/include/mach/gpmc.h
@@ -103,6 +103,6 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
103extern void gpmc_cs_free(int cs); 103extern void gpmc_cs_free(int cs);
104extern int gpmc_cs_set_reserved(int cs, int reserved); 104extern int gpmc_cs_set_reserved(int cs, int reserved);
105extern int gpmc_cs_reserved(int cs); 105extern int gpmc_cs_reserved(int cs);
106extern void gpmc_init(void); 106extern void __init gpmc_init(void);
107 107
108#endif 108#endif
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h
index 6589ddbb63b2..3dc423ed3e80 100644
--- a/arch/arm/plat-omap/include/mach/hardware.h
+++ b/arch/arm/plat-omap/include/mach/hardware.h
@@ -286,78 +286,4 @@
286#include "omap24xx.h" 286#include "omap24xx.h"
287#include "omap34xx.h" 287#include "omap34xx.h"
288 288
289#ifndef __ASSEMBLER__
290
291/*
292 * ---------------------------------------------------------------------------
293 * Board specific defines
294 * ---------------------------------------------------------------------------
295 */
296
297#ifdef CONFIG_MACH_OMAP_INNOVATOR
298#include "board-innovator.h"
299#endif
300
301#ifdef CONFIG_MACH_OMAP_H2
302#include "board-h2.h"
303#endif
304
305#ifdef CONFIG_MACH_OMAP_PERSEUS2
306#include "board-perseus2.h"
307#endif
308
309#ifdef CONFIG_MACH_OMAP_FSAMPLE
310#include "board-fsample.h"
311#endif
312
313#ifdef CONFIG_MACH_OMAP_H3
314#include "board-h3.h"
315#endif
316
317#ifdef CONFIG_MACH_OMAP_H4
318#include "board-h4.h"
319#endif
320
321#ifdef CONFIG_MACH_OMAP_2430SDP
322#include "board-2430sdp.h"
323#endif
324
325#ifdef CONFIG_MACH_OMAP3_BEAGLE
326#include "board-omap3beagle.h"
327#endif
328
329#ifdef CONFIG_MACH_OMAP_LDP
330#include "board-ldp.h"
331#endif
332
333#ifdef CONFIG_MACH_OMAP_APOLLON
334#include "board-apollon.h"
335#endif
336
337#ifdef CONFIG_MACH_OMAP_OSK
338#include "board-osk.h"
339#endif
340
341#ifdef CONFIG_MACH_VOICEBLUE
342#include "board-voiceblue.h"
343#endif
344
345#ifdef CONFIG_MACH_OMAP_PALMTE
346#include "board-palmte.h"
347#endif
348
349#ifdef CONFIG_MACH_OMAP_PALMZ71
350#include "board-palmz71.h"
351#endif
352
353#ifdef CONFIG_MACH_OMAP_PALMTT
354#include "board-palmtt.h"
355#endif
356
357#ifdef CONFIG_MACH_SX1
358#include "board-sx1.h"
359#endif
360
361#endif /* !__ASSEMBLER__ */
362
363#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ 289#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index d92bf7964481..0610d7e2b3d7 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -185,11 +185,13 @@
185#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a)) 185#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a))
186#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a)) 186#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a))
187 187
188struct omap_sdrc_params;
189
188extern void omap1_map_common_io(void); 190extern void omap1_map_common_io(void);
189extern void omap1_init_common_hw(void); 191extern void omap1_init_common_hw(void);
190 192
191extern void omap2_map_common_io(void); 193extern void omap2_map_common_io(void);
192extern void omap2_init_common_hw(void); 194extern void omap2_init_common_hw(struct omap_sdrc_params *sp);
193 195
194#define __arch_ioremap(p,s,t) omap_ioremap(p,s,t) 196#define __arch_ioremap(p,s,t) omap_ioremap(p,s,t)
195#define __arch_iounmap(v) omap_iounmap(v) 197#define __arch_iounmap(v) omap_iounmap(v)
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index bed5274c910a..7f57ee66f364 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -105,6 +105,29 @@
105#define INT_730_SPGIO_WR 29 105#define INT_730_SPGIO_WR 29
106 106
107/* 107/*
108 * OMAP-850 specific IRQ numbers for interrupt handler 1
109 */
110#define INT_850_IH2_FIQ 0
111#define INT_850_IH2_IRQ 1
112#define INT_850_USB_NON_ISO 2
113#define INT_850_USB_ISO 3
114#define INT_850_ICR 4
115#define INT_850_EAC 5
116#define INT_850_GPIO_BANK1 6
117#define INT_850_GPIO_BANK2 7
118#define INT_850_GPIO_BANK3 8
119#define INT_850_McBSP2TX 10
120#define INT_850_McBSP2RX 11
121#define INT_850_McBSP2RX_OVF 12
122#define INT_850_LCD_LINE 14
123#define INT_850_GSM_PROTECT 15
124#define INT_850_TIMER3 16
125#define INT_850_GPIO_BANK5 17
126#define INT_850_GPIO_BANK6 18
127#define INT_850_SPGIO_WR 29
128
129
130/*
108 * IRQ numbers for interrupt handler 2 131 * IRQ numbers for interrupt handler 2
109 * 132 *
110 * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below 133 * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
@@ -237,6 +260,64 @@
237#define INT_730_DMA_CH15 (62 + IH2_BASE) 260#define INT_730_DMA_CH15 (62 + IH2_BASE)
238#define INT_730_NAND (63 + IH2_BASE) 261#define INT_730_NAND (63 + IH2_BASE)
239 262
263/*
264 * OMAP-850 specific IRQ numbers for interrupt handler 2
265 */
266#define INT_850_HW_ERRORS (0 + IH2_BASE)
267#define INT_850_NFIQ_PWR_FAIL (1 + IH2_BASE)
268#define INT_850_CFCD (2 + IH2_BASE)
269#define INT_850_CFIREQ (3 + IH2_BASE)
270#define INT_850_I2C (4 + IH2_BASE)
271#define INT_850_PCC (5 + IH2_BASE)
272#define INT_850_MPU_EXT_NIRQ (6 + IH2_BASE)
273#define INT_850_SPI_100K_1 (7 + IH2_BASE)
274#define INT_850_SYREN_SPI (8 + IH2_BASE)
275#define INT_850_VLYNQ (9 + IH2_BASE)
276#define INT_850_GPIO_BANK4 (10 + IH2_BASE)
277#define INT_850_McBSP1TX (11 + IH2_BASE)
278#define INT_850_McBSP1RX (12 + IH2_BASE)
279#define INT_850_McBSP1RX_OF (13 + IH2_BASE)
280#define INT_850_UART_MODEM_IRDA_2 (14 + IH2_BASE)
281#define INT_850_UART_MODEM_1 (15 + IH2_BASE)
282#define INT_850_MCSI (16 + IH2_BASE)
283#define INT_850_uWireTX (17 + IH2_BASE)
284#define INT_850_uWireRX (18 + IH2_BASE)
285#define INT_850_SMC_CD (19 + IH2_BASE)
286#define INT_850_SMC_IREQ (20 + IH2_BASE)
287#define INT_850_HDQ_1WIRE (21 + IH2_BASE)
288#define INT_850_TIMER32K (22 + IH2_BASE)
289#define INT_850_MMC_SDIO (23 + IH2_BASE)
290#define INT_850_UPLD (24 + IH2_BASE)
291#define INT_850_USB_HHC_1 (27 + IH2_BASE)
292#define INT_850_USB_HHC_2 (28 + IH2_BASE)
293#define INT_850_USB_GENI (29 + IH2_BASE)
294#define INT_850_USB_OTG (30 + IH2_BASE)
295#define INT_850_CAMERA_IF (31 + IH2_BASE)
296#define INT_850_RNG (32 + IH2_BASE)
297#define INT_850_DUAL_MODE_TIMER (33 + IH2_BASE)
298#define INT_850_DBB_RF_EN (34 + IH2_BASE)
299#define INT_850_MPUIO_KEYPAD (35 + IH2_BASE)
300#define INT_850_SHA1_MD5 (36 + IH2_BASE)
301#define INT_850_SPI_100K_2 (37 + IH2_BASE)
302#define INT_850_RNG_IDLE (38 + IH2_BASE)
303#define INT_850_MPUIO (39 + IH2_BASE)
304#define INT_850_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
305#define INT_850_LLPC_OE_FALLING (41 + IH2_BASE)
306#define INT_850_LLPC_OE_RISING (42 + IH2_BASE)
307#define INT_850_LLPC_VSYNC (43 + IH2_BASE)
308#define INT_850_WAKE_UP_REQ (46 + IH2_BASE)
309#define INT_850_DMA_CH6 (53 + IH2_BASE)
310#define INT_850_DMA_CH7 (54 + IH2_BASE)
311#define INT_850_DMA_CH8 (55 + IH2_BASE)
312#define INT_850_DMA_CH9 (56 + IH2_BASE)
313#define INT_850_DMA_CH10 (57 + IH2_BASE)
314#define INT_850_DMA_CH11 (58 + IH2_BASE)
315#define INT_850_DMA_CH12 (59 + IH2_BASE)
316#define INT_850_DMA_CH13 (60 + IH2_BASE)
317#define INT_850_DMA_CH14 (61 + IH2_BASE)
318#define INT_850_DMA_CH15 (62 + IH2_BASE)
319#define INT_850_NAND (63 + IH2_BASE)
320
240#define INT_24XX_SYS_NIRQ 7 321#define INT_24XX_SYS_NIRQ 7
241#define INT_24XX_SDMA_IRQ0 12 322#define INT_24XX_SDMA_IRQ0 12
242#define INT_24XX_SDMA_IRQ1 13 323#define INT_24XX_SDMA_IRQ1 13
@@ -341,7 +422,7 @@
341 422
342#define INT_34XX_BENCH_MPU_EMUL 3 423#define INT_34XX_BENCH_MPU_EMUL 3
343 424
344/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and 425/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
345 * 16 MPUIO lines */ 426 * 16 MPUIO lines */
346#define OMAP_MAX_GPIO_LINES 192 427#define OMAP_MAX_GPIO_LINES 192
347#define IH_GPIO_BASE (128 + IH2_BASE) 428#define IH_GPIO_BASE (128 + IH2_BASE)
diff --git a/arch/arm/plat-omap/include/mach/mailbox.h b/arch/arm/plat-omap/include/mach/mailbox.h
index 7cbed9332e16..b7a6991814ec 100644
--- a/arch/arm/plat-omap/include/mach/mailbox.h
+++ b/arch/arm/plat-omap/include/mach/mailbox.h
@@ -33,6 +33,9 @@ struct omap_mbox_ops {
33 void (*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); 33 void (*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
34 void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); 34 void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
35 int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); 35 int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
36 /* ctx */
37 void (*save_ctx)(struct omap_mbox *mbox);
38 void (*restore_ctx)(struct omap_mbox *mbox);
36}; 39};
37 40
38struct omap_mbox_queue { 41struct omap_mbox_queue {
@@ -53,7 +56,7 @@ struct omap_mbox {
53 56
54 mbox_msg_t seq_snd, seq_rcv; 57 mbox_msg_t seq_snd, seq_rcv;
55 58
56 struct device dev; 59 struct device *dev;
57 60
58 struct omap_mbox *next; 61 struct omap_mbox *next;
59 void *priv; 62 void *priv;
@@ -67,7 +70,27 @@ void omap_mbox_init_seq(struct omap_mbox *);
67struct omap_mbox *omap_mbox_get(const char *); 70struct omap_mbox *omap_mbox_get(const char *);
68void omap_mbox_put(struct omap_mbox *); 71void omap_mbox_put(struct omap_mbox *);
69 72
70int omap_mbox_register(struct omap_mbox *); 73int omap_mbox_register(struct device *parent, struct omap_mbox *);
71int omap_mbox_unregister(struct omap_mbox *); 74int omap_mbox_unregister(struct omap_mbox *);
72 75
76static inline void omap_mbox_save_ctx(struct omap_mbox *mbox)
77{
78 if (!mbox->ops->save_ctx) {
79 dev_err(mbox->dev, "%s:\tno save\n", __func__);
80 return;
81 }
82
83 mbox->ops->save_ctx(mbox);
84}
85
86static inline void omap_mbox_restore_ctx(struct omap_mbox *mbox)
87{
88 if (!mbox->ops->restore_ctx) {
89 dev_err(mbox->dev, "%s:\tno restore\n", __func__);
90 return;
91 }
92
93 mbox->ops->restore_ctx(mbox);
94}
95
73#endif /* MAILBOX_H */ 96#endif /* MAILBOX_H */
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 113c2466c86a..bb154ea76769 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -344,8 +344,6 @@ struct omap_mcbsp_platform_data {
344 u8 dma_rx_sync, dma_tx_sync; 344 u8 dma_rx_sync, dma_tx_sync;
345 u16 rx_irq, tx_irq; 345 u16 rx_irq, tx_irq;
346 struct omap_mcbsp_ops *ops; 346 struct omap_mcbsp_ops *ops;
347 char const **clk_names;
348 int num_clks;
349}; 347};
350 348
351struct omap_mcbsp { 349struct omap_mcbsp {
@@ -377,8 +375,8 @@ struct omap_mcbsp {
377 /* Protect the field .free, while checking if the mcbsp is in use */ 375 /* Protect the field .free, while checking if the mcbsp is in use */
378 spinlock_t lock; 376 spinlock_t lock;
379 struct omap_mcbsp_platform_data *pdata; 377 struct omap_mcbsp_platform_data *pdata;
380 struct clk **clks; 378 struct clk *iclk;
381 int num_clks; 379 struct clk *fclk;
382}; 380};
383extern struct omap_mcbsp **mcbsp_ptr; 381extern struct omap_mcbsp **mcbsp_ptr;
384extern int omap_mcbsp_count; 382extern int omap_mcbsp_count;
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index d6b5ca6c7da2..99ed564d9277 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -61,9 +61,11 @@
61#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) 61#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
62#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) 62#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0))
63 63
64#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ 64#define __arch_page_to_dma(dev, page) \
65 (dma_addr_t)virt_to_lbus(page_address(page)) : \ 65 ({ dma_addr_t __dma = page_to_phys(page); \
66 (dma_addr_t)__virt_to_phys(page_address(page));}) 66 if (is_lbus_device(dev)) \
67 __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \
68 __dma; })
67 69
68#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ 70#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \
69 lbus_to_virt(addr) : \ 71 lbus_to_virt(addr) : \
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 73a9e15031b1..4435bd434e17 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -37,6 +37,8 @@
37#define OMAP_MMC_MAX_SLOTS 2 37#define OMAP_MMC_MAX_SLOTS 2
38 38
39struct omap_mmc_platform_data { 39struct omap_mmc_platform_data {
40 /* back-link to device */
41 struct device *dev;
40 42
41 /* number of slots per controller */ 43 /* number of slots per controller */
42 unsigned nr_slots:2; 44 unsigned nr_slots:2;
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index f4362b8682c7..85a621705766 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -61,6 +61,16 @@
61 .pull_bit = bit, \ 61 .pull_bit = bit, \
62 .pull_val = status, 62 .pull_val = status,
63 63
64#define MUX_REG_850(reg, mode_offset, mode) .mux_reg_name = "OMAP850_IO_CONF_"#reg, \
65 .mux_reg = OMAP850_IO_CONF_##reg, \
66 .mask_offset = mode_offset, \
67 .mask = mode,
68
69#define PULL_REG_850(reg, bit, status) .pull_name = "OMAP850_IO_CONF_"#reg, \
70 .pull_reg = OMAP850_IO_CONF_##reg, \
71 .pull_bit = bit, \
72 .pull_val = status,
73
64#else 74#else
65 75
66#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ 76#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
@@ -83,6 +93,15 @@
83 .pull_bit = bit, \ 93 .pull_bit = bit, \
84 .pull_val = status, 94 .pull_val = status,
85 95
96#define MUX_REG_850(reg, mode_offset, mode) \
97 .mux_reg = OMAP850_IO_CONF_##reg, \
98 .mask_offset = mode_offset, \
99 .mask = mode,
100
101#define PULL_REG_850(reg, bit, status) .pull_reg = OMAP850_IO_CONF_##reg, \
102 .pull_bit = bit, \
103 .pull_val = status,
104
86#endif /* CONFIG_OMAP_MUX_DEBUG */ 105#endif /* CONFIG_OMAP_MUX_DEBUG */
87 106
88#define MUX_CFG(desc, mux_reg, mode_offset, mode, \ 107#define MUX_CFG(desc, mux_reg, mode_offset, mode, \
@@ -98,7 +117,7 @@
98 117
99 118
100/* 119/*
101 * OMAP730 has a slightly different config for the pin mux. 120 * OMAP730/850 has a slightly different config for the pin mux.
102 * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and 121 * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and
103 * not the FUNC_MUX_CTRL_x regs from hardware.h 122 * not the FUNC_MUX_CTRL_x regs from hardware.h
104 * - for pull-up/down, only has one enable bit which is is in the same register 123 * - for pull-up/down, only has one enable bit which is is in the same register
@@ -114,6 +133,17 @@
114 PU_PD_REG(NA, 0) \ 133 PU_PD_REG(NA, 0) \
115}, 134},
116 135
136#define MUX_CFG_850(desc, mux_reg, mode_offset, mode, \
137 pull_bit, pull_status, debug_status)\
138{ \
139 .name = desc, \
140 .debug = debug_status, \
141 MUX_REG_850(mux_reg, mode_offset, mode) \
142 PULL_REG_850(mux_reg, pull_bit, pull_status) \
143 PU_PD_REG(NA, 0) \
144},
145
146
117#define MUX_CFG_24XX(desc, reg_offset, mode, \ 147#define MUX_CFG_24XX(desc, reg_offset, mode, \
118 pull_en, pull_mode, dbg) \ 148 pull_en, pull_mode, dbg) \
119{ \ 149{ \
@@ -221,6 +251,26 @@ enum omap730_index {
221 W17_730_USB_VBUSI, 251 W17_730_USB_VBUSI,
222}; 252};
223 253
254enum omap850_index {
255 /* OMAP 850 keyboard */
256 E2_850_KBR0,
257 J7_850_KBR1,
258 E1_850_KBR2,
259 F3_850_KBR3,
260 D2_850_KBR4,
261 C2_850_KBC0,
262 D3_850_KBC1,
263 E4_850_KBC2,
264 F4_850_KBC3,
265 E3_850_KBC4,
266
267 /* USB */
268 AA17_850_USB_DM,
269 W16_850_USB_PU_EN,
270 W17_850_USB_VBUSI,
271};
272
273
224enum omap1xxx_index { 274enum omap1xxx_index {
225 /* UART1 (BT_UART_GATING)*/ 275 /* UART1 (BT_UART_GATING)*/
226 UART1_TX = 0, 276 UART1_TX = 0,
@@ -788,7 +838,20 @@ enum omap34xx_index {
788 * - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown 838 * - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown
789 * - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx) 839 * - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx)
790 */ 840 */
841 AF26_34XX_GPIO0,
842 AF22_34XX_GPIO9,
791 AH8_34XX_GPIO29, 843 AH8_34XX_GPIO29,
844 U8_34XX_GPIO54_OUT,
845 U8_34XX_GPIO54_DOWN,
846 L8_34XX_GPIO63,
847 G25_34XX_GPIO86_OUT,
848 AG4_34XX_GPIO134_OUT,
849 AE4_34XX_GPIO136_OUT,
850 AF6_34XX_GPIO140_UP,
851 AE6_34XX_GPIO141,
852 AF5_34XX_GPIO142,
853 AE5_34XX_GPIO143,
854 H19_34XX_GPIO164_OUT,
792 J25_34XX_GPIO170, 855 J25_34XX_GPIO170,
793}; 856};
794 857
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h
index 8e0479fff05a..ab640151d3ec 100644
--- a/arch/arm/plat-omap/include/mach/omap34xx.h
+++ b/arch/arm/plat-omap/include/mach/omap34xx.h
@@ -49,11 +49,39 @@
49#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE 49#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE
50 50
51#define OMAP34XX_IC_BASE 0x48200000 51#define OMAP34XX_IC_BASE 0x48200000
52
53#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000)
54#define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100)
55#define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400)
56#define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600)
57#define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00)
58#define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00)
59#define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00)
60#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
61#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
62#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
63#define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800)
64#define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970)
65
66#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
67#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
68#define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF)
69#define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7)
70#define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047)
71#define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F)
72#define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F)
73#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
74#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
75#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
76#define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F)
77#define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007)
78
52#define OMAP34XX_IVA_INTC_BASE 0x40000000 79#define OMAP34XX_IVA_INTC_BASE 0x40000000
53#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) 80#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
54#define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) 81#define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000)
55#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) 82#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000)
56 83
84#define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000)
57 85
58#if defined(CONFIG_ARCH_OMAP3430) 86#if defined(CONFIG_ARCH_OMAP3430)
59 87
diff --git a/arch/arm/plat-omap/include/mach/omap850.h b/arch/arm/plat-omap/include/mach/omap850.h
new file mode 100644
index 000000000000..c33f67981712
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap850.h
@@ -0,0 +1,102 @@
1/* arch/arm/plat-omap/include/mach/omap850.h
2 *
3 * Hardware definitions for TI OMAP850 processor.
4 *
5 * Derived from omap730.h by Zebediah C. McClure <zmc@lurian.net>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#ifndef __ASM_ARCH_OMAP850_H
29#define __ASM_ARCH_OMAP850_H
30
31/*
32 * ----------------------------------------------------------------------------
33 * Base addresses
34 * ----------------------------------------------------------------------------
35 */
36
37/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
38
39#define OMAP850_DSP_BASE 0xE0000000
40#define OMAP850_DSP_SIZE 0x50000
41#define OMAP850_DSP_START 0xE0000000
42
43#define OMAP850_DSPREG_BASE 0xE1000000
44#define OMAP850_DSPREG_SIZE SZ_128K
45#define OMAP850_DSPREG_START 0xE1000000
46
47/*
48 * ----------------------------------------------------------------------------
49 * OMAP850 specific configuration registers
50 * ----------------------------------------------------------------------------
51 */
52#define OMAP850_CONFIG_BASE 0xfffe1000
53#define OMAP850_IO_CONF_0 0xfffe1070
54#define OMAP850_IO_CONF_1 0xfffe1074
55#define OMAP850_IO_CONF_2 0xfffe1078
56#define OMAP850_IO_CONF_3 0xfffe107c
57#define OMAP850_IO_CONF_4 0xfffe1080
58#define OMAP850_IO_CONF_5 0xfffe1084
59#define OMAP850_IO_CONF_6 0xfffe1088
60#define OMAP850_IO_CONF_7 0xfffe108c
61#define OMAP850_IO_CONF_8 0xfffe1090
62#define OMAP850_IO_CONF_9 0xfffe1094
63#define OMAP850_IO_CONF_10 0xfffe1098
64#define OMAP850_IO_CONF_11 0xfffe109c
65#define OMAP850_IO_CONF_12 0xfffe10a0
66#define OMAP850_IO_CONF_13 0xfffe10a4
67
68#define OMAP850_MODE_1 0xfffe1010
69#define OMAP850_MODE_2 0xfffe1014
70
71/* CSMI specials: in terms of base + offset */
72#define OMAP850_MODE2_OFFSET 0x14
73
74/*
75 * ----------------------------------------------------------------------------
76 * OMAP850 traffic controller configuration registers
77 * ----------------------------------------------------------------------------
78 */
79#define OMAP850_FLASH_CFG_0 0xfffecc10
80#define OMAP850_FLASH_ACFG_0 0xfffecc50
81#define OMAP850_FLASH_CFG_1 0xfffecc14
82#define OMAP850_FLASH_ACFG_1 0xfffecc54
83
84/*
85 * ----------------------------------------------------------------------------
86 * OMAP850 DSP control registers
87 * ----------------------------------------------------------------------------
88 */
89#define OMAP850_ICR_BASE 0xfffbb800
90#define OMAP850_DSP_M_CTL 0xfffbb804
91#define OMAP850_DSP_MMU_BASE 0xfffed200
92
93/*
94 * ----------------------------------------------------------------------------
95 * OMAP850 PCC_UPLD configuration registers
96 * ----------------------------------------------------------------------------
97 */
98#define OMAP850_PCC_UPLD_CTRL_BASE (0xfffe0900)
99#define OMAP850_PCC_UPLD_CTRL (OMAP850_PCC_UPLD_CTRL_BASE + 0x00)
100
101#endif /* __ASM_ARCH_OMAP850_H */
102
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index 37e2f0f38b46..ce6ee7927537 100644
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -118,18 +118,6 @@
118extern void prevent_idle_sleep(void); 118extern void prevent_idle_sleep(void);
119extern void allow_idle_sleep(void); 119extern void allow_idle_sleep(void);
120 120
121/**
122 * clk_deny_idle - Prevents the clock from being idled during MPU idle
123 * @clk: clock signal handle
124 */
125void clk_deny_idle(struct clk *clk);
126
127/**
128 * clk_allow_idle - Counters previous clk_deny_idle
129 * @clk: clock signal handle
130 */
131void clk_allow_idle(struct clk *clk);
132
133extern void omap_pm_idle(void); 121extern void omap_pm_idle(void);
134extern void omap_pm_suspend(void); 122extern void omap_pm_suspend(void);
135extern void omap730_cpu_suspend(unsigned short, unsigned short); 123extern void omap730_cpu_suspend(unsigned short, unsigned short);
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h
index 2806a9c8e4d7..69c9e675d8ee 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -50,9 +50,9 @@
50 50
51/* 51/*
52 * Maximum number of clockdomains that can be associated with a powerdomain. 52 * Maximum number of clockdomains that can be associated with a powerdomain.
53 * CORE powerdomain is probably the worst case. 53 * CORE powerdomain on OMAP3 is the worst case
54 */ 54 */
55#define PWRDM_MAX_CLKDMS 3 55#define PWRDM_MAX_CLKDMS 4
56 56
57/* XXX A completely arbitrary number. What is reasonable here? */ 57/* XXX A completely arbitrary number. What is reasonable here? */
58#define PWRDM_TRANSITION_BAILOUT 100000 58#define PWRDM_TRANSITION_BAILOUT 100000
@@ -145,6 +145,7 @@ int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
145 145
146int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); 146int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
147int pwrdm_read_next_pwrst(struct powerdomain *pwrdm); 147int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
148int pwrdm_read_pwrst(struct powerdomain *pwrdm);
148int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm); 149int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
149int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm); 150int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
150 151
diff --git a/arch/arm/plat-omap/include/mach/prcm.h b/arch/arm/plat-omap/include/mach/prcm.h
index 56eba0fd6f6a..24ac3c715912 100644
--- a/arch/arm/plat-omap/include/mach/prcm.h
+++ b/arch/arm/plat-omap/include/mach/prcm.h
@@ -20,10 +20,11 @@
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */ 21 */
22 22
23#ifndef __ASM_ARM_ARCH_DPM_PRCM_H 23#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
24#define __ASM_ARM_ARCH_DPM_PRCM_H 24#define __ASM_ARM_ARCH_OMAP_PRCM_H
25 25
26u32 omap_prcm_get_reset_sources(void); 26u32 omap_prcm_get_reset_sources(void);
27void omap_prcm_arch_reset(char mode);
27 28
28#endif 29#endif
29 30
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index a98c6c3beb2c..adc73522491f 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -4,10 +4,12 @@
4/* 4/*
5 * OMAP2/3 SDRC/SMS register definitions 5 * OMAP2/3 SDRC/SMS register definitions
6 * 6 *
7 * Copyright (C) 2007 Texas Instruments, Inc. 7 * Copyright (C) 2007-2008 Texas Instruments, Inc.
8 * Copyright (C) 2007 Nokia Corporation 8 * Copyright (C) 2007-2008 Nokia Corporation
9 * 9 *
10 * Written by Paul Walmsley 10 * Tony Lindgren
11 * Paul Walmsley
12 * Richard Woodruff
11 * 13 *
12 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 15 * it under the terms of the GNU General Public License version 2 as
@@ -64,14 +66,62 @@
64 * SMS register access 66 * SMS register access
65 */ 67 */
66 68
67 69#define OMAP242X_SMS_REGADDR(reg) \
68#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg) 70 (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg)
69#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg) 71#define OMAP243X_SMS_REGADDR(reg) \
70#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg) 72 (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg)
73#define OMAP343X_SMS_REGADDR(reg) \
74 (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg)
71 75
72/* SMS register offsets - read/write with sms_{read,write}_reg() */ 76/* SMS register offsets - read/write with sms_{read,write}_reg() */
73 77
74#define SMS_SYSCONFIG 0x010 78#define SMS_SYSCONFIG 0x010
75/* REVISIT: fill in other SMS registers here */ 79/* REVISIT: fill in other SMS registers here */
76 80
81
82#ifndef __ASSEMBLER__
83
84/**
85 * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate
86 * @rate: SDRC clock rate (in Hz)
87 * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate
88 * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate
89 * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate
90 * @mr: Value to program to SDRC_MR for this rate
91 *
92 * This structure holds a pre-computed set of register values for the
93 * SDRC for a given SDRC clock rate and SDRAM chip. These are
94 * intended to be pre-computed and specified in an array in the board-*.c
95 * files. The structure is keyed off the 'rate' field.
96 */
97struct omap_sdrc_params {
98 unsigned long rate;
99 u32 actim_ctrla;
100 u32 actim_ctrlb;
101 u32 rfr_ctrl;
102 u32 mr;
103};
104
105void __init omap2_sdrc_init(struct omap_sdrc_params *sp);
106struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r);
107
108#ifdef CONFIG_ARCH_OMAP2
109
110struct memory_timings {
111 u32 m_type; /* ddr = 1, sdr = 0 */
112 u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */
113 u32 slow_dll_ctrl; /* unlock mode, dll value for slow speed */
114 u32 fast_dll_ctrl; /* unlock mode, dll value for fast speed */
115 u32 base_cs; /* base chip select to use for calculations */
116};
117
118extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode);
119
120u32 omap2xxx_sdrc_dll_is_unlocked(void);
121u32 omap2xxx_sdrc_reprogram(u32 level, u32 force);
122
123#endif /* CONFIG_ARCH_OMAP2 */
124
125#endif /* __ASSEMBLER__ */
126
77#endif 127#endif
diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h
index 06923f261545..1060e345423b 100644
--- a/arch/arm/plat-omap/include/mach/system.h
+++ b/arch/arm/plat-omap/include/mach/system.h
@@ -9,12 +9,14 @@
9#include <asm/mach-types.h> 9#include <asm/mach-types.h>
10#include <mach/hardware.h> 10#include <mach/hardware.h>
11 11
12#include <mach/prcm.h>
13
12#ifndef CONFIG_MACH_VOICEBLUE 14#ifndef CONFIG_MACH_VOICEBLUE
13#define voiceblue_reset() do {} while (0) 15#define voiceblue_reset() do {} while (0)
16#else
17extern void voiceblue_reset(void);
14#endif 18#endif
15 19
16extern void omap_prcm_arch_reset(char mode);
17
18static inline void arch_idle(void) 20static inline void arch_idle(void)
19{ 21{
20 cpu_do_idle(); 22 cpu_do_idle();
@@ -38,7 +40,7 @@ static inline void omap1_arch_reset(char mode)
38 omap_writew(1, ARM_RSTCT1); 40 omap_writew(1, ARM_RSTCT1);
39} 41}
40 42
41static inline void arch_reset(char mode) 43static inline void arch_reset(char mode, const char *cmd)
42{ 44{
43 if (!cpu_class_is_omap2()) 45 if (!cpu_class_is_omap2())
44 omap1_arch_reset(mode); 46 omap1_arch_reset(mode);
diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h
index a56a610950c2..69f0ceed500b 100644
--- a/arch/arm/plat-omap/include/mach/usb.h
+++ b/arch/arm/plat-omap/include/mach/usb.h
@@ -27,8 +27,18 @@
27#define UDC_BASE OMAP2_UDC_BASE 27#define UDC_BASE OMAP2_UDC_BASE
28#define OMAP_OHCI_BASE OMAP2_OHCI_BASE 28#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
29 29
30#ifdef CONFIG_USB_MUSB_SOC
31extern void usb_musb_init(void);
32#else
33static inline void usb_musb_init(void)
34{
35}
36#endif
37
30#endif 38#endif
31 39
40void omap_usb_init(struct omap_usb_config *pdata);
41
32/*-------------------------------------------------------------------------*/ 42/*-------------------------------------------------------------------------*/
33 43
34/* 44/*
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 04:30:23 -0500