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Diffstat (limited to 'arch/arm/plat-omap/i2c.c')
-rw-r--r--arch/arm/plat-omap/i2c.c56
1 files changed, 11 insertions, 45 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 8b848391f0c8..624e26298faa 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -27,7 +27,8 @@
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <mach/irqs.h> 29#include <mach/irqs.h>
30#include <mach/mux.h> 30#include <plat/mux.h>
31#include <plat/i2c.h>
31 32
32#define OMAP_I2C_SIZE 0x3f 33#define OMAP_I2C_SIZE 0x3f
33#define OMAP1_I2C_BASE 0xfffb3800 34#define OMAP1_I2C_BASE 0xfffb3800
@@ -50,10 +51,10 @@ static const char name[] = "i2c_omap";
50 51
51static struct resource i2c_resources[][2] = { 52static struct resource i2c_resources[][2] = {
52 { I2C_RESOURCE_BUILDER(0, 0) }, 53 { I2C_RESOURCE_BUILDER(0, 0) },
53#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 54#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
54 { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) }, 55 { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
55#endif 56#endif
56#if defined(CONFIG_ARCH_OMAP34XX) 57#if defined(CONFIG_ARCH_OMAP3)
57 { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) }, 58 { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
58#endif 59#endif
59}; 60};
@@ -72,55 +73,16 @@ static struct resource i2c_resources[][2] = {
72static u32 i2c_rate[ARRAY_SIZE(i2c_resources)]; 73static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
73static struct platform_device omap_i2c_devices[] = { 74static struct platform_device omap_i2c_devices[] = {
74 I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]), 75 I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
75#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 76#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
76 I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]), 77 I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
77#endif 78#endif
78#if defined(CONFIG_ARCH_OMAP34XX) 79#if defined(CONFIG_ARCH_OMAP3)
79 I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]), 80 I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
80#endif 81#endif
81}; 82};
82 83
83#if defined(CONFIG_ARCH_OMAP24XX)
84static const int omap24xx_pins[][2] = {
85 { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA },
86 { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA },
87};
88#else
89static const int omap24xx_pins[][2] = {};
90#endif
91#if defined(CONFIG_ARCH_OMAP34XX)
92static const int omap34xx_pins[][2] = {
93 { K21_34XX_I2C1_SCL, J21_34XX_I2C1_SDA},
94 { AF15_34XX_I2C2_SCL, AE15_34XX_I2C2_SDA},
95 { AF14_34XX_I2C3_SCL, AG14_34XX_I2C3_SDA},
96};
97#else
98static const int omap34xx_pins[][2] = {};
99#endif
100
101#define OMAP_I2C_CMDLINE_SETUP (BIT(31)) 84#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
102 85
103static void __init omap_i2c_mux_pins(int bus)
104{
105 int scl, sda;
106
107 if (cpu_class_is_omap1()) {
108 scl = I2C_SCL;
109 sda = I2C_SDA;
110 } else if (cpu_is_omap24xx()) {
111 scl = omap24xx_pins[bus][0];
112 sda = omap24xx_pins[bus][1];
113 } else if (cpu_is_omap34xx()) {
114 scl = omap34xx_pins[bus][0];
115 sda = omap34xx_pins[bus][1];
116 } else {
117 return;
118 }
119
120 omap_cfg_reg(sda);
121 omap_cfg_reg(scl);
122}
123
124static int __init omap_i2c_nr_ports(void) 86static int __init omap_i2c_nr_ports(void)
125{ 87{
126 int ports = 0; 88 int ports = 0;
@@ -156,7 +118,11 @@ static int __init omap_i2c_add_bus(int bus_id)
156 res[1].start = irq; 118 res[1].start = irq;
157 } 119 }
158 120
159 omap_i2c_mux_pins(bus_id - 1); 121 if (cpu_class_is_omap1())
122 omap1_i2c_mux_pins(bus_id);
123 if (cpu_class_is_omap2())
124 omap2_i2c_mux_pins(bus_id);
125
160 return platform_device_register(pdev); 126 return platform_device_register(pdev);
161} 127}
162 128