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-rw-r--r--arch/arm/plat-iop/time.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 5730a0d7ed67..bed20f3669f4 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -51,7 +51,9 @@ iop3xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
51{ 51{
52 write_seqlock(&xtime_lock); 52 write_seqlock(&xtime_lock);
53 53
54 iop3xx_cp6_enable();
54 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1)); 55 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));
56 iop3xx_cp6_disable();
55 57
56 while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1) 58 while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1)
57 >= ticks_per_jiffy) { 59 >= ticks_per_jiffy) {
@@ -85,10 +87,12 @@ void __init iop3xx_init_time(unsigned long tick_rate)
85 * We use timer 0 for our timer interrupt, and timer 1 as 87 * We use timer 0 for our timer interrupt, and timer 1 as
86 * monotonic counter for tracking missed jiffies. 88 * monotonic counter for tracking missed jiffies.
87 */ 89 */
90 iop3xx_cp6_enable();
88 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1)); 91 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));
89 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl)); 92 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
90 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff)); 93 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));
91 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl)); 94 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));
95 iop3xx_cp6_disable();
92 96
93 setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq); 97 setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq);
94} 98}