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-rw-r--r--arch/arm/mach-pxa/pxa27x.c66
1 files changed, 29 insertions, 37 deletions
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index f9f6a9c31f4b..3e4ab2279c99 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -34,6 +34,13 @@
34#include "devices.h" 34#include "devices.h"
35#include "clock.h" 35#include "clock.h"
36 36
37void pxa27x_clear_otgph(void)
38{
39 if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
40 PSSR |= PSSR_OTGPH;
41}
42EXPORT_SYMBOL(pxa27x_clear_otgph);
43
37/* Crystal clock: 13MHz */ 44/* Crystal clock: 13MHz */
38#define BASE_CLK 13000000 45#define BASE_CLK 13000000
39 46
@@ -183,36 +190,18 @@ static struct clk pxa27x_clks[] = {
183 * More ones like CP and general purpose register values are preserved 190 * More ones like CP and general purpose register values are preserved
184 * with the stack pointer in sleep.S. 191 * with the stack pointer in sleep.S.
185 */ 192 */
186enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, 193enum {
187
188 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
189 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
190 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
191 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
192
193 SLEEP_SAVE_PSTR, 194 SLEEP_SAVE_PSTR,
194
195 SLEEP_SAVE_CKEN, 195 SLEEP_SAVE_CKEN,
196
197 SLEEP_SAVE_MDREFR, 196 SLEEP_SAVE_MDREFR,
198 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, 197 SLEEP_SAVE_PCFR,
199 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
200
201 SLEEP_SAVE_COUNT 198 SLEEP_SAVE_COUNT
202}; 199};
203 200
204void pxa27x_cpu_pm_save(unsigned long *sleep_save) 201void pxa27x_cpu_pm_save(unsigned long *sleep_save)
205{ 202{
206 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
207
208 SAVE(GAFR0_L); SAVE(GAFR0_U);
209 SAVE(GAFR1_L); SAVE(GAFR1_U);
210 SAVE(GAFR2_L); SAVE(GAFR2_U);
211 SAVE(GAFR3_L); SAVE(GAFR3_U);
212
213 SAVE(MDREFR); 203 SAVE(MDREFR);
214 SAVE(PWER); SAVE(PCFR); SAVE(PRER); 204 SAVE(PCFR);
215 SAVE(PFER); SAVE(PKWR);
216 205
217 SAVE(CKEN); 206 SAVE(CKEN);
218 SAVE(PSTR); 207 SAVE(PSTR);
@@ -220,24 +209,12 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save)
220 209
221void pxa27x_cpu_pm_restore(unsigned long *sleep_save) 210void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
222{ 211{
223 /* ensure not to come back here if it wasn't intended */
224 PSPR = 0;
225
226 /* restore registers */
227 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
228 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
229 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
230 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
231 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
232
233 RESTORE(MDREFR); 212 RESTORE(MDREFR);
234 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); 213 RESTORE(PCFR);
235 RESTORE(PFER); RESTORE(PKWR);
236 214
237 PSSR = PSSR_RDH | PSSR_PH; 215 PSSR = PSSR_RDH | PSSR_PH;
238 216
239 RESTORE(CKEN); 217 RESTORE(CKEN);
240
241 RESTORE(PSTR); 218 RESTORE(PSTR);
242} 219}
243 220
@@ -259,8 +236,6 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
259 pxa_cpu_standby(); 236 pxa_cpu_standby();
260 break; 237 break;
261 case PM_SUSPEND_MEM: 238 case PM_SUSPEND_MEM:
262 /* set resume return address */
263 PSPR = virt_to_phys(pxa_cpu_resume);
264 pxa27x_cpu_suspend(PWRMODE_SLEEP); 239 pxa27x_cpu_suspend(PWRMODE_SLEEP);
265 break; 240 break;
266 } 241 }
@@ -271,12 +246,27 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
271 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; 246 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
272} 247}
273 248
249static int pxa27x_cpu_pm_prepare(void)
250{
251 /* set resume return address */
252 PSPR = virt_to_phys(pxa_cpu_resume);
253 return 0;
254}
255
256static void pxa27x_cpu_pm_finish(void)
257{
258 /* ensure not to come back here if it wasn't intended */
259 PSPR = 0;
260}
261
274static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { 262static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
275 .save_count = SLEEP_SAVE_COUNT, 263 .save_count = SLEEP_SAVE_COUNT,
276 .save = pxa27x_cpu_pm_save, 264 .save = pxa27x_cpu_pm_save,
277 .restore = pxa27x_cpu_pm_restore, 265 .restore = pxa27x_cpu_pm_restore,
278 .valid = pxa27x_cpu_pm_valid, 266 .valid = pxa27x_cpu_pm_valid,
279 .enter = pxa27x_cpu_pm_enter, 267 .enter = pxa27x_cpu_pm_enter,
268 .prepare = pxa27x_cpu_pm_prepare,
269 .finish = pxa27x_cpu_pm_finish,
280}; 270};
281 271
282static void __init pxa27x_init_pm(void) 272static void __init pxa27x_init_pm(void)
@@ -349,7 +339,7 @@ struct platform_device pxa27x_device_i2c_power = {
349 .num_resources = ARRAY_SIZE(i2c_power_resources), 339 .num_resources = ARRAY_SIZE(i2c_power_resources),
350}; 340};
351 341
352void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info) 342void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
353{ 343{
354 local_irq_disable(); 344 local_irq_disable();
355 PCFR |= PCFR_PI2CEN; 345 PCFR |= PCFR_PI2CEN;
@@ -376,6 +366,8 @@ static struct sys_device pxa27x_sysdev[] = {
376 { 366 {
377 .cls = &pxa_irq_sysclass, 367 .cls = &pxa_irq_sysclass,
378 }, { 368 }, {
369 .cls = &pxa2xx_mfp_sysclass,
370 }, {
379 .cls = &pxa_gpio_sysclass, 371 .cls = &pxa_gpio_sysclass,
380 }, 372 },
381}; 373};