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-rw-r--r--arch/arm/mach-omap2/Makefile11
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c291
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c319
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c173
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c130
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c151
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.h38
7 files changed, 414 insertions, 699 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index ff1466fbf5c5..8a75d176ec6c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -145,9 +145,14 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
145obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o 145obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o
146 146
147# hwmod data 147# hwmod data
148obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o 148obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \
149obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o 149 omap_hwmod_2xxx_3xxx_interconnect_data.o \
150obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o 150 omap_hwmod_2420_data.o
151obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \
152 omap_hwmod_2xxx_3xxx_interconnect_data.o \
153 omap_hwmod_2430_data.o
154obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \
155 omap_hwmod_3xxx_data.o
151obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o 156obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
152 157
153# EMU peripherals 158# EMU peripherals
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 1a7ce3ec0c0b..3ec625c40c1f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod;
114static struct omap_hwmod omap2420_mcbsp2_hwmod; 114static struct omap_hwmod omap2420_mcbsp2_hwmod;
115 115
116/* l4 core -> mcspi1 interface */ 116/* l4 core -> mcspi1 interface */
117static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = {
118 {
119 .pa_start = 0x48098000,
120 .pa_end = 0x480980ff,
121 .flags = ADDR_TYPE_RT,
122 },
123 { }
124};
125
126static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { 117static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = {
127 .master = &omap2420_l4_core_hwmod, 118 .master = &omap2420_l4_core_hwmod,
128 .slave = &omap2420_mcspi1_hwmod, 119 .slave = &omap2420_mcspi1_hwmod,
129 .clk = "mcspi1_ick", 120 .clk = "mcspi1_ick",
130 .addr = omap2420_mcspi1_addr_space, 121 .addr = omap2_mcspi1_addr_space,
131 .user = OCP_USER_MPU | OCP_USER_SDMA, 122 .user = OCP_USER_MPU | OCP_USER_SDMA,
132}; 123};
133 124
134/* l4 core -> mcspi2 interface */ 125/* l4 core -> mcspi2 interface */
135static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = {
136 {
137 .pa_start = 0x4809a000,
138 .pa_end = 0x4809a0ff,
139 .flags = ADDR_TYPE_RT,
140 },
141 { }
142};
143
144static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { 126static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = {
145 .master = &omap2420_l4_core_hwmod, 127 .master = &omap2420_l4_core_hwmod,
146 .slave = &omap2420_mcspi2_hwmod, 128 .slave = &omap2420_mcspi2_hwmod,
147 .clk = "mcspi2_ick", 129 .clk = "mcspi2_ick",
148 .addr = omap2420_mcspi2_addr_space, 130 .addr = omap2_mcspi2_addr_space,
149 .user = OCP_USER_MPU | OCP_USER_SDMA, 131 .user = OCP_USER_MPU | OCP_USER_SDMA,
150}; 132};
151 133
@@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
157}; 139};
158 140
159/* L4 CORE -> UART1 interface */ 141/* L4 CORE -> UART1 interface */
160static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = {
161 {
162 .pa_start = OMAP2_UART1_BASE,
163 .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
164 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
165 },
166 { }
167};
168
169static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { 142static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
170 .master = &omap2420_l4_core_hwmod, 143 .master = &omap2420_l4_core_hwmod,
171 .slave = &omap2420_uart1_hwmod, 144 .slave = &omap2420_uart1_hwmod,
172 .clk = "uart1_ick", 145 .clk = "uart1_ick",
173 .addr = omap2420_uart1_addr_space, 146 .addr = omap2xxx_uart1_addr_space,
174 .user = OCP_USER_MPU | OCP_USER_SDMA, 147 .user = OCP_USER_MPU | OCP_USER_SDMA,
175}; 148};
176 149
177/* L4 CORE -> UART2 interface */ 150/* L4 CORE -> UART2 interface */
178static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = {
179 {
180 .pa_start = OMAP2_UART2_BASE,
181 .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
182 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
183 },
184 { }
185};
186
187static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { 151static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
188 .master = &omap2420_l4_core_hwmod, 152 .master = &omap2420_l4_core_hwmod,
189 .slave = &omap2420_uart2_hwmod, 153 .slave = &omap2420_uart2_hwmod,
190 .clk = "uart2_ick", 154 .clk = "uart2_ick",
191 .addr = omap2420_uart2_addr_space, 155 .addr = omap2xxx_uart2_addr_space,
192 .user = OCP_USER_MPU | OCP_USER_SDMA, 156 .user = OCP_USER_MPU | OCP_USER_SDMA,
193}; 157};
194 158
195/* L4 PER -> UART3 interface */ 159/* L4 PER -> UART3 interface */
196static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = {
197 {
198 .pa_start = OMAP2_UART3_BASE,
199 .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
200 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
201 },
202 { }
203};
204
205static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { 160static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
206 .master = &omap2420_l4_core_hwmod, 161 .master = &omap2420_l4_core_hwmod,
207 .slave = &omap2420_uart3_hwmod, 162 .slave = &omap2420_uart3_hwmod,
208 .clk = "uart3_ick", 163 .clk = "uart3_ick",
209 .addr = omap2420_uart3_addr_space, 164 .addr = omap2xxx_uart3_addr_space,
210 .user = OCP_USER_MPU | OCP_USER_SDMA, 165 .user = OCP_USER_MPU | OCP_USER_SDMA,
211}; 166};
212 167
213/* I2C IP block address space length (in bytes) */
214#define OMAP2_I2C_AS_LEN 128
215
216/* L4 CORE -> I2C1 interface */ 168/* L4 CORE -> I2C1 interface */
217static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = {
218 {
219 .pa_start = 0x48070000,
220 .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
221 .flags = ADDR_TYPE_RT,
222 },
223 { }
224};
225
226static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { 169static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {
227 .master = &omap2420_l4_core_hwmod, 170 .master = &omap2420_l4_core_hwmod,
228 .slave = &omap2420_i2c1_hwmod, 171 .slave = &omap2420_i2c1_hwmod,
229 .clk = "i2c1_ick", 172 .clk = "i2c1_ick",
230 .addr = omap2420_i2c1_addr_space, 173 .addr = omap2_i2c1_addr_space,
231 .user = OCP_USER_MPU | OCP_USER_SDMA, 174 .user = OCP_USER_MPU | OCP_USER_SDMA,
232}; 175};
233 176
234/* L4 CORE -> I2C2 interface */ 177/* L4 CORE -> I2C2 interface */
235static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = {
236 {
237 .pa_start = 0x48072000,
238 .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
239 .flags = ADDR_TYPE_RT,
240 },
241 { }
242};
243
244static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { 178static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
245 .master = &omap2420_l4_core_hwmod, 179 .master = &omap2420_l4_core_hwmod,
246 .slave = &omap2420_i2c2_hwmod, 180 .slave = &omap2420_i2c2_hwmod,
247 .clk = "i2c2_ick", 181 .clk = "i2c2_ick",
248 .addr = omap2420_i2c2_addr_space, 182 .addr = omap2_i2c2_addr_space,
249 .user = OCP_USER_MPU | OCP_USER_SDMA, 183 .user = OCP_USER_MPU | OCP_USER_SDMA,
250}; 184};
251 185
@@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
414 { .irq = 38, }, 348 { .irq = 38, },
415}; 349};
416 350
417static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = {
418 {
419 .pa_start = 0x4802a000,
420 .pa_end = 0x4802a000 + SZ_1K - 1,
421 .flags = ADDR_TYPE_RT
422 },
423 { }
424};
425 351
426/* l4_core -> timer2 */ 352/* l4_core -> timer2 */
427static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { 353static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
428 .master = &omap2420_l4_core_hwmod, 354 .master = &omap2420_l4_core_hwmod,
429 .slave = &omap2420_timer2_hwmod, 355 .slave = &omap2420_timer2_hwmod,
430 .clk = "gpt2_ick", 356 .clk = "gpt2_ick",
431 .addr = omap2420_timer2_addrs, 357 .addr = omap2xxx_timer2_addrs,
432 .user = OCP_USER_MPU | OCP_USER_SDMA, 358 .user = OCP_USER_MPU | OCP_USER_SDMA,
433}; 359};
434 360
@@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = {
464 { .irq = 39, }, 390 { .irq = 39, },
465}; 391};
466 392
467static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = {
468 {
469 .pa_start = 0x48078000,
470 .pa_end = 0x48078000 + SZ_1K - 1,
471 .flags = ADDR_TYPE_RT
472 },
473 { }
474};
475
476/* l4_core -> timer3 */ 393/* l4_core -> timer3 */
477static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { 394static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = {
478 .master = &omap2420_l4_core_hwmod, 395 .master = &omap2420_l4_core_hwmod,
479 .slave = &omap2420_timer3_hwmod, 396 .slave = &omap2420_timer3_hwmod,
480 .clk = "gpt3_ick", 397 .clk = "gpt3_ick",
481 .addr = omap2420_timer3_addrs, 398 .addr = omap2xxx_timer3_addrs,
482 .user = OCP_USER_MPU | OCP_USER_SDMA, 399 .user = OCP_USER_MPU | OCP_USER_SDMA,
483}; 400};
484 401
@@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = {
514 { .irq = 40, }, 431 { .irq = 40, },
515}; 432};
516 433
517static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = {
518 {
519 .pa_start = 0x4807a000,
520 .pa_end = 0x4807a000 + SZ_1K - 1,
521 .flags = ADDR_TYPE_RT
522 },
523 { }
524};
525
526/* l4_core -> timer4 */ 434/* l4_core -> timer4 */
527static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { 435static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = {
528 .master = &omap2420_l4_core_hwmod, 436 .master = &omap2420_l4_core_hwmod,
529 .slave = &omap2420_timer4_hwmod, 437 .slave = &omap2420_timer4_hwmod,
530 .clk = "gpt4_ick", 438 .clk = "gpt4_ick",
531 .addr = omap2420_timer4_addrs, 439 .addr = omap2xxx_timer4_addrs,
532 .user = OCP_USER_MPU | OCP_USER_SDMA, 440 .user = OCP_USER_MPU | OCP_USER_SDMA,
533}; 441};
534 442
@@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = {
564 { .irq = 41, }, 472 { .irq = 41, },
565}; 473};
566 474
567static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = {
568 {
569 .pa_start = 0x4807c000,
570 .pa_end = 0x4807c000 + SZ_1K - 1,
571 .flags = ADDR_TYPE_RT
572 },
573 { }
574};
575
576/* l4_core -> timer5 */ 475/* l4_core -> timer5 */
577static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { 476static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = {
578 .master = &omap2420_l4_core_hwmod, 477 .master = &omap2420_l4_core_hwmod,
579 .slave = &omap2420_timer5_hwmod, 478 .slave = &omap2420_timer5_hwmod,
580 .clk = "gpt5_ick", 479 .clk = "gpt5_ick",
581 .addr = omap2420_timer5_addrs, 480 .addr = omap2xxx_timer5_addrs,
582 .user = OCP_USER_MPU | OCP_USER_SDMA, 481 .user = OCP_USER_MPU | OCP_USER_SDMA,
583}; 482};
584 483
@@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = {
615 { .irq = 42, }, 514 { .irq = 42, },
616}; 515};
617 516
618static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = {
619 {
620 .pa_start = 0x4807e000,
621 .pa_end = 0x4807e000 + SZ_1K - 1,
622 .flags = ADDR_TYPE_RT
623 },
624 { }
625};
626
627/* l4_core -> timer6 */ 517/* l4_core -> timer6 */
628static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { 518static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = {
629 .master = &omap2420_l4_core_hwmod, 519 .master = &omap2420_l4_core_hwmod,
630 .slave = &omap2420_timer6_hwmod, 520 .slave = &omap2420_timer6_hwmod,
631 .clk = "gpt6_ick", 521 .clk = "gpt6_ick",
632 .addr = omap2420_timer6_addrs, 522 .addr = omap2xxx_timer6_addrs,
633 .user = OCP_USER_MPU | OCP_USER_SDMA, 523 .user = OCP_USER_MPU | OCP_USER_SDMA,
634}; 524};
635 525
@@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = {
665 { .irq = 43, }, 555 { .irq = 43, },
666}; 556};
667 557
668static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = {
669 {
670 .pa_start = 0x48080000,
671 .pa_end = 0x48080000 + SZ_1K - 1,
672 .flags = ADDR_TYPE_RT
673 },
674 { }
675};
676
677/* l4_core -> timer7 */ 558/* l4_core -> timer7 */
678static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { 559static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = {
679 .master = &omap2420_l4_core_hwmod, 560 .master = &omap2420_l4_core_hwmod,
680 .slave = &omap2420_timer7_hwmod, 561 .slave = &omap2420_timer7_hwmod,
681 .clk = "gpt7_ick", 562 .clk = "gpt7_ick",
682 .addr = omap2420_timer7_addrs, 563 .addr = omap2xxx_timer7_addrs,
683 .user = OCP_USER_MPU | OCP_USER_SDMA, 564 .user = OCP_USER_MPU | OCP_USER_SDMA,
684}; 565};
685 566
@@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = {
715 { .irq = 44, }, 596 { .irq = 44, },
716}; 597};
717 598
718static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = {
719 {
720 .pa_start = 0x48082000,
721 .pa_end = 0x48082000 + SZ_1K - 1,
722 .flags = ADDR_TYPE_RT
723 },
724 { }
725};
726
727/* l4_core -> timer8 */ 599/* l4_core -> timer8 */
728static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { 600static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = {
729 .master = &omap2420_l4_core_hwmod, 601 .master = &omap2420_l4_core_hwmod,
730 .slave = &omap2420_timer8_hwmod, 602 .slave = &omap2420_timer8_hwmod,
731 .clk = "gpt8_ick", 603 .clk = "gpt8_ick",
732 .addr = omap2420_timer8_addrs, 604 .addr = omap2xxx_timer8_addrs,
733 .user = OCP_USER_MPU | OCP_USER_SDMA, 605 .user = OCP_USER_MPU | OCP_USER_SDMA,
734}; 606};
735 607
@@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = {
765 { .irq = 45, }, 637 { .irq = 45, },
766}; 638};
767 639
768static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = {
769 {
770 .pa_start = 0x48084000,
771 .pa_end = 0x48084000 + SZ_1K - 1,
772 .flags = ADDR_TYPE_RT
773 },
774 { }
775};
776
777/* l4_core -> timer9 */ 640/* l4_core -> timer9 */
778static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { 641static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = {
779 .master = &omap2420_l4_core_hwmod, 642 .master = &omap2420_l4_core_hwmod,
780 .slave = &omap2420_timer9_hwmod, 643 .slave = &omap2420_timer9_hwmod,
781 .clk = "gpt9_ick", 644 .clk = "gpt9_ick",
782 .addr = omap2420_timer9_addrs, 645 .addr = omap2xxx_timer9_addrs,
783 .user = OCP_USER_MPU | OCP_USER_SDMA, 646 .user = OCP_USER_MPU | OCP_USER_SDMA,
784}; 647};
785 648
@@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = {
815 { .irq = 46, }, 678 { .irq = 46, },
816}; 679};
817 680
818static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = {
819 {
820 .pa_start = 0x48086000,
821 .pa_end = 0x48086000 + SZ_1K - 1,
822 .flags = ADDR_TYPE_RT
823 },
824 { }
825};
826
827/* l4_core -> timer10 */ 681/* l4_core -> timer10 */
828static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { 682static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = {
829 .master = &omap2420_l4_core_hwmod, 683 .master = &omap2420_l4_core_hwmod,
830 .slave = &omap2420_timer10_hwmod, 684 .slave = &omap2420_timer10_hwmod,
831 .clk = "gpt10_ick", 685 .clk = "gpt10_ick",
832 .addr = omap2420_timer10_addrs, 686 .addr = omap2_timer10_addrs,
833 .user = OCP_USER_MPU | OCP_USER_SDMA, 687 .user = OCP_USER_MPU | OCP_USER_SDMA,
834}; 688};
835 689
@@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = {
865 { .irq = 47, }, 719 { .irq = 47, },
866}; 720};
867 721
868static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = {
869 {
870 .pa_start = 0x48088000,
871 .pa_end = 0x48088000 + SZ_1K - 1,
872 .flags = ADDR_TYPE_RT
873 },
874 { }
875};
876
877/* l4_core -> timer11 */ 722/* l4_core -> timer11 */
878static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { 723static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = {
879 .master = &omap2420_l4_core_hwmod, 724 .master = &omap2420_l4_core_hwmod,
880 .slave = &omap2420_timer11_hwmod, 725 .slave = &omap2420_timer11_hwmod,
881 .clk = "gpt11_ick", 726 .clk = "gpt11_ick",
882 .addr = omap2420_timer11_addrs, 727 .addr = omap2_timer11_addrs,
883 .user = OCP_USER_MPU | OCP_USER_SDMA, 728 .user = OCP_USER_MPU | OCP_USER_SDMA,
884}; 729};
885 730
@@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = {
915 { .irq = 48, }, 760 { .irq = 48, },
916}; 761};
917 762
918static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = {
919 {
920 .pa_start = 0x4808a000,
921 .pa_end = 0x4808a000 + SZ_1K - 1,
922 .flags = ADDR_TYPE_RT
923 },
924 { }
925};
926
927/* l4_core -> timer12 */ 763/* l4_core -> timer12 */
928static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { 764static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = {
929 .master = &omap2420_l4_core_hwmod, 765 .master = &omap2420_l4_core_hwmod,
930 .slave = &omap2420_timer12_hwmod, 766 .slave = &omap2420_timer12_hwmod,
931 .clk = "gpt12_ick", 767 .clk = "gpt12_ick",
932 .addr = omap2420_timer12_addrs, 768 .addr = omap2xxx_timer12_addrs,
933 .user = OCP_USER_MPU | OCP_USER_SDMA, 769 .user = OCP_USER_MPU | OCP_USER_SDMA,
934}; 770};
935 771
@@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
1178 &omap2420_dss__l3, 1014 &omap2420_dss__l3,
1179}; 1015};
1180 1016
1181static struct omap_hwmod_addr_space omap2420_dss_addrs[] = {
1182 {
1183 .pa_start = 0x48050000,
1184 .pa_end = 0x480503FF,
1185 .flags = ADDR_TYPE_RT
1186 },
1187 { }
1188};
1189
1190/* l4_core -> dss */ 1017/* l4_core -> dss */
1191static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { 1018static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {
1192 .master = &omap2420_l4_core_hwmod, 1019 .master = &omap2420_l4_core_hwmod,
1193 .slave = &omap2420_dss_core_hwmod, 1020 .slave = &omap2420_dss_core_hwmod,
1194 .clk = "dss_ick", 1021 .clk = "dss_ick",
1195 .addr = omap2420_dss_addrs, 1022 .addr = omap2_dss_addrs,
1196 .fw = { 1023 .fw = {
1197 .omap2 = { 1024 .omap2 = {
1198 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, 1025 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
@@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
1262 { .irq = 25 }, 1089 { .irq = 25 },
1263}; 1090};
1264 1091
1265static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = {
1266 {
1267 .pa_start = 0x48050400,
1268 .pa_end = 0x480507FF,
1269 .flags = ADDR_TYPE_RT
1270 },
1271 { }
1272};
1273
1274/* l4_core -> dss_dispc */ 1092/* l4_core -> dss_dispc */
1275static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { 1093static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
1276 .master = &omap2420_l4_core_hwmod, 1094 .master = &omap2420_l4_core_hwmod,
1277 .slave = &omap2420_dss_dispc_hwmod, 1095 .slave = &omap2420_dss_dispc_hwmod,
1278 .clk = "dss_ick", 1096 .clk = "dss_ick",
1279 .addr = omap2420_dss_dispc_addrs, 1097 .addr = omap2_dss_dispc_addrs,
1280 .fw = { 1098 .fw = {
1281 .omap2 = { 1099 .omap2 = {
1282 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, 1100 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
@@ -1332,21 +1150,12 @@ static struct omap_hwmod_class omap2420_rfbi_hwmod_class = {
1332 .sysc = &omap2420_rfbi_sysc, 1150 .sysc = &omap2420_rfbi_sysc,
1333}; 1151};
1334 1152
1335static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = {
1336 {
1337 .pa_start = 0x48050800,
1338 .pa_end = 0x48050BFF,
1339 .flags = ADDR_TYPE_RT
1340 },
1341 { }
1342};
1343
1344/* l4_core -> dss_rfbi */ 1153/* l4_core -> dss_rfbi */
1345static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { 1154static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
1346 .master = &omap2420_l4_core_hwmod, 1155 .master = &omap2420_l4_core_hwmod,
1347 .slave = &omap2420_dss_rfbi_hwmod, 1156 .slave = &omap2420_dss_rfbi_hwmod,
1348 .clk = "dss_ick", 1157 .clk = "dss_ick",
1349 .addr = omap2420_dss_rfbi_addrs, 1158 .addr = omap2_dss_rfbi_addrs,
1350 .fw = { 1159 .fw = {
1351 .omap2 = { 1160 .omap2 = {
1352 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, 1161 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
@@ -1387,22 +1196,12 @@ static struct omap_hwmod_class omap2420_venc_hwmod_class = {
1387 .name = "venc", 1196 .name = "venc",
1388}; 1197};
1389 1198
1390/* dss_venc */
1391static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = {
1392 {
1393 .pa_start = 0x48050C00,
1394 .pa_end = 0x48050FFF,
1395 .flags = ADDR_TYPE_RT
1396 },
1397 { }
1398};
1399
1400/* l4_core -> dss_venc */ 1199/* l4_core -> dss_venc */
1401static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { 1200static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
1402 .master = &omap2420_l4_core_hwmod, 1201 .master = &omap2420_l4_core_hwmod,
1403 .slave = &omap2420_dss_venc_hwmod, 1202 .slave = &omap2420_dss_venc_hwmod,
1404 .clk = "dss_54m_fck", 1203 .clk = "dss_54m_fck",
1405 .addr = omap2420_dss_venc_addrs, 1204 .addr = omap2_dss_venc_addrs,
1406 .fw = { 1205 .fw = {
1407 .omap2 = { 1206 .omap2 = {
1408 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, 1207 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
@@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
1783 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ 1582 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
1784}; 1583};
1785 1584
1786static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
1787 {
1788 .pa_start = 0x48056000,
1789 .pa_end = 0x48056fff,
1790 .flags = ADDR_TYPE_RT
1791 },
1792 { }
1793};
1794
1795/* dma_system -> L3 */ 1585/* dma_system -> L3 */
1796static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { 1586static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
1797 .master = &omap2420_dma_system_hwmod, 1587 .master = &omap2420_dma_system_hwmod,
@@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
1810 .master = &omap2420_l4_core_hwmod, 1600 .master = &omap2420_l4_core_hwmod,
1811 .slave = &omap2420_dma_system_hwmod, 1601 .slave = &omap2420_dma_system_hwmod,
1812 .clk = "sdma_ick", 1602 .clk = "sdma_ick",
1813 .addr = omap2420_dma_system_addrs, 1603 .addr = omap2_dma_system_addrs,
1814 .user = OCP_USER_MPU | OCP_USER_SDMA, 1604 .user = OCP_USER_MPU | OCP_USER_SDMA,
1815}; 1605};
1816 1606
@@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
1862 { .name = "iva", .irq = 34 }, 1652 { .name = "iva", .irq = 34 },
1863}; 1653};
1864 1654
1865static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = {
1866 {
1867 .pa_start = 0x48094000,
1868 .pa_end = 0x480941ff,
1869 .flags = ADDR_TYPE_RT,
1870 },
1871 { }
1872};
1873
1874/* l4_core -> mailbox */ 1655/* l4_core -> mailbox */
1875static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { 1656static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = {
1876 .master = &omap2420_l4_core_hwmod, 1657 .master = &omap2420_l4_core_hwmod,
1877 .slave = &omap2420_mailbox_hwmod, 1658 .slave = &omap2420_mailbox_hwmod,
1878 .addr = omap2420_mailbox_addrs, 1659 .addr = omap2_mailbox_addrs,
1879 .user = OCP_USER_MPU | OCP_USER_SDMA, 1660 .user = OCP_USER_MPU | OCP_USER_SDMA,
1880}; 1661};
1881 1662
@@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
2037 { .name = "tx", .dma_req = 31 }, 1818 { .name = "tx", .dma_req = 31 },
2038}; 1819};
2039 1820
2040static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = {
2041 {
2042 .name = "mpu",
2043 .pa_start = 0x48074000,
2044 .pa_end = 0x480740ff,
2045 .flags = ADDR_TYPE_RT
2046 },
2047 { }
2048};
2049
2050/* l4_core -> mcbsp1 */ 1821/* l4_core -> mcbsp1 */
2051static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { 1822static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
2052 .master = &omap2420_l4_core_hwmod, 1823 .master = &omap2420_l4_core_hwmod,
2053 .slave = &omap2420_mcbsp1_hwmod, 1824 .slave = &omap2420_mcbsp1_hwmod,
2054 .clk = "mcbsp1_ick", 1825 .clk = "mcbsp1_ick",
2055 .addr = omap2420_mcbsp1_addrs, 1826 .addr = omap2_mcbsp1_addrs,
2056 .user = OCP_USER_MPU | OCP_USER_SDMA, 1827 .user = OCP_USER_MPU | OCP_USER_SDMA,
2057}; 1828};
2058 1829
@@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
2094 { .name = "tx", .dma_req = 33 }, 1865 { .name = "tx", .dma_req = 33 },
2095}; 1866};
2096 1867
2097static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = {
2098 {
2099 .name = "mpu",
2100 .pa_start = 0x48076000,
2101 .pa_end = 0x480760ff,
2102 .flags = ADDR_TYPE_RT
2103 },
2104 { }
2105};
2106
2107/* l4_core -> mcbsp2 */ 1868/* l4_core -> mcbsp2 */
2108static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { 1869static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
2109 .master = &omap2420_l4_core_hwmod, 1870 .master = &omap2420_l4_core_hwmod,
2110 .slave = &omap2420_mcbsp2_hwmod, 1871 .slave = &omap2420_mcbsp2_hwmod,
2111 .clk = "mcbsp2_ick", 1872 .clk = "mcbsp2_ick",
2112 .addr = omap2420_mcbsp2_addrs, 1873 .addr = omap2xxx_mcbsp2_addrs,
2113 .user = OCP_USER_MPU | OCP_USER_SDMA, 1874 .user = OCP_USER_MPU | OCP_USER_SDMA,
2114}; 1875};
2115 1876
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index da287947cc18..9531ef2802f2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -131,42 +131,21 @@ static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {
131 .user = OCP_USER_MPU, 131 .user = OCP_USER_MPU,
132}; 132};
133 133
134/* I2C IP block address space length (in bytes) */
135#define OMAP2_I2C_AS_LEN 128
136
137/* L4 CORE -> I2C1 interface */ 134/* L4 CORE -> I2C1 interface */
138static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = {
139 {
140 .pa_start = 0x48070000,
141 .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
142 .flags = ADDR_TYPE_RT,
143 },
144 { }
145};
146
147static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 135static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {
148 .master = &omap2430_l4_core_hwmod, 136 .master = &omap2430_l4_core_hwmod,
149 .slave = &omap2430_i2c1_hwmod, 137 .slave = &omap2430_i2c1_hwmod,
150 .clk = "i2c1_ick", 138 .clk = "i2c1_ick",
151 .addr = omap2430_i2c1_addr_space, 139 .addr = omap2_i2c1_addr_space,
152 .user = OCP_USER_MPU | OCP_USER_SDMA, 140 .user = OCP_USER_MPU | OCP_USER_SDMA,
153}; 141};
154 142
155/* L4 CORE -> I2C2 interface */ 143/* L4 CORE -> I2C2 interface */
156static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = {
157 {
158 .pa_start = 0x48072000,
159 .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
160 .flags = ADDR_TYPE_RT,
161 },
162 { }
163};
164
165static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 144static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {
166 .master = &omap2430_l4_core_hwmod, 145 .master = &omap2430_l4_core_hwmod,
167 .slave = &omap2430_i2c2_hwmod, 146 .slave = &omap2430_i2c2_hwmod,
168 .clk = "i2c2_ick", 147 .clk = "i2c2_ick",
169 .addr = omap2430_i2c2_addr_space, 148 .addr = omap2_i2c2_addr_space,
170 .user = OCP_USER_MPU | OCP_USER_SDMA, 149 .user = OCP_USER_MPU | OCP_USER_SDMA,
171}; 150};
172 151
@@ -178,56 +157,29 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
178}; 157};
179 158
180/* L4 CORE -> UART1 interface */ 159/* L4 CORE -> UART1 interface */
181static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = {
182 {
183 .pa_start = OMAP2_UART1_BASE,
184 .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
185 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
186 },
187 { }
188};
189
190static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { 160static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
191 .master = &omap2430_l4_core_hwmod, 161 .master = &omap2430_l4_core_hwmod,
192 .slave = &omap2430_uart1_hwmod, 162 .slave = &omap2430_uart1_hwmod,
193 .clk = "uart1_ick", 163 .clk = "uart1_ick",
194 .addr = omap2430_uart1_addr_space, 164 .addr = omap2xxx_uart1_addr_space,
195 .user = OCP_USER_MPU | OCP_USER_SDMA, 165 .user = OCP_USER_MPU | OCP_USER_SDMA,
196}; 166};
197 167
198/* L4 CORE -> UART2 interface */ 168/* L4 CORE -> UART2 interface */
199static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = {
200 {
201 .pa_start = OMAP2_UART2_BASE,
202 .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
203 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
204 },
205 { }
206};
207
208static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { 169static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
209 .master = &omap2430_l4_core_hwmod, 170 .master = &omap2430_l4_core_hwmod,
210 .slave = &omap2430_uart2_hwmod, 171 .slave = &omap2430_uart2_hwmod,
211 .clk = "uart2_ick", 172 .clk = "uart2_ick",
212 .addr = omap2430_uart2_addr_space, 173 .addr = omap2xxx_uart2_addr_space,
213 .user = OCP_USER_MPU | OCP_USER_SDMA, 174 .user = OCP_USER_MPU | OCP_USER_SDMA,
214}; 175};
215 176
216/* L4 PER -> UART3 interface */ 177/* L4 PER -> UART3 interface */
217static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = {
218 {
219 .pa_start = OMAP2_UART3_BASE,
220 .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
221 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
222 },
223 { }
224};
225
226static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { 178static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
227 .master = &omap2430_l4_core_hwmod, 179 .master = &omap2430_l4_core_hwmod,
228 .slave = &omap2430_uart3_hwmod, 180 .slave = &omap2430_uart3_hwmod,
229 .clk = "uart3_ick", 181 .clk = "uart3_ick",
230 .addr = omap2430_uart3_addr_space, 182 .addr = omap2xxx_uart3_addr_space,
231 .user = OCP_USER_MPU | OCP_USER_SDMA, 183 .user = OCP_USER_MPU | OCP_USER_SDMA,
232}; 184};
233 185
@@ -260,15 +212,6 @@ static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {
260}; 212};
261 213
262/* L4 CORE -> MMC1 interface */ 214/* L4 CORE -> MMC1 interface */
263static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
264 {
265 .pa_start = 0x4809c000,
266 .pa_end = 0x4809c1ff,
267 .flags = ADDR_TYPE_RT,
268 },
269 { }
270};
271
272static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { 215static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
273 .master = &omap2430_l4_core_hwmod, 216 .master = &omap2430_l4_core_hwmod,
274 .slave = &omap2430_mmc1_hwmod, 217 .slave = &omap2430_mmc1_hwmod,
@@ -278,15 +221,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
278}; 221};
279 222
280/* L4 CORE -> MMC2 interface */ 223/* L4 CORE -> MMC2 interface */
281static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
282 {
283 .pa_start = 0x480b4000,
284 .pa_end = 0x480b41ff,
285 .flags = ADDR_TYPE_RT,
286 },
287 { }
288};
289
290static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { 224static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
291 .master = &omap2430_l4_core_hwmod, 225 .master = &omap2430_l4_core_hwmod,
292 .slave = &omap2430_mmc2_hwmod, 226 .slave = &omap2430_mmc2_hwmod,
@@ -332,51 +266,24 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
332}; 266};
333 267
334/* l4 core -> mcspi1 interface */ 268/* l4 core -> mcspi1 interface */
335static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = {
336 {
337 .pa_start = 0x48098000,
338 .pa_end = 0x480980ff,
339 .flags = ADDR_TYPE_RT,
340 },
341 { }
342};
343
344static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { 269static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
345 .master = &omap2430_l4_core_hwmod, 270 .master = &omap2430_l4_core_hwmod,
346 .slave = &omap2430_mcspi1_hwmod, 271 .slave = &omap2430_mcspi1_hwmod,
347 .clk = "mcspi1_ick", 272 .clk = "mcspi1_ick",
348 .addr = omap2430_mcspi1_addr_space, 273 .addr = omap2_mcspi1_addr_space,
349 .user = OCP_USER_MPU | OCP_USER_SDMA, 274 .user = OCP_USER_MPU | OCP_USER_SDMA,
350}; 275};
351 276
352/* l4 core -> mcspi2 interface */ 277/* l4 core -> mcspi2 interface */
353static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = {
354 {
355 .pa_start = 0x4809a000,
356 .pa_end = 0x4809a0ff,
357 .flags = ADDR_TYPE_RT,
358 },
359 { }
360};
361
362static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { 278static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {
363 .master = &omap2430_l4_core_hwmod, 279 .master = &omap2430_l4_core_hwmod,
364 .slave = &omap2430_mcspi2_hwmod, 280 .slave = &omap2430_mcspi2_hwmod,
365 .clk = "mcspi2_ick", 281 .clk = "mcspi2_ick",
366 .addr = omap2430_mcspi2_addr_space, 282 .addr = omap2_mcspi2_addr_space,
367 .user = OCP_USER_MPU | OCP_USER_SDMA, 283 .user = OCP_USER_MPU | OCP_USER_SDMA,
368}; 284};
369 285
370/* l4 core -> mcspi3 interface */ 286/* l4 core -> mcspi3 interface */
371static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
372 {
373 .pa_start = 0x480b8000,
374 .pa_end = 0x480b80ff,
375 .flags = ADDR_TYPE_RT,
376 },
377 { }
378};
379
380static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { 287static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
381 .master = &omap2430_l4_core_hwmod, 288 .master = &omap2430_l4_core_hwmod,
382 .slave = &omap2430_mcspi3_hwmod, 289 .slave = &omap2430_mcspi3_hwmod,
@@ -514,21 +421,12 @@ static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = {
514 { .irq = 38, }, 421 { .irq = 38, },
515}; 422};
516 423
517static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = {
518 {
519 .pa_start = 0x4802a000,
520 .pa_end = 0x4802a000 + SZ_1K - 1,
521 .flags = ADDR_TYPE_RT
522 },
523 { }
524};
525
526/* l4_core -> timer2 */ 424/* l4_core -> timer2 */
527static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { 425static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
528 .master = &omap2430_l4_core_hwmod, 426 .master = &omap2430_l4_core_hwmod,
529 .slave = &omap2430_timer2_hwmod, 427 .slave = &omap2430_timer2_hwmod,
530 .clk = "gpt2_ick", 428 .clk = "gpt2_ick",
531 .addr = omap2430_timer2_addrs, 429 .addr = omap2xxx_timer2_addrs,
532 .user = OCP_USER_MPU | OCP_USER_SDMA, 430 .user = OCP_USER_MPU | OCP_USER_SDMA,
533}; 431};
534 432
@@ -564,21 +462,12 @@ static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = {
564 { .irq = 39, }, 462 { .irq = 39, },
565}; 463};
566 464
567static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = {
568 {
569 .pa_start = 0x48078000,
570 .pa_end = 0x48078000 + SZ_1K - 1,
571 .flags = ADDR_TYPE_RT
572 },
573 { }
574};
575
576/* l4_core -> timer3 */ 465/* l4_core -> timer3 */
577static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { 466static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
578 .master = &omap2430_l4_core_hwmod, 467 .master = &omap2430_l4_core_hwmod,
579 .slave = &omap2430_timer3_hwmod, 468 .slave = &omap2430_timer3_hwmod,
580 .clk = "gpt3_ick", 469 .clk = "gpt3_ick",
581 .addr = omap2430_timer3_addrs, 470 .addr = omap2xxx_timer3_addrs,
582 .user = OCP_USER_MPU | OCP_USER_SDMA, 471 .user = OCP_USER_MPU | OCP_USER_SDMA,
583}; 472};
584 473
@@ -614,21 +503,12 @@ static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = {
614 { .irq = 40, }, 503 { .irq = 40, },
615}; 504};
616 505
617static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = {
618 {
619 .pa_start = 0x4807a000,
620 .pa_end = 0x4807a000 + SZ_1K - 1,
621 .flags = ADDR_TYPE_RT
622 },
623 { }
624};
625
626/* l4_core -> timer4 */ 506/* l4_core -> timer4 */
627static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { 507static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
628 .master = &omap2430_l4_core_hwmod, 508 .master = &omap2430_l4_core_hwmod,
629 .slave = &omap2430_timer4_hwmod, 509 .slave = &omap2430_timer4_hwmod,
630 .clk = "gpt4_ick", 510 .clk = "gpt4_ick",
631 .addr = omap2430_timer4_addrs, 511 .addr = omap2xxx_timer4_addrs,
632 .user = OCP_USER_MPU | OCP_USER_SDMA, 512 .user = OCP_USER_MPU | OCP_USER_SDMA,
633}; 513};
634 514
@@ -664,21 +544,12 @@ static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = {
664 { .irq = 41, }, 544 { .irq = 41, },
665}; 545};
666 546
667static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = {
668 {
669 .pa_start = 0x4807c000,
670 .pa_end = 0x4807c000 + SZ_1K - 1,
671 .flags = ADDR_TYPE_RT
672 },
673 { }
674};
675
676/* l4_core -> timer5 */ 547/* l4_core -> timer5 */
677static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { 548static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
678 .master = &omap2430_l4_core_hwmod, 549 .master = &omap2430_l4_core_hwmod,
679 .slave = &omap2430_timer5_hwmod, 550 .slave = &omap2430_timer5_hwmod,
680 .clk = "gpt5_ick", 551 .clk = "gpt5_ick",
681 .addr = omap2430_timer5_addrs, 552 .addr = omap2xxx_timer5_addrs,
682 .user = OCP_USER_MPU | OCP_USER_SDMA, 553 .user = OCP_USER_MPU | OCP_USER_SDMA,
683}; 554};
684 555
@@ -714,21 +585,12 @@ static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = {
714 { .irq = 42, }, 585 { .irq = 42, },
715}; 586};
716 587
717static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = {
718 {
719 .pa_start = 0x4807e000,
720 .pa_end = 0x4807e000 + SZ_1K - 1,
721 .flags = ADDR_TYPE_RT
722 },
723 { }
724};
725
726/* l4_core -> timer6 */ 588/* l4_core -> timer6 */
727static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { 589static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
728 .master = &omap2430_l4_core_hwmod, 590 .master = &omap2430_l4_core_hwmod,
729 .slave = &omap2430_timer6_hwmod, 591 .slave = &omap2430_timer6_hwmod,
730 .clk = "gpt6_ick", 592 .clk = "gpt6_ick",
731 .addr = omap2430_timer6_addrs, 593 .addr = omap2xxx_timer6_addrs,
732 .user = OCP_USER_MPU | OCP_USER_SDMA, 594 .user = OCP_USER_MPU | OCP_USER_SDMA,
733}; 595};
734 596
@@ -764,21 +626,12 @@ static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = {
764 { .irq = 43, }, 626 { .irq = 43, },
765}; 627};
766 628
767static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = {
768 {
769 .pa_start = 0x48080000,
770 .pa_end = 0x48080000 + SZ_1K - 1,
771 .flags = ADDR_TYPE_RT
772 },
773 { }
774};
775
776/* l4_core -> timer7 */ 629/* l4_core -> timer7 */
777static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { 630static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
778 .master = &omap2430_l4_core_hwmod, 631 .master = &omap2430_l4_core_hwmod,
779 .slave = &omap2430_timer7_hwmod, 632 .slave = &omap2430_timer7_hwmod,
780 .clk = "gpt7_ick", 633 .clk = "gpt7_ick",
781 .addr = omap2430_timer7_addrs, 634 .addr = omap2xxx_timer7_addrs,
782 .user = OCP_USER_MPU | OCP_USER_SDMA, 635 .user = OCP_USER_MPU | OCP_USER_SDMA,
783}; 636};
784 637
@@ -814,21 +667,12 @@ static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = {
814 { .irq = 44, }, 667 { .irq = 44, },
815}; 668};
816 669
817static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = {
818 {
819 .pa_start = 0x48082000,
820 .pa_end = 0x48082000 + SZ_1K - 1,
821 .flags = ADDR_TYPE_RT
822 },
823 { }
824};
825
826/* l4_core -> timer8 */ 670/* l4_core -> timer8 */
827static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { 671static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
828 .master = &omap2430_l4_core_hwmod, 672 .master = &omap2430_l4_core_hwmod,
829 .slave = &omap2430_timer8_hwmod, 673 .slave = &omap2430_timer8_hwmod,
830 .clk = "gpt8_ick", 674 .clk = "gpt8_ick",
831 .addr = omap2430_timer8_addrs, 675 .addr = omap2xxx_timer8_addrs,
832 .user = OCP_USER_MPU | OCP_USER_SDMA, 676 .user = OCP_USER_MPU | OCP_USER_SDMA,
833}; 677};
834 678
@@ -864,21 +708,12 @@ static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = {
864 { .irq = 45, }, 708 { .irq = 45, },
865}; 709};
866 710
867static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = {
868 {
869 .pa_start = 0x48084000,
870 .pa_end = 0x48084000 + SZ_1K - 1,
871 .flags = ADDR_TYPE_RT
872 },
873 { }
874};
875
876/* l4_core -> timer9 */ 711/* l4_core -> timer9 */
877static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { 712static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
878 .master = &omap2430_l4_core_hwmod, 713 .master = &omap2430_l4_core_hwmod,
879 .slave = &omap2430_timer9_hwmod, 714 .slave = &omap2430_timer9_hwmod,
880 .clk = "gpt9_ick", 715 .clk = "gpt9_ick",
881 .addr = omap2430_timer9_addrs, 716 .addr = omap2xxx_timer9_addrs,
882 .user = OCP_USER_MPU | OCP_USER_SDMA, 717 .user = OCP_USER_MPU | OCP_USER_SDMA,
883}; 718};
884 719
@@ -914,21 +749,12 @@ static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = {
914 { .irq = 46, }, 749 { .irq = 46, },
915}; 750};
916 751
917static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = {
918 {
919 .pa_start = 0x48086000,
920 .pa_end = 0x48086000 + SZ_1K - 1,
921 .flags = ADDR_TYPE_RT
922 },
923 { }
924};
925
926/* l4_core -> timer10 */ 752/* l4_core -> timer10 */
927static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { 753static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
928 .master = &omap2430_l4_core_hwmod, 754 .master = &omap2430_l4_core_hwmod,
929 .slave = &omap2430_timer10_hwmod, 755 .slave = &omap2430_timer10_hwmod,
930 .clk = "gpt10_ick", 756 .clk = "gpt10_ick",
931 .addr = omap2430_timer10_addrs, 757 .addr = omap2_timer10_addrs,
932 .user = OCP_USER_MPU | OCP_USER_SDMA, 758 .user = OCP_USER_MPU | OCP_USER_SDMA,
933}; 759};
934 760
@@ -964,21 +790,12 @@ static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = {
964 { .irq = 47, }, 790 { .irq = 47, },
965}; 791};
966 792
967static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = {
968 {
969 .pa_start = 0x48088000,
970 .pa_end = 0x48088000 + SZ_1K - 1,
971 .flags = ADDR_TYPE_RT
972 },
973 { }
974};
975
976/* l4_core -> timer11 */ 793/* l4_core -> timer11 */
977static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { 794static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
978 .master = &omap2430_l4_core_hwmod, 795 .master = &omap2430_l4_core_hwmod,
979 .slave = &omap2430_timer11_hwmod, 796 .slave = &omap2430_timer11_hwmod,
980 .clk = "gpt11_ick", 797 .clk = "gpt11_ick",
981 .addr = omap2430_timer11_addrs, 798 .addr = omap2_timer11_addrs,
982 .user = OCP_USER_MPU | OCP_USER_SDMA, 799 .user = OCP_USER_MPU | OCP_USER_SDMA,
983}; 800};
984 801
@@ -1014,21 +831,12 @@ static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = {
1014 { .irq = 48, }, 831 { .irq = 48, },
1015}; 832};
1016 833
1017static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = {
1018 {
1019 .pa_start = 0x4808a000,
1020 .pa_end = 0x4808a000 + SZ_1K - 1,
1021 .flags = ADDR_TYPE_RT
1022 },
1023 { }
1024};
1025
1026/* l4_core -> timer12 */ 834/* l4_core -> timer12 */
1027static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { 835static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
1028 .master = &omap2430_l4_core_hwmod, 836 .master = &omap2430_l4_core_hwmod,
1029 .slave = &omap2430_timer12_hwmod, 837 .slave = &omap2430_timer12_hwmod,
1030 .clk = "gpt12_ick", 838 .clk = "gpt12_ick",
1031 .addr = omap2430_timer12_addrs, 839 .addr = omap2xxx_timer12_addrs,
1032 .user = OCP_USER_MPU | OCP_USER_SDMA, 840 .user = OCP_USER_MPU | OCP_USER_SDMA,
1033}; 841};
1034 842
@@ -1277,21 +1085,12 @@ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
1277 &omap2430_dss__l3, 1085 &omap2430_dss__l3,
1278}; 1086};
1279 1087
1280static struct omap_hwmod_addr_space omap2430_dss_addrs[] = {
1281 {
1282 .pa_start = 0x48050000,
1283 .pa_end = 0x480503FF,
1284 .flags = ADDR_TYPE_RT
1285 },
1286 { }
1287};
1288
1289/* l4_core -> dss */ 1088/* l4_core -> dss */
1290static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { 1089static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
1291 .master = &omap2430_l4_core_hwmod, 1090 .master = &omap2430_l4_core_hwmod,
1292 .slave = &omap2430_dss_core_hwmod, 1091 .slave = &omap2430_dss_core_hwmod,
1293 .clk = "dss_ick", 1092 .clk = "dss_ick",
1294 .addr = omap2430_dss_addrs, 1093 .addr = omap2_dss_addrs,
1295 .user = OCP_USER_MPU | OCP_USER_SDMA, 1094 .user = OCP_USER_MPU | OCP_USER_SDMA,
1296}; 1095};
1297 1096
@@ -1355,21 +1154,12 @@ static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = {
1355 { .irq = 25 }, 1154 { .irq = 25 },
1356}; 1155};
1357 1156
1358static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = {
1359 {
1360 .pa_start = 0x48050400,
1361 .pa_end = 0x480507FF,
1362 .flags = ADDR_TYPE_RT
1363 },
1364 { }
1365};
1366
1367/* l4_core -> dss_dispc */ 1157/* l4_core -> dss_dispc */
1368static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { 1158static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
1369 .master = &omap2430_l4_core_hwmod, 1159 .master = &omap2430_l4_core_hwmod,
1370 .slave = &omap2430_dss_dispc_hwmod, 1160 .slave = &omap2430_dss_dispc_hwmod,
1371 .clk = "dss_ick", 1161 .clk = "dss_ick",
1372 .addr = omap2430_dss_dispc_addrs, 1162 .addr = omap2_dss_dispc_addrs,
1373 .user = OCP_USER_MPU | OCP_USER_SDMA, 1163 .user = OCP_USER_MPU | OCP_USER_SDMA,
1374}; 1164};
1375 1165
@@ -1419,21 +1209,12 @@ static struct omap_hwmod_class omap2430_rfbi_hwmod_class = {
1419 .sysc = &omap2430_rfbi_sysc, 1209 .sysc = &omap2430_rfbi_sysc,
1420}; 1210};
1421 1211
1422static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = {
1423 {
1424 .pa_start = 0x48050800,
1425 .pa_end = 0x48050BFF,
1426 .flags = ADDR_TYPE_RT
1427 },
1428 { }
1429};
1430
1431/* l4_core -> dss_rfbi */ 1212/* l4_core -> dss_rfbi */
1432static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { 1213static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
1433 .master = &omap2430_l4_core_hwmod, 1214 .master = &omap2430_l4_core_hwmod,
1434 .slave = &omap2430_dss_rfbi_hwmod, 1215 .slave = &omap2430_dss_rfbi_hwmod,
1435 .clk = "dss_ick", 1216 .clk = "dss_ick",
1436 .addr = omap2430_dss_rfbi_addrs, 1217 .addr = omap2_dss_rfbi_addrs,
1437 .user = OCP_USER_MPU | OCP_USER_SDMA, 1218 .user = OCP_USER_MPU | OCP_USER_SDMA,
1438}; 1219};
1439 1220
@@ -1468,22 +1249,12 @@ static struct omap_hwmod_class omap2430_venc_hwmod_class = {
1468 .name = "venc", 1249 .name = "venc",
1469}; 1250};
1470 1251
1471/* dss_venc */
1472static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = {
1473 {
1474 .pa_start = 0x48050C00,
1475 .pa_end = 0x48050FFF,
1476 .flags = ADDR_TYPE_RT
1477 },
1478 { }
1479};
1480
1481/* l4_core -> dss_venc */ 1252/* l4_core -> dss_venc */
1482static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { 1253static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1483 .master = &omap2430_l4_core_hwmod, 1254 .master = &omap2430_l4_core_hwmod,
1484 .slave = &omap2430_dss_venc_hwmod, 1255 .slave = &omap2430_dss_venc_hwmod,
1485 .clk = "dss_54m_fck", 1256 .clk = "dss_54m_fck",
1486 .addr = omap2430_dss_venc_addrs, 1257 .addr = omap2_dss_venc_addrs,
1487 .flags = OCPIF_SWSUP_IDLE, 1258 .flags = OCPIF_SWSUP_IDLE,
1488 .user = OCP_USER_MPU | OCP_USER_SDMA, 1259 .user = OCP_USER_MPU | OCP_USER_SDMA,
1489}; 1260};
@@ -1916,15 +1687,6 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
1916 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ 1687 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
1917}; 1688};
1918 1689
1919static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
1920 {
1921 .pa_start = 0x48056000,
1922 .pa_end = 0x48056fff,
1923 .flags = ADDR_TYPE_RT
1924 },
1925 { }
1926};
1927
1928/* dma_system -> L3 */ 1690/* dma_system -> L3 */
1929static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { 1691static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
1930 .master = &omap2430_dma_system_hwmod, 1692 .master = &omap2430_dma_system_hwmod,
@@ -1943,7 +1705,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
1943 .master = &omap2430_l4_core_hwmod, 1705 .master = &omap2430_l4_core_hwmod,
1944 .slave = &omap2430_dma_system_hwmod, 1706 .slave = &omap2430_dma_system_hwmod,
1945 .clk = "sdma_ick", 1707 .clk = "sdma_ick",
1946 .addr = omap2430_dma_system_addrs, 1708 .addr = omap2_dma_system_addrs,
1947 .user = OCP_USER_MPU | OCP_USER_SDMA, 1709 .user = OCP_USER_MPU | OCP_USER_SDMA,
1948}; 1710};
1949 1711
@@ -1994,20 +1756,11 @@ static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
1994 { .irq = 26 }, 1756 { .irq = 26 },
1995}; 1757};
1996 1758
1997static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = {
1998 {
1999 .pa_start = 0x48094000,
2000 .pa_end = 0x480941ff,
2001 .flags = ADDR_TYPE_RT,
2002 },
2003 { }
2004};
2005
2006/* l4_core -> mailbox */ 1759/* l4_core -> mailbox */
2007static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { 1760static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {
2008 .master = &omap2430_l4_core_hwmod, 1761 .master = &omap2430_l4_core_hwmod,
2009 .slave = &omap2430_mailbox_hwmod, 1762 .slave = &omap2430_mailbox_hwmod,
2010 .addr = omap2430_mailbox_addrs, 1763 .addr = omap2_mailbox_addrs,
2011 .user = OCP_USER_MPU | OCP_USER_SDMA, 1764 .user = OCP_USER_MPU | OCP_USER_SDMA,
2012}; 1765};
2013 1766
@@ -2279,22 +2032,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = {
2279 { .name = "tx", .dma_req = 31 }, 2032 { .name = "tx", .dma_req = 31 },
2280}; 2033};
2281 2034
2282static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = {
2283 {
2284 .name = "mpu",
2285 .pa_start = 0x48074000,
2286 .pa_end = 0x480740ff,
2287 .flags = ADDR_TYPE_RT
2288 },
2289 { }
2290};
2291
2292/* l4_core -> mcbsp1 */ 2035/* l4_core -> mcbsp1 */
2293static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { 2036static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
2294 .master = &omap2430_l4_core_hwmod, 2037 .master = &omap2430_l4_core_hwmod,
2295 .slave = &omap2430_mcbsp1_hwmod, 2038 .slave = &omap2430_mcbsp1_hwmod,
2296 .clk = "mcbsp1_ick", 2039 .clk = "mcbsp1_ick",
2297 .addr = omap2430_mcbsp1_addrs, 2040 .addr = omap2_mcbsp1_addrs,
2298 .user = OCP_USER_MPU | OCP_USER_SDMA, 2041 .user = OCP_USER_MPU | OCP_USER_SDMA,
2299}; 2042};
2300 2043
@@ -2337,22 +2080,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = {
2337 { .name = "tx", .dma_req = 33 }, 2080 { .name = "tx", .dma_req = 33 },
2338}; 2081};
2339 2082
2340static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = {
2341 {
2342 .name = "mpu",
2343 .pa_start = 0x48076000,
2344 .pa_end = 0x480760ff,
2345 .flags = ADDR_TYPE_RT
2346 },
2347 { }
2348};
2349
2350/* l4_core -> mcbsp2 */ 2083/* l4_core -> mcbsp2 */
2351static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { 2084static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
2352 .master = &omap2430_l4_core_hwmod, 2085 .master = &omap2430_l4_core_hwmod,
2353 .slave = &omap2430_mcbsp2_hwmod, 2086 .slave = &omap2430_mcbsp2_hwmod,
2354 .clk = "mcbsp2_ick", 2087 .clk = "mcbsp2_ick",
2355 .addr = omap2430_mcbsp2_addrs, 2088 .addr = omap2xxx_mcbsp2_addrs,
2356 .user = OCP_USER_MPU | OCP_USER_SDMA, 2089 .user = OCP_USER_MPU | OCP_USER_SDMA,
2357}; 2090};
2358 2091
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
new file mode 100644
index 000000000000..04637fabadd2
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
@@ -0,0 +1,173 @@
1/*
2 * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX handle crossbar/shared link difference for L3?
12 * XXX these should be marked initdata for multi-OMAP kernels
13 */
14#include <asm/sizes.h>
15
16#include <plat/omap_hwmod.h>
17#include <plat/serial.h>
18
19#include "omap_hwmod_common_data.h"
20
21struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
22 {
23 .pa_start = 0x4809c000,
24 .pa_end = 0x4809c1ff,
25 .flags = ADDR_TYPE_RT,
26 },
27 { }
28};
29
30struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
31 {
32 .pa_start = 0x480b4000,
33 .pa_end = 0x480b41ff,
34 .flags = ADDR_TYPE_RT,
35 },
36 { }
37};
38
39struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
40 {
41 .pa_start = 0x48070000,
42 .pa_end = 0x48070000 + SZ_128 - 1,
43 .flags = ADDR_TYPE_RT,
44 },
45 { }
46};
47
48struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
49 {
50 .pa_start = 0x48072000,
51 .pa_end = 0x48072000 + SZ_128 - 1,
52 .flags = ADDR_TYPE_RT,
53 },
54 { }
55};
56
57struct omap_hwmod_addr_space omap2_dss_addrs[] = {
58 {
59 .pa_start = 0x48050000,
60 .pa_end = 0x48050000 + SZ_1K - 1,
61 .flags = ADDR_TYPE_RT
62 },
63 { }
64};
65
66struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
67 {
68 .pa_start = 0x48050400,
69 .pa_end = 0x48050400 + SZ_1K - 1,
70 .flags = ADDR_TYPE_RT
71 },
72 { }
73};
74
75struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
76 {
77 .pa_start = 0x48050800,
78 .pa_end = 0x48050800 + SZ_1K - 1,
79 .flags = ADDR_TYPE_RT
80 },
81 { }
82};
83
84struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
85 {
86 .pa_start = 0x48050C00,
87 .pa_end = 0x48050C00 + SZ_1K - 1,
88 .flags = ADDR_TYPE_RT
89 },
90 { }
91};
92
93struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
94 {
95 .pa_start = 0x48086000,
96 .pa_end = 0x48086000 + SZ_1K - 1,
97 .flags = ADDR_TYPE_RT
98 },
99 { }
100};
101
102struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
103 {
104 .pa_start = 0x48088000,
105 .pa_end = 0x48088000 + SZ_1K - 1,
106 .flags = ADDR_TYPE_RT
107 },
108 { }
109};
110
111struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
112 {
113 .pa_start = 0x4808a000,
114 .pa_end = 0x4808a000 + SZ_1K - 1,
115 .flags = ADDR_TYPE_RT
116 },
117 { }
118};
119
120struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
121 {
122 .pa_start = 0x48098000,
123 .pa_end = 0x48098000 + SZ_256 - 1,
124 .flags = ADDR_TYPE_RT,
125 },
126 { }
127};
128
129struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
130 {
131 .pa_start = 0x4809a000,
132 .pa_end = 0x4809a000 + SZ_256 - 1,
133 .flags = ADDR_TYPE_RT,
134 },
135 { }
136};
137
138struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
139 {
140 .pa_start = 0x480b8000,
141 .pa_end = 0x480b8000 + SZ_256 - 1,
142 .flags = ADDR_TYPE_RT,
143 },
144 { }
145};
146
147struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
148 {
149 .pa_start = 0x48056000,
150 .pa_end = 0x48056000 + SZ_4K - 1,
151 .flags = ADDR_TYPE_RT
152 },
153 { }
154};
155
156struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
157 {
158 .pa_start = 0x48094000,
159 .pa_end = 0x48094000 + SZ_512 - 1,
160 .flags = ADDR_TYPE_RT,
161 },
162 { }
163};
164
165struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
166 {
167 .name = "mpu",
168 .pa_start = 0x48074000,
169 .pa_end = 0x480740ff,
170 .flags = ADDR_TYPE_RT
171 },
172 { }
173};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
new file mode 100644
index 000000000000..4f3547c2a49e
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
@@ -0,0 +1,130 @@
1/*
2 * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX handle crossbar/shared link difference for L3?
12 * XXX these should be marked initdata for multi-OMAP kernels
13 */
14#include <asm/sizes.h>
15
16#include <plat/omap_hwmod.h>
17#include <plat/serial.h>
18
19#include "omap_hwmod_common_data.h"
20
21struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
22 {
23 .pa_start = OMAP2_UART1_BASE,
24 .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
25 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
26 },
27 { }
28};
29
30struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
31 {
32 .pa_start = OMAP2_UART2_BASE,
33 .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
34 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
35 },
36 { }
37};
38
39struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
40 {
41 .pa_start = OMAP2_UART3_BASE,
42 .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
43 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
44 },
45 { }
46};
47
48struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
49 {
50 .pa_start = 0x4802a000,
51 .pa_end = 0x4802a000 + SZ_1K - 1,
52 .flags = ADDR_TYPE_RT
53 },
54 { }
55};
56
57struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
58 {
59 .pa_start = 0x48078000,
60 .pa_end = 0x48078000 + SZ_1K - 1,
61 .flags = ADDR_TYPE_RT
62 },
63 { }
64};
65
66struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
67 {
68 .pa_start = 0x4807a000,
69 .pa_end = 0x4807a000 + SZ_1K - 1,
70 .flags = ADDR_TYPE_RT
71 },
72 { }
73};
74
75struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
76 {
77 .pa_start = 0x4807c000,
78 .pa_end = 0x4807c000 + SZ_1K - 1,
79 .flags = ADDR_TYPE_RT
80 },
81 { }
82};
83
84struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
85 {
86 .pa_start = 0x4807e000,
87 .pa_end = 0x4807e000 + SZ_1K - 1,
88 .flags = ADDR_TYPE_RT
89 },
90 { }
91};
92
93struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
94 {
95 .pa_start = 0x48080000,
96 .pa_end = 0x48080000 + SZ_1K - 1,
97 .flags = ADDR_TYPE_RT
98 },
99 { }
100};
101
102struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
103 {
104 .pa_start = 0x48082000,
105 .pa_end = 0x48082000 + SZ_1K - 1,
106 .flags = ADDR_TYPE_RT
107 },
108 { }
109};
110
111struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
112 {
113 .pa_start = 0x48084000,
114 .pa_end = 0x48084000 + SZ_1K - 1,
115 .flags = ADDR_TYPE_RT
116 },
117 { }
118};
119
120struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
121 {
122 .name = "mpu",
123 .pa_start = 0x48076000,
124 .pa_end = 0x480760ff,
125 .flags = ADDR_TYPE_RT
126 },
127 { }
128};
129
130
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 64107795f1ae..791f9b290e81 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -190,39 +190,21 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
190}; 190};
191 191
192/* L4 CORE -> MMC1 interface */ 192/* L4 CORE -> MMC1 interface */
193static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = {
194 {
195 .pa_start = 0x4809c000,
196 .pa_end = 0x4809c1ff,
197 .flags = ADDR_TYPE_RT,
198 },
199 { }
200};
201
202static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { 193static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = {
203 .master = &omap3xxx_l4_core_hwmod, 194 .master = &omap3xxx_l4_core_hwmod,
204 .slave = &omap3xxx_mmc1_hwmod, 195 .slave = &omap3xxx_mmc1_hwmod,
205 .clk = "mmchs1_ick", 196 .clk = "mmchs1_ick",
206 .addr = omap3xxx_mmc1_addr_space, 197 .addr = omap2430_mmc1_addr_space,
207 .user = OCP_USER_MPU | OCP_USER_SDMA, 198 .user = OCP_USER_MPU | OCP_USER_SDMA,
208 .flags = OMAP_FIREWALL_L4 199 .flags = OMAP_FIREWALL_L4
209}; 200};
210 201
211/* L4 CORE -> MMC2 interface */ 202/* L4 CORE -> MMC2 interface */
212static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = {
213 {
214 .pa_start = 0x480b4000,
215 .pa_end = 0x480b41ff,
216 .flags = ADDR_TYPE_RT,
217 },
218 { }
219};
220
221static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { 203static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = {
222 .master = &omap3xxx_l4_core_hwmod, 204 .master = &omap3xxx_l4_core_hwmod,
223 .slave = &omap3xxx_mmc2_hwmod, 205 .slave = &omap3xxx_mmc2_hwmod,
224 .clk = "mmchs2_ick", 206 .clk = "mmchs2_ick",
225 .addr = omap3xxx_mmc2_addr_space, 207 .addr = omap2430_mmc2_addr_space,
226 .user = OCP_USER_MPU | OCP_USER_SDMA, 208 .user = OCP_USER_MPU | OCP_USER_SDMA,
227 .flags = OMAP_FIREWALL_L4 209 .flags = OMAP_FIREWALL_L4
228}; 210};
@@ -318,24 +300,12 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
318 .user = OCP_USER_MPU | OCP_USER_SDMA, 300 .user = OCP_USER_MPU | OCP_USER_SDMA,
319}; 301};
320 302
321/* I2C IP block address space length (in bytes) */
322#define OMAP2_I2C_AS_LEN 128
323
324/* L4 CORE -> I2C1 interface */ 303/* L4 CORE -> I2C1 interface */
325static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = {
326 {
327 .pa_start = 0x48070000,
328 .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1,
329 .flags = ADDR_TYPE_RT,
330 },
331 { }
332};
333
334static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { 304static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
335 .master = &omap3xxx_l4_core_hwmod, 305 .master = &omap3xxx_l4_core_hwmod,
336 .slave = &omap3xxx_i2c1_hwmod, 306 .slave = &omap3xxx_i2c1_hwmod,
337 .clk = "i2c1_ick", 307 .clk = "i2c1_ick",
338 .addr = omap3xxx_i2c1_addr_space, 308 .addr = omap2_i2c1_addr_space,
339 .fw = { 309 .fw = {
340 .omap2 = { 310 .omap2 = {
341 .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, 311 .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION,
@@ -347,20 +317,11 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
347}; 317};
348 318
349/* L4 CORE -> I2C2 interface */ 319/* L4 CORE -> I2C2 interface */
350static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = {
351 {
352 .pa_start = 0x48072000,
353 .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
354 .flags = ADDR_TYPE_RT,
355 },
356 { }
357};
358
359static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { 320static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
360 .master = &omap3xxx_l4_core_hwmod, 321 .master = &omap3xxx_l4_core_hwmod,
361 .slave = &omap3xxx_i2c2_hwmod, 322 .slave = &omap3xxx_i2c2_hwmod,
362 .clk = "i2c2_ick", 323 .clk = "i2c2_ick",
363 .addr = omap3xxx_i2c2_addr_space, 324 .addr = omap2_i2c2_addr_space,
364 .fw = { 325 .fw = {
365 .omap2 = { 326 .omap2 = {
366 .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, 327 .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION,
@@ -375,7 +336,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
375static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { 336static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = {
376 { 337 {
377 .pa_start = 0x48060000, 338 .pa_start = 0x48060000,
378 .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, 339 .pa_end = 0x48060000 + SZ_128 - 1,
379 .flags = ADDR_TYPE_RT, 340 .flags = ADDR_TYPE_RT,
380 }, 341 },
381 { } 342 { }
@@ -1065,21 +1026,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = {
1065 { .irq = 46, }, 1026 { .irq = 46, },
1066}; 1027};
1067 1028
1068static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = {
1069 {
1070 .pa_start = 0x48086000,
1071 .pa_end = 0x48086000 + SZ_1K - 1,
1072 .flags = ADDR_TYPE_RT
1073 },
1074 { }
1075};
1076
1077/* l4_core -> timer10 */ 1029/* l4_core -> timer10 */
1078static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { 1030static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = {
1079 .master = &omap3xxx_l4_core_hwmod, 1031 .master = &omap3xxx_l4_core_hwmod,
1080 .slave = &omap3xxx_timer10_hwmod, 1032 .slave = &omap3xxx_timer10_hwmod,
1081 .clk = "gpt10_ick", 1033 .clk = "gpt10_ick",
1082 .addr = omap3xxx_timer10_addrs, 1034 .addr = omap2_timer10_addrs,
1083 .user = OCP_USER_MPU | OCP_USER_SDMA, 1035 .user = OCP_USER_MPU | OCP_USER_SDMA,
1084}; 1036};
1085 1037
@@ -1115,21 +1067,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = {
1115 { .irq = 47, }, 1067 { .irq = 47, },
1116}; 1068};
1117 1069
1118static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = {
1119 {
1120 .pa_start = 0x48088000,
1121 .pa_end = 0x48088000 + SZ_1K - 1,
1122 .flags = ADDR_TYPE_RT
1123 },
1124 { }
1125};
1126
1127/* l4_core -> timer11 */ 1070/* l4_core -> timer11 */
1128static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { 1071static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = {
1129 .master = &omap3xxx_l4_core_hwmod, 1072 .master = &omap3xxx_l4_core_hwmod,
1130 .slave = &omap3xxx_timer11_hwmod, 1073 .slave = &omap3xxx_timer11_hwmod,
1131 .clk = "gpt11_ick", 1074 .clk = "gpt11_ick",
1132 .addr = omap3xxx_timer11_addrs, 1075 .addr = omap2_timer11_addrs,
1133 .user = OCP_USER_MPU | OCP_USER_SDMA, 1076 .user = OCP_USER_MPU | OCP_USER_SDMA,
1134}; 1077};
1135 1078
@@ -1491,21 +1434,12 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = {
1491 &omap3xxx_dss__l3, 1434 &omap3xxx_dss__l3,
1492}; 1435};
1493 1436
1494static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = {
1495 {
1496 .pa_start = 0x48050000,
1497 .pa_end = 0x480503FF,
1498 .flags = ADDR_TYPE_RT
1499 },
1500 { }
1501};
1502
1503/* l4_core -> dss */ 1437/* l4_core -> dss */
1504static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { 1438static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = {
1505 .master = &omap3xxx_l4_core_hwmod, 1439 .master = &omap3xxx_l4_core_hwmod,
1506 .slave = &omap3430es1_dss_core_hwmod, 1440 .slave = &omap3430es1_dss_core_hwmod,
1507 .clk = "dss_ick", 1441 .clk = "dss_ick",
1508 .addr = omap3xxx_dss_addrs, 1442 .addr = omap2_dss_addrs,
1509 .fw = { 1443 .fw = {
1510 .omap2 = { 1444 .omap2 = {
1511 .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, 1445 .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION,
@@ -1520,7 +1454,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = {
1520 .master = &omap3xxx_l4_core_hwmod, 1454 .master = &omap3xxx_l4_core_hwmod,
1521 .slave = &omap3xxx_dss_core_hwmod, 1455 .slave = &omap3xxx_dss_core_hwmod,
1522 .clk = "dss_ick", 1456 .clk = "dss_ick",
1523 .addr = omap3xxx_dss_addrs, 1457 .addr = omap2_dss_addrs,
1524 .fw = { 1458 .fw = {
1525 .omap2 = { 1459 .omap2 = {
1526 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, 1460 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION,
@@ -1625,21 +1559,12 @@ static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = {
1625 { .irq = 25 }, 1559 { .irq = 25 },
1626}; 1560};
1627 1561
1628static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = {
1629 {
1630 .pa_start = 0x48050400,
1631 .pa_end = 0x480507FF,
1632 .flags = ADDR_TYPE_RT
1633 },
1634 { }
1635};
1636
1637/* l4_core -> dss_dispc */ 1562/* l4_core -> dss_dispc */
1638static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { 1563static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
1639 .master = &omap3xxx_l4_core_hwmod, 1564 .master = &omap3xxx_l4_core_hwmod,
1640 .slave = &omap3xxx_dss_dispc_hwmod, 1565 .slave = &omap3xxx_dss_dispc_hwmod,
1641 .clk = "dss_ick", 1566 .clk = "dss_ick",
1642 .addr = omap3xxx_dss_dispc_addrs, 1567 .addr = omap2_dss_dispc_addrs,
1643 .fw = { 1568 .fw = {
1644 .omap2 = { 1569 .omap2 = {
1645 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, 1570 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION,
@@ -1760,21 +1685,12 @@ static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = {
1760 .sysc = &omap3xxx_rfbi_sysc, 1685 .sysc = &omap3xxx_rfbi_sysc,
1761}; 1686};
1762 1687
1763static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = {
1764 {
1765 .pa_start = 0x48050800,
1766 .pa_end = 0x48050BFF,
1767 .flags = ADDR_TYPE_RT
1768 },
1769 { }
1770};
1771
1772/* l4_core -> dss_rfbi */ 1688/* l4_core -> dss_rfbi */
1773static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { 1689static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {
1774 .master = &omap3xxx_l4_core_hwmod, 1690 .master = &omap3xxx_l4_core_hwmod,
1775 .slave = &omap3xxx_dss_rfbi_hwmod, 1691 .slave = &omap3xxx_dss_rfbi_hwmod,
1776 .clk = "dss_ick", 1692 .clk = "dss_ick",
1777 .addr = omap3xxx_dss_rfbi_addrs, 1693 .addr = omap2_dss_rfbi_addrs,
1778 .fw = { 1694 .fw = {
1779 .omap2 = { 1695 .omap2 = {
1780 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, 1696 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION,
@@ -1818,22 +1734,12 @@ static struct omap_hwmod_class omap3xxx_venc_hwmod_class = {
1818 .name = "venc", 1734 .name = "venc",
1819}; 1735};
1820 1736
1821/* dss_venc */
1822static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = {
1823 {
1824 .pa_start = 0x48050C00,
1825 .pa_end = 0x48050FFF,
1826 .flags = ADDR_TYPE_RT
1827 },
1828 { }
1829};
1830
1831/* l4_core -> dss_venc */ 1737/* l4_core -> dss_venc */
1832static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { 1738static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1833 .master = &omap3xxx_l4_core_hwmod, 1739 .master = &omap3xxx_l4_core_hwmod,
1834 .slave = &omap3xxx_dss_venc_hwmod, 1740 .slave = &omap3xxx_dss_venc_hwmod,
1835 .clk = "dss_tv_fck", 1741 .clk = "dss_tv_fck",
1836 .addr = omap3xxx_dss_venc_addrs, 1742 .addr = omap2_dss_venc_addrs,
1837 .fw = { 1743 .fw = {
1838 .omap2 = { 1744 .omap2 = {
1839 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, 1745 .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION,
@@ -3070,56 +2976,29 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
3070}; 2976};
3071 2977
3072/* l4 core -> mcspi1 interface */ 2978/* l4 core -> mcspi1 interface */
3073static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = {
3074 {
3075 .pa_start = 0x48098000,
3076 .pa_end = 0x480980ff,
3077 .flags = ADDR_TYPE_RT,
3078 },
3079 { }
3080};
3081
3082static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { 2979static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = {
3083 .master = &omap3xxx_l4_core_hwmod, 2980 .master = &omap3xxx_l4_core_hwmod,
3084 .slave = &omap34xx_mcspi1, 2981 .slave = &omap34xx_mcspi1,
3085 .clk = "mcspi1_ick", 2982 .clk = "mcspi1_ick",
3086 .addr = omap34xx_mcspi1_addr_space, 2983 .addr = omap2_mcspi1_addr_space,
3087 .user = OCP_USER_MPU | OCP_USER_SDMA, 2984 .user = OCP_USER_MPU | OCP_USER_SDMA,
3088}; 2985};
3089 2986
3090/* l4 core -> mcspi2 interface */ 2987/* l4 core -> mcspi2 interface */
3091static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = {
3092 {
3093 .pa_start = 0x4809a000,
3094 .pa_end = 0x4809a0ff,
3095 .flags = ADDR_TYPE_RT,
3096 },
3097 { }
3098};
3099
3100static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { 2988static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = {
3101 .master = &omap3xxx_l4_core_hwmod, 2989 .master = &omap3xxx_l4_core_hwmod,
3102 .slave = &omap34xx_mcspi2, 2990 .slave = &omap34xx_mcspi2,
3103 .clk = "mcspi2_ick", 2991 .clk = "mcspi2_ick",
3104 .addr = omap34xx_mcspi2_addr_space, 2992 .addr = omap2_mcspi2_addr_space,
3105 .user = OCP_USER_MPU | OCP_USER_SDMA, 2993 .user = OCP_USER_MPU | OCP_USER_SDMA,
3106}; 2994};
3107 2995
3108/* l4 core -> mcspi3 interface */ 2996/* l4 core -> mcspi3 interface */
3109static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = {
3110 {
3111 .pa_start = 0x480b8000,
3112 .pa_end = 0x480b80ff,
3113 .flags = ADDR_TYPE_RT,
3114 },
3115 { }
3116};
3117
3118static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { 2997static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = {
3119 .master = &omap3xxx_l4_core_hwmod, 2998 .master = &omap3xxx_l4_core_hwmod,
3120 .slave = &omap34xx_mcspi3, 2999 .slave = &omap34xx_mcspi3,
3121 .clk = "mcspi3_ick", 3000 .clk = "mcspi3_ick",
3122 .addr = omap34xx_mcspi3_addr_space, 3001 .addr = omap2430_mcspi3_addr_space,
3123 .user = OCP_USER_MPU | OCP_USER_SDMA, 3002 .user = OCP_USER_MPU | OCP_USER_SDMA,
3124}; 3003};
3125 3004
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index c34e98bf1242..76a2f11e5f4e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -1,10 +1,10 @@
1/* 1/*
2 * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations 2 * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations
3 * 3 *
4 * Copyright (C) 2010 Nokia Corporation 4 * Copyright (C) 2010-2011 Nokia Corporation
5 * Paul Walmsley 5 * Paul Walmsley
6 * 6 *
7 * Copyright (C) 2010 Texas Instruments, Inc. 7 * Copyright (C) 2010-2011 Texas Instruments, Inc.
8 * Benoît Cousson 8 * Benoît Cousson
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
@@ -16,10 +16,44 @@
16 16
17#include <plat/omap_hwmod.h> 17#include <plat/omap_hwmod.h>
18 18
19/* Common address space across OMAP2xxx */
20extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
21extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
22extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[];
23extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[];
24extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[];
25extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[];
26extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[];
27extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[];
28extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[];
29extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[];
30extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[];
31extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];
32extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[];
33
34/* Common address space across OMAP2xxx/3xxx */
35extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[];
36extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[];
37extern struct omap_hwmod_addr_space omap2_dss_addrs[];
38extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[];
39extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[];
40extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[];
41extern struct omap_hwmod_addr_space omap2_timer10_addrs[];
42extern struct omap_hwmod_addr_space omap2_timer11_addrs[];
43extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[];
44extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[];
45extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[];
46extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[];
47extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[];
48extern struct omap_hwmod_addr_space omap2_dma_system_addrs[];
49extern struct omap_hwmod_addr_space omap2_mailbox_addrs[];
50extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[];
51
19/* OMAP hwmod classes - forward declarations */ 52/* OMAP hwmod classes - forward declarations */
20extern struct omap_hwmod_class l3_hwmod_class; 53extern struct omap_hwmod_class l3_hwmod_class;
21extern struct omap_hwmod_class l4_hwmod_class; 54extern struct omap_hwmod_class l4_hwmod_class;
22extern struct omap_hwmod_class mpu_hwmod_class; 55extern struct omap_hwmod_class mpu_hwmod_class;
23extern struct omap_hwmod_class iva_hwmod_class; 56extern struct omap_hwmod_class iva_hwmod_class;
24 57
58
25#endif 59#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 15:38:29 -0500