diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2420_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 291 |
1 files changed, 26 insertions, 265 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 1a7ce3ec0c0b..3ec625c40c1f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod; | |||
114 | static struct omap_hwmod omap2420_mcbsp2_hwmod; | 114 | static struct omap_hwmod omap2420_mcbsp2_hwmod; |
115 | 115 | ||
116 | /* l4 core -> mcspi1 interface */ | 116 | /* l4 core -> mcspi1 interface */ |
117 | static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { | ||
118 | { | ||
119 | .pa_start = 0x48098000, | ||
120 | .pa_end = 0x480980ff, | ||
121 | .flags = ADDR_TYPE_RT, | ||
122 | }, | ||
123 | { } | ||
124 | }; | ||
125 | |||
126 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { | 117 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { |
127 | .master = &omap2420_l4_core_hwmod, | 118 | .master = &omap2420_l4_core_hwmod, |
128 | .slave = &omap2420_mcspi1_hwmod, | 119 | .slave = &omap2420_mcspi1_hwmod, |
129 | .clk = "mcspi1_ick", | 120 | .clk = "mcspi1_ick", |
130 | .addr = omap2420_mcspi1_addr_space, | 121 | .addr = omap2_mcspi1_addr_space, |
131 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 122 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
132 | }; | 123 | }; |
133 | 124 | ||
134 | /* l4 core -> mcspi2 interface */ | 125 | /* l4 core -> mcspi2 interface */ |
135 | static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { | ||
136 | { | ||
137 | .pa_start = 0x4809a000, | ||
138 | .pa_end = 0x4809a0ff, | ||
139 | .flags = ADDR_TYPE_RT, | ||
140 | }, | ||
141 | { } | ||
142 | }; | ||
143 | |||
144 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { | 126 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { |
145 | .master = &omap2420_l4_core_hwmod, | 127 | .master = &omap2420_l4_core_hwmod, |
146 | .slave = &omap2420_mcspi2_hwmod, | 128 | .slave = &omap2420_mcspi2_hwmod, |
147 | .clk = "mcspi2_ick", | 129 | .clk = "mcspi2_ick", |
148 | .addr = omap2420_mcspi2_addr_space, | 130 | .addr = omap2_mcspi2_addr_space, |
149 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 131 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
150 | }; | 132 | }; |
151 | 133 | ||
@@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { | |||
157 | }; | 139 | }; |
158 | 140 | ||
159 | /* L4 CORE -> UART1 interface */ | 141 | /* L4 CORE -> UART1 interface */ |
160 | static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { | ||
161 | { | ||
162 | .pa_start = OMAP2_UART1_BASE, | ||
163 | .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, | ||
164 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
165 | }, | ||
166 | { } | ||
167 | }; | ||
168 | |||
169 | static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { | 142 | static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { |
170 | .master = &omap2420_l4_core_hwmod, | 143 | .master = &omap2420_l4_core_hwmod, |
171 | .slave = &omap2420_uart1_hwmod, | 144 | .slave = &omap2420_uart1_hwmod, |
172 | .clk = "uart1_ick", | 145 | .clk = "uart1_ick", |
173 | .addr = omap2420_uart1_addr_space, | 146 | .addr = omap2xxx_uart1_addr_space, |
174 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 147 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
175 | }; | 148 | }; |
176 | 149 | ||
177 | /* L4 CORE -> UART2 interface */ | 150 | /* L4 CORE -> UART2 interface */ |
178 | static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { | ||
179 | { | ||
180 | .pa_start = OMAP2_UART2_BASE, | ||
181 | .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, | ||
182 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
183 | }, | ||
184 | { } | ||
185 | }; | ||
186 | |||
187 | static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { | 151 | static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { |
188 | .master = &omap2420_l4_core_hwmod, | 152 | .master = &omap2420_l4_core_hwmod, |
189 | .slave = &omap2420_uart2_hwmod, | 153 | .slave = &omap2420_uart2_hwmod, |
190 | .clk = "uart2_ick", | 154 | .clk = "uart2_ick", |
191 | .addr = omap2420_uart2_addr_space, | 155 | .addr = omap2xxx_uart2_addr_space, |
192 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 156 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
193 | }; | 157 | }; |
194 | 158 | ||
195 | /* L4 PER -> UART3 interface */ | 159 | /* L4 PER -> UART3 interface */ |
196 | static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { | ||
197 | { | ||
198 | .pa_start = OMAP2_UART3_BASE, | ||
199 | .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, | ||
200 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
201 | }, | ||
202 | { } | ||
203 | }; | ||
204 | |||
205 | static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { | 160 | static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { |
206 | .master = &omap2420_l4_core_hwmod, | 161 | .master = &omap2420_l4_core_hwmod, |
207 | .slave = &omap2420_uart3_hwmod, | 162 | .slave = &omap2420_uart3_hwmod, |
208 | .clk = "uart3_ick", | 163 | .clk = "uart3_ick", |
209 | .addr = omap2420_uart3_addr_space, | 164 | .addr = omap2xxx_uart3_addr_space, |
210 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 165 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
211 | }; | 166 | }; |
212 | 167 | ||
213 | /* I2C IP block address space length (in bytes) */ | ||
214 | #define OMAP2_I2C_AS_LEN 128 | ||
215 | |||
216 | /* L4 CORE -> I2C1 interface */ | 168 | /* L4 CORE -> I2C1 interface */ |
217 | static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { | ||
218 | { | ||
219 | .pa_start = 0x48070000, | ||
220 | .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, | ||
221 | .flags = ADDR_TYPE_RT, | ||
222 | }, | ||
223 | { } | ||
224 | }; | ||
225 | |||
226 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { | 169 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { |
227 | .master = &omap2420_l4_core_hwmod, | 170 | .master = &omap2420_l4_core_hwmod, |
228 | .slave = &omap2420_i2c1_hwmod, | 171 | .slave = &omap2420_i2c1_hwmod, |
229 | .clk = "i2c1_ick", | 172 | .clk = "i2c1_ick", |
230 | .addr = omap2420_i2c1_addr_space, | 173 | .addr = omap2_i2c1_addr_space, |
231 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 174 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
232 | }; | 175 | }; |
233 | 176 | ||
234 | /* L4 CORE -> I2C2 interface */ | 177 | /* L4 CORE -> I2C2 interface */ |
235 | static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { | ||
236 | { | ||
237 | .pa_start = 0x48072000, | ||
238 | .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, | ||
239 | .flags = ADDR_TYPE_RT, | ||
240 | }, | ||
241 | { } | ||
242 | }; | ||
243 | |||
244 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { | 178 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { |
245 | .master = &omap2420_l4_core_hwmod, | 179 | .master = &omap2420_l4_core_hwmod, |
246 | .slave = &omap2420_i2c2_hwmod, | 180 | .slave = &omap2420_i2c2_hwmod, |
247 | .clk = "i2c2_ick", | 181 | .clk = "i2c2_ick", |
248 | .addr = omap2420_i2c2_addr_space, | 182 | .addr = omap2_i2c2_addr_space, |
249 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 183 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
250 | }; | 184 | }; |
251 | 185 | ||
@@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { | |||
414 | { .irq = 38, }, | 348 | { .irq = 38, }, |
415 | }; | 349 | }; |
416 | 350 | ||
417 | static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { | ||
418 | { | ||
419 | .pa_start = 0x4802a000, | ||
420 | .pa_end = 0x4802a000 + SZ_1K - 1, | ||
421 | .flags = ADDR_TYPE_RT | ||
422 | }, | ||
423 | { } | ||
424 | }; | ||
425 | 351 | ||
426 | /* l4_core -> timer2 */ | 352 | /* l4_core -> timer2 */ |
427 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { | 353 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { |
428 | .master = &omap2420_l4_core_hwmod, | 354 | .master = &omap2420_l4_core_hwmod, |
429 | .slave = &omap2420_timer2_hwmod, | 355 | .slave = &omap2420_timer2_hwmod, |
430 | .clk = "gpt2_ick", | 356 | .clk = "gpt2_ick", |
431 | .addr = omap2420_timer2_addrs, | 357 | .addr = omap2xxx_timer2_addrs, |
432 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 358 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
433 | }; | 359 | }; |
434 | 360 | ||
@@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { | |||
464 | { .irq = 39, }, | 390 | { .irq = 39, }, |
465 | }; | 391 | }; |
466 | 392 | ||
467 | static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { | ||
468 | { | ||
469 | .pa_start = 0x48078000, | ||
470 | .pa_end = 0x48078000 + SZ_1K - 1, | ||
471 | .flags = ADDR_TYPE_RT | ||
472 | }, | ||
473 | { } | ||
474 | }; | ||
475 | |||
476 | /* l4_core -> timer3 */ | 393 | /* l4_core -> timer3 */ |
477 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { | 394 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { |
478 | .master = &omap2420_l4_core_hwmod, | 395 | .master = &omap2420_l4_core_hwmod, |
479 | .slave = &omap2420_timer3_hwmod, | 396 | .slave = &omap2420_timer3_hwmod, |
480 | .clk = "gpt3_ick", | 397 | .clk = "gpt3_ick", |
481 | .addr = omap2420_timer3_addrs, | 398 | .addr = omap2xxx_timer3_addrs, |
482 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 399 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
483 | }; | 400 | }; |
484 | 401 | ||
@@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { | |||
514 | { .irq = 40, }, | 431 | { .irq = 40, }, |
515 | }; | 432 | }; |
516 | 433 | ||
517 | static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { | ||
518 | { | ||
519 | .pa_start = 0x4807a000, | ||
520 | .pa_end = 0x4807a000 + SZ_1K - 1, | ||
521 | .flags = ADDR_TYPE_RT | ||
522 | }, | ||
523 | { } | ||
524 | }; | ||
525 | |||
526 | /* l4_core -> timer4 */ | 434 | /* l4_core -> timer4 */ |
527 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { | 435 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { |
528 | .master = &omap2420_l4_core_hwmod, | 436 | .master = &omap2420_l4_core_hwmod, |
529 | .slave = &omap2420_timer4_hwmod, | 437 | .slave = &omap2420_timer4_hwmod, |
530 | .clk = "gpt4_ick", | 438 | .clk = "gpt4_ick", |
531 | .addr = omap2420_timer4_addrs, | 439 | .addr = omap2xxx_timer4_addrs, |
532 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 440 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
533 | }; | 441 | }; |
534 | 442 | ||
@@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { | |||
564 | { .irq = 41, }, | 472 | { .irq = 41, }, |
565 | }; | 473 | }; |
566 | 474 | ||
567 | static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { | ||
568 | { | ||
569 | .pa_start = 0x4807c000, | ||
570 | .pa_end = 0x4807c000 + SZ_1K - 1, | ||
571 | .flags = ADDR_TYPE_RT | ||
572 | }, | ||
573 | { } | ||
574 | }; | ||
575 | |||
576 | /* l4_core -> timer5 */ | 475 | /* l4_core -> timer5 */ |
577 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { | 476 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { |
578 | .master = &omap2420_l4_core_hwmod, | 477 | .master = &omap2420_l4_core_hwmod, |
579 | .slave = &omap2420_timer5_hwmod, | 478 | .slave = &omap2420_timer5_hwmod, |
580 | .clk = "gpt5_ick", | 479 | .clk = "gpt5_ick", |
581 | .addr = omap2420_timer5_addrs, | 480 | .addr = omap2xxx_timer5_addrs, |
582 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 481 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
583 | }; | 482 | }; |
584 | 483 | ||
@@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { | |||
615 | { .irq = 42, }, | 514 | { .irq = 42, }, |
616 | }; | 515 | }; |
617 | 516 | ||
618 | static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { | ||
619 | { | ||
620 | .pa_start = 0x4807e000, | ||
621 | .pa_end = 0x4807e000 + SZ_1K - 1, | ||
622 | .flags = ADDR_TYPE_RT | ||
623 | }, | ||
624 | { } | ||
625 | }; | ||
626 | |||
627 | /* l4_core -> timer6 */ | 517 | /* l4_core -> timer6 */ |
628 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { | 518 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { |
629 | .master = &omap2420_l4_core_hwmod, | 519 | .master = &omap2420_l4_core_hwmod, |
630 | .slave = &omap2420_timer6_hwmod, | 520 | .slave = &omap2420_timer6_hwmod, |
631 | .clk = "gpt6_ick", | 521 | .clk = "gpt6_ick", |
632 | .addr = omap2420_timer6_addrs, | 522 | .addr = omap2xxx_timer6_addrs, |
633 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 523 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
634 | }; | 524 | }; |
635 | 525 | ||
@@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { | |||
665 | { .irq = 43, }, | 555 | { .irq = 43, }, |
666 | }; | 556 | }; |
667 | 557 | ||
668 | static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { | ||
669 | { | ||
670 | .pa_start = 0x48080000, | ||
671 | .pa_end = 0x48080000 + SZ_1K - 1, | ||
672 | .flags = ADDR_TYPE_RT | ||
673 | }, | ||
674 | { } | ||
675 | }; | ||
676 | |||
677 | /* l4_core -> timer7 */ | 558 | /* l4_core -> timer7 */ |
678 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { | 559 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { |
679 | .master = &omap2420_l4_core_hwmod, | 560 | .master = &omap2420_l4_core_hwmod, |
680 | .slave = &omap2420_timer7_hwmod, | 561 | .slave = &omap2420_timer7_hwmod, |
681 | .clk = "gpt7_ick", | 562 | .clk = "gpt7_ick", |
682 | .addr = omap2420_timer7_addrs, | 563 | .addr = omap2xxx_timer7_addrs, |
683 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 564 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
684 | }; | 565 | }; |
685 | 566 | ||
@@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { | |||
715 | { .irq = 44, }, | 596 | { .irq = 44, }, |
716 | }; | 597 | }; |
717 | 598 | ||
718 | static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { | ||
719 | { | ||
720 | .pa_start = 0x48082000, | ||
721 | .pa_end = 0x48082000 + SZ_1K - 1, | ||
722 | .flags = ADDR_TYPE_RT | ||
723 | }, | ||
724 | { } | ||
725 | }; | ||
726 | |||
727 | /* l4_core -> timer8 */ | 599 | /* l4_core -> timer8 */ |
728 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { | 600 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { |
729 | .master = &omap2420_l4_core_hwmod, | 601 | .master = &omap2420_l4_core_hwmod, |
730 | .slave = &omap2420_timer8_hwmod, | 602 | .slave = &omap2420_timer8_hwmod, |
731 | .clk = "gpt8_ick", | 603 | .clk = "gpt8_ick", |
732 | .addr = omap2420_timer8_addrs, | 604 | .addr = omap2xxx_timer8_addrs, |
733 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 605 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
734 | }; | 606 | }; |
735 | 607 | ||
@@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { | |||
765 | { .irq = 45, }, | 637 | { .irq = 45, }, |
766 | }; | 638 | }; |
767 | 639 | ||
768 | static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { | ||
769 | { | ||
770 | .pa_start = 0x48084000, | ||
771 | .pa_end = 0x48084000 + SZ_1K - 1, | ||
772 | .flags = ADDR_TYPE_RT | ||
773 | }, | ||
774 | { } | ||
775 | }; | ||
776 | |||
777 | /* l4_core -> timer9 */ | 640 | /* l4_core -> timer9 */ |
778 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { | 641 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { |
779 | .master = &omap2420_l4_core_hwmod, | 642 | .master = &omap2420_l4_core_hwmod, |
780 | .slave = &omap2420_timer9_hwmod, | 643 | .slave = &omap2420_timer9_hwmod, |
781 | .clk = "gpt9_ick", | 644 | .clk = "gpt9_ick", |
782 | .addr = omap2420_timer9_addrs, | 645 | .addr = omap2xxx_timer9_addrs, |
783 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 646 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
784 | }; | 647 | }; |
785 | 648 | ||
@@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { | |||
815 | { .irq = 46, }, | 678 | { .irq = 46, }, |
816 | }; | 679 | }; |
817 | 680 | ||
818 | static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { | ||
819 | { | ||
820 | .pa_start = 0x48086000, | ||
821 | .pa_end = 0x48086000 + SZ_1K - 1, | ||
822 | .flags = ADDR_TYPE_RT | ||
823 | }, | ||
824 | { } | ||
825 | }; | ||
826 | |||
827 | /* l4_core -> timer10 */ | 681 | /* l4_core -> timer10 */ |
828 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { | 682 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { |
829 | .master = &omap2420_l4_core_hwmod, | 683 | .master = &omap2420_l4_core_hwmod, |
830 | .slave = &omap2420_timer10_hwmod, | 684 | .slave = &omap2420_timer10_hwmod, |
831 | .clk = "gpt10_ick", | 685 | .clk = "gpt10_ick", |
832 | .addr = omap2420_timer10_addrs, | 686 | .addr = omap2_timer10_addrs, |
833 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 687 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
834 | }; | 688 | }; |
835 | 689 | ||
@@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { | |||
865 | { .irq = 47, }, | 719 | { .irq = 47, }, |
866 | }; | 720 | }; |
867 | 721 | ||
868 | static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { | ||
869 | { | ||
870 | .pa_start = 0x48088000, | ||
871 | .pa_end = 0x48088000 + SZ_1K - 1, | ||
872 | .flags = ADDR_TYPE_RT | ||
873 | }, | ||
874 | { } | ||
875 | }; | ||
876 | |||
877 | /* l4_core -> timer11 */ | 722 | /* l4_core -> timer11 */ |
878 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { | 723 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { |
879 | .master = &omap2420_l4_core_hwmod, | 724 | .master = &omap2420_l4_core_hwmod, |
880 | .slave = &omap2420_timer11_hwmod, | 725 | .slave = &omap2420_timer11_hwmod, |
881 | .clk = "gpt11_ick", | 726 | .clk = "gpt11_ick", |
882 | .addr = omap2420_timer11_addrs, | 727 | .addr = omap2_timer11_addrs, |
883 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 728 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
884 | }; | 729 | }; |
885 | 730 | ||
@@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { | |||
915 | { .irq = 48, }, | 760 | { .irq = 48, }, |
916 | }; | 761 | }; |
917 | 762 | ||
918 | static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { | ||
919 | { | ||
920 | .pa_start = 0x4808a000, | ||
921 | .pa_end = 0x4808a000 + SZ_1K - 1, | ||
922 | .flags = ADDR_TYPE_RT | ||
923 | }, | ||
924 | { } | ||
925 | }; | ||
926 | |||
927 | /* l4_core -> timer12 */ | 763 | /* l4_core -> timer12 */ |
928 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { | 764 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { |
929 | .master = &omap2420_l4_core_hwmod, | 765 | .master = &omap2420_l4_core_hwmod, |
930 | .slave = &omap2420_timer12_hwmod, | 766 | .slave = &omap2420_timer12_hwmod, |
931 | .clk = "gpt12_ick", | 767 | .clk = "gpt12_ick", |
932 | .addr = omap2420_timer12_addrs, | 768 | .addr = omap2xxx_timer12_addrs, |
933 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 769 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
934 | }; | 770 | }; |
935 | 771 | ||
@@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { | |||
1178 | &omap2420_dss__l3, | 1014 | &omap2420_dss__l3, |
1179 | }; | 1015 | }; |
1180 | 1016 | ||
1181 | static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { | ||
1182 | { | ||
1183 | .pa_start = 0x48050000, | ||
1184 | .pa_end = 0x480503FF, | ||
1185 | .flags = ADDR_TYPE_RT | ||
1186 | }, | ||
1187 | { } | ||
1188 | }; | ||
1189 | |||
1190 | /* l4_core -> dss */ | 1017 | /* l4_core -> dss */ |
1191 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { | 1018 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { |
1192 | .master = &omap2420_l4_core_hwmod, | 1019 | .master = &omap2420_l4_core_hwmod, |
1193 | .slave = &omap2420_dss_core_hwmod, | 1020 | .slave = &omap2420_dss_core_hwmod, |
1194 | .clk = "dss_ick", | 1021 | .clk = "dss_ick", |
1195 | .addr = omap2420_dss_addrs, | 1022 | .addr = omap2_dss_addrs, |
1196 | .fw = { | 1023 | .fw = { |
1197 | .omap2 = { | 1024 | .omap2 = { |
1198 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, | 1025 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, |
@@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { | |||
1262 | { .irq = 25 }, | 1089 | { .irq = 25 }, |
1263 | }; | 1090 | }; |
1264 | 1091 | ||
1265 | static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { | ||
1266 | { | ||
1267 | .pa_start = 0x48050400, | ||
1268 | .pa_end = 0x480507FF, | ||
1269 | .flags = ADDR_TYPE_RT | ||
1270 | }, | ||
1271 | { } | ||
1272 | }; | ||
1273 | |||
1274 | /* l4_core -> dss_dispc */ | 1092 | /* l4_core -> dss_dispc */ |
1275 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { | 1093 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { |
1276 | .master = &omap2420_l4_core_hwmod, | 1094 | .master = &omap2420_l4_core_hwmod, |
1277 | .slave = &omap2420_dss_dispc_hwmod, | 1095 | .slave = &omap2420_dss_dispc_hwmod, |
1278 | .clk = "dss_ick", | 1096 | .clk = "dss_ick", |
1279 | .addr = omap2420_dss_dispc_addrs, | 1097 | .addr = omap2_dss_dispc_addrs, |
1280 | .fw = { | 1098 | .fw = { |
1281 | .omap2 = { | 1099 | .omap2 = { |
1282 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, | 1100 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, |
@@ -1332,21 +1150,12 @@ static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { | |||
1332 | .sysc = &omap2420_rfbi_sysc, | 1150 | .sysc = &omap2420_rfbi_sysc, |
1333 | }; | 1151 | }; |
1334 | 1152 | ||
1335 | static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { | ||
1336 | { | ||
1337 | .pa_start = 0x48050800, | ||
1338 | .pa_end = 0x48050BFF, | ||
1339 | .flags = ADDR_TYPE_RT | ||
1340 | }, | ||
1341 | { } | ||
1342 | }; | ||
1343 | |||
1344 | /* l4_core -> dss_rfbi */ | 1153 | /* l4_core -> dss_rfbi */ |
1345 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { | 1154 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { |
1346 | .master = &omap2420_l4_core_hwmod, | 1155 | .master = &omap2420_l4_core_hwmod, |
1347 | .slave = &omap2420_dss_rfbi_hwmod, | 1156 | .slave = &omap2420_dss_rfbi_hwmod, |
1348 | .clk = "dss_ick", | 1157 | .clk = "dss_ick", |
1349 | .addr = omap2420_dss_rfbi_addrs, | 1158 | .addr = omap2_dss_rfbi_addrs, |
1350 | .fw = { | 1159 | .fw = { |
1351 | .omap2 = { | 1160 | .omap2 = { |
1352 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, | 1161 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, |
@@ -1387,22 +1196,12 @@ static struct omap_hwmod_class omap2420_venc_hwmod_class = { | |||
1387 | .name = "venc", | 1196 | .name = "venc", |
1388 | }; | 1197 | }; |
1389 | 1198 | ||
1390 | /* dss_venc */ | ||
1391 | static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { | ||
1392 | { | ||
1393 | .pa_start = 0x48050C00, | ||
1394 | .pa_end = 0x48050FFF, | ||
1395 | .flags = ADDR_TYPE_RT | ||
1396 | }, | ||
1397 | { } | ||
1398 | }; | ||
1399 | |||
1400 | /* l4_core -> dss_venc */ | 1199 | /* l4_core -> dss_venc */ |
1401 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { | 1200 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { |
1402 | .master = &omap2420_l4_core_hwmod, | 1201 | .master = &omap2420_l4_core_hwmod, |
1403 | .slave = &omap2420_dss_venc_hwmod, | 1202 | .slave = &omap2420_dss_venc_hwmod, |
1404 | .clk = "dss_54m_fck", | 1203 | .clk = "dss_54m_fck", |
1405 | .addr = omap2420_dss_venc_addrs, | 1204 | .addr = omap2_dss_venc_addrs, |
1406 | .fw = { | 1205 | .fw = { |
1407 | .omap2 = { | 1206 | .omap2 = { |
1408 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, | 1207 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, |
@@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { | |||
1783 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | 1582 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ |
1784 | }; | 1583 | }; |
1785 | 1584 | ||
1786 | static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { | ||
1787 | { | ||
1788 | .pa_start = 0x48056000, | ||
1789 | .pa_end = 0x48056fff, | ||
1790 | .flags = ADDR_TYPE_RT | ||
1791 | }, | ||
1792 | { } | ||
1793 | }; | ||
1794 | |||
1795 | /* dma_system -> L3 */ | 1585 | /* dma_system -> L3 */ |
1796 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { | 1586 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { |
1797 | .master = &omap2420_dma_system_hwmod, | 1587 | .master = &omap2420_dma_system_hwmod, |
@@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { | |||
1810 | .master = &omap2420_l4_core_hwmod, | 1600 | .master = &omap2420_l4_core_hwmod, |
1811 | .slave = &omap2420_dma_system_hwmod, | 1601 | .slave = &omap2420_dma_system_hwmod, |
1812 | .clk = "sdma_ick", | 1602 | .clk = "sdma_ick", |
1813 | .addr = omap2420_dma_system_addrs, | 1603 | .addr = omap2_dma_system_addrs, |
1814 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1604 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1815 | }; | 1605 | }; |
1816 | 1606 | ||
@@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { | |||
1862 | { .name = "iva", .irq = 34 }, | 1652 | { .name = "iva", .irq = 34 }, |
1863 | }; | 1653 | }; |
1864 | 1654 | ||
1865 | static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { | ||
1866 | { | ||
1867 | .pa_start = 0x48094000, | ||
1868 | .pa_end = 0x480941ff, | ||
1869 | .flags = ADDR_TYPE_RT, | ||
1870 | }, | ||
1871 | { } | ||
1872 | }; | ||
1873 | |||
1874 | /* l4_core -> mailbox */ | 1655 | /* l4_core -> mailbox */ |
1875 | static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { | 1656 | static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { |
1876 | .master = &omap2420_l4_core_hwmod, | 1657 | .master = &omap2420_l4_core_hwmod, |
1877 | .slave = &omap2420_mailbox_hwmod, | 1658 | .slave = &omap2420_mailbox_hwmod, |
1878 | .addr = omap2420_mailbox_addrs, | 1659 | .addr = omap2_mailbox_addrs, |
1879 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1660 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1880 | }; | 1661 | }; |
1881 | 1662 | ||
@@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { | |||
2037 | { .name = "tx", .dma_req = 31 }, | 1818 | { .name = "tx", .dma_req = 31 }, |
2038 | }; | 1819 | }; |
2039 | 1820 | ||
2040 | static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { | ||
2041 | { | ||
2042 | .name = "mpu", | ||
2043 | .pa_start = 0x48074000, | ||
2044 | .pa_end = 0x480740ff, | ||
2045 | .flags = ADDR_TYPE_RT | ||
2046 | }, | ||
2047 | { } | ||
2048 | }; | ||
2049 | |||
2050 | /* l4_core -> mcbsp1 */ | 1821 | /* l4_core -> mcbsp1 */ |
2051 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { | 1822 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { |
2052 | .master = &omap2420_l4_core_hwmod, | 1823 | .master = &omap2420_l4_core_hwmod, |
2053 | .slave = &omap2420_mcbsp1_hwmod, | 1824 | .slave = &omap2420_mcbsp1_hwmod, |
2054 | .clk = "mcbsp1_ick", | 1825 | .clk = "mcbsp1_ick", |
2055 | .addr = omap2420_mcbsp1_addrs, | 1826 | .addr = omap2_mcbsp1_addrs, |
2056 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1827 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
2057 | }; | 1828 | }; |
2058 | 1829 | ||
@@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { | |||
2094 | { .name = "tx", .dma_req = 33 }, | 1865 | { .name = "tx", .dma_req = 33 }, |
2095 | }; | 1866 | }; |
2096 | 1867 | ||
2097 | static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { | ||
2098 | { | ||
2099 | .name = "mpu", | ||
2100 | .pa_start = 0x48076000, | ||
2101 | .pa_end = 0x480760ff, | ||
2102 | .flags = ADDR_TYPE_RT | ||
2103 | }, | ||
2104 | { } | ||
2105 | }; | ||
2106 | |||
2107 | /* l4_core -> mcbsp2 */ | 1868 | /* l4_core -> mcbsp2 */ |
2108 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { | 1869 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { |
2109 | .master = &omap2420_l4_core_hwmod, | 1870 | .master = &omap2420_l4_core_hwmod, |
2110 | .slave = &omap2420_mcbsp2_hwmod, | 1871 | .slave = &omap2420_mcbsp2_hwmod, |
2111 | .clk = "mcbsp2_ick", | 1872 | .clk = "mcbsp2_ick", |
2112 | .addr = omap2420_mcbsp2_addrs, | 1873 | .addr = omap2xxx_mcbsp2_addrs, |
2113 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1874 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
2114 | }; | 1875 | }; |
2115 | 1876 | ||