diff options
Diffstat (limited to 'arch/arm/mach-omap2/smartreflex.c')
-rw-r--r-- | arch/arm/mach-omap2/smartreflex.c | 1043 |
1 files changed, 1043 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c new file mode 100644 index 000000000000..fb7dc52394a8 --- /dev/null +++ b/arch/arm/mach-omap2/smartreflex.c | |||
@@ -0,0 +1,1043 @@ | |||
1 | /* | ||
2 | * OMAP SmartReflex Voltage Control | ||
3 | * | ||
4 | * Author: Thara Gopinath <thara@ti.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 Texas Instruments, Inc. | ||
7 | * Thara Gopinath <thara@ti.com> | ||
8 | * | ||
9 | * Copyright (C) 2008 Nokia Corporation | ||
10 | * Kalle Jokiniemi | ||
11 | * | ||
12 | * Copyright (C) 2007 Texas Instruments, Inc. | ||
13 | * Lesly A M <x0080970@ti.com> | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/clk.h> | ||
22 | #include <linux/io.h> | ||
23 | #include <linux/debugfs.h> | ||
24 | #include <linux/delay.h> | ||
25 | #include <linux/slab.h> | ||
26 | #include <linux/pm_runtime.h> | ||
27 | |||
28 | #include <plat/common.h> | ||
29 | |||
30 | #include "pm.h" | ||
31 | #include "smartreflex.h" | ||
32 | |||
33 | #define SMARTREFLEX_NAME_LEN 16 | ||
34 | #define NVALUE_NAME_LEN 40 | ||
35 | #define SR_DISABLE_TIMEOUT 200 | ||
36 | |||
37 | struct omap_sr { | ||
38 | int srid; | ||
39 | int ip_type; | ||
40 | int nvalue_count; | ||
41 | bool autocomp_active; | ||
42 | u32 clk_length; | ||
43 | u32 err_weight; | ||
44 | u32 err_minlimit; | ||
45 | u32 err_maxlimit; | ||
46 | u32 accum_data; | ||
47 | u32 senn_avgweight; | ||
48 | u32 senp_avgweight; | ||
49 | u32 senp_mod; | ||
50 | u32 senn_mod; | ||
51 | unsigned int irq; | ||
52 | void __iomem *base; | ||
53 | struct platform_device *pdev; | ||
54 | struct list_head node; | ||
55 | struct omap_sr_nvalue_table *nvalue_table; | ||
56 | struct voltagedomain *voltdm; | ||
57 | struct dentry *dbg_dir; | ||
58 | }; | ||
59 | |||
60 | /* sr_list contains all the instances of smartreflex module */ | ||
61 | static LIST_HEAD(sr_list); | ||
62 | |||
63 | static struct omap_sr_class_data *sr_class; | ||
64 | static struct omap_sr_pmic_data *sr_pmic_data; | ||
65 | |||
66 | static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) | ||
67 | { | ||
68 | __raw_writel(value, (sr->base + offset)); | ||
69 | } | ||
70 | |||
71 | static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, | ||
72 | u32 value) | ||
73 | { | ||
74 | u32 reg_val; | ||
75 | u32 errconfig_offs = 0, errconfig_mask = 0; | ||
76 | |||
77 | reg_val = __raw_readl(sr->base + offset); | ||
78 | reg_val &= ~mask; | ||
79 | |||
80 | /* | ||
81 | * Smartreflex error config register is special as it contains | ||
82 | * certain status bits which if written a 1 into means a clear | ||
83 | * of those bits. So in order to make sure no accidental write of | ||
84 | * 1 happens to those status bits, do a clear of them in the read | ||
85 | * value. This mean this API doesn't rewrite values in these bits | ||
86 | * if they are currently set, but does allow the caller to write | ||
87 | * those bits. | ||
88 | */ | ||
89 | if (sr->ip_type == SR_TYPE_V1) { | ||
90 | errconfig_offs = ERRCONFIG_V1; | ||
91 | errconfig_mask = ERRCONFIG_STATUS_V1_MASK; | ||
92 | } else if (sr->ip_type == SR_TYPE_V2) { | ||
93 | errconfig_offs = ERRCONFIG_V2; | ||
94 | errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2; | ||
95 | } | ||
96 | |||
97 | if (offset == errconfig_offs) | ||
98 | reg_val &= ~errconfig_mask; | ||
99 | |||
100 | reg_val |= value; | ||
101 | |||
102 | __raw_writel(reg_val, (sr->base + offset)); | ||
103 | } | ||
104 | |||
105 | static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset) | ||
106 | { | ||
107 | return __raw_readl(sr->base + offset); | ||
108 | } | ||
109 | |||
110 | static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm) | ||
111 | { | ||
112 | struct omap_sr *sr_info; | ||
113 | |||
114 | if (!voltdm) { | ||
115 | pr_err("%s: Null voltage domain passed!\n", __func__); | ||
116 | return ERR_PTR(-EINVAL); | ||
117 | } | ||
118 | |||
119 | list_for_each_entry(sr_info, &sr_list, node) { | ||
120 | if (voltdm == sr_info->voltdm) | ||
121 | return sr_info; | ||
122 | } | ||
123 | |||
124 | return ERR_PTR(-ENODATA); | ||
125 | } | ||
126 | |||
127 | static irqreturn_t sr_interrupt(int irq, void *data) | ||
128 | { | ||
129 | struct omap_sr *sr_info = (struct omap_sr *)data; | ||
130 | u32 status = 0; | ||
131 | |||
132 | if (sr_info->ip_type == SR_TYPE_V1) { | ||
133 | /* Read the status bits */ | ||
134 | status = sr_read_reg(sr_info, ERRCONFIG_V1); | ||
135 | |||
136 | /* Clear them by writing back */ | ||
137 | sr_write_reg(sr_info, ERRCONFIG_V1, status); | ||
138 | } else if (sr_info->ip_type == SR_TYPE_V2) { | ||
139 | /* Read the status bits */ | ||
140 | sr_read_reg(sr_info, IRQSTATUS); | ||
141 | |||
142 | /* Clear them by writing back */ | ||
143 | sr_write_reg(sr_info, IRQSTATUS, status); | ||
144 | } | ||
145 | |||
146 | if (sr_class->class_type == SR_CLASS2 && sr_class->notify) | ||
147 | sr_class->notify(sr_info->voltdm, status); | ||
148 | |||
149 | return IRQ_HANDLED; | ||
150 | } | ||
151 | |||
152 | static void sr_set_clk_length(struct omap_sr *sr) | ||
153 | { | ||
154 | struct clk *sys_ck; | ||
155 | u32 sys_clk_speed; | ||
156 | |||
157 | if (cpu_is_omap34xx()) | ||
158 | sys_ck = clk_get(NULL, "sys_ck"); | ||
159 | else | ||
160 | sys_ck = clk_get(NULL, "sys_clkin_ck"); | ||
161 | |||
162 | if (IS_ERR(sys_ck)) { | ||
163 | dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", | ||
164 | __func__); | ||
165 | return; | ||
166 | } | ||
167 | sys_clk_speed = clk_get_rate(sys_ck); | ||
168 | clk_put(sys_ck); | ||
169 | |||
170 | switch (sys_clk_speed) { | ||
171 | case 12000000: | ||
172 | sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; | ||
173 | break; | ||
174 | case 13000000: | ||
175 | sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK; | ||
176 | break; | ||
177 | case 19200000: | ||
178 | sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK; | ||
179 | break; | ||
180 | case 26000000: | ||
181 | sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK; | ||
182 | break; | ||
183 | case 38400000: | ||
184 | sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; | ||
185 | break; | ||
186 | default: | ||
187 | dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", | ||
188 | __func__, sys_clk_speed); | ||
189 | break; | ||
190 | } | ||
191 | } | ||
192 | |||
193 | static void sr_set_regfields(struct omap_sr *sr) | ||
194 | { | ||
195 | /* | ||
196 | * For time being these values are defined in smartreflex.h | ||
197 | * and populated during init. May be they can be moved to board | ||
198 | * file or pmic specific data structure. In that case these structure | ||
199 | * fields will have to be populated using the pdata or pmic structure. | ||
200 | */ | ||
201 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
202 | sr->err_weight = OMAP3430_SR_ERRWEIGHT; | ||
203 | sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | ||
204 | sr->accum_data = OMAP3430_SR_ACCUMDATA; | ||
205 | if (!(strcmp(sr->voltdm->name, "mpu"))) { | ||
206 | sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | ||
207 | sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | ||
208 | } else { | ||
209 | sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | ||
210 | sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | ||
211 | } | ||
212 | } | ||
213 | } | ||
214 | |||
215 | static void sr_start_vddautocomp(struct omap_sr *sr) | ||
216 | { | ||
217 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | ||
218 | dev_warn(&sr->pdev->dev, | ||
219 | "%s: smartreflex class driver not registered\n", | ||
220 | __func__); | ||
221 | return; | ||
222 | } | ||
223 | |||
224 | if (!sr_class->enable(sr->voltdm)) | ||
225 | sr->autocomp_active = true; | ||
226 | } | ||
227 | |||
228 | static void sr_stop_vddautocomp(struct omap_sr *sr) | ||
229 | { | ||
230 | if (!sr_class || !(sr_class->disable)) { | ||
231 | dev_warn(&sr->pdev->dev, | ||
232 | "%s: smartreflex class driver not registered\n", | ||
233 | __func__); | ||
234 | return; | ||
235 | } | ||
236 | |||
237 | if (sr->autocomp_active) { | ||
238 | sr_class->disable(sr->voltdm, 1); | ||
239 | sr->autocomp_active = false; | ||
240 | } | ||
241 | } | ||
242 | |||
243 | /* | ||
244 | * This function handles the intializations which have to be done | ||
245 | * only when both sr device and class driver regiter has | ||
246 | * completed. This will be attempted to be called from both sr class | ||
247 | * driver register and sr device intializtion API's. Only one call | ||
248 | * will ultimately succeed. | ||
249 | * | ||
250 | * Currently this function registers interrrupt handler for a particular SR | ||
251 | * if smartreflex class driver is already registered and has | ||
252 | * requested for interrupts and the SR interrupt line in present. | ||
253 | */ | ||
254 | static int sr_late_init(struct omap_sr *sr_info) | ||
255 | { | ||
256 | char *name; | ||
257 | struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data; | ||
258 | struct resource *mem; | ||
259 | int ret = 0; | ||
260 | |||
261 | if (sr_class->class_type == SR_CLASS2 && | ||
262 | sr_class->notify_flags && sr_info->irq) { | ||
263 | |||
264 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); | ||
265 | if (name == NULL) { | ||
266 | ret = -ENOMEM; | ||
267 | goto error; | ||
268 | } | ||
269 | ret = request_irq(sr_info->irq, sr_interrupt, | ||
270 | 0, name, (void *)sr_info); | ||
271 | if (ret) | ||
272 | goto error; | ||
273 | } | ||
274 | |||
275 | if (pdata && pdata->enable_on_init) | ||
276 | sr_start_vddautocomp(sr_info); | ||
277 | |||
278 | return ret; | ||
279 | |||
280 | error: | ||
281 | iounmap(sr_info->base); | ||
282 | mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | ||
283 | release_mem_region(mem->start, resource_size(mem)); | ||
284 | list_del(&sr_info->node); | ||
285 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | ||
286 | "interrupt handler. Smartreflex will" | ||
287 | "not function as desired\n", __func__); | ||
288 | kfree(name); | ||
289 | kfree(sr_info); | ||
290 | return ret; | ||
291 | } | ||
292 | |||
293 | static void sr_v1_disable(struct omap_sr *sr) | ||
294 | { | ||
295 | int timeout = 0; | ||
296 | |||
297 | /* Enable MCUDisableAcknowledge interrupt */ | ||
298 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
299 | ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN); | ||
300 | |||
301 | /* SRCONFIG - disable SR */ | ||
302 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | ||
303 | |||
304 | /* Disable all other SR interrupts and clear the status */ | ||
305 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
306 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | ||
307 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), | ||
308 | (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | | ||
309 | ERRCONFIG_MCUBOUNDINTST | | ||
310 | ERRCONFIG_VPBOUNDINTST_V1)); | ||
311 | |||
312 | /* | ||
313 | * Wait for SR to be disabled. | ||
314 | * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us. | ||
315 | */ | ||
316 | omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) & | ||
317 | ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT, | ||
318 | timeout); | ||
319 | |||
320 | if (timeout >= SR_DISABLE_TIMEOUT) | ||
321 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | ||
322 | __func__); | ||
323 | |||
324 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | ||
325 | sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN, | ||
326 | ERRCONFIG_MCUDISACKINTST); | ||
327 | } | ||
328 | |||
329 | static void sr_v2_disable(struct omap_sr *sr) | ||
330 | { | ||
331 | int timeout = 0; | ||
332 | |||
333 | /* Enable MCUDisableAcknowledge interrupt */ | ||
334 | sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT); | ||
335 | |||
336 | /* SRCONFIG - disable SR */ | ||
337 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | ||
338 | |||
339 | /* Disable all other SR interrupts and clear the status */ | ||
340 | sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, | ||
341 | ERRCONFIG_VPBOUNDINTST_V2); | ||
342 | sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | | ||
343 | IRQENABLE_MCUVALIDINT | | ||
344 | IRQENABLE_MCUBOUNDSINT)); | ||
345 | sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT | | ||
346 | IRQSTATUS_MCVALIDINT | | ||
347 | IRQSTATUS_MCBOUNDSINT)); | ||
348 | |||
349 | /* | ||
350 | * Wait for SR to be disabled. | ||
351 | * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us. | ||
352 | */ | ||
353 | omap_test_timeout((sr_read_reg(sr, IRQSTATUS) & | ||
354 | IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT, | ||
355 | timeout); | ||
356 | |||
357 | if (timeout >= SR_DISABLE_TIMEOUT) | ||
358 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | ||
359 | __func__); | ||
360 | |||
361 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | ||
362 | sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT); | ||
363 | sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT); | ||
364 | } | ||
365 | |||
366 | static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs) | ||
367 | { | ||
368 | int i; | ||
369 | |||
370 | if (!sr->nvalue_table) { | ||
371 | dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n", | ||
372 | __func__); | ||
373 | return 0; | ||
374 | } | ||
375 | |||
376 | for (i = 0; i < sr->nvalue_count; i++) { | ||
377 | if (sr->nvalue_table[i].efuse_offs == efuse_offs) | ||
378 | return sr->nvalue_table[i].nvalue; | ||
379 | } | ||
380 | |||
381 | return 0; | ||
382 | } | ||
383 | |||
384 | /* Public Functions */ | ||
385 | |||
386 | /** | ||
387 | * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the | ||
388 | * error generator module. | ||
389 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
390 | * | ||
391 | * This API is to be called from the smartreflex class driver to | ||
392 | * configure the error generator module inside the smartreflex module. | ||
393 | * SR settings if using the ERROR module inside Smartreflex. | ||
394 | * SR CLASS 3 by default uses only the ERROR module where as | ||
395 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | ||
396 | * module. Returns 0 on success and error value in case of failure. | ||
397 | */ | ||
398 | int sr_configure_errgen(struct voltagedomain *voltdm) | ||
399 | { | ||
400 | u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en; | ||
401 | u32 vpboundint_st, senp_en = 0, senn_en = 0; | ||
402 | u8 senp_shift, senn_shift; | ||
403 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
404 | |||
405 | if (IS_ERR(sr)) { | ||
406 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
407 | __func__, voltdm->name); | ||
408 | return -EINVAL; | ||
409 | } | ||
410 | |||
411 | if (!sr->clk_length) | ||
412 | sr_set_clk_length(sr); | ||
413 | |||
414 | senp_en = sr->senp_mod; | ||
415 | senn_en = sr->senn_mod; | ||
416 | |||
417 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | ||
418 | SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; | ||
419 | |||
420 | if (sr->ip_type == SR_TYPE_V1) { | ||
421 | sr_config |= SRCONFIG_DELAYCTRL; | ||
422 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | ||
423 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | ||
424 | errconfig_offs = ERRCONFIG_V1; | ||
425 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | ||
426 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | ||
427 | } else if (sr->ip_type == SR_TYPE_V2) { | ||
428 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | ||
429 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | ||
430 | errconfig_offs = ERRCONFIG_V2; | ||
431 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | ||
432 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | ||
433 | } else { | ||
434 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
435 | "module without specifying the ip\n", __func__); | ||
436 | return -EINVAL; | ||
437 | } | ||
438 | |||
439 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | ||
440 | sr_write_reg(sr, SRCONFIG, sr_config); | ||
441 | sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) | | ||
442 | (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) | | ||
443 | (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT); | ||
444 | sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK | | ||
445 | SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK), | ||
446 | sr_errconfig); | ||
447 | |||
448 | /* Enabling the interrupts if the ERROR module is used */ | ||
449 | sr_modify_reg(sr, errconfig_offs, | ||
450 | vpboundint_en, (vpboundint_en | vpboundint_st)); | ||
451 | |||
452 | return 0; | ||
453 | } | ||
454 | |||
455 | /** | ||
456 | * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the | ||
457 | * minmaxavg module. | ||
458 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
459 | * | ||
460 | * This API is to be called from the smartreflex class driver to | ||
461 | * configure the minmaxavg module inside the smartreflex module. | ||
462 | * SR settings if using the ERROR module inside Smartreflex. | ||
463 | * SR CLASS 3 by default uses only the ERROR module where as | ||
464 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | ||
465 | * module. Returns 0 on success and error value in case of failure. | ||
466 | */ | ||
467 | int sr_configure_minmax(struct voltagedomain *voltdm) | ||
468 | { | ||
469 | u32 sr_config, sr_avgwt; | ||
470 | u32 senp_en = 0, senn_en = 0; | ||
471 | u8 senp_shift, senn_shift; | ||
472 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
473 | |||
474 | if (IS_ERR(sr)) { | ||
475 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
476 | __func__, voltdm->name); | ||
477 | return -EINVAL; | ||
478 | } | ||
479 | |||
480 | if (!sr->clk_length) | ||
481 | sr_set_clk_length(sr); | ||
482 | |||
483 | senp_en = sr->senp_mod; | ||
484 | senn_en = sr->senn_mod; | ||
485 | |||
486 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | ||
487 | SRCONFIG_SENENABLE | | ||
488 | (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); | ||
489 | |||
490 | if (sr->ip_type == SR_TYPE_V1) { | ||
491 | sr_config |= SRCONFIG_DELAYCTRL; | ||
492 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | ||
493 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | ||
494 | } else if (sr->ip_type == SR_TYPE_V2) { | ||
495 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | ||
496 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | ||
497 | } else { | ||
498 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
499 | "module without specifying the ip\n", __func__); | ||
500 | return -EINVAL; | ||
501 | } | ||
502 | |||
503 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | ||
504 | sr_write_reg(sr, SRCONFIG, sr_config); | ||
505 | sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) | | ||
506 | (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT); | ||
507 | sr_write_reg(sr, AVGWEIGHT, sr_avgwt); | ||
508 | |||
509 | /* | ||
510 | * Enabling the interrupts if MINMAXAVG module is used. | ||
511 | * TODO: check if all the interrupts are mandatory | ||
512 | */ | ||
513 | if (sr->ip_type == SR_TYPE_V1) { | ||
514 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
515 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | ||
516 | ERRCONFIG_MCUBOUNDINTEN), | ||
517 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | | ||
518 | ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | | ||
519 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); | ||
520 | } else if (sr->ip_type == SR_TYPE_V2) { | ||
521 | sr_write_reg(sr, IRQSTATUS, | ||
522 | IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | | ||
523 | IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); | ||
524 | sr_write_reg(sr, IRQENABLE_SET, | ||
525 | IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | | ||
526 | IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); | ||
527 | } | ||
528 | |||
529 | return 0; | ||
530 | } | ||
531 | |||
532 | /** | ||
533 | * sr_enable() - Enables the smartreflex module. | ||
534 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
535 | * @volt: The voltage at which the Voltage domain associated with | ||
536 | * the smartreflex module is operating at. | ||
537 | * This is required only to program the correct Ntarget value. | ||
538 | * | ||
539 | * This API is to be called from the smartreflex class driver to | ||
540 | * enable a smartreflex module. Returns 0 on success. Returns error | ||
541 | * value if the voltage passed is wrong or if ntarget value is wrong. | ||
542 | */ | ||
543 | int sr_enable(struct voltagedomain *voltdm, unsigned long volt) | ||
544 | { | ||
545 | u32 nvalue_reciprocal; | ||
546 | struct omap_volt_data *volt_data; | ||
547 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
548 | int ret; | ||
549 | |||
550 | if (IS_ERR(sr)) { | ||
551 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
552 | __func__, voltdm->name); | ||
553 | return -EINVAL; | ||
554 | } | ||
555 | |||
556 | volt_data = omap_voltage_get_voltdata(sr->voltdm, volt); | ||
557 | |||
558 | if (IS_ERR(volt_data)) { | ||
559 | dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table" | ||
560 | "for nominal voltage %ld\n", __func__, volt); | ||
561 | return -ENODATA; | ||
562 | } | ||
563 | |||
564 | nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs); | ||
565 | |||
566 | if (!nvalue_reciprocal) { | ||
567 | dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n", | ||
568 | __func__, volt); | ||
569 | return -ENODATA; | ||
570 | } | ||
571 | |||
572 | /* errminlimit is opp dependent and hence linked to voltage */ | ||
573 | sr->err_minlimit = volt_data->sr_errminlimit; | ||
574 | |||
575 | pm_runtime_get_sync(&sr->pdev->dev); | ||
576 | |||
577 | /* Check if SR is already enabled. If yes do nothing */ | ||
578 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) | ||
579 | return 0; | ||
580 | |||
581 | /* Configure SR */ | ||
582 | ret = sr_class->configure(voltdm); | ||
583 | if (ret) | ||
584 | return ret; | ||
585 | |||
586 | sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal); | ||
587 | |||
588 | /* SRCONFIG - enable SR */ | ||
589 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE); | ||
590 | return 0; | ||
591 | } | ||
592 | |||
593 | /** | ||
594 | * sr_disable() - Disables the smartreflex module. | ||
595 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
596 | * | ||
597 | * This API is to be called from the smartreflex class driver to | ||
598 | * disable a smartreflex module. | ||
599 | */ | ||
600 | void sr_disable(struct voltagedomain *voltdm) | ||
601 | { | ||
602 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
603 | |||
604 | if (IS_ERR(sr)) { | ||
605 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
606 | __func__, voltdm->name); | ||
607 | return; | ||
608 | } | ||
609 | |||
610 | /* Check if SR clocks are already disabled. If yes do nothing */ | ||
611 | if (pm_runtime_suspended(&sr->pdev->dev)) | ||
612 | return; | ||
613 | |||
614 | /* | ||
615 | * Disable SR if only it is indeed enabled. Else just | ||
616 | * disable the clocks. | ||
617 | */ | ||
618 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) { | ||
619 | if (sr->ip_type == SR_TYPE_V1) | ||
620 | sr_v1_disable(sr); | ||
621 | else if (sr->ip_type == SR_TYPE_V2) | ||
622 | sr_v2_disable(sr); | ||
623 | } | ||
624 | |||
625 | pm_runtime_put_sync(&sr->pdev->dev); | ||
626 | } | ||
627 | |||
628 | /** | ||
629 | * sr_register_class() - API to register a smartreflex class parameters. | ||
630 | * @class_data: The structure containing various sr class specific data. | ||
631 | * | ||
632 | * This API is to be called by the smartreflex class driver to register itself | ||
633 | * with the smartreflex driver during init. Returns 0 on success else the | ||
634 | * error value. | ||
635 | */ | ||
636 | int sr_register_class(struct omap_sr_class_data *class_data) | ||
637 | { | ||
638 | struct omap_sr *sr_info; | ||
639 | |||
640 | if (!class_data) { | ||
641 | pr_warning("%s:, Smartreflex class data passed is NULL\n", | ||
642 | __func__); | ||
643 | return -EINVAL; | ||
644 | } | ||
645 | |||
646 | if (sr_class) { | ||
647 | pr_warning("%s: Smartreflex class driver already registered\n", | ||
648 | __func__); | ||
649 | return -EBUSY; | ||
650 | } | ||
651 | |||
652 | sr_class = class_data; | ||
653 | |||
654 | /* | ||
655 | * Call into late init to do intializations that require | ||
656 | * both sr driver and sr class driver to be initiallized. | ||
657 | */ | ||
658 | list_for_each_entry(sr_info, &sr_list, node) | ||
659 | sr_late_init(sr_info); | ||
660 | |||
661 | return 0; | ||
662 | } | ||
663 | |||
664 | /** | ||
665 | * omap_sr_enable() - API to enable SR clocks and to call into the | ||
666 | * registered smartreflex class enable API. | ||
667 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
668 | * | ||
669 | * This API is to be called from the kernel in order to enable | ||
670 | * a particular smartreflex module. This API will do the initial | ||
671 | * configurations to turn on the smartreflex module and in turn call | ||
672 | * into the registered smartreflex class enable API. | ||
673 | */ | ||
674 | void omap_sr_enable(struct voltagedomain *voltdm) | ||
675 | { | ||
676 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
677 | |||
678 | if (IS_ERR(sr)) { | ||
679 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
680 | __func__, voltdm->name); | ||
681 | return; | ||
682 | } | ||
683 | |||
684 | if (!sr->autocomp_active) | ||
685 | return; | ||
686 | |||
687 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | ||
688 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
689 | "registered\n", __func__); | ||
690 | return; | ||
691 | } | ||
692 | |||
693 | sr_class->enable(voltdm); | ||
694 | } | ||
695 | |||
696 | /** | ||
697 | * omap_sr_disable() - API to disable SR without resetting the voltage | ||
698 | * processor voltage | ||
699 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
700 | * | ||
701 | * This API is to be called from the kernel in order to disable | ||
702 | * a particular smartreflex module. This API will in turn call | ||
703 | * into the registered smartreflex class disable API. This API will tell | ||
704 | * the smartreflex class disable not to reset the VP voltage after | ||
705 | * disabling smartreflex. | ||
706 | */ | ||
707 | void omap_sr_disable(struct voltagedomain *voltdm) | ||
708 | { | ||
709 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
710 | |||
711 | if (IS_ERR(sr)) { | ||
712 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
713 | __func__, voltdm->name); | ||
714 | return; | ||
715 | } | ||
716 | |||
717 | if (!sr->autocomp_active) | ||
718 | return; | ||
719 | |||
720 | if (!sr_class || !(sr_class->disable)) { | ||
721 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
722 | "registered\n", __func__); | ||
723 | return; | ||
724 | } | ||
725 | |||
726 | sr_class->disable(voltdm, 0); | ||
727 | } | ||
728 | |||
729 | /** | ||
730 | * omap_sr_disable_reset_volt() - API to disable SR and reset the | ||
731 | * voltage processor voltage | ||
732 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
733 | * | ||
734 | * This API is to be called from the kernel in order to disable | ||
735 | * a particular smartreflex module. This API will in turn call | ||
736 | * into the registered smartreflex class disable API. This API will tell | ||
737 | * the smartreflex class disable to reset the VP voltage after | ||
738 | * disabling smartreflex. | ||
739 | */ | ||
740 | void omap_sr_disable_reset_volt(struct voltagedomain *voltdm) | ||
741 | { | ||
742 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
743 | |||
744 | if (IS_ERR(sr)) { | ||
745 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
746 | __func__, voltdm->name); | ||
747 | return; | ||
748 | } | ||
749 | |||
750 | if (!sr->autocomp_active) | ||
751 | return; | ||
752 | |||
753 | if (!sr_class || !(sr_class->disable)) { | ||
754 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
755 | "registered\n", __func__); | ||
756 | return; | ||
757 | } | ||
758 | |||
759 | sr_class->disable(voltdm, 1); | ||
760 | } | ||
761 | |||
762 | /** | ||
763 | * omap_sr_register_pmic() - API to register pmic specific info. | ||
764 | * @pmic_data: The structure containing pmic specific data. | ||
765 | * | ||
766 | * This API is to be called from the PMIC specific code to register with | ||
767 | * smartreflex driver pmic specific info. Currently the only info required | ||
768 | * is the smartreflex init on the PMIC side. | ||
769 | */ | ||
770 | void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data) | ||
771 | { | ||
772 | if (!pmic_data) { | ||
773 | pr_warning("%s: Trying to register NULL PMIC data structure" | ||
774 | "with smartreflex\n", __func__); | ||
775 | return; | ||
776 | } | ||
777 | |||
778 | sr_pmic_data = pmic_data; | ||
779 | } | ||
780 | |||
781 | /* PM Debug Fs enteries to enable disable smartreflex. */ | ||
782 | static int omap_sr_autocomp_show(void *data, u64 *val) | ||
783 | { | ||
784 | struct omap_sr *sr_info = (struct omap_sr *) data; | ||
785 | |||
786 | if (!sr_info) { | ||
787 | pr_warning("%s: omap_sr struct not found\n", __func__); | ||
788 | return -EINVAL; | ||
789 | } | ||
790 | |||
791 | *val = sr_info->autocomp_active; | ||
792 | |||
793 | return 0; | ||
794 | } | ||
795 | |||
796 | static int omap_sr_autocomp_store(void *data, u64 val) | ||
797 | { | ||
798 | struct omap_sr *sr_info = (struct omap_sr *) data; | ||
799 | |||
800 | if (!sr_info) { | ||
801 | pr_warning("%s: omap_sr struct not found\n", __func__); | ||
802 | return -EINVAL; | ||
803 | } | ||
804 | |||
805 | /* Sanity check */ | ||
806 | if (val && (val != 1)) { | ||
807 | pr_warning("%s: Invalid argument %lld\n", __func__, val); | ||
808 | return -EINVAL; | ||
809 | } | ||
810 | |||
811 | if (!val) | ||
812 | sr_stop_vddautocomp(sr_info); | ||
813 | else | ||
814 | sr_start_vddautocomp(sr_info); | ||
815 | |||
816 | return 0; | ||
817 | } | ||
818 | |||
819 | DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, | ||
820 | omap_sr_autocomp_store, "%llu\n"); | ||
821 | |||
822 | static int __init omap_sr_probe(struct platform_device *pdev) | ||
823 | { | ||
824 | struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); | ||
825 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
826 | struct resource *mem, *irq; | ||
827 | struct dentry *vdd_dbg_dir, *nvalue_dir; | ||
828 | struct omap_volt_data *volt_data; | ||
829 | int i, ret = 0; | ||
830 | |||
831 | if (!sr_info) { | ||
832 | dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", | ||
833 | __func__); | ||
834 | return -ENOMEM; | ||
835 | } | ||
836 | |||
837 | if (!pdata) { | ||
838 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | ||
839 | ret = -EINVAL; | ||
840 | goto err_free_devinfo; | ||
841 | } | ||
842 | |||
843 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
844 | if (!mem) { | ||
845 | dev_err(&pdev->dev, "%s: no mem resource\n", __func__); | ||
846 | ret = -ENODEV; | ||
847 | goto err_free_devinfo; | ||
848 | } | ||
849 | |||
850 | mem = request_mem_region(mem->start, resource_size(mem), | ||
851 | dev_name(&pdev->dev)); | ||
852 | if (!mem) { | ||
853 | dev_err(&pdev->dev, "%s: no mem region\n", __func__); | ||
854 | ret = -EBUSY; | ||
855 | goto err_free_devinfo; | ||
856 | } | ||
857 | |||
858 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
859 | |||
860 | pm_runtime_enable(&pdev->dev); | ||
861 | |||
862 | sr_info->pdev = pdev; | ||
863 | sr_info->srid = pdev->id; | ||
864 | sr_info->voltdm = pdata->voltdm; | ||
865 | sr_info->nvalue_table = pdata->nvalue_table; | ||
866 | sr_info->nvalue_count = pdata->nvalue_count; | ||
867 | sr_info->senn_mod = pdata->senn_mod; | ||
868 | sr_info->senp_mod = pdata->senp_mod; | ||
869 | sr_info->autocomp_active = false; | ||
870 | sr_info->ip_type = pdata->ip_type; | ||
871 | sr_info->base = ioremap(mem->start, resource_size(mem)); | ||
872 | if (!sr_info->base) { | ||
873 | dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); | ||
874 | ret = -ENOMEM; | ||
875 | goto err_release_region; | ||
876 | } | ||
877 | |||
878 | if (irq) | ||
879 | sr_info->irq = irq->start; | ||
880 | |||
881 | sr_set_clk_length(sr_info); | ||
882 | sr_set_regfields(sr_info); | ||
883 | |||
884 | list_add(&sr_info->node, &sr_list); | ||
885 | |||
886 | /* | ||
887 | * Call into late init to do intializations that require | ||
888 | * both sr driver and sr class driver to be initiallized. | ||
889 | */ | ||
890 | if (sr_class) { | ||
891 | ret = sr_late_init(sr_info); | ||
892 | if (ret) { | ||
893 | pr_warning("%s: Error in SR late init\n", __func__); | ||
894 | return ret; | ||
895 | } | ||
896 | } | ||
897 | |||
898 | dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); | ||
899 | |||
900 | /* | ||
901 | * If the voltage domain debugfs directory is not created, do | ||
902 | * not try to create rest of the debugfs entries. | ||
903 | */ | ||
904 | vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); | ||
905 | if (!vdd_dbg_dir) { | ||
906 | ret = -EINVAL; | ||
907 | goto err_iounmap; | ||
908 | } | ||
909 | |||
910 | sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); | ||
911 | if (IS_ERR(sr_info->dbg_dir)) { | ||
912 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", | ||
913 | __func__); | ||
914 | ret = PTR_ERR(sr_info->dbg_dir); | ||
915 | goto err_iounmap; | ||
916 | } | ||
917 | |||
918 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, | ||
919 | sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops); | ||
920 | (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir, | ||
921 | &sr_info->err_weight); | ||
922 | (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir, | ||
923 | &sr_info->err_maxlimit); | ||
924 | (void) debugfs_create_x32("errminlimit", S_IRUGO, sr_info->dbg_dir, | ||
925 | &sr_info->err_minlimit); | ||
926 | |||
927 | nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir); | ||
928 | if (IS_ERR(nvalue_dir)) { | ||
929 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | ||
930 | "for n-values\n", __func__); | ||
931 | ret = PTR_ERR(nvalue_dir); | ||
932 | goto err_debugfs; | ||
933 | } | ||
934 | |||
935 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); | ||
936 | if (!volt_data) { | ||
937 | dev_warn(&pdev->dev, "%s: No Voltage table for the" | ||
938 | " corresponding vdd vdd_%s. Cannot create debugfs" | ||
939 | "entries for n-values\n", | ||
940 | __func__, sr_info->voltdm->name); | ||
941 | ret = -ENODATA; | ||
942 | goto err_debugfs; | ||
943 | } | ||
944 | |||
945 | for (i = 0; i < sr_info->nvalue_count; i++) { | ||
946 | char name[NVALUE_NAME_LEN + 1]; | ||
947 | |||
948 | snprintf(name, sizeof(name), "volt_%d", | ||
949 | volt_data[i].volt_nominal); | ||
950 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, | ||
951 | &(sr_info->nvalue_table[i].nvalue)); | ||
952 | } | ||
953 | |||
954 | return ret; | ||
955 | |||
956 | err_debugfs: | ||
957 | debugfs_remove_recursive(sr_info->dbg_dir); | ||
958 | err_iounmap: | ||
959 | list_del(&sr_info->node); | ||
960 | iounmap(sr_info->base); | ||
961 | err_release_region: | ||
962 | release_mem_region(mem->start, resource_size(mem)); | ||
963 | err_free_devinfo: | ||
964 | kfree(sr_info); | ||
965 | |||
966 | return ret; | ||
967 | } | ||
968 | |||
969 | static int __devexit omap_sr_remove(struct platform_device *pdev) | ||
970 | { | ||
971 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
972 | struct omap_sr *sr_info; | ||
973 | struct resource *mem; | ||
974 | |||
975 | if (!pdata) { | ||
976 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | ||
977 | return -EINVAL; | ||
978 | } | ||
979 | |||
980 | sr_info = _sr_lookup(pdata->voltdm); | ||
981 | if (IS_ERR(sr_info)) { | ||
982 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", | ||
983 | __func__); | ||
984 | return -EINVAL; | ||
985 | } | ||
986 | |||
987 | if (sr_info->autocomp_active) | ||
988 | sr_stop_vddautocomp(sr_info); | ||
989 | if (sr_info->dbg_dir) | ||
990 | debugfs_remove_recursive(sr_info->dbg_dir); | ||
991 | |||
992 | list_del(&sr_info->node); | ||
993 | iounmap(sr_info->base); | ||
994 | kfree(sr_info); | ||
995 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
996 | release_mem_region(mem->start, resource_size(mem)); | ||
997 | |||
998 | return 0; | ||
999 | } | ||
1000 | |||
1001 | static struct platform_driver smartreflex_driver = { | ||
1002 | .remove = omap_sr_remove, | ||
1003 | .driver = { | ||
1004 | .name = "smartreflex", | ||
1005 | }, | ||
1006 | }; | ||
1007 | |||
1008 | static int __init sr_init(void) | ||
1009 | { | ||
1010 | int ret = 0; | ||
1011 | |||
1012 | /* | ||
1013 | * sr_init is a late init. If by then a pmic specific API is not | ||
1014 | * registered either there is no need for anything to be done on | ||
1015 | * the PMIC side or somebody has forgotten to register a PMIC | ||
1016 | * handler. Warn for the second condition. | ||
1017 | */ | ||
1018 | if (sr_pmic_data && sr_pmic_data->sr_pmic_init) | ||
1019 | sr_pmic_data->sr_pmic_init(); | ||
1020 | else | ||
1021 | pr_warning("%s: No PMIC hook to init smartreflex\n", __func__); | ||
1022 | |||
1023 | ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe); | ||
1024 | if (ret) { | ||
1025 | pr_err("%s: platform driver register failed for SR\n", | ||
1026 | __func__); | ||
1027 | return ret; | ||
1028 | } | ||
1029 | |||
1030 | return 0; | ||
1031 | } | ||
1032 | |||
1033 | static void __exit sr_exit(void) | ||
1034 | { | ||
1035 | platform_driver_unregister(&smartreflex_driver); | ||
1036 | } | ||
1037 | late_initcall(sr_init); | ||
1038 | module_exit(sr_exit); | ||
1039 | |||
1040 | MODULE_DESCRIPTION("OMAP Smartreflex Driver"); | ||
1041 | MODULE_LICENSE("GPL"); | ||
1042 | MODULE_ALIAS("platform:" DRIVER_NAME); | ||
1043 | MODULE_AUTHOR("Texas Instruments Inc"); | ||