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-rw-r--r--arch/arm/mach-omap2/pm.h86
1 files changed, 72 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 3de6ece23fc8..45bcfce77352 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -11,23 +11,41 @@
11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H 11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
12#define __ARCH_ARM_MACH_OMAP2_PM_H 12#define __ARCH_ARM_MACH_OMAP2_PM_H
13 13
14#include <plat/powerdomain.h> 14#include <linux/err.h>
15 15
16extern u32 enable_off_mode; 16#include "powerdomain.h"
17extern u32 sleep_while_idle;
18 17
19extern void *omap3_secure_ram_storage; 18extern void *omap3_secure_ram_storage;
20extern void omap3_pm_off_mode_enable(int); 19extern void omap3_pm_off_mode_enable(int);
21extern void omap_sram_idle(void); 20extern void omap_sram_idle(void);
22extern int omap3_can_sleep(void); 21extern int omap3_can_sleep(void);
23extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state); 22extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
24extern int omap3_idle_init(void); 23extern int omap3_idle_init(void);
25 24
25#if defined(CONFIG_PM_OPP)
26extern int omap3_opp_init(void);
27extern int omap4_opp_init(void);
28#else
29static inline int omap3_opp_init(void)
30{
31 return -EINVAL;
32}
33static inline int omap4_opp_init(void)
34{
35 return -EINVAL;
36}
37#endif
38
39/*
40 * cpuidle mach specific parameters
41 *
42 * The board code can override the default C-states definition using
43 * omap3_pm_init_cpuidle
44 */
26struct cpuidle_params { 45struct cpuidle_params {
27 u8 valid; 46 u32 exit_latency; /* exit_latency = sleep + wake-up latencies */
28 u32 sleep_latency; 47 u32 target_residency;
29 u32 wake_latency; 48 u8 valid; /* validates the C-state */
30 u32 threshold;
31}; 49};
32 50
33#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) 51#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE)
@@ -48,14 +66,16 @@ extern struct omap_dm_timer *gptimer_wakeup;
48 66
49#ifdef CONFIG_PM_DEBUG 67#ifdef CONFIG_PM_DEBUG
50extern void omap2_pm_dump(int mode, int resume, unsigned int us); 68extern void omap2_pm_dump(int mode, int resume, unsigned int us);
69extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
51extern int omap2_pm_debug; 70extern int omap2_pm_debug;
71extern u32 enable_off_mode;
72extern u32 sleep_while_idle;
52#else 73#else
53#define omap2_pm_dump(mode, resume, us) do {} while (0); 74#define omap2_pm_dump(mode, resume, us) do {} while (0);
75#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
54#define omap2_pm_debug 0 76#define omap2_pm_debug 0
55#endif 77#define enable_off_mode 0
56 78#define sleep_while_idle 0
57#if defined(CONFIG_CPU_IDLE)
58extern void omap3_cpuidle_update_states(void);
59#endif 79#endif
60 80
61#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) 81#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
@@ -73,13 +93,51 @@ extern void omap24xx_idle_loop_suspend(void);
73extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, 93extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
74 void __iomem *sdrc_power); 94 void __iomem *sdrc_power);
75extern void omap34xx_cpu_suspend(u32 *addr, int save_state); 95extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
76extern void save_secure_ram_context(u32 *addr); 96extern int save_secure_ram_context(u32 *addr);
77extern void omap3_save_scratchpad_contents(void); 97extern void omap3_save_scratchpad_contents(void);
78 98
79extern unsigned int omap24xx_idle_loop_suspend_sz; 99extern unsigned int omap24xx_idle_loop_suspend_sz;
80extern unsigned int omap34xx_suspend_sz;
81extern unsigned int save_secure_ram_context_sz; 100extern unsigned int save_secure_ram_context_sz;
82extern unsigned int omap24xx_cpu_suspend_sz; 101extern unsigned int omap24xx_cpu_suspend_sz;
83extern unsigned int omap34xx_cpu_suspend_sz; 102extern unsigned int omap34xx_cpu_suspend_sz;
84 103
104#define PM_RTA_ERRATUM_i608 (1 << 0)
105#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
106
107#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
108extern u16 pm34xx_errata;
109#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
110extern void enable_omap3630_toggle_l2_on_restore(void);
111#else
112#define IS_PM34XX_ERRATUM(id) 0
113static inline void enable_omap3630_toggle_l2_on_restore(void) { }
114#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
115
116#ifdef CONFIG_OMAP_SMARTREFLEX
117extern int omap_devinit_smartreflex(void);
118extern void omap_enable_smartreflex_on_init(void);
119#else
120static inline int omap_devinit_smartreflex(void)
121{
122 return -EINVAL;
123}
124
125static inline void omap_enable_smartreflex_on_init(void) {}
126#endif
127
128#ifdef CONFIG_TWL4030_CORE
129extern int omap3_twl_init(void);
130extern int omap4_twl_init(void);
131extern int omap3_twl_set_sr_bit(bool enable);
132#else
133static inline int omap3_twl_init(void)
134{
135 return -EINVAL;
136}
137static inline int omap4_twl_init(void)
138{
139 return -EINVAL;
140}
141#endif
142
85#endif 143#endif