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-rw-r--r--arch/arm/mach-omap2/io.c177
1 files changed, 145 insertions, 32 deletions
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index b9ea70bce563..441e79d043a7 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -30,21 +30,19 @@
30 30
31#include <plat/sram.h> 31#include <plat/sram.h>
32#include <plat/sdrc.h> 32#include <plat/sdrc.h>
33#include <plat/gpmc.h>
34#include <plat/serial.h> 33#include <plat/serial.h>
35 34
36#include "clock2xxx.h" 35#include "clock2xxx.h"
37#include "clock3xxx.h" 36#include "clock3xxx.h"
38#include "clock44xx.h" 37#include "clock44xx.h"
38#include "io.h"
39 39
40#include <plat/omap-pm.h> 40#include <plat/omap-pm.h>
41#include <plat/powerdomain.h> 41#include "powerdomain.h"
42#include "powerdomains.h"
43
44#include <plat/clockdomain.h>
45#include "clockdomains.h"
46 42
43#include "clockdomain.h"
47#include <plat/omap_hwmod.h> 44#include <plat/omap_hwmod.h>
45#include <plat/multi.h>
48 46
49/* 47/*
50 * The machine specific code may provide the extra mapping besides the 48 * The machine specific code may provide the extra mapping besides the
@@ -67,7 +65,7 @@ static struct map_desc omap24xx_io_desc[] __initdata = {
67 }, 65 },
68}; 66};
69 67
70#ifdef CONFIG_ARCH_OMAP2420 68#ifdef CONFIG_SOC_OMAP2420
71static struct map_desc omap242x_io_desc[] __initdata = { 69static struct map_desc omap242x_io_desc[] __initdata = {
72 { 70 {
73 .virtual = DSP_MEM_2420_VIRT, 71 .virtual = DSP_MEM_2420_VIRT,
@@ -91,7 +89,7 @@ static struct map_desc omap242x_io_desc[] __initdata = {
91 89
92#endif 90#endif
93 91
94#ifdef CONFIG_ARCH_OMAP2430 92#ifdef CONFIG_SOC_OMAP2430
95static struct map_desc omap243x_io_desc[] __initdata = { 93static struct map_desc omap243x_io_desc[] __initdata = {
96 { 94 {
97 .virtual = L4_WK_243X_VIRT, 95 .virtual = L4_WK_243X_VIRT,
@@ -176,6 +174,18 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
176#endif 174#endif
177}; 175};
178#endif 176#endif
177
178#ifdef CONFIG_SOC_OMAPTI816X
179static struct map_desc omapti816x_io_desc[] __initdata = {
180 {
181 .virtual = L4_34XX_VIRT,
182 .pfn = __phys_to_pfn(L4_34XX_PHYS),
183 .length = L4_34XX_SIZE,
184 .type = MT_DEVICE
185 },
186};
187#endif
188
179#ifdef CONFIG_ARCH_OMAP4 189#ifdef CONFIG_ARCH_OMAP4
180static struct map_desc omap44xx_io_desc[] __initdata = { 190static struct map_desc omap44xx_io_desc[] __initdata = {
181 { 191 {
@@ -242,7 +252,7 @@ static void __init _omap2_map_common_io(void)
242 omap_sram_init(); 252 omap_sram_init();
243} 253}
244 254
245#ifdef CONFIG_ARCH_OMAP2420 255#ifdef CONFIG_SOC_OMAP2420
246void __init omap242x_map_common_io(void) 256void __init omap242x_map_common_io(void)
247{ 257{
248 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); 258 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
@@ -251,7 +261,7 @@ void __init omap242x_map_common_io(void)
251} 261}
252#endif 262#endif
253 263
254#ifdef CONFIG_ARCH_OMAP2430 264#ifdef CONFIG_SOC_OMAP2430
255void __init omap243x_map_common_io(void) 265void __init omap243x_map_common_io(void)
256{ 266{
257 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); 267 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
@@ -268,6 +278,14 @@ void __init omap34xx_map_common_io(void)
268} 278}
269#endif 279#endif
270 280
281#ifdef CONFIG_SOC_OMAPTI816X
282void __init omapti816x_map_common_io(void)
283{
284 iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc));
285 _omap2_map_common_io();
286}
287#endif
288
271#ifdef CONFIG_ARCH_OMAP4 289#ifdef CONFIG_ARCH_OMAP4
272void __init omap44xx_map_common_io(void) 290void __init omap44xx_map_common_io(void)
273{ 291{
@@ -296,7 +314,7 @@ static int __init _omap2_init_reprogram_sdrc(void)
296 return 0; 314 return 0;
297 315
298 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck"); 316 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
299 if (!dpll3_m2_ck) 317 if (IS_ERR(dpll3_m2_ck))
300 return -EINVAL; 318 return -EINVAL;
301 319
302 rate = clk_get_rate(dpll3_m2_ck); 320 rate = clk_get_rate(dpll3_m2_ck);
@@ -310,21 +328,79 @@ static int __init _omap2_init_reprogram_sdrc(void)
310 return v; 328 return v;
311} 329}
312 330
313void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, 331static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
314 struct omap_sdrc_params *sdrc_cs1)
315{ 332{
316 u8 skip_setup_idle = 0; 333 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
334}
317 335
318 pwrdm_init(powerdomains_omap); 336void __iomem *omap_irq_base;
319 clkdm_init(clockdomains_omap, clkdm_autodeps); 337
320 if (cpu_is_omap242x()) 338/*
339 * Initialize asm_irq_base for entry-macro.S
340 */
341static inline void omap_irq_base_init(void)
342{
343 if (cpu_is_omap24xx())
344 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
345 else if (cpu_is_omap34xx())
346 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
347 else if (cpu_is_omap44xx())
348 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
349 else
350 pr_err("Could not initialize omap_irq_base\n");
351}
352
353void __init omap2_init_common_infrastructure(void)
354{
355 u8 postsetup_state;
356
357 if (cpu_is_omap242x()) {
358 omap2xxx_powerdomains_init();
359 omap2xxx_clockdomains_init();
321 omap2420_hwmod_init(); 360 omap2420_hwmod_init();
322 else if (cpu_is_omap243x()) 361 } else if (cpu_is_omap243x()) {
362 omap2xxx_powerdomains_init();
363 omap2xxx_clockdomains_init();
323 omap2430_hwmod_init(); 364 omap2430_hwmod_init();
324 else if (cpu_is_omap34xx()) 365 } else if (cpu_is_omap34xx()) {
366 omap3xxx_powerdomains_init();
367 omap3xxx_clockdomains_init();
325 omap3xxx_hwmod_init(); 368 omap3xxx_hwmod_init();
326 /* The OPP tables have to be registered before a clk init */ 369 } else if (cpu_is_omap44xx()) {
327 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps); 370 omap44xx_powerdomains_init();
371 omap44xx_clockdomains_init();
372 omap44xx_hwmod_init();
373 } else {
374 pr_err("Could not init hwmod data - unknown SoC\n");
375 }
376
377 /* Set the default postsetup state for all hwmods */
378#ifdef CONFIG_PM_RUNTIME
379 postsetup_state = _HWMOD_STATE_IDLE;
380#else
381 postsetup_state = _HWMOD_STATE_ENABLED;
382#endif
383 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
384
385 /*
386 * Set the default postsetup state for unusual modules (like
387 * MPU WDT).
388 *
389 * The postsetup_state is not actually used until
390 * omap_hwmod_late_init(), so boards that desire full watchdog
391 * coverage of kernel initialization can reprogram the
392 * postsetup_state between the calls to
393 * omap2_init_common_infra() and omap2_init_common_devices().
394 *
395 * XXX ideally we could detect whether the MPU WDT was currently
396 * enabled here and make this conditional
397 */
398 postsetup_state = _HWMOD_STATE_DISABLED;
399 omap_hwmod_for_each_by_class("wd_timer",
400 _set_hwmod_postsetup_state,
401 &postsetup_state);
402
403 omap_pm_if_early_init();
328 404
329 if (cpu_is_omap2420()) 405 if (cpu_is_omap2420())
330 omap2420_clk_init(); 406 omap2420_clk_init();
@@ -335,19 +411,56 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
335 else if (cpu_is_omap44xx()) 411 else if (cpu_is_omap44xx())
336 omap4xxx_clk_init(); 412 omap4xxx_clk_init();
337 else 413 else
338 pr_err("Could not init clock framework - unknown CPU\n"); 414 pr_err("Could not init clock framework - unknown SoC\n");
339 415}
340 omap_serial_early_init();
341
342#ifndef CONFIG_PM_RUNTIME
343 skip_setup_idle = 1;
344#endif
345 if (cpu_is_omap24xx() || cpu_is_omap34xx()) /* FIXME: OMAP4 */
346 omap_hwmod_late_init(skip_setup_idle);
347 416
348 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 417void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
418 struct omap_sdrc_params *sdrc_cs1)
419{
420 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
349 omap2_sdrc_init(sdrc_cs0, sdrc_cs1); 421 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
350 _omap2_init_reprogram_sdrc(); 422 _omap2_init_reprogram_sdrc();
351 } 423 }
352 gpmc_init(); 424
425 omap_irq_base_init();
426}
427
428/*
429 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
430 */
431
432u8 omap_readb(u32 pa)
433{
434 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
435}
436EXPORT_SYMBOL(omap_readb);
437
438u16 omap_readw(u32 pa)
439{
440 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
441}
442EXPORT_SYMBOL(omap_readw);
443
444u32 omap_readl(u32 pa)
445{
446 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
447}
448EXPORT_SYMBOL(omap_readl);
449
450void omap_writeb(u8 v, u32 pa)
451{
452 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
453}
454EXPORT_SYMBOL(omap_writeb);
455
456void omap_writew(u16 v, u32 pa)
457{
458 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
459}
460EXPORT_SYMBOL(omap_writew);
461
462void omap_writel(u32 v, u32 pa)
463{
464 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
353} 465}
466EXPORT_SYMBOL(omap_writel);