diff options
Diffstat (limited to 'arch/arm/mach-omap2/cm-regbits-24xx.h')
| -rw-r--r-- | arch/arm/mach-omap2/cm-regbits-24xx.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h index da51cc3ed7eb..686290437568 100644 --- a/arch/arm/mach-omap2/cm-regbits-24xx.h +++ b/arch/arm/mach-omap2/cm-regbits-24xx.h | |||
| @@ -14,8 +14,6 @@ | |||
| 14 | * published by the Free Software Foundation. | 14 | * published by the Free Software Foundation. |
| 15 | */ | 15 | */ |
| 16 | 16 | ||
| 17 | #include "cm.h" | ||
| 18 | |||
| 19 | /* Bits shared between registers */ | 17 | /* Bits shared between registers */ |
| 20 | 18 | ||
| 21 | /* CM_FCLKEN1_CORE and CM_ICLKEN1_CORE shared bits */ | 19 | /* CM_FCLKEN1_CORE and CM_ICLKEN1_CORE shared bits */ |
| @@ -126,8 +124,12 @@ | |||
| 126 | #define OMAP24XX_ST_HDQ_MASK (1 << 23) | 124 | #define OMAP24XX_ST_HDQ_MASK (1 << 23) |
| 127 | #define OMAP2420_ST_I2C2_SHIFT 20 | 125 | #define OMAP2420_ST_I2C2_SHIFT 20 |
| 128 | #define OMAP2420_ST_I2C2_MASK (1 << 20) | 126 | #define OMAP2420_ST_I2C2_MASK (1 << 20) |
| 127 | #define OMAP2430_ST_I2CHS1_SHIFT 19 | ||
| 128 | #define OMAP2430_ST_I2CHS1_MASK (1 << 19) | ||
| 129 | #define OMAP2420_ST_I2C1_SHIFT 19 | 129 | #define OMAP2420_ST_I2C1_SHIFT 19 |
| 130 | #define OMAP2420_ST_I2C1_MASK (1 << 19) | 130 | #define OMAP2420_ST_I2C1_MASK (1 << 19) |
| 131 | #define OMAP2430_ST_I2CHS2_SHIFT 20 | ||
| 132 | #define OMAP2430_ST_I2CHS2_MASK (1 << 20) | ||
| 131 | #define OMAP24XX_ST_MCBSP2_SHIFT 16 | 133 | #define OMAP24XX_ST_MCBSP2_SHIFT 16 |
| 132 | #define OMAP24XX_ST_MCBSP2_MASK (1 << 16) | 134 | #define OMAP24XX_ST_MCBSP2_MASK (1 << 16) |
| 133 | #define OMAP24XX_ST_MCBSP1_SHIFT 15 | 135 | #define OMAP24XX_ST_MCBSP1_SHIFT 15 |
| @@ -208,8 +210,11 @@ | |||
| 208 | #define OMAP24XX_AUTO_USB_MASK (1 << 0) | 210 | #define OMAP24XX_AUTO_USB_MASK (1 << 0) |
| 209 | 211 | ||
| 210 | /* CM_AUTOIDLE3_CORE */ | 212 | /* CM_AUTOIDLE3_CORE */ |
| 213 | #define OMAP24XX_AUTO_SDRC_SHIFT 2 | ||
| 211 | #define OMAP24XX_AUTO_SDRC_MASK (1 << 2) | 214 | #define OMAP24XX_AUTO_SDRC_MASK (1 << 2) |
| 215 | #define OMAP24XX_AUTO_GPMC_SHIFT 1 | ||
| 212 | #define OMAP24XX_AUTO_GPMC_MASK (1 << 1) | 216 | #define OMAP24XX_AUTO_GPMC_MASK (1 << 1) |
| 217 | #define OMAP24XX_AUTO_SDMA_SHIFT 0 | ||
| 213 | #define OMAP24XX_AUTO_SDMA_MASK (1 << 0) | 218 | #define OMAP24XX_AUTO_SDMA_MASK (1 << 0) |
| 214 | 219 | ||
| 215 | /* CM_AUTOIDLE4_CORE */ | 220 | /* CM_AUTOIDLE4_CORE */ |
| @@ -432,4 +437,9 @@ | |||
| 432 | #define OMAP2430_AUTOSTATE_MDM_SHIFT 0 | 437 | #define OMAP2430_AUTOSTATE_MDM_SHIFT 0 |
| 433 | #define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0) | 438 | #define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0) |
| 434 | 439 | ||
| 440 | /* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */ | ||
| 441 | #define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0 | ||
| 442 | #define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1 | ||
| 443 | |||
| 444 | |||
| 435 | #endif | 445 | #endif |