6 files changed, 54 insertions, 35 deletions

diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index a575daaa62d1..9ba595083dab 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -20,6 +20,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <mach/mv78xx0.h>
+#include <mach/bridge-regs.h>
 #include <plat/cache-feroceon-l2.h>
 #include <plat/ehci-orion.h>
 #include <plat/orion_nand.h>
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
new file mode 100644
index 000000000000..2d14c4fe294d
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -0,0 +1,39 @@
+/*
+ * arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_BRIDGE_REGS_H
+#define __ASM_ARCH_BRIDGE_REGS_H
+
+#include <mach/mv78xx0.h>
+
+#define CPU_CONTROL             (BRIDGE_VIRT_BASE | 0x0104)
+#define L2_WRITETHROUGH         0x00020000
+
+#define RSTOUTn_MASK            (BRIDGE_VIRT_BASE | 0x0108)
+#define SOFT_RESET_OUT_EN       0x00000004
+
+#define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE | 0x010c)
+#define SOFT_RESET              0x00000001
+
+#define BRIDGE_CAUSE            (BRIDGE_VIRT_BASE | 0x0110)
+#define BRIDGE_MASK             (BRIDGE_VIRT_BASE | 0x0114)
+#define BRIDGE_INT_TIMER0       0x0002
+#define BRIDGE_INT_TIMER1       0x0004
+#define BRIDGE_INT_TIMER1_CLR   (~0x0004)
+
+#define IRQ_VIRT_BASE           (BRIDGE_VIRT_BASE | 0x0200)
+#define IRQ_CAUSE_ERR_OFF       0x0000
+#define IRQ_CAUSE_LOW_OFF       0x0004
+#define IRQ_CAUSE_HIGH_OFF      0x0008
+#define IRQ_MASK_ERR_OFF        0x000c
+#define IRQ_MASK_LOW_OFF        0x0010
+#define IRQ_MASK_HIGH_OFF       0x0014
+
+#define TIMER_VIRT_BASE         (BRIDGE_VIRT_BASE | 0x0300)
+
+#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
index fbfb2693ce6c..66ae2d29e773 100644
--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
@@ -8,7 +8,7 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <mach/mv78xx0.h>
+#include <mach/bridge-regs.h>
 
         .macro  disable_fiq
         .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 582cffc733ad..d715b92b0908 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -59,37 +59,6 @@
  * Core-specific peripheral registers.
  */
 #define BRIDGE_VIRT_BASE        (MV78XX0_CORE_REGS_VIRT_BASE)
-#define  CPU_CONTROL            (BRIDGE_VIRT_BASE | 0x0104)
-#define   L2_WRITETHROUGH       0x00020000
-#define  RSTOUTn_MASK           (BRIDGE_VIRT_BASE | 0x0108)
-#define   SOFT_RESET_OUT_EN     0x00000004
-#define  SYSTEM_SOFT_RESET      (BRIDGE_VIRT_BASE | 0x010c)
-#define   SOFT_RESET            0x00000001
-#define  BRIDGE_CAUSE           (BRIDGE_VIRT_BASE | 0x0110)
-#define  BRIDGE_MASK            (BRIDGE_VIRT_BASE | 0x0114)
-#define   BRIDGE_INT_TIMER0     0x0002
-#define   BRIDGE_INT_TIMER1     0x0004
-#define   BRIDGE_INT_TIMER1_CLR (~0x0004)
-#define  IRQ_VIRT_BASE          (BRIDGE_VIRT_BASE | 0x0200)
-#define   IRQ_CAUSE_ERR_OFF     0x0000
-#define   IRQ_CAUSE_LOW_OFF     0x0004
-#define   IRQ_CAUSE_HIGH_OFF    0x0008
-#define   IRQ_MASK_ERR_OFF      0x000c
-#define   IRQ_MASK_LOW_OFF      0x0010
-#define   IRQ_MASK_HIGH_OFF     0x0014
-#define  TIMER_VIRT_BASE        (BRIDGE_VIRT_BASE | 0x0300)
-
-/*
- * Supported devices and revisions.
- */
-#define MV78X00_Z0_DEV_ID       0x6381
-#define MV78X00_REV_Z0          1
-
-#define MV78100_DEV_ID          0x7810
-#define MV78100_REV_A0          1
-
-#define MV78200_DEV_ID          0x7820
-#define MV78200_REV_A0          1
 
 /*
  * Register Map
@@ -135,5 +104,16 @@
 
 #define SATA_PHYS_BASE          (MV78XX0_REGS_PHYS_BASE | 0xa0000)
 
+/*
+ * Supported devices and revisions.
+ */
+#define MV78X00_Z0_DEV_ID       0x6381
+#define MV78X00_REV_Z0          1
+
+#define MV78100_DEV_ID          0x7810
+#define MV78100_REV_A0          1
+
+#define MV78200_DEV_ID          0x7820
+#define MV78200_REV_A0          1
 
 #endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
index 1d6350b22d0b..66e7ce4e90bd 100644
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ b/arch/arm/mach-mv78xx0/include/mach/system.h
@@ -9,8 +9,7 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/hardware.h>
-#include <mach/mv78xx0.h>
+#include <mach/bridge-regs.h>
 
 static inline void arch_idle(void)
 {
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 30b7e4bcdbc7..f289b0ea7dcf 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -13,7 +13,7 @@
 #include <linux/pci.h>
 #include <linux/irq.h>
 #include <asm/gpio.h>
-#include <mach/mv78xx0.h>
+#include <mach/bridge-regs.h>
 #include <plat/irq.h>
 #include "common.h"