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-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h42
1 files changed, 11 insertions, 31 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 582cffc733ad..d715b92b0908 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -59,37 +59,6 @@
59 * Core-specific peripheral registers. 59 * Core-specific peripheral registers.
60 */ 60 */
61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) 61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
62#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
63#define L2_WRITETHROUGH 0x00020000
64#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
65#define SOFT_RESET_OUT_EN 0x00000004
66#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
67#define SOFT_RESET 0x00000001
68#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
69#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
70#define BRIDGE_INT_TIMER0 0x0002
71#define BRIDGE_INT_TIMER1 0x0004
72#define BRIDGE_INT_TIMER1_CLR (~0x0004)
73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
74#define IRQ_CAUSE_ERR_OFF 0x0000
75#define IRQ_CAUSE_LOW_OFF 0x0004
76#define IRQ_CAUSE_HIGH_OFF 0x0008
77#define IRQ_MASK_ERR_OFF 0x000c
78#define IRQ_MASK_LOW_OFF 0x0010
79#define IRQ_MASK_HIGH_OFF 0x0014
80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
81
82/*
83 * Supported devices and revisions.
84 */
85#define MV78X00_Z0_DEV_ID 0x6381
86#define MV78X00_REV_Z0 1
87
88#define MV78100_DEV_ID 0x7810
89#define MV78100_REV_A0 1
90
91#define MV78200_DEV_ID 0x7820
92#define MV78200_REV_A0 1
93 62
94/* 63/*
95 * Register Map 64 * Register Map
@@ -135,5 +104,16 @@
135 104
136#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000) 105#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000)
137 106
107/*
108 * Supported devices and revisions.
109 */
110#define MV78X00_Z0_DEV_ID 0x6381
111#define MV78X00_REV_Z0 1
112
113#define MV78100_DEV_ID 0x7810
114#define MV78100_REV_A0 1
115
116#define MV78200_DEV_ID 0x7820
117#define MV78200_REV_A0 1
138 118
139#endif 119#endif