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Diffstat (limited to 'arch/arm/mach-imx/mm-imx5.c')
-rw-r--r--arch/arm/mach-imx/mm-imx5.c28
1 files changed, 11 insertions, 17 deletions
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index bc17dfea3817..49549a72dc7d 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk;
26 26
27static void imx5_idle(void) 27static void imx5_idle(void)
28{ 28{
29 if (!need_resched()) { 29 /* gpc clock is needed for SRPG */
30 /* gpc clock is needed for SRPG */ 30 if (gpc_dvfs_clk == NULL) {
31 if (gpc_dvfs_clk == NULL) { 31 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
32 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); 32 if (IS_ERR(gpc_dvfs_clk))
33 if (IS_ERR(gpc_dvfs_clk)) 33 return;
34 goto err0;
35 }
36 clk_enable(gpc_dvfs_clk);
37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
38 if (tzic_enable_wake())
39 goto err1;
40 cpu_do_idle();
41err1:
42 clk_disable(gpc_dvfs_clk);
43 } 34 }
44err0: 35 clk_enable(gpc_dvfs_clk);
45 local_irq_enable(); 36 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
37 if (tzic_enable_wake() != 0)
38 cpu_do_idle();
39 clk_disable(gpc_dvfs_clk);
46} 40}
47 41
48/* 42/*
@@ -108,7 +102,7 @@ void __init imx51_init_early(void)
108 mxc_set_cpu_type(MXC_CPU_MX51); 102 mxc_set_cpu_type(MXC_CPU_MX51);
109 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 103 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
110 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); 104 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
111 pm_idle = imx5_idle; 105 arm_pm_idle = imx5_idle;
112} 106}
113 107
114void __init imx53_init_early(void) 108void __init imx53_init_early(void)