diff options
Diffstat (limited to 'arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h')
-rw-r--r-- | arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 9f4458c8e070..22d6c9a6e4ca 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |||
@@ -6,6 +6,40 @@ | |||
6 | #define __ASM_ARCH_EP93XX_REGS_H | 6 | #define __ASM_ARCH_EP93XX_REGS_H |
7 | 7 | ||
8 | /* | 8 | /* |
9 | * EP93xx Physical Memory Map: | ||
10 | * | ||
11 | * The ASDO pin is sampled at system reset to select a synchronous or | ||
12 | * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up) | ||
13 | * the synchronous boot mode is selected. When ASDO is "0" (i.e | ||
14 | * pulled-down) the asynchronous boot mode is selected. | ||
15 | * | ||
16 | * In synchronous boot mode nSDCE3 is decoded starting at physical address | ||
17 | * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous | ||
18 | * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3 | ||
19 | * decoded at 0xf0000000. | ||
20 | * | ||
21 | * There is known errata for the EP93xx dealing with External Memory | ||
22 | * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design | ||
23 | * Guidelines" for more information. This document can be found at: | ||
24 | * | ||
25 | * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf | ||
26 | */ | ||
27 | |||
28 | #define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */ | ||
29 | #define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */ | ||
30 | #define EP93XX_CS1_PHYS_BASE 0x10000000 | ||
31 | #define EP93XX_CS2_PHYS_BASE 0x20000000 | ||
32 | #define EP93XX_CS3_PHYS_BASE 0x30000000 | ||
33 | #define EP93XX_PCMCIA_PHYS_BASE 0x40000000 | ||
34 | #define EP93XX_CS6_PHYS_BASE 0x60000000 | ||
35 | #define EP93XX_CS7_PHYS_BASE 0x70000000 | ||
36 | #define EP93XX_SDCE0_PHYS_BASE 0xc0000000 | ||
37 | #define EP93XX_SDCE1_PHYS_BASE 0xd0000000 | ||
38 | #define EP93XX_SDCE2_PHYS_BASE 0xe0000000 | ||
39 | #define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */ | ||
40 | #define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */ | ||
41 | |||
42 | /* | ||
9 | * EP93xx linux memory map: | 43 | * EP93xx linux memory map: |
10 | * | 44 | * |
11 | * virt phys size | 45 | * virt phys size |