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-rw-r--r--arch/arm/mach-davinci/include/mach/asp.h11
-rw-r--r--arch/arm/mach-davinci/include/mach/cdce949.h19
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h8
-rw-r--r--arch/arm/mach-davinci/include/mach/cpufreq.h26
-rw-r--r--arch/arm/mach-davinci/include/mach/cpuidle.h18
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h46
-rw-r--r--arch/arm/mach-davinci/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-davinci/include/mach/dm365.h21
-rw-r--r--arch/arm/mach-davinci/include/mach/dm644x.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/dm646x.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/emac.h36
-rw-r--r--arch/arm/mach-davinci/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/i2c.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/keyscan.h42
-rw-r--r--arch/arm/mach-davinci/include/mach/memory.h5
-rw-r--r--arch/arm/mach-davinci/include/mach/mux.h23
-rw-r--r--arch/arm/mach-davinci/include/mach/nand.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/pm.h54
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h15
-rw-r--r--arch/arm/mach-davinci/include/mach/spi.h44
-rw-r--r--arch/arm/mach-davinci/include/mach/system.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/timex.h7
-rw-r--r--arch/arm/mach-davinci/include/mach/usb.h59
25 files changed, 394 insertions, 65 deletions
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index 18e4ce34ece6..834725f1e81d 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -11,6 +11,9 @@
11#define DAVINCI_ASP0_BASE 0x01E02000 11#define DAVINCI_ASP0_BASE 0x01E02000
12#define DAVINCI_ASP1_BASE 0x01E04000 12#define DAVINCI_ASP1_BASE 0x01E04000
13 13
14/* Bases of dm365 register banks */
15#define DAVINCI_DM365_ASP0_BASE 0x01D02000
16
14/* Bases of dm646x register banks */ 17/* Bases of dm646x register banks */
15#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 18#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
16#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 19#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
@@ -51,6 +54,14 @@ struct snd_platform_data {
51 u32 rx_dma_offset; 54 u32 rx_dma_offset;
52 enum dma_event_q eventq_no; /* event queue number */ 55 enum dma_event_q eventq_no; /* event queue number */
53 unsigned int codec_fmt; 56 unsigned int codec_fmt;
57 /*
58 * Allowing this is more efficient and eliminates left and right swaps
59 * caused by underruns, but will swap the left and right channels
60 * when compared to previous behavior.
61 */
62 unsigned enable_channel_combine:1;
63 unsigned sram_size_playback;
64 unsigned sram_size_capture;
54 65
55 /* McASP specific fields */ 66 /* McASP specific fields */
56 int tdm_slots; 67 int tdm_slots;
diff --git a/arch/arm/mach-davinci/include/mach/cdce949.h b/arch/arm/mach-davinci/include/mach/cdce949.h
new file mode 100644
index 000000000000..c73331fae341
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/cdce949.h
@@ -0,0 +1,19 @@
1/*
2 * TI CDCE949 off-chip clock synthesizer support
3 *
4 * 2009 (C) Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10#ifndef _MACH_DAVINCI_CDCE949_H
11#define _MACH_DAVINCI_CDCE949_H
12
13#include <linux/clk.h>
14
15#include <mach/clock.h>
16
17int cdce_set_rate(struct clk *clk, unsigned long rate);
18
19#endif
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 1fd3917cae4e..50a955f05ef9 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -20,12 +20,6 @@ extern void davinci_irq_init(void);
20extern void __iomem *davinci_intc_base; 20extern void __iomem *davinci_intc_base;
21extern int davinci_intc_type; 21extern int davinci_intc_type;
22 22
23/* parameters describe VBUS sourcing for host mode */
24extern void setup_usb(unsigned mA, unsigned potpgt_msec);
25
26/* parameters describe VBUS sourcing for host mode */
27extern void setup_usb(unsigned mA, unsigned potpgt_msec);
28
29struct davinci_timer_instance { 23struct davinci_timer_instance {
30 void __iomem *base; 24 void __iomem *base;
31 u32 bottom_irq; 25 u32 bottom_irq;
@@ -49,7 +43,7 @@ struct davinci_soc_info {
49 void __iomem *jtag_id_base; 43 void __iomem *jtag_id_base;
50 struct davinci_id *ids; 44 struct davinci_id *ids;
51 unsigned long ids_num; 45 unsigned long ids_num;
52 struct davinci_clk *cpu_clks; 46 struct clk_lookup *cpu_clks;
53 void __iomem **psc_bases; 47 void __iomem **psc_bases;
54 unsigned long psc_bases_num; 48 unsigned long psc_bases_num;
55 void __iomem *pinmux_base; 49 void __iomem *pinmux_base;
diff --git a/arch/arm/mach-davinci/include/mach/cpufreq.h b/arch/arm/mach-davinci/include/mach/cpufreq.h
new file mode 100644
index 000000000000..3c089cfb6cd6
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/cpufreq.h
@@ -0,0 +1,26 @@
1/*
2 * TI DaVinci CPUFreq platform support.
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#ifndef _MACH_DAVINCI_CPUFREQ_H
16#define _MACH_DAVINCI_CPUFREQ_H
17
18#include <linux/cpufreq.h>
19
20struct davinci_cpufreq_config {
21 struct cpufreq_frequency_table *freq_table;
22 int (*set_voltage) (unsigned int index);
23 int (*init) (void);
24};
25
26#endif
diff --git a/arch/arm/mach-davinci/include/mach/cpuidle.h b/arch/arm/mach-davinci/include/mach/cpuidle.h
new file mode 100644
index 000000000000..74f088b0edfb
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/cpuidle.h
@@ -0,0 +1,18 @@
1/*
2 * TI DaVinci cpuidle platform support
3 *
4 * 2009 (C) Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10#ifndef _MACH_DAVINCI_CPUIDLE_H
11#define _MACH_DAVINCI_CPUIDLE_H
12
13struct davinci_cpuidle_config {
14 u32 ddr2_pdown;
15 void __iomem *ddr2_ctlr_base;
16};
17
18#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index d4095d0572c6..03acfd39042b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Author: Mark A. Greer <mgreer@mvista.com> 4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * 5 *
6 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under 6 * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program 7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express 8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied. 9 * or implied.
@@ -11,12 +11,21 @@
11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H 11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
12#define __ASM_ARCH_DAVINCI_DA8XX_H 12#define __ASM_ARCH_DAVINCI_DA8XX_H
13 13
14#include <video/da8xx-fb.h>
15
16#include <linux/platform_device.h>
17#include <linux/davinci_emac.h>
18
14#include <mach/serial.h> 19#include <mach/serial.h>
15#include <mach/edma.h> 20#include <mach/edma.h>
16#include <mach/i2c.h> 21#include <mach/i2c.h>
17#include <mach/emac.h>
18#include <mach/asp.h> 22#include <mach/asp.h>
19#include <mach/mmc.h> 23#include <mach/mmc.h>
24#include <mach/usb.h>
25#include <mach/pm.h>
26
27extern void __iomem *da8xx_syscfg0_base;
28extern void __iomem *da8xx_syscfg1_base;
20 29
21/* 30/*
22 * The cp_intc interrupt controller for the da8xx isn't in the same 31 * The cp_intc interrupt controller for the da8xx isn't in the same
@@ -29,20 +38,31 @@
29#define DA8XX_CP_INTC_SIZE SZ_8K 38#define DA8XX_CP_INTC_SIZE SZ_8K
30#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) 39#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
31 40
32#define DA8XX_BOOT_CFG_BASE (IO_PHYS + 0x14000) 41#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
42#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
43#define DA8XX_JTAG_ID_REG 0x18
44#define DA8XX_CFGCHIP0_REG 0x17c
45#define DA8XX_CFGCHIP2_REG 0x184
46#define DA8XX_CFGCHIP3_REG 0x188
47
48#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
49#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
50#define DA8XX_DEEPSLEEP_REG 0x8
33 51
34#define DA8XX_PSC0_BASE 0x01c10000 52#define DA8XX_PSC0_BASE 0x01c10000
35#define DA8XX_PLL0_BASE 0x01c11000 53#define DA8XX_PLL0_BASE 0x01c11000
36#define DA8XX_JTAG_ID_REG 0x01c14018
37#define DA8XX_TIMER64P0_BASE 0x01c20000 54#define DA8XX_TIMER64P0_BASE 0x01c20000
38#define DA8XX_TIMER64P1_BASE 0x01c21000 55#define DA8XX_TIMER64P1_BASE 0x01c21000
39#define DA8XX_GPIO_BASE 0x01e26000 56#define DA8XX_GPIO_BASE 0x01e26000
40#define DA8XX_PSC1_BASE 0x01e27000 57#define DA8XX_PSC1_BASE 0x01e27000
41#define DA8XX_LCD_CNTRL_BASE 0x01e13000 58#define DA8XX_LCD_CNTRL_BASE 0x01e13000
59#define DA8XX_PLL1_BASE 0x01e1a000
42#define DA8XX_MMCSD0_BASE 0x01c40000 60#define DA8XX_MMCSD0_BASE 0x01c40000
43#define DA8XX_AEMIF_CS2_BASE 0x60000000 61#define DA8XX_AEMIF_CS2_BASE 0x60000000
44#define DA8XX_AEMIF_CS3_BASE 0x62000000 62#define DA8XX_AEMIF_CS3_BASE 0x62000000
45#define DA8XX_AEMIF_CTL_BASE 0x68000000 63#define DA8XX_AEMIF_CTL_BASE 0x68000000
64#define DA8XX_DDR2_CTL_BASE 0xb0000000
65#define DA8XX_ARM_RAM_BASE 0xffff0000
46 66
47#define PINMUX0 0x00 67#define PINMUX0 0x00
48#define PINMUX1 0x04 68#define PINMUX1 0x04
@@ -71,13 +91,22 @@ void __init da850_init(void);
71int da8xx_register_edma(void); 91int da8xx_register_edma(void);
72int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); 92int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
73int da8xx_register_watchdog(void); 93int da8xx_register_watchdog(void);
94int da8xx_register_usb20(unsigned mA, unsigned potpgt);
95int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
74int da8xx_register_emac(void); 96int da8xx_register_emac(void);
75int da8xx_register_lcdc(void); 97int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
76int da8xx_register_mmcsd0(struct davinci_mmc_config *config); 98int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
77void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata); 99void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
100int da8xx_register_rtc(void);
101int da850_register_cpufreq(void);
102int da8xx_register_cpuidle(void);
103void __iomem * __init da8xx_get_mem_ctlr(void);
104int da850_register_pm(struct platform_device *pdev);
78 105
79extern struct platform_device da8xx_serial_device; 106extern struct platform_device da8xx_serial_device;
80extern struct emac_platform_data da8xx_emac_pdata; 107extern struct emac_platform_data da8xx_emac_pdata;
108extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
109extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
81 110
82extern const short da830_emif25_pins[]; 111extern const short da830_emif25_pins[];
83extern const short da830_spi0_pins[]; 112extern const short da830_spi0_pins[];
@@ -110,12 +139,17 @@ extern const short da850_uart2_pins[];
110extern const short da850_i2c0_pins[]; 139extern const short da850_i2c0_pins[];
111extern const short da850_i2c1_pins[]; 140extern const short da850_i2c1_pins[];
112extern const short da850_cpgmac_pins[]; 141extern const short da850_cpgmac_pins[];
142extern const short da850_rmii_pins[];
113extern const short da850_mcasp_pins[]; 143extern const short da850_mcasp_pins[];
114extern const short da850_lcdcntl_pins[]; 144extern const short da850_lcdcntl_pins[];
115extern const short da850_mmcsd0_pins[]; 145extern const short da850_mmcsd0_pins[];
116extern const short da850_nand_pins[]; 146extern const short da850_nand_pins[];
117extern const short da850_nor_pins[]; 147extern const short da850_nor_pins[];
118 148
149#ifdef CONFIG_DAVINCI_MUX
119int da8xx_pinmux_setup(const short pins[]); 150int da8xx_pinmux_setup(const short pins[]);
151#else
152static inline int da8xx_pinmux_setup(const short pins[]) { return 0; }
153#endif
120 154
121#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ 155#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S
index 17ab5236da66..3cd93a801d9b 100644
--- a/arch/arm/mach-davinci/include/mach/debug-macro.S
+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S
@@ -19,7 +19,7 @@
19#include <linux/serial_reg.h> 19#include <linux/serial_reg.h>
20#define UART_SHIFT 2 20#define UART_SHIFT 2
21 21
22 .macro addruart, rx 22 .macro addruart, rx, tmp
23 mrc p15, 0, \rx, c1, c0 23 mrc p15, 0, \rx, c1, c0
24 tst \rx, #1 @ MMU enabled? 24 tst \rx, #1 @ MMU enabled?
25 moveq \rx, #0x01000000 @ physical base address 25 moveq \rx, #0x01000000 @ physical base address
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index 09db4343bb4c..3a37b5a6983c 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -14,8 +14,11 @@
14#define __ASM_ARCH_DM665_H 14#define __ASM_ARCH_DM665_H
15 15
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/davinci_emac.h>
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <mach/emac.h> 19#include <mach/asp.h>
20#include <mach/keyscan.h>
21#include <media/davinci/vpfe_capture.h>
19 22
20#define DM365_EMAC_BASE (0x01D07000) 23#define DM365_EMAC_BASE (0x01D07000)
21#define DM365_EMAC_CNTRL_OFFSET (0x0000) 24#define DM365_EMAC_CNTRL_OFFSET (0x0000)
@@ -24,6 +27,22 @@
24#define DM365_EMAC_MDIO_OFFSET (0x4000) 27#define DM365_EMAC_MDIO_OFFSET (0x4000)
25#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) 28#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000)
26 29
30/* Base of key scan register bank */
31#define DM365_KEYSCAN_BASE (0x01C69400)
32
33#define DM365_RTC_BASE (0x01C69000)
34
35#define DAVINCI_DM365_VC_BASE (0x01D0C000)
36#define DAVINCI_DMA_VC_TX 2
37#define DAVINCI_DMA_VC_RX 3
38
27void __init dm365_init(void); 39void __init dm365_init(void);
40void __init dm365_init_asp(struct snd_platform_data *pdata);
41void __init dm365_init_vc(struct snd_platform_data *pdata);
42void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
43void __init dm365_init_rtc(void);
44void dm365_init_spi0(unsigned chipselect_mask,
45 struct spi_board_info *info, unsigned len);
28 46
47void dm365_set_vpfe_config(struct vpfe_config *cfg);
29#endif /* __ASM_ARCH_DM365_H */ 48#endif /* __ASM_ARCH_DM365_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 0efb73852c2c..1a8b09ccc3c8 100644
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -22,9 +22,8 @@
22#ifndef __ASM_ARCH_DM644X_H 22#ifndef __ASM_ARCH_DM644X_H
23#define __ASM_ARCH_DM644X_H 23#define __ASM_ARCH_DM644X_H
24 24
25#include <linux/platform_device.h> 25#include <linux/davinci_emac.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/emac.h>
28#include <mach/asp.h> 27#include <mach/asp.h>
29#include <media/davinci/vpfe_capture.h> 28#include <media/davinci/vpfe_capture.h>
30 29
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 8cec746ae9d2..846da98b619a 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -12,10 +12,11 @@
12#define __ASM_ARCH_DM646X_H 12#define __ASM_ARCH_DM646X_H
13 13
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/emac.h>
16#include <mach/asp.h> 15#include <mach/asp.h>
17#include <linux/i2c.h> 16#include <linux/i2c.h>
18#include <linux/videodev2.h> 17#include <linux/videodev2.h>
18#include <linux/clk.h>
19#include <linux/davinci_emac.h>
19 20
20#define DM646X_EMAC_BASE (0x01C80000) 21#define DM646X_EMAC_BASE (0x01C80000)
21#define DM646X_EMAC_CNTRL_OFFSET (0x0000) 22#define DM646X_EMAC_CNTRL_OFFSET (0x0000)
@@ -30,6 +31,7 @@ void __init dm646x_init(void);
30void __init dm646x_init_ide(void); 31void __init dm646x_init_ide(void);
31void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); 32void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
32void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); 33void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
34void __init dm646x_board_setup_refclk(struct clk *clk);
33 35
34void dm646x_video_init(void); 36void dm646x_video_init(void);
35 37
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index eb8bfd7925e7..ced3092af5ba 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -280,8 +280,6 @@ struct edma_soc_info {
280 unsigned n_cc; 280 unsigned n_cc;
281 enum dma_event_q default_queue; 281 enum dma_event_q default_queue;
282 282
283 /* list of channels with no even trigger; terminated by "-1" */
284 const s8 *noevent;
285 const s8 (*queue_tc_mapping)[2]; 283 const s8 (*queue_tc_mapping)[2];
286 const s8 (*queue_priority_mapping)[2]; 284 const s8 (*queue_priority_mapping)[2];
287}; 285};
diff --git a/arch/arm/mach-davinci/include/mach/emac.h b/arch/arm/mach-davinci/include/mach/emac.h
deleted file mode 100644
index beff4fb7c845..000000000000
--- a/arch/arm/mach-davinci/include/mach/emac.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * TI DaVinci EMAC platform support
3 *
4 * Author: Kevin Hilman, Deep Root Systems, LLC
5 *
6 * 2007 (c) Deep Root Systems, LLC. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef _MACH_DAVINCI_EMAC_H
12#define _MACH_DAVINCI_EMAC_H
13
14#include <linux/if_ether.h>
15#include <linux/memory.h>
16
17struct emac_platform_data {
18 char mac_addr[ETH_ALEN];
19 u32 ctrl_reg_offset;
20 u32 ctrl_mod_reg_offset;
21 u32 ctrl_ram_offset;
22 u32 mdio_reg_offset;
23 u32 ctrl_ram_size;
24 u32 phy_mask;
25 u32 mdio_max_freq;
26 u8 rmii_en;
27 u8 version;
28};
29
30enum {
31 EMAC_VERSION_1, /* DM644x */
32 EMAC_VERSION_2, /* DM646x */
33};
34
35void davinci_get_mac_addr(struct memory_accessor *mem_acc, void *context);
36#endif
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 41c89386e39b..c45ba1f62a11 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -27,7 +27,7 @@
27/* 27/*
28 * I/O mapping 28 * I/O mapping
29 */ 29 */
30#define IO_PHYS 0x01c00000 30#define IO_PHYS 0x01c00000UL
31#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ 31#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */
32#define IO_SIZE 0x00400000 32#define IO_SIZE 0x00400000
33#define IO_VIRT (IO_PHYS + IO_OFFSET) 33#define IO_VIRT (IO_PHYS + IO_OFFSET)
diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h
index c248e9b7e825..2312d197dfb7 100644
--- a/arch/arm/mach-davinci/include/mach/i2c.h
+++ b/arch/arm/mach-davinci/include/mach/i2c.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * DaVinci I2C controller platfrom_device info 2 * DaVinci I2C controller platform_device info
3 * 3 *
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> 4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5 * 5 *
@@ -16,6 +16,8 @@
16struct davinci_i2c_platform_data { 16struct davinci_i2c_platform_data {
17 unsigned int bus_freq; /* standard bus frequency (kHz) */ 17 unsigned int bus_freq; /* standard bus frequency (kHz) */
18 unsigned int bus_delay; /* post-transaction delay (usec) */ 18 unsigned int bus_delay; /* post-transaction delay (usec) */
19 unsigned int sda_pin; /* GPIO pin ID to use for SDA */
20 unsigned int scl_pin; /* GPIO pin ID to use for SCL */
19}; 21};
20 22
21/* for board setup code */ 23/* for board setup code */
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 3c918a772619..354af71798dc 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -217,6 +217,7 @@
217#define IRQ_DM365_SDIOINT0 23 217#define IRQ_DM365_SDIOINT0 23
218#define IRQ_DM365_MMCINT1 27 218#define IRQ_DM365_MMCINT1 27
219#define IRQ_DM365_PWMINT3 28 219#define IRQ_DM365_PWMINT3 28
220#define IRQ_DM365_RTCINT 29
220#define IRQ_DM365_SDIOINT1 31 221#define IRQ_DM365_SDIOINT1 31
221#define IRQ_DM365_SPIINT0_0 42 222#define IRQ_DM365_SPIINT0_0 42
222#define IRQ_DM365_SPIINT3_0 43 223#define IRQ_DM365_SPIINT3_0 43
diff --git a/arch/arm/mach-davinci/include/mach/keyscan.h b/arch/arm/mach-davinci/include/mach/keyscan.h
new file mode 100644
index 000000000000..7a560e05bda8
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/keyscan.h
@@ -0,0 +1,42 @@
1/*
2 * Copyright (C) 2009 Texas Instruments, Inc
3 *
4 * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef DAVINCI_KEYSCAN_H
22#define DAVINCI_KEYSCAN_H
23
24#include <linux/io.h>
25
26enum davinci_matrix_types {
27 DAVINCI_KEYSCAN_MATRIX_4X4,
28 DAVINCI_KEYSCAN_MATRIX_5X3,
29};
30
31struct davinci_ks_platform_data {
32 int (*device_enable)(struct device *dev);
33 unsigned short *keymap;
34 u32 keymapsize;
35 u8 rep:1;
36 u8 strobe;
37 u8 interval;
38 u8 matrix_type;
39};
40
41#endif
42
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index 80309aed534a..a91edfb8beea 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -31,6 +31,11 @@
31#define PHYS_OFFSET DAVINCI_DDR_BASE 31#define PHYS_OFFSET DAVINCI_DDR_BASE
32#endif 32#endif
33 33
34#define DDR2_SDRCR_OFFSET 0xc
35#define DDR2_SRPD_BIT BIT(23)
36#define DDR2_MCLKSTOPEN_BIT BIT(30)
37#define DDR2_LPMODEN_BIT BIT(31)
38
34/* 39/*
35 * Increase size of DMA-consistent memory region 40 * Increase size of DMA-consistent memory region
36 */ 41 */
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index bb84893a4e83..2a68c1d8a24b 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -40,6 +40,11 @@ enum davinci_dm644x_index {
40 40
41 /* AEAW functions */ 41 /* AEAW functions */
42 DM644X_AEAW, 42 DM644X_AEAW,
43 DM644X_AEAW0,
44 DM644X_AEAW1,
45 DM644X_AEAW2,
46 DM644X_AEAW3,
47 DM644X_AEAW4,
43 48
44 /* Memory Stick */ 49 /* Memory Stick */
45 DM644X_MSTK, 50 DM644X_MSTK,
@@ -237,8 +242,8 @@ enum davinci_dm365_index {
237 DM365_EMAC_MDIO, 242 DM365_EMAC_MDIO,
238 DM365_EMAC_MDCLK, 243 DM365_EMAC_MDCLK,
239 244
240 /* Keypad */ 245 /* Key Scan */
241 DM365_KEYPAD, 246 DM365_KEYSCAN,
242 247
243 /* PWM */ 248 /* PWM */
244 DM365_PWM0, 249 DM365_PWM0,
@@ -322,6 +327,8 @@ enum davinci_dm365_index {
322 /* EDMA event muxing */ 327 /* EDMA event muxing */
323 DM365_EVT2_ASP_TX, 328 DM365_EVT2_ASP_TX,
324 DM365_EVT3_ASP_RX, 329 DM365_EVT3_ASP_RX,
330 DM365_EVT2_VC_TX,
331 DM365_EVT3_VC_RX,
325 DM365_EVT26_MMC0_RX, 332 DM365_EVT26_MMC0_RX,
326}; 333};
327 334
@@ -774,6 +781,14 @@ enum davinci_da850_index {
774 DA850_MII_RXD_0, 781 DA850_MII_RXD_0,
775 DA850_MDIO_CLK, 782 DA850_MDIO_CLK,
776 DA850_MDIO_D, 783 DA850_MDIO_D,
784 DA850_RMII_TXD_0,
785 DA850_RMII_TXD_1,
786 DA850_RMII_TXEN,
787 DA850_RMII_CRS_DV,
788 DA850_RMII_RXD_0,
789 DA850_RMII_RXD_1,
790 DA850_RMII_RXER,
791 DA850_RMII_MHZ_50_CLK,
777 792
778 /* McASP function */ 793 /* McASP function */
779 DA850_ACLKR, 794 DA850_ACLKR,
@@ -881,10 +896,12 @@ enum davinci_da850_index {
881 DA850_NEMA_CS_2, 896 DA850_NEMA_CS_2,
882 897
883 /* GPIO function */ 898 /* GPIO function */
899 DA850_GPIO2_6,
900 DA850_GPIO2_8,
884 DA850_GPIO2_15, 901 DA850_GPIO2_15,
885 DA850_GPIO8_10,
886 DA850_GPIO4_0, 902 DA850_GPIO4_0,
887 DA850_GPIO4_1, 903 DA850_GPIO4_1,
904 DA850_RTC_ALARM,
888}; 905};
889 906
890#ifdef CONFIG_DAVINCI_MUX 907#ifdef CONFIG_DAVINCI_MUX
diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h
index b520c4b5678a..b2ad8090bd10 100644
--- a/arch/arm/mach-davinci/include/mach/nand.h
+++ b/arch/arm/mach-davinci/include/mach/nand.h
@@ -79,6 +79,10 @@ struct davinci_nand_pdata { /* platform_data */
79 79
80 /* e.g. NAND_BUSWIDTH_16 or NAND_USE_FLASH_BBT */ 80 /* e.g. NAND_BUSWIDTH_16 or NAND_USE_FLASH_BBT */
81 unsigned options; 81 unsigned options;
82
83 /* Main and mirror bbt descriptor overrides */
84 struct nand_bbt_descr *bbt_td;
85 struct nand_bbt_descr *bbt_md;
82}; 86};
83 87
84#endif /* __ARCH_ARM_DAVINCI_NAND_H */ 88#endif /* __ARCH_ARM_DAVINCI_NAND_H */
diff --git a/arch/arm/mach-davinci/include/mach/pm.h b/arch/arm/mach-davinci/include/mach/pm.h
new file mode 100644
index 000000000000..37b19bf35a85
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/pm.h
@@ -0,0 +1,54 @@
1/*
2 * TI DaVinci platform support for power management.
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#ifndef _MACH_DAVINCI_PM_H
16#define _MACH_DAVINCI_PM_H
17
18/*
19 * Caution: Assembly code in sleep.S makes assumtion on the order
20 * of the members of this structure.
21 */
22struct davinci_pm_config {
23 void __iomem *ddr2_ctlr_base;
24 void __iomem *ddrpsc_reg_base;
25 int ddrpsc_num;
26 void __iomem *ddrpll_reg_base;
27 void __iomem *deepsleep_reg;
28 void __iomem *cpupll_reg_base;
29 /*
30 * Note on SLEEPCOUNT:
31 * The SLEEPCOUNT feature is mainly intended for cases in which
32 * the internal oscillator is used. The internal oscillator is
33 * fully disabled in deep sleep mode. When you exist deep sleep
34 * mode, the oscillator will be turned on and will generate very
35 * small oscillations which will not be detected by the deep sleep
36 * counter. Eventually those oscillations will grow to an amplitude
37 * large enough to start incrementing the deep sleep counter.
38 * In this case recommendation from hardware engineers is that the
39 * SLEEPCOUNT be set to 4096. This means that 4096 valid clock cycles
40 * must be detected before the clock is passed to the rest of the
41 * system.
42 * In the case that the internal oscillator is not used and the
43 * clock is generated externally, the SLEEPCOUNT value can be very
44 * small since the clock input is assumed to be stable before SoC
45 * is taken out of deepsleep mode. A value of 128 would be more than
46 * adequate.
47 */
48 int sleepcount;
49};
50
51extern unsigned int davinci_cpu_suspend_sz;
52extern void davinci_cpu_suspend(struct davinci_pm_config *);
53
54#endif
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 171173c1dbad..651f6d8158fa 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -180,8 +180,23 @@
180#define DA8XX_LPSC1_CR_P3_SS 26 180#define DA8XX_LPSC1_CR_P3_SS 26
181#define DA8XX_LPSC1_L3_CBA_RAM 31 181#define DA8XX_LPSC1_L3_CBA_RAM 31
182 182
183/* PSC register offsets */
184#define EPCPR 0x070
185#define PTCMD 0x120
186#define PTSTAT 0x128
187#define PDSTAT 0x200
188#define PDCTL1 0x304
189#define MDSTAT 0x800
190#define MDCTL 0xA00
191
192#define MDSTAT_STATE_MASK 0x1f
193
194#ifndef __ASSEMBLER__
195
183extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); 196extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
184extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, 197extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
185 unsigned int id, char enable); 198 unsigned int id, char enable);
186 199
200#endif
201
187#endif /* __ASM_ARCH_PSC_H */ 202#endif /* __ASM_ARCH_PSC_H */
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
new file mode 100644
index 000000000000..910efbf099c0
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -0,0 +1,44 @@
1/*
2 * Copyright 2009 Texas Instruments.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __ARCH_ARM_DAVINCI_SPI_H
20#define __ARCH_ARM_DAVINCI_SPI_H
21
22enum {
23 SPI_VERSION_1, /* For DM355/DM365/DM6467 */
24 SPI_VERSION_2, /* For DA8xx */
25};
26
27struct davinci_spi_platform_data {
28 u8 version;
29 u8 num_chipselect;
30 u8 wdelay;
31 u8 odd_parity;
32 u8 parity_enable;
33 u8 wait_enable;
34 u8 timer_disable;
35 u8 clk_internal;
36 u8 cs_hold;
37 u8 intr_level;
38 u8 poll_mode;
39 u8 use_dma;
40 u8 c2tdelay;
41 u8 t2cdelay;
42};
43
44#endif /* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index 8e4f10fe1263..5a7d7581b8ce 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -11,9 +11,6 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H 12#define __ASM_ARCH_SYSTEM_H
13 13
14#include <linux/io.h>
15#include <mach/hardware.h>
16
17extern void davinci_watchdog_reset(void); 14extern void davinci_watchdog_reset(void);
18 15
19static inline void arch_idle(void) 16static inline void arch_idle(void)
diff --git a/arch/arm/mach-davinci/include/mach/timex.h b/arch/arm/mach-davinci/include/mach/timex.h
index 52827567841d..9b885298f106 100644
--- a/arch/arm/mach-davinci/include/mach/timex.h
+++ b/arch/arm/mach-davinci/include/mach/timex.h
@@ -11,7 +11,12 @@
11#ifndef __ASM_ARCH_TIMEX_H 11#ifndef __ASM_ARCH_TIMEX_H
12#define __ASM_ARCH_TIMEX_H 12#define __ASM_ARCH_TIMEX_H
13 13
14/* The source frequency for the timers is the 27MHz clock */ 14/*
15 * Alert: Not all timers of the DaVinci family run at a frequency of 27MHz,
16 * but we should be fine as long as CLOCK_TICK_RATE or LATCH (see include/
17 * linux/jiffies.h) are not used directly in code. Currently none of the
18 * code relevant to DaVinci platform depends on these values directly.
19 */
15#define CLOCK_TICK_RATE 27000000 20#define CLOCK_TICK_RATE 27000000
16 21
17#endif /* __ASM_ARCH_TIMEX_H__ */ 22#endif /* __ASM_ARCH_TIMEX_H__ */
diff --git a/arch/arm/mach-davinci/include/mach/usb.h b/arch/arm/mach-davinci/include/mach/usb.h
new file mode 100644
index 000000000000..e0bc4abe69c2
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/usb.h
@@ -0,0 +1,59 @@
1/*
2 * USB related definitions
3 *
4 * Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_USB_H
12#define __ASM_ARCH_USB_H
13
14/* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */
15#define CFGCHIP2_PHYCLKGD (1 << 17)
16#define CFGCHIP2_VBUSSENSE (1 << 16)
17#define CFGCHIP2_RESET (1 << 15)
18#define CFGCHIP2_OTGMODE (3 << 13)
19#define CFGCHIP2_NO_OVERRIDE (0 << 13)
20#define CFGCHIP2_FORCE_HOST (1 << 13)
21#define CFGCHIP2_FORCE_DEVICE (2 << 13)
22#define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13)
23#define CFGCHIP2_USB1PHYCLKMUX (1 << 12)
24#define CFGCHIP2_USB2PHYCLKMUX (1 << 11)
25#define CFGCHIP2_PHYPWRDN (1 << 10)
26#define CFGCHIP2_OTGPWRDN (1 << 9)
27#define CFGCHIP2_DATPOL (1 << 8)
28#define CFGCHIP2_USB1SUSPENDM (1 << 7)
29#define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */
30#define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */
31#define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */
32#define CFGCHIP2_REFFREQ (0xf << 0)
33#define CFGCHIP2_REFFREQ_12MHZ (1 << 0)
34#define CFGCHIP2_REFFREQ_24MHZ (2 << 0)
35#define CFGCHIP2_REFFREQ_48MHZ (3 << 0)
36
37struct da8xx_ohci_root_hub;
38
39typedef void (*da8xx_ocic_handler_t)(struct da8xx_ohci_root_hub *hub,
40 unsigned port);
41
42/* Passed as the platform data to the OHCI driver */
43struct da8xx_ohci_root_hub {
44 /* Switch the port power on/off */
45 int (*set_power)(unsigned port, int on);
46 /* Read the port power status */
47 int (*get_power)(unsigned port);
48 /* Read the port over-current indicator */
49 int (*get_oci)(unsigned port);
50 /* Over-current indicator change notification (pass NULL to disable) */
51 int (*ocic_notify)(da8xx_ocic_handler_t handler);
52
53 /* Time from power on to power good (in 2 ms units) */
54 u8 potpgt;
55};
56
57void davinci_setup_usb(unsigned mA, unsigned potpgt_ms);
58
59#endif /* ifndef __ASM_ARCH_USB_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-02 09:51:17 -0400