diff options
Diffstat (limited to 'arch/arm/include/debug')
-rw-r--r-- | arch/arm/include/debug/digicolor.S | 35 | ||||
-rw-r--r-- | arch/arm/include/debug/msm.S | 6 | ||||
-rw-r--r-- | arch/arm/include/debug/sirf.S | 30 |
3 files changed, 54 insertions, 17 deletions
diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S new file mode 100644 index 000000000000..c9517150766a --- /dev/null +++ b/arch/arm/include/debug/digicolor.S | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * Debugging macro include header for Conexant Digicolor USART | ||
3 | * | ||
4 | * Copyright (C) 2014 Paradox Innovation Ltd. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #define UA0_STATUS 0x0742 | ||
13 | #define UA0_EMI_REC 0x0744 | ||
14 | |||
15 | #define UA0_STATUS_TX_READY 0x40 | ||
16 | |||
17 | #ifdef CONFIG_DEBUG_UART_PHYS | ||
18 | .macro addruart, rp, rv, tmp | ||
19 | ldr \rp, =CONFIG_DEBUG_UART_PHYS | ||
20 | ldr \rv, =CONFIG_DEBUG_UART_VIRT | ||
21 | .endm | ||
22 | #endif | ||
23 | |||
24 | .macro senduart,rd,rx | ||
25 | strb \rd, [\rx, #UA0_EMI_REC] | ||
26 | .endm | ||
27 | |||
28 | .macro waituart,rd,rx | ||
29 | .endm | ||
30 | |||
31 | .macro busyuart,rd,rx | ||
32 | 1001: ldrb \rd, [\rx, #UA0_STATUS] | ||
33 | tst \rd, #UA0_STATUS_TX_READY | ||
34 | beq 1001b | ||
35 | .endm | ||
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S index 9ef57612811d..e55a9426b496 100644 --- a/arch/arm/include/debug/msm.S +++ b/arch/arm/include/debug/msm.S | |||
@@ -23,6 +23,7 @@ | |||
23 | .endm | 23 | .endm |
24 | 24 | ||
25 | .macro senduart, rd, rx | 25 | .macro senduart, rd, rx |
26 | ARM_BE8(rev \rd, \rd ) | ||
26 | #ifdef CONFIG_DEBUG_QCOM_UARTDM | 27 | #ifdef CONFIG_DEBUG_QCOM_UARTDM |
27 | @ Write the 1 character to UARTDM_TF | 28 | @ Write the 1 character to UARTDM_TF |
28 | str \rd, [\rx, #0x70] | 29 | str \rd, [\rx, #0x70] |
@@ -35,24 +36,29 @@ | |||
35 | #ifdef CONFIG_DEBUG_QCOM_UARTDM | 36 | #ifdef CONFIG_DEBUG_QCOM_UARTDM |
36 | @ check for TX_EMT in UARTDM_SR | 37 | @ check for TX_EMT in UARTDM_SR |
37 | ldr \rd, [\rx, #0x08] | 38 | ldr \rd, [\rx, #0x08] |
39 | ARM_BE8(rev \rd, \rd ) | ||
38 | tst \rd, #0x08 | 40 | tst \rd, #0x08 |
39 | bne 1002f | 41 | bne 1002f |
40 | @ wait for TXREADY in UARTDM_ISR | 42 | @ wait for TXREADY in UARTDM_ISR |
41 | 1001: ldr \rd, [\rx, #0x14] | 43 | 1001: ldr \rd, [\rx, #0x14] |
44 | ARM_BE8(rev \rd, \rd ) | ||
42 | tst \rd, #0x80 | 45 | tst \rd, #0x80 |
43 | beq 1001b | 46 | beq 1001b |
44 | 1002: | 47 | 1002: |
45 | @ Clear TX_READY by writing to the UARTDM_CR register | 48 | @ Clear TX_READY by writing to the UARTDM_CR register |
46 | mov \rd, #0x300 | 49 | mov \rd, #0x300 |
50 | ARM_BE8(rev \rd, \rd ) | ||
47 | str \rd, [\rx, #0x10] | 51 | str \rd, [\rx, #0x10] |
48 | @ Write 0x1 to NCF register | 52 | @ Write 0x1 to NCF register |
49 | mov \rd, #0x1 | 53 | mov \rd, #0x1 |
54 | ARM_BE8(rev \rd, \rd ) | ||
50 | str \rd, [\rx, #0x40] | 55 | str \rd, [\rx, #0x40] |
51 | @ UARTDM reg. Read to induce delay | 56 | @ UARTDM reg. Read to induce delay |
52 | ldr \rd, [\rx, #0x08] | 57 | ldr \rd, [\rx, #0x08] |
53 | #else | 58 | #else |
54 | @ wait for TX_READY | 59 | @ wait for TX_READY |
55 | 1001: ldr \rd, [\rx, #0x08] | 60 | 1001: ldr \rd, [\rx, #0x08] |
61 | ARM_BE8(rev \rd, \rd ) | ||
56 | tst \rd, #0x04 | 62 | tst \rd, #0x04 |
57 | beq 1001b | 63 | beq 1001b |
58 | #endif | 64 | #endif |
diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S index dbf250cf18e6..630f231f2f37 100644 --- a/arch/arm/include/debug/sirf.S +++ b/arch/arm/include/debug/sirf.S | |||
@@ -6,37 +6,33 @@ | |||
6 | * Licensed under GPLv2 or later. | 6 | * Licensed under GPLv2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) | 9 | #define SIRF_LLUART_TXFIFO_STATUS 0x0114 |
10 | #define SIRFSOC_UART1_PA_BASE 0xb0060000 | 10 | #define SIRF_LLUART_TXFIFO_DATA 0x0118 |
11 | #elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) | ||
12 | #define SIRFSOC_UART1_PA_BASE 0xcc060000 | ||
13 | #else | ||
14 | #define SIRFSOC_UART1_PA_BASE 0 | ||
15 | #endif | ||
16 | 11 | ||
17 | #define SIRFSOC_UART1_VA_BASE 0xFEC60000 | 12 | #define SIRF_LLUART_TXFIFO_FULL (1 << 5) |
18 | 13 | ||
19 | #define SIRFSOC_UART_TXFIFO_STATUS 0x0114 | 14 | #ifdef CONFIG_DEBUG_SIRFATLAS7_UART0 |
20 | #define SIRFSOC_UART_TXFIFO_DATA 0x0118 | 15 | #define SIRF_LLUART_TXFIFO_EMPTY (1 << 8) |
16 | #else | ||
17 | #define SIRF_LLUART_TXFIFO_EMPTY (1 << 6) | ||
18 | #endif | ||
21 | 19 | ||
22 | #define SIRFSOC_UART1_TXFIFO_FULL (1 << 5) | ||
23 | #define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6) | ||
24 | 20 | ||
25 | .macro addruart, rp, rv, tmp | 21 | .macro addruart, rp, rv, tmp |
26 | ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical | 22 | ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical |
27 | ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual | 23 | ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virtual |
28 | .endm | 24 | .endm |
29 | 25 | ||
30 | .macro senduart,rd,rx | 26 | .macro senduart,rd,rx |
31 | str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA] | 27 | str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA] |
32 | .endm | 28 | .endm |
33 | 29 | ||
34 | .macro busyuart,rd,rx | 30 | .macro busyuart,rd,rx |
35 | .endm | 31 | .endm |
36 | 32 | ||
37 | .macro waituart,rd,rx | 33 | .macro waituart,rd,rx |
38 | 1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS] | 34 | 1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS] |
39 | tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY | 35 | tst \rd, #SIRF_LLUART_TXFIFO_EMPTY |
40 | beq 1001b | 36 | beq 1001b |
41 | .endm | 37 | .endm |
42 | 38 | ||