Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Also included are some cleanups where
  the platform maintainers hadn't separated cleanups from new developent
  in separate branches.

  Some of the larger things worth pointing out:

   - A large set of changes from Alexandre Belloni and Nicolas Ferre
     preparing at91 platforms for multiplatform and cleaning up quite a
     bit in the process.

   - Removal of CSR's "Marco" SoC platform that never made it out to the
     market.  We love seeing these since it means the vendor published
     support before product was out, which is exactly what we want!

  New platforms this release are:

   - Conexant Digicolor (CX92755 SoC)
   - Hisilicon HiP01 SoC
   - CSR/sirf Atlas7 SoC
   - ST STiH418 SoC
   - Common code changes for Nvidia Tegra132 (64-bit SoC)

  We're seeing more and more platforms having a harder time labelling
  changes as cleanups vs new development -- which is a good sign that
  we've come quite far on the cleanup effort.  So over time we might
  start combining the cleanup and new-development branches more"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
  ARM: at91/trivial: unify functions and machine names
  ARM: at91: remove at91_dt_initialize and machine init_early()
  ARM: at91: change board files into SoC files
  ARM: at91: remove at91_boot_soc
  ARM: at91: move alternative initial mapping to board-dt-sama5.c
  ARM: at91: merge all SOC_AT91SAM9xxx
  ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
  ARM: digicolor: select syscon and timer
  ARM: zynq: Simplify SLCR initialization
  ARM: zynq: PM: Fixed simple typo.
  ARM: zynq: Setup default gpio number for Xilinx Zynq
  ARM: digicolor: add low level debug support
  ARM: initial support for Conexant Digicolor CX92755 SoC
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ...

3 files changed, 54 insertions, 17 deletions

diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S
new file mode 100644
index 000000000000..c9517150766a
--- /dev/null
+++ b/arch/arm/include/debug/digicolor.S
@@ -0,0 +1,35 @@
+/*
+ * Debugging macro include header for Conexant Digicolor USART
+ *
+ * Copyright (C) 2014 Paradox Innovation Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#define UA0_STATUS      0x0742
+#define UA0_EMI_REC     0x0744
+
+#define UA0_STATUS_TX_READY     0x40
+
+#ifdef CONFIG_DEBUG_UART_PHYS
+                .macro  addruart, rp, rv, tmp
+                ldr     \rp, =CONFIG_DEBUG_UART_PHYS
+                ldr     \rv, =CONFIG_DEBUG_UART_VIRT
+                .endm
+#endif
+
+                .macro  senduart,rd,rx
+                strb    \rd, [\rx, #UA0_EMI_REC]
+                .endm
+
+                .macro  waituart,rd,rx
+                .endm
+
+        .macro  busyuart,rd,rx
+1001:           ldrb    \rd, [\rx, #UA0_STATUS]
+                tst     \rd, #UA0_STATUS_TX_READY
+                beq     1001b
+                .endm
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9ef57612811d..e55a9426b496 100644
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -23,6 +23,7 @@
         .endm
 
         .macro  senduart, rd, rx
+ARM_BE8(rev     \rd, \rd )
 #ifdef CONFIG_DEBUG_QCOM_UARTDM
         @ Write the 1 character to UARTDM_TF
         str     \rd, [\rx, #0x70]
@@ -35,24 +36,29 @@
 #ifdef CONFIG_DEBUG_QCOM_UARTDM
         @ check for TX_EMT in UARTDM_SR
         ldr     \rd, [\rx, #0x08]
+ARM_BE8(rev     \rd, \rd )
         tst     \rd, #0x08
         bne     1002f
         @ wait for TXREADY in UARTDM_ISR
 1001:   ldr     \rd, [\rx, #0x14]
+ARM_BE8(rev     \rd, \rd )
         tst     \rd, #0x80
         beq     1001b
 1002:
         @ Clear TX_READY by writing to the UARTDM_CR register
         mov     \rd, #0x300
+ARM_BE8(rev     \rd, \rd )
         str     \rd, [\rx, #0x10]
         @ Write 0x1 to NCF register
         mov     \rd, #0x1
+ARM_BE8(rev     \rd, \rd )
         str     \rd, [\rx, #0x40]
         @ UARTDM reg. Read to induce delay
         ldr     \rd, [\rx, #0x08]
 #else
         @ wait for TX_READY
 1001:   ldr     \rd, [\rx, #0x08]
+ARM_BE8(rev     \rd, \rd )
         tst     \rd, #0x04
         beq     1001b
 #endif
diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S
index dbf250cf18e6..630f231f2f37 100644
--- a/arch/arm/include/debug/sirf.S
+++ b/arch/arm/include/debug/sirf.S
@@ -6,37 +6,33 @@
  * Licensed under GPLv2 or later.
  */
 
-#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
-#define SIRFSOC_UART1_PA_BASE          0xb0060000
-#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
-#define SIRFSOC_UART1_PA_BASE          0xcc060000
-#else
-#define SIRFSOC_UART1_PA_BASE          0
-#endif
+#define SIRF_LLUART_TXFIFO_STATUS       0x0114
+#define SIRF_LLUART_TXFIFO_DATA 0x0118
 
-#define SIRFSOC_UART1_VA_BASE           0xFEC60000
+#define SIRF_LLUART_TXFIFO_FULL                       (1 << 5)
 
-#define SIRFSOC_UART_TXFIFO_STATUS      0x0114
-#define SIRFSOC_UART_TXFIFO_DATA        0x0118
+#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0
+#define SIRF_LLUART_TXFIFO_EMPTY                        (1 << 8)
+#else
+#define SIRF_LLUART_TXFIFO_EMPTY                        (1 << 6)
+#endif
 
-#define SIRFSOC_UART1_TXFIFO_FULL                       (1 << 5)
-#define SIRFSOC_UART1_TXFIFO_EMPTY                      (1 << 6)
 
         .macro  addruart, rp, rv, tmp
-        ldr     \rp, =SIRFSOC_UART1_PA_BASE             @ physical
-        ldr     \rv, =SIRFSOC_UART1_VA_BASE             @ virtual
+        ldr     \rp, =CONFIG_DEBUG_UART_PHYS            @ physical
+        ldr     \rv, =CONFIG_DEBUG_UART_VIRT            @ virtual
         .endm
 
         .macro  senduart,rd,rx
-        str     \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA]
+        str     \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA]
         .endm
 
         .macro  busyuart,rd,rx
         .endm
 
         .macro  waituart,rd,rx
-1001:   ldr     \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS]
-        tst     \rd, #SIRFSOC_UART1_TXFIFO_EMPTY
+1001:   ldr     \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
+        tst     \rd, #SIRF_LLUART_TXFIFO_EMPTY
         beq     1001b
         .endm