13 files changed, 99 insertions, 66 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6a3d9a6c4497..91bd5bd62857 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -177,6 +177,9 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
 dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
 dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
 dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb
+dtb-$(CONFIG_ARCH_MMP) += pxa168-aspenite.dtb \
+        pxa910-dkb.dtb \
+        mmp2-brownstone.dtb
 dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
 dtb-$(CONFIG_ARCH_MXC) += \
         imx1-ads.dtb \
diff --git a/arch/arm/boot/dts/mmp2-brownstone.dts b/arch/arm/boot/dts/mmp2-brownstone.dts
index 7f70a39459f6..350208c5e1ed 100644
--- a/arch/arm/boot/dts/mmp2-brownstone.dts
+++ b/arch/arm/boot/dts/mmp2-brownstone.dts
@@ -8,7 +8,7 @@
  */
 
 /dts-v1/;
-/include/ "mmp2.dtsi"
+#include "mmp2.dtsi"
 
 / {
         model = "Marvell MMP2 Brownstone Development Board";
diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 4e8b08c628c7..766bbb8495b6 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -7,7 +7,8 @@
  *  publishhed by the Free Software Foundation.
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/clock/marvell,mmp2.h>
 
 / {
         aliases {
@@ -135,6 +136,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4030000 0x1000>;
                                 interrupts = <27>;
+                                clocks = <&soc_clocks MMP2_CLK_UART0>;
+                                resets = <&soc_clocks MMP2_CLK_UART0>;
                                 status = "disabled";
                         };
 
@@ -142,6 +145,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4017000 0x1000>;
                                 interrupts = <28>;
+                                clocks = <&soc_clocks MMP2_CLK_UART1>;
+                                resets = <&soc_clocks MMP2_CLK_UART1>;
                                 status = "disabled";
                         };
 
@@ -149,6 +154,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4018000 0x1000>;
                                 interrupts = <24>;
+                                clocks = <&soc_clocks MMP2_CLK_UART2>;
+                                resets = <&soc_clocks MMP2_CLK_UART2>;
                                 status = "disabled";
                         };
 
@@ -156,6 +163,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4016000 0x1000>;
                                 interrupts = <46>;
+                                clocks = <&soc_clocks MMP2_CLK_UART3>;
+                                resets = <&soc_clocks MMP2_CLK_UART3>;
                                 status = "disabled";
                         };
 
@@ -168,6 +177,8 @@
                                 #gpio-cells = <2>;
                                 interrupts = <49>;
                                 interrupt-names = "gpio_mux";
+                                clocks = <&soc_clocks MMP2_CLK_GPIO>;
+                                resets = <&soc_clocks MMP2_CLK_GPIO>;
                                 interrupt-controller;
                                 #interrupt-cells = <1>;
                                 ranges;
@@ -201,6 +212,8 @@
                                 compatible = "mrvl,mmp-twsi";
                                 reg = <0xd4011000 0x1000>;
                                 interrupts = <7>;
+                                clocks = <&soc_clocks MMP2_CLK_TWSI0>;
+                                resets = <&soc_clocks MMP2_CLK_TWSI0>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 mrvl,i2c-fast-mode;
@@ -211,6 +224,8 @@
                                 compatible = "mrvl,mmp-twsi";
                                 reg = <0xd4025000 0x1000>;
                                 interrupts = <58>;
+                                clocks = <&soc_clocks MMP2_CLK_TWSI1>;
+                                resets = <&soc_clocks MMP2_CLK_TWSI1>;
                                 status = "disabled";
                         };
 
@@ -220,8 +235,20 @@
                                 interrupts = <1 0>;
                                 interrupt-names = "rtc 1Hz", "rtc alarm";
                                 interrupt-parent = <&intcmux5>;
+                                clocks = <&soc_clocks MMP2_CLK_RTC>;
+                                resets = <&soc_clocks MMP2_CLK_RTC>;
                                 status = "disabled";
                         };
                 };
+
+                soc_clocks: clocks{
+                        compatible = "marvell,mmp2-clock";
+                        reg = <0xd4050000 0x1000>,
+                              <0xd4282800 0x400>,
+                              <0xd4015000 0x1000>;
+                        reg-names = "mpmu", "apmu", "apbc";
+                        #clock-cells = <1>;
+                        #reset-cells = <1>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/pxa168-aspenite.dts b/arch/arm/boot/dts/pxa168-aspenite.dts
index e762facb3fa4..0a988b3fb248 100644
--- a/arch/arm/boot/dts/pxa168-aspenite.dts
+++ b/arch/arm/boot/dts/pxa168-aspenite.dts
@@ -8,7 +8,7 @@
  */
 
 /dts-v1/;
-/include/ "pxa168.dtsi"
+#include "pxa168.dtsi"
 
 / {
         model = "Marvell PXA168 Aspenite Development Board";
diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi
index 975dad21ac38..b899e25cbb1b 100644
--- a/arch/arm/boot/dts/pxa168.dtsi
+++ b/arch/arm/boot/dts/pxa168.dtsi
@@ -7,7 +7,8 @@
  *  publishhed by the Free Software Foundation.
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/clock/marvell,pxa168.h>
 
 / {
         aliases {
@@ -59,6 +60,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4017000 0x1000>;
                                 interrupts = <27>;
+                                clocks = <&soc_clocks PXA168_CLK_UART0>;
+                                resets = <&soc_clocks PXA168_CLK_UART0>;
                                 status = "disabled";
                         };
 
@@ -66,6 +69,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4018000 0x1000>;
                                 interrupts = <28>;
+                                clocks = <&soc_clocks PXA168_CLK_UART1>;
+                                resets = <&soc_clocks PXA168_CLK_UART1>;
                                 status = "disabled";
                         };
 
@@ -73,6 +78,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4026000 0x1000>;
                                 interrupts = <29>;
+                                clocks = <&soc_clocks PXA168_CLK_UART2>;
+                                resets = <&soc_clocks PXA168_CLK_UART2>;
                                 status = "disabled";
                         };
 
@@ -84,6 +91,8 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 interrupts = <49>;
+                                clocks = <&soc_clocks PXA168_CLK_GPIO>;
+                                resets = <&soc_clocks PXA168_CLK_GPIO>;
                                 interrupt-names = "gpio_mux";
                                 interrupt-controller;
                                 #interrupt-cells = <1>;
@@ -110,6 +119,8 @@
                                 compatible = "mrvl,mmp-twsi";
                                 reg = <0xd4011000 0x1000>;
                                 interrupts = <7>;
+                                clocks = <&soc_clocks PXA168_CLK_TWSI0>;
+                                resets = <&soc_clocks PXA168_CLK_TWSI0>;
                                 mrvl,i2c-fast-mode;
                                 status = "disabled";
                         };
@@ -118,6 +129,8 @@
                                 compatible = "mrvl,mmp-twsi";
                                 reg = <0xd4025000 0x1000>;
                                 interrupts = <58>;
+                                clocks = <&soc_clocks PXA168_CLK_TWSI1>;
+                                resets = <&soc_clocks PXA168_CLK_TWSI1>;
                                 status = "disabled";
                         };
 
@@ -126,8 +139,20 @@
                                 reg = <0xd4010000 0x1000>;
                                 interrupts = <5 6>;
                                 interrupt-names = "rtc 1Hz", "rtc alarm";
+                                clocks = <&soc_clocks PXA168_CLK_RTC>;
+                                resets = <&soc_clocks PXA168_CLK_RTC>;
                                 status = "disabled";
                         };
                 };
+
+                soc_clocks: clocks{
+                        compatible = "marvell,pxa168-clock";
+                        reg = <0xd4050000 0x1000>,
+                              <0xd4282800 0x400>,
+                              <0xd4015000 0x1000>;
+                        reg-names = "mpmu", "apmu", "apbc";
+                        #clock-cells = <1>;
+                        #reset-cells = <1>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/pxa910-dkb.dts b/arch/arm/boot/dts/pxa910-dkb.dts
index 595492aa5053..c82f2810ec73 100644
--- a/arch/arm/boot/dts/pxa910-dkb.dts
+++ b/arch/arm/boot/dts/pxa910-dkb.dts
@@ -8,7 +8,7 @@
  */
 
 /dts-v1/;
-/include/ "pxa910.dtsi"
+#include "pxa910.dtsi"
 
 / {
         model = "Marvell PXA910 DKB Development Board";
diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
index 0247c622f580..0868f6729be1 100644
--- a/arch/arm/boot/dts/pxa910.dtsi
+++ b/arch/arm/boot/dts/pxa910.dtsi
@@ -7,7 +7,8 @@
  *  publishhed by the Free Software Foundation.
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/clock/marvell,pxa910.h>
 
 / {
         aliases {
@@ -71,6 +72,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4017000 0x1000>;
                                 interrupts = <27>;
+                                clocks = <&soc_clocks PXA910_CLK_UART0>;
+                                resets = <&soc_clocks PXA910_CLK_UART0>;
                                 status = "disabled";
                         };
 
@@ -78,6 +81,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4018000 0x1000>;
                                 interrupts = <28>;
+                                clocks = <&soc_clocks PXA910_CLK_UART1>;
+                                resets = <&soc_clocks PXA910_CLK_UART1>;
                                 status = "disabled";
                         };
 
@@ -85,6 +90,8 @@
                                 compatible = "mrvl,mmp-uart";
                                 reg = <0xd4036000 0x1000>;
                                 interrupts = <59>;
+                                clocks = <&soc_clocks PXA910_CLK_UART2>;
+                                resets = <&soc_clocks PXA910_CLK_UART2>;
                                 status = "disabled";
                         };
 
@@ -97,6 +104,8 @@
                                 #gpio-cells = <2>;
                                 interrupts = <49>;
                                 interrupt-names = "gpio_mux";
+                                clocks = <&soc_clocks PXA910_CLK_GPIO>;
+                                resets = <&soc_clocks PXA910_CLK_GPIO>;
                                 interrupt-controller;
                                 #interrupt-cells = <1>;
                                 ranges;
@@ -124,6 +133,8 @@
                                 #size-cells = <0>;
                                 reg = <0xd4011000 0x1000>;
                                 interrupts = <7>;
+                                clocks = <&soc_clocks PXA910_CLK_TWSI0>;
+                                resets = <&soc_clocks PXA910_CLK_TWSI0>;
                                 mrvl,i2c-fast-mode;
                                 status = "disabled";
                         };
@@ -134,6 +145,8 @@
                                 #size-cells = <0>;
                                 reg = <0xd4037000 0x1000>;
                                 interrupts = <54>;
+                                clocks = <&soc_clocks PXA910_CLK_TWSI1>;
+                                resets = <&soc_clocks PXA910_CLK_TWSI1>;
                                 status = "disabled";
                         };
 
@@ -142,8 +155,21 @@
                                 reg = <0xd4010000 0x1000>;
                                 interrupts = <5 6>;
                                 interrupt-names = "rtc 1Hz", "rtc alarm";
+                                clocks = <&soc_clocks PXA910_CLK_RTC>;
+                                resets = <&soc_clocks PXA910_CLK_RTC>;
                                 status = "disabled";
                         };
                 };
+
+                soc_clocks: clocks{
+                        compatible = "marvell,pxa910-clock";
+                        reg = <0xd4050000 0x1000>,
+                              <0xd4282800 0x400>,
+                              <0xd4015000 0x1000>,
+                              <0xd403b000 0x1000>;
+                        reg-names = "mpmu", "apmu", "apbc", "apbcp";
+                        #clock-cells = <1>;
+                        #reset-cells = <1>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index e3ab942fd148..7b4099fcf817 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -188,19 +188,11 @@
                                 "apb0_ir1", "apb0_keypad";
                 };
 
-                apb1_mux: apb1_mux@01c20058 {
-                        #clock-cells = <0>;
-                        compatible = "allwinner,sun4i-a10-apb1-mux-clk";
-                        reg = <0x01c20058 0x4>;
-                        clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-                        clock-output-names = "apb1_mux";
-                };
-
-                apb1: apb1@01c20058 {
+                apb1: clk@01c20058 {
                         #clock-cells = <0>;
                         compatible = "allwinner,sun4i-a10-apb1-clk";
                         reg = <0x01c20058 0x4>;
-                        clocks = <&apb1_mux>;
+                        clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
                         clock-output-names = "apb1";
                 };
 
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 81ad4b94e812..1b76667f3182 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -176,19 +176,11 @@
                                 "apb0_ir", "apb0_keypad";
                 };
 
-                apb1_mux: apb1_mux@01c20058 {
-                        #clock-cells = <0>;
-                        compatible = "allwinner,sun4i-a10-apb1-mux-clk";
-                        reg = <0x01c20058 0x4>;
-                        clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-                        clock-output-names = "apb1_mux";
-                };
-
-                apb1: apb1@01c20058 {
+                apb1: clk@01c20058 {
                         #clock-cells = <0>;
                         compatible = "allwinner,sun4i-a10-apb1-clk";
                         reg = <0x01c20058 0x4>;
-                        clocks = <&apb1_mux>;
+                        clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
                         clock-output-names = "apb1";
                 };
 
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index b131068f4f35..c35217ea1f64 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -161,19 +161,11 @@
                         clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";
                 };
 
-                apb1_mux: apb1_mux@01c20058 {
-                        #clock-cells = <0>;
-                        compatible = "allwinner,sun4i-a10-apb1-mux-clk";
-                        reg = <0x01c20058 0x4>;
-                        clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-                        clock-output-names = "apb1_mux";
-                };
-
-                apb1: apb1@01c20058 {
+                apb1: clk@01c20058 {
                         #clock-cells = <0>;
                         compatible = "allwinner,sun4i-a10-apb1-clk";
                         reg = <0x01c20058 0x4>;
-                        clocks = <&apb1_mux>;
+                        clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
                         clock-output-names = "apb1";
                 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index a400172a8a52..f47156b6572b 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -229,19 +229,11 @@
                                         "apb1_daudio1";
                 };
 
-                apb2_mux: apb2_mux@01c20058 {
+                apb2: clk@01c20058 {
                         #clock-cells = <0>;
-                        compatible = "allwinner,sun4i-a10-apb1-mux-clk";
+                        compatible = "allwinner,sun4i-a10-apb1-clk";
                         reg = <0x01c20058 0x4>;
                         clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
-                        clock-output-names = "apb2_mux";
-                };
-
-                apb2: apb2@01c20058 {
-                        #clock-cells = <0>;
-                        compatible = "allwinner,sun6i-a31-apb2-div-clk";
-                        reg = <0x01c20058 0x4>;
-                        clocks = <&apb2_mux>;
                         clock-output-names = "apb2";
                 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 82a524ce28ad..e21ce5992d56 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -236,19 +236,11 @@
                                 "apb0_iis2", "apb0_keypad";
                 };
 
-                apb1_mux: apb1_mux@01c20058 {
-                        #clock-cells = <0>;
-                        compatible = "allwinner,sun4i-a10-apb1-mux-clk";
-                        reg = <0x01c20058 0x4>;
-                        clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-                        clock-output-names = "apb1_mux";
-                };
-
-                apb1: apb1@01c20058 {
+                apb1: clk@01c20058 {
                         #clock-cells = <0>;
                         compatible = "allwinner,sun4i-a10-apb1-clk";
                         reg = <0x01c20058 0x4>;
-                        clocks = <&apb1_mux>;
+                        clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
                         clock-output-names = "apb1";
                 };
 
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 6086adbf9d74..0746cd1024d7 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -189,19 +189,11 @@
                                         "apb1_daudio0", "apb1_daudio1";
                 };
 
-                apb2_mux: apb2_mux_clk@01c20058 {
+                apb2: clk@01c20058 {
                         #clock-cells = <0>;
-                        compatible = "allwinner,sun4i-a10-apb1-mux-clk";
+                        compatible = "allwinner,sun4i-a10-apb1-clk";
                         reg = <0x01c20058 0x4>;
                         clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
-                        clock-output-names = "apb2_mux";
-                };
-
-                apb2: apb2_clk@01c20058 {
-                        #clock-cells = <0>;
-                        compatible = "allwinner,sun6i-a31-apb2-div-clk";
-                        reg = <0x01c20058 0x4>;
-                        clocks = <&apb2_mux>;
                         clock-output-names = "apb2";
                 };