1 files changed, 170 insertions, 22 deletions

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 71b1251f79c7..618e5b537eaf 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1,7 +1,8 @@
 /*
  * Device Tree Source for the r8a7790 SoC
  *
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Cogent Embedded Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -18,6 +19,13 @@
         #address-cells = <2>;
         #size-cells = <2>;
 
+        aliases {
+                i2c0 = &i2c0;
+                i2c1 = &i2c1;
+                i2c2 = &i2c2;
+                i2c3 = &i2c3;
+        };
+
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -94,7 +102,6 @@
         gpio0: gpio@e6050000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xe6050000 0 0x50>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
@@ -106,7 +113,6 @@
         gpio1: gpio@e6051000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xe6051000 0 0x50>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
@@ -118,7 +124,6 @@
         gpio2: gpio@e6052000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xe6052000 0 0x50>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
@@ -130,7 +135,6 @@
         gpio3: gpio@e6053000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xe6053000 0 0x50>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
@@ -142,7 +146,6 @@
         gpio4: gpio@e6054000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xe6054000 0 0x50>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
@@ -154,7 +157,6 @@
         gpio5: gpio@e6055000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
                 reg = <0 0xe6055000 0 0x50>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
                 #gpio-cells = <2>;
                 gpio-controller;
@@ -166,8 +168,8 @@
         thermal@e61f0000 {
                 compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";
                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
         };
 
         timer {
@@ -183,7 +185,6 @@
                 #interrupt-cells = <2>;
                 interrupt-controller;
                 reg = <0 0xe61c0000 0 0x200>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
                              <0 1 IRQ_TYPE_LEVEL_HIGH>,
                              <0 2 IRQ_TYPE_LEVEL_HIGH>,
@@ -195,7 +196,6 @@
                 #size-cells = <0>;
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6508000 0 0x40>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
                 status = "disabled";
@@ -206,7 +206,6 @@
                 #size-cells = <0>;
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6518000 0 0x40>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
                 status = "disabled";
@@ -217,7 +216,6 @@
                 #size-cells = <0>;
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6530000 0 0x40>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
                 status = "disabled";
@@ -228,7 +226,6 @@
                 #size-cells = <0>;
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6540000 0 0x40>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
                 status = "disabled";
@@ -237,7 +234,6 @@
         mmcif0: mmcif@ee200000 {
                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
                 reg = <0 0xee200000 0 0x80>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
                 reg-io-width = <4>;
@@ -247,7 +243,6 @@
         mmcif1: mmc@ee220000 {
                 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
                 reg = <0 0xee220000 0 0x80>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
                 reg-io-width = <4>;
@@ -262,7 +257,6 @@
         sdhi0: sd@ee100000 {
                 compatible = "renesas,sdhi-r8a7790";
                 reg = <0 0xee100000 0 0x200>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
                 cap-sd-highspeed;
@@ -272,7 +266,6 @@
         sdhi1: sd@ee120000 {
                 compatible = "renesas,sdhi-r8a7790";
                 reg = <0 0xee120000 0 0x200>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
                 cap-sd-highspeed;
@@ -282,7 +275,6 @@
         sdhi2: sd@ee140000 {
                 compatible = "renesas,sdhi-r8a7790";
                 reg = <0 0xee140000 0 0x100>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
                 cap-sd-highspeed;
@@ -292,13 +284,129 @@
         sdhi3: sd@ee160000 {
                 compatible = "renesas,sdhi-r8a7790";
                 reg = <0 0xee160000 0 0x100>;
-                interrupt-parent = <&gic>;
                 interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
                 cap-sd-highspeed;
                 status = "disabled";
         };
 
+        scifa0: serial@e6c40000 {
+                compatible = "renesas,scifa-r8a7790", "renesas,scifa";
+                reg = <0 0xe6c40000 0 64>;
+                interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        scifa1: serial@e6c50000 {
+                compatible = "renesas,scifa-r8a7790", "renesas,scifa";
+                reg = <0 0xe6c50000 0 64>;
+                interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        scifa2: serial@e6c60000 {
+                compatible = "renesas,scifa-r8a7790", "renesas,scifa";
+                reg = <0 0xe6c60000 0 64>;
+                interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        scifb0: serial@e6c20000 {
+                compatible = "renesas,scifb-r8a7790", "renesas,scifb";
+                reg = <0 0xe6c20000 0 64>;
+                interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        scifb1: serial@e6c30000 {
+                compatible = "renesas,scifb-r8a7790", "renesas,scifb";
+                reg = <0 0xe6c30000 0 64>;
+                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        scifb2: serial@e6ce0000 {
+                compatible = "renesas,scifb-r8a7790", "renesas,scifb";
+                reg = <0 0xe6ce0000 0 64>;
+                interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        scif0: serial@e6e60000 {
+                compatible = "renesas,scif-r8a7790", "renesas,scif";
+                reg = <0 0xe6e60000 0 64>;
+                interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7790_CLK_SCIF0>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        scif1: serial@e6e68000 {
+                compatible = "renesas,scif-r8a7790", "renesas,scif";
+                reg = <0 0xe6e68000 0 64>;
+                interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7790_CLK_SCIF1>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        hscif0: serial@e62c0000 {
+                compatible = "renesas,hscif-r8a7790", "renesas,hscif";
+                reg = <0 0xe62c0000 0 96>;
+                interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        hscif1: serial@e62c8000 {
+                compatible = "renesas,hscif-r8a7790", "renesas,hscif";
+                reg = <0 0xe62c8000 0 96>;
+                interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>;
+                clock-names = "sci_ick";
+                status = "disabled";
+        };
+
+        ether: ethernet@ee700000 {
+                compatible = "renesas,ether-r8a7790";
+                reg = <0 0xee700000 0 0x400>;
+                interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
+                phy-mode = "rmii";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        sata0: sata@ee300000 {
+                compatible = "renesas,sata-r8a7790";
+                reg = <0 0xee300000 0 0x2000>;
+                interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
+                status = "disabled";
+        };
+
+        sata1: sata@ee500000 {
+                compatible = "renesas,sata-r8a7790";
+                reg = <0 0xee500000 0 0x2000>;
+                interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
+                status = "disabled";
+        };
+
         clocks {
                 #address-cells = <2>;
                 #size-cells = <2>;
@@ -313,6 +421,29 @@
                         clock-output-names = "extal";
                 };
 
+                /*
+                 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
+                 * default. Boards that provide audio clocks should override them.
+                 */
+                audio_clk_a: audio_clk_a {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <0>;
+                        clock-output-names = "audio_clk_a";
+                };
+                audio_clk_b: audio_clk_b {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <0>;
+                        clock-output-names = "audio_clk_b";
+                };
+                audio_clk_c: audio_clk_c {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <0>;
+                        clock-output-names = "audio_clk_c";
+                };
+
                 /* Special CPG clocks */
                 cpg_clocks: cpg_clocks@e6150000 {
                         compatible = "renesas,r8a7790-cpg-clocks",
@@ -607,10 +738,16 @@
                 mstp8_clks: mstp8_clks@e6150990 {
                         compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                         reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
-                        clocks = <&p_clk>;
+                        clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>,
+                                 <&zs_clk>, <&zs_clk>;
                         #clock-cells = <1>;
-                        renesas,clock-indices = <R8A7790_CLK_ETHER>;
-                        clock-output-names = "ether";
+                        renesas,clock-indices = <
+                                R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 R8A7790_CLK_VIN1
+                                R8A7790_CLK_VIN0 R8A7790_CLK_ETHER R8A7790_CLK_SATA1
+                                R8A7790_CLK_SATA0
+                        >;
+                        clock-output-names =
+                                "vin3", "vin2", "vin1", "vin0", "ether", "sata1", "sata0";
                 };
                 mstp9_clks: mstp9_clks@e6150994 {
                         compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -627,4 +764,15 @@
                                 "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
                 };
         };
+
+        spi: spi@e6b10000 {
+                compatible = "renesas,qspi-r8a7790", "renesas,qspi";
+                reg = <0 0xe6b10000 0 0x2c>;
+                interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
+                num-cs = <1>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
 };