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-rw-r--r--arch/arm/boot/dts/imx6q.dtsi34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index f604a44a5c66..d907d062e5dd 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -268,23 +268,39 @@
268 }; 268 };
269 269
270 pwm@02080000 { /* PWM1 */ 270 pwm@02080000 { /* PWM1 */
271 #pwm-cells = <2>;
272 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
271 reg = <0x02080000 0x4000>; 273 reg = <0x02080000 0x4000>;
272 interrupts = <0 83 0x04>; 274 interrupts = <0 83 0x04>;
275 clocks = <&clks 62>, <&clks 145>;
276 clock-names = "ipg", "per";
273 }; 277 };
274 278
275 pwm@02084000 { /* PWM2 */ 279 pwm@02084000 { /* PWM2 */
280 #pwm-cells = <2>;
281 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
276 reg = <0x02084000 0x4000>; 282 reg = <0x02084000 0x4000>;
277 interrupts = <0 84 0x04>; 283 interrupts = <0 84 0x04>;
284 clocks = <&clks 62>, <&clks 146>;
285 clock-names = "ipg", "per";
278 }; 286 };
279 287
280 pwm@02088000 { /* PWM3 */ 288 pwm@02088000 { /* PWM3 */
289 #pwm-cells = <2>;
290 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
281 reg = <0x02088000 0x4000>; 291 reg = <0x02088000 0x4000>;
282 interrupts = <0 85 0x04>; 292 interrupts = <0 85 0x04>;
293 clocks = <&clks 62>, <&clks 147>;
294 clock-names = "ipg", "per";
283 }; 295 };
284 296
285 pwm@0208c000 { /* PWM4 */ 297 pwm@0208c000 { /* PWM4 */
298 #pwm-cells = <2>;
299 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
286 reg = <0x0208c000 0x4000>; 300 reg = <0x0208c000 0x4000>;
287 interrupts = <0 86 0x04>; 301 interrupts = <0 86 0x04>;
302 clocks = <&clks 62>, <&clks 148>;
303 clock-names = "ipg", "per";
288 }; 304 };
289 305
290 flexcan@02090000 { /* CAN1 */ 306 flexcan@02090000 { /* CAN1 */
@@ -1001,5 +1017,23 @@
1001 status = "disabled"; 1017 status = "disabled";
1002 }; 1018 };
1003 }; 1019 };
1020
1021 ipu1: ipu@02400000 {
1022 #crtc-cells = <1>;
1023 compatible = "fsl,imx6q-ipu";
1024 reg = <0x02400000 0x400000>;
1025 interrupts = <0 6 0x4 0 5 0x4>;
1026 clocks = <&clks 130>, <&clks 131>, <&clks 132>;
1027 clock-names = "bus", "di0", "di1";
1028 };
1029
1030 ipu2: ipu@02800000 {
1031 #crtc-cells = <1>;
1032 compatible = "fsl,imx6q-ipu";
1033 reg = <0x02800000 0x400000>;
1034 interrupts = <0 8 0x4 0 7 0x4>;
1035 clocks = <&clks 133>, <&clks 134>, <&clks 137>;
1036 clock-names = "bus", "di0", "di1";
1037 };
1004 }; 1038 };
1005}; 1039};