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Diffstat (limited to 'arch/arm/boot/dts/imx6dl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi46
1 files changed, 34 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 9e8ae118fdd4..5c5f574330f9 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -8,6 +8,7 @@
8 * 8 *
9 */ 9 */
10 10
11#include <dt-bindings/interrupt-controller/irq.h>
11#include "imx6dl-pinfunc.h" 12#include "imx6dl-pinfunc.h"
12#include "imx6qdl.dtsi" 13#include "imx6qdl.dtsi"
13 14
@@ -21,6 +22,26 @@
21 device_type = "cpu"; 22 device_type = "cpu";
22 reg = <0>; 23 reg = <0>;
23 next-level-cache = <&L2>; 24 next-level-cache = <&L2>;
25 operating-points = <
26 /* kHz uV */
27 996000 1275000
28 792000 1175000
29 396000 1075000
30 >;
31 fsl,soc-operating-points = <
32 /* ARM kHz SOC-PU uV */
33 996000 1175000
34 792000 1175000
35 396000 1175000
36 >;
37 clock-latency = <61036>; /* two CLK32 periods */
38 clocks = <&clks 104>, <&clks 6>, <&clks 16>,
39 <&clks 17>, <&clks 170>;
40 clock-names = "arm", "pll2_pfd2_396m", "step",
41 "pll1_sw", "pll1_sys";
42 arm-supply = <&reg_arm>;
43 pu-supply = <&reg_pu>;
44 soc-supply = <&reg_soc>;
24 }; 45 };
25 46
26 cpu@1 { 47 cpu@1 {
@@ -45,17 +66,17 @@
45 66
46 pxp: pxp@020f0000 { 67 pxp: pxp@020f0000 {
47 reg = <0x020f0000 0x4000>; 68 reg = <0x020f0000 0x4000>;
48 interrupts = <0 98 0x04>; 69 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
49 }; 70 };
50 71
51 epdc: epdc@020f4000 { 72 epdc: epdc@020f4000 {
52 reg = <0x020f4000 0x4000>; 73 reg = <0x020f4000 0x4000>;
53 interrupts = <0 97 0x04>; 74 interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
54 }; 75 };
55 76
56 lcdif: lcdif@020f8000 { 77 lcdif: lcdif@020f8000 {
57 reg = <0x020f8000 0x4000>; 78 reg = <0x020f8000 0x4000>;
58 interrupts = <0 39 0x04>; 79 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
59 }; 80 };
60 }; 81 };
61 82
@@ -65,11 +86,20 @@
65 #size-cells = <0>; 86 #size-cells = <0>;
66 compatible = "fsl,imx1-i2c"; 87 compatible = "fsl,imx1-i2c";
67 reg = <0x021f8000 0x4000>; 88 reg = <0x021f8000 0x4000>;
68 interrupts = <0 35 0x04>; 89 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
69 status = "disabled"; 90 status = "disabled";
70 }; 91 };
71 }; 92 };
72 }; 93 };
94
95 display-subsystem {
96 compatible = "fsl,imx-display-subsystem";
97 ports = <&ipu1_di0>, <&ipu1_di1>;
98 };
99};
100
101&hdmi {
102 compatible = "fsl,imx6dl-hdmi";
73}; 103};
74 104
75&ldb { 105&ldb {
@@ -79,12 +109,4 @@
79 clock-names = "di0_pll", "di1_pll", 109 clock-names = "di0_pll", "di1_pll",
80 "di0_sel", "di1_sel", 110 "di0_sel", "di1_sel",
81 "di0", "di1"; 111 "di0", "di1";
82
83 lvds-channel@0 {
84 crtcs = <&ipu1 0>, <&ipu1 1>;
85 };
86
87 lvds-channel@1 {
88 crtcs = <&ipu1 0>, <&ipu1 1>;
89 };
90}; 112};