1 files changed, 104 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
new file mode 100644
index 000000000000..46477ac1de99
--- /dev/null
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -0,0 +1,104 @@
+/*
+ * Copyright 2011-2012 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+
+/* First 4KB has pen for secondary cores. */
+/memreserve/ 0x00000000 0x0001000;
+
+/ {
+        model = "Calxeda ECX-2000";
+        compatible = "calxeda,ecx-2000";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        clock-ranges;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "arm,cortex-a15";
+                        reg = <0>;
+                        clocks = <&a9pll>;
+                        clock-names = "cpu";
+                };
+
+                cpu@1 {
+                        compatible = "arm,cortex-a15";
+                        reg = <1>;
+                        clocks = <&a9pll>;
+                        clock-names = "cpu";
+                };
+
+                cpu@2 {
+                        compatible = "arm,cortex-a15";
+                        reg = <2>;
+                        clocks = <&a9pll>;
+                        clock-names = "cpu";
+                };
+
+                cpu@3 {
+                        compatible = "arm,cortex-a15";
+                        reg = <3>;
+                        clocks = <&a9pll>;
+                        clock-names = "cpu";
+                };
+        };
+
+        memory@0 {
+                name = "memory";
+                device_type = "memory";
+                reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
+        };
+
+        memory@200000000 {
+                name = "memory";
+                device_type = "memory";
+                reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
+        };
+
+        soc {
+                ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
+
+                timer {
+                        compatible = "arm,cortex-a15-timer", "arm,armv7-timer";                         interrupts = <1 13 0xf08>,
+                                <1 14 0xf08>,
+                                <1 11 0xf08>,
+                                <1 10 0xf08>;
+                };
+
+                intc: interrupt-controller@fff11000 {
+                        compatible = "arm,cortex-a15-gic";
+                        #interrupt-cells = <3>;
+                        #size-cells = <0>;
+                        #address-cells = <1>;
+                        interrupt-controller;
+                        interrupts = <1 9 0xf04>;
+                        reg = <0xfff11000 0x1000>,
+                              <0xfff12000 0x1000>,
+                              <0xfff14000 0x2000>,
+                              <0xfff16000 0x2000>;
+                };
+
+                pmu {
+                        compatible = "arm,cortex-a9-pmu";
+                        interrupts = <0 76 4  0 75 4  0 74 4  0 73 4>;
+                };
+        };
+};
+
+/include/ "ecx-common.dtsi"