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Diffstat (limited to 'arch/arm/boot/dts/at91sam9263.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi173
1 files changed, 129 insertions, 44 deletions
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 3e6e5c1abbf3..251ccec430a4 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -89,60 +89,137 @@
89 reg = <0xfffffd10 0x10>; 89 reg = <0xfffffd10 0x10>;
90 }; 90 };
91 91
92 pioA: gpio@fffff200 { 92 pinctrl@fffff200 {
93 compatible = "atmel,at91rm9200-gpio"; 93 #address-cells = <1>;
94 reg = <0xfffff200 0x100>; 94 #size-cells = <1>;
95 interrupts = <2 4 1>; 95 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
96 #gpio-cells = <2>; 96 ranges = <0xfffff200 0xfffff200 0xa00>;
97 gpio-controller;
98 interrupt-controller;
99 #interrupt-cells = <2>;
100 };
101 97
102 pioB: gpio@fffff400 { 98 atmel,mux-mask = <
103 compatible = "atmel,at91rm9200-gpio"; 99 /* A B */
104 reg = <0xfffff400 0x100>; 100 0xfffffffb 0xffffe07f /* pioA */
105 interrupts = <3 4 1>; 101 0x0007ffff 0x39072fff /* pioB */
106 #gpio-cells = <2>; 102 0xffffffff 0x3ffffff8 /* pioC */
107 gpio-controller; 103 0xfffffbff 0xffffffff /* pioD */
108 interrupt-controller; 104 0xffe00fff 0xfbfcff00 /* pioE */
109 #interrupt-cells = <2>; 105 >;
110 };
111 106
112 pioC: gpio@fffff600 { 107 /* shared pinctrl settings */
113 compatible = "atmel,at91rm9200-gpio"; 108 dbgu {
114 reg = <0xfffff600 0x100>; 109 pinctrl_dbgu: dbgu-0 {
115 interrupts = <4 4 1>; 110 atmel,pins =
116 #gpio-cells = <2>; 111 <2 30 0x1 0x0 /* PC30 periph A */
117 gpio-controller; 112 2 31 0x1 0x1>; /* PC31 periph with pullup */
118 interrupt-controller; 113 };
119 #interrupt-cells = <2>; 114 };
120 };
121 115
122 pioD: gpio@fffff800 { 116 uart0 {
123 compatible = "atmel,at91rm9200-gpio"; 117 pinctrl_uart0: uart0-0 {
124 reg = <0xfffff800 0x100>; 118 atmel,pins =
125 interrupts = <4 4 1>; 119 <0 26 0x1 0x1 /* PA26 periph A with pullup */
126 #gpio-cells = <2>; 120 0 27 0x1 0x0>; /* PA27 periph A */
127 gpio-controller; 121 };
128 interrupt-controller;
129 #interrupt-cells = <2>;
130 };
131 122
132 pioE: gpio@fffffa00 { 123 pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
133 compatible = "atmel,at91rm9200-gpio"; 124 atmel,pins =
134 reg = <0xfffffa00 0x100>; 125 <0 28 0x1 0x0 /* PA28 periph A */
135 interrupts = <4 4 1>; 126 0 29 0x1 0x0>; /* PA29 periph A */
136 #gpio-cells = <2>; 127 };
137 gpio-controller; 128 };
138 interrupt-controller; 129
139 #interrupt-cells = <2>; 130 uart1 {
131 pinctrl_uart1: uart1-0 {
132 atmel,pins =
133 <3 0 0x1 0x1 /* PD0 periph A with pullup */
134 3 1 0x1 0x0>; /* PD1 periph A */
135 };
136
137 pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
138 atmel,pins =
139 <3 7 0x2 0x0 /* PD7 periph B */
140 3 8 0x2 0x0>; /* PD8 periph B */
141 };
142 };
143
144 uart2 {
145 pinctrl_uart2: uart2-0 {
146 atmel,pins =
147 <3 2 0x1 0x1 /* PD2 periph A with pullup */
148 3 3 0x1 0x0>; /* PD3 periph A */
149 };
150
151 pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
152 atmel,pins =
153 <3 5 0x2 0x0 /* PD5 periph B */
154 4 6 0x2 0x0>; /* PD6 periph B */
155 };
156 };
157
158 nand {
159 pinctrl_nand: nand-0 {
160 atmel,pins =
161 <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
162 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
163 };
164 };
165
166 pioA: gpio@fffff200 {
167 compatible = "atmel,at91rm9200-gpio";
168 reg = <0xfffff200 0x200>;
169 interrupts = <2 4 1>;
170 #gpio-cells = <2>;
171 gpio-controller;
172 interrupt-controller;
173 #interrupt-cells = <2>;
174 };
175
176 pioB: gpio@fffff400 {
177 compatible = "atmel,at91rm9200-gpio";
178 reg = <0xfffff400 0x200>;
179 interrupts = <3 4 1>;
180 #gpio-cells = <2>;
181 gpio-controller;
182 interrupt-controller;
183 #interrupt-cells = <2>;
184 };
185
186 pioC: gpio@fffff600 {
187 compatible = "atmel,at91rm9200-gpio";
188 reg = <0xfffff600 0x200>;
189 interrupts = <4 4 1>;
190 #gpio-cells = <2>;
191 gpio-controller;
192 interrupt-controller;
193 #interrupt-cells = <2>;
194 };
195
196 pioD: gpio@fffff800 {
197 compatible = "atmel,at91rm9200-gpio";
198 reg = <0xfffff800 0x200>;
199 interrupts = <4 4 1>;
200 #gpio-cells = <2>;
201 gpio-controller;
202 interrupt-controller;
203 #interrupt-cells = <2>;
204 };
205
206 pioE: gpio@fffffa00 {
207 compatible = "atmel,at91rm9200-gpio";
208 reg = <0xfffffa00 0x200>;
209 interrupts = <4 4 1>;
210 #gpio-cells = <2>;
211 gpio-controller;
212 interrupt-controller;
213 #interrupt-cells = <2>;
214 };
140 }; 215 };
141 216
142 dbgu: serial@ffffee00 { 217 dbgu: serial@ffffee00 {
143 compatible = "atmel,at91sam9260-usart"; 218 compatible = "atmel,at91sam9260-usart";
144 reg = <0xffffee00 0x200>; 219 reg = <0xffffee00 0x200>;
145 interrupts = <1 4 7>; 220 interrupts = <1 4 7>;
221 pinctrl-names = "default";
222 pinctrl-0 = <&pinctrl_dbgu>;
146 status = "disabled"; 223 status = "disabled";
147 }; 224 };
148 225
@@ -152,6 +229,8 @@
152 interrupts = <7 4 5>; 229 interrupts = <7 4 5>;
153 atmel,use-dma-rx; 230 atmel,use-dma-rx;
154 atmel,use-dma-tx; 231 atmel,use-dma-tx;
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_uart0>;
155 status = "disabled"; 234 status = "disabled";
156 }; 235 };
157 236
@@ -161,6 +240,8 @@
161 interrupts = <8 4 5>; 240 interrupts = <8 4 5>;
162 atmel,use-dma-rx; 241 atmel,use-dma-rx;
163 atmel,use-dma-tx; 242 atmel,use-dma-tx;
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_uart1>;
164 status = "disabled"; 245 status = "disabled";
165 }; 246 };
166 247
@@ -170,6 +251,8 @@
170 interrupts = <9 4 5>; 251 interrupts = <9 4 5>;
171 atmel,use-dma-rx; 252 atmel,use-dma-rx;
172 atmel,use-dma-tx; 253 atmel,use-dma-tx;
254 pinctrl-names = "default";
255 pinctrl-0 = <&pinctrl_uart2>;
173 status = "disabled"; 256 status = "disabled";
174 }; 257 };
175 258
@@ -206,6 +289,8 @@
206 >; 289 >;
207 atmel,nand-addr-offset = <21>; 290 atmel,nand-addr-offset = <21>;
208 atmel,nand-cmd-offset = <22>; 291 atmel,nand-cmd-offset = <22>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_nand>;
209 gpios = <&pioA 22 0 294 gpios = <&pioA 22 0
210 &pioD 15 0 295 &pioD 15 0
211 0 296 0