diff options
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_rapl.c | 31 |
1 files changed, 24 insertions, 7 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c index 0e3754e450d9..5ad35ad94d0f 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c +++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c | |||
| @@ -27,6 +27,10 @@ | |||
| 27 | * event: rapl_energy_dram | 27 | * event: rapl_energy_dram |
| 28 | * perf code: 0x3 | 28 | * perf code: 0x3 |
| 29 | * | 29 | * |
| 30 | * dram counter: consumption of the builtin-gpu domain (client only) | ||
| 31 | * event: rapl_energy_gpu | ||
| 32 | * perf code: 0x4 | ||
| 33 | * | ||
| 30 | * We manage those counters as free running (read-only). They may be | 34 | * We manage those counters as free running (read-only). They may be |
| 31 | * use simultaneously by other tools, such as turbostat. | 35 | * use simultaneously by other tools, such as turbostat. |
| 32 | * | 36 | * |
| @@ -55,10 +59,13 @@ | |||
| 55 | #define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */ | 59 | #define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */ |
| 56 | #define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */ | 60 | #define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */ |
| 57 | #define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */ | 61 | #define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */ |
| 62 | #define RAPL_IDX_PP1_NRG_STAT 3 /* DRAM */ | ||
| 63 | #define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */ | ||
| 58 | 64 | ||
| 59 | /* Clients have PP0, PKG */ | 65 | /* Clients have PP0, PKG */ |
| 60 | #define RAPL_IDX_CLN (1<<RAPL_IDX_PP0_NRG_STAT|\ | 66 | #define RAPL_IDX_CLN (1<<RAPL_IDX_PP0_NRG_STAT|\ |
| 61 | 1<<RAPL_IDX_PKG_NRG_STAT) | 67 | 1<<RAPL_IDX_PKG_NRG_STAT|\ |
| 68 | 1<<RAPL_IDX_PP1_NRG_STAT) | ||
| 62 | 69 | ||
| 63 | /* Servers have PP0, PKG, RAM */ | 70 | /* Servers have PP0, PKG, RAM */ |
| 64 | #define RAPL_IDX_SRV (1<<RAPL_IDX_PP0_NRG_STAT|\ | 71 | #define RAPL_IDX_SRV (1<<RAPL_IDX_PP0_NRG_STAT|\ |
| @@ -315,6 +322,10 @@ static int rapl_pmu_event_init(struct perf_event *event) | |||
| 315 | bit = RAPL_IDX_RAM_NRG_STAT; | 322 | bit = RAPL_IDX_RAM_NRG_STAT; |
| 316 | msr = MSR_DRAM_ENERGY_STATUS; | 323 | msr = MSR_DRAM_ENERGY_STATUS; |
| 317 | break; | 324 | break; |
| 325 | case INTEL_RAPL_PP1: | ||
| 326 | bit = RAPL_IDX_PP1_NRG_STAT; | ||
| 327 | msr = MSR_PP1_ENERGY_STATUS; | ||
| 328 | break; | ||
| 318 | default: | 329 | default: |
| 319 | return -EINVAL; | 330 | return -EINVAL; |
| 320 | } | 331 | } |
| @@ -367,19 +378,22 @@ static struct attribute_group rapl_pmu_attr_group = { | |||
| 367 | }; | 378 | }; |
| 368 | 379 | ||
| 369 | EVENT_ATTR_STR(energy-cores, rapl_cores, "event=0x01"); | 380 | EVENT_ATTR_STR(energy-cores, rapl_cores, "event=0x01"); |
| 370 | EVENT_ATTR_STR(energy-pkg , rapl_pkg, "event=0x02"); | 381 | EVENT_ATTR_STR(energy-pkg , rapl_pkg, "event=0x02"); |
| 371 | EVENT_ATTR_STR(energy-ram , rapl_ram, "event=0x03"); | 382 | EVENT_ATTR_STR(energy-ram , rapl_ram, "event=0x03"); |
| 383 | EVENT_ATTR_STR(energy-gpu , rapl_gpu, "event=0x04"); | ||
| 372 | 384 | ||
| 373 | EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules"); | 385 | EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules"); |
| 374 | EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit, "Joules"); | 386 | EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit, "Joules"); |
| 375 | EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules"); | 387 | EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules"); |
| 388 | EVENT_ATTR_STR(energy-gpu.unit , rapl_gpu_unit, "Joules"); | ||
| 376 | 389 | ||
| 377 | /* | 390 | /* |
| 378 | * we compute in 0.23 nJ increments regardless of MSR | 391 | * we compute in 0.23 nJ increments regardless of MSR |
| 379 | */ | 392 | */ |
| 380 | EVENT_ATTR_STR(energy-cores.scale, rapl_cores_scale, "2.3283064365386962890625e-10"); | 393 | EVENT_ATTR_STR(energy-cores.scale, rapl_cores_scale, "2.3283064365386962890625e-10"); |
| 381 | EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scale, "2.3283064365386962890625e-10"); | 394 | EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scale, "2.3283064365386962890625e-10"); |
| 382 | EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3283064365386962890625e-10"); | 395 | EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3283064365386962890625e-10"); |
| 396 | EVENT_ATTR_STR(energy-gpu.scale, rapl_gpu_scale, "2.3283064365386962890625e-10"); | ||
| 383 | 397 | ||
| 384 | static struct attribute *rapl_events_srv_attr[] = { | 398 | static struct attribute *rapl_events_srv_attr[] = { |
| 385 | EVENT_PTR(rapl_cores), | 399 | EVENT_PTR(rapl_cores), |
| @@ -399,12 +413,15 @@ static struct attribute *rapl_events_srv_attr[] = { | |||
| 399 | static struct attribute *rapl_events_cln_attr[] = { | 413 | static struct attribute *rapl_events_cln_attr[] = { |
| 400 | EVENT_PTR(rapl_cores), | 414 | EVENT_PTR(rapl_cores), |
| 401 | EVENT_PTR(rapl_pkg), | 415 | EVENT_PTR(rapl_pkg), |
| 416 | EVENT_PTR(rapl_gpu), | ||
| 402 | 417 | ||
| 403 | EVENT_PTR(rapl_cores_unit), | 418 | EVENT_PTR(rapl_cores_unit), |
| 404 | EVENT_PTR(rapl_pkg_unit), | 419 | EVENT_PTR(rapl_pkg_unit), |
| 420 | EVENT_PTR(rapl_gpu_unit), | ||
| 405 | 421 | ||
| 406 | EVENT_PTR(rapl_cores_scale), | 422 | EVENT_PTR(rapl_cores_scale), |
| 407 | EVENT_PTR(rapl_pkg_scale), | 423 | EVENT_PTR(rapl_pkg_scale), |
| 424 | EVENT_PTR(rapl_gpu_scale), | ||
| 408 | NULL, | 425 | NULL, |
| 409 | }; | 426 | }; |
| 410 | 427 | ||
