85 files changed, 1269 insertions, 3607 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9dd61014864b..43449305961e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -197,15 +197,21 @@ config ARM_PATCH_PHYS_VIRT
         depends on !XIP_KERNEL && MMU
         depends on !ARCH_REALVIEW || !SPARSEMEM
         help
-          Patch phys-to-virt translation functions at runtime according to
-          the position of the kernel in system memory.
+          Patch phys-to-virt and virt-to-phys translation functions at
+          boot and module load time according to the position of the
+          kernel in system memory.
 
-          This can only be used with non-XIP with MMU kernels where
-          the base of physical memory is at a 16MB boundary.
+          This can only be used with non-XIP MMU kernels where the base
+          of physical memory is at a 16MB boundary, or theoretically 64K
+          for the MSM machine class.
 
 config ARM_PATCH_PHYS_VIRT_16BIT
         def_bool y
         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
+        help
+          This option extends the physical to virtual translation patching
+          to allow physical memory down to a theoretical minimum of 64K
+          boundaries.
 
 source "init/Kconfig"
 
@@ -550,18 +556,6 @@ config ARCH_KS8695
           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
           System-on-Chip devices.
 
-config ARCH_NS9XXX
-        bool "NetSilicon NS9xxx"
-        select CPU_ARM926T
-        select GENERIC_GPIO
-        select GENERIC_CLOCKEVENTS
-        select HAVE_CLK
-        help
-          Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
-          System.
-
-          <http://www.digi.com/products/microprocessors/index.jsp>
-
 config ARCH_W90X900
         bool "Nuvoton W90X900 CPU"
         select CPU_ARM926T
@@ -954,8 +948,6 @@ source "arch/arm/mach-netx/Kconfig"
 source "arch/arm/mach-nomadik/Kconfig"
 source "arch/arm/plat-nomadik/Kconfig"
 
-source "arch/arm/mach-ns9xxx/Kconfig"
-
 source "arch/arm/mach-nuc93x/Kconfig"
 
 source "arch/arm/plat-omap/Kconfig"
@@ -1321,8 +1313,7 @@ menu "Kernel Features"
 source "kernel/time/Kconfig"
 
 config SMP
-        bool "Symmetric Multi-Processing (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
+        bool "Symmetric Multi-Processing"
         depends on CPU_V6K || CPU_V7
         depends on GENERIC_CLOCKEVENTS
         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
@@ -1524,8 +1515,8 @@ config ARCH_SELECT_MEMORY_MODEL
         def_bool ARCH_SPARSEMEM_ENABLE
 
 config HIGHMEM
-        bool "High Memory Support (EXPERIMENTAL)"
-        depends on MMU && EXPERIMENTAL
+        bool "High Memory Support"
+        depends on MMU
         help
           The address space of ARM processors is only 4 Gigabytes large
           and it has to accommodate user address space, kernel address
@@ -1745,16 +1736,31 @@ config CMDLINE
           time by entering them here. As a minimum, you should specify the
           memory size and the root device (e.g., mem=64M root=/dev/nfs).
 
+choice
+        prompt "Kernel command line type" if CMDLINE != ""
+        default CMDLINE_FROM_BOOTLOADER
+
+config CMDLINE_FROM_BOOTLOADER
+        bool "Use bootloader kernel arguments if available"
+        help
+          Uses the command-line options passed by the boot loader. If
+          the boot loader doesn't provide any, the default kernel command
+          string provided in CMDLINE will be used.
+
+config CMDLINE_EXTEND
+        bool "Extend bootloader kernel arguments"
+        help
+          The command-line arguments provided by the boot loader will be
+          appended to the default kernel command string.
+
 config CMDLINE_FORCE
         bool "Always use the default kernel command string"
-        depends on CMDLINE != ""
         help
           Always use the default kernel command string, even if the boot
           loader passes other arguments to the kernel.
           This is useful if you cannot or don't want to change the
           command-line options your boot loader passes to the kernel.
-
-          If unsure, say N.
+endchoice
 
 config XIP_KERNEL
         bool "Kernel Execute-In-Place from ROM"
@@ -2013,7 +2019,7 @@ menu "Power management options"
 source "kernel/power/Kconfig"
 
 config ARCH_SUSPEND_POSSIBLE
-        depends on !ARCH_S5P64X0 && !ARCH_S5P6442
+        depends on !ARCH_S5P64X0 && !ARCH_S5P6442 && !ARCH_S5PC100
         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
         def_bool y
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 692c481196bd..458a01516676 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -164,7 +164,6 @@ machine-$(CONFIG_ARCH_MXC91231)		:= mxc91231
 machine-$(CONFIG_ARCH_MXS)              := mxs
 machine-$(CONFIG_ARCH_NETX)             := netx
 machine-$(CONFIG_ARCH_NOMADIK)          := nomadik
-machine-$(CONFIG_ARCH_NS9XXX)           := ns9xxx
 machine-$(CONFIG_ARCH_OMAP1)            := omap1
 machine-$(CONFIG_ARCH_OMAP2)            := omap2
 machine-$(CONFIG_ARCH_OMAP3)            := omap2
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 49f5b2eaaa87..6fdf4abb718b 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -459,7 +459,11 @@ __setup_mmu:	sub	r3, r4, #16384		@ Page directory size
                 orr     r1, r1, #3 << 10
                 add     r2, r3, #16384
 1:              cmp     r1, r9                  @ if virt > start of RAM
+#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
+                orrhs   r1, r1, #0x08           @ set cacheable
+#else
                 orrhs   r1, r1, #0x0c           @ set cacheable, bufferable
+#endif
                 cmp     r1, r10                 @ if virt > end of RAM
                 bichs   r1, r1, #0x0c           @ clear cacheable, bufferable
                 str     r1, [r0], #4            @ 1:1 mapping
@@ -484,6 +488,12 @@ __setup_mmu:	sub	r3, r4, #16384		@ Page directory size
                 mov     pc, lr
 ENDPROC(__setup_mmu)
 
+__arm926ejs_mmu_cache_on:
+#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
+                mov     r0, #4                  @ put dcache in WT mode
+                mcr     p15, 7, r0, c15, c0, 0
+#endif
+
 __armv4_mmu_cache_on:
                 mov     r12, lr
 #ifdef CONFIG_MMU
@@ -665,6 +675,12 @@ proc_types:
                 W(b)    __armv4_mpu_cache_off
                 W(b)    __armv4_mpu_cache_flush
 
+                .word   0x41069260              @ ARM926EJ-S (v5TEJ)
+                .word   0xff0ffff0
+                b       __arm926ejs_mmu_cache_on
+                b       __armv4_mmu_cache_off
+                b       __armv5tej_mmu_cache_flush
+
                 .word   0x00007000              @ ARM7 IDs
                 .word   0x0000f000
                 mov     pc, lr
diff --git a/arch/arm/configs/ns9xxx_defconfig b/arch/arm/configs/ns9xxx_defconfig
deleted file mode 100644
index 1f528a002983..000000000000
--- a/arch/arm/configs/ns9xxx_defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_NS9XXX=y
-CONFIG_MACH_CC9P9360DEV=y
-CONFIG_MACH_CC9P9360JS=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=m
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_SYN_COOKIES=y
-CONFIG_MTD=m
-CONFIG_MTD_CONCAT=m
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLOCK=m
-CONFIG_MTD_CFI=m
-CONFIG_MTD_JEDECPROBE=m
-CONFIG_MTD_CFI_AMDSTD=m
-CONFIG_MTD_PHYSMAP=m
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=m
-CONFIG_I2C_GPIO=m
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=m
-CONFIG_LEDS_GPIO=m
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=m
-CONFIG_LEDS_TRIGGER_HEARTBEAT=m
-CONFIG_RTC_CLASS=m
-CONFIG_EXT2_FS=m
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=m
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
diff --git a/arch/arm/configs/spear310_defconfig b/arch/arm/configs/spear310_defconfig
deleted file mode 100644
index 824e44418b18..000000000000
--- a/arch/arm/configs/spear310_defconfig
+++ /dev/null
@@ -1,52 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_PLAT_SPEAR=y
-CONFIG_MACH_SPEAR310=y
-CONFIG_BINFMT_MISC=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_INPUT_FF_MEMLESS=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_RAW_DRIVER=y
-CONFIG_MAX_RAW_DEVS=8192
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PL061=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
-CONFIG_TMPFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/spear320_defconfig b/arch/arm/configs/spear320_defconfig
deleted file mode 100644
index 842f7f3c512a..000000000000
--- a/arch/arm/configs/spear320_defconfig
+++ /dev/null
@@ -1,52 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_PLAT_SPEAR=y
-CONFIG_MACH_SPEAR320=y
-CONFIG_BINFMT_MISC=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_INPUT_FF_MEMLESS=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_RAW_DRIVER=y
-CONFIG_MAX_RAW_DEVS=8192
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_PL061=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
-CONFIG_TMPFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=m
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/spear300_defconfig b/arch/arm/configs/spear3xx_defconfig
index cf29f3e56922..fea7e1f026a3 100644
--- a/arch/arm/configs/spear300_defconfig
+++ b/arch/arm/configs/spear3xx_defconfig
@@ -7,6 +7,9 @@ CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_PLAT_SPEAR=y
+CONFIG_BOARD_SPEAR300_EVB=y
+CONFIG_BOARD_SPEAR310_EVB=y
+CONFIG_BOARD_SPEAR320_EVB=y
 CONFIG_BINFMT_MISC=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_RAM=y
@@ -24,7 +27,6 @@ CONFIG_MAX_RAW_DEVS=8192
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_PL061=y
 # CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
 # CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_EXT2_FS=y
diff --git a/arch/arm/configs/spear600_defconfig b/arch/arm/configs/spear6xx_defconfig
index 6777c11f63e7..cef2e836afd2 100644
--- a/arch/arm/configs/spear600_defconfig
+++ b/arch/arm/configs/spear6xx_defconfig
@@ -8,6 +8,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_PLAT_SPEAR=y
 CONFIG_ARCH_SPEAR6XX=y
+CONFIG_BOARD_SPEAR600_EVB=y
 CONFIG_BINFMT_MISC=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_RAM=y
@@ -22,7 +23,6 @@ CONFIG_MAX_RAW_DEVS=8192
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_PL061=y
 # CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
 # CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_EXT2_FS=y
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index c3cd8755e648..0e9ce8d9686e 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -108,6 +108,7 @@ struct task_struct;
 int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
 #define ELF_CORE_COPY_TASK_REGS dump_task_regs
 
+#define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE       4096
 
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 199a6b6de7f4..8c73900da9ed 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -3,16 +3,74 @@
 
 #ifdef __KERNEL__
 
+#if defined(CONFIG_CPU_USE_DOMAINS) && defined(CONFIG_SMP)
+/* ARM doesn't provide unprivileged exclusive memory accessors */
+#include <asm-generic/futex.h>
+#else
+
+#include <linux/futex.h>
+#include <linux/uaccess.h>
+#include <asm/errno.h>
+
+#define __futex_atomic_ex_table(err_reg)                        \
+        "3:\n"                                                  \
+        "       .pushsection __ex_table,\"a\"\n"                \
+        "       .align  3\n"                                    \
+        "       .long   1b, 4f, 2b, 4f\n"                       \
+        "       .popsection\n"                                  \
+        "       .pushsection .fixup,\"ax\"\n"                   \
+        "4:     mov     %0, " err_reg "\n"                      \
+        "       b       3b\n"                                   \
+        "       .popsection"
+
 #ifdef CONFIG_SMP
 
-#include <asm-generic/futex.h>
+#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)      \
+        smp_mb();                                               \
+        __asm__ __volatile__(                                   \
+        "1:     ldrex   %1, [%2]\n"                             \
+        "       " insn "\n"                                     \
+        "2:     strex   %1, %0, [%2]\n"                         \
+        "       teq     %1, #0\n"                               \
+        "       bne     1b\n"                                   \
+        "       mov     %0, #0\n"                               \
+        __futex_atomic_ex_table("%4")                           \
+        : "=&r" (ret), "=&r" (oldval)                           \
+        : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT)              \
+        : "cc", "memory")
+
+static inline int
+futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
+                              u32 oldval, u32 newval)
+{
+        int ret;
+        u32 val;
+
+        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
+                return -EFAULT;
+
+        smp_mb();
+        __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
+        "1:     ldrex   %1, [%4]\n"
+        "       teq     %1, %2\n"
+        "       ite     eq      @ explicit IT needed for the 2b label\n"
+        "2:     strexeq %0, %3, [%4]\n"
+        "       movne   %0, #0\n"
+        "       teq     %0, #0\n"
+        "       bne     1b\n"
+        __futex_atomic_ex_table("%5")
+        : "=&r" (ret), "=&r" (val)
+        : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
+        : "cc", "memory");
+        smp_mb();
+
+        *uval = val;
+        return ret;
+}
 
 #else /* !SMP, we can work around lack of atomic ops by disabling preemption */
 
-#include <linux/futex.h>
 #include <linux/preempt.h>
-#include <linux/uaccess.h>
-#include <asm/errno.h>
 #include <asm/domain.h>
 
 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)      \
@@ -21,20 +79,38 @@
         "       " insn "\n"                                     \
         "2:     " T(str) "      %0, [%2]\n"                     \
         "       mov     %0, #0\n"                               \
-        "3:\n"                                                  \
-        "       .pushsection __ex_table,\"a\"\n"                \
-        "       .align  3\n"                                    \
-        "       .long   1b, 4f, 2b, 4f\n"                       \
-        "       .popsection\n"                                  \
-        "       .pushsection .fixup,\"ax\"\n"                   \
-        "4:     mov     %0, %4\n"                               \
-        "       b       3b\n"                                   \
-        "       .popsection"                                    \
+        __futex_atomic_ex_table("%4")                           \
         : "=&r" (ret), "=&r" (oldval)                           \
         : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT)              \
         : "cc", "memory")
 
 static inline int
+futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
+                              u32 oldval, u32 newval)
+{
+        int ret = 0;
+        u32 val;
+
+        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
+                return -EFAULT;
+
+        __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
+        "1:     " T(ldr) "      %1, [%4]\n"
+        "       teq     %1, %2\n"
+        "       it      eq      @ explicit IT needed for the 2b label\n"
+        "2:     " T(streq) "    %3, [%4]\n"
+        __futex_atomic_ex_table("%5")
+        : "+r" (ret), "=&r" (val)
+        : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
+        : "cc", "memory");
+
+        *uval = val;
+        return ret;
+}
+
+#endif /* !SMP */
+
+static inline int
 futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 {
         int op = (encoded_op >> 28) & 7;
@@ -87,39 +163,6 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
         return ret;
 }
 
-static inline int
-futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
-                              u32 oldval, u32 newval)
-{
-        int ret = 0;
-        u32 val;
-
-        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
-                return -EFAULT;
-
-        __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
-        "1:     " T(ldr) "      %1, [%4]\n"
-        "       teq     %1, %2\n"
-        "       it      eq      @ explicit IT needed for the 2b label\n"
-        "2:     " T(streq) "    %3, [%4]\n"
-        "3:\n"
-        "       .pushsection __ex_table,\"a\"\n"
-        "       .align  3\n"
-        "       .long   1b, 4f, 2b, 4f\n"
-        "       .popsection\n"
-        "       .pushsection .fixup,\"ax\"\n"
-        "4:     mov     %0, %5\n"
-        "       b       3b\n"
-        "       .popsection"
-        : "+r" (ret), "=&r" (val)
-        : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
-        : "cc", "memory");
-
-        *uval = val;
-        return ret;
-}
-
-#endif /* !SMP */
-
+#endif /* !(CPU_USE_DOMAINS && SMP) */
 #endif /* __KERNEL__ */
 #endif /* _ASM_ARM_FUTEX_H */
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index a8ff22b2a391..312d10877bd7 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -128,6 +128,12 @@ struct pt_regs {
 #define ARM_r0          uregs[0]
 #define ARM_ORIG_r0     uregs[17]
 
+/*
+ * The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
+ * and core dumps.
+ */
+#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
+
 #ifdef __KERNEL__
 
 #define user_mode(regs) \
diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h
index fdd3820edff8..65fa3c88095c 100644
--- a/arch/arm/include/asm/spinlock.h
+++ b/arch/arm/include/asm/spinlock.h
@@ -5,6 +5,8 @@
 #error SMP not supported on pre-ARMv6 CPUs
 #endif
 
+#include <asm/processor.h>
+
 /*
  * sev and wfe are ARMv6K extensions.  Uniprocessor ARMv6 may not have the K
  * extensions, so when running on UP, we have to patch these instructions away.
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 139e3c827369..d53c0abc4dd3 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -560,11 +560,6 @@ static int armpmu_event_init(struct perf_event *event)
         event->destroy = hw_perf_event_destroy;
 
         if (!atomic_inc_not_zero(&active_events)) {
-                if (atomic_read(&active_events) > armpmu->num_events) {
-                        atomic_dec(&active_events);
-                        return -ENOSPC;
-                }
-
                 mutex_lock(&pmu_reserve_mutex);
                 if (atomic_read(&active_events) == 0) {
                         err = armpmu_reserve_hardware();
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 8182f45ca493..97260060bf26 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -21,6 +21,7 @@
 #include <linux/uaccess.h>
 #include <linux/perf_event.h>
 #include <linux/hw_breakpoint.h>
+#include <linux/regset.h>
 
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -308,58 +309,6 @@ static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
         return put_user_reg(tsk, off >> 2, val);
 }
 
-/*
- * Get all user integer registers.
- */
-static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
-{
-        struct pt_regs *regs = task_pt_regs(tsk);
-
-        return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
-}
-
-/*
- * Set all user integer registers.
- */
-static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
-{
-        struct pt_regs newregs;
-        int ret;
-
-        ret = -EFAULT;
-        if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
-                struct pt_regs *regs = task_pt_regs(tsk);
-
-                ret = -EINVAL;
-                if (valid_user_regs(&newregs)) {
-                        *regs = newregs;
-                        ret = 0;
-                }
-        }
-
-        return ret;
-}
-
-/*
- * Get the child FPU state.
- */
-static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
-{
-        return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
-                            sizeof(struct user_fp)) ? -EFAULT : 0;
-}
-
-/*
- * Set the child FPU state.
- */
-static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
-{
-        struct thread_info *thread = task_thread_info(tsk);
-        thread->used_cp[1] = thread->used_cp[2] = 1;
-        return copy_from_user(&thread->fpstate, ufp,
-                              sizeof(struct user_fp)) ? -EFAULT : 0;
-}
-
 #ifdef CONFIG_IWMMXT
 
 /*
@@ -418,56 +367,6 @@ static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
 }
 #endif
 
-#ifdef CONFIG_VFP
-/*
- * Get the child VFP state.
- */
-static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data)
-{
-        struct thread_info *thread = task_thread_info(tsk);
-        union vfp_state *vfp = &thread->vfpstate;
-        struct user_vfp __user *ufp = data;
-
-        vfp_sync_hwstate(thread);
-
-        /* copy the floating point registers */
-        if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs,
-                         sizeof(vfp->hard.fpregs)))
-                return -EFAULT;
-
-        /* copy the status and control register */
-        if (put_user(vfp->hard.fpscr, &ufp->fpscr))
-                return -EFAULT;
-
-        return 0;
-}
-
-/*
- * Set the child VFP state.
- */
-static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data)
-{
-        struct thread_info *thread = task_thread_info(tsk);
-        union vfp_state *vfp = &thread->vfpstate;
-        struct user_vfp __user *ufp = data;
-
-        vfp_sync_hwstate(thread);
-
-        /* copy the floating point registers */
-        if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs,
-                           sizeof(vfp->hard.fpregs)))
-                return -EFAULT;
-
-        /* copy the status and control register */
-        if (get_user(vfp->hard.fpscr, &ufp->fpscr))
-                return -EFAULT;
-
-        vfp_flush_hwstate(thread);
-
-        return 0;
-}
-#endif
-
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 /*
  * Convert a virtual register number into an index for a thread_info
@@ -694,6 +593,219 @@ out:
 }
 #endif
 
+/* regset get/set implementations */
+
+static int gpr_get(struct task_struct *target,
+                   const struct user_regset *regset,
+                   unsigned int pos, unsigned int count,
+                   void *kbuf, void __user *ubuf)
+{
+        struct pt_regs *regs = task_pt_regs(target);
+
+        return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                   regs,
+                                   0, sizeof(*regs));
+}
+
+static int gpr_set(struct task_struct *target,
+                   const struct user_regset *regset,
+                   unsigned int pos, unsigned int count,
+                   const void *kbuf, const void __user *ubuf)
+{
+        int ret;
+        struct pt_regs newregs;
+
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 &newregs,
+                                 0, sizeof(newregs));
+        if (ret)
+                return ret;
+
+        if (!valid_user_regs(&newregs))
+                return -EINVAL;
+
+        *task_pt_regs(target) = newregs;
+        return 0;
+}
+
+static int fpa_get(struct task_struct *target,
+                   const struct user_regset *regset,
+                   unsigned int pos, unsigned int count,
+                   void *kbuf, void __user *ubuf)
+{
+        return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                   &task_thread_info(target)->fpstate,
+                                   0, sizeof(struct user_fp));
+}
+
+static int fpa_set(struct task_struct *target,
+                   const struct user_regset *regset,
+                   unsigned int pos, unsigned int count,
+                   const void *kbuf, const void __user *ubuf)
+{
+        struct thread_info *thread = task_thread_info(target);
+
+        thread->used_cp[1] = thread->used_cp[2] = 1;
+
+        return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                &thread->fpstate,
+                0, sizeof(struct user_fp));
+}
+
+#ifdef CONFIG_VFP
+/*
+ * VFP register get/set implementations.
+ *
+ * With respect to the kernel, struct user_fp is divided into three chunks:
+ * 16 or 32 real VFP registers (d0-d15 or d0-31)
+ *      These are transferred to/from the real registers in the task's
+ *      vfp_hard_struct.  The number of registers depends on the kernel
+ *      configuration.
+ *
+ * 16 or 0 fake VFP registers (d16-d31 or empty)
+ *      i.e., the user_vfp structure has space for 32 registers even if
+ *      the kernel doesn't have them all.
+ *
+ *      vfp_get() reads this chunk as zero where applicable
+ *      vfp_set() ignores this chunk
+ *
+ * 1 word for the FPSCR
+ *
+ * The bounds-checking logic built into user_regset_copyout and friends
+ * means that we can make a simple sequence of calls to map the relevant data
+ * to/from the specified slice of the user regset structure.
+ */
+static int vfp_get(struct task_struct *target,
+                   const struct user_regset *regset,
+                   unsigned int pos, unsigned int count,
+                   void *kbuf, void __user *ubuf)
+{
+        int ret;
+        struct thread_info *thread = task_thread_info(target);
+        struct vfp_hard_struct const *vfp = &thread->vfpstate.hard;
+        const size_t user_fpregs_offset = offsetof(struct user_vfp, fpregs);
+        const size_t user_fpscr_offset = offsetof(struct user_vfp, fpscr);
+
+        vfp_sync_hwstate(thread);
+
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  &vfp->fpregs,
+                                  user_fpregs_offset,
+                                  user_fpregs_offset + sizeof(vfp->fpregs));
+        if (ret)
+                return ret;
+
+        ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                       user_fpregs_offset + sizeof(vfp->fpregs),
+                                       user_fpscr_offset);
+        if (ret)
+                return ret;
+
+        return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                   &vfp->fpscr,
+                                   user_fpscr_offset,
+                                   user_fpscr_offset + sizeof(vfp->fpscr));
+}
+
+/*
+ * For vfp_set() a read-modify-write is done on the VFP registers,
+ * in order to avoid writing back a half-modified set of registers on
+ * failure.
+ */
+static int vfp_set(struct task_struct *target,
+                          const struct user_regset *regset,
+                          unsigned int pos, unsigned int count,
+                          const void *kbuf, const void __user *ubuf)
+{
+        int ret;
+        struct thread_info *thread = task_thread_info(target);
+        struct vfp_hard_struct new_vfp = thread->vfpstate.hard;
+        const size_t user_fpregs_offset = offsetof(struct user_vfp, fpregs);
+        const size_t user_fpscr_offset = offsetof(struct user_vfp, fpscr);
+
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                  &new_vfp.fpregs,
+                                  user_fpregs_offset,
+                                  user_fpregs_offset + sizeof(new_vfp.fpregs));
+        if (ret)
+                return ret;
+
+        ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                user_fpregs_offset + sizeof(new_vfp.fpregs),
+                                user_fpscr_offset);
+        if (ret)
+                return ret;
+
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 &new_vfp.fpscr,
+                                 user_fpscr_offset,
+                                 user_fpscr_offset + sizeof(new_vfp.fpscr));
+        if (ret)
+                return ret;
+
+        vfp_sync_hwstate(thread);
+        thread->vfpstate.hard = new_vfp;
+        vfp_flush_hwstate(thread);
+
+        return 0;
+}
+#endif /* CONFIG_VFP */
+
+enum arm_regset {
+        REGSET_GPR,
+        REGSET_FPR,
+#ifdef CONFIG_VFP
+        REGSET_VFP,
+#endif
+};
+
+static const struct user_regset arm_regsets[] = {
+        [REGSET_GPR] = {
+                .core_note_type = NT_PRSTATUS,
+                .n = ELF_NGREG,
+                .size = sizeof(u32),
+                .align = sizeof(u32),
+                .get = gpr_get,
+                .set = gpr_set
+        },
+        [REGSET_FPR] = {
+                /*
+                 * For the FPA regs in fpstate, the real fields are a mixture
+                 * of sizes, so pretend that the registers are word-sized:
+                 */
+                .core_note_type = NT_PRFPREG,
+                .n = sizeof(struct user_fp) / sizeof(u32),
+                .size = sizeof(u32),
+                .align = sizeof(u32),
+                .get = fpa_get,
+                .set = fpa_set
+        },
+#ifdef CONFIG_VFP
+        [REGSET_VFP] = {
+                /*
+                 * Pretend that the VFP regs are word-sized, since the FPSCR is
+                 * a single word dangling at the end of struct user_vfp:
+                 */
+                .core_note_type = NT_ARM_VFP,
+                .n = ARM_VFPREGS_SIZE / sizeof(u32),
+                .size = sizeof(u32),
+                .align = sizeof(u32),
+                .get = vfp_get,
+                .set = vfp_set
+        },
+#endif /* CONFIG_VFP */
+};
+
+static const struct user_regset_view user_arm_view = {
+        .name = "arm", .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
+        .regsets = arm_regsets, .n = ARRAY_SIZE(arm_regsets)
+};
+
+const struct user_regset_view *task_user_regset_view(struct task_struct *task)
+{
+        return &user_arm_view;
+}
+
 long arch_ptrace(struct task_struct *child, long request,
                  unsigned long addr, unsigned long data)
 {
@@ -710,19 +822,31 @@ long arch_ptrace(struct task_struct *child, long request,
                         break;
 
                 case PTRACE_GETREGS:
-                        ret = ptrace_getregs(child, datap);
+                        ret = copy_regset_to_user(child,
+                                                  &user_arm_view, REGSET_GPR,
+                                                  0, sizeof(struct pt_regs),
+                                                  datap);
                         break;
 
                 case PTRACE_SETREGS:
-                        ret = ptrace_setregs(child, datap);
+                        ret = copy_regset_from_user(child,
+                                                    &user_arm_view, REGSET_GPR,
+                                                    0, sizeof(struct pt_regs),
+                                                    datap);
                         break;
 
                 case PTRACE_GETFPREGS:
-                        ret = ptrace_getfpregs(child, datap);
+                        ret = copy_regset_to_user(child,
+                                                  &user_arm_view, REGSET_FPR,
+                                                  0, sizeof(union fp_state),
+                                                  datap);
                         break;
-                
+
                 case PTRACE_SETFPREGS:
-                        ret = ptrace_setfpregs(child, datap);
+                        ret = copy_regset_from_user(child,
+                                                    &user_arm_view, REGSET_FPR,
+                                                    0, sizeof(union fp_state),
+                                                    datap);
                         break;
 
 #ifdef CONFIG_IWMMXT
@@ -757,11 +881,17 @@ long arch_ptrace(struct task_struct *child, long request,
 
 #ifdef CONFIG_VFP
                 case PTRACE_GETVFPREGS:
-                        ret = ptrace_getvfpregs(child, datap);
+                        ret = copy_regset_to_user(child,
+                                                  &user_arm_view, REGSET_VFP,
+                                                  0, ARM_VFPREGS_SIZE,
+                                                  datap);
                         break;
 
                 case PTRACE_SETVFPREGS:
-                        ret = ptrace_setvfpregs(child, datap);
+                        ret = copy_regset_from_user(child,
+                                                    &user_arm_view, REGSET_VFP,
+                                                    0, ARM_VFPREGS_SIZE,
+                                                    datap);
                         break;
 #endif
 
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 006c1e884eaf..6dce209a623b 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -672,11 +672,16 @@ __tagtable(ATAG_REVISION, parse_tag_revision);
 
 static int __init parse_tag_cmdline(const struct tag *tag)
 {
-#ifndef CONFIG_CMDLINE_FORCE
-        strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE);
-#else
+#if defined(CONFIG_CMDLINE_EXTEND)
+        strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
+        strlcat(default_command_line, tag->u.cmdline.cmdline,
+                COMMAND_LINE_SIZE);
+#elif defined(CONFIG_CMDLINE_FORCE)
         pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
-#endif /* CONFIG_CMDLINE_FORCE */
+#else
+        strlcpy(default_command_line, tag->u.cmdline.cmdline,
+                COMMAND_LINE_SIZE);
+#endif
         return 0;
 }
 
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index a5a9ff70b198..415dce37b88c 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -356,29 +356,6 @@ static int ep93xx_gpio_set_debounce(struct gpio_chip *chip,
         return 0;
 }
 
-static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
-{
-        struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
-        u8 data_reg, data_dir_reg;
-        int gpio, i;
-
-        data_reg = __raw_readb(ep93xx_chip->data_reg);
-        data_dir_reg = __raw_readb(ep93xx_chip->data_dir_reg);
-
-        gpio = ep93xx_chip->chip.base;
-        for (i = 0; i < chip->ngpio; i++, gpio++) {
-                int is_out = data_dir_reg & (1 << i);
-                int irq = gpio_to_irq(gpio);
-
-                seq_printf(s, " %s%d gpio-%-3d (%-12s) %s %s %s\n",
-                                chip->label, i, gpio,
-                                gpiochip_is_requested(chip, i) ? : "",
-                                is_out ? "out" : "in ",
-                                (data_reg & (1<<  i)) ? "hi" : "lo",
-                                (!is_out && irq>= 0) ? "(interrupt)" : "");
-        }
-}
-
 #define EP93XX_GPIO_BANK(name, dr, ddr, base_gpio)                      \
         {                                                               \
                 .chip = {                                               \
@@ -387,7 +364,6 @@ static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
                         .direction_output = ep93xx_gpio_direction_output, \
                         .get              = ep93xx_gpio_get,            \
                         .set              = ep93xx_gpio_set,            \
-                        .dbg_show         = ep93xx_gpio_dbg_show,       \
                         .base             = base_gpio,                  \
                         .ngpio            = 8,                          \
                 },                                                      \
diff --git a/arch/arm/mach-ns9xxx/Kconfig b/arch/arm/mach-ns9xxx/Kconfig
deleted file mode 100644
index dd0cd5ac4b8b..000000000000
--- a/arch/arm/mach-ns9xxx/Kconfig
+++ /dev/null
@@ -1,40 +0,0 @@
-if ARCH_NS9XXX
-
-menu "NS9xxx Implementations"
-
-config NS9XXX_HAVE_SERIAL8250
-        bool
-
-config PROCESSOR_NS9360
-        bool
-
-config MODULE_CC9P9360
-        bool
-        select PROCESSOR_NS9360
-
-config BOARD_A9M9750DEV
-        select NS9XXX_HAVE_SERIAL8250
-        bool
-
-config BOARD_JSCC9P9360
-        bool
-
-config MACH_CC9P9360DEV
-        bool "ConnectCore 9P 9360 on an A9M9750 Devboard"
-        select MODULE_CC9P9360
-        select BOARD_A9M9750DEV
-        help
-          Say Y here if you are using the Digi ConnectCore 9P 9360
-          on an A9M9750 Development Board.
-
-config MACH_CC9P9360JS
-        bool "ConnectCore 9P 9360 on a JSCC9P9360 Devboard"
-        select MODULE_CC9P9360
-        select BOARD_JSCC9P9360
-        help
-          Say Y here if you are using the Digi ConnectCore 9P 9360
-          on an JSCC9P9360 Development Board.
-
-endmenu
-
-endif
diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile
deleted file mode 100644
index 41efaf9ad50b..000000000000
--- a/arch/arm/mach-ns9xxx/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-obj-y := clock.o generic.o gpio.o irq.o
-
-obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o
-obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o
-
-obj-$(CONFIG_PROCESSOR_NS9360) += gpio-ns9360.o processor-ns9360.o time-ns9360.o
-
-obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o
-obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o
-
-# platform devices
-obj-$(CONFIG_NS9XXX_HAVE_SERIAL8250) += plat-serial8250.o
diff --git a/arch/arm/mach-ns9xxx/Makefile.boot b/arch/arm/mach-ns9xxx/Makefile.boot
deleted file mode 100644
index 54654919229b..000000000000
--- a/arch/arm/mach-ns9xxx/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
-zreladdr-y := 0x8000
-params_phys-y := 0x100
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
deleted file mode 100644
index e27687d53504..000000000000
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/board-a9m9750dev.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/irq.h>
-
-#include <asm/mach/map.h>
-#include <asm/gpio.h>
-
-#include <mach/board.h>
-#include <mach/processor-ns9360.h>
-#include <mach/regs-sys-ns9360.h>
-#include <mach/regs-mem.h>
-#include <mach/regs-bbu.h>
-#include <mach/regs-board-a9m9750dev.h>
-
-#include "board-a9m9750dev.h"
-
-static struct map_desc board_a9m9750dev_io_desc[] __initdata = {
-        { /* FPGA on CS0 */
-                .virtual = io_p2v(NS9XXX_CSxSTAT_PHYS(0)),
-                .pfn = __phys_to_pfn(NS9XXX_CSxSTAT_PHYS(0)),
-                .length = NS9XXX_CS0STAT_LENGTH,
-                .type = MT_DEVICE,
-        },
-};
-
-void __init board_a9m9750dev_map_io(void)
-{
-        iotable_init(board_a9m9750dev_io_desc,
-                     ARRAY_SIZE(board_a9m9750dev_io_desc));
-}
-
-static void a9m9750dev_fpga_ack_irq(struct irq_data *d)
-{
-        /* nothing */
-}
-
-static void a9m9750dev_fpga_mask_irq(struct irq_data *d)
-{
-        u8 ier;
-
-        ier = __raw_readb(FPGA_IER);
-
-        ier &= ~(1 << (d->irq - FPGA_IRQ(0)));
-
-        __raw_writeb(ier, FPGA_IER);
-}
-
-static void a9m9750dev_fpga_maskack_irq(struct irq_data *d)
-{
-        a9m9750dev_fpga_mask_irq(d);
-        a9m9750dev_fpga_ack_irq(d);
-}
-
-static void a9m9750dev_fpga_unmask_irq(struct irq_data *d)
-{
-        u8 ier;
-
-        ier = __raw_readb(FPGA_IER);
-
-        ier |= 1 << (d->irq - FPGA_IRQ(0));
-
-        __raw_writeb(ier, FPGA_IER);
-}
-
-static struct irq_chip a9m9750dev_fpga_chip = {
-        .irq_ack        = a9m9750dev_fpga_ack_irq,
-        .irq_mask       = a9m9750dev_fpga_mask_irq,
-        .irq_mask_ack   = a9m9750dev_fpga_maskack_irq,
-        .irq_unmask     = a9m9750dev_fpga_unmask_irq,
-};
-
-static void a9m9750dev_fpga_demux_handler(unsigned int irq,
-                struct irq_desc *desc)
-{
-        u8 stat = __raw_readb(FPGA_ISR);
-
-        desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
-
-        while (stat != 0) {
-                int irqno = fls(stat) - 1;
-
-                stat &= ~(1 << irqno);
-
-                generic_handle_irq(FPGA_IRQ(irqno));
-        }
-
-        desc->irq_data.chip->irq_unmask(&desc->irq_data);
-}
-
-void __init board_a9m9750dev_init_irq(void)
-{
-        u32 eic;
-        int i;
-
-        if (gpio_request(11, "board a9m9750dev extirq2") == 0)
-                ns9360_gpio_configure(11, 0, 1);
-        else
-                printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_NS9XXX_EXT2\n",
-                                __func__);
-
-        for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
-                irq_set_chip_and_handler(i, &a9m9750dev_fpga_chip,
-                                         handle_level_irq);
-                set_irq_flags(i, IRQF_VALID);
-        }
-
-        /* IRQ_NS9XXX_EXT2: level sensitive + active low */
-        eic = __raw_readl(SYS_EIC(2));
-        REGSET(eic, SYS_EIC, PLTY, AL);
-        REGSET(eic, SYS_EIC, LVEDG, LEVEL);
-        __raw_writel(eic, SYS_EIC(2));
-
-        irq_set_chained_handler(IRQ_NS9XXX_EXT2,
-                                a9m9750dev_fpga_demux_handler);
-}
-
-void __init board_a9m9750dev_init_machine(void)
-{
-        u32 reg;
-
-        /* setup static CS0: memory base ... */
-        reg = __raw_readl(SYS_SMCSSMB(0));
-        REGSETIM(reg, SYS_SMCSSMB, CSxB, NS9XXX_CSxSTAT_PHYS(0) >> 12);
-        __raw_writel(reg, SYS_SMCSSMB(0));
-
-        /* ... and mask */
-        reg = __raw_readl(SYS_SMCSSMM(0));
-        REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff);
-        REGSET(reg, SYS_SMCSSMM, CSEx, EN);
-        __raw_writel(reg, SYS_SMCSSMM(0));
-
-        /* setup static CS0: memory configuration */
-        reg = __raw_readl(MEM_SMC(0));
-        REGSET(reg, MEM_SMC, PSMC, OFF);
-        REGSET(reg, MEM_SMC, BSMC, OFF);
-        REGSET(reg, MEM_SMC, EW, OFF);
-        REGSET(reg, MEM_SMC, PB, 1);
-        REGSET(reg, MEM_SMC, PC, AL);
-        REGSET(reg, MEM_SMC, PM, DIS);
-        REGSET(reg, MEM_SMC, MW, 8);
-        __raw_writel(reg, MEM_SMC(0));
-
-        /* setup static CS0: timing */
-        __raw_writel(0x2, MEM_SMWED(0));
-        __raw_writel(0x2, MEM_SMOED(0));
-        __raw_writel(0x6, MEM_SMRD(0));
-        __raw_writel(0x6, MEM_SMWD(0));
-}
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.h b/arch/arm/mach-ns9xxx/board-a9m9750dev.h
deleted file mode 100644
index edc75abbc5dd..000000000000
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/board-a9m9750dev.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/init.h>
-
-void __init board_a9m9750dev_map_io(void);
-void __init board_a9m9750dev_init_machine(void);
-void __init board_a9m9750dev_init_irq(void);
diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.c b/arch/arm/mach-ns9xxx/board-jscc9p9360.c
deleted file mode 100644
index 4bd3eec04bfe..000000000000
--- a/arch/arm/mach-ns9xxx/board-jscc9p9360.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/board-jscc9p9360.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include "board-jscc9p9360.h"
-
-void __init board_jscc9p9360_init_machine(void)
-{
-        /* TODO: reserve GPIOs for push buttons, etc pp */
-}
-
diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.h b/arch/arm/mach-ns9xxx/board-jscc9p9360.h
deleted file mode 100644
index 1a81a074df45..000000000000
--- a/arch/arm/mach-ns9xxx/board-jscc9p9360.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/board-jscc9p9360.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/init.h>
-
-void __init board_jscc9p9360_init_machine(void);
diff --git a/arch/arm/mach-ns9xxx/clock.c b/arch/arm/mach-ns9xxx/clock.c
deleted file mode 100644
index cf81cbc57544..000000000000
--- a/arch/arm/mach-ns9xxx/clock.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/clock.c
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/err.h>
-#include <linux/module.h>
-#include <linux/list.h>
-#include <linux/clk.h>
-#include <linux/string.h>
-#include <linux/platform_device.h>
-#include <linux/semaphore.h>
-
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_SPINLOCK(clk_lock);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *ret = NULL, *retgen = NULL;
-        unsigned long flags;
-        int idno;
-
-        if (dev == NULL || dev->bus != &platform_bus_type)
-                idno = -1;
-        else
-                idno = to_platform_device(dev)->id;
-
-        spin_lock_irqsave(&clk_lock, flags);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0) {
-                        if (p->id == idno) {
-                                if (!try_module_get(p->owner))
-                                        continue;
-                                ret = p;
-                                break;
-                        } else if (p->id == -1)
-                                /* remember match with id == -1 in case there is
-                                 * no clock for idno */
-                                retgen = p;
-                }
-        }
-
-        if (!ret && retgen && try_module_get(retgen->owner))
-                ret = retgen;
-
-        if (ret)
-                ++ret->refcount;
-
-        spin_unlock_irqrestore(&clk_lock, flags);
-
-        return ret ? ret : ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-        --clk->refcount;
-}
-EXPORT_SYMBOL(clk_put);
-
-static int clk_enable_unlocked(struct clk *clk)
-{
-        int ret = 0;
-        if (clk->parent) {
-                ret = clk_enable_unlocked(clk->parent);
-                if (ret)
-                        return ret;
-        }
-
-        if (clk->usage++ == 0 && clk->endisable)
-                ret = clk->endisable(clk, 1);
-
-        return ret;
-}
-
-int clk_enable(struct clk *clk)
-{
-        int ret;
-        unsigned long flags;
-
-        spin_lock_irqsave(&clk_lock, flags);
-
-        ret = clk_enable_unlocked(clk);
-
-        spin_unlock_irqrestore(&clk_lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(clk_enable);
-
-static void clk_disable_unlocked(struct clk *clk)
-{
-        if (--clk->usage == 0 && clk->endisable)
-                clk->endisable(clk, 0);
-
-        if (clk->parent)
-                clk_disable_unlocked(clk->parent);
-}
-
-void clk_disable(struct clk *clk)
-{
-        unsigned long flags;
-
-        spin_lock_irqsave(&clk_lock, flags);
-
-        clk_disable_unlocked(clk);
-
-        spin_unlock_irqrestore(&clk_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-        if (clk->get_rate)
-                return clk->get_rate(clk);
-
-        if (clk->rate)
-                return clk->rate;
-
-        if (clk->parent)
-                return clk_get_rate(clk->parent);
-
-        return 0;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-int clk_register(struct clk *clk)
-{
-        unsigned long flags;
-
-        spin_lock_irqsave(&clk_lock, flags);
-
-        list_add(&clk->node, &clocks);
-
-        if (clk->parent)
-                ++clk->parent->refcount;
-
-        spin_unlock_irqrestore(&clk_lock, flags);
-
-        return 0;
-}
-
-int clk_unregister(struct clk *clk)
-{
-        int ret = 0;
-        unsigned long flags;
-
-        spin_lock_irqsave(&clk_lock, flags);
-
-        if (clk->usage || clk->refcount)
-                ret = -EBUSY;
-        else
-                list_del(&clk->node);
-
-        if (clk->parent)
-                --clk->parent->refcount;
-
-        spin_unlock_irqrestore(&clk_lock, flags);
-
-        return ret;
-}
-
-#if defined CONFIG_DEBUG_FS
-
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-
-static int clk_debugfs_show(struct seq_file *s, void *null)
-{
-        unsigned long flags;
-        struct clk *p;
-
-        spin_lock_irqsave(&clk_lock, flags);
-
-        list_for_each_entry(p, &clocks, node)
-                seq_printf(s, "%s.%d: usage=%lu refcount=%lu rate=%lu\n",
-                                p->name, p->id, p->usage, p->refcount,
-                                p->usage ? clk_get_rate(p) : 0);
-
-        spin_unlock_irqrestore(&clk_lock, flags);
-
-        return 0;
-}
-
-static int clk_debugfs_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, clk_debugfs_show, NULL);
-}
-
-static const struct file_operations clk_debugfs_operations = {
-        .open = clk_debugfs_open,
-        .read = seq_read,
-        .llseek = seq_lseek,
-        .release = single_release,
-};
-
-static int __init clk_debugfs_init(void)
-{
-        struct dentry *dentry;
-
-        dentry = debugfs_create_file("clk", S_IFREG | S_IRUGO, NULL, NULL,
-                        &clk_debugfs_operations);
-        return IS_ERR(dentry) ? PTR_ERR(dentry) : 0;
-}
-subsys_initcall(clk_debugfs_init);
-
-#endif /* if defined CONFIG_DEBUG_FS */
diff --git a/arch/arm/mach-ns9xxx/clock.h b/arch/arm/mach-ns9xxx/clock.h
deleted file mode 100644
index b86c30dd79eb..000000000000
--- a/arch/arm/mach-ns9xxx/clock.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/clock.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __NS9XXX_CLOCK_H
-#define __NS9XXX_CLOCK_H
-
-#include <linux/list.h>
-
-struct clk {
-        struct module *owner;
-        const char *name;
-        int id;
-
-        struct clk *parent;
-
-        unsigned long rate;
-        int (*endisable)(struct clk *, int enable);
-        unsigned long (*get_rate)(struct clk *);
-
-        struct list_head node;
-        unsigned long refcount;
-        unsigned long usage;
-};
-
-int clk_register(struct clk *clk);
-int clk_unregister(struct clk *clk);
-
-#endif /* ifndef __NS9XXX_CLOCK_H */
diff --git a/arch/arm/mach-ns9xxx/generic.c b/arch/arm/mach-ns9xxx/generic.c
deleted file mode 100644
index 1e0f467879cc..000000000000
--- a/arch/arm/mach-ns9xxx/generic.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/generic.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <asm/memory.h>
-
-#include "generic.h"
-
-void __init ns9xxx_init_machine(void)
-{
-}
diff --git a/arch/arm/mach-ns9xxx/generic.h b/arch/arm/mach-ns9xxx/generic.h
deleted file mode 100644
index 82493191aad6..000000000000
--- a/arch/arm/mach-ns9xxx/generic.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/generic.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/time.h>
-#include <asm/mach/time.h>
-#include <linux/init.h>
-
-void __init ns9xxx_init_irq(void);
-void __init ns9xxx_init_machine(void);
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.c b/arch/arm/mach-ns9xxx/gpio-ns9360.c
deleted file mode 100644
index 377330c1b250..000000000000
--- a/arch/arm/mach-ns9xxx/gpio-ns9360.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/gpio-ns9360.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/bug.h>
-#include <linux/errno.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-
-#include <mach/regs-bbu.h>
-#include <mach/processor-ns9360.h>
-
-#include "gpio-ns9360.h"
-
-static inline int ns9360_valid_gpio(unsigned gpio)
-{
-        return gpio <= 72;
-}
-
-static inline void __iomem *ns9360_gpio_get_gconfaddr(unsigned gpio)
-{
-        if (gpio < 56)
-                return BBU_GCONFb1(gpio / 8);
-        else
-                /*
-                 * this could be optimised away on
-                 * ns9750 only builds, but it isn't ...
-                 */
-                return BBU_GCONFb2((gpio - 56) / 8);
-}
-
-static inline void __iomem *ns9360_gpio_get_gctrladdr(unsigned gpio)
-{
-        if (gpio < 32)
-                return BBU_GCTRL1;
-        else if (gpio < 64)
-                return BBU_GCTRL2;
-        else
-                /* this could be optimised away on ns9750 only builds */
-                return BBU_GCTRL3;
-}
-
-static inline void __iomem *ns9360_gpio_get_gstataddr(unsigned gpio)
-{
-        if (gpio < 32)
-                return BBU_GSTAT1;
-        else if (gpio < 64)
-                return BBU_GSTAT2;
-        else
-                /* this could be optimised away on ns9750 only builds */
-                return BBU_GSTAT3;
-}
-
-/*
- * each gpio can serve for 4 different purposes [0..3].  These are called
- * "functions" and passed in the parameter func.  Functions 0-2 are always some
- * special things, function 3 is GPIO.  If func == 3 dir specifies input or
- * output, and with inv you can enable an inverter (independent of func).
- */
-int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func)
-{
-        void __iomem *conf = ns9360_gpio_get_gconfaddr(gpio);
-        u32 confval;
-
-        confval = __raw_readl(conf);
-        REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
-        REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
-        REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
-        __raw_writel(confval, conf);
-
-        return 0;
-}
-
-int ns9360_gpio_configure(unsigned gpio, int inv, int func)
-{
-        if (likely(ns9360_valid_gpio(gpio))) {
-                if (func == 3) {
-                        printk(KERN_WARNING "use gpio_direction_input "
-                                        "or gpio_direction_output\n");
-                        return -EINVAL;
-                } else
-                        return __ns9360_gpio_configure(gpio, 0, inv, func);
-        } else
-                return -EINVAL;
-}
-EXPORT_SYMBOL(ns9360_gpio_configure);
-
-int ns9360_gpio_get_value(unsigned gpio)
-{
-        void __iomem *stat = ns9360_gpio_get_gstataddr(gpio);
-        int ret;
-
-        ret = 1 & (__raw_readl(stat) >> (gpio & 31));
-
-        return ret;
-}
-
-void ns9360_gpio_set_value(unsigned gpio, int value)
-{
-        void __iomem *ctrl = ns9360_gpio_get_gctrladdr(gpio);
-        u32 ctrlval;
-
-        ctrlval = __raw_readl(ctrl);
-
-        if (value)
-                ctrlval |= 1 << (gpio & 31);
-        else
-                ctrlval &= ~(1 << (gpio & 31));
-
-        __raw_writel(ctrlval, ctrl);
-}
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.h b/arch/arm/mach-ns9xxx/gpio-ns9360.h
deleted file mode 100644
index 131cd1715caa..000000000000
--- a/arch/arm/mach-ns9xxx/gpio-ns9360.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/gpio-ns9360.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func);
-int ns9360_gpio_get_value(unsigned gpio);
-void ns9360_gpio_set_value(unsigned gpio, int value);
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c
deleted file mode 100644
index 5503ca09c4ae..000000000000
--- a/arch/arm/mach-ns9xxx/gpio.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/gpio.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/compiler.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/module.h>
-#include <linux/bitops.h>
-
-#include <mach/gpio.h>
-#include <mach/processor.h>
-#include <mach/processor-ns9360.h>
-#include <asm/bug.h>
-#include <asm/types.h>
-
-#include "gpio-ns9360.h"
-
-#if defined(CONFIG_PROCESSOR_NS9360)
-#define GPIO_MAX 72
-#elif defined(CONFIG_PROCESSOR_NS9750)
-#define GPIO_MAX 49
-#endif
-
-/* protects BBU_GCONFx and BBU_GCTRLx */
-static spinlock_t gpio_lock = __SPIN_LOCK_UNLOCKED(gpio_lock);
-
-/* only access gpiores with atomic ops */
-static DECLARE_BITMAP(gpiores, GPIO_MAX + 1);
-
-static inline int ns9xxx_valid_gpio(unsigned gpio)
-{
-#if defined(CONFIG_PROCESSOR_NS9360)
-        if (processor_is_ns9360())
-                return gpio <= 72;
-        else
-#endif
-#if defined(CONFIG_PROCESSOR_NS9750)
-        if (processor_is_ns9750())
-                return gpio <= 49;
-        else
-#endif
-        {
-                BUG();
-                return 0;
-        }
-}
-
-int gpio_request(unsigned gpio, const char *label)
-{
-        if (likely(ns9xxx_valid_gpio(gpio)))
-                return test_and_set_bit(gpio, gpiores) ? -EBUSY : 0;
-        else
-                return -EINVAL;
-}
-EXPORT_SYMBOL(gpio_request);
-
-void gpio_free(unsigned gpio)
-{
-        might_sleep();
-        clear_bit(gpio, gpiores);
-        return;
-}
-EXPORT_SYMBOL(gpio_free);
-
-int gpio_direction_input(unsigned gpio)
-{
-        if (likely(ns9xxx_valid_gpio(gpio))) {
-                int ret = -EINVAL;
-                unsigned long flags;
-
-                spin_lock_irqsave(&gpio_lock, flags);
-#if defined(CONFIG_PROCESSOR_NS9360)
-                if (processor_is_ns9360())
-                        ret = __ns9360_gpio_configure(gpio, 0, 0, 3);
-                else
-#endif
-                        BUG();
-
-                spin_unlock_irqrestore(&gpio_lock, flags);
-
-                return ret;
-
-        } else
-                return -EINVAL;
-}
-EXPORT_SYMBOL(gpio_direction_input);
-
-int gpio_direction_output(unsigned gpio, int value)
-{
-        if (likely(ns9xxx_valid_gpio(gpio))) {
-                int ret = -EINVAL;
-                unsigned long flags;
-
-                gpio_set_value(gpio, value);
-
-                spin_lock_irqsave(&gpio_lock, flags);
-#if defined(CONFIG_PROCESSOR_NS9360)
-                if (processor_is_ns9360())
-                        ret = __ns9360_gpio_configure(gpio, 1, 0, 3);
-                else
-#endif
-                        BUG();
-
-                spin_unlock_irqrestore(&gpio_lock, flags);
-
-                return ret;
-        } else
-                return -EINVAL;
-}
-EXPORT_SYMBOL(gpio_direction_output);
-
-int gpio_get_value(unsigned gpio)
-{
-#if defined(CONFIG_PROCESSOR_NS9360)
-        if (processor_is_ns9360())
-                return ns9360_gpio_get_value(gpio);
-        else
-#endif
-        {
-                BUG();
-                return -EINVAL;
-        }
-}
-EXPORT_SYMBOL(gpio_get_value);
-
-void gpio_set_value(unsigned gpio, int value)
-{
-        unsigned long flags;
-        spin_lock_irqsave(&gpio_lock, flags);
-#if defined(CONFIG_PROCESSOR_NS9360)
-        if (processor_is_ns9360())
-                ns9360_gpio_set_value(gpio, value);
-        else
-#endif
-                BUG();
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-EXPORT_SYMBOL(gpio_set_value);
diff --git a/arch/arm/mach-ns9xxx/include/mach/board.h b/arch/arm/mach-ns9xxx/include/mach/board.h
deleted file mode 100644
index 19ca6de46a45..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/board.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/board.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_BOARD_H
-#define __ASM_ARCH_BOARD_H
-
-#include <asm/mach-types.h>
-
-#define board_is_a9m9750dev()   (0                      \
-                || machine_is_cc9p9750dev()             \
-                )
-
-#define board_is_a9mvali()      (0                      \
-                || machine_is_cc9p9750val()             \
-                )
-
-#define board_is_jscc9p9210()   (0                      \
-                || machine_is_cc9p9210js()              \
-                )
-
-#define board_is_jscc9p9215()   (0                      \
-                || machine_is_cc9p9215js()              \
-                )
-
-#define board_is_jscc9p9360()   (0                      \
-                || machine_is_cc9p9360js()              \
-                )
-
-#define board_is_uncbas()       (0                      \
-                || machine_is_cc7ucamry()               \
-                )
-
-#endif /* ifndef __ASM_ARCH_BOARD_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
deleted file mode 100644
index 5a2acbdc3d67..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/debug-macro.S
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <mach/hardware.h>
-#include <asm/memory.h>
-
-#include <mach/regs-board-a9m9750dev.h>
-
-                .macro  addruart, rp, rv
-                ldr     \rp, =NS9XXX_CSxSTAT_PHYS(0)
-                ldr     \rv, =io_p2v(NS9XXX_CSxSTAT_PHYS(0))
-                .endm
-
-#define UART_SHIFT      2
-#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-ns9xxx/include/mach/entry-macro.S b/arch/arm/mach-ns9xxx/include/mach/entry-macro.S
deleted file mode 100644
index 71ca0319b547..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/entry-macro.S
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <mach/hardware.h>
-#include <mach/regs-sys-common.h>
-
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =SYS_ISRADDR
-                .endm
-
-                .macro  arch_ret_to_user, tmp1, tmp2
-                .endm
-
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqstat, [\base, #(SYS_ISA - SYS_ISRADDR)]
-                cmp     \irqstat, #0
-                ldrne   \irqnr, [\base]
-                .endm
-
-                .macro  disable_fiq
-                .endm
diff --git a/arch/arm/mach-ns9xxx/include/mach/gpio.h b/arch/arm/mach-ns9xxx/include/mach/gpio.h
deleted file mode 100644
index 5eb349032579..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/gpio.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/gpio.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H
-
-#include <asm/errno.h>
-
-int gpio_request(unsigned gpio, const char *label);
-
-void gpio_free(unsigned gpio);
-
-int ns9xxx_gpio_configure(unsigned gpio, int inv, int func);
-
-int gpio_direction_input(unsigned gpio);
-
-int gpio_direction_output(unsigned gpio, int value);
-
-int gpio_get_value(unsigned gpio);
-
-void gpio_set_value(unsigned gpio, int value);
-
-/*
- * ns9xxx can use gpio pins to trigger an irq, but it's not generic
- * enough to be supported by the gpio_to_irq/irq_to_gpio interface
- */
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return -EINVAL;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
-        return -EINVAL;
-}
-
-/* get the cansleep() stubs */
-#include <asm-generic/gpio.h>
-
-#endif /* ifndef __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/hardware.h b/arch/arm/mach-ns9xxx/include/mach/hardware.h
deleted file mode 100644
index 76631128e11c..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/hardware.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/hardware.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-/*
- * NetSilicon NS9xxx internal mapping:
- *
- * physical                <--> virtual
- * 0x90000000 - 0x906fffff <--> 0xf9000000 - 0xf96fffff
- * 0xa0100000 - 0xa0afffff <--> 0xfa100000 - 0xfaafffff
- */
-#define io_p2v(x)       (0xf0000000 \
-                         + (((x) & 0xf0000000) >> 4) \
-                         + ((x) & 0x00ffffff))
-
-#define io_v2p(x)       ((((x) & 0x0f000000) << 4) \
-                         + ((x) & 0x00ffffff))
-
-#define __REGSHIFT(mask)        ((mask) & (-(mask)))
-
-#define __REGBIT(bit)           ((u32)1 << (bit))
-#define __REGBITS(hbit, lbit)   ((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit))
-#define __REGVAL(mask, value)   (((value) * __REGSHIFT(mask)) & (mask))
-
-#ifndef __ASSEMBLY__
-
-#  define __REG(x)      ((void __iomem __force *)io_p2v((x)))
-#  define __REG2(x, y)  ((void __iomem __force *)(io_p2v((x)) + 4 * (y)))
-
-#  define __REGSET(var, field, value)                                   \
-        ((var) = (((var) & ~((field) & ~(value))) | (value)))
-
-#  define REGSET(var, reg, field, value)                                \
-        __REGSET(var, reg ## _ ## field, reg ## _ ## field ## _ ## value)
-
-#  define REGSET_IDX(var, reg, field, idx, value)                       \
-        __REGSET(var, reg ## _ ## field((idx)), reg ## _ ## field ## _ ## value((idx)))
-
-#  define REGSETIM(var, reg, field, value)                              \
-        __REGSET(var, reg ## _ ## field, __REGVAL(reg ## _ ## field, (value)))
-
-#  define REGSETIM_IDX(var, reg, field, idx, value)                     \
-        __REGSET(var, reg ## _ ## field((idx)), __REGVAL(reg ## _ ## field((idx)), (value)))
-
-#  define __REGGET(var, field)                                          \
-        (((var) & (field)))
-
-#  define REGGET(var, reg, field)                                       \
-         __REGGET(var, reg ## _ ## field)
-
-#  define REGGET_IDX(var, reg, field, idx)                              \
-         __REGGET(var, reg ## _ ## field((idx)))
-
-#  define REGGETIM(var, reg, field)                                     \
-         __REGGET(var, reg ## _ ## field) / __REGSHIFT(reg ## _ ## field)
-
-#  define REGGETIM_IDX(var, reg, field, idx)                            \
-         __REGGET(var, reg ## _ ## field((idx))) /                      \
-         __REGSHIFT(reg ## _ ## field((idx)))
-
-#else
-
-#  define __REG(x)      io_p2v(x)
-#  define __REG2(x, y)  io_p2v((x) + 4 * (y))
-
-#endif
-
-#endif /* ifndef __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/io.h b/arch/arm/mach-ns9xxx/include/mach/io.h
deleted file mode 100644
index f08451d2e1bc..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/io.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT  0xffffffff /* XXX */
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-#define __mem_isa(a)    (IO_BASE + (a))
-
-#endif /* ifndef __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/irqs.h b/arch/arm/mach-ns9xxx/include/mach/irqs.h
deleted file mode 100644
index 13483949e210..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/irqs.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/irqs.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H
-
-/* NetSilicon 9360 */
-#define IRQ_NS9XXX_WATCHDOG     0
-#define IRQ_NS9XXX_AHBBUSERR    1
-#define IRQ_NS9360_BBUSAGG      2
-/* irq 3 is reserved for NS9360 */
-#define IRQ_NS9XXX_ETHRX        4
-#define IRQ_NS9XXX_ETHTX        5
-#define IRQ_NS9XXX_ETHPHY       6
-#define IRQ_NS9360_LCD          7
-#define IRQ_NS9360_SERBRX       8
-#define IRQ_NS9360_SERBTX       9
-#define IRQ_NS9360_SERARX       10
-#define IRQ_NS9360_SERATX       11
-#define IRQ_NS9360_SERCRX       12
-#define IRQ_NS9360_SERCTX       13
-#define IRQ_NS9360_I2C          14
-#define IRQ_NS9360_BBUSDMA      15
-#define IRQ_NS9360_TIMER0       16
-#define IRQ_NS9360_TIMER1       17
-#define IRQ_NS9360_TIMER2       18
-#define IRQ_NS9360_TIMER3       19
-#define IRQ_NS9360_TIMER4       20
-#define IRQ_NS9360_TIMER5       21
-#define IRQ_NS9360_TIMER6       22
-#define IRQ_NS9360_TIMER7       23
-#define IRQ_NS9360_RTC          24
-#define IRQ_NS9360_USBHOST      25
-#define IRQ_NS9360_USBDEVICE    26
-#define IRQ_NS9360_IEEE1284     27
-#define IRQ_NS9XXX_EXT0         28
-#define IRQ_NS9XXX_EXT1         29
-#define IRQ_NS9XXX_EXT2         30
-#define IRQ_NS9XXX_EXT3         31
-
-#define BBUS_IRQ(irq)   (32 + irq)
-
-#define IRQ_BBUS_DMA            BBUS_IRQ(0)
-#define IRQ_BBUS_SERBRX         BBUS_IRQ(2)
-#define IRQ_BBUS_SERBTX         BBUS_IRQ(3)
-#define IRQ_BBUS_SERARX         BBUS_IRQ(4)
-#define IRQ_BBUS_SERATX         BBUS_IRQ(5)
-#define IRQ_BBUS_SERCRX         BBUS_IRQ(6)
-#define IRQ_BBUS_SERCTX         BBUS_IRQ(7)
-#define IRQ_BBUS_SERDRX         BBUS_IRQ(8)
-#define IRQ_BBUS_SERDTX         BBUS_IRQ(9)
-#define IRQ_BBUS_I2C            BBUS_IRQ(10)
-#define IRQ_BBUS_1284           BBUS_IRQ(11)
-#define IRQ_BBUS_UTIL           BBUS_IRQ(12)
-#define IRQ_BBUS_RTC            BBUS_IRQ(13)
-#define IRQ_BBUS_USBHST         BBUS_IRQ(14)
-#define IRQ_BBUS_USBDEV         BBUS_IRQ(15)
-#define IRQ_BBUS_AHBDMA1        BBUS_IRQ(24)
-#define IRQ_BBUS_AHBDMA2        BBUS_IRQ(25)
-
-/*
- * these Interrupts are specific for the a9m9750dev board.
- * They are generated by an FPGA that interrupts the CPU on
- * IRQ_NS9360_EXT2
- */
-#define FPGA_IRQ(irq)   (64 + irq)
-
-#define IRQ_FPGA_UARTA          FPGA_IRQ(0)
-#define IRQ_FPGA_UARTB          FPGA_IRQ(1)
-#define IRQ_FPGA_UARTC          FPGA_IRQ(2)
-#define IRQ_FPGA_UARTD          FPGA_IRQ(3)
-#define IRQ_FPGA_TOUCH          FPGA_IRQ(4)
-#define IRQ_FPGA_CF             FPGA_IRQ(5)
-#define IRQ_FPGA_CAN0           FPGA_IRQ(6)
-#define IRQ_FPGA_CAN1           FPGA_IRQ(7)
-
-#define NR_IRQS 72
-
-#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/memory.h b/arch/arm/mach-ns9xxx/include/mach/memory.h
deleted file mode 100644
index 5c65aee6e7a9..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/memory.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/memory.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/* x in [0..3] */
-#define NS9XXX_CSxSTAT_PHYS(x)  UL(((x) + 4) << 28)
-
-#define NS9XXX_CS0STAT_LENGTH   UL(0x1000)
-#define NS9XXX_CS1STAT_LENGTH   UL(0x1000)
-#define NS9XXX_CS2STAT_LENGTH   UL(0x1000)
-#define NS9XXX_CS3STAT_LENGTH   UL(0x1000)
-
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-
-#endif
diff --git a/arch/arm/mach-ns9xxx/include/mach/module.h b/arch/arm/mach-ns9xxx/include/mach/module.h
deleted file mode 100644
index 628e9752589b..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/module.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/module.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_MODULE_H
-#define __ASM_ARCH_MODULE_H
-
-#include <asm/mach-types.h>
-
-#define module_is_cc7ucamry()   (0                      \
-                || machine_is_cc7ucamry()               \
-                )
-
-#define module_is_cc9c()        (0                      \
-                )
-
-#define module_is_cc9p9210()    (0                      \
-                || machine_is_cc9p9210()                \
-                || machine_is_cc9p9210js()              \
-                )
-
-#define module_is_cc9p9215()    (0                      \
-                || machine_is_cc9p9215()                \
-                || machine_is_cc9p9215js()              \
-                )
-
-#define module_is_cc9p9360()    (0                      \
-                || machine_is_cc9p9360dev()             \
-                || machine_is_cc9p9360js()              \
-                )
-
-#define module_is_cc9p9750()    (0                      \
-                || machine_is_a9m9750()                 \
-                || machine_is_cc9p9750js()              \
-                || machine_is_cc9p9750val()             \
-                )
-
-#define module_is_ccw9c()       (0                      \
-                )
-
-#define module_is_inc20otter()  (0                      \
-                || machine_is_inc20otter()              \
-                )
-
-#define module_is_otter()       (0                      \
-                || machine_is_otter()                   \
-                )
-
-#endif /* ifndef __ASM_ARCH_MODULE_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h b/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
deleted file mode 100644
index f41deda5129e..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_PROCESSORNS9360_H
-#define __ASM_ARCH_PROCESSORNS9360_H
-
-#include <linux/init.h>
-
-void ns9360_reset(char mode);
-
-unsigned long ns9360_systemclock(void) __attribute__((const));
-
-static inline unsigned long ns9360_cpuclock(void) __attribute__((const));
-static inline unsigned long ns9360_cpuclock(void)
-{
-        return ns9360_systemclock() / 2;
-}
-
-void __init ns9360_map_io(void);
-
-extern struct sys_timer ns9360_timer;
-
-int ns9360_gpio_configure(unsigned gpio, int inv, int func);
-
-#endif /* ifndef __ASM_ARCH_PROCESSORNS9360_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/processor.h b/arch/arm/mach-ns9xxx/include/mach/processor.h
deleted file mode 100644
index 9f77f746a386..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/processor.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/processor.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_PROCESSOR_H
-#define __ASM_ARCH_PROCESSOR_H
-
-#include <mach/module.h>
-
-#define processor_is_ns9210()   (0                      \
-                || module_is_cc7ucamry()                \
-                || module_is_cc9p9210()                 \
-                || module_is_inc20otter()               \
-                || module_is_otter()                    \
-                )
-
-#define processor_is_ns9215()   (0                      \
-                || module_is_cc9p9215()                 \
-                )
-
-#define processor_is_ns9360()   (0                      \
-                || module_is_cc9p9360()                 \
-                || module_is_cc9c()                     \
-                || module_is_ccw9c()                    \
-                )
-
-#define processor_is_ns9750()   (0                      \
-                || module_is_cc9p9750()                 \
-                )
-
-#define processor_is_ns921x()   (0                      \
-                || processor_is_ns9210()                \
-                || processor_is_ns9215()                \
-                )
-
-#endif /* ifndef __ASM_ARCH_PROCESSOR_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h b/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
deleted file mode 100644
index af227c058fb9..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_REGSBBU_H
-#define __ASM_ARCH_REGSBBU_H
-
-#include <mach/hardware.h>
-
-/* BBus Utility */
-
-/* GPIO Configuration Registers block 1 */
-/* NOTE: the HRM starts counting at 1 for the GPIO registers, here the start is
- * at 0 for each block.  That is, BBU_GCONFb1(0) is GPIO Configuration Register
- * #1, BBU_GCONFb2(0) is GPIO Configuration Register #8. */
-#define BBU_GCONFb1(x)  __REG2(0x90600010, (x))
-#define BBU_GCONFb2(x)  __REG2(0x90600100, (x))
-
-#define BBU_GCONFx_DIR(m)       __REGBIT(3 + (((m) & 7) << 2))
-#define BBU_GCONFx_DIR_INPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 0)
-#define BBU_GCONFx_DIR_OUTPUT(m)        __REGVAL(BBU_GCONFx_DIR(m), 1)
-#define BBU_GCONFx_INV(m)       __REGBIT(2 + (((m) & 7) << 2))
-#define BBU_GCONFx_INV_NO(m)            __REGVAL(BBU_GCONFx_INV(m), 0)
-#define BBU_GCONFx_INV_YES(m)           __REGVAL(BBU_GCONFx_INV(m), 1)
-#define BBU_GCONFx_FUNC(m)      __REGBITS(1 + (((m) & 7) << 2), ((m) & 7) << 2)
-#define BBU_GCONFx_FUNC_0(m)            __REGVAL(BBU_GCONFx_FUNC(m), 0)
-#define BBU_GCONFx_FUNC_1(m)            __REGVAL(BBU_GCONFx_FUNC(m), 1)
-#define BBU_GCONFx_FUNC_2(m)            __REGVAL(BBU_GCONFx_FUNC(m), 2)
-#define BBU_GCONFx_FUNC_3(m)            __REGVAL(BBU_GCONFx_FUNC(m), 3)
-
-#define BBU_GCTRL1      __REG(0x90600030)
-#define BBU_GCTRL2      __REG(0x90600034)
-#define BBU_GCTRL3      __REG(0x90600120)
-
-#define BBU_GSTAT1      __REG(0x90600040)
-#define BBU_GSTAT2      __REG(0x90600044)
-#define BBU_GSTAT3      __REG(0x90600130)
-
-#endif /* ifndef __ASM_ARCH_REGSBBU_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h b/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
deleted file mode 100644
index cd1593693f56..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_REGSBOARDA9M9750_H
-#define __ASM_ARCH_REGSBOARDA9M9750_H
-
-#include <mach/hardware.h>
-
-#define FPGA_UARTA_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0))
-#define FPGA_UARTB_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08)
-#define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10)
-#define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18)
-
-#define FPGA_IER        __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
-#define FPGA_ISR        __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
-
-#endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-mem.h b/arch/arm/mach-ns9xxx/include/mach/regs-mem.h
deleted file mode 100644
index f1625bf8cdce..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-mem.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-mem.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_REGSMEM_H
-#define __ASM_ARCH_REGSMEM_H
-
-#include <mach/hardware.h>
-
-/* Memory Module */
-
-/* Control register */
-#define MEM_CTRL        __REG(0xa0700000)
-
-/* Status register */
-#define MEM_STAT        __REG(0xa0700004)
-
-/* Configuration register */
-#define MEM_CONF        __REG(0xa0700008)
-
-/* Dynamic Memory Control register */
-#define MEM_DMCTRL      __REG(0xa0700020)
-
-/* Dynamic Memory Refresh Timer */
-#define MEM_DMRT        __REG(0xa0700024)
-
-/* Dynamic Memory Read Configuration register */
-#define MEM_DMRC        __REG(0xa0700028)
-
-/* Dynamic Memory Precharge Command Period (tRP) */
-#define MEM_DMPCP       __REG(0xa0700030)
-
-/* Dynamic Memory Active to Precharge Command Period (tRAS) */
-#define MEM_DMAPCP      __REG(0xa0700034)
-
-/* Dynamic Memory Self-Refresh Exit Time (tSREX) */
-#define MEM_DMSRET      __REG(0xa0700038)
-
-/* Dynamic Memory Last Data Out to Active Time (tAPR) */
-#define MEM_DMLDOAT     __REG(0xa070003c)
-
-/* Dynamic Memory Data-in to Active Command Time (tDAL or TAPW) */
-#define MEM_DMDIACT     __REG(0xa0700040)
-
-/* Dynamic Memory Write Recovery Time (tWR, tDPL, tRWL, tRDL) */
-#define MEM_DMWRT       __REG(0xa0700044)
-
-/* Dynamic Memory Active to Active Command Period (tRC) */
-#define MEM_DMAACP      __REG(0xa0700048)
-
-/* Dynamic Memory Auto Refresh Period, and Auto Refresh to Active Command Period (tRFC) */
-#define MEM_DMARP       __REG(0xa070004c)
-
-/* Dynamic Memory Exit Self-Refresh to Active Command (tXSR) */
-#define MEM_DMESRAC     __REG(0xa0700050)
-
-/* Dynamic Memory Active Bank A to Active B Time (tRRD) */
-#define MEM_DMABAABT    __REG(0xa0700054)
-
-/* Dynamic Memory Load Mode register to Active Command Time (tMRD) */
-#define MEM_DMLMACT     __REG(0xa0700058)
-
-/* Static Memory Extended Wait */
-#define MEM_SMEW        __REG(0xa0700080)
-
-/* Dynamic Memory Configuration Register x */
-#define MEM_DMCONF(x)   __REG2(0xa0700100, (x) << 3)
-
-/* Dynamic Memory RAS and CAS Delay x */
-#define MEM_DMRCD(x)    __REG2(0xa0700104, (x) << 3)
-
-/* Static Memory Configuration Register x */
-#define MEM_SMC(x)      __REG2(0xa0700200, (x) << 3)
-
-/* Static Memory Configuration Register x: Write protect */
-#define MEM_SMC_PSMC            __REGBIT(20)
-#define MEM_SMC_PSMC_OFF                __REGVAL(MEM_SMC_PSMC, 0)
-#define MEM_SMC_PSMC_ON                 __REGVAL(MEM_SMC_PSMC, 1)
-
-/* Static Memory Configuration Register x: Buffer enable */
-#define MEM_SMC_BSMC            __REGBIT(19)
-#define MEM_SMC_BSMC_OFF                __REGVAL(MEM_SMC_BSMC, 0)
-#define MEM_SMC_BSMC_ON                 __REGVAL(MEM_SMC_BSMC, 1)
-
-/* Static Memory Configuration Register x: Extended Wait */
-#define MEM_SMC_EW              __REGBIT(8)
-#define MEM_SMC_EW_OFF                  __REGVAL(MEM_SMC_EW, 0)
-#define MEM_SMC_EW_ON                   __REGVAL(MEM_SMC_EW, 1)
-
-/* Static Memory Configuration Register x: Byte lane state */
-#define MEM_SMC_PB              __REGBIT(7)
-#define MEM_SMC_PB_0                    __REGVAL(MEM_SMC_PB, 0)
-#define MEM_SMC_PB_1                    __REGVAL(MEM_SMC_PB, 1)
-
-/* Static Memory Configuration Register x: Chip select polarity */
-#define MEM_SMC_PC              __REGBIT(6)
-#define MEM_SMC_PC_AL                   __REGVAL(MEM_SMC_PC, 0)
-#define MEM_SMC_PC_AH                   __REGVAL(MEM_SMC_PC, 1)
-
-/* static memory configuration register x: page mode*/
-#define MEM_SMC_PM              __REGBIT(3)
-#define MEM_SMC_PM_DIS                  __REGVAL(MEM_SMC_PM, 0)
-#define MEM_SMC_PM_ASYNC                __REGVAL(MEM_SMC_PM, 1)
-
-/* static memory configuration register x: Memory width */
-#define MEM_SMC_MW              __REGBITS(1, 0)
-#define MEM_SMC_MW_8                    __REGVAL(MEM_SMC_MW, 0)
-#define MEM_SMC_MW_16                   __REGVAL(MEM_SMC_MW, 1)
-#define MEM_SMC_MW_32                   __REGVAL(MEM_SMC_MW, 2)
-
-/* Static Memory Write Enable Delay x */
-#define MEM_SMWED(x)    __REG2(0xa0700204, (x) << 3)
-
-/* Static Memory Output Enable Delay x */
-#define MEM_SMOED(x)    __REG2(0xa0700208, (x) << 3)
-
-/* Static Memory Read Delay x */
-#define MEM_SMRD(x)     __REG2(0xa070020c, (x) << 3)
-
-/* Static Memory Page Mode Read Delay 0 */
-#define MEM_SMPMRD(x)   __REG2(0xa0700210, (x) << 3)
-
-/* Static Memory Write Delay */
-#define MEM_SMWD(x)     __REG2(0xa0700214, (x) << 3)
-
-/* Static Memory Turn Round Delay x */
-#define MEM_SWT(x)      __REG2(0xa0700218, (x) << 3)
-
-#endif /* ifndef __ASM_ARCH_REGSMEM_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h b/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
deleted file mode 100644
index 14f91dfd5736..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_REGSSYSCOMMON_H
-#define __ASM_ARCH_REGSSYSCOMMON_H
-#include <mach/hardware.h>
-
-/* Interrupt Vector Address Register Level x */
-#define SYS_IVA(x)      __REG2(0xa09000c4, (x))
-
-/* Interrupt Configuration registers */
-#define SYS_IC(x)       __REG2(0xa0900144, (x))
-
-/* ISRADDR */
-#define SYS_ISRADDR     __REG(0xa0900164)
-
-/* Interrupt Status Active */
-#define SYS_ISA         __REG(0xa0900168)
-
-/* Interrupt Status Raw */
-#define SYS_ISR         __REG(0xa090016c)
-
-#endif /* ifndef __ASM_ARCH_REGSSYSCOMMON_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h b/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
deleted file mode 100644
index 8ff254d9901c..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_REGSSYSNS9360_H
-#define __ASM_ARCH_REGSSYSNS9360_H
-
-#include <mach/hardware.h>
-
-/* System Control Module */
-
-/* AHB Arbiter Gen Configuration */
-#define SYS_AHBAGENCONF __REG(0xa0900000)
-
-/* BRC */
-#define SYS_BRC(x)      __REG2(0xa0900004, (x))
-
-/* Timer x Reload Count register */
-#define SYS_TRC(x)      __REG2(0xa0900044, (x))
-
-/* Timer x Read register */
-#define SYS_TR(x)       __REG2(0xa0900084, (x))
-
-/* Timer Interrupt Status register */
-#define SYS_TIS         __REG(0xa0900170)
-
-/* PLL Configuration register */
-#define SYS_PLL         __REG(0xa0900188)
-
-/* PLL FS status */
-#define SYS_PLL_FS              __REGBITS(24, 23)
-
-/* PLL ND status */
-#define SYS_PLL_ND              __REGBITS(20, 16)
-
-/* PLL Configuration register: PLL SW change */
-#define SYS_PLL_SWC             __REGBIT(15)
-#define SYS_PLL_SWC_NO                  __REGVAL(SYS_PLL_SWC, 0)
-#define SYS_PLL_SWC_YES                 __REGVAL(SYS_PLL_SWC, 1)
-
-/* Timer x Control register */
-#define SYS_TC(x)       __REG2(0xa0900190, (x))
-
-/* Timer x Control register: Timer enable */
-#define SYS_TCx_TEN             __REGBIT(15)
-#define SYS_TCx_TEN_DIS                 __REGVAL(SYS_TCx_TEN, 0)
-#define SYS_TCx_TEN_EN                  __REGVAL(SYS_TCx_TEN, 1)
-
-/* Timer x Control register: CPU debug mode */
-#define SYS_TCx_TDBG            __REGBIT(10)
-#define SYS_TCx_TDBG_CONT               __REGVAL(SYS_TCx_TDBG, 0)
-#define SYS_TCx_TDBG_STOP               __REGVAL(SYS_TCx_TDBG, 1)
-
-/* Timer x Control register: Interrupt clear */
-#define SYS_TCx_INTC            __REGBIT(9)
-#define SYS_TCx_INTC_UNSET              __REGVAL(SYS_TCx_INTC, 0)
-#define SYS_TCx_INTC_SET                __REGVAL(SYS_TCx_INTC, 1)
-
-/* Timer x Control register: Timer clock select */
-#define SYS_TCx_TLCS            __REGBITS(8, 6)
-#define SYS_TCx_TLCS_CPU                __REGVAL(SYS_TCx_TLCS, 0)       /* CPU clock */
-#define SYS_TCx_TLCS_DIV2               __REGVAL(SYS_TCx_TLCS, 1)       /* CPU clock / 2 */
-#define SYS_TCx_TLCS_DIV4               __REGVAL(SYS_TCx_TLCS, 2)       /* CPU clock / 4 */
-#define SYS_TCx_TLCS_DIV8               __REGVAL(SYS_TCx_TLCS, 3)       /* CPU clock / 8 */
-#define SYS_TCx_TLCS_DIV16              __REGVAL(SYS_TCx_TLCS, 4)       /* CPU clock / 16 */
-#define SYS_TCx_TLCS_DIV32              __REGVAL(SYS_TCx_TLCS, 5)       /* CPU clock / 32 */
-#define SYS_TCx_TLCS_DIV64              __REGVAL(SYS_TCx_TLCS, 6)       /* CPU clock / 64 */
-#define SYS_TCx_TLCS_EXT                __REGVAL(SYS_TCx_TLCS, 7)
-
-/* Timer x Control register: Timer mode */
-#define SYS_TCx_TM              __REGBITS(5, 4)
-#define SYS_TCx_TM_IEE                  __REGVAL(SYS_TCx_TM, 0)         /* Internal timer or external event */
-#define SYS_TCx_TM_ELL                  __REGVAL(SYS_TCx_TM, 1)         /* External low-level, gated timer */
-#define SYS_TCx_TM_EHL                  __REGVAL(SYS_TCx_TM, 2)         /* External high-level, gated timer */
-#define SYS_TCx_TM_CONCAT               __REGVAL(SYS_TCx_TM, 3)         /* Concatenate the lower timer. */
-
-/* Timer x Control register: Interrupt select */
-#define SYS_TCx_INTS            __REGBIT(3)
-#define SYS_TCx_INTS_DIS                __REGVAL(SYS_TCx_INTS, 0)
-#define SYS_TCx_INTS_EN                 __REGVAL(SYS_TCx_INTS, 1)
-
-/* Timer x Control register: Up/down select */
-#define SYS_TCx_UDS             __REGBIT(2)
-#define SYS_TCx_UDS_UP                  __REGVAL(SYS_TCx_UDS, 0)
-#define SYS_TCx_UDS_DOWN                __REGVAL(SYS_TCx_UDS, 1)
-
-/* Timer x Control register: 32- or 16-bit timer */
-#define SYS_TCx_TSZ             __REGBIT(1)
-#define SYS_TCx_TSZ_16                  __REGVAL(SYS_TCx_TSZ, 0)
-#define SYS_TCx_TSZ_32                  __REGVAL(SYS_TCx_TSZ, 1)
-
-/* Timer x Control register: Reload enable */
-#define SYS_TCx_REN             __REGBIT(0)
-#define SYS_TCx_REN_DIS                 __REGVAL(SYS_TCx_REN, 0)
-#define SYS_TCx_REN_EN                  __REGVAL(SYS_TCx_REN, 1)
-
-/* System Memory Chip Select x Dynamic Memory Base */
-#define SYS_SMCSDMB(x)  __REG2(0xa09001d0, (x) << 1)
-
-/* System Memory Chip Select x Dynamic Memory Mask */
-#define SYS_SMCSDMM(x)  __REG2(0xa09001d4, (x) << 1)
-
-/* System Memory Chip Select x Static Memory Base */
-#define SYS_SMCSSMB(x)  __REG2(0xa09001f0, (x) << 1)
-
-/* System Memory Chip Select x Static Memory Base: Chip select x base */
-#define SYS_SMCSSMB_CSxB        __REGBITS(31, 12)
-
-/* System Memory Chip Select x Static Memory Mask */
-#define SYS_SMCSSMM(x)  __REG2(0xa09001f4, (x) << 1)
-
-/* System Memory Chip Select x Static Memory Mask: Chip select x mask */
-#define SYS_SMCSSMM_CSxM        __REGBITS(31, 12)
-
-/* System Memory Chip Select x Static Memory Mask: Chip select x enable */
-#define SYS_SMCSSMM_CSEx        __REGBIT(0)
-#define SYS_SMCSSMM_CSEx_DIS            __REGVAL(SYS_SMCSSMM_CSEx, 0)
-#define SYS_SMCSSMM_CSEx_EN             __REGVAL(SYS_SMCSSMM_CSEx, 1)
-
-/* General purpose, user-defined ID register */
-#define SYS_GENID       __REG(0xa0900210)
-
-/* External Interrupt x Control register */
-#define SYS_EIC(x)      __REG2(0xa0900214, (x))
-
-/* External Interrupt x Control register: Status */
-#define SYS_EIC_STS             __REGBIT(3)
-
-/* External Interrupt x Control register: Clear */
-#define SYS_EIC_CLR             __REGBIT(2)
-
-/* External Interrupt x Control register: Polarity */
-#define SYS_EIC_PLTY            __REGBIT(1)
-#define SYS_EIC_PLTY_AH                 __REGVAL(SYS_EIC_PLTY, 0)
-#define SYS_EIC_PLTY_AL                 __REGVAL(SYS_EIC_PLTY, 1)
-
-/* External Interrupt x Control register: Level edge */
-#define SYS_EIC_LVEDG           __REGBIT(0)
-#define SYS_EIC_LVEDG_LEVEL             __REGVAL(SYS_EIC_LVEDG, 0)
-#define SYS_EIC_LVEDG_EDGE              __REGVAL(SYS_EIC_LVEDG, 1)
-
-#endif /* ifndef __ASM_ARCH_REGSSYSNS9360_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/system.h b/arch/arm/mach-ns9xxx/include/mach/system.h
deleted file mode 100644
index 1561588ca364..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/system.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/system.h
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <asm/proc-fns.h>
-#include <mach/processor.h>
-#include <mach/processor-ns9360.h>
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-#ifdef CONFIG_PROCESSOR_NS9360
-        if (processor_is_ns9360())
-                ns9360_reset(mode);
-        else
-#endif
-                BUG();
-
-        BUG();
-}
-
-#endif /* ifndef __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/timex.h b/arch/arm/mach-ns9xxx/include/mach/timex.h
deleted file mode 100644
index 734a8d8bd578..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/timex.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/timex.h
- *
- * Copyright (C) 2005-2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_TIMEX_H
-#define __ASM_ARCH_TIMEX_H
-
-/*
- * value for CLOCK_TICK_RATE stolen from arch/arm/mach-s3c2410/include/mach/timex.h.
- * See there for an explanation.
- */
-#define CLOCK_TICK_RATE         12000000
-
-#endif /* ifndef __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h
deleted file mode 100644
index 770a68c46e81..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/uncompress.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/uncompress.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
-
-#include <linux/io.h>
-
-#define __REG(x)        ((void __iomem __force *)(x))
-
-static void putc_dummy(char c, void __iomem *base)
-{
-        /* nothing */
-}
-
-static int timeout;
-
-static void putc_ns9360(char c, void __iomem *base)
-{
-        do {
-                if (timeout)
-                        --timeout;
-
-                if (__raw_readl(base + 8) & (1 << 3)) {
-                        __raw_writeb(c, base + 16);
-                        timeout = 0x10000;
-                        break;
-                }
-        } while (timeout);
-}
-
-static void putc_a9m9750dev(char c, void __iomem *base)
-{
-        do {
-                if (timeout)
-                        --timeout;
-
-                if (__raw_readb(base + 5) & (1 << 5)) {
-                        __raw_writeb(c, base);
-                        timeout = 0x10000;
-                        break;
-                }
-        } while (timeout);
-
-}
-
-static void putc_ns921x(char c, void __iomem *base)
-{
-        do {
-                if (timeout)
-                        --timeout;
-
-                if (!(__raw_readl(base) & (1 << 11))) {
-                        __raw_writeb(c, base + 0x0028);
-                        timeout = 0x10000;
-                        break;
-                }
-        } while (timeout);
-}
-
-#define MSCS __REG(0xA0900184)
-
-#define NS9360_UARTA    __REG(0x90200040)
-#define NS9360_UARTB    __REG(0x90200000)
-#define NS9360_UARTC    __REG(0x90300000)
-#define NS9360_UARTD    __REG(0x90300040)
-
-#define NS9360_UART_ENABLED(base)                                       \
-                (__raw_readl(NS9360_UARTA) & (1 << 31))
-
-#define A9M9750DEV_UARTA        __REG(0x40000000)
-
-#define NS921XSYS_CLOCK __REG(0xa090017c)
-#define NS921X_UARTA    __REG(0x90010000)
-#define NS921X_UARTB    __REG(0x90018000)
-#define NS921X_UARTC    __REG(0x90020000)
-#define NS921X_UARTD    __REG(0x90028000)
-
-#define NS921X_UART_ENABLED(base)                                       \
-                (__raw_readl((base) + 0x1000) & (1 << 29))
-
-static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base)
-{
-        timeout = 0x10000;
-        if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) {
-                /* ns9360 or ns9750 */
-                if (NS9360_UART_ENABLED(NS9360_UARTA)) {
-                        *putc = putc_ns9360;
-                        *base = NS9360_UARTA;
-                        return;
-                } else if (NS9360_UART_ENABLED(NS9360_UARTB)) {
-                        *putc = putc_ns9360;
-                        *base = NS9360_UARTB;
-                        return;
-                } else if (NS9360_UART_ENABLED(NS9360_UARTC)) {
-                        *putc = putc_ns9360;
-                        *base = NS9360_UARTC;
-                        return;
-                } else if (NS9360_UART_ENABLED(NS9360_UARTD)) {
-                        *putc = putc_ns9360;
-                        *base = NS9360_UARTD;
-                        return;
-                } else if (__raw_readl(__REG(0xa09001f4)) == 0xfffff001) {
-                        *putc = putc_a9m9750dev;
-                        *base = A9M9750DEV_UARTA;
-                        return;
-                }
-        } else if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x02) {
-                /* ns921x */
-                u32 clock = __raw_readl(NS921XSYS_CLOCK);
-
-                if ((clock & (1 << 1)) &&
-                                NS921X_UART_ENABLED(NS921X_UARTA)) {
-                        *putc = putc_ns921x;
-                        *base = NS921X_UARTA;
-                        return;
-                } else if ((clock & (1 << 2)) &&
-                                NS921X_UART_ENABLED(NS921X_UARTB)) {
-                        *putc = putc_ns921x;
-                        *base = NS921X_UARTB;
-                        return;
-                } else if ((clock & (1 << 3)) &&
-                                NS921X_UART_ENABLED(NS921X_UARTC)) {
-                        *putc = putc_ns921x;
-                        *base = NS921X_UARTC;
-                        return;
-                } else if ((clock & (1 << 4)) &&
-                                NS921X_UART_ENABLED(NS921X_UARTD)) {
-                        *putc = putc_ns921x;
-                        *base = NS921X_UARTD;
-                        return;
-                }
-        }
-
-        *putc = putc_dummy;
-}
-
-void (*myputc)(char, void __iomem *);
-void __iomem *base;
-
-static void putc(char c)
-{
-        myputc(c, base);
-}
-
-static void arch_decomp_setup(void)
-{
-        autodetect(&myputc, &base);
-}
-#define arch_decomp_wdog()
-
-static void flush(void)
-{
-        /* nothing */
-}
-
-#endif /* ifndef __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/vmalloc.h b/arch/arm/mach-ns9xxx/include/mach/vmalloc.h
deleted file mode 100644
index c8651974c4b0..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/vmalloc.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END     (0xf0000000UL)
-
-#endif /* ifndef __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
deleted file mode 100644
index 37ab0a2b83ad..000000000000
--- a/arch/arm/mach-ns9xxx/irq.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/irq.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <linux/io.h>
-#include <asm/mach/irq.h>
-#include <mach/regs-sys-common.h>
-#include <mach/irqs.h>
-#include <mach/board.h>
-
-#include "generic.h"
-
-/* simple interrupt prio table: prio(x) < prio(y) <=> x < y */
-#define irq2prio(i) (i)
-#define prio2irq(p) (p)
-
-static void ns9xxx_mask_irq(struct irq_data *d)
-{
-        /* XXX: better use cpp symbols */
-        int prio = irq2prio(d->irq);
-        u32 ic = __raw_readl(SYS_IC(prio / 4));
-        ic &= ~(1 << (7 + 8 * (3 - (prio & 3))));
-        __raw_writel(ic, SYS_IC(prio / 4));
-}
-
-static void ns9xxx_eoi_irq(struct irq_data *d)
-{
-        __raw_writel(0, SYS_ISRADDR);
-}
-
-static void ns9xxx_unmask_irq(struct irq_data *d)
-{
-        /* XXX: better use cpp symbols */
-        int prio = irq2prio(d->irq);
-        u32 ic = __raw_readl(SYS_IC(prio / 4));
-        ic |= 1 << (7 + 8 * (3 - (prio & 3)));
-        __raw_writel(ic, SYS_IC(prio / 4));
-}
-
-static struct irq_chip ns9xxx_chip = {
-        .irq_eoi        = ns9xxx_eoi_irq,
-        .irq_mask       = ns9xxx_mask_irq,
-        .irq_unmask     = ns9xxx_unmask_irq,
-};
-
-void __init ns9xxx_init_irq(void)
-{
-        int i;
-
-        /* disable all IRQs */
-        for (i = 0; i < 8; ++i)
-                __raw_writel(prio2irq(4 * i) << 24 |
-                                prio2irq(4 * i + 1) << 16 |
-                                prio2irq(4 * i + 2) << 8 |
-                                prio2irq(4 * i + 3),
-                                SYS_IC(i));
-
-        for (i = 0; i < 32; ++i)
-                __raw_writel(prio2irq(i), SYS_IVA(i));
-
-        for (i = 0; i <= 31; ++i) {
-                irq_set_chip_and_handler(i, &ns9xxx_chip, handle_fasteoi_irq);
-                set_irq_flags(i, IRQF_VALID);
-                irq_set_status_flags(i, IRQ_LEVEL);
-        }
-}
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
deleted file mode 100644
index 2858417d8d8a..000000000000
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/processor-ns9360.h>
-
-#include "board-a9m9750dev.h"
-#include "generic.h"
-
-static void __init mach_cc9p9360dev_map_io(void)
-{
-        ns9360_map_io();
-        board_a9m9750dev_map_io();
-}
-
-static void __init mach_cc9p9360dev_init_irq(void)
-{
-        ns9xxx_init_irq();
-        board_a9m9750dev_init_irq();
-}
-
-static void __init mach_cc9p9360dev_init_machine(void)
-{
-        ns9xxx_init_machine();
-        board_a9m9750dev_init_machine();
-}
-
-MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an A9M9750 Devboard")
-        .map_io = mach_cc9p9360dev_map_io,
-        .init_irq = mach_cc9p9360dev_init_irq,
-        .init_machine = mach_cc9p9360dev_init_machine,
-        .timer = &ns9360_timer,
-        .boot_params = 0x100,
-MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
deleted file mode 100644
index 729f68da4293..000000000000
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/mach-cc9p9360js.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/processor-ns9360.h>
-
-#include "board-jscc9p9360.h"
-#include "generic.h"
-
-static void __init mach_cc9p9360js_init_machine(void)
-{
-        ns9xxx_init_machine();
-        board_jscc9p9360_init_machine();
-}
-
-MACHINE_START(CC9P9360JS, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard")
-        .map_io = ns9360_map_io,
-        .init_irq = ns9xxx_init_irq,
-        .init_machine = mach_cc9p9360js_init_machine,
-        .timer = &ns9360_timer,
-        .boot_params = 0x100,
-MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/plat-serial8250.c b/arch/arm/mach-ns9xxx/plat-serial8250.c
deleted file mode 100644
index 463e92465fda..000000000000
--- a/arch/arm/mach-ns9xxx/plat-serial8250.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/plat-serial8250.c
- *
- * Copyright (C) 2008 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/platform_device.h>
-#include <linux/serial_8250.h>
-#include <linux/slab.h>
-
-#include <mach/regs-board-a9m9750dev.h>
-#include <mach/board.h>
-
-#define DRIVER_NAME "serial8250"
-
-static int __init ns9xxx_plat_serial8250_init(void)
-{
-        struct plat_serial8250_port *pdata;
-        struct platform_device *pdev;
-        int ret = -ENOMEM;
-        int i;
-
-        if (!board_is_a9m9750dev())
-                return -ENODEV;
-
-        pdev = platform_device_alloc(DRIVER_NAME, 0);
-        if (!pdev)
-                goto err;
-
-        pdata = kzalloc(5 * sizeof(*pdata), GFP_KERNEL);
-        if (!pdata)
-                goto err;
-
-        pdev->dev.platform_data = pdata;
-
-        pdata[0].iobase = FPGA_UARTA_BASE;
-        pdata[1].iobase = FPGA_UARTB_BASE;
-        pdata[2].iobase = FPGA_UARTC_BASE;
-        pdata[3].iobase = FPGA_UARTD_BASE;
-
-        for (i = 0; i < 4; ++i) {
-                pdata[i].membase = (void __iomem *)pdata[i].iobase;
-                pdata[i].mapbase = pdata[i].iobase;
-                pdata[i].iotype = UPIO_MEM;
-                pdata[i].uartclk = 18432000;
-                pdata[i].flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
-        }
-
-        pdata[0].irq = IRQ_FPGA_UARTA;
-        pdata[1].irq = IRQ_FPGA_UARTB;
-        pdata[2].irq = IRQ_FPGA_UARTC;
-        pdata[3].irq = IRQ_FPGA_UARTD;
-
-        ret = platform_device_add(pdev);
-        if (ret) {
-err:
-                platform_device_put(pdev);
-
-                printk(KERN_WARNING "Could not add %s (errno=%d)\n",
-                                DRIVER_NAME, ret);
-        }
-
-        return 0;
-}
-
-arch_initcall(ns9xxx_plat_serial8250_init);
diff --git a/arch/arm/mach-ns9xxx/processor-ns9360.c b/arch/arm/mach-ns9xxx/processor-ns9360.c
deleted file mode 100644
index aed1999d24fc..000000000000
--- a/arch/arm/mach-ns9xxx/processor-ns9360.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/processor-ns9360.c
- *
- * Copyright (C) 2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/io.h>
-#include <linux/kernel.h>
-
-#include <asm/page.h>
-#include <asm/mach/map.h>
-#include <mach/processor-ns9360.h>
-#include <mach/regs-sys-ns9360.h>
-
-void ns9360_reset(char mode)
-{
-        u32 reg;
-
-        reg = __raw_readl(SYS_PLL) >> 16;
-        REGSET(reg, SYS_PLL, SWC, YES);
-        __raw_writel(reg, SYS_PLL);
-}
-
-#define CRYSTAL 29491200 /* Hz */
-unsigned long ns9360_systemclock(void)
-{
-        u32 pll = __raw_readl(SYS_PLL);
-        return CRYSTAL * (REGGETIM(pll, SYS_PLL, ND) + 1)
-                >> REGGETIM(pll, SYS_PLL, FS);
-}
-
-static struct map_desc ns9360_io_desc[] __initdata = {
-        { /* BBus */
-                .virtual = io_p2v(0x90000000),
-                .pfn = __phys_to_pfn(0x90000000),
-                .length = 0x00700000,
-                .type = MT_DEVICE,
-        }, { /* AHB */
-                .virtual = io_p2v(0xa0100000),
-                .pfn = __phys_to_pfn(0xa0100000),
-                .length = 0x00900000,
-                .type = MT_DEVICE,
-        },
-};
-
-void __init ns9360_map_io(void)
-{
-        iotable_init(ns9360_io_desc, ARRAY_SIZE(ns9360_io_desc));
-}
diff --git a/arch/arm/mach-ns9xxx/time-ns9360.c b/arch/arm/mach-ns9xxx/time-ns9360.c
deleted file mode 100644
index 9ca32f55728b..000000000000
--- a/arch/arm/mach-ns9xxx/time-ns9360.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/time-ns9360.c
- *
- * Copyright (C) 2006,2007 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#include <linux/jiffies.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/stringify.h>
-#include <linux/clocksource.h>
-#include <linux/clockchips.h>
-
-#include <mach/processor-ns9360.h>
-#include <mach/regs-sys-ns9360.h>
-#include <mach/irqs.h>
-#include <mach/system.h>
-#include "generic.h"
-
-#define TIMER_CLOCKSOURCE 0
-#define TIMER_CLOCKEVENT 1
-static u32 latch;
-
-static cycle_t ns9360_clocksource_read(struct clocksource *cs)
-{
-        return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE));
-}
-
-static struct clocksource ns9360_clocksource = {
-        .name   = "ns9360-timer" __stringify(TIMER_CLOCKSOURCE),
-        .rating = 300,
-        .read   = ns9360_clocksource_read,
-        .mask   = CLOCKSOURCE_MASK(32),
-        .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-static void ns9360_clockevent_setmode(enum clock_event_mode mode,
-                struct clock_event_device *clk)
-{
-        u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
-
-        switch (mode) {
-        case CLOCK_EVT_MODE_PERIODIC:
-                __raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT));
-                REGSET(tc, SYS_TCx, REN, EN);
-                REGSET(tc, SYS_TCx, INTS, EN);
-                REGSET(tc, SYS_TCx, TEN, EN);
-                break;
-
-        case CLOCK_EVT_MODE_ONESHOT:
-                REGSET(tc, SYS_TCx, REN, DIS);
-                REGSET(tc, SYS_TCx, INTS, EN);
-
-                /* fall through */
-
-        case CLOCK_EVT_MODE_UNUSED:
-        case CLOCK_EVT_MODE_SHUTDOWN:
-        case CLOCK_EVT_MODE_RESUME:
-        default:
-                REGSET(tc, SYS_TCx, TEN, DIS);
-                break;
-        }
-
-        __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
-}
-
-static int ns9360_clockevent_setnextevent(unsigned long evt,
-                struct clock_event_device *clk)
-{
-        u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
-
-        if (REGGET(tc, SYS_TCx, TEN)) {
-                REGSET(tc, SYS_TCx, TEN, DIS);
-                __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
-        }
-
-        REGSET(tc, SYS_TCx, TEN, EN);
-
-        __raw_writel(evt, SYS_TRC(TIMER_CLOCKEVENT));
-
-        __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
-
-        return 0;
-}
-
-static struct clock_event_device ns9360_clockevent_device = {
-        .name           = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
-        .shift          = 20,
-        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .set_mode       = ns9360_clockevent_setmode,
-        .set_next_event = ns9360_clockevent_setnextevent,
-};
-
-static irqreturn_t ns9360_clockevent_handler(int irq, void *dev_id)
-{
-        int timerno = irq - IRQ_NS9360_TIMER0;
-        u32 tc;
-
-        struct clock_event_device *evt = &ns9360_clockevent_device;
-
-        /* clear irq */
-        tc = __raw_readl(SYS_TC(timerno));
-        if (REGGET(tc, SYS_TCx, REN) == SYS_TCx_REN_DIS) {
-                REGSET(tc, SYS_TCx, TEN, DIS);
-                __raw_writel(tc, SYS_TC(timerno));
-        }
-        REGSET(tc, SYS_TCx, INTC, SET);
-        __raw_writel(tc, SYS_TC(timerno));
-        REGSET(tc, SYS_TCx, INTC, UNSET);
-        __raw_writel(tc, SYS_TC(timerno));
-
-        evt->event_handler(evt);
-
-        return IRQ_HANDLED;
-}
-
-static struct irqaction ns9360_clockevent_action = {
-        .name           = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = ns9360_clockevent_handler,
-};
-
-static void __init ns9360_timer_init(void)
-{
-        int tc;
-
-        tc = __raw_readl(SYS_TC(TIMER_CLOCKSOURCE));
-        if (REGGET(tc, SYS_TCx, TEN)) {
-                REGSET(tc, SYS_TCx, TEN, DIS);
-                __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
-        }
-
-        __raw_writel(0, SYS_TRC(TIMER_CLOCKSOURCE));
-
-        REGSET(tc, SYS_TCx, TEN, EN);
-        REGSET(tc, SYS_TCx, TDBG, STOP);
-        REGSET(tc, SYS_TCx, TLCS, CPU);
-        REGSET(tc, SYS_TCx, TM, IEE);
-        REGSET(tc, SYS_TCx, INTS, DIS);
-        REGSET(tc, SYS_TCx, UDS, UP);
-        REGSET(tc, SYS_TCx, TSZ, 32);
-        REGSET(tc, SYS_TCx, REN, EN);
-
-        __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
-
-        clocksource_register_hz(&ns9360_clocksource, ns9360_cpuclock());
-
-        latch = SH_DIV(ns9360_cpuclock(), HZ, 0);
-
-        tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
-        REGSET(tc, SYS_TCx, TEN, DIS);
-        REGSET(tc, SYS_TCx, TDBG, STOP);
-        REGSET(tc, SYS_TCx, TLCS, CPU);
-        REGSET(tc, SYS_TCx, TM, IEE);
-        REGSET(tc, SYS_TCx, INTS, DIS);
-        REGSET(tc, SYS_TCx, UDS, DOWN);
-        REGSET(tc, SYS_TCx, TSZ, 32);
-        REGSET(tc, SYS_TCx, REN, EN);
-        __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
-
-        ns9360_clockevent_device.mult = div_sc(ns9360_cpuclock(),
-                        NSEC_PER_SEC, ns9360_clockevent_device.shift);
-        ns9360_clockevent_device.max_delta_ns =
-                clockevent_delta2ns(-1, &ns9360_clockevent_device);
-        ns9360_clockevent_device.min_delta_ns =
-                clockevent_delta2ns(1, &ns9360_clockevent_device);
-
-        ns9360_clockevent_device.cpumask = cpumask_of(0);
-        clockevents_register_device(&ns9360_clockevent_device);
-
-        setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
-                        &ns9360_clockevent_action);
-}
-
-struct sys_timer ns9360_timer = {
-        .init = ns9360_timer_init,
-};
diff --git a/arch/arm/mach-spear3xx/Kconfig b/arch/arm/mach-spear3xx/Kconfig
index 20d1317cc486..2cee6b0de371 100644
--- a/arch/arm/mach-spear3xx/Kconfig
+++ b/arch/arm/mach-spear3xx/Kconfig
@@ -4,9 +4,26 @@
 
 if ARCH_SPEAR3XX
 
-choice
-        prompt "SPEAr3XX Family"
-        default MACH_SPEAR300
+menu "SPEAr3xx Implementations"
+config BOARD_SPEAR300_EVB
+        bool "SPEAr300 Evaluation Board"
+        select MACH_SPEAR300
+        help
+          Supports ST SPEAr300 Evaluation Board
+
+config BOARD_SPEAR310_EVB
+        bool "SPEAr310 Evaluation Board"
+        select MACH_SPEAR310
+        help
+          Supports ST SPEAr310 Evaluation Board
+
+config BOARD_SPEAR320_EVB
+        bool "SPEAr320 Evaluation Board"
+        select MACH_SPEAR320
+        help
+          Supports ST SPEAr320 Evaluation Board
+
+endmenu
 
 config MACH_SPEAR300
         bool "SPEAr300"
@@ -23,11 +40,4 @@ config MACH_SPEAR320
         help
           Supports ST SPEAr320 Machine
 
-endchoice
-
-# Adding SPEAr3XX machine specific configuration files
-source "arch/arm/mach-spear3xx/Kconfig300"
-source "arch/arm/mach-spear3xx/Kconfig310"
-source "arch/arm/mach-spear3xx/Kconfig320"
-
 endif #ARCH_SPEAR3XX
diff --git a/arch/arm/mach-spear3xx/Kconfig300 b/arch/arm/mach-spear3xx/Kconfig300
deleted file mode 100644
index c519a05b4ab4..000000000000
--- a/arch/arm/mach-spear3xx/Kconfig300
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# SPEAr300 machine configuration file
-#
-
-if MACH_SPEAR300
-
-choice
-        prompt "SPEAr300 Boards"
-        default BOARD_SPEAR300_EVB
-
-config BOARD_SPEAR300_EVB
-        bool "SPEAr300 Evaluation Board"
-        help
-          Supports ST SPEAr300 Evaluation Board
-endchoice
-
-endif   #MACH_SPEAR300
diff --git a/arch/arm/mach-spear3xx/Kconfig310 b/arch/arm/mach-spear3xx/Kconfig310
deleted file mode 100644
index 60e7442d75bd..000000000000
--- a/arch/arm/mach-spear3xx/Kconfig310
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# SPEAr310 machine configuration file
-#
-
-if MACH_SPEAR310
-
-choice
-        prompt "SPEAr310 Boards"
-        default BOARD_SPEAR310_EVB
-
-config BOARD_SPEAR310_EVB
-        bool "SPEAr310 Evaluation Board"
-        help
-          Supports ST SPEAr310 Evaluation Board
-endchoice
-
-endif   #MACH_SPEAR310
diff --git a/arch/arm/mach-spear3xx/Kconfig320 b/arch/arm/mach-spear3xx/Kconfig320
deleted file mode 100644
index 1c1d438399b8..000000000000
--- a/arch/arm/mach-spear3xx/Kconfig320
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# SPEAr320 machine configuration file
-#
-
-if MACH_SPEAR320
-
-choice
-        prompt "SPEAr320 Boards"
-        default BOARD_SPEAR320_EVB
-
-config BOARD_SPEAR320_EVB
-        bool "SPEAr320 Evaluation Board"
-        help
-          Supports ST SPEAr320 Evaluation Board
-endchoice
-
-endif   #MACH_SPEAR320
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index 98bc7edc95a6..f67860cd649f 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -13,6 +13,7 @@
 
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <asm/mach-types.h>
 #include <plat/clock.h>
 #include <mach/misc_regs.h>
 
@@ -688,56 +689,71 @@ static struct clk_lookup spear_clk_lookups[] = {
         { .dev_id = "adc",              .clk = &adc_clk},
         { .dev_id = "ssp-pl022.0",      .clk = &ssp0_clk},
         { .dev_id = "gpio",             .clk = &gpio_clk},
-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
-        { .dev_id = "physmap-flash",    .clk = &emi_clk},
-#endif
-#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR310) || \
-        defined(CONFIG_MACH_SPEAR320)
-        { .con_id = "fsmc",             .clk = &fsmc_clk},
-#endif
-
-/* common clocks to spear310 and spear320 */
-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
-        { .dev_id = "uart1",            .clk = &uart1_clk},
-        { .dev_id = "uart2",            .clk = &uart2_clk},
-#endif
-
-        /* common clock to spear300 and spear320 */
-#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320)
-        { .dev_id = "clcd",             .clk = &clcd_clk},
-        { .dev_id = "sdhci",            .clk = &sdhci_clk},
-#endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */
+};
 
-        /* spear300 machine specific clock structures */
+/* array of all spear 300 clock lookups */
 #ifdef CONFIG_MACH_SPEAR300
+static struct clk_lookup spear300_clk_lookups[] = {
+        { .dev_id = "clcd",             .clk = &clcd_clk},
+        { .con_id = "fsmc",             .clk = &fsmc_clk},
         { .dev_id = "gpio1",            .clk = &gpio1_clk},
         { .dev_id = "keyboard",         .clk = &kbd_clk},
+        { .dev_id = "sdhci",            .clk = &sdhci_clk},
+};
 #endif
 
-        /* spear310 machine specific clock structures */
+/* array of all spear 310 clock lookups */
 #ifdef CONFIG_MACH_SPEAR310
+static struct clk_lookup spear310_clk_lookups[] = {
+        { .con_id = "fsmc",             .clk = &fsmc_clk},
+        { .con_id = "emi",              .clk = &emi_clk},
+        { .dev_id = "uart1",            .clk = &uart1_clk},
+        { .dev_id = "uart2",            .clk = &uart2_clk},
         { .dev_id = "uart3",            .clk = &uart3_clk},
         { .dev_id = "uart4",            .clk = &uart4_clk},
         { .dev_id = "uart5",            .clk = &uart5_clk},
-
+};
 #endif
-        /* spear320 machine specific clock structures */
+
+/* array of all spear 320 clock lookups */
 #ifdef CONFIG_MACH_SPEAR320
+static struct clk_lookup spear320_clk_lookups[] = {
+        { .dev_id = "clcd",             .clk = &clcd_clk},
+        { .con_id = "fsmc",             .clk = &fsmc_clk},
+        { .dev_id = "i2c_designware.1", .clk = &i2c1_clk},
+        { .con_id = "emi",              .clk = &emi_clk},
+        { .dev_id = "pwm",              .clk = &pwm_clk},
+        { .dev_id = "sdhci",            .clk = &sdhci_clk},
         { .dev_id = "c_can_platform.0", .clk = &can0_clk},
         { .dev_id = "c_can_platform.1", .clk = &can1_clk},
-        { .dev_id = "i2c_designware.1", .clk = &i2c1_clk},
         { .dev_id = "ssp-pl022.1",      .clk = &ssp1_clk},
         { .dev_id = "ssp-pl022.2",      .clk = &ssp2_clk},
-        { .dev_id = "pwm",              .clk = &pwm_clk},
-#endif
+        { .dev_id = "uart1",            .clk = &uart1_clk},
+        { .dev_id = "uart2",            .clk = &uart2_clk},
 };
+#endif
 
-void __init clk_init(void)
+void __init spear3xx_clk_init(void)
 {
-        int i;
+        int i, cnt;
+        struct clk_lookup *lookups;
+
+        if (machine_is_spear300()) {
+                cnt = ARRAY_SIZE(spear300_clk_lookups);
+                lookups = spear300_clk_lookups;
+        } else if (machine_is_spear310()) {
+                cnt = ARRAY_SIZE(spear310_clk_lookups);
+                lookups = spear310_clk_lookups;
+        } else {
+                cnt = ARRAY_SIZE(spear320_clk_lookups);
+                lookups = spear320_clk_lookups;
+        }
 
         for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++)
                 clk_register(&spear_clk_lookups[i]);
 
-        recalc_root_clocks();
+        for (i = 0; i < cnt; i++)
+                clk_register(&lookups[i]);
+
+        clk_init();
 }
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 8e30636909ef..b8f31c3935f7 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -27,16 +27,16 @@
  * Following GPT channels will be used as clock source and clockevent
  */
 #define SPEAR_GPT0_BASE         SPEAR3XX_ML1_TMR_BASE
-#define SPEAR_GPT0_CHAN0_IRQ    IRQ_CPU_GPT1_1
-#define SPEAR_GPT0_CHAN1_IRQ    IRQ_CPU_GPT1_2
+#define SPEAR_GPT0_CHAN0_IRQ    SPEAR3XX_IRQ_CPU_GPT1_1
+#define SPEAR_GPT0_CHAN1_IRQ    SPEAR3XX_IRQ_CPU_GPT1_2
 
 /* Add spear3xx family device structure declarations here */
-extern struct amba_device gpio_device;
-extern struct amba_device uart_device;
+extern struct amba_device spear3xx_gpio_device;
+extern struct amba_device spear3xx_uart_device;
 extern struct sys_timer spear3xx_timer;
 
 /* Add spear3xx family function declarations here */
-void __init clk_init(void);
+void __init spear3xx_clk_init(void);
 void __init spear_setup_timer(void);
 void __init spear3xx_map_io(void);
 void __init spear3xx_init_irq(void);
@@ -60,81 +60,80 @@ void __init spear3xx_init(void);
 #define PMX_TIMER_1_2_MASK      (1 << 0)
 
 /* pad mux devices */
-extern struct pmx_dev pmx_firda;
-extern struct pmx_dev pmx_i2c;
-extern struct pmx_dev pmx_ssp_cs;
-extern struct pmx_dev pmx_ssp;
-extern struct pmx_dev pmx_mii;
-extern struct pmx_dev pmx_gpio_pin0;
-extern struct pmx_dev pmx_gpio_pin1;
-extern struct pmx_dev pmx_gpio_pin2;
-extern struct pmx_dev pmx_gpio_pin3;
-extern struct pmx_dev pmx_gpio_pin4;
-extern struct pmx_dev pmx_gpio_pin5;
-extern struct pmx_dev pmx_uart0_modem;
-extern struct pmx_dev pmx_uart0;
-extern struct pmx_dev pmx_timer_3_4;
-extern struct pmx_dev pmx_timer_1_2;
+extern struct pmx_dev spear3xx_pmx_firda;
+extern struct pmx_dev spear3xx_pmx_i2c;
+extern struct pmx_dev spear3xx_pmx_ssp_cs;
+extern struct pmx_dev spear3xx_pmx_ssp;
+extern struct pmx_dev spear3xx_pmx_mii;
+extern struct pmx_dev spear3xx_pmx_gpio_pin0;
+extern struct pmx_dev spear3xx_pmx_gpio_pin1;
+extern struct pmx_dev spear3xx_pmx_gpio_pin2;
+extern struct pmx_dev spear3xx_pmx_gpio_pin3;
+extern struct pmx_dev spear3xx_pmx_gpio_pin4;
+extern struct pmx_dev spear3xx_pmx_gpio_pin5;
+extern struct pmx_dev spear3xx_pmx_uart0_modem;
+extern struct pmx_dev spear3xx_pmx_uart0;
+extern struct pmx_dev spear3xx_pmx_timer_3_4;
+extern struct pmx_dev spear3xx_pmx_timer_1_2;
 
 #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
 /* padmux plgpio devices */
-extern struct pmx_dev pmx_plgpio_0_1;
-extern struct pmx_dev pmx_plgpio_2_3;
-extern struct pmx_dev pmx_plgpio_4_5;
-extern struct pmx_dev pmx_plgpio_6_9;
-extern struct pmx_dev pmx_plgpio_10_27;
-extern struct pmx_dev pmx_plgpio_28;
-extern struct pmx_dev pmx_plgpio_29;
-extern struct pmx_dev pmx_plgpio_30;
-extern struct pmx_dev pmx_plgpio_31;
-extern struct pmx_dev pmx_plgpio_32;
-extern struct pmx_dev pmx_plgpio_33;
-extern struct pmx_dev pmx_plgpio_34_36;
-extern struct pmx_dev pmx_plgpio_37_42;
-extern struct pmx_dev pmx_plgpio_43_44_47_48;
-extern struct pmx_dev pmx_plgpio_45_46_49_50;
+extern struct pmx_dev spear3xx_pmx_plgpio_0_1;
+extern struct pmx_dev spear3xx_pmx_plgpio_2_3;
+extern struct pmx_dev spear3xx_pmx_plgpio_4_5;
+extern struct pmx_dev spear3xx_pmx_plgpio_6_9;
+extern struct pmx_dev spear3xx_pmx_plgpio_10_27;
+extern struct pmx_dev spear3xx_pmx_plgpio_28;
+extern struct pmx_dev spear3xx_pmx_plgpio_29;
+extern struct pmx_dev spear3xx_pmx_plgpio_30;
+extern struct pmx_dev spear3xx_pmx_plgpio_31;
+extern struct pmx_dev spear3xx_pmx_plgpio_32;
+extern struct pmx_dev spear3xx_pmx_plgpio_33;
+extern struct pmx_dev spear3xx_pmx_plgpio_34_36;
+extern struct pmx_dev spear3xx_pmx_plgpio_37_42;
+extern struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48;
+extern struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50;
 #endif
 
-extern struct pmx_driver pmx_driver;
-
 /* spear300 declarations */
 #ifdef CONFIG_MACH_SPEAR300
 /* Add spear300 machine device structure declarations here */
-extern struct amba_device gpio1_device;
+extern struct amba_device spear300_gpio1_device;
 
 /* pad mux modes */
-extern struct pmx_mode nand_mode;
-extern struct pmx_mode nor_mode;
-extern struct pmx_mode photo_frame_mode;
-extern struct pmx_mode lend_ip_phone_mode;
-extern struct pmx_mode hend_ip_phone_mode;
-extern struct pmx_mode lend_wifi_phone_mode;
-extern struct pmx_mode hend_wifi_phone_mode;
-extern struct pmx_mode ata_pabx_wi2s_mode;
-extern struct pmx_mode ata_pabx_i2s_mode;
-extern struct pmx_mode caml_lcdw_mode;
-extern struct pmx_mode camu_lcd_mode;
-extern struct pmx_mode camu_wlcd_mode;
-extern struct pmx_mode caml_lcd_mode;
+extern struct pmx_mode spear300_nand_mode;
+extern struct pmx_mode spear300_nor_mode;
+extern struct pmx_mode spear300_photo_frame_mode;
+extern struct pmx_mode spear300_lend_ip_phone_mode;
+extern struct pmx_mode spear300_hend_ip_phone_mode;
+extern struct pmx_mode spear300_lend_wifi_phone_mode;
+extern struct pmx_mode spear300_hend_wifi_phone_mode;
+extern struct pmx_mode spear300_ata_pabx_wi2s_mode;
+extern struct pmx_mode spear300_ata_pabx_i2s_mode;
+extern struct pmx_mode spear300_caml_lcdw_mode;
+extern struct pmx_mode spear300_camu_lcd_mode;
+extern struct pmx_mode spear300_camu_wlcd_mode;
+extern struct pmx_mode spear300_caml_lcd_mode;
 
 /* pad mux devices */
-extern struct pmx_dev pmx_fsmc_2_chips;
-extern struct pmx_dev pmx_fsmc_4_chips;
-extern struct pmx_dev pmx_keyboard;
-extern struct pmx_dev pmx_clcd;
-extern struct pmx_dev pmx_telecom_gpio;
-extern struct pmx_dev pmx_telecom_tdm;
-extern struct pmx_dev pmx_telecom_spi_cs_i2c_clk;
-extern struct pmx_dev pmx_telecom_camera;
-extern struct pmx_dev pmx_telecom_dac;
-extern struct pmx_dev pmx_telecom_i2s;
-extern struct pmx_dev pmx_telecom_boot_pins;
-extern struct pmx_dev pmx_telecom_sdhci_4bit;
-extern struct pmx_dev pmx_telecom_sdhci_8bit;
-extern struct pmx_dev pmx_gpio1;
+extern struct pmx_dev spear300_pmx_fsmc_2_chips;
+extern struct pmx_dev spear300_pmx_fsmc_4_chips;
+extern struct pmx_dev spear300_pmx_keyboard;
+extern struct pmx_dev spear300_pmx_clcd;
+extern struct pmx_dev spear300_pmx_telecom_gpio;
+extern struct pmx_dev spear300_pmx_telecom_tdm;
+extern struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk;
+extern struct pmx_dev spear300_pmx_telecom_camera;
+extern struct pmx_dev spear300_pmx_telecom_dac;
+extern struct pmx_dev spear300_pmx_telecom_i2s;
+extern struct pmx_dev spear300_pmx_telecom_boot_pins;
+extern struct pmx_dev spear300_pmx_telecom_sdhci_4bit;
+extern struct pmx_dev spear300_pmx_telecom_sdhci_8bit;
+extern struct pmx_dev spear300_pmx_gpio1;
 
 /* Add spear300 machine function declarations here */
-void __init spear300_init(void);
+void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+                u8 pmx_dev_count);
 
 #endif /* CONFIG_MACH_SPEAR300 */
 
@@ -143,17 +142,18 @@ void __init spear300_init(void);
 /* Add spear310 machine device structure declarations here */
 
 /* pad mux devices */
-extern struct pmx_dev pmx_emi_cs_0_1_4_5;
-extern struct pmx_dev pmx_emi_cs_2_3;
-extern struct pmx_dev pmx_uart1;
-extern struct pmx_dev pmx_uart2;
-extern struct pmx_dev pmx_uart3_4_5;
-extern struct pmx_dev pmx_fsmc;
-extern struct pmx_dev pmx_rs485_0_1;
-extern struct pmx_dev pmx_tdm0;
+extern struct pmx_dev spear310_pmx_emi_cs_0_1_4_5;
+extern struct pmx_dev spear310_pmx_emi_cs_2_3;
+extern struct pmx_dev spear310_pmx_uart1;
+extern struct pmx_dev spear310_pmx_uart2;
+extern struct pmx_dev spear310_pmx_uart3_4_5;
+extern struct pmx_dev spear310_pmx_fsmc;
+extern struct pmx_dev spear310_pmx_rs485_0_1;
+extern struct pmx_dev spear310_pmx_tdm0;
 
 /* Add spear310 machine function declarations here */
-void __init spear310_init(void);
+void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+                u8 pmx_dev_count);
 
 #endif /* CONFIG_MACH_SPEAR310 */
 
@@ -162,37 +162,38 @@ void __init spear310_init(void);
 /* Add spear320 machine device structure declarations here */
 
 /* pad mux modes */
-extern struct pmx_mode auto_net_smii_mode;
-extern struct pmx_mode auto_net_mii_mode;
-extern struct pmx_mode auto_exp_mode;
-extern struct pmx_mode small_printers_mode;
+extern struct pmx_mode spear320_auto_net_smii_mode;
+extern struct pmx_mode spear320_auto_net_mii_mode;
+extern struct pmx_mode spear320_auto_exp_mode;
+extern struct pmx_mode spear320_small_printers_mode;
 
 /* pad mux devices */
-extern struct pmx_dev pmx_clcd;
-extern struct pmx_dev pmx_emi;
-extern struct pmx_dev pmx_fsmc;
-extern struct pmx_dev pmx_spp;
-extern struct pmx_dev pmx_sdhci;
-extern struct pmx_dev pmx_i2s;
-extern struct pmx_dev pmx_uart1;
-extern struct pmx_dev pmx_uart1_modem;
-extern struct pmx_dev pmx_uart2;
-extern struct pmx_dev pmx_touchscreen;
-extern struct pmx_dev pmx_can;
-extern struct pmx_dev pmx_sdhci_led;
-extern struct pmx_dev pmx_pwm0;
-extern struct pmx_dev pmx_pwm1;
-extern struct pmx_dev pmx_pwm2;
-extern struct pmx_dev pmx_pwm3;
-extern struct pmx_dev pmx_ssp1;
-extern struct pmx_dev pmx_ssp2;
-extern struct pmx_dev pmx_mii1;
-extern struct pmx_dev pmx_smii0;
-extern struct pmx_dev pmx_smii1;
-extern struct pmx_dev pmx_i2c1;
+extern struct pmx_dev spear320_pmx_clcd;
+extern struct pmx_dev spear320_pmx_emi;
+extern struct pmx_dev spear320_pmx_fsmc;
+extern struct pmx_dev spear320_pmx_spp;
+extern struct pmx_dev spear320_pmx_sdhci;
+extern struct pmx_dev spear320_pmx_i2s;
+extern struct pmx_dev spear320_pmx_uart1;
+extern struct pmx_dev spear320_pmx_uart1_modem;
+extern struct pmx_dev spear320_pmx_uart2;
+extern struct pmx_dev spear320_pmx_touchscreen;
+extern struct pmx_dev spear320_pmx_can;
+extern struct pmx_dev spear320_pmx_sdhci_led;
+extern struct pmx_dev spear320_pmx_pwm0;
+extern struct pmx_dev spear320_pmx_pwm1;
+extern struct pmx_dev spear320_pmx_pwm2;
+extern struct pmx_dev spear320_pmx_pwm3;
+extern struct pmx_dev spear320_pmx_ssp1;
+extern struct pmx_dev spear320_pmx_ssp2;
+extern struct pmx_dev spear320_pmx_mii1;
+extern struct pmx_dev spear320_pmx_smii0;
+extern struct pmx_dev spear320_pmx_smii1;
+extern struct pmx_dev spear320_pmx_i2c1;
 
 /* Add spear320 machine function declarations here */
-void __init spear320_init(void);
+void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+                u8 pmx_dev_count);
 
 #endif /* CONFIG_MACH_SPEAR320 */
 
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
index a1a7f481866d..6e265442808e 100644
--- a/arch/arm/mach-spear3xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear3xx/include/mach/irqs.h
@@ -15,138 +15,140 @@
 #define __MACH_IRQS_H
 
 /* SPEAr3xx IRQ definitions */
-#define IRQ_HW_ACCEL_MOD_0                      0
-#define IRQ_INTRCOMM_RAS_ARM                    1
-#define IRQ_CPU_GPT1_1                          2
-#define IRQ_CPU_GPT1_2                          3
-#define IRQ_BASIC_GPT1_1                        4
-#define IRQ_BASIC_GPT1_2                        5
-#define IRQ_BASIC_GPT2_1                        6
-#define IRQ_BASIC_GPT2_2                        7
-#define IRQ_BASIC_DMA                           8
-#define IRQ_BASIC_SMI                           9
-#define IRQ_BASIC_RTC                           10
-#define IRQ_BASIC_GPIO                          11
-#define IRQ_BASIC_WDT                           12
-#define IRQ_DDR_CONTROLLER                      13
-#define IRQ_SYS_ERROR                           14
-#define IRQ_WAKEUP_RCV                          15
-#define IRQ_JPEG                                16
-#define IRQ_IRDA                                17
-#define IRQ_ADC                                 18
-#define IRQ_UART                                19
-#define IRQ_SSP                                 20
-#define IRQ_I2C                                 21
-#define IRQ_MAC_1                               22
-#define IRQ_MAC_2                               23
-#define IRQ_USB_DEV                             24
-#define IRQ_USB_H_OHCI_0                        25
-#define IRQ_USB_H_EHCI_0                        26
-#define IRQ_USB_H_EHCI_1                        IRQ_USB_H_EHCI_0
-#define IRQ_USB_H_OHCI_1                        27
-#define IRQ_GEN_RAS_1                           28
-#define IRQ_GEN_RAS_2                           29
-#define IRQ_GEN_RAS_3                           30
-#define IRQ_HW_ACCEL_MOD_1                      31
-#define IRQ_VIC_END                             32
-
-#define VIRQ_START                              IRQ_VIC_END
+#define SPEAR3XX_IRQ_HW_ACCEL_MOD_0             0
+#define SPEAR3XX_IRQ_INTRCOMM_RAS_ARM           1
+#define SPEAR3XX_IRQ_CPU_GPT1_1                 2
+#define SPEAR3XX_IRQ_CPU_GPT1_2                 3
+#define SPEAR3XX_IRQ_BASIC_GPT1_1               4
+#define SPEAR3XX_IRQ_BASIC_GPT1_2               5
+#define SPEAR3XX_IRQ_BASIC_GPT2_1               6
+#define SPEAR3XX_IRQ_BASIC_GPT2_2               7
+#define SPEAR3XX_IRQ_BASIC_DMA                  8
+#define SPEAR3XX_IRQ_BASIC_SMI                  9
+#define SPEAR3XX_IRQ_BASIC_RTC                  10
+#define SPEAR3XX_IRQ_BASIC_GPIO                 11
+#define SPEAR3XX_IRQ_BASIC_WDT                  12
+#define SPEAR3XX_IRQ_DDR_CONTROLLER             13
+#define SPEAR3XX_IRQ_SYS_ERROR                  14
+#define SPEAR3XX_IRQ_WAKEUP_RCV                 15
+#define SPEAR3XX_IRQ_JPEG                       16
+#define SPEAR3XX_IRQ_IRDA                       17
+#define SPEAR3XX_IRQ_ADC                        18
+#define SPEAR3XX_IRQ_UART                       19
+#define SPEAR3XX_IRQ_SSP                        20
+#define SPEAR3XX_IRQ_I2C                        21
+#define SPEAR3XX_IRQ_MAC_1                      22
+#define SPEAR3XX_IRQ_MAC_2                      23
+#define SPEAR3XX_IRQ_USB_DEV                    24
+#define SPEAR3XX_IRQ_USB_H_OHCI_0               25
+#define SPEAR3XX_IRQ_USB_H_EHCI_0               26
+#define SPEAR3XX_IRQ_USB_H_EHCI_1               SPEAR3XX_IRQ_USB_H_EHCI_0
+#define SPEAR3XX_IRQ_USB_H_OHCI_1               27
+#define SPEAR3XX_IRQ_GEN_RAS_1                  28
+#define SPEAR3XX_IRQ_GEN_RAS_2                  29
+#define SPEAR3XX_IRQ_GEN_RAS_3                  30
+#define SPEAR3XX_IRQ_HW_ACCEL_MOD_1             31
+#define SPEAR3XX_IRQ_VIC_END                    32
+
+#define SPEAR3XX_VIRQ_START                     SPEAR3XX_IRQ_VIC_END
 
 /* SPEAr300 Virtual irq definitions */
-#ifdef CONFIG_MACH_SPEAR300
 /* IRQs sharing IRQ_GEN_RAS_1 */
-#define VIRQ_IT_PERS_S                          (VIRQ_START + 0)
-#define VIRQ_IT_CHANGE_S                        (VIRQ_START + 1)
-#define VIRQ_I2S                                (VIRQ_START + 2)
-#define VIRQ_TDM                                (VIRQ_START + 3)
-#define VIRQ_CAMERA_L                           (VIRQ_START + 4)
-#define VIRQ_CAMERA_F                           (VIRQ_START + 5)
-#define VIRQ_CAMERA_V                           (VIRQ_START + 6)
-#define VIRQ_KEYBOARD                           (VIRQ_START + 7)
-#define VIRQ_GPIO1                              (VIRQ_START + 8)
+#define SPEAR300_VIRQ_IT_PERS_S                 (SPEAR3XX_VIRQ_START + 0)
+#define SPEAR300_VIRQ_IT_CHANGE_S               (SPEAR3XX_VIRQ_START + 1)
+#define SPEAR300_VIRQ_I2S                       (SPEAR3XX_VIRQ_START + 2)
+#define SPEAR300_VIRQ_TDM                       (SPEAR3XX_VIRQ_START + 3)
+#define SPEAR300_VIRQ_CAMERA_L                  (SPEAR3XX_VIRQ_START + 4)
+#define SPEAR300_VIRQ_CAMERA_F                  (SPEAR3XX_VIRQ_START + 5)
+#define SPEAR300_VIRQ_CAMERA_V                  (SPEAR3XX_VIRQ_START + 6)
+#define SPEAR300_VIRQ_KEYBOARD                  (SPEAR3XX_VIRQ_START + 7)
+#define SPEAR300_VIRQ_GPIO1                     (SPEAR3XX_VIRQ_START + 8)
 
 /* IRQs sharing IRQ_GEN_RAS_3 */
-#define IRQ_CLCD                                IRQ_GEN_RAS_3
+#define SPEAR300_IRQ_CLCD                       SPEAR3XX_IRQ_GEN_RAS_3
 
 /* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
-#define IRQ_SDHCI                               IRQ_INTRCOMM_RAS_ARM
-
-/* GPIO pins virtual irqs */
-#define SPEAR_GPIO_INT_BASE                     (VIRQ_START + 9)
-#define SPEAR_GPIO1_INT_BASE                    (SPEAR_GPIO_INT_BASE + 8)
-#define SPEAR_GPIO_INT_END                      (SPEAR_GPIO1_INT_BASE + 8)
+#define SPEAR300_IRQ_SDHCI                      SPEAR3XX_IRQ_INTRCOMM_RAS_ARM
 
 /* SPEAr310 Virtual irq definitions */
-#elif defined(CONFIG_MACH_SPEAR310)
 /* IRQs sharing IRQ_GEN_RAS_1 */
-#define VIRQ_SMII0                              (VIRQ_START + 0)
-#define VIRQ_SMII1                              (VIRQ_START + 1)
-#define VIRQ_SMII2                              (VIRQ_START + 2)
-#define VIRQ_SMII3                              (VIRQ_START + 3)
-#define VIRQ_WAKEUP_SMII0                       (VIRQ_START + 4)
-#define VIRQ_WAKEUP_SMII1                       (VIRQ_START + 5)
-#define VIRQ_WAKEUP_SMII2                       (VIRQ_START + 6)
-#define VIRQ_WAKEUP_SMII3                       (VIRQ_START + 7)
+#define SPEAR310_VIRQ_SMII0                     (SPEAR3XX_VIRQ_START + 0)
+#define SPEAR310_VIRQ_SMII1                     (SPEAR3XX_VIRQ_START + 1)
+#define SPEAR310_VIRQ_SMII2                     (SPEAR3XX_VIRQ_START + 2)
+#define SPEAR310_VIRQ_SMII3                     (SPEAR3XX_VIRQ_START + 3)
+#define SPEAR310_VIRQ_WAKEUP_SMII0              (SPEAR3XX_VIRQ_START + 4)
+#define SPEAR310_VIRQ_WAKEUP_SMII1              (SPEAR3XX_VIRQ_START + 5)
+#define SPEAR310_VIRQ_WAKEUP_SMII2              (SPEAR3XX_VIRQ_START + 6)
+#define SPEAR310_VIRQ_WAKEUP_SMII3              (SPEAR3XX_VIRQ_START + 7)
 
 /* IRQs sharing IRQ_GEN_RAS_2 */
-#define VIRQ_UART1                              (VIRQ_START + 8)
-#define VIRQ_UART2                              (VIRQ_START + 9)
-#define VIRQ_UART3                              (VIRQ_START + 10)
-#define VIRQ_UART4                              (VIRQ_START + 11)
-#define VIRQ_UART5                              (VIRQ_START + 12)
+#define SPEAR310_VIRQ_UART1                     (SPEAR3XX_VIRQ_START + 8)
+#define SPEAR310_VIRQ_UART2                     (SPEAR3XX_VIRQ_START + 9)
+#define SPEAR310_VIRQ_UART3                     (SPEAR3XX_VIRQ_START + 10)
+#define SPEAR310_VIRQ_UART4                     (SPEAR3XX_VIRQ_START + 11)
+#define SPEAR310_VIRQ_UART5                     (SPEAR3XX_VIRQ_START + 12)
 
 /* IRQs sharing IRQ_GEN_RAS_3 */
-#define VIRQ_EMI                                (VIRQ_START + 13)
-#define VIRQ_PLGPIO                             (VIRQ_START + 14)
+#define SPEAR310_VIRQ_EMI                       (SPEAR3XX_VIRQ_START + 13)
+#define SPEAR310_VIRQ_PLGPIO                    (SPEAR3XX_VIRQ_START + 14)
 
 /* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
-#define VIRQ_TDM_HDLC                           (VIRQ_START + 15)
-#define VIRQ_RS485_0                            (VIRQ_START + 16)
-#define VIRQ_RS485_1                            (VIRQ_START + 17)
-
-/* GPIO pins virtual irqs */
-#define SPEAR_GPIO_INT_BASE                     (VIRQ_START + 18)
+#define SPEAR310_VIRQ_TDM_HDLC                  (SPEAR3XX_VIRQ_START + 15)
+#define SPEAR310_VIRQ_RS485_0                   (SPEAR3XX_VIRQ_START + 16)
+#define SPEAR310_VIRQ_RS485_1                   (SPEAR3XX_VIRQ_START + 17)
 
 /* SPEAr320 Virtual irq definitions */
-#else
 /* IRQs sharing IRQ_GEN_RAS_1 */
-#define VIRQ_EMI                                (VIRQ_START + 0)
-#define VIRQ_CLCD                               (VIRQ_START + 1)
-#define VIRQ_SPP                                (VIRQ_START + 2)
+#define SPEAR320_VIRQ_EMI                       (SPEAR3XX_VIRQ_START + 0)
+#define SPEAR320_VIRQ_CLCD                      (SPEAR3XX_VIRQ_START + 1)
+#define SPEAR320_VIRQ_SPP                       (SPEAR3XX_VIRQ_START + 2)
 
 /* IRQs sharing IRQ_GEN_RAS_2 */
-#define IRQ_SDHCI                               IRQ_GEN_RAS_2
+#define SPEAR320_IRQ_SDHCI                      SPEAR3XX_IRQ_GEN_RAS_2
 
 /* IRQs sharing IRQ_GEN_RAS_3 */
-#define VIRQ_PLGPIO                             (VIRQ_START + 3)
-#define VIRQ_I2S_PLAY                           (VIRQ_START + 4)
-#define VIRQ_I2S_REC                            (VIRQ_START + 5)
+#define SPEAR320_VIRQ_PLGPIO                    (SPEAR3XX_VIRQ_START + 3)
+#define SPEAR320_VIRQ_I2S_PLAY                  (SPEAR3XX_VIRQ_START + 4)
+#define SPEAR320_VIRQ_I2S_REC                   (SPEAR3XX_VIRQ_START + 5)
 
 /* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
-#define VIRQ_CANU                               (VIRQ_START + 6)
-#define VIRQ_CANL                               (VIRQ_START + 7)
-#define VIRQ_UART1                              (VIRQ_START + 8)
-#define VIRQ_UART2                              (VIRQ_START + 9)
-#define VIRQ_SSP1                               (VIRQ_START + 10)
-#define VIRQ_SSP2                               (VIRQ_START + 11)
-#define VIRQ_SMII0                              (VIRQ_START + 12)
-#define VIRQ_MII1_SMII1                         (VIRQ_START + 13)
-#define VIRQ_WAKEUP_SMII0                       (VIRQ_START + 14)
-#define VIRQ_WAKEUP_MII1_SMII1                  (VIRQ_START + 15)
-#define VIRQ_I2C                                (VIRQ_START + 16)
-
-/* GPIO pins virtual irqs */
-#define SPEAR_GPIO_INT_BASE                     (VIRQ_START + 17)
+#define SPEAR320_VIRQ_CANU                      (SPEAR3XX_VIRQ_START + 6)
+#define SPEAR320_VIRQ_CANL                      (SPEAR3XX_VIRQ_START + 7)
+#define SPEAR320_VIRQ_UART1                     (SPEAR3XX_VIRQ_START + 8)
+#define SPEAR320_VIRQ_UART2                     (SPEAR3XX_VIRQ_START + 9)
+#define SPEAR320_VIRQ_SSP1                      (SPEAR3XX_VIRQ_START + 10)
+#define SPEAR320_VIRQ_SSP2                      (SPEAR3XX_VIRQ_START + 11)
+#define SPEAR320_VIRQ_SMII0                     (SPEAR3XX_VIRQ_START + 12)
+#define SPEAR320_VIRQ_MII1_SMII1                (SPEAR3XX_VIRQ_START + 13)
+#define SPEAR320_VIRQ_WAKEUP_SMII0              (SPEAR3XX_VIRQ_START + 14)
+#define SPEAR320_VIRQ_WAKEUP_MII1_SMII1         (SPEAR3XX_VIRQ_START + 15)
+#define SPEAR320_VIRQ_I2C1                      (SPEAR3XX_VIRQ_START + 16)
 
+/*
+ * GPIO pins virtual irqs
+ * Use the lowest number for the GPIO virtual IRQs base on which subarchs
+ * we have compiled in
+ */
+#if defined(CONFIG_MACH_SPEAR310)
+#define SPEAR3XX_GPIO_INT_BASE                  (SPEAR3XX_VIRQ_START + 18)
+#elif defined(CONFIG_MACH_SPEAR320)
+#define SPEAR3XX_GPIO_INT_BASE                  (SPEAR3XX_VIRQ_START + 17)
+#else
+#define SPEAR3XX_GPIO_INT_BASE                  (SPEAR3XX_VIRQ_START + 9)
 #endif
 
-/* PLGPIO Virtual IRQs */
+#define SPEAR300_GPIO1_INT_BASE                 (SPEAR3XX_GPIO_INT_BASE + 8)
+#define SPEAR3XX_PLGPIO_COUNT   102
+
 #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
-#define SPEAR_PLGPIO_INT_BASE                   (SPEAR_GPIO_INT_BASE + 8)
-#define SPEAR_GPIO_INT_END                      (SPEAR_PLGPIO_INT_BASE + 102)
+#define SPEAR3XX_PLGPIO_INT_BASE                (SPEAR3XX_GPIO_INT_BASE + 8)
+#define SPEAR3XX_GPIO_INT_END                   (SPEAR3XX_PLGPIO_INT_BASE + \
+                                                        SPEAR3XX_PLGPIO_COUNT)
+#else
+#define SPEAR3XX_GPIO_INT_END   (SPEAR300_GPIO1_INT_BASE + 8)
 #endif
 
-#define VIRQ_END                                SPEAR_GPIO_INT_END
-#define NR_IRQS                                 VIRQ_END
+#define SPEAR3XX_VIRQ_END       SPEAR3XX_GPIO_INT_END
+#define NR_IRQS                 SPEAR3XX_VIRQ_END
 
 #endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
index c723515f8853..3b6ea0729040 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear300.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -20,19 +20,19 @@
 #define SPEAR300_TELECOM_BASE           UL(0x50000000)
 
 /* Interrupt registers offsets and masks */
-#define INT_ENB_MASK_REG                0x54
-#define INT_STS_MASK_REG                0x58
-#define IT_PERS_S_IRQ_MASK              (1 << 0)
-#define IT_CHANGE_S_IRQ_MASK            (1 << 1)
-#define I2S_IRQ_MASK                    (1 << 2)
-#define TDM_IRQ_MASK                    (1 << 3)
-#define CAMERA_L_IRQ_MASK               (1 << 4)
-#define CAMERA_F_IRQ_MASK               (1 << 5)
-#define CAMERA_V_IRQ_MASK               (1 << 6)
-#define KEYBOARD_IRQ_MASK               (1 << 7)
-#define GPIO1_IRQ_MASK                  (1 << 8)
-
-#define SHIRQ_RAS1_MASK                 0x1FF
+#define SPEAR300_INT_ENB_MASK_REG       0x54
+#define SPEAR300_INT_STS_MASK_REG       0x58
+#define SPEAR300_IT_PERS_S_IRQ_MASK     (1 << 0)
+#define SPEAR300_IT_CHANGE_S_IRQ_MASK   (1 << 1)
+#define SPEAR300_I2S_IRQ_MASK           (1 << 2)
+#define SPEAR300_TDM_IRQ_MASK           (1 << 3)
+#define SPEAR300_CAMERA_L_IRQ_MASK      (1 << 4)
+#define SPEAR300_CAMERA_F_IRQ_MASK      (1 << 5)
+#define SPEAR300_CAMERA_V_IRQ_MASK      (1 << 6)
+#define SPEAR300_KEYBOARD_IRQ_MASK      (1 << 7)
+#define SPEAR300_GPIO1_IRQ_MASK         (1 << 8)
+
+#define SPEAR300_SHIRQ_RAS1_MASK        0x1FF
 
 #define SPEAR300_CLCD_BASE              UL(0x60000000)
 #define SPEAR300_SDHCI_BASE             UL(0x70000000)
diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h
index 1e853479b8cd..1567d0da725f 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear310.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear310.h
@@ -29,29 +29,29 @@
 #define SPEAR310_SOC_CONFIG_BASE        UL(0xB4000000)
 
 /* Interrupt registers offsets and masks */
-#define INT_STS_MASK_REG                0x04
-#define SMII0_IRQ_MASK                  (1 << 0)
-#define SMII1_IRQ_MASK                  (1 << 1)
-#define SMII2_IRQ_MASK                  (1 << 2)
-#define SMII3_IRQ_MASK                  (1 << 3)
-#define WAKEUP_SMII0_IRQ_MASK           (1 << 4)
-#define WAKEUP_SMII1_IRQ_MASK           (1 << 5)
-#define WAKEUP_SMII2_IRQ_MASK           (1 << 6)
-#define WAKEUP_SMII3_IRQ_MASK           (1 << 7)
-#define UART1_IRQ_MASK                  (1 << 8)
-#define UART2_IRQ_MASK                  (1 << 9)
-#define UART3_IRQ_MASK                  (1 << 10)
-#define UART4_IRQ_MASK                  (1 << 11)
-#define UART5_IRQ_MASK                  (1 << 12)
-#define EMI_IRQ_MASK                    (1 << 13)
-#define TDM_HDLC_IRQ_MASK               (1 << 14)
-#define RS485_0_IRQ_MASK                (1 << 15)
-#define RS485_1_IRQ_MASK                (1 << 16)
+#define SPEAR310_INT_STS_MASK_REG       0x04
+#define SPEAR310_SMII0_IRQ_MASK         (1 << 0)
+#define SPEAR310_SMII1_IRQ_MASK         (1 << 1)
+#define SPEAR310_SMII2_IRQ_MASK         (1 << 2)
+#define SPEAR310_SMII3_IRQ_MASK         (1 << 3)
+#define SPEAR310_WAKEUP_SMII0_IRQ_MASK  (1 << 4)
+#define SPEAR310_WAKEUP_SMII1_IRQ_MASK  (1 << 5)
+#define SPEAR310_WAKEUP_SMII2_IRQ_MASK  (1 << 6)
+#define SPEAR310_WAKEUP_SMII3_IRQ_MASK  (1 << 7)
+#define SPEAR310_UART1_IRQ_MASK         (1 << 8)
+#define SPEAR310_UART2_IRQ_MASK         (1 << 9)
+#define SPEAR310_UART3_IRQ_MASK         (1 << 10)
+#define SPEAR310_UART4_IRQ_MASK         (1 << 11)
+#define SPEAR310_UART5_IRQ_MASK         (1 << 12)
+#define SPEAR310_EMI_IRQ_MASK           (1 << 13)
+#define SPEAR310_TDM_HDLC_IRQ_MASK      (1 << 14)
+#define SPEAR310_RS485_0_IRQ_MASK       (1 << 15)
+#define SPEAR310_RS485_1_IRQ_MASK       (1 << 16)
 
-#define SHIRQ_RAS1_MASK                 0x000FF
-#define SHIRQ_RAS2_MASK                 0x01F00
-#define SHIRQ_RAS3_MASK                 0x02000
-#define SHIRQ_INTRCOMM_RAS_MASK         0x1C000
+#define SPEAR310_SHIRQ_RAS1_MASK        0x000FF
+#define SPEAR310_SHIRQ_RAS2_MASK        0x01F00
+#define SPEAR310_SHIRQ_RAS3_MASK        0x02000
+#define SPEAR310_SHIRQ_INTRCOMM_RAS_MASK        0x1C000
 
 #endif /* __MACH_SPEAR310_H */
 
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index 940f0d85d959..8cfa83fa1296 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -36,31 +36,31 @@
 #define SPEAR320_SOC_CONFIG_BASE        UL(0xB3000000)
 
 /* Interrupt registers offsets and masks */
-#define INT_STS_MASK_REG                0x04
-#define INT_CLR_MASK_REG                0x04
-#define INT_ENB_MASK_REG                0x08
-#define GPIO_IRQ_MASK                   (1 << 0)
-#define I2S_PLAY_IRQ_MASK               (1 << 1)
-#define I2S_REC_IRQ_MASK                (1 << 2)
-#define EMI_IRQ_MASK                    (1 << 7)
-#define CLCD_IRQ_MASK                   (1 << 8)
-#define SPP_IRQ_MASK                    (1 << 9)
-#define SDHCI_IRQ_MASK                  (1 << 10)
-#define CAN_U_IRQ_MASK                  (1 << 11)
-#define CAN_L_IRQ_MASK                  (1 << 12)
-#define UART1_IRQ_MASK                  (1 << 13)
-#define UART2_IRQ_MASK                  (1 << 14)
-#define SSP1_IRQ_MASK                   (1 << 15)
-#define SSP2_IRQ_MASK                   (1 << 16)
-#define SMII0_IRQ_MASK                  (1 << 17)
-#define MII1_SMII1_IRQ_MASK             (1 << 18)
-#define WAKEUP_SMII0_IRQ_MASK           (1 << 19)
-#define WAKEUP_MII1_SMII1_IRQ_MASK      (1 << 20)
-#define I2C1_IRQ_MASK                   (1 << 21)
+#define SPEAR320_INT_STS_MASK_REG               0x04
+#define SPEAR320_INT_CLR_MASK_REG               0x04
+#define SPEAR320_INT_ENB_MASK_REG               0x08
+#define SPEAR320_GPIO_IRQ_MASK                  (1 << 0)
+#define SPEAR320_I2S_PLAY_IRQ_MASK              (1 << 1)
+#define SPEAR320_I2S_REC_IRQ_MASK               (1 << 2)
+#define SPEAR320_EMI_IRQ_MASK                   (1 << 7)
+#define SPEAR320_CLCD_IRQ_MASK                  (1 << 8)
+#define SPEAR320_SPP_IRQ_MASK                   (1 << 9)
+#define SPEAR320_SDHCI_IRQ_MASK                 (1 << 10)
+#define SPEAR320_CAN_U_IRQ_MASK                 (1 << 11)
+#define SPEAR320_CAN_L_IRQ_MASK                 (1 << 12)
+#define SPEAR320_UART1_IRQ_MASK                 (1 << 13)
+#define SPEAR320_UART2_IRQ_MASK                 (1 << 14)
+#define SPEAR320_SSP1_IRQ_MASK                  (1 << 15)
+#define SPEAR320_SSP2_IRQ_MASK                  (1 << 16)
+#define SPEAR320_SMII0_IRQ_MASK                 (1 << 17)
+#define SPEAR320_MII1_SMII1_IRQ_MASK            (1 << 18)
+#define SPEAR320_WAKEUP_SMII0_IRQ_MASK          (1 << 19)
+#define SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK     (1 << 20)
+#define SPEAR320_I2C1_IRQ_MASK                  (1 << 21)
 
-#define SHIRQ_RAS1_MASK                 0x000380
-#define SHIRQ_RAS3_MASK                 0x000007
-#define SHIRQ_INTRCOMM_RAS_MASK         0x3FF800
+#define SPEAR320_SHIRQ_RAS1_MASK                0x000380
+#define SPEAR320_SHIRQ_RAS3_MASK                0x000007
+#define SPEAR320_SHIRQ_INTRCOMM_RAS_MASK        0x3FF800
 
 #endif /* __MACH_SPEAR320_H */
 
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 2697e65adf86..a5e46b4ade20 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -40,86 +40,86 @@
 #define CAML_LCD_MODE                   (1 << 12)
 #define ALL_MODES                       0x1FFF
 
-struct pmx_mode nand_mode = {
+struct pmx_mode spear300_nand_mode = {
         .id = NAND_MODE,
         .name = "nand mode",
         .mask = 0x00,
 };
 
-struct pmx_mode nor_mode = {
+struct pmx_mode spear300_nor_mode = {
         .id = NOR_MODE,
         .name = "nor mode",
         .mask = 0x01,
 };
 
-struct pmx_mode photo_frame_mode = {
+struct pmx_mode spear300_photo_frame_mode = {
         .id = PHOTO_FRAME_MODE,
         .name = "photo frame mode",
         .mask = 0x02,
 };
 
-struct pmx_mode lend_ip_phone_mode = {
+struct pmx_mode spear300_lend_ip_phone_mode = {
         .id = LEND_IP_PHONE_MODE,
         .name = "lend ip phone mode",
         .mask = 0x03,
 };
 
-struct pmx_mode hend_ip_phone_mode = {
+struct pmx_mode spear300_hend_ip_phone_mode = {
         .id = HEND_IP_PHONE_MODE,
         .name = "hend ip phone mode",
         .mask = 0x04,
 };
 
-struct pmx_mode lend_wifi_phone_mode = {
+struct pmx_mode spear300_lend_wifi_phone_mode = {
         .id = LEND_WIFI_PHONE_MODE,
         .name = "lend wifi phone mode",
         .mask = 0x05,
 };
 
-struct pmx_mode hend_wifi_phone_mode = {
+struct pmx_mode spear300_hend_wifi_phone_mode = {
         .id = HEND_WIFI_PHONE_MODE,
         .name = "hend wifi phone mode",
         .mask = 0x06,
 };
 
-struct pmx_mode ata_pabx_wi2s_mode = {
+struct pmx_mode spear300_ata_pabx_wi2s_mode = {
         .id = ATA_PABX_WI2S_MODE,
         .name = "ata pabx wi2s mode",
         .mask = 0x07,
 };
 
-struct pmx_mode ata_pabx_i2s_mode = {
+struct pmx_mode spear300_ata_pabx_i2s_mode = {
         .id = ATA_PABX_I2S_MODE,
         .name = "ata pabx i2s mode",
         .mask = 0x08,
 };
 
-struct pmx_mode caml_lcdw_mode = {
+struct pmx_mode spear300_caml_lcdw_mode = {
         .id = CAML_LCDW_MODE,
         .name = "caml lcdw mode",
         .mask = 0x0C,
 };
 
-struct pmx_mode camu_lcd_mode = {
+struct pmx_mode spear300_camu_lcd_mode = {
         .id = CAMU_LCD_MODE,
         .name = "camu lcd mode",
         .mask = 0x0D,
 };
 
-struct pmx_mode camu_wlcd_mode = {
+struct pmx_mode spear300_camu_wlcd_mode = {
         .id = CAMU_WLCD_MODE,
         .name = "camu wlcd mode",
         .mask = 0x0E,
 };
 
-struct pmx_mode caml_lcd_mode = {
+struct pmx_mode spear300_caml_lcd_mode = {
         .id = CAML_LCD_MODE,
         .name = "caml lcd mode",
         .mask = 0x0F,
 };
 
 /* devices */
-struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
+static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
         {
                 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
                         ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
@@ -127,14 +127,14 @@ struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
         },
 };
 
-struct pmx_dev pmx_fsmc_2_chips = {
+struct pmx_dev spear300_pmx_fsmc_2_chips = {
         .name = "fsmc_2_chips",
         .modes = pmx_fsmc_2_chips_modes,
         .mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
+static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
         {
                 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
                         ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
@@ -142,14 +142,14 @@ struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
         },
 };
 
-struct pmx_dev pmx_fsmc_4_chips = {
+struct pmx_dev spear300_pmx_fsmc_4_chips = {
         .name = "fsmc_4_chips",
         .modes = pmx_fsmc_4_chips_modes,
         .mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_keyboard_modes[] = {
+static struct pmx_dev_mode pmx_keyboard_modes[] = {
         {
                 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
                         LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
@@ -159,14 +159,14 @@ struct pmx_dev_mode pmx_keyboard_modes[] = {
         },
 };
 
-struct pmx_dev pmx_keyboard = {
+struct pmx_dev spear300_pmx_keyboard = {
         .name = "keyboard",
         .modes = pmx_keyboard_modes,
         .mode_count = ARRAY_SIZE(pmx_keyboard_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_clcd_modes[] = {
+static struct pmx_dev_mode pmx_clcd_modes[] = {
         {
                 .ids = PHOTO_FRAME_MODE,
                 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
@@ -177,14 +177,14 @@ struct pmx_dev_mode pmx_clcd_modes[] = {
         },
 };
 
-struct pmx_dev pmx_clcd = {
+struct pmx_dev spear300_pmx_clcd = {
         .name = "clcd",
         .modes = pmx_clcd_modes,
         .mode_count = ARRAY_SIZE(pmx_clcd_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
+static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
         {
                 .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
                 .mask = PMX_MII_MASK,
@@ -204,14 +204,14 @@ struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_gpio = {
+struct pmx_dev spear300_pmx_telecom_gpio = {
         .name = "telecom_gpio",
         .modes = pmx_telecom_gpio_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
+static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
         {
                 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
                         HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
@@ -222,14 +222,14 @@ struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_tdm = {
+struct pmx_dev spear300_pmx_telecom_tdm = {
         .name = "telecom_tdm",
         .modes = pmx_telecom_tdm_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
+static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
         {
                 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
                         LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
@@ -239,14 +239,14 @@ struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_spi_cs_i2c_clk = {
+struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {
         .name = "telecom_spi_cs_i2c_clk",
         .modes = pmx_telecom_spi_cs_i2c_clk_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_camera_modes[] = {
+static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
         {
                 .ids = CAML_LCDW_MODE | CAML_LCD_MODE,
                 .mask = PMX_MII_MASK,
@@ -256,14 +256,14 @@ struct pmx_dev_mode pmx_telecom_camera_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_camera = {
+struct pmx_dev spear300_pmx_telecom_camera = {
         .name = "telecom_camera",
         .modes = pmx_telecom_camera_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_dac_modes[] = {
+static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
         {
                 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
                         | CAMU_WLCD_MODE | CAML_LCD_MODE,
@@ -271,14 +271,14 @@ struct pmx_dev_mode pmx_telecom_dac_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_dac = {
+struct pmx_dev spear300_pmx_telecom_dac = {
         .name = "telecom_dac",
         .modes = pmx_telecom_dac_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
+static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
         {
                 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
                         | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
@@ -288,14 +288,14 @@ struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_i2s = {
+struct pmx_dev spear300_pmx_telecom_i2s = {
         .name = "telecom_i2s",
         .modes = pmx_telecom_i2s_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
+static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
         {
                 .ids = NAND_MODE | NOR_MODE,
                 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
@@ -303,14 +303,14 @@ struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_boot_pins = {
+struct pmx_dev spear300_pmx_telecom_boot_pins = {
         .name = "telecom_boot_pins",
         .modes = pmx_telecom_boot_pins_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
+static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
         {
                 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
                         HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
@@ -323,14 +323,14 @@ struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_sdhci_4bit = {
+struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {
         .name = "telecom_sdhci_4bit",
         .modes = pmx_telecom_sdhci_4bit_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
+static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
         {
                 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
                         HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
@@ -342,14 +342,14 @@ struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
         },
 };
 
-struct pmx_dev pmx_telecom_sdhci_8bit = {
+struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {
         .name = "telecom_sdhci_8bit",
         .modes = pmx_telecom_sdhci_8bit_modes,
         .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_gpio1_modes[] = {
+static struct pmx_dev_mode pmx_gpio1_modes[] = {
         {
                 .ids = PHOTO_FRAME_MODE,
                 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
@@ -357,7 +357,7 @@ struct pmx_dev_mode pmx_gpio1_modes[] = {
         },
 };
 
-struct pmx_dev pmx_gpio1 = {
+struct pmx_dev spear300_pmx_gpio1 = {
         .name = "arm gpio1",
         .modes = pmx_gpio1_modes,
         .mode_count = ARRAY_SIZE(pmx_gpio1_modes),
@@ -365,60 +365,60 @@ struct pmx_dev pmx_gpio1 = {
 };
 
 /* pmx driver structure */
-struct pmx_driver pmx_driver = {
+static struct pmx_driver pmx_driver = {
         .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
         .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
 };
 
 /* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
         {
-                .virq = VIRQ_IT_PERS_S,
-                .enb_mask = IT_PERS_S_IRQ_MASK,
-                .status_mask = IT_PERS_S_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_IT_PERS_S,
+                .enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
+                .status_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
         }, {
-                .virq = VIRQ_IT_CHANGE_S,
-                .enb_mask = IT_CHANGE_S_IRQ_MASK,
-                .status_mask = IT_CHANGE_S_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_IT_CHANGE_S,
+                .enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
+                .status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
         }, {
-                .virq = VIRQ_I2S,
-                .enb_mask = I2S_IRQ_MASK,
-                .status_mask = I2S_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_I2S,
+                .enb_mask = SPEAR300_I2S_IRQ_MASK,
+                .status_mask = SPEAR300_I2S_IRQ_MASK,
         }, {
-                .virq = VIRQ_TDM,
-                .enb_mask = TDM_IRQ_MASK,
-                .status_mask = TDM_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_TDM,
+                .enb_mask = SPEAR300_TDM_IRQ_MASK,
+                .status_mask = SPEAR300_TDM_IRQ_MASK,
         }, {
-                .virq = VIRQ_CAMERA_L,
-                .enb_mask = CAMERA_L_IRQ_MASK,
-                .status_mask = CAMERA_L_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_CAMERA_L,
+                .enb_mask = SPEAR300_CAMERA_L_IRQ_MASK,
+                .status_mask = SPEAR300_CAMERA_L_IRQ_MASK,
         }, {
-                .virq = VIRQ_CAMERA_F,
-                .enb_mask = CAMERA_F_IRQ_MASK,
-                .status_mask = CAMERA_F_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_CAMERA_F,
+                .enb_mask = SPEAR300_CAMERA_F_IRQ_MASK,
+                .status_mask = SPEAR300_CAMERA_F_IRQ_MASK,
         }, {
-                .virq = VIRQ_CAMERA_V,
-                .enb_mask = CAMERA_V_IRQ_MASK,
-                .status_mask = CAMERA_V_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_CAMERA_V,
+                .enb_mask = SPEAR300_CAMERA_V_IRQ_MASK,
+                .status_mask = SPEAR300_CAMERA_V_IRQ_MASK,
         }, {
-                .virq = VIRQ_KEYBOARD,
-                .enb_mask = KEYBOARD_IRQ_MASK,
-                .status_mask = KEYBOARD_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_KEYBOARD,
+                .enb_mask = SPEAR300_KEYBOARD_IRQ_MASK,
+                .status_mask = SPEAR300_KEYBOARD_IRQ_MASK,
         }, {
-                .virq = VIRQ_GPIO1,
-                .enb_mask = GPIO1_IRQ_MASK,
-                .status_mask = GPIO1_IRQ_MASK,
+                .virq = SPEAR300_VIRQ_GPIO1,
+                .enb_mask = SPEAR300_GPIO1_IRQ_MASK,
+                .status_mask = SPEAR300_GPIO1_IRQ_MASK,
         },
 };
 
-struct spear_shirq shirq_ras1 = {
-        .irq = IRQ_GEN_RAS_1,
+static struct spear_shirq shirq_ras1 = {
+        .irq = SPEAR3XX_IRQ_GEN_RAS_1,
         .dev_config = shirq_ras1_config,
         .dev_count = ARRAY_SIZE(shirq_ras1_config),
         .regs = {
-                .enb_reg = INT_ENB_MASK_REG,
-                .status_reg = INT_STS_MASK_REG,
-                .status_reg_mask = SHIRQ_RAS1_MASK,
+                .enb_reg = SPEAR300_INT_ENB_MASK_REG,
+                .status_reg = SPEAR300_INT_STS_MASK_REG,
+                .status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK,
                 .clear_reg = -1,
         },
 };
@@ -427,10 +427,10 @@ struct spear_shirq shirq_ras1 = {
 /* arm gpio1 device registration */
 static struct pl061_platform_data gpio1_plat_data = {
         .gpio_base      = 8,
-        .irq_base       = SPEAR_GPIO1_INT_BASE,
+        .irq_base       = SPEAR300_GPIO1_INT_BASE,
 };
 
-struct amba_device gpio1_device = {
+struct amba_device spear300_gpio1_device = {
         .dev = {
                 .init_name = "gpio1",
                 .platform_data = &gpio1_plat_data,
@@ -440,11 +440,12 @@ struct amba_device gpio1_device = {
                 .end = SPEAR300_GPIO_BASE + SZ_4K - 1,
                 .flags = IORESOURCE_MEM,
         },
-        .irq = {VIRQ_GPIO1, NO_IRQ},
+        .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ},
 };
 
 /* spear300 routines */
-void __init spear300_init(void)
+void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+                u8 pmx_dev_count)
 {
         int ret = 0;
 
@@ -460,6 +461,10 @@ void __init spear300_init(void)
         }
 
         /* pmx initialization */
+        pmx_driver.mode = pmx_mode;
+        pmx_driver.devs = pmx_devs;
+        pmx_driver.devs_count = pmx_dev_count;
+
         pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
         if (pmx_driver.base) {
                 ret = pmx_register(&pmx_driver);
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index 42d2253ef540..69006f694220 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -19,26 +19,26 @@
 /* padmux devices to enable */
 static struct pmx_dev *pmx_devs[] = {
         /* spear3xx specific devices */
-        &pmx_i2c,
-        &pmx_ssp_cs,
-        &pmx_ssp,
-        &pmx_mii,
-        &pmx_uart0,
+        &spear3xx_pmx_i2c,
+        &spear3xx_pmx_ssp_cs,
+        &spear3xx_pmx_ssp,
+        &spear3xx_pmx_mii,
+        &spear3xx_pmx_uart0,
 
         /* spear300 specific devices */
-        &pmx_fsmc_2_chips,
-        &pmx_clcd,
-        &pmx_telecom_sdhci_4bit,
-        &pmx_gpio1,
+        &spear300_pmx_fsmc_2_chips,
+        &spear300_pmx_clcd,
+        &spear300_pmx_telecom_sdhci_4bit,
+        &spear300_pmx_gpio1,
 };
 
 static struct amba_device *amba_devs[] __initdata = {
         /* spear3xx specific devices */
-        &gpio_device,
-        &uart_device,
+        &spear3xx_gpio_device,
+        &spear3xx_uart_device,
 
         /* spear300 specific devices */
-        &gpio1_device,
+        &spear300_gpio1_device,
 };
 
 static struct platform_device *plat_devs[] __initdata = {
@@ -51,13 +51,9 @@ static void __init spear300_evb_init(void)
 {
         unsigned int i;
 
-        /* padmux initialization, must be done before spear300_init */
-        pmx_driver.mode = &photo_frame_mode;
-        pmx_driver.devs = pmx_devs;
-        pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
-
         /* call spear300 machine init function */
-        spear300_init();
+        spear300_init(&spear300_photo_frame_mode, pmx_devs,
+                        ARRAY_SIZE(pmx_devs));
 
         /* Add Platform Devices */
         platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 5c0a67b60c2a..9004cf9f01bf 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -22,112 +22,112 @@
 #define PAD_MUX_CONFIG_REG      0x08
 
 /* devices */
-struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
+static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_TIMER_3_4_MASK,
         },
 };
 
-struct pmx_dev pmx_emi_cs_0_1_4_5 = {
+struct pmx_dev spear310_pmx_emi_cs_0_1_4_5 = {
         .name = "emi_cs_0_1_4_5",
         .modes = pmx_emi_cs_0_1_4_5_modes,
         .mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
+static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_TIMER_1_2_MASK,
         },
 };
 
-struct pmx_dev pmx_emi_cs_2_3 = {
+struct pmx_dev spear310_pmx_emi_cs_2_3 = {
         .name = "emi_cs_2_3",
         .modes = pmx_emi_cs_2_3_modes,
         .mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart1_modes[] = {
+static struct pmx_dev_mode pmx_uart1_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_FIRDA_MASK,
         },
 };
 
-struct pmx_dev pmx_uart1 = {
+struct pmx_dev spear310_pmx_uart1 = {
         .name = "uart1",
         .modes = pmx_uart1_modes,
         .mode_count = ARRAY_SIZE(pmx_uart1_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart2_modes[] = {
+static struct pmx_dev_mode pmx_uart2_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_TIMER_1_2_MASK,
         },
 };
 
-struct pmx_dev pmx_uart2 = {
+struct pmx_dev spear310_pmx_uart2 = {
         .name = "uart2",
         .modes = pmx_uart2_modes,
         .mode_count = ARRAY_SIZE(pmx_uart2_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
+static struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_UART0_MODEM_MASK,
         },
 };
 
-struct pmx_dev pmx_uart3_4_5 = {
+struct pmx_dev spear310_pmx_uart3_4_5 = {
         .name = "uart3_4_5",
         .modes = pmx_uart3_4_5_modes,
         .mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_fsmc_modes[] = {
+static struct pmx_dev_mode pmx_fsmc_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_SSP_CS_MASK,
         },
 };
 
-struct pmx_dev pmx_fsmc = {
+struct pmx_dev spear310_pmx_fsmc = {
         .name = "fsmc",
         .modes = pmx_fsmc_modes,
         .mode_count = ARRAY_SIZE(pmx_fsmc_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
+static struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_rs485_0_1 = {
+struct pmx_dev spear310_pmx_rs485_0_1 = {
         .name = "rs485_0_1",
         .modes = pmx_rs485_0_1_modes,
         .mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_tdm0_modes[] = {
+static struct pmx_dev_mode pmx_tdm0_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_tdm0 = {
+struct pmx_dev spear310_pmx_tdm0 = {
         .name = "tdm0",
         .modes = pmx_tdm0_modes,
         .mode_count = ARRAY_SIZE(pmx_tdm0_modes),
@@ -135,122 +135,122 @@ struct pmx_dev pmx_tdm0 = {
 };
 
 /* pmx driver structure */
-struct pmx_driver pmx_driver = {
+static struct pmx_driver pmx_driver = {
         .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
 };
 
 /* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
         {
-                .virq = VIRQ_SMII0,
-                .status_mask = SMII0_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_SMII0,
+                .status_mask = SPEAR310_SMII0_IRQ_MASK,
         }, {
-                .virq = VIRQ_SMII1,
-                .status_mask = SMII1_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_SMII1,
+                .status_mask = SPEAR310_SMII1_IRQ_MASK,
         }, {
-                .virq = VIRQ_SMII2,
-                .status_mask = SMII2_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_SMII2,
+                .status_mask = SPEAR310_SMII2_IRQ_MASK,
         }, {
-                .virq = VIRQ_SMII3,
-                .status_mask = SMII3_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_SMII3,
+                .status_mask = SPEAR310_SMII3_IRQ_MASK,
         }, {
-                .virq = VIRQ_WAKEUP_SMII0,
-                .status_mask = WAKEUP_SMII0_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_WAKEUP_SMII0,
+                .status_mask = SPEAR310_WAKEUP_SMII0_IRQ_MASK,
         }, {
-                .virq = VIRQ_WAKEUP_SMII1,
-                .status_mask = WAKEUP_SMII1_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_WAKEUP_SMII1,
+                .status_mask = SPEAR310_WAKEUP_SMII1_IRQ_MASK,
         }, {
-                .virq = VIRQ_WAKEUP_SMII2,
-                .status_mask = WAKEUP_SMII2_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_WAKEUP_SMII2,
+                .status_mask = SPEAR310_WAKEUP_SMII2_IRQ_MASK,
         }, {
-                .virq = VIRQ_WAKEUP_SMII3,
-                .status_mask = WAKEUP_SMII3_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_WAKEUP_SMII3,
+                .status_mask = SPEAR310_WAKEUP_SMII3_IRQ_MASK,
         },
 };
 
-struct spear_shirq shirq_ras1 = {
-        .irq = IRQ_GEN_RAS_1,
+static struct spear_shirq shirq_ras1 = {
+        .irq = SPEAR3XX_IRQ_GEN_RAS_1,
         .dev_config = shirq_ras1_config,
         .dev_count = ARRAY_SIZE(shirq_ras1_config),
         .regs = {
                 .enb_reg = -1,
-                .status_reg = INT_STS_MASK_REG,
-                .status_reg_mask = SHIRQ_RAS1_MASK,
+                .status_reg = SPEAR310_INT_STS_MASK_REG,
+                .status_reg_mask = SPEAR310_SHIRQ_RAS1_MASK,
                 .clear_reg = -1,
         },
 };
 
-struct shirq_dev_config shirq_ras2_config[] = {
+static struct shirq_dev_config shirq_ras2_config[] = {
         {
-                .virq = VIRQ_UART1,
-                .status_mask = UART1_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_UART1,
+                .status_mask = SPEAR310_UART1_IRQ_MASK,
         }, {
-                .virq = VIRQ_UART2,
-                .status_mask = UART2_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_UART2,
+                .status_mask = SPEAR310_UART2_IRQ_MASK,
         }, {
-                .virq = VIRQ_UART3,
-                .status_mask = UART3_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_UART3,
+                .status_mask = SPEAR310_UART3_IRQ_MASK,
         }, {
-                .virq = VIRQ_UART4,
-                .status_mask = UART4_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_UART4,
+                .status_mask = SPEAR310_UART4_IRQ_MASK,
         }, {
-                .virq = VIRQ_UART5,
-                .status_mask = UART5_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_UART5,
+                .status_mask = SPEAR310_UART5_IRQ_MASK,
         },
 };
 
-struct spear_shirq shirq_ras2 = {
-        .irq = IRQ_GEN_RAS_2,
+static struct spear_shirq shirq_ras2 = {
+        .irq = SPEAR3XX_IRQ_GEN_RAS_2,
         .dev_config = shirq_ras2_config,
         .dev_count = ARRAY_SIZE(shirq_ras2_config),
         .regs = {
                 .enb_reg = -1,
-                .status_reg = INT_STS_MASK_REG,
-                .status_reg_mask = SHIRQ_RAS2_MASK,
+                .status_reg = SPEAR310_INT_STS_MASK_REG,
+                .status_reg_mask = SPEAR310_SHIRQ_RAS2_MASK,
                 .clear_reg = -1,
         },
 };
 
-struct shirq_dev_config shirq_ras3_config[] = {
+static struct shirq_dev_config shirq_ras3_config[] = {
         {
-                .virq = VIRQ_EMI,
-                .status_mask = EMI_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_EMI,
+                .status_mask = SPEAR310_EMI_IRQ_MASK,
         },
 };
 
-struct spear_shirq shirq_ras3 = {
-        .irq = IRQ_GEN_RAS_3,
+static struct spear_shirq shirq_ras3 = {
+        .irq = SPEAR3XX_IRQ_GEN_RAS_3,
         .dev_config = shirq_ras3_config,
         .dev_count = ARRAY_SIZE(shirq_ras3_config),
         .regs = {
                 .enb_reg = -1,
-                .status_reg = INT_STS_MASK_REG,
-                .status_reg_mask = SHIRQ_RAS3_MASK,
+                .status_reg = SPEAR310_INT_STS_MASK_REG,
+                .status_reg_mask = SPEAR310_SHIRQ_RAS3_MASK,
                 .clear_reg = -1,
         },
 };
 
-struct shirq_dev_config shirq_intrcomm_ras_config[] = {
+static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
         {
-                .virq = VIRQ_TDM_HDLC,
-                .status_mask = TDM_HDLC_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_TDM_HDLC,
+                .status_mask = SPEAR310_TDM_HDLC_IRQ_MASK,
         }, {
-                .virq = VIRQ_RS485_0,
-                .status_mask = RS485_0_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_RS485_0,
+                .status_mask = SPEAR310_RS485_0_IRQ_MASK,
         }, {
-                .virq = VIRQ_RS485_1,
-                .status_mask = RS485_1_IRQ_MASK,
+                .virq = SPEAR310_VIRQ_RS485_1,
+                .status_mask = SPEAR310_RS485_1_IRQ_MASK,
         },
 };
 
-struct spear_shirq shirq_intrcomm_ras = {
-        .irq = IRQ_INTRCOMM_RAS_ARM,
+static struct spear_shirq shirq_intrcomm_ras = {
+        .irq = SPEAR3XX_IRQ_INTRCOMM_RAS_ARM,
         .dev_config = shirq_intrcomm_ras_config,
         .dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
         .regs = {
                 .enb_reg = -1,
-                .status_reg = INT_STS_MASK_REG,
-                .status_reg_mask = SHIRQ_INTRCOMM_RAS_MASK,
+                .status_reg = SPEAR310_INT_STS_MASK_REG,
+                .status_reg_mask = SPEAR310_SHIRQ_INTRCOMM_RAS_MASK,
                 .clear_reg = -1,
         },
 };
@@ -258,7 +258,8 @@ struct spear_shirq shirq_intrcomm_ras = {
 /* Add spear310 specific devices here */
 
 /* spear310 routines */
-void __init spear310_init(void)
+void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+                u8 pmx_dev_count)
 {
         void __iomem *base;
         int ret = 0;
@@ -296,6 +297,10 @@ void __init spear310_init(void)
 
         /* pmx initialization */
         pmx_driver.base = base;
+        pmx_driver.mode = pmx_mode;
+        pmx_driver.devs = pmx_devs;
+        pmx_driver.devs_count = pmx_dev_count;
+
         ret = pmx_register(&pmx_driver);
         if (ret)
                 printk(KERN_ERR "padmux: registeration failed. err no: %d\n",
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 2d7f333bd67b..c8684ce1f9b3 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -19,31 +19,31 @@
 /* padmux devices to enable */
 static struct pmx_dev *pmx_devs[] = {
         /* spear3xx specific devices */
-        &pmx_i2c,
-        &pmx_ssp,
-        &pmx_gpio_pin0,
-        &pmx_gpio_pin1,
-        &pmx_gpio_pin2,
-        &pmx_gpio_pin3,
-        &pmx_gpio_pin4,
-        &pmx_gpio_pin5,
-        &pmx_uart0,
+        &spear3xx_pmx_i2c,
+        &spear3xx_pmx_ssp,
+        &spear3xx_pmx_gpio_pin0,
+        &spear3xx_pmx_gpio_pin1,
+        &spear3xx_pmx_gpio_pin2,
+        &spear3xx_pmx_gpio_pin3,
+        &spear3xx_pmx_gpio_pin4,
+        &spear3xx_pmx_gpio_pin5,
+        &spear3xx_pmx_uart0,
 
         /* spear310 specific devices */
-        &pmx_emi_cs_0_1_4_5,
-        &pmx_emi_cs_2_3,
-        &pmx_uart1,
-        &pmx_uart2,
-        &pmx_uart3_4_5,
-        &pmx_fsmc,
-        &pmx_rs485_0_1,
-        &pmx_tdm0,
+        &spear310_pmx_emi_cs_0_1_4_5,
+        &spear310_pmx_emi_cs_2_3,
+        &spear310_pmx_uart1,
+        &spear310_pmx_uart2,
+        &spear310_pmx_uart3_4_5,
+        &spear310_pmx_fsmc,
+        &spear310_pmx_rs485_0_1,
+        &spear310_pmx_tdm0,
 };
 
 static struct amba_device *amba_devs[] __initdata = {
         /* spear3xx specific devices */
-        &gpio_device,
-        &uart_device,
+        &spear3xx_gpio_device,
+        &spear3xx_uart_device,
 
         /* spear310 specific devices */
 };
@@ -58,13 +58,8 @@ static void __init spear310_evb_init(void)
 {
         unsigned int i;
 
-        /* padmux initialization, must be done before spear310_init */
-        pmx_driver.mode = NULL;
-        pmx_driver.devs = pmx_devs;
-        pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
-
         /* call spear310 machine init function */
-        spear310_init();
+        spear310_init(NULL, pmx_devs, ARRAY_SIZE(pmx_devs));
 
         /* Add Platform Devices */
         platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 741c1f414cbd..ee29bef43074 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -29,88 +29,88 @@
 #define SMALL_PRINTERS_MODE     (1 << 3)
 #define ALL_MODES               0xF
 
-struct pmx_mode auto_net_smii_mode = {
+struct pmx_mode spear320_auto_net_smii_mode = {
         .id = AUTO_NET_SMII_MODE,
         .name = "Automation Networking SMII Mode",
         .mask = 0x00,
 };
 
-struct pmx_mode auto_net_mii_mode = {
+struct pmx_mode spear320_auto_net_mii_mode = {
         .id = AUTO_NET_MII_MODE,
         .name = "Automation Networking MII Mode",
         .mask = 0x01,
 };
 
-struct pmx_mode auto_exp_mode = {
+struct pmx_mode spear320_auto_exp_mode = {
         .id = AUTO_EXP_MODE,
         .name = "Automation Expanded Mode",
         .mask = 0x02,
 };
 
-struct pmx_mode small_printers_mode = {
+struct pmx_mode spear320_small_printers_mode = {
         .id = SMALL_PRINTERS_MODE,
         .name = "Small Printers Mode",
         .mask = 0x03,
 };
 
 /* devices */
-struct pmx_dev_mode pmx_clcd_modes[] = {
+static struct pmx_dev_mode pmx_clcd_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE,
                 .mask = 0x0,
         },
 };
 
-struct pmx_dev pmx_clcd = {
+struct pmx_dev spear320_pmx_clcd = {
         .name = "clcd",
         .modes = pmx_clcd_modes,
         .mode_count = ARRAY_SIZE(pmx_clcd_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_emi_modes[] = {
+static struct pmx_dev_mode pmx_emi_modes[] = {
         {
                 .ids = AUTO_EXP_MODE,
                 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
         },
 };
 
-struct pmx_dev pmx_emi = {
+struct pmx_dev spear320_pmx_emi = {
         .name = "emi",
         .modes = pmx_emi_modes,
         .mode_count = ARRAY_SIZE(pmx_emi_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_fsmc_modes[] = {
+static struct pmx_dev_mode pmx_fsmc_modes[] = {
         {
                 .ids = ALL_MODES,
                 .mask = 0x0,
         },
 };
 
-struct pmx_dev pmx_fsmc = {
+struct pmx_dev spear320_pmx_fsmc = {
         .name = "fsmc",
         .modes = pmx_fsmc_modes,
         .mode_count = ARRAY_SIZE(pmx_fsmc_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_spp_modes[] = {
+static struct pmx_dev_mode pmx_spp_modes[] = {
         {
                 .ids = SMALL_PRINTERS_MODE,
                 .mask = 0x0,
         },
 };
 
-struct pmx_dev pmx_spp = {
+struct pmx_dev spear320_pmx_spp = {
         .name = "spp",
         .modes = pmx_spp_modes,
         .mode_count = ARRAY_SIZE(pmx_spp_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_sdhci_modes[] = {
+static struct pmx_dev_mode pmx_sdhci_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |
                         SMALL_PRINTERS_MODE,
@@ -118,42 +118,42 @@ struct pmx_dev_mode pmx_sdhci_modes[] = {
         },
 };
 
-struct pmx_dev pmx_sdhci = {
+struct pmx_dev spear320_pmx_sdhci = {
         .name = "sdhci",
         .modes = pmx_sdhci_modes,
         .mode_count = ARRAY_SIZE(pmx_sdhci_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_i2s_modes[] = {
+static struct pmx_dev_mode pmx_i2s_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
                 .mask = PMX_UART0_MODEM_MASK,
         },
 };
 
-struct pmx_dev pmx_i2s = {
+struct pmx_dev spear320_pmx_i2s = {
         .name = "i2s",
         .modes = pmx_i2s_modes,
         .mode_count = ARRAY_SIZE(pmx_i2s_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart1_modes[] = {
+static struct pmx_dev_mode pmx_uart1_modes[] = {
         {
                 .ids = ALL_MODES,
                 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK,
         },
 };
 
-struct pmx_dev pmx_uart1 = {
+struct pmx_dev spear320_pmx_uart1 = {
         .name = "uart1",
         .modes = pmx_uart1_modes,
         .mode_count = ARRAY_SIZE(pmx_uart1_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart1_modem_modes[] = {
+static struct pmx_dev_mode pmx_uart1_modem_modes[] = {
         {
                 .ids = AUTO_EXP_MODE,
                 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK |
@@ -165,42 +165,42 @@ struct pmx_dev_mode pmx_uart1_modem_modes[] = {
         },
 };
 
-struct pmx_dev pmx_uart1_modem = {
+struct pmx_dev spear320_pmx_uart1_modem = {
         .name = "uart1_modem",
         .modes = pmx_uart1_modem_modes,
         .mode_count = ARRAY_SIZE(pmx_uart1_modem_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_uart2_modes[] = {
+static struct pmx_dev_mode pmx_uart2_modes[] = {
         {
                 .ids = ALL_MODES,
                 .mask = PMX_FIRDA_MASK,
         },
 };
 
-struct pmx_dev pmx_uart2 = {
+struct pmx_dev spear320_pmx_uart2 = {
         .name = "uart2",
         .modes = pmx_uart2_modes,
         .mode_count = ARRAY_SIZE(pmx_uart2_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_touchscreen_modes[] = {
+static struct pmx_dev_mode pmx_touchscreen_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE,
                 .mask = PMX_SSP_CS_MASK,
         },
 };
 
-struct pmx_dev pmx_touchscreen = {
+struct pmx_dev spear320_pmx_touchscreen = {
         .name = "touchscreen",
         .modes = pmx_touchscreen_modes,
         .mode_count = ARRAY_SIZE(pmx_touchscreen_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_can_modes[] = {
+static struct pmx_dev_mode pmx_can_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE,
                 .mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
@@ -208,28 +208,28 @@ struct pmx_dev_mode pmx_can_modes[] = {
         },
 };
 
-struct pmx_dev pmx_can = {
+struct pmx_dev spear320_pmx_can = {
         .name = "can",
         .modes = pmx_can_modes,
         .mode_count = ARRAY_SIZE(pmx_can_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_sdhci_led_modes[] = {
+static struct pmx_dev_mode pmx_sdhci_led_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
                 .mask = PMX_SSP_CS_MASK,
         },
 };
 
-struct pmx_dev pmx_sdhci_led = {
+struct pmx_dev spear320_pmx_sdhci_led = {
         .name = "sdhci_led",
         .modes = pmx_sdhci_led_modes,
         .mode_count = ARRAY_SIZE(pmx_sdhci_led_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_pwm0_modes[] = {
+static struct pmx_dev_mode pmx_pwm0_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
                 .mask = PMX_UART0_MODEM_MASK,
@@ -239,14 +239,14 @@ struct pmx_dev_mode pmx_pwm0_modes[] = {
         },
 };
 
-struct pmx_dev pmx_pwm0 = {
+struct pmx_dev spear320_pmx_pwm0 = {
         .name = "pwm0",
         .modes = pmx_pwm0_modes,
         .mode_count = ARRAY_SIZE(pmx_pwm0_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_pwm1_modes[] = {
+static struct pmx_dev_mode pmx_pwm1_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
                 .mask = PMX_UART0_MODEM_MASK,
@@ -256,14 +256,14 @@ struct pmx_dev_mode pmx_pwm1_modes[] = {
         },
 };
 
-struct pmx_dev pmx_pwm1 = {
+struct pmx_dev spear320_pmx_pwm1 = {
         .name = "pwm1",
         .modes = pmx_pwm1_modes,
         .mode_count = ARRAY_SIZE(pmx_pwm1_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_pwm2_modes[] = {
+static struct pmx_dev_mode pmx_pwm2_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
                 .mask = PMX_SSP_CS_MASK,
@@ -273,105 +273,105 @@ struct pmx_dev_mode pmx_pwm2_modes[] = {
         },
 };
 
-struct pmx_dev pmx_pwm2 = {
+struct pmx_dev spear320_pmx_pwm2 = {
         .name = "pwm2",
         .modes = pmx_pwm2_modes,
         .mode_count = ARRAY_SIZE(pmx_pwm2_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_pwm3_modes[] = {
+static struct pmx_dev_mode pmx_pwm3_modes[] = {
         {
                 .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_pwm3 = {
+struct pmx_dev spear320_pmx_pwm3 = {
         .name = "pwm3",
         .modes = pmx_pwm3_modes,
         .mode_count = ARRAY_SIZE(pmx_pwm3_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_ssp1_modes[] = {
+static struct pmx_dev_mode pmx_ssp1_modes[] = {
         {
                 .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_ssp1 = {
+struct pmx_dev spear320_pmx_ssp1 = {
         .name = "ssp1",
         .modes = pmx_ssp1_modes,
         .mode_count = ARRAY_SIZE(pmx_ssp1_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_ssp2_modes[] = {
+static struct pmx_dev_mode pmx_ssp2_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_ssp2 = {
+struct pmx_dev spear320_pmx_ssp2 = {
         .name = "ssp2",
         .modes = pmx_ssp2_modes,
         .mode_count = ARRAY_SIZE(pmx_ssp2_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_mii1_modes[] = {
+static struct pmx_dev_mode pmx_mii1_modes[] = {
         {
                 .ids = AUTO_NET_MII_MODE,
                 .mask = 0x0,
         },
 };
 
-struct pmx_dev pmx_mii1 = {
+struct pmx_dev spear320_pmx_mii1 = {
         .name = "mii1",
         .modes = pmx_mii1_modes,
         .mode_count = ARRAY_SIZE(pmx_mii1_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_smii0_modes[] = {
+static struct pmx_dev_mode pmx_smii0_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_smii0 = {
+struct pmx_dev spear320_pmx_smii0 = {
         .name = "smii0",
         .modes = pmx_smii0_modes,
         .mode_count = ARRAY_SIZE(pmx_smii0_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_smii1_modes[] = {
+static struct pmx_dev_mode pmx_smii1_modes[] = {
         {
                 .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_smii1 = {
+struct pmx_dev spear320_pmx_smii1 = {
         .name = "smii1",
         .modes = pmx_smii1_modes,
         .mode_count = ARRAY_SIZE(pmx_smii1_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_i2c1_modes[] = {
+static struct pmx_dev_mode pmx_i2c1_modes[] = {
         {
                 .ids = AUTO_EXP_MODE,
                 .mask = 0x0,
         },
 };
 
-struct pmx_dev pmx_i2c1 = {
+struct pmx_dev spear320_pmx_i2c1 = {
         .name = "i2c1",
         .modes = pmx_i2c1_modes,
         .mode_count = ARRAY_SIZE(pmx_i2c1_modes),
@@ -379,131 +379,131 @@ struct pmx_dev pmx_i2c1 = {
 };
 
 /* pmx driver structure */
-struct pmx_driver pmx_driver = {
+static struct pmx_driver pmx_driver = {
         .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007},
         .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
 };
 
 /* spear3xx shared irq */
-struct shirq_dev_config shirq_ras1_config[] = {
+static struct shirq_dev_config shirq_ras1_config[] = {
         {
-                .virq = VIRQ_EMI,
-                .status_mask = EMI_IRQ_MASK,
-                .clear_mask = EMI_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_EMI,
+                .status_mask = SPEAR320_EMI_IRQ_MASK,
+                .clear_mask = SPEAR320_EMI_IRQ_MASK,
         }, {
-                .virq = VIRQ_CLCD,
-                .status_mask = CLCD_IRQ_MASK,
-                .clear_mask = CLCD_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_CLCD,
+                .status_mask = SPEAR320_CLCD_IRQ_MASK,
+                .clear_mask = SPEAR320_CLCD_IRQ_MASK,
         }, {
-                .virq = VIRQ_SPP,
-                .status_mask = SPP_IRQ_MASK,
-                .clear_mask = SPP_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_SPP,
+                .status_mask = SPEAR320_SPP_IRQ_MASK,
+                .clear_mask = SPEAR320_SPP_IRQ_MASK,
         },
 };
 
-struct spear_shirq shirq_ras1 = {
-        .irq = IRQ_GEN_RAS_1,
+static struct spear_shirq shirq_ras1 = {
+        .irq = SPEAR3XX_IRQ_GEN_RAS_1,
         .dev_config = shirq_ras1_config,
         .dev_count = ARRAY_SIZE(shirq_ras1_config),
         .regs = {
                 .enb_reg = -1,
-                .status_reg = INT_STS_MASK_REG,
-                .status_reg_mask = SHIRQ_RAS1_MASK,
-                .clear_reg = INT_CLR_MASK_REG,
+                .status_reg = SPEAR320_INT_STS_MASK_REG,
+                .status_reg_mask = SPEAR320_SHIRQ_RAS1_MASK,
+                .clear_reg = SPEAR320_INT_CLR_MASK_REG,
                 .reset_to_clear = 1,
         },
 };
 
-struct shirq_dev_config shirq_ras3_config[] = {
+static struct shirq_dev_config shirq_ras3_config[] = {
         {
-                .virq = VIRQ_PLGPIO,
-                .enb_mask = GPIO_IRQ_MASK,
-                .status_mask = GPIO_IRQ_MASK,
-                .clear_mask = GPIO_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_PLGPIO,
+                .enb_mask = SPEAR320_GPIO_IRQ_MASK,
+                .status_mask = SPEAR320_GPIO_IRQ_MASK,
+                .clear_mask = SPEAR320_GPIO_IRQ_MASK,
         }, {
-                .virq = VIRQ_I2S_PLAY,
-                .enb_mask = I2S_PLAY_IRQ_MASK,
-                .status_mask = I2S_PLAY_IRQ_MASK,
-                .clear_mask = I2S_PLAY_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_I2S_PLAY,
+                .enb_mask = SPEAR320_I2S_PLAY_IRQ_MASK,
+                .status_mask = SPEAR320_I2S_PLAY_IRQ_MASK,
+                .clear_mask = SPEAR320_I2S_PLAY_IRQ_MASK,
         }, {
-                .virq = VIRQ_I2S_REC,
-                .enb_mask = I2S_REC_IRQ_MASK,
-                .status_mask = I2S_REC_IRQ_MASK,
-                .clear_mask = I2S_REC_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_I2S_REC,
+                .enb_mask = SPEAR320_I2S_REC_IRQ_MASK,
+                .status_mask = SPEAR320_I2S_REC_IRQ_MASK,
+                .clear_mask = SPEAR320_I2S_REC_IRQ_MASK,
         },
 };
 
-struct spear_shirq shirq_ras3 = {
-        .irq = IRQ_GEN_RAS_3,
+static struct spear_shirq shirq_ras3 = {
+        .irq = SPEAR3XX_IRQ_GEN_RAS_3,
         .dev_config = shirq_ras3_config,
         .dev_count = ARRAY_SIZE(shirq_ras3_config),
         .regs = {
-                .enb_reg = INT_ENB_MASK_REG,
+                .enb_reg = SPEAR320_INT_ENB_MASK_REG,
                 .reset_to_enb = 1,
-                .status_reg = INT_STS_MASK_REG,
-                .status_reg_mask = SHIRQ_RAS3_MASK,
-                .clear_reg = INT_CLR_MASK_REG,
+                .status_reg = SPEAR320_INT_STS_MASK_REG,
+                .status_reg_mask = SPEAR320_SHIRQ_RAS3_MASK,
+                .clear_reg = SPEAR320_INT_CLR_MASK_REG,
                 .reset_to_clear = 1,
         },
 };
 
-struct shirq_dev_config shirq_intrcomm_ras_config[] = {
+static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
         {
-                .virq = VIRQ_CANU,
-                .status_mask = CAN_U_IRQ_MASK,
-                .clear_mask = CAN_U_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_CANU,
+                .status_mask = SPEAR320_CAN_U_IRQ_MASK,
+                .clear_mask = SPEAR320_CAN_U_IRQ_MASK,
         }, {
-                .virq = VIRQ_CANL,
-                .status_mask = CAN_L_IRQ_MASK,
-                .clear_mask = CAN_L_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_CANL,
+                .status_mask = SPEAR320_CAN_L_IRQ_MASK,
+                .clear_mask = SPEAR320_CAN_L_IRQ_MASK,
         }, {
-                .virq = VIRQ_UART1,
-                .status_mask = UART1_IRQ_MASK,
-                .clear_mask = UART1_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_UART1,
+                .status_mask = SPEAR320_UART1_IRQ_MASK,
+                .clear_mask = SPEAR320_UART1_IRQ_MASK,
         }, {
-                .virq = VIRQ_UART2,
-                .status_mask = UART2_IRQ_MASK,
-                .clear_mask = UART2_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_UART2,
+                .status_mask = SPEAR320_UART2_IRQ_MASK,
+                .clear_mask = SPEAR320_UART2_IRQ_MASK,
         }, {
-                .virq = VIRQ_SSP1,
-                .status_mask = SSP1_IRQ_MASK,
-                .clear_mask = SSP1_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_SSP1,
+                .status_mask = SPEAR320_SSP1_IRQ_MASK,
+                .clear_mask = SPEAR320_SSP1_IRQ_MASK,
         }, {
-                .virq = VIRQ_SSP2,
-                .status_mask = SSP2_IRQ_MASK,
-                .clear_mask = SSP2_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_SSP2,
+                .status_mask = SPEAR320_SSP2_IRQ_MASK,
+                .clear_mask = SPEAR320_SSP2_IRQ_MASK,
         }, {
-                .virq = VIRQ_SMII0,
-                .status_mask = SMII0_IRQ_MASK,
-                .clear_mask = SMII0_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_SMII0,
+                .status_mask = SPEAR320_SMII0_IRQ_MASK,
+                .clear_mask = SPEAR320_SMII0_IRQ_MASK,
         }, {
-                .virq = VIRQ_MII1_SMII1,
-                .status_mask = MII1_SMII1_IRQ_MASK,
-                .clear_mask = MII1_SMII1_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_MII1_SMII1,
+                .status_mask = SPEAR320_MII1_SMII1_IRQ_MASK,
+                .clear_mask = SPEAR320_MII1_SMII1_IRQ_MASK,
         }, {
-                .virq = VIRQ_WAKEUP_SMII0,
-                .status_mask = WAKEUP_SMII0_IRQ_MASK,
-                .clear_mask = WAKEUP_SMII0_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_WAKEUP_SMII0,
+                .status_mask = SPEAR320_WAKEUP_SMII0_IRQ_MASK,
+                .clear_mask = SPEAR320_WAKEUP_SMII0_IRQ_MASK,
         }, {
-                .virq = VIRQ_WAKEUP_MII1_SMII1,
-                .status_mask = WAKEUP_MII1_SMII1_IRQ_MASK,
-                .clear_mask = WAKEUP_MII1_SMII1_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_WAKEUP_MII1_SMII1,
+                .status_mask = SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK,
+                .clear_mask = SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK,
         }, {
-                .virq = VIRQ_I2C,
-                .status_mask = I2C1_IRQ_MASK,
-                .clear_mask = I2C1_IRQ_MASK,
+                .virq = SPEAR320_VIRQ_I2C1,
+                .status_mask = SPEAR320_I2C1_IRQ_MASK,
+                .clear_mask = SPEAR320_I2C1_IRQ_MASK,
         },
 };
 
-struct spear_shirq shirq_intrcomm_ras = {
-        .irq = IRQ_INTRCOMM_RAS_ARM,
+static struct spear_shirq shirq_intrcomm_ras = {
+        .irq = SPEAR3XX_IRQ_INTRCOMM_RAS_ARM,
         .dev_config = shirq_intrcomm_ras_config,
         .dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
         .regs = {
                 .enb_reg = -1,
-                .status_reg = INT_STS_MASK_REG,
-                .status_reg_mask = SHIRQ_INTRCOMM_RAS_MASK,
-                .clear_reg = INT_CLR_MASK_REG,
+                .status_reg = SPEAR320_INT_STS_MASK_REG,
+                .status_reg_mask = SPEAR320_SHIRQ_INTRCOMM_RAS_MASK,
+                .clear_reg = SPEAR320_INT_CLR_MASK_REG,
                 .reset_to_clear = 1,
         },
 };
@@ -511,7 +511,8 @@ struct spear_shirq shirq_intrcomm_ras = {
 /* Add spear320 specific devices here */
 
 /* spear320 routines */
-void __init spear320_init(void)
+void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
+                u8 pmx_dev_count)
 {
         void __iomem *base;
         int ret = 0;
@@ -543,6 +544,10 @@ void __init spear320_init(void)
 
         /* pmx initialization */
         pmx_driver.base = base;
+        pmx_driver.mode = pmx_mode;
+        pmx_driver.devs = pmx_devs;
+        pmx_driver.devs_count = pmx_dev_count;
+
         ret = pmx_register(&pmx_driver);
         if (ret)
                 printk(KERN_ERR "padmux: registeration failed. err no: %d\n",
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 8213e4b66c14..a12b353940d6 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -19,28 +19,28 @@
 /* padmux devices to enable */
 static struct pmx_dev *pmx_devs[] = {
         /* spear3xx specific devices */
-        &pmx_i2c,
-        &pmx_ssp,
-        &pmx_mii,
-        &pmx_uart0,
+        &spear3xx_pmx_i2c,
+        &spear3xx_pmx_ssp,
+        &spear3xx_pmx_mii,
+        &spear3xx_pmx_uart0,
 
         /* spear320 specific devices */
-        &pmx_fsmc,
-        &pmx_sdhci,
-        &pmx_i2s,
-        &pmx_uart1,
-        &pmx_uart2,
-        &pmx_can,
-        &pmx_pwm0,
-        &pmx_pwm1,
-        &pmx_pwm2,
-        &pmx_mii1,
+        &spear320_pmx_fsmc,
+        &spear320_pmx_sdhci,
+        &spear320_pmx_i2s,
+        &spear320_pmx_uart1,
+        &spear320_pmx_uart2,
+        &spear320_pmx_can,
+        &spear320_pmx_pwm0,
+        &spear320_pmx_pwm1,
+        &spear320_pmx_pwm2,
+        &spear320_pmx_mii1,
 };
 
 static struct amba_device *amba_devs[] __initdata = {
         /* spear3xx specific devices */
-        &gpio_device,
-        &uart_device,
+        &spear3xx_gpio_device,
+        &spear3xx_uart_device,
 
         /* spear320 specific devices */
 };
@@ -55,13 +55,9 @@ static void __init spear320_evb_init(void)
 {
         unsigned int i;
 
-        /* padmux initialization, must be done before spear320_init */
-        pmx_driver.mode = &auto_net_mii_mode;
-        pmx_driver.devs = pmx_devs;
-        pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
-
         /* call spear320 machine init function */
-        spear320_init();
+        spear320_init(&spear320_auto_net_mii_mode, pmx_devs,
+                        ARRAY_SIZE(pmx_devs));
 
         /* Add Platform Devices */
         platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index d3ba8ca1bc59..10af45da86a0 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -25,10 +25,10 @@
 /* gpio device registration */
 static struct pl061_platform_data gpio_plat_data = {
         .gpio_base      = 0,
-        .irq_base       = SPEAR_GPIO_INT_BASE,
+        .irq_base       = SPEAR3XX_GPIO_INT_BASE,
 };
 
-struct amba_device gpio_device = {
+struct amba_device spear3xx_gpio_device = {
         .dev = {
                 .init_name = "gpio",
                 .platform_data = &gpio_plat_data,
@@ -38,11 +38,11 @@ struct amba_device gpio_device = {
                 .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1,
                 .flags = IORESOURCE_MEM,
         },
-        .irq = {IRQ_BASIC_GPIO, NO_IRQ},
+        .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ},
 };
 
 /* uart device registration */
-struct amba_device uart_device = {
+struct amba_device spear3xx_uart_device = {
         .dev = {
                 .init_name = "uart",
         },
@@ -51,7 +51,7 @@ struct amba_device uart_device = {
                 .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1,
                 .flags = IORESOURCE_MEM,
         },
-        .irq = {IRQ_UART, NO_IRQ},
+        .irq = {SPEAR3XX_IRQ_UART, NO_IRQ},
 };
 
 /* Do spear3xx familiy common initialization part here */
@@ -97,215 +97,215 @@ void __init spear3xx_map_io(void)
         iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc));
 
         /* This will initialize clock framework */
-        clk_init();
+        spear3xx_clk_init();
 }
 
 /* pad multiplexing support */
 /* devices */
-struct pmx_dev_mode pmx_firda_modes[] = {
+static struct pmx_dev_mode pmx_firda_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_FIRDA_MASK,
         },
 };
 
-struct pmx_dev pmx_firda = {
+struct pmx_dev spear3xx_pmx_firda = {
         .name = "firda",
         .modes = pmx_firda_modes,
         .mode_count = ARRAY_SIZE(pmx_firda_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_i2c_modes[] = {
+static struct pmx_dev_mode pmx_i2c_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_I2C_MASK,
         },
 };
 
-struct pmx_dev pmx_i2c = {
+struct pmx_dev spear3xx_pmx_i2c = {
         .name = "i2c",
         .modes = pmx_i2c_modes,
         .mode_count = ARRAY_SIZE(pmx_i2c_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_ssp_cs_modes[] = {
+static struct pmx_dev_mode pmx_ssp_cs_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_SSP_CS_MASK,
         },
 };
 
-struct pmx_dev pmx_ssp_cs = {
+struct pmx_dev spear3xx_pmx_ssp_cs = {
         .name = "ssp_chip_selects",
         .modes = pmx_ssp_cs_modes,
         .mode_count = ARRAY_SIZE(pmx_ssp_cs_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_ssp_modes[] = {
+static struct pmx_dev_mode pmx_ssp_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_SSP_MASK,
         },
 };
 
-struct pmx_dev pmx_ssp = {
+struct pmx_dev spear3xx_pmx_ssp = {
         .name = "ssp",
         .modes = pmx_ssp_modes,
         .mode_count = ARRAY_SIZE(pmx_ssp_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_mii_modes[] = {
+static struct pmx_dev_mode pmx_mii_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_mii = {
+struct pmx_dev spear3xx_pmx_mii = {
         .name = "mii",
         .modes = pmx_mii_modes,
         .mode_count = ARRAY_SIZE(pmx_mii_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_GPIO_PIN0_MASK,
         },
 };
 
-struct pmx_dev pmx_gpio_pin0 = {
+struct pmx_dev spear3xx_pmx_gpio_pin0 = {
         .name = "gpio_pin0",
         .modes = pmx_gpio_pin0_modes,
         .mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_GPIO_PIN1_MASK,
         },
 };
 
-struct pmx_dev pmx_gpio_pin1 = {
+struct pmx_dev spear3xx_pmx_gpio_pin1 = {
         .name = "gpio_pin1",
         .modes = pmx_gpio_pin1_modes,
         .mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_GPIO_PIN2_MASK,
         },
 };
 
-struct pmx_dev pmx_gpio_pin2 = {
+struct pmx_dev spear3xx_pmx_gpio_pin2 = {
         .name = "gpio_pin2",
         .modes = pmx_gpio_pin2_modes,
         .mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_GPIO_PIN3_MASK,
         },
 };
 
-struct pmx_dev pmx_gpio_pin3 = {
+struct pmx_dev spear3xx_pmx_gpio_pin3 = {
         .name = "gpio_pin3",
         .modes = pmx_gpio_pin3_modes,
         .mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_GPIO_PIN4_MASK,
         },
 };
 
-struct pmx_dev pmx_gpio_pin4 = {
+struct pmx_dev spear3xx_pmx_gpio_pin4 = {
         .name = "gpio_pin4",
         .modes = pmx_gpio_pin4_modes,
         .mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
+static struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_GPIO_PIN5_MASK,
         },
 };
 
-struct pmx_dev pmx_gpio_pin5 = {
+struct pmx_dev spear3xx_pmx_gpio_pin5 = {
         .name = "gpio_pin5",
         .modes = pmx_gpio_pin5_modes,
         .mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_uart0_modem_modes[] = {
+static struct pmx_dev_mode pmx_uart0_modem_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_UART0_MODEM_MASK,
         },
 };
 
-struct pmx_dev pmx_uart0_modem = {
+struct pmx_dev spear3xx_pmx_uart0_modem = {
         .name = "uart0_modem",
         .modes = pmx_uart0_modem_modes,
         .mode_count = ARRAY_SIZE(pmx_uart0_modem_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_uart0_modes[] = {
+static struct pmx_dev_mode pmx_uart0_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_UART0_MASK,
         },
 };
 
-struct pmx_dev pmx_uart0 = {
+struct pmx_dev spear3xx_pmx_uart0 = {
         .name = "uart0",
         .modes = pmx_uart0_modes,
         .mode_count = ARRAY_SIZE(pmx_uart0_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_timer_3_4_modes[] = {
+static struct pmx_dev_mode pmx_timer_3_4_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_TIMER_3_4_MASK,
         },
 };
 
-struct pmx_dev pmx_timer_3_4 = {
+struct pmx_dev spear3xx_pmx_timer_3_4 = {
         .name = "timer_3_4",
         .modes = pmx_timer_3_4_modes,
         .mode_count = ARRAY_SIZE(pmx_timer_3_4_modes),
         .enb_on_reset = 0,
 };
 
-struct pmx_dev_mode pmx_timer_1_2_modes[] = {
+static struct pmx_dev_mode pmx_timer_1_2_modes[] = {
         {
                 .ids = 0xffffffff,
                 .mask = PMX_TIMER_1_2_MASK,
         },
 };
 
-struct pmx_dev pmx_timer_1_2 = {
+struct pmx_dev spear3xx_pmx_timer_1_2 = {
         .name = "timer_1_2",
         .modes = pmx_timer_1_2_modes,
         .mode_count = ARRAY_SIZE(pmx_timer_1_2_modes),
@@ -314,210 +314,210 @@ struct pmx_dev pmx_timer_1_2 = {
 
 #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
 /* plgpios devices */
-struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_FIRDA_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_0_1 = {
+struct pmx_dev spear3xx_pmx_plgpio_0_1 = {
         .name = "plgpio 0 and 1",
         .modes = pmx_plgpio_0_1_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_UART0_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_2_3 = {
+struct pmx_dev spear3xx_pmx_plgpio_2_3 = {
         .name = "plgpio 2 and 3",
         .modes = pmx_plgpio_2_3_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_I2C_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_4_5 = {
+struct pmx_dev spear3xx_pmx_plgpio_4_5 = {
         .name = "plgpio 4 and 5",
         .modes = pmx_plgpio_4_5_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_SSP_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_6_9 = {
+struct pmx_dev spear3xx_pmx_plgpio_6_9 = {
         .name = "plgpio 6 to 9",
         .modes = pmx_plgpio_6_9_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_MII_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_10_27 = {
+struct pmx_dev spear3xx_pmx_plgpio_10_27 = {
         .name = "plgpio 10 to 27",
         .modes = pmx_plgpio_10_27_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_28_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_28_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_GPIO_PIN0_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_28 = {
+struct pmx_dev spear3xx_pmx_plgpio_28 = {
         .name = "plgpio 28",
         .modes = pmx_plgpio_28_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_28_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_29_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_29_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_GPIO_PIN1_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_29 = {
+struct pmx_dev spear3xx_pmx_plgpio_29 = {
         .name = "plgpio 29",
         .modes = pmx_plgpio_29_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_29_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_30_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_30_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_GPIO_PIN2_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_30 = {
+struct pmx_dev spear3xx_pmx_plgpio_30 = {
         .name = "plgpio 30",
         .modes = pmx_plgpio_30_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_30_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_31_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_31_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_GPIO_PIN3_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_31 = {
+struct pmx_dev spear3xx_pmx_plgpio_31 = {
         .name = "plgpio 31",
         .modes = pmx_plgpio_31_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_31_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_32_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_32_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_GPIO_PIN4_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_32 = {
+struct pmx_dev spear3xx_pmx_plgpio_32 = {
         .name = "plgpio 32",
         .modes = pmx_plgpio_32_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_32_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_33_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_33_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_GPIO_PIN5_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_33 = {
+struct pmx_dev spear3xx_pmx_plgpio_33 = {
         .name = "plgpio 33",
         .modes = pmx_plgpio_33_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_33_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_SSP_CS_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_34_36 = {
+struct pmx_dev spear3xx_pmx_plgpio_34_36 = {
         .name = "plgpio 34 to 36",
         .modes = pmx_plgpio_34_36_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_UART0_MODEM_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_37_42 = {
+struct pmx_dev spear3xx_pmx_plgpio_37_42 = {
         .name = "plgpio 37 to 42",
         .modes = pmx_plgpio_37_42_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_TIMER_1_2_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_43_44_47_48 = {
+struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48 = {
         .name = "plgpio 43, 44, 47 and 48",
         .modes = pmx_plgpio_43_44_47_48_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes),
         .enb_on_reset = 1,
 };
 
-struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
+static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
         {
                 .ids = 0x00,
                 .mask = PMX_TIMER_3_4_MASK,
         },
 };
 
-struct pmx_dev pmx_plgpio_45_46_49_50 = {
+struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50 = {
         .name = "plgpio 45, 46, 49 and 50",
         .modes = pmx_plgpio_45_46_49_50_modes,
         .mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes),
diff --git a/arch/arm/mach-spear6xx/Kconfig b/arch/arm/mach-spear6xx/Kconfig
index bddba034f862..ff4ae5ba00f1 100644
--- a/arch/arm/mach-spear6xx/Kconfig
+++ b/arch/arm/mach-spear6xx/Kconfig
@@ -4,17 +4,18 @@
 
 if ARCH_SPEAR6XX
 
-choice
-        prompt "SPEAr6XX Family"
-        default MACH_SPEAR600
+menu "SPEAr6xx Implementations"
+config BOARD_SPEAR600_EVB
+        bool "SPEAr600 Evaluation Board"
+        select MACH_SPEAR600
+        help
+          Supports ST SPEAr600 Evaluation Board
+
+endmenu
 
 config MACH_SPEAR600
         bool "SPEAr600"
         help
           Supports ST SPEAr600 Machine
-endchoice
-
-# Adding SPEAr6XX machine specific configuration files
-source "arch/arm/mach-spear6xx/Kconfig600"
 
 endif #ARCH_SPEAR6XX
diff --git a/arch/arm/mach-spear6xx/Kconfig600 b/arch/arm/mach-spear6xx/Kconfig600
deleted file mode 100644
index 9e19f65eb78e..000000000000
--- a/arch/arm/mach-spear6xx/Kconfig600
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# SPEAr600 machine configuration file
-#
-
-if MACH_SPEAR600
-
-choice
-        prompt "SPEAr600 Boards"
-        default BOARD_SPEAR600_EVB
-
-config  BOARD_SPEAR600_EVB
-        bool "SPEAr600 Evaluation Board"
-        help
-          Supports ST SPEAr600 Evaluation Board
-endchoice
-
-endif   #MACH_SPEAR600
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
index 88b748b5be80..ac70e0d88fef 100644
--- a/arch/arm/mach-spear6xx/clock.c
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -671,12 +671,12 @@ static struct clk_lookup spear_clk_lookups[] = {
         { .dev_id = "gpio2",            .clk = &gpio2_clk},
 };
 
-void __init clk_init(void)
+void __init spear6xx_clk_init(void)
 {
         int i;
 
         for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++)
                 clk_register(&spear_clk_lookups[i]);
 
-        recalc_root_clocks();
+        clk_init();
 }
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
index 94cf4a648b57..183f0238c5e2 100644
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -39,7 +39,7 @@ void __init spear6xx_map_io(void);
 void __init spear6xx_init_irq(void);
 void __init spear6xx_init(void);
 void __init spear600_init(void);
-void __init clk_init(void);
+void __init spear6xx_clk_init(void);
 
 /* Add spear600 machine device structure declarations here */
 
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 981812961ac7..e0f6628c8b2c 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -148,7 +148,7 @@ void __init spear6xx_map_io(void)
         iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
 
         /* This will initialize clock framework */
-        clk_init();
+        spear6xx_clk_init();
 }
 
 static void __init spear6xx_timer_init(void)
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 2b269c955524..1a8d4aa821be 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -253,8 +253,8 @@ void __sync_icache_dcache(pte_t pteval)
 
         if (!test_and_set_bit(PG_dcache_clean, &page->flags))
                 __flush_dcache_page(mapping, page);
-        /* pte_exec() already checked above for non-aliasing VIPT cache */
-        if (cache_is_vipt_nonaliasing() || pte_exec(pteval))
+
+        if (pte_exec(pteval))
                 __flush_icache_all();
 }
 #endif
@@ -275,7 +275,8 @@ void __sync_icache_dcache(pte_t pteval)
  *  kernel cache lines for later.  Otherwise, we assume we have
  *  aliasing mappings.
  *
- * Note that we disable the lazy flush for SMP.
+ * Note that we disable the lazy flush for SMP configurations where
+ * the cache maintenance operations are not automatically broadcasted.
  */
 void flush_dcache_page(struct page *page)
 {
diff --git a/arch/arm/plat-spear/clock.c b/arch/arm/plat-spear/clock.c
index bdbd7ec9cb6b..6fa474cb398e 100644
--- a/arch/arm/plat-spear/clock.c
+++ b/arch/arm/plat-spear/clock.c
@@ -903,6 +903,11 @@ void recalc_root_clocks(void)
         spin_unlock_irqrestore(&clocks_lock, flags);
 }
 
+void __init clk_init(void)
+{
+        recalc_root_clocks();
+}
+
 #ifdef CONFIG_DEBUG_FS
 /*
  *      debugfs support to trace clock tree hierarchy and attributes
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h
index fcc0d0ad4a1f..0062bafef12d 100644
--- a/arch/arm/plat-spear/include/plat/clock.h
+++ b/arch/arm/plat-spear/include/plat/clock.h
@@ -224,6 +224,7 @@ struct clcd_rate_tbl {
 };
 
 /* platform specific clock functions */
+void __init clk_init(void);
 void clk_register(struct clk_lookup *cl);
 void recalc_root_clocks(void);
 
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 7ca41f0a09b1..3b3776d0a1a7 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -17,7 +17,7 @@
 # XXX: the last 12 months.  If your entry is missing please email rmk at
 # XXX: <linux@arm.linux.org.uk>
 #
-# Last update: Sun Mar 20 18:06:11 2011
+# Last update: Sat May 7 08:48:24 2011
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -377,6 +377,8 @@ davinci_da850_evm	MACH_DAVINCI_DA850_EVM	DAVINCI_DA850_EVM	2157
 at91sam9g10ek           MACH_AT91SAM9G10EK      AT91SAM9G10EK           2159
 omap_4430sdp            MACH_OMAP_4430SDP       OMAP_4430SDP            2160
 magx_zn5                MACH_MAGX_ZN5           MAGX_ZN5                2162
+btmavb101               MACH_BTMAVB101          BTMAVB101               2172
+btmawb101               MACH_BTMAWB101          BTMAWB101               2173
 omap3_torpedo           MACH_OMAP3_TORPEDO      OMAP3_TORPEDO           2178
 anw6410                 MACH_ANW6410            ANW6410                 2183
 imx27_visstrim_m10      MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10      2187
@@ -400,6 +402,7 @@ d2net			MACH_D2NET		D2NET			2282
 bigdisk                 MACH_BIGDISK            BIGDISK                 2283
 at91sam9g20ek_2mmc      MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC      2288
 bcmring                 MACH_BCMRING            BCMRING                 2289
+dp6xx                   MACH_DP6XX              DP6XX                   2302
 mahimahi                MACH_MAHIMAHI           MAHIMAHI                2304
 smdk6442                MACH_SMDK6442           SMDK6442                2324
 openrd_base             MACH_OPENRD_BASE        OPENRD_BASE             2325
@@ -424,6 +427,7 @@ smdkv210		MACH_SMDKV210		SMDKV210		2456
 omap_zoom3              MACH_OMAP_ZOOM3         OMAP_ZOOM3              2464
 omap_3630sdp            MACH_OMAP_3630SDP       OMAP_3630SDP            2465
 smartq7                 MACH_SMARTQ7            SMARTQ7                 2479
+watson_efm_plugin       MACH_WATSON_EFM_PLUGIN  WATSON_EFM_PLUGIN       2491
 g4evm                   MACH_G4EVM              G4EVM                   2493
 omapl138_hawkboard      MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD      2495
 ts41x                   MACH_TS41X              TS41X                   2502
@@ -433,6 +437,8 @@ mx28evk			MACH_MX28EVK		MX28EVK			2531
 smartq5                 MACH_SMARTQ5            SMARTQ5                 2534
 davinci_dm6467tevm      MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM      2548
 mxt_td60                MACH_MXT_TD60           MXT_TD60                2550
+riot_bei2               MACH_RIOT_BEI2          RIOT_BEI2               2576
+riot_x37                MACH_RIOT_X37           RIOT_X37                2578
 capc7117                MACH_CAPC7117           CAPC7117                2612
 icontrol                MACH_ICONTROL           ICONTROL                2624
 qsd8x50a_st1_5          MACH_QSD8X50A_ST1_5     QSD8X50A_ST1_5          2627
@@ -445,6 +451,7 @@ spear320		MACH_SPEAR320		SPEAR320		2661
 aquila                  MACH_AQUILA             AQUILA                  2676
 sheeva_esata            MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
 msm7x30_surf            MACH_MSM7X30_SURF       MSM7X30_SURF            2679
+ea2478devkit            MACH_EA2478DEVKIT       EA2478DEVKIT            2683
 terastation_wxl         MACH_TERASTATION_WXL    TERASTATION_WXL         2697
 msm7x25_surf            MACH_MSM7X25_SURF       MSM7X25_SURF            2703
 msm7x25_ffa             MACH_MSM7X25_FFA        MSM7X25_FFA             2704
@@ -463,75 +470,16 @@ wbd222			MACH_WBD222		WBD222			2753
 msm8x60_surf            MACH_MSM8X60_SURF       MSM8X60_SURF            2755
 msm8x60_sim             MACH_MSM8X60_SIM        MSM8X60_SIM             2756
 tcc8000_sdk             MACH_TCC8000_SDK        TCC8000_SDK             2758
-ap420                   MACH_AP420              AP420                   2765
-davinci_dm365_fc        MACH_DAVINCI_DM365_FC   DAVINCI_DM365_FC        2767
-msm8x55_surf            MACH_MSM8X55_SURF       MSM8X55_SURF            2768
-msm8x55_ffa             MACH_MSM8X55_FFA        MSM8X55_FFA             2769
-esl_vamana              MACH_ESL_VAMANA         ESL_VAMANA              2770
-sbc35                   MACH_SBC35              SBC35                   2771
-mpx6446                 MACH_MPX6446            MPX6446                 2772
-oreo_controller         MACH_OREO_CONTROLLER    OREO_CONTROLLER         2773
-kopin_models            MACH_KOPIN_MODELS       KOPIN_MODELS            2774
-ttc_vision2             MACH_TTC_VISION2        TTC_VISION2             2775
+nanos                   MACH_NANOS              NANOS                   2759
+stamp9g45               MACH_STAMP9G45          STAMP9G45               2761
 cns3420vb               MACH_CNS3420VB          CNS3420VB               2776
-olympus                 MACH_OLYMPUS            OLYMPUS                 2778
-vortex                  MACH_VORTEX             VORTEX                  2779
-s5pc200                 MACH_S5PC200            S5PC200                 2780
-ecucore_9263            MACH_ECUCORE_9263       ECUCORE_9263            2781
-smdkc200                MACH_SMDKC200           SMDKC200                2782
-emsiso_sx27             MACH_EMSISO_SX27        EMSISO_SX27             2783
-apx_som9g45_ek          MACH_APX_SOM9G45_EK     APX_SOM9G45_EK          2784
-songshan                MACH_SONGSHAN           SONGSHAN                2785
-tianshan                MACH_TIANSHAN           TIANSHAN                2786
-vpx500                  MACH_VPX500             VPX500                  2787
-am3517sam               MACH_AM3517SAM          AM3517SAM               2788
-skat91_sim508           MACH_SKAT91_SIM508      SKAT91_SIM508           2789
-skat91_s3e              MACH_SKAT91_S3E         SKAT91_S3E              2790
 omap4_panda             MACH_OMAP4_PANDA        OMAP4_PANDA             2791
-df7220                  MACH_DF7220             DF7220                  2792
-nemini                  MACH_NEMINI             NEMINI                  2793
-t8200                   MACH_T8200              T8200                   2794
-apf51                   MACH_APF51              APF51                   2795
-dr_rc_unit              MACH_DR_RC_UNIT         DR_RC_UNIT              2796
-bordeaux                MACH_BORDEAUX           BORDEAUX                2797
-catania_b               MACH_CATANIA_B          CATANIA_B               2798
-mx51_ocean              MACH_MX51_OCEAN         MX51_OCEAN              2799
 ti8168evm               MACH_TI8168EVM          TI8168EVM               2800
-neocoreomap             MACH_NEOCOREOMAP        NEOCOREOMAP             2801
-withings_wbp            MACH_WITHINGS_WBP       WITHINGS_WBP            2802
-dbps                    MACH_DBPS               DBPS                    2803
-pcbfp0001               MACH_PCBFP0001          PCBFP0001               2805
-speedy                  MACH_SPEEDY             SPEEDY                  2806
-chrysaor                MACH_CHRYSAOR           CHRYSAOR                2807
-tango                   MACH_TANGO              TANGO                   2808
-synology_dsx11          MACH_SYNOLOGY_DSX11     SYNOLOGY_DSX11          2809
-hanlin_v3ext            MACH_HANLIN_V3EXT       HANLIN_V3EXT            2810
-hanlin_v5               MACH_HANLIN_V5          HANLIN_V5               2811
-hanlin_v3plus           MACH_HANLIN_V3PLUS      HANLIN_V3PLUS           2812
-iriver_story            MACH_IRIVER_STORY       IRIVER_STORY            2813
-irex_iliad              MACH_IREX_ILIAD         IREX_ILIAD              2814
-irex_dr1000             MACH_IREX_DR1000        IREX_DR1000             2815
 teton_bga               MACH_TETON_BGA          TETON_BGA               2816
-snapper9g45             MACH_SNAPPER9G45        SNAPPER9G45             2817
-tam3517                 MACH_TAM3517            TAM3517                 2818
-pdc100                  MACH_PDC100             PDC100                  2819
 eukrea_cpuimx25sd       MACH_EUKREA_CPUIMX25    EUKREA_CPUIMX25         2820
 eukrea_cpuimx35sd       MACH_EUKREA_CPUIMX35    EUKREA_CPUIMX35         2821
 eukrea_cpuimx51sd       MACH_EUKREA_CPUIMX51SD  EUKREA_CPUIMX51SD       2822
 eukrea_cpuimx51         MACH_EUKREA_CPUIMX51    EUKREA_CPUIMX51         2823
-p565                    MACH_P565               P565                    2824
-acer_a4                 MACH_ACER_A4            ACER_A4                 2825
-davinci_dm368_bip       MACH_DAVINCI_DM368_BIP  DAVINCI_DM368_BIP       2826
-eshare                  MACH_ESHARE             ESHARE                  2827
-wlbargn                 MACH_WLBARGN            WLBARGN                 2829
-bm170                   MACH_BM170              BM170                   2830
-netspace_mini_v2        MACH_NETSPACE_MINI_V2   NETSPACE_MINI_V2        2831
-netspace_plug_v2        MACH_NETSPACE_PLUG_V2   NETSPACE_PLUG_V2        2832
-siemens_l1              MACH_SIEMENS_L1         SIEMENS_L1              2833
-elv_lcu1                MACH_ELV_LCU1           ELV_LCU1                2834
-mcu1                    MACH_MCU1               MCU1                    2835
-omap3_tao3530           MACH_OMAP3_TAO3530      OMAP3_TAO3530           2836
-omap3_pcutouch          MACH_OMAP3_PCUTOUCH     OMAP3_PCUTOUCH          2837
 smdkc210                MACH_SMDKC210           SMDKC210                2838
 omap3_braillo           MACH_OMAP3_BRAILLO      OMAP3_BRAILLO           2839
 spyplug                 MACH_SPYPLUG            SPYPLUG                 2840
@@ -973,9 +921,7 @@ isc3			MACH_ISC3		ISC3			3291
 rascal                  MACH_RASCAL             RASCAL                  3292
 hrefv60                 MACH_HREFV60            HREFV60                 3293
 tpt_2_0                 MACH_TPT_2_0            TPT_2_0                 3294
-pyramid_td              MACH_PYRAMID_TD         PYRAMID_TD              3295
 splendor                MACH_SPLENDOR           SPLENDOR                3296
-guf_planet              MACH_GUF_PLANET         GUF_PLANET              3297
 msm8x60_qt              MACH_MSM8X60_QT         MSM8X60_QT              3298
 htc_hd_mini             MACH_HTC_HD_MINI        HTC_HD_MINI             3299
 athene                  MACH_ATHENE             ATHENE                  3300
@@ -1099,3 +1045,71 @@ ecuv5			MACH_ECUV5		ECUV5			3421
 hsgx6d                  MACH_HSGX6D             HSGX6D                  3422
 dawad7                  MACH_DAWAD7             DAWAD7                  3423
 sam9repeater            MACH_SAM9REPEATER       SAM9REPEATER            3424
+gt_i5700                MACH_GT_I5700           GT_I5700                3425
+ctera_plug_c2           MACH_CTERA_PLUG_C2      CTERA_PLUG_C2           3426
+marvelct                MACH_MARVELCT           MARVELCT                3427
+ag11005                 MACH_AG11005            AG11005                 3428
+vangogh                 MACH_VANGOGH            VANGOGH                 3430
+matrix505               MACH_MATRIX505          MATRIX505               3431
+oce_nigma               MACH_OCE_NIGMA          OCE_NIGMA               3432
+t55                     MACH_T55                T55                     3433
+bio3k                   MACH_BIO3K              BIO3K                   3434
+expressct               MACH_EXPRESSCT          EXPRESSCT               3435
+cardhu                  MACH_CARDHU             CARDHU                  3436
+aruba                   MACH_ARUBA              ARUBA                   3437
+bonaire                 MACH_BONAIRE            BONAIRE                 3438
+nuc700evb               MACH_NUC700EVB          NUC700EVB               3439
+nuc710evb               MACH_NUC710EVB          NUC710EVB               3440
+nuc740evb               MACH_NUC740EVB          NUC740EVB               3441
+nuc745evb               MACH_NUC745EVB          NUC745EVB               3442
+transcede               MACH_TRANSCEDE          TRANSCEDE               3443
+mora                    MACH_MORA               MORA                    3444
+nda_evm                 MACH_NDA_EVM            NDA_EVM                 3445
+timu                    MACH_TIMU               TIMU                    3446
+expressh                MACH_EXPRESSH           EXPRESSH                3447
+veridis_a300            MACH_VERIDIS_A300       VERIDIS_A300            3448
+dm368_leopard           MACH_DM368_LEOPARD      DM368_LEOPARD           3449
+omap_mcop               MACH_OMAP_MCOP          OMAP_MCOP               3450
+tritip                  MACH_TRITIP             TRITIP                  3451
+sm1k                    MACH_SM1K               SM1K                    3452
+monch                   MACH_MONCH              MONCH                   3453
+curacao                 MACH_CURACAO            CURACAO                 3454
+origen                  MACH_ORIGEN             ORIGEN                  3455
+epc10                   MACH_EPC10              EPC10                   3456
+sgh_i740                MACH_SGH_I740           SGH_I740                3457
+tuna                    MACH_TUNA               TUNA                    3458
+mx51_tulip              MACH_MX51_TULIP         MX51_TULIP              3459
+mx51_aster7             MACH_MX51_ASTER7        MX51_ASTER7             3460
+acro37xbrd              MACH_ACRO37XBRD         ACRO37XBRD              3461
+elke                    MACH_ELKE               ELKE                    3462
+sbc6000x                MACH_SBC6000X           SBC6000X                3463
+r1801e                  MACH_R1801E             R1801E                  3464
+h1600                   MACH_H1600              H1600                   3465
+mini210                 MACH_MINI210            MINI210                 3466
+mini8168                MACH_MINI8168           MINI8168                3467
+pc7308                  MACH_PC7308             PC7308                  3468
+kmm2m01                 MACH_KMM2M01            KMM2M01                 3470
+mx51erebus              MACH_MX51EREBUS         MX51EREBUS              3471
+wm8650refboard          MACH_WM8650REFBOARD     WM8650REFBOARD          3472
+tuxrail                 MACH_TUXRAIL            TUXRAIL                 3473
+arthur                  MACH_ARTHUR             ARTHUR                  3474
+doorboy                 MACH_DOORBOY            DOORBOY                 3475
+xarina                  MACH_XARINA             XARINA                  3476
+roverx7                 MACH_ROVERX7            ROVERX7                 3477
+sdvr                    MACH_SDVR               SDVR                    3478
+acer_maya               MACH_ACER_MAYA          ACER_MAYA               3479
+pico                    MACH_PICO               PICO                    3480
+cwmx233                 MACH_CWMX233            CWMX233                 3481
+cwam1808                MACH_CWAM1808           CWAM1808                3482
+cwdm365                 MACH_CWDM365            CWDM365                 3483
+mx51_moray              MACH_MX51_MORAY         MX51_MORAY              3484
+thales_cbc              MACH_THALES_CBC         THALES_CBC              3485
+bluepoint               MACH_BLUEPOINT          BLUEPOINT               3486
+dir665                  MACH_DIR665             DIR665                  3487
+acmerover1              MACH_ACMEROVER1         ACMEROVER1              3488
+shooter_ct              MACH_SHOOTER_CT         SHOOTER_CT              3489
+bliss                   MACH_BLISS              BLISS                   3490
+blissc                  MACH_BLISSC             BLISSC                  3491
+thales_adc              MACH_THALES_ADC         THALES_ADC              3492
+ubisys_p9d_evp          MACH_UBISYS_P9D_EVP     UBISYS_P9D_EVP          3493
+atdgp318                MACH_ATDGP318           ATDGP318                3494
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index b4a7e4fba90f..4941e06fe2e1 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -77,7 +77,7 @@ static struct variant_data variant_arm_extended_fifo = {
 static struct variant_data variant_u300 = {
         .fifosize               = 16 * 4,
         .fifohalfsize           = 8 * 4,
-        .clkreg_enable          = 1 << 13, /* HWFCEN */
+        .clkreg_enable          = MCI_ST_U300_HWFCEN,
         .datalength_bits        = 16,
         .sdio                   = true,
 };
@@ -86,7 +86,7 @@ static struct variant_data variant_ux500 = {
         .fifosize               = 30 * 4,
         .fifohalfsize           = 8 * 4,
         .clkreg                 = MCI_CLK_ENABLE,
-        .clkreg_enable          = 1 << 14, /* HWFCEN */
+        .clkreg_enable          = MCI_ST_UX500_HWFCEN,
         .datalength_bits        = 24,
         .sdio                   = true,
         .st_clkdiv              = true,
@@ -103,6 +103,8 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
         if (desired) {
                 if (desired >= host->mclk) {
                         clk = MCI_CLK_BYPASS;
+                        if (variant->st_clkdiv)
+                                clk |= MCI_ST_UX500_NEG_EDGE;
                         host->cclk = host->mclk;
                 } else if (variant->st_clkdiv) {
                         /*
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index ec9a7bc6d0df..bb32e21c09db 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -11,23 +11,33 @@
 #define MCI_PWR_OFF             0x00
 #define MCI_PWR_UP              0x02
 #define MCI_PWR_ON              0x03
-#define MCI_DATA2DIREN          (1 << 2)
-#define MCI_CMDDIREN            (1 << 3)
-#define MCI_DATA0DIREN          (1 << 4)
-#define MCI_DATA31DIREN         (1 << 5)
 #define MCI_OD                  (1 << 6)
 #define MCI_ROD                 (1 << 7)
-/* The ST Micro version does not have ROD */
-#define MCI_FBCLKEN             (1 << 7)
-#define MCI_DATA74DIREN         (1 << 8)
+/*
+ * The ST Micro version does not have ROD and reuse the voltage registers
+ * for direction settings
+ */
+#define MCI_ST_DATA2DIREN       (1 << 2)
+#define MCI_ST_CMDDIREN         (1 << 3)
+#define MCI_ST_DATA0DIREN       (1 << 4)
+#define MCI_ST_DATA31DIREN      (1 << 5)
+#define MCI_ST_FBCLKEN          (1 << 7)
+#define MCI_ST_DATA74DIREN      (1 << 8)
 
 #define MMCICLOCK               0x004
 #define MCI_CLK_ENABLE          (1 << 8)
 #define MCI_CLK_PWRSAVE         (1 << 9)
 #define MCI_CLK_BYPASS          (1 << 10)
 #define MCI_4BIT_BUS            (1 << 11)
-/* 8bit wide buses supported in ST Micro versions */
+/*
+ * 8bit wide buses, hardware flow contronl, negative edges and clock inversion
+ * supported in ST Micro U300 and Ux500 versions
+ */
 #define MCI_ST_8BIT_BUS         (1 << 12)
+#define MCI_ST_U300_HWFCEN      (1 << 13)
+#define MCI_ST_UX500_NEG_EDGE   (1 << 13)
+#define MCI_ST_UX500_HWFCEN     (1 << 14)
+#define MCI_ST_UX500_CLK_INV    (1 << 15)
 
 #define MMCIARGUMENT            0x008
 #define MMCICOMMAND             0x00c
@@ -88,8 +98,9 @@
 #define MCI_RXFIFOEMPTY         (1 << 19)
 #define MCI_TXDATAAVLBL         (1 << 20)
 #define MCI_RXDATAAVLBL         (1 << 21)
-#define MCI_SDIOIT              (1 << 22)
-#define MCI_CEATAEND            (1 << 23)
+/* Extended status bits for the ST Micro variants */
+#define MCI_ST_SDIOIT           (1 << 22)
+#define MCI_ST_CEATAEND         (1 << 23)
 
 #define MMCICLEAR               0x038
 #define MCI_CMDCRCFAILCLR       (1 << 0)
@@ -102,8 +113,9 @@
 #define MCI_CMDSENTCLR          (1 << 7)
 #define MCI_DATAENDCLR          (1 << 8)
 #define MCI_DATABLOCKENDCLR     (1 << 10)
-#define MCI_SDIOITC             (1 << 22)
-#define MCI_CEATAENDC           (1 << 23)
+/* Extended status bits for the ST Micro variants */
+#define MCI_ST_SDIOITC          (1 << 22)
+#define MCI_ST_CEATAENDC        (1 << 23)
 
 #define MMCIMASK0               0x03c
 #define MCI_CMDCRCFAILMASK      (1 << 0)
@@ -127,8 +139,9 @@
 #define MCI_RXFIFOEMPTYMASK     (1 << 19)
 #define MCI_TXDATAAVLBLMASK     (1 << 20)
 #define MCI_RXDATAAVLBLMASK     (1 << 21)
-#define MCI_SDIOITMASK          (1 << 22)
-#define MCI_CEATAENDMASK        (1 << 23)
+/* Extended status bits for the ST Micro variants */
+#define MCI_ST_SDIOITMASK       (1 << 22)
+#define MCI_ST_CEATAENDMASK     (1 << 23)
 
 #define MMCIMASK1               0x040
 #define MMCIFIFOCNT             0x048
diff --git a/include/linux/elf.h b/include/linux/elf.h
index 4d608014753a..110821cb6ea5 100644
--- a/include/linux/elf.h
+++ b/include/linux/elf.h
@@ -395,6 +395,7 @@ typedef struct elf64_shdr {
 #define NT_S390_CTRS    0x304           /* s390 control registers */
 #define NT_S390_PREFIX  0x305           /* s390 prefix register */
 #define NT_S390_LAST_BREAK      0x306   /* s390 breaking event address */
+#define NT_ARM_VFP      0x400           /* ARM VFP/NEON registers */
 
 
 /* Note header in a PT_NOTE section */