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-rw-r--r--arch/arm/configs/at91sam9260_9g20_defconfig145
-rw-r--r--arch/arm/configs/at91sam9261_9g10_defconfig147
-rw-r--r--arch/arm/configs/at91sam9263_defconfig151
-rw-r--r--arch/arm/mach-at91/Kconfig.non_dt172
-rw-r--r--arch/arm/mach-at91/Makefile29
-rw-r--r--arch/arm/mach-at91/at91sam9260.c397
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c1364
-rw-r--r--arch/arm/mach-at91/at91sam9261.c375
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c1098
-rw-r--r--arch/arm/mach-at91/at91sam9263.c399
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c1538
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c1
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c223
-rw-r--r--arch/arm/mach-at91/board-cam60.c199
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c386
-rw-r--r--arch/arm/mach-at91/board-flexibity.c171
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c585
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c228
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c230
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c354
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c623
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c493
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c429
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c191
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c294
-rw-r--r--arch/arm/mach-at91/stamp9g20.h7
-rw-r--r--drivers/misc/Kconfig2
-rw-r--r--drivers/rtc/Kconfig4
-rw-r--r--drivers/video/backlight/Kconfig1
-rw-r--r--drivers/video/fbdev/Kconfig17
30 files changed, 2 insertions, 10251 deletions
diff --git a/arch/arm/configs/at91sam9260_9g20_defconfig b/arch/arm/configs/at91sam9260_9g20_defconfig
deleted file mode 100644
index 3ada05d639ad..000000000000
--- a/arch/arm/configs/at91sam9260_9g20_defconfig
+++ /dev/null
@@ -1,145 +0,0 @@
1# CONFIG_LOCALVERSION_AUTO is not set
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_BLK_DEV_INITRD=y
6CONFIG_EMBEDDED=y
7CONFIG_SLAB=y
8CONFIG_MODULES=y
9CONFIG_MODULE_UNLOAD=y
10# CONFIG_BLK_DEV_BSG is not set
11# CONFIG_IOSCHED_DEADLINE is not set
12# CONFIG_IOSCHED_CFQ is not set
13CONFIG_ARCH_AT91=y
14CONFIG_ARCH_AT91SAM9260=y
15CONFIG_MACH_AT91SAM9260EK=y
16CONFIG_MACH_CAM60=y
17CONFIG_MACH_SAM9_L9260=y
18CONFIG_MACH_AFEB9260=y
19CONFIG_MACH_CPU9260=y
20CONFIG_MACH_FLEXIBITY=y
21CONFIG_MACH_AT91SAM9G20EK=y
22CONFIG_MACH_AT91SAM9G20EK_2MMC=y
23CONFIG_MACH_CPU9G20=y
24CONFIG_MACH_ACMENETUSFOXG20=y
25CONFIG_MACH_PORTUXG20=y
26CONFIG_MACH_STAMP9G20=y
27CONFIG_MACH_PCONTROL_G20=y
28CONFIG_MACH_GSIA18S=y
29CONFIG_MACH_SNAPPER_9260=y
30CONFIG_MACH_AT91SAM9_DT=y
31CONFIG_AT91_SLOW_CLOCK=y
32# CONFIG_ARM_THUMB is not set
33CONFIG_AEABI=y
34CONFIG_ZBOOT_ROM_TEXT=0x0
35CONFIG_ZBOOT_ROM_BSS=0x0
36CONFIG_ARM_APPENDED_DTB=y
37CONFIG_ARM_ATAG_DTB_COMPAT=y
38CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
39CONFIG_AUTO_ZRELADDR=y
40CONFIG_NET=y
41CONFIG_PACKET=y
42CONFIG_UNIX=y
43CONFIG_INET=y
44CONFIG_IP_PNP=y
45CONFIG_IP_PNP_DHCP=y
46CONFIG_IP_PNP_BOOTP=y
47# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
48# CONFIG_INET_XFRM_MODE_TUNNEL is not set
49# CONFIG_INET_XFRM_MODE_BEET is not set
50# CONFIG_INET_LRO is not set
51# CONFIG_IPV6 is not set
52CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
53CONFIG_DEVTMPFS=y
54CONFIG_DEVTMPFS_MOUNT=y
55CONFIG_MTD=y
56CONFIG_MTD_CMDLINE_PARTS=y
57CONFIG_MTD_BLOCK=y
58CONFIG_MTD_DATAFLASH=y
59CONFIG_MTD_NAND=y
60CONFIG_MTD_NAND_ATMEL=y
61CONFIG_MTD_UBI=y
62CONFIG_BLK_DEV_LOOP=y
63CONFIG_BLK_DEV_RAM=y
64CONFIG_BLK_DEV_RAM_SIZE=8192
65CONFIG_EEPROM_AT25=y
66CONFIG_SCSI=y
67CONFIG_BLK_DEV_SD=y
68# CONFIG_SCSI_LOWLEVEL is not set
69CONFIG_NETDEVICES=y
70CONFIG_MACB=y
71# CONFIG_NET_VENDOR_BROADCOM is not set
72# CONFIG_NET_VENDOR_FARADAY is not set
73# CONFIG_NET_VENDOR_INTEL is not set
74# CONFIG_NET_VENDOR_MARVELL is not set
75# CONFIG_NET_VENDOR_MICREL is not set
76# CONFIG_NET_VENDOR_MICROCHIP is not set
77# CONFIG_NET_VENDOR_NATSEMI is not set
78# CONFIG_NET_VENDOR_SEEQ is not set
79# CONFIG_NET_VENDOR_SMSC is not set
80# CONFIG_NET_VENDOR_STMICRO is not set
81CONFIG_SMSC_PHY=y
82# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
83CONFIG_KEYBOARD_GPIO=y
84# CONFIG_INPUT_MOUSE is not set
85CONFIG_SERIAL_ATMEL=y
86CONFIG_SERIAL_ATMEL_CONSOLE=y
87CONFIG_HW_RANDOM=y
88CONFIG_I2C=y
89CONFIG_I2C_CHARDEV=y
90CONFIG_I2C_GPIO=y
91CONFIG_SPI=y
92CONFIG_SPI_ATMEL=y
93CONFIG_SPI_SPIDEV=y
94CONFIG_GPIO_SYSFS=y
95CONFIG_POWER_SUPPLY=y
96CONFIG_POWER_RESET=y
97# CONFIG_HWMON is not set
98CONFIG_WATCHDOG=y
99CONFIG_WATCHDOG_NOWAYOUT=y
100CONFIG_AT91SAM9X_WATCHDOG=y
101CONFIG_SOUND=y
102CONFIG_SND=y
103CONFIG_SND_SEQUENCER=y
104CONFIG_SND_MIXER_OSS=y
105CONFIG_SND_PCM_OSS=y
106CONFIG_SND_SEQUENCER_OSS=y
107# CONFIG_SND_VERBOSE_PROCFS is not set
108CONFIG_USB=y
109CONFIG_USB_MON=y
110CONFIG_USB_OHCI_HCD=y
111CONFIG_USB_STORAGE=y
112CONFIG_USB_GADGET=y
113CONFIG_USB_AT91=y
114CONFIG_USB_G_SERIAL=y
115CONFIG_MMC=y
116CONFIG_MMC_ATMELMCI=y
117CONFIG_MMC_SPI=y
118CONFIG_NEW_LEDS=y
119CONFIG_LEDS_CLASS=y
120CONFIG_LEDS_GPIO=y
121CONFIG_LEDS_TRIGGERS=y
122CONFIG_LEDS_TRIGGER_TIMER=y
123CONFIG_LEDS_TRIGGER_HEARTBEAT=y
124CONFIG_RTC_CLASS=y
125CONFIG_RTC_DRV_RV3029C2=y
126CONFIG_RTC_DRV_AT91SAM9=y
127CONFIG_IIO=y
128CONFIG_AT91_ADC=y
129CONFIG_EXT4_FS=y
130CONFIG_VFAT_FS=y
131CONFIG_TMPFS=y
132CONFIG_UBIFS_FS=y
133CONFIG_UBIFS_FS_ADVANCED_COMPR=y
134CONFIG_NFS_FS=y
135CONFIG_ROOT_NFS=y
136CONFIG_NLS_CODEPAGE_437=y
137CONFIG_NLS_CODEPAGE_850=y
138CONFIG_NLS_ISO8859_1=y
139CONFIG_NLS_ISO8859_15=y
140CONFIG_NLS_UTF8=y
141CONFIG_DEBUG_INFO=y
142# CONFIG_ENABLE_WARN_DEPRECATED is not set
143# CONFIG_FTRACE is not set
144CONFIG_DEBUG_LL=y
145CONFIG_EARLY_PRINTK=y
diff --git a/arch/arm/configs/at91sam9261_9g10_defconfig b/arch/arm/configs/at91sam9261_9g10_defconfig
deleted file mode 100644
index 0c505d801e25..000000000000
--- a/arch/arm/configs/at91sam9261_9g10_defconfig
+++ /dev/null
@@ -1,147 +0,0 @@
1# CONFIG_LOCALVERSION_AUTO is not set
2CONFIG_KERNEL_LZMA=y
3# CONFIG_SWAP is not set
4CONFIG_SYSVIPC=y
5CONFIG_IKCONFIG=y
6CONFIG_IKCONFIG_PROC=y
7CONFIG_LOG_BUF_SHIFT=14
8CONFIG_NAMESPACES=y
9CONFIG_EMBEDDED=y
10CONFIG_SLAB=y
11CONFIG_MODULES=y
12CONFIG_MODULE_UNLOAD=y
13# CONFIG_BLK_DEV_BSG is not set
14# CONFIG_IOSCHED_DEADLINE is not set
15# CONFIG_IOSCHED_CFQ is not set
16CONFIG_ARCH_AT91=y
17CONFIG_ARCH_AT91SAM9261=y
18CONFIG_MACH_AT91SAM9261EK=y
19CONFIG_MACH_AT91SAM9G10EK=y
20# CONFIG_ARM_THUMB is not set
21CONFIG_AEABI=y
22CONFIG_ZBOOT_ROM_TEXT=0x0
23CONFIG_ZBOOT_ROM_BSS=0x0
24CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
25CONFIG_AUTO_ZRELADDR=y
26CONFIG_VFP=y
27# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
28CONFIG_NET=y
29CONFIG_PACKET=y
30CONFIG_UNIX=y
31CONFIG_INET=y
32CONFIG_IP_MULTICAST=y
33CONFIG_IP_PNP=y
34CONFIG_IP_PNP_DHCP=y
35CONFIG_IP_PNP_BOOTP=y
36# CONFIG_INET_LRO is not set
37# CONFIG_IPV6 is not set
38CONFIG_CFG80211=y
39CONFIG_MAC80211=y
40CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
41CONFIG_DEVTMPFS=y
42CONFIG_DEVTMPFS_MOUNT=y
43CONFIG_MTD=y
44CONFIG_MTD_CMDLINE_PARTS=y
45CONFIG_MTD_BLOCK=y
46CONFIG_MTD_NAND=y
47CONFIG_MTD_NAND_ATMEL=y
48CONFIG_MTD_UBI=y
49CONFIG_MTD_UBI_GLUEBI=y
50CONFIG_BLK_DEV_RAM=y
51CONFIG_BLK_DEV_RAM_SIZE=8192
52CONFIG_ATMEL_TCLIB=y
53CONFIG_ATMEL_SSC=y
54CONFIG_SCSI=y
55CONFIG_BLK_DEV_SD=y
56CONFIG_NETDEVICES=y
57CONFIG_DM9000=y
58CONFIG_USB_ZD1201=m
59CONFIG_RTL8187=m
60CONFIG_LIBERTAS=m
61CONFIG_LIBERTAS_USB=m
62CONFIG_LIBERTAS_SDIO=m
63CONFIG_LIBERTAS_SPI=m
64CONFIG_RT2X00=m
65CONFIG_RT2500USB=m
66CONFIG_RT73USB=m
67CONFIG_ZD1211RW=m
68CONFIG_INPUT_POLLDEV=m
69# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
70CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
71CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
72CONFIG_INPUT_EVDEV=y
73# CONFIG_KEYBOARD_ATKBD is not set
74CONFIG_KEYBOARD_GPIO=y
75# CONFIG_INPUT_MOUSE is not set
76CONFIG_INPUT_TOUCHSCREEN=y
77CONFIG_TOUCHSCREEN_ADS7846=y
78CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
79CONFIG_SERIAL_ATMEL=y
80CONFIG_SERIAL_ATMEL_CONSOLE=y
81CONFIG_HW_RANDOM=y
82CONFIG_I2C=y
83CONFIG_I2C_CHARDEV=y
84CONFIG_I2C_GPIO=y
85CONFIG_SPI=y
86CONFIG_SPI_ATMEL=y
87CONFIG_POWER_SUPPLY=y
88CONFIG_POWER_RESET=y
89# CONFIG_HWMON is not set
90CONFIG_WATCHDOG=y
91CONFIG_WATCHDOG_NOWAYOUT=y
92CONFIG_AT91SAM9X_WATCHDOG=y
93CONFIG_FB=y
94CONFIG_FB_ATMEL=y
95CONFIG_BACKLIGHT_LCD_SUPPORT=y
96# CONFIG_LCD_CLASS_DEVICE is not set
97CONFIG_BACKLIGHT_CLASS_DEVICE=y
98CONFIG_BACKLIGHT_ATMEL_LCDC=y
99# CONFIG_BACKLIGHT_GENERIC is not set
100CONFIG_FRAMEBUFFER_CONSOLE=y
101CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
102CONFIG_LOGO=y
103CONFIG_SOUND=y
104CONFIG_SND=y
105CONFIG_SND_SEQUENCER=y
106CONFIG_SND_MIXER_OSS=y
107CONFIG_SND_PCM_OSS=y
108# CONFIG_SND_SUPPORT_OLD_API is not set
109# CONFIG_SND_VERBOSE_PROCFS is not set
110# CONFIG_SND_DRIVERS is not set
111# CONFIG_SND_ARM is not set
112CONFIG_SND_AT73C213=y
113CONFIG_SND_USB_AUDIO=m
114# CONFIG_USB_HID is not set
115CONFIG_USB=y
116CONFIG_USB_OHCI_HCD=y
117CONFIG_USB_STORAGE=y
118CONFIG_USB_GADGET=y
119CONFIG_USB_AT91=y
120CONFIG_USB_G_SERIAL=y
121CONFIG_MMC=y
122CONFIG_MMC_ATMELMCI=m
123CONFIG_NEW_LEDS=y
124CONFIG_LEDS_CLASS=y
125CONFIG_LEDS_GPIO=y
126CONFIG_LEDS_TRIGGERS=y
127CONFIG_LEDS_TRIGGER_TIMER=y
128CONFIG_LEDS_TRIGGER_HEARTBEAT=y
129CONFIG_LEDS_TRIGGER_GPIO=y
130CONFIG_RTC_CLASS=y
131CONFIG_RTC_DRV_AT91SAM9=y
132CONFIG_MSDOS_FS=y
133CONFIG_VFAT_FS=y
134CONFIG_TMPFS=y
135CONFIG_UBIFS_FS=y
136CONFIG_UBIFS_FS_ADVANCED_COMPR=y
137CONFIG_SQUASHFS=y
138CONFIG_SQUASHFS_LZO=y
139CONFIG_SQUASHFS_XZ=y
140CONFIG_NFS_FS=y
141CONFIG_ROOT_NFS=y
142CONFIG_NLS_CODEPAGE_437=y
143CONFIG_NLS_CODEPAGE_850=y
144CONFIG_NLS_ISO8859_1=y
145CONFIG_NLS_ISO8859_15=y
146CONFIG_NLS_UTF8=y
147CONFIG_CRC_CCITT=m
diff --git a/arch/arm/configs/at91sam9263_defconfig b/arch/arm/configs/at91sam9263_defconfig
deleted file mode 100644
index 8b671c977b81..000000000000
--- a/arch/arm/configs/at91sam9263_defconfig
+++ /dev/null
@@ -1,151 +0,0 @@
1# CONFIG_LOCALVERSION_AUTO is not set
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_IKCONFIG=y
5CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=14
7CONFIG_NAMESPACES=y
8CONFIG_EMBEDDED=y
9CONFIG_SLAB=y
10CONFIG_MODULES=y
11CONFIG_MODULE_UNLOAD=y
12# CONFIG_BLK_DEV_BSG is not set
13# CONFIG_IOSCHED_DEADLINE is not set
14# CONFIG_IOSCHED_CFQ is not set
15CONFIG_ARCH_AT91=y
16CONFIG_ARCH_AT91SAM9263=y
17CONFIG_MACH_AT91SAM9263EK=y
18CONFIG_MTD_AT91_DATAFLASH_CARD=y
19# CONFIG_ARM_THUMB is not set
20CONFIG_AEABI=y
21CONFIG_ZBOOT_ROM_TEXT=0x0
22CONFIG_ZBOOT_ROM_BSS=0x0
23CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
24CONFIG_AUTO_ZRELADDR=y
25CONFIG_NET=y
26CONFIG_PACKET=y
27CONFIG_UNIX=y
28CONFIG_NET_KEY=y
29CONFIG_INET=y
30CONFIG_IP_MULTICAST=y
31CONFIG_IP_ADVANCED_ROUTER=y
32CONFIG_IP_ROUTE_VERBOSE=y
33CONFIG_IP_PNP=y
34CONFIG_IP_PNP_DHCP=y
35CONFIG_IP_PNP_BOOTP=y
36CONFIG_IP_PNP_RARP=y
37CONFIG_NET_IPIP=y
38CONFIG_IP_MROUTE=y
39CONFIG_IP_PIMSM_V1=y
40CONFIG_IP_PIMSM_V2=y
41# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
42# CONFIG_INET_XFRM_MODE_TUNNEL is not set
43# CONFIG_INET_XFRM_MODE_BEET is not set
44# CONFIG_INET_LRO is not set
45# CONFIG_INET_DIAG is not set
46CONFIG_IPV6=y
47# CONFIG_WIRELESS is not set
48CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
49CONFIG_DEVTMPFS=y
50CONFIG_DEVTMPFS_MOUNT=y
51CONFIG_MTD=y
52CONFIG_MTD_CMDLINE_PARTS=y
53CONFIG_MTD_BLOCK=y
54CONFIG_NFTL=y
55CONFIG_NFTL_RW=y
56CONFIG_MTD_DATAFLASH=y
57CONFIG_MTD_BLOCK2MTD=y
58CONFIG_MTD_NAND=y
59CONFIG_MTD_NAND_ATMEL=y
60CONFIG_MTD_UBI=y
61CONFIG_MTD_UBI_GLUEBI=y
62CONFIG_BLK_DEV_LOOP=y
63CONFIG_BLK_DEV_RAM=y
64CONFIG_BLK_DEV_RAM_SIZE=8192
65CONFIG_ATMEL_TCLIB=y
66CONFIG_SCSI=y
67CONFIG_BLK_DEV_SD=y
68CONFIG_NETDEVICES=y
69CONFIG_MACB=y
70CONFIG_SMSC_PHY=y
71# CONFIG_WLAN is not set
72CONFIG_INPUT_POLLDEV=m
73# CONFIG_INPUT_MOUSEDEV is not set
74CONFIG_INPUT_EVDEV=y
75# CONFIG_KEYBOARD_ATKBD is not set
76CONFIG_KEYBOARD_GPIO=y
77# CONFIG_INPUT_MOUSE is not set
78CONFIG_INPUT_TOUCHSCREEN=y
79CONFIG_TOUCHSCREEN_ADS7846=y
80# CONFIG_LEGACY_PTYS is not set
81CONFIG_SERIAL_ATMEL=y
82CONFIG_SERIAL_ATMEL_CONSOLE=y
83CONFIG_HW_RANDOM=y
84CONFIG_I2C=y
85CONFIG_I2C_CHARDEV=y
86CONFIG_I2C_GPIO=y
87CONFIG_SPI=y
88CONFIG_SPI_ATMEL=y
89CONFIG_GPIO_SYSFS=y
90CONFIG_POWER_SUPPLY=y
91CONFIG_POWER_RESET=y
92# CONFIG_HWMON is not set
93CONFIG_WATCHDOG=y
94CONFIG_WATCHDOG_NOWAYOUT=y
95CONFIG_AT91SAM9X_WATCHDOG=y
96CONFIG_FB=y
97CONFIG_FB_ATMEL=y
98CONFIG_BACKLIGHT_LCD_SUPPORT=y
99CONFIG_LCD_CLASS_DEVICE=y
100CONFIG_BACKLIGHT_CLASS_DEVICE=y
101CONFIG_FRAMEBUFFER_CONSOLE=y
102CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
103CONFIG_LOGO=y
104CONFIG_SOUND=y
105CONFIG_SND=y
106CONFIG_SND_SEQUENCER=y
107CONFIG_SND_MIXER_OSS=y
108CONFIG_SND_PCM_OSS=y
109# CONFIG_SND_SUPPORT_OLD_API is not set
110# CONFIG_SND_VERBOSE_PROCFS is not set
111# CONFIG_SND_DRIVERS is not set
112# CONFIG_SND_ARM is not set
113CONFIG_SND_ATMEL_AC97C=y
114# CONFIG_SND_SPI is not set
115CONFIG_SND_USB_AUDIO=m
116CONFIG_USB=y
117CONFIG_USB_MON=y
118CONFIG_USB_OHCI_HCD=y
119CONFIG_USB_STORAGE=y
120CONFIG_USB_GADGET=y
121CONFIG_USB_ATMEL_USBA=y
122CONFIG_USB_G_SERIAL=y
123CONFIG_MMC=y
124CONFIG_SDIO_UART=m
125CONFIG_MMC_ATMELMCI=m
126CONFIG_NEW_LEDS=y
127CONFIG_LEDS_CLASS=y
128CONFIG_LEDS_GPIO=y
129CONFIG_LEDS_PWM=y
130CONFIG_LEDS_TRIGGERS=y
131CONFIG_LEDS_TRIGGER_HEARTBEAT=y
132CONFIG_RTC_CLASS=y
133CONFIG_RTC_DRV_AT91SAM9=y
134CONFIG_PWM=y
135CONFIG_PWM_ATMEL=y
136CONFIG_EXT4_FS=y
137CONFIG_VFAT_FS=y
138CONFIG_TMPFS=y
139CONFIG_UBIFS_FS=y
140CONFIG_UBIFS_FS_ADVANCED_COMPR=y
141CONFIG_NFS_FS=y
142CONFIG_NFS_V3_ACL=y
143CONFIG_NFS_V4=y
144CONFIG_ROOT_NFS=y
145CONFIG_NLS_CODEPAGE_437=y
146CONFIG_NLS_CODEPAGE_850=y
147CONFIG_NLS_ISO8859_1=y
148CONFIG_NLS_UTF8=y
149CONFIG_DEBUG_USER=y
150CONFIG_XZ_DEC=y
151CONFIG_FONTS=y
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index 22963a829e5c..5fc138da89fb 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -15,34 +15,8 @@ config ARCH_AT91RM9200
15 select AT91_USE_OLD_CLK 15 select AT91_USE_OLD_CLK
16 select OLD_IRQ_AT91 16 select OLD_IRQ_AT91
17 17
18config ARCH_AT91SAM9260
19 bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
20 select SOC_AT91SAM9260
21 select AT91_USE_OLD_CLK
22 select OLD_IRQ_AT91
23
24config ARCH_AT91SAM9261
25 bool "AT91SAM9261 or AT91SAM9G10"
26 select SOC_AT91SAM9261
27 select AT91_USE_OLD_CLK
28 select OLD_IRQ_AT91
29
30config ARCH_AT91SAM9263
31 bool "AT91SAM9263"
32 select SOC_AT91SAM9263
33 select AT91_USE_OLD_CLK
34 select OLD_IRQ_AT91
35
36endchoice 18endchoice
37 19
38config ARCH_AT91SAM9G20
39 bool
40 select ARCH_AT91SAM9260
41
42config ARCH_AT91SAM9G10
43 bool
44 select ARCH_AT91SAM9261
45
46# ---------------------------------------------------------- 20# ----------------------------------------------------------
47 21
48if ARCH_AT91RM9200 22if ARCH_AT91RM9200
@@ -129,152 +103,6 @@ endif
129 103
130# ---------------------------------------------------------- 104# ----------------------------------------------------------
131 105
132if ARCH_AT91SAM9260
133
134comment "AT91SAM9260 Variants"
135
136comment "AT91SAM9260 / AT91SAM9XE Board Type"
137
138config MACH_AT91SAM9260EK
139 bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
140 select HAVE_AT91_DATAFLASH_CARD
141 help
142 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
143 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
144
145config MACH_CAM60
146 bool "KwikByte KB9260 (CAM60) board"
147 help
148 Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260.
149 <http://www.kwikbyte.com/KB9260.html>
150
151config MACH_SAM9_L9260
152 bool "Olimex SAM9-L9260 board"
153 select HAVE_AT91_DATAFLASH_CARD
154 help
155 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
156 <http://www.olimex.com/dev/sam9-L9260.html>
157
158config MACH_AFEB9260
159 bool "Custom afeb9260 board v1"
160 help
161 Select this if you are using custom afeb9260 board based on
162 open hardware design. Select this for revision 1 of the board.
163 <svn://194.85.238.22/home/users/george/svn/arm9eb>
164 <http://groups.google.com/group/arm9fpga-evolution-board>
165
166config MACH_CPU9260
167 bool "Eukrea CPU9260 board"
168 help
169 Select this if you are using a Eukrea Electromatique's
170 CPU9260 Board <http://www.eukrea.com/>
171
172config MACH_FLEXIBITY
173 bool "Flexibity Connect board"
174 help
175 Select this if you are using Flexibity Connect board
176 <http://www.flexibity.com>
177
178comment "AT91SAM9G20 Board Type"
179
180config MACH_AT91SAM9G20EK
181 bool "Atmel AT91SAM9G20-EK Evaluation Kit"
182 select HAVE_AT91_DATAFLASH_CARD
183 help
184 Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit
185 that embeds only one SD/MMC slot.
186
187config MACH_AT91SAM9G20EK_2MMC
188 depends on MACH_AT91SAM9G20EK
189 bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots"
190 help
191 Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
192 with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
193 onwards.
194 <http://www.atmel.com/tools/SAM9G20-EK.aspx>
195
196config MACH_CPU9G20
197 bool "Eukrea CPU9G20 board"
198 help
199 Select this if you are using a Eukrea Electromatique's
200 CPU9G20 Board <http://www.eukrea.com/>
201
202config MACH_PORTUXG20
203 bool "taskit PortuxG20"
204 help
205 Select this if you are using taskit's PortuxG20.
206 <http://www.taskit.de/en/>
207
208config MACH_STAMP9G20
209 bool "taskit Stamp9G20 CPU module"
210 help
211 Select this if you are using taskit's Stamp9G20 CPU module on its
212 evaluation board.
213 <http://www.taskit.de/en/>
214
215config MACH_PCONTROL_G20
216 bool "PControl G20 CPU module"
217 help
218 Select this if you are using taskit's Stamp9G20 CPU module on this
219 carrier board, being the decentralized unit of a building automation
220 system; featuring nvram, eth-switch, iso-rs485, display, io
221
222config MACH_GSIA18S
223 bool "GS_IA18_S board"
224 help
225 This enables support for the GS_IA18_S board
226 produced by GeoSIG Ltd company. This is an internet accelerograph.
227 <http://www.geosig.com>
228
229config MACH_SNAPPER_9260
230 bool "Bluewater Systems Snapper 9260/9G20 module"
231 help
232 Select this if you are using the Bluewater Systems Snapper 9260 or
233 Snapper 9G20 modules.
234 <http://www.bluewatersys.com/>
235endif
236
237# ----------------------------------------------------------
238
239if ARCH_AT91SAM9261
240
241comment "AT91SAM9261 Board Type"
242
243config MACH_AT91SAM9261EK
244 bool "Atmel AT91SAM9261-EK Evaluation Kit"
245 select HAVE_AT91_DATAFLASH_CARD
246 help
247 Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
248 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
249
250comment "AT91SAM9G10 Board Type"
251
252config MACH_AT91SAM9G10EK
253 bool "Atmel AT91SAM9G10-EK Evaluation Kit"
254 select HAVE_AT91_DATAFLASH_CARD
255 help
256 Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
257 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
258
259endif
260
261# ----------------------------------------------------------
262
263if ARCH_AT91SAM9263
264
265comment "AT91SAM9263 Board Type"
266
267config MACH_AT91SAM9263EK
268 bool "Atmel AT91SAM9263-EK Evaluation Kit"
269 select HAVE_AT91_DATAFLASH_CARD
270 help
271 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
272 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
273
274endif
275
276# ----------------------------------------------------------
277
278comment "AT91 Board Options" 106comment "AT91 Board Options"
279 107
280config MTD_AT91_DATAFLASH_CARD 108config MTD_AT91_DATAFLASH_CARD
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index ae8aa1a898e8..b2495d71f7ac 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -21,9 +21,6 @@ obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
21obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o 21obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
22 22
23obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o 23obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
24obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
25obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
26obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
27 24
28# AT91RM9200 board-specific support 25# AT91RM9200 board-specific support
29obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 26obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
@@ -40,32 +37,6 @@ obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o
40obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o 37obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o
41obj-$(CONFIG_MACH_ECO920) += board-eco920.o 38obj-$(CONFIG_MACH_ECO920) += board-eco920.o
42 39
43# AT91SAM9260 board-specific support
44obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
45obj-$(CONFIG_MACH_CAM60) += board-cam60.o
46obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
47obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o
48obj-$(CONFIG_MACH_CPU9260) += board-cpu9krea.o
49obj-$(CONFIG_MACH_FLEXIBITY) += board-flexibity.o
50
51# AT91SAM9261 board-specific support
52obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
53obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o
54
55# AT91SAM9263 board-specific support
56obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
57
58# AT91SAM9G20 board-specific support
59obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
60obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
61obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
62obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
63obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o
64obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
65
66# AT91SAM9260/AT91SAM9G20 board-specific support
67obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
68
69# AT91SAM board with device-tree 40# AT91SAM board with device-tree
70obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o 41obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o
71obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o 42obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index aab1f969a7c3..78137c24d90b 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -10,305 +10,13 @@
10 * 10 *
11 */ 11 */
12 12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/clk/at91_pmc.h>
16
17#include <asm/proc-fns.h>
18#include <asm/irq.h>
19#include <asm/mach/arch.h>
20#include <asm/mach/map.h>
21#include <asm/system_misc.h> 13#include <asm/system_misc.h>
22#include <mach/cpu.h> 14#include <mach/cpu.h>
23#include <mach/at91_dbgu.h> 15#include <mach/at91_dbgu.h>
24#include <mach/at91sam9260.h>
25#include <mach/hardware.h> 16#include <mach/hardware.h>
26 17
27#include "at91_aic.h"
28#include "soc.h" 18#include "soc.h"
29#include "generic.h" 19#include "generic.h"
30#include "sam9_smc.h"
31#include "pm.h"
32
33#if defined(CONFIG_OLD_CLK_AT91)
34#include "clock.h"
35/* --------------------------------------------------------------------
36 * Clocks
37 * -------------------------------------------------------------------- */
38
39/*
40 * The peripheral clocks.
41 */
42static struct clk pioA_clk = {
43 .name = "pioA_clk",
44 .pmc_mask = 1 << AT91SAM9260_ID_PIOA,
45 .type = CLK_TYPE_PERIPHERAL,
46};
47static struct clk pioB_clk = {
48 .name = "pioB_clk",
49 .pmc_mask = 1 << AT91SAM9260_ID_PIOB,
50 .type = CLK_TYPE_PERIPHERAL,
51};
52static struct clk pioC_clk = {
53 .name = "pioC_clk",
54 .pmc_mask = 1 << AT91SAM9260_ID_PIOC,
55 .type = CLK_TYPE_PERIPHERAL,
56};
57static struct clk adc_clk = {
58 .name = "adc_clk",
59 .pmc_mask = 1 << AT91SAM9260_ID_ADC,
60 .type = CLK_TYPE_PERIPHERAL,
61};
62
63static struct clk adc_op_clk = {
64 .name = "adc_op_clk",
65 .type = CLK_TYPE_PERIPHERAL,
66 .rate_hz = 5000000,
67};
68
69static struct clk usart0_clk = {
70 .name = "usart0_clk",
71 .pmc_mask = 1 << AT91SAM9260_ID_US0,
72 .type = CLK_TYPE_PERIPHERAL,
73};
74static struct clk usart1_clk = {
75 .name = "usart1_clk",
76 .pmc_mask = 1 << AT91SAM9260_ID_US1,
77 .type = CLK_TYPE_PERIPHERAL,
78};
79static struct clk usart2_clk = {
80 .name = "usart2_clk",
81 .pmc_mask = 1 << AT91SAM9260_ID_US2,
82 .type = CLK_TYPE_PERIPHERAL,
83};
84static struct clk mmc_clk = {
85 .name = "mci_clk",
86 .pmc_mask = 1 << AT91SAM9260_ID_MCI,
87 .type = CLK_TYPE_PERIPHERAL,
88};
89static struct clk udc_clk = {
90 .name = "udc_clk",
91 .pmc_mask = 1 << AT91SAM9260_ID_UDP,
92 .type = CLK_TYPE_PERIPHERAL,
93};
94static struct clk twi_clk = {
95 .name = "twi_clk",
96 .pmc_mask = 1 << AT91SAM9260_ID_TWI,
97 .type = CLK_TYPE_PERIPHERAL,
98};
99static struct clk spi0_clk = {
100 .name = "spi0_clk",
101 .pmc_mask = 1 << AT91SAM9260_ID_SPI0,
102 .type = CLK_TYPE_PERIPHERAL,
103};
104static struct clk spi1_clk = {
105 .name = "spi1_clk",
106 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
107 .type = CLK_TYPE_PERIPHERAL,
108};
109static struct clk ssc_clk = {
110 .name = "ssc_clk",
111 .pmc_mask = 1 << AT91SAM9260_ID_SSC,
112 .type = CLK_TYPE_PERIPHERAL,
113};
114static struct clk tc0_clk = {
115 .name = "tc0_clk",
116 .pmc_mask = 1 << AT91SAM9260_ID_TC0,
117 .type = CLK_TYPE_PERIPHERAL,
118};
119static struct clk tc1_clk = {
120 .name = "tc1_clk",
121 .pmc_mask = 1 << AT91SAM9260_ID_TC1,
122 .type = CLK_TYPE_PERIPHERAL,
123};
124static struct clk tc2_clk = {
125 .name = "tc2_clk",
126 .pmc_mask = 1 << AT91SAM9260_ID_TC2,
127 .type = CLK_TYPE_PERIPHERAL,
128};
129static struct clk ohci_clk = {
130 .name = "ohci_clk",
131 .pmc_mask = 1 << AT91SAM9260_ID_UHP,
132 .type = CLK_TYPE_PERIPHERAL,
133};
134static struct clk macb_clk = {
135 .name = "pclk",
136 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
137 .type = CLK_TYPE_PERIPHERAL,
138};
139static struct clk isi_clk = {
140 .name = "isi_clk",
141 .pmc_mask = 1 << AT91SAM9260_ID_ISI,
142 .type = CLK_TYPE_PERIPHERAL,
143};
144static struct clk usart3_clk = {
145 .name = "usart3_clk",
146 .pmc_mask = 1 << AT91SAM9260_ID_US3,
147 .type = CLK_TYPE_PERIPHERAL,
148};
149static struct clk usart4_clk = {
150 .name = "usart4_clk",
151 .pmc_mask = 1 << AT91SAM9260_ID_US4,
152 .type = CLK_TYPE_PERIPHERAL,
153};
154static struct clk usart5_clk = {
155 .name = "usart5_clk",
156 .pmc_mask = 1 << AT91SAM9260_ID_US5,
157 .type = CLK_TYPE_PERIPHERAL,
158};
159static struct clk tc3_clk = {
160 .name = "tc3_clk",
161 .pmc_mask = 1 << AT91SAM9260_ID_TC3,
162 .type = CLK_TYPE_PERIPHERAL,
163};
164static struct clk tc4_clk = {
165 .name = "tc4_clk",
166 .pmc_mask = 1 << AT91SAM9260_ID_TC4,
167 .type = CLK_TYPE_PERIPHERAL,
168};
169static struct clk tc5_clk = {
170 .name = "tc5_clk",
171 .pmc_mask = 1 << AT91SAM9260_ID_TC5,
172 .type = CLK_TYPE_PERIPHERAL,
173};
174
175static struct clk *periph_clocks[] __initdata = {
176 &pioA_clk,
177 &pioB_clk,
178 &pioC_clk,
179 &adc_clk,
180 &adc_op_clk,
181 &usart0_clk,
182 &usart1_clk,
183 &usart2_clk,
184 &mmc_clk,
185 &udc_clk,
186 &twi_clk,
187 &spi0_clk,
188 &spi1_clk,
189 &ssc_clk,
190 &tc0_clk,
191 &tc1_clk,
192 &tc2_clk,
193 &ohci_clk,
194 &macb_clk,
195 &isi_clk,
196 &usart3_clk,
197 &usart4_clk,
198 &usart5_clk,
199 &tc3_clk,
200 &tc4_clk,
201 &tc5_clk,
202 // irq0 .. irq2
203};
204
205static struct clk_lookup periph_clocks_lookups[] = {
206 /* One additional fake clock for macb_hclk */
207 CLKDEV_CON_ID("hclk", &macb_clk),
208 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
209 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
210 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
211 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
212 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
213 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
214 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
215 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
216 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc_clk),
217 CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc_clk),
218 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
219 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),
220 /* more usart lookup table for DT entries */
221 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
222 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
223 CLKDEV_CON_DEV_ID("usart", "fffb4000.serial", &usart1_clk),
224 CLKDEV_CON_DEV_ID("usart", "fffb8000.serial", &usart2_clk),
225 CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
226 CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
227 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
228 CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
229 /* more tc lookup table for DT entries */
230 CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
231 CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
232 CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
233 CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk),
234 CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
235 CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
236 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
237 CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
238 CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
239 CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
240 /* fake hclk clock */
241 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
242 CLKDEV_CON_ID("pioA", &pioA_clk),
243 CLKDEV_CON_ID("pioB", &pioB_clk),
244 CLKDEV_CON_ID("pioC", &pioC_clk),
245 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
246 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
247 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
248};
249
250static struct clk_lookup usart_clocks_lookups[] = {
251 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
252 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
253 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
254 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
255 CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
256 CLKDEV_CON_DEV_ID("usart", "atmel_usart.5", &usart4_clk),
257 CLKDEV_CON_DEV_ID("usart", "atmel_usart.6", &usart5_clk),
258};
259
260/*
261 * The two programmable clocks.
262 * You must configure pin multiplexing to bring these signals out.
263 */
264static struct clk pck0 = {
265 .name = "pck0",
266 .pmc_mask = AT91_PMC_PCK0,
267 .type = CLK_TYPE_PROGRAMMABLE,
268 .id = 0,
269};
270static struct clk pck1 = {
271 .name = "pck1",
272 .pmc_mask = AT91_PMC_PCK1,
273 .type = CLK_TYPE_PROGRAMMABLE,
274 .id = 1,
275};
276
277static void __init at91sam9260_register_clocks(void)
278{
279 int i;
280
281 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
282 clk_register(periph_clocks[i]);
283
284 clkdev_add_table(periph_clocks_lookups,
285 ARRAY_SIZE(periph_clocks_lookups));
286 clkdev_add_table(usart_clocks_lookups,
287 ARRAY_SIZE(usart_clocks_lookups));
288
289 clk_register(&pck0);
290 clk_register(&pck1);
291}
292#else
293#define at91sam9260_register_clocks NULL
294#endif
295
296/* --------------------------------------------------------------------
297 * GPIO
298 * -------------------------------------------------------------------- */
299
300static struct at91_gpio_bank at91sam9260_gpio[] __initdata = {
301 {
302 .id = AT91SAM9260_ID_PIOA,
303 .regbase = AT91SAM9260_BASE_PIOA,
304 }, {
305 .id = AT91SAM9260_ID_PIOB,
306 .regbase = AT91SAM9260_BASE_PIOB,
307 }, {
308 .id = AT91SAM9260_ID_PIOC,
309 .regbase = AT91SAM9260_BASE_PIOC,
310 }
311};
312 20
313/* -------------------------------------------------------------------- 21/* --------------------------------------------------------------------
314 * AT91SAM9260 processor initialization 22 * AT91SAM9260 processor initialization
@@ -340,119 +48,14 @@ static void __init at91sam9260_map_io(void)
340 at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE); 48 at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE);
341} 49}
342 50
343static void __init at91sam9260_ioremap_registers(void)
344{
345 at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512);
346 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
347 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
348 at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX);
349 at91_pm_set_standby(at91sam9_sdram_standby);
350}
351
352static void __init at91sam9260_initialize(void) 51static void __init at91sam9260_initialize(void)
353{ 52{
354 arm_pm_idle = at91sam9_idle; 53 arm_pm_idle = at91sam9_idle;
355 54
356 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); 55 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);
357
358 /* Register GPIO subsystem */
359 at91_gpio_init(at91sam9260_gpio, 3);
360}
361
362static struct resource rstc_resources[] = {
363 [0] = {
364 .start = AT91SAM9260_BASE_RSTC,
365 .end = AT91SAM9260_BASE_RSTC + SZ_16 - 1,
366 .flags = IORESOURCE_MEM,
367 },
368 [1] = {
369 .start = AT91SAM9260_BASE_SDRAMC,
370 .end = AT91SAM9260_BASE_SDRAMC + SZ_512 - 1,
371 .flags = IORESOURCE_MEM,
372 },
373};
374
375static struct platform_device rstc_device = {
376 .name = "at91-sam9260-reset",
377 .resource = rstc_resources,
378 .num_resources = ARRAY_SIZE(rstc_resources),
379};
380
381static struct resource shdwc_resources[] = {
382 [0] = {
383 .start = AT91SAM9260_BASE_SHDWC,
384 .end = AT91SAM9260_BASE_SHDWC + SZ_16 - 1,
385 .flags = IORESOURCE_MEM,
386 },
387};
388
389static struct platform_device shdwc_device = {
390 .name = "at91-poweroff",
391 .resource = shdwc_resources,
392 .num_resources = ARRAY_SIZE(shdwc_resources),
393};
394
395static void __init at91sam9260_register_devices(void)
396{
397 platform_device_register(&rstc_device);
398 platform_device_register(&shdwc_device);
399}
400
401/* --------------------------------------------------------------------
402 * Interrupt initialization
403 * -------------------------------------------------------------------- */
404
405/*
406 * The default interrupt priority levels (0 = lowest, 7 = highest).
407 */
408static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
409 7, /* Advanced Interrupt Controller */
410 7, /* System Peripherals */
411 1, /* Parallel IO Controller A */
412 1, /* Parallel IO Controller B */
413 1, /* Parallel IO Controller C */
414 0, /* Analog-to-Digital Converter */
415 5, /* USART 0 */
416 5, /* USART 1 */
417 5, /* USART 2 */
418 0, /* Multimedia Card Interface */
419 2, /* USB Device Port */
420 6, /* Two-Wire Interface */
421 5, /* Serial Peripheral Interface 0 */
422 5, /* Serial Peripheral Interface 1 */
423 5, /* Serial Synchronous Controller */
424 0,
425 0,
426 0, /* Timer Counter 0 */
427 0, /* Timer Counter 1 */
428 0, /* Timer Counter 2 */
429 2, /* USB Host port */
430 3, /* Ethernet */
431 0, /* Image Sensor Interface */
432 5, /* USART 3 */
433 5, /* USART 4 */
434 5, /* USART 5 */
435 0, /* Timer Counter 3 */
436 0, /* Timer Counter 4 */
437 0, /* Timer Counter 5 */
438 0, /* Advanced Interrupt Controller */
439 0, /* Advanced Interrupt Controller */
440 0, /* Advanced Interrupt Controller */
441};
442
443static void __init at91sam9260_init_time(void)
444{
445 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
446} 56}
447 57
448AT91_SOC_START(at91sam9260) 58AT91_SOC_START(at91sam9260)
449 .map_io = at91sam9260_map_io, 59 .map_io = at91sam9260_map_io,
450 .default_irq_priority = at91sam9260_default_irq_priority,
451 .extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
452 | (1 << AT91SAM9260_ID_IRQ2),
453 .ioremap_registers = at91sam9260_ioremap_registers,
454 .register_clocks = at91sam9260_register_clocks,
455 .register_devices = at91sam9260_register_devices,
456 .init = at91sam9260_initialize, 60 .init = at91sam9260_initialize,
457 .init_time = at91sam9260_init_time,
458AT91_SOC_END 61AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
deleted file mode 100644
index ef88e0fe4e80..000000000000
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ /dev/null
@@ -1,1364 +0,0 @@
1/*
2 * arch/arm/mach-at91/at91sam9260_devices.c
3 *
4 * Copyright (C) 2006 Atmel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17#include <linux/platform_device.h>
18#include <linux/i2c-gpio.h>
19
20#include <linux/platform_data/at91_adc.h>
21
22#include <mach/cpu.h>
23#include <mach/at91sam9260.h>
24#include <mach/at91sam9260_matrix.h>
25#include <mach/at91_matrix.h>
26#include <mach/at91sam9_smc.h>
27#include <mach/hardware.h>
28
29#include "board.h"
30#include "generic.h"
31#include "gpio.h"
32
33/* --------------------------------------------------------------------
34 * USB Host
35 * -------------------------------------------------------------------- */
36
37#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
38static u64 ohci_dmamask = DMA_BIT_MASK(32);
39static struct at91_usbh_data usbh_data;
40
41static struct resource usbh_resources[] = {
42 [0] = {
43 .start = AT91SAM9260_UHP_BASE,
44 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
45 .flags = IORESOURCE_MEM,
46 },
47 [1] = {
48 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
49 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
50 .flags = IORESOURCE_IRQ,
51 },
52};
53
54static struct platform_device at91_usbh_device = {
55 .name = "at91_ohci",
56 .id = -1,
57 .dev = {
58 .dma_mask = &ohci_dmamask,
59 .coherent_dma_mask = DMA_BIT_MASK(32),
60 .platform_data = &usbh_data,
61 },
62 .resource = usbh_resources,
63 .num_resources = ARRAY_SIZE(usbh_resources),
64};
65
66void __init at91_add_device_usbh(struct at91_usbh_data *data)
67{
68 int i;
69
70 if (!data)
71 return;
72
73 /* Enable overcurrent notification */
74 for (i = 0; i < data->ports; i++) {
75 if (gpio_is_valid(data->overcurrent_pin[i]))
76 at91_set_gpio_input(data->overcurrent_pin[i], 1);
77 }
78
79 usbh_data = *data;
80 platform_device_register(&at91_usbh_device);
81}
82#else
83void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84#endif
85
86
87/* --------------------------------------------------------------------
88 * USB Device (Gadget)
89 * -------------------------------------------------------------------- */
90
91#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
92static struct at91_udc_data udc_data;
93
94static struct resource udc_resources[] = {
95 [0] = {
96 .start = AT91SAM9260_BASE_UDP,
97 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
98 .flags = IORESOURCE_MEM,
99 },
100 [1] = {
101 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
102 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
103 .flags = IORESOURCE_IRQ,
104 },
105};
106
107static struct platform_device at91_udc_device = {
108 .name = "at91_udc",
109 .id = -1,
110 .dev = {
111 .platform_data = &udc_data,
112 },
113 .resource = udc_resources,
114 .num_resources = ARRAY_SIZE(udc_resources),
115};
116
117void __init at91_add_device_udc(struct at91_udc_data *data)
118{
119 if (!data)
120 return;
121
122 if (gpio_is_valid(data->vbus_pin)) {
123 at91_set_gpio_input(data->vbus_pin, 0);
124 at91_set_deglitch(data->vbus_pin, 1);
125 }
126
127 /* Pullup pin is handled internally by USB device peripheral */
128
129 udc_data = *data;
130 platform_device_register(&at91_udc_device);
131}
132#else
133void __init at91_add_device_udc(struct at91_udc_data *data) {}
134#endif
135
136
137/* --------------------------------------------------------------------
138 * Ethernet
139 * -------------------------------------------------------------------- */
140
141#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
142static u64 eth_dmamask = DMA_BIT_MASK(32);
143static struct macb_platform_data eth_data;
144
145static struct resource eth_resources[] = {
146 [0] = {
147 .start = AT91SAM9260_BASE_EMAC,
148 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
149 .flags = IORESOURCE_MEM,
150 },
151 [1] = {
152 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
153 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
154 .flags = IORESOURCE_IRQ,
155 },
156};
157
158static struct platform_device at91sam9260_eth_device = {
159 .name = "macb",
160 .id = -1,
161 .dev = {
162 .dma_mask = &eth_dmamask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
164 .platform_data = &eth_data,
165 },
166 .resource = eth_resources,
167 .num_resources = ARRAY_SIZE(eth_resources),
168};
169
170void __init at91_add_device_eth(struct macb_platform_data *data)
171{
172 if (!data)
173 return;
174
175 if (gpio_is_valid(data->phy_irq_pin)) {
176 at91_set_gpio_input(data->phy_irq_pin, 0);
177 at91_set_deglitch(data->phy_irq_pin, 1);
178 }
179
180 /* Pins used for MII and RMII */
181 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
182 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
183 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
184 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
185 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
186 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
187 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
188 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
189 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
190 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
191
192 if (!data->is_rmii) {
193 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
194 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
195 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
196 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
197 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
198 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
199 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
200 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
201 }
202
203 eth_data = *data;
204 platform_device_register(&at91sam9260_eth_device);
205}
206#else
207void __init at91_add_device_eth(struct macb_platform_data *data) {}
208#endif
209
210
211/* --------------------------------------------------------------------
212 * MMC / SD Slot for Atmel MCI Driver
213 * -------------------------------------------------------------------- */
214
215#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
216static u64 mmc_dmamask = DMA_BIT_MASK(32);
217static struct mci_platform_data mmc_data;
218
219static struct resource mmc_resources[] = {
220 [0] = {
221 .start = AT91SAM9260_BASE_MCI,
222 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
223 .flags = IORESOURCE_MEM,
224 },
225 [1] = {
226 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
227 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
228 .flags = IORESOURCE_IRQ,
229 },
230};
231
232static struct platform_device at91sam9260_mmc_device = {
233 .name = "atmel_mci",
234 .id = -1,
235 .dev = {
236 .dma_mask = &mmc_dmamask,
237 .coherent_dma_mask = DMA_BIT_MASK(32),
238 .platform_data = &mmc_data,
239 },
240 .resource = mmc_resources,
241 .num_resources = ARRAY_SIZE(mmc_resources),
242};
243
244void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
245{
246 unsigned int i;
247 unsigned int slot_count = 0;
248
249 if (!data)
250 return;
251
252 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
253 if (data->slot[i].bus_width) {
254 /* input/irq */
255 if (gpio_is_valid(data->slot[i].detect_pin)) {
256 at91_set_gpio_input(data->slot[i].detect_pin, 1);
257 at91_set_deglitch(data->slot[i].detect_pin, 1);
258 }
259 if (gpio_is_valid(data->slot[i].wp_pin))
260 at91_set_gpio_input(data->slot[i].wp_pin, 1);
261
262 switch (i) {
263 case 0:
264 /* CMD */
265 at91_set_A_periph(AT91_PIN_PA7, 1);
266 /* DAT0, maybe DAT1..DAT3 */
267 at91_set_A_periph(AT91_PIN_PA6, 1);
268 if (data->slot[i].bus_width == 4) {
269 at91_set_A_periph(AT91_PIN_PA9, 1);
270 at91_set_A_periph(AT91_PIN_PA10, 1);
271 at91_set_A_periph(AT91_PIN_PA11, 1);
272 }
273 slot_count++;
274 break;
275 case 1:
276 /* CMD */
277 at91_set_B_periph(AT91_PIN_PA1, 1);
278 /* DAT0, maybe DAT1..DAT3 */
279 at91_set_B_periph(AT91_PIN_PA0, 1);
280 if (data->slot[i].bus_width == 4) {
281 at91_set_B_periph(AT91_PIN_PA5, 1);
282 at91_set_B_periph(AT91_PIN_PA4, 1);
283 at91_set_B_periph(AT91_PIN_PA3, 1);
284 }
285 slot_count++;
286 break;
287 default:
288 printk(KERN_ERR
289 "AT91: SD/MMC slot %d not available\n", i);
290 break;
291 }
292 }
293 }
294
295 if (slot_count) {
296 /* CLK */
297 at91_set_A_periph(AT91_PIN_PA8, 0);
298
299 mmc_data = *data;
300 platform_device_register(&at91sam9260_mmc_device);
301 }
302}
303#else
304void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
305#endif
306
307
308/* --------------------------------------------------------------------
309 * NAND / SmartMedia
310 * -------------------------------------------------------------------- */
311
312#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
313static struct atmel_nand_data nand_data;
314
315#define NAND_BASE AT91_CHIPSELECT_3
316
317static struct resource nand_resources[] = {
318 [0] = {
319 .start = NAND_BASE,
320 .end = NAND_BASE + SZ_256M - 1,
321 .flags = IORESOURCE_MEM,
322 },
323 [1] = {
324 .start = AT91SAM9260_BASE_ECC,
325 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
326 .flags = IORESOURCE_MEM,
327 }
328};
329
330static struct platform_device at91sam9260_nand_device = {
331 .name = "atmel_nand",
332 .id = -1,
333 .dev = {
334 .platform_data = &nand_data,
335 },
336 .resource = nand_resources,
337 .num_resources = ARRAY_SIZE(nand_resources),
338};
339
340void __init at91_add_device_nand(struct atmel_nand_data *data)
341{
342 unsigned long csa;
343
344 if (!data)
345 return;
346
347 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
348 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
349
350 /* enable pin */
351 if (gpio_is_valid(data->enable_pin))
352 at91_set_gpio_output(data->enable_pin, 1);
353
354 /* ready/busy pin */
355 if (gpio_is_valid(data->rdy_pin))
356 at91_set_gpio_input(data->rdy_pin, 1);
357
358 /* card detect pin */
359 if (gpio_is_valid(data->det_pin))
360 at91_set_gpio_input(data->det_pin, 1);
361
362 nand_data = *data;
363 platform_device_register(&at91sam9260_nand_device);
364}
365#else
366void __init at91_add_device_nand(struct atmel_nand_data *data) {}
367#endif
368
369
370/* --------------------------------------------------------------------
371 * TWI (i2c)
372 * -------------------------------------------------------------------- */
373
374/*
375 * Prefer the GPIO code since the TWI controller isn't robust
376 * (gets overruns and underruns under load) and can only issue
377 * repeated STARTs in one scenario (the driver doesn't yet handle them).
378 */
379
380#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
381
382static struct i2c_gpio_platform_data pdata = {
383 .sda_pin = AT91_PIN_PA23,
384 .sda_is_open_drain = 1,
385 .scl_pin = AT91_PIN_PA24,
386 .scl_is_open_drain = 1,
387 .udelay = 2, /* ~100 kHz */
388};
389
390static struct platform_device at91sam9260_twi_device = {
391 .name = "i2c-gpio",
392 .id = 0,
393 .dev.platform_data = &pdata,
394};
395
396void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
397{
398 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
399 at91_set_multi_drive(AT91_PIN_PA23, 1);
400
401 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
402 at91_set_multi_drive(AT91_PIN_PA24, 1);
403
404 i2c_register_board_info(0, devices, nr_devices);
405 platform_device_register(&at91sam9260_twi_device);
406}
407
408#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
409
410static struct resource twi_resources[] = {
411 [0] = {
412 .start = AT91SAM9260_BASE_TWI,
413 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
414 .flags = IORESOURCE_MEM,
415 },
416 [1] = {
417 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
418 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
419 .flags = IORESOURCE_IRQ,
420 },
421};
422
423static struct platform_device at91sam9260_twi_device = {
424 .id = 0,
425 .resource = twi_resources,
426 .num_resources = ARRAY_SIZE(twi_resources),
427};
428
429void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
430{
431 /* IP version is not the same on 9260 and g20 */
432 if (cpu_is_at91sam9g20()) {
433 at91sam9260_twi_device.name = "i2c-at91sam9g20";
434 } else {
435 at91sam9260_twi_device.name = "i2c-at91sam9260";
436 }
437
438 /* pins used for TWI interface */
439 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
440 at91_set_multi_drive(AT91_PIN_PA23, 1);
441
442 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
443 at91_set_multi_drive(AT91_PIN_PA24, 1);
444
445 i2c_register_board_info(0, devices, nr_devices);
446 platform_device_register(&at91sam9260_twi_device);
447}
448#else
449void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
450#endif
451
452
453/* --------------------------------------------------------------------
454 * SPI
455 * -------------------------------------------------------------------- */
456
457#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
458static u64 spi_dmamask = DMA_BIT_MASK(32);
459
460static struct resource spi0_resources[] = {
461 [0] = {
462 .start = AT91SAM9260_BASE_SPI0,
463 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
464 .flags = IORESOURCE_MEM,
465 },
466 [1] = {
467 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
468 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
469 .flags = IORESOURCE_IRQ,
470 },
471};
472
473static struct platform_device at91sam9260_spi0_device = {
474 .name = "atmel_spi",
475 .id = 0,
476 .dev = {
477 .dma_mask = &spi_dmamask,
478 .coherent_dma_mask = DMA_BIT_MASK(32),
479 },
480 .resource = spi0_resources,
481 .num_resources = ARRAY_SIZE(spi0_resources),
482};
483
484static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
485
486static struct resource spi1_resources[] = {
487 [0] = {
488 .start = AT91SAM9260_BASE_SPI1,
489 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
490 .flags = IORESOURCE_MEM,
491 },
492 [1] = {
493 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
494 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
495 .flags = IORESOURCE_IRQ,
496 },
497};
498
499static struct platform_device at91sam9260_spi1_device = {
500 .name = "atmel_spi",
501 .id = 1,
502 .dev = {
503 .dma_mask = &spi_dmamask,
504 .coherent_dma_mask = DMA_BIT_MASK(32),
505 },
506 .resource = spi1_resources,
507 .num_resources = ARRAY_SIZE(spi1_resources),
508};
509
510static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
511
512void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
513{
514 int i;
515 unsigned long cs_pin;
516 short enable_spi0 = 0;
517 short enable_spi1 = 0;
518
519 /* Choose SPI chip-selects */
520 for (i = 0; i < nr_devices; i++) {
521 if (devices[i].controller_data)
522 cs_pin = (unsigned long) devices[i].controller_data;
523 else if (devices[i].bus_num == 0)
524 cs_pin = spi0_standard_cs[devices[i].chip_select];
525 else
526 cs_pin = spi1_standard_cs[devices[i].chip_select];
527
528 if (!gpio_is_valid(cs_pin))
529 continue;
530
531 if (devices[i].bus_num == 0)
532 enable_spi0 = 1;
533 else
534 enable_spi1 = 1;
535
536 /* enable chip-select pin */
537 at91_set_gpio_output(cs_pin, 1);
538
539 /* pass chip-select pin to driver */
540 devices[i].controller_data = (void *) cs_pin;
541 }
542
543 spi_register_board_info(devices, nr_devices);
544
545 /* Configure SPI bus(es) */
546 if (enable_spi0) {
547 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
548 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
549 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
550
551 platform_device_register(&at91sam9260_spi0_device);
552 }
553 if (enable_spi1) {
554 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
555 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
556 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
557
558 platform_device_register(&at91sam9260_spi1_device);
559 }
560}
561#else
562void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
563#endif
564
565
566/* --------------------------------------------------------------------
567 * Timer/Counter blocks
568 * -------------------------------------------------------------------- */
569
570#ifdef CONFIG_ATMEL_TCLIB
571
572static struct resource tcb0_resources[] = {
573 [0] = {
574 .start = AT91SAM9260_BASE_TCB0,
575 .end = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
576 .flags = IORESOURCE_MEM,
577 },
578 [1] = {
579 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
580 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
581 .flags = IORESOURCE_IRQ,
582 },
583 [2] = {
584 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
585 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
586 .flags = IORESOURCE_IRQ,
587 },
588 [3] = {
589 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
590 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
591 .flags = IORESOURCE_IRQ,
592 },
593};
594
595static struct platform_device at91sam9260_tcb0_device = {
596 .name = "atmel_tcb",
597 .id = 0,
598 .resource = tcb0_resources,
599 .num_resources = ARRAY_SIZE(tcb0_resources),
600};
601
602static struct resource tcb1_resources[] = {
603 [0] = {
604 .start = AT91SAM9260_BASE_TCB1,
605 .end = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
606 .flags = IORESOURCE_MEM,
607 },
608 [1] = {
609 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
610 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
611 .flags = IORESOURCE_IRQ,
612 },
613 [2] = {
614 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
615 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
616 .flags = IORESOURCE_IRQ,
617 },
618 [3] = {
619 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
620 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
621 .flags = IORESOURCE_IRQ,
622 },
623};
624
625static struct platform_device at91sam9260_tcb1_device = {
626 .name = "atmel_tcb",
627 .id = 1,
628 .resource = tcb1_resources,
629 .num_resources = ARRAY_SIZE(tcb1_resources),
630};
631
632static void __init at91_add_device_tc(void)
633{
634 platform_device_register(&at91sam9260_tcb0_device);
635 platform_device_register(&at91sam9260_tcb1_device);
636}
637#else
638static void __init at91_add_device_tc(void) { }
639#endif
640
641
642/* --------------------------------------------------------------------
643 * RTT
644 * -------------------------------------------------------------------- */
645
646static struct resource rtt_resources[] = {
647 {
648 .start = AT91SAM9260_BASE_RTT,
649 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
650 .flags = IORESOURCE_MEM,
651 }, {
652 .flags = IORESOURCE_MEM,
653 }, {
654 .flags = IORESOURCE_IRQ,
655 },
656};
657
658static struct platform_device at91sam9260_rtt_device = {
659 .name = "at91_rtt",
660 .id = 0,
661 .resource = rtt_resources,
662};
663
664
665#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
666static void __init at91_add_device_rtt_rtc(void)
667{
668 at91sam9260_rtt_device.name = "rtc-at91sam9";
669 /*
670 * The second resource is needed:
671 * GPBR will serve as the storage for RTC time offset
672 */
673 at91sam9260_rtt_device.num_resources = 3;
674 rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
675 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
676 rtt_resources[1].end = rtt_resources[1].start + 3;
677 rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
678 rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
679}
680#else
681static void __init at91_add_device_rtt_rtc(void)
682{
683 /* Only one resource is needed: RTT not used as RTC */
684 at91sam9260_rtt_device.num_resources = 1;
685}
686#endif
687
688static void __init at91_add_device_rtt(void)
689{
690 at91_add_device_rtt_rtc();
691 platform_device_register(&at91sam9260_rtt_device);
692}
693
694
695/* --------------------------------------------------------------------
696 * Watchdog
697 * -------------------------------------------------------------------- */
698
699#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
700static struct resource wdt_resources[] = {
701 {
702 .start = AT91SAM9260_BASE_WDT,
703 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
704 .flags = IORESOURCE_MEM,
705 }
706};
707
708static struct platform_device at91sam9260_wdt_device = {
709 .name = "at91_wdt",
710 .id = -1,
711 .resource = wdt_resources,
712 .num_resources = ARRAY_SIZE(wdt_resources),
713};
714
715static void __init at91_add_device_watchdog(void)
716{
717 platform_device_register(&at91sam9260_wdt_device);
718}
719#else
720static void __init at91_add_device_watchdog(void) {}
721#endif
722
723
724/* --------------------------------------------------------------------
725 * SSC -- Synchronous Serial Controller
726 * -------------------------------------------------------------------- */
727
728#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
729static u64 ssc_dmamask = DMA_BIT_MASK(32);
730
731static struct resource ssc_resources[] = {
732 [0] = {
733 .start = AT91SAM9260_BASE_SSC,
734 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
735 .flags = IORESOURCE_MEM,
736 },
737 [1] = {
738 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
739 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
740 .flags = IORESOURCE_IRQ,
741 },
742};
743
744static struct platform_device at91sam9260_ssc_device = {
745 .name = "at91rm9200_ssc",
746 .id = 0,
747 .dev = {
748 .dma_mask = &ssc_dmamask,
749 .coherent_dma_mask = DMA_BIT_MASK(32),
750 },
751 .resource = ssc_resources,
752 .num_resources = ARRAY_SIZE(ssc_resources),
753};
754
755static inline void configure_ssc_pins(unsigned pins)
756{
757 if (pins & ATMEL_SSC_TF)
758 at91_set_A_periph(AT91_PIN_PB17, 1);
759 if (pins & ATMEL_SSC_TK)
760 at91_set_A_periph(AT91_PIN_PB16, 1);
761 if (pins & ATMEL_SSC_TD)
762 at91_set_A_periph(AT91_PIN_PB18, 1);
763 if (pins & ATMEL_SSC_RD)
764 at91_set_A_periph(AT91_PIN_PB19, 1);
765 if (pins & ATMEL_SSC_RK)
766 at91_set_A_periph(AT91_PIN_PB20, 1);
767 if (pins & ATMEL_SSC_RF)
768 at91_set_A_periph(AT91_PIN_PB21, 1);
769}
770
771/*
772 * SSC controllers are accessed through library code, instead of any
773 * kind of all-singing/all-dancing driver. For example one could be
774 * used by a particular I2S audio codec's driver, while another one
775 * on the same system might be used by a custom data capture driver.
776 */
777void __init at91_add_device_ssc(unsigned id, unsigned pins)
778{
779 struct platform_device *pdev;
780
781 /*
782 * NOTE: caller is responsible for passing information matching
783 * "pins" to whatever will be using each particular controller.
784 */
785 switch (id) {
786 case AT91SAM9260_ID_SSC:
787 pdev = &at91sam9260_ssc_device;
788 configure_ssc_pins(pins);
789 break;
790 default:
791 return;
792 }
793
794 platform_device_register(pdev);
795}
796
797#else
798void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
799#endif
800
801
802/* --------------------------------------------------------------------
803 * UART
804 * -------------------------------------------------------------------- */
805#if defined(CONFIG_SERIAL_ATMEL)
806static struct resource dbgu_resources[] = {
807 [0] = {
808 .start = AT91SAM9260_BASE_DBGU,
809 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
810 .flags = IORESOURCE_MEM,
811 },
812 [1] = {
813 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
814 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
815 .flags = IORESOURCE_IRQ,
816 },
817};
818
819static struct atmel_uart_data dbgu_data = {
820 .use_dma_tx = 0,
821 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
822};
823
824static u64 dbgu_dmamask = DMA_BIT_MASK(32);
825
826static struct platform_device at91sam9260_dbgu_device = {
827 .name = "atmel_usart",
828 .id = 0,
829 .dev = {
830 .dma_mask = &dbgu_dmamask,
831 .coherent_dma_mask = DMA_BIT_MASK(32),
832 .platform_data = &dbgu_data,
833 },
834 .resource = dbgu_resources,
835 .num_resources = ARRAY_SIZE(dbgu_resources),
836};
837
838static inline void configure_dbgu_pins(void)
839{
840 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
841 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
842}
843
844static struct resource uart0_resources[] = {
845 [0] = {
846 .start = AT91SAM9260_BASE_US0,
847 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
848 .flags = IORESOURCE_MEM,
849 },
850 [1] = {
851 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
852 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
853 .flags = IORESOURCE_IRQ,
854 },
855};
856
857static struct atmel_uart_data uart0_data = {
858 .use_dma_tx = 1,
859 .use_dma_rx = 1,
860};
861
862static u64 uart0_dmamask = DMA_BIT_MASK(32);
863
864static struct platform_device at91sam9260_uart0_device = {
865 .name = "atmel_usart",
866 .id = 1,
867 .dev = {
868 .dma_mask = &uart0_dmamask,
869 .coherent_dma_mask = DMA_BIT_MASK(32),
870 .platform_data = &uart0_data,
871 },
872 .resource = uart0_resources,
873 .num_resources = ARRAY_SIZE(uart0_resources),
874};
875
876static inline void configure_usart0_pins(unsigned pins)
877{
878 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
879 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
880
881 if (pins & ATMEL_UART_RTS)
882 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
883 if (pins & ATMEL_UART_CTS)
884 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
885 if (pins & ATMEL_UART_DTR)
886 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
887 if (pins & ATMEL_UART_DSR)
888 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
889 if (pins & ATMEL_UART_DCD)
890 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
891 if (pins & ATMEL_UART_RI)
892 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
893}
894
895static struct resource uart1_resources[] = {
896 [0] = {
897 .start = AT91SAM9260_BASE_US1,
898 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
899 .flags = IORESOURCE_MEM,
900 },
901 [1] = {
902 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
903 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
904 .flags = IORESOURCE_IRQ,
905 },
906};
907
908static struct atmel_uart_data uart1_data = {
909 .use_dma_tx = 1,
910 .use_dma_rx = 1,
911};
912
913static u64 uart1_dmamask = DMA_BIT_MASK(32);
914
915static struct platform_device at91sam9260_uart1_device = {
916 .name = "atmel_usart",
917 .id = 2,
918 .dev = {
919 .dma_mask = &uart1_dmamask,
920 .coherent_dma_mask = DMA_BIT_MASK(32),
921 .platform_data = &uart1_data,
922 },
923 .resource = uart1_resources,
924 .num_resources = ARRAY_SIZE(uart1_resources),
925};
926
927static inline void configure_usart1_pins(unsigned pins)
928{
929 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
930 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
931
932 if (pins & ATMEL_UART_RTS)
933 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
934 if (pins & ATMEL_UART_CTS)
935 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
936}
937
938static struct resource uart2_resources[] = {
939 [0] = {
940 .start = AT91SAM9260_BASE_US2,
941 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
942 .flags = IORESOURCE_MEM,
943 },
944 [1] = {
945 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
946 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
947 .flags = IORESOURCE_IRQ,
948 },
949};
950
951static struct atmel_uart_data uart2_data = {
952 .use_dma_tx = 1,
953 .use_dma_rx = 1,
954};
955
956static u64 uart2_dmamask = DMA_BIT_MASK(32);
957
958static struct platform_device at91sam9260_uart2_device = {
959 .name = "atmel_usart",
960 .id = 3,
961 .dev = {
962 .dma_mask = &uart2_dmamask,
963 .coherent_dma_mask = DMA_BIT_MASK(32),
964 .platform_data = &uart2_data,
965 },
966 .resource = uart2_resources,
967 .num_resources = ARRAY_SIZE(uart2_resources),
968};
969
970static inline void configure_usart2_pins(unsigned pins)
971{
972 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
973 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
974
975 if (pins & ATMEL_UART_RTS)
976 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
977 if (pins & ATMEL_UART_CTS)
978 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
979}
980
981static struct resource uart3_resources[] = {
982 [0] = {
983 .start = AT91SAM9260_BASE_US3,
984 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
985 .flags = IORESOURCE_MEM,
986 },
987 [1] = {
988 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
989 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
990 .flags = IORESOURCE_IRQ,
991 },
992};
993
994static struct atmel_uart_data uart3_data = {
995 .use_dma_tx = 1,
996 .use_dma_rx = 1,
997};
998
999static u64 uart3_dmamask = DMA_BIT_MASK(32);
1000
1001static struct platform_device at91sam9260_uart3_device = {
1002 .name = "atmel_usart",
1003 .id = 4,
1004 .dev = {
1005 .dma_mask = &uart3_dmamask,
1006 .coherent_dma_mask = DMA_BIT_MASK(32),
1007 .platform_data = &uart3_data,
1008 },
1009 .resource = uart3_resources,
1010 .num_resources = ARRAY_SIZE(uart3_resources),
1011};
1012
1013static inline void configure_usart3_pins(unsigned pins)
1014{
1015 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
1016 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
1017
1018 if (pins & ATMEL_UART_RTS)
1019 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
1020 if (pins & ATMEL_UART_CTS)
1021 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
1022}
1023
1024static struct resource uart4_resources[] = {
1025 [0] = {
1026 .start = AT91SAM9260_BASE_US4,
1027 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1028 .flags = IORESOURCE_MEM,
1029 },
1030 [1] = {
1031 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1032 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1033 .flags = IORESOURCE_IRQ,
1034 },
1035};
1036
1037static struct atmel_uart_data uart4_data = {
1038 .use_dma_tx = 1,
1039 .use_dma_rx = 1,
1040};
1041
1042static u64 uart4_dmamask = DMA_BIT_MASK(32);
1043
1044static struct platform_device at91sam9260_uart4_device = {
1045 .name = "atmel_usart",
1046 .id = 5,
1047 .dev = {
1048 .dma_mask = &uart4_dmamask,
1049 .coherent_dma_mask = DMA_BIT_MASK(32),
1050 .platform_data = &uart4_data,
1051 },
1052 .resource = uart4_resources,
1053 .num_resources = ARRAY_SIZE(uart4_resources),
1054};
1055
1056static inline void configure_usart4_pins(void)
1057{
1058 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1059 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1060}
1061
1062static struct resource uart5_resources[] = {
1063 [0] = {
1064 .start = AT91SAM9260_BASE_US5,
1065 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1066 .flags = IORESOURCE_MEM,
1067 },
1068 [1] = {
1069 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1070 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1071 .flags = IORESOURCE_IRQ,
1072 },
1073};
1074
1075static struct atmel_uart_data uart5_data = {
1076 .use_dma_tx = 1,
1077 .use_dma_rx = 1,
1078};
1079
1080static u64 uart5_dmamask = DMA_BIT_MASK(32);
1081
1082static struct platform_device at91sam9260_uart5_device = {
1083 .name = "atmel_usart",
1084 .id = 6,
1085 .dev = {
1086 .dma_mask = &uart5_dmamask,
1087 .coherent_dma_mask = DMA_BIT_MASK(32),
1088 .platform_data = &uart5_data,
1089 },
1090 .resource = uart5_resources,
1091 .num_resources = ARRAY_SIZE(uart5_resources),
1092};
1093
1094static inline void configure_usart5_pins(void)
1095{
1096 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1097 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1098}
1099
1100static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1101
1102void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1103{
1104 struct platform_device *pdev;
1105 struct atmel_uart_data *pdata;
1106
1107 switch (id) {
1108 case 0: /* DBGU */
1109 pdev = &at91sam9260_dbgu_device;
1110 configure_dbgu_pins();
1111 break;
1112 case AT91SAM9260_ID_US0:
1113 pdev = &at91sam9260_uart0_device;
1114 configure_usart0_pins(pins);
1115 break;
1116 case AT91SAM9260_ID_US1:
1117 pdev = &at91sam9260_uart1_device;
1118 configure_usart1_pins(pins);
1119 break;
1120 case AT91SAM9260_ID_US2:
1121 pdev = &at91sam9260_uart2_device;
1122 configure_usart2_pins(pins);
1123 break;
1124 case AT91SAM9260_ID_US3:
1125 pdev = &at91sam9260_uart3_device;
1126 configure_usart3_pins(pins);
1127 break;
1128 case AT91SAM9260_ID_US4:
1129 pdev = &at91sam9260_uart4_device;
1130 configure_usart4_pins();
1131 break;
1132 case AT91SAM9260_ID_US5:
1133 pdev = &at91sam9260_uart5_device;
1134 configure_usart5_pins();
1135 break;
1136 default:
1137 return;
1138 }
1139 pdata = pdev->dev.platform_data;
1140 pdata->num = portnr; /* update to mapped ID */
1141
1142 if (portnr < ATMEL_MAX_UART)
1143 at91_uarts[portnr] = pdev;
1144}
1145
1146void __init at91_add_device_serial(void)
1147{
1148 int i;
1149
1150 for (i = 0; i < ATMEL_MAX_UART; i++) {
1151 if (at91_uarts[i])
1152 platform_device_register(at91_uarts[i]);
1153 }
1154}
1155#else
1156void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1157void __init at91_add_device_serial(void) {}
1158#endif
1159
1160/* --------------------------------------------------------------------
1161 * CF/IDE
1162 * -------------------------------------------------------------------- */
1163
1164#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1165 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1166
1167static struct at91_cf_data cf0_data;
1168
1169static struct resource cf0_resources[] = {
1170 [0] = {
1171 .start = AT91_CHIPSELECT_4,
1172 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
1173 .flags = IORESOURCE_MEM,
1174 }
1175};
1176
1177static struct platform_device cf0_device = {
1178 .id = 0,
1179 .dev = {
1180 .platform_data = &cf0_data,
1181 },
1182 .resource = cf0_resources,
1183 .num_resources = ARRAY_SIZE(cf0_resources),
1184};
1185
1186static struct at91_cf_data cf1_data;
1187
1188static struct resource cf1_resources[] = {
1189 [0] = {
1190 .start = AT91_CHIPSELECT_5,
1191 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
1192 .flags = IORESOURCE_MEM,
1193 }
1194};
1195
1196static struct platform_device cf1_device = {
1197 .id = 1,
1198 .dev = {
1199 .platform_data = &cf1_data,
1200 },
1201 .resource = cf1_resources,
1202 .num_resources = ARRAY_SIZE(cf1_resources),
1203};
1204
1205void __init at91_add_device_cf(struct at91_cf_data *data)
1206{
1207 struct platform_device *pdev;
1208 unsigned long csa;
1209
1210 if (!data)
1211 return;
1212
1213 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1214
1215 switch (data->chipselect) {
1216 case 4:
1217 at91_set_multi_drive(AT91_PIN_PC8, 0);
1218 at91_set_A_periph(AT91_PIN_PC8, 0);
1219 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1220 cf0_data = *data;
1221 pdev = &cf0_device;
1222 break;
1223 case 5:
1224 at91_set_multi_drive(AT91_PIN_PC9, 0);
1225 at91_set_A_periph(AT91_PIN_PC9, 0);
1226 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1227 cf1_data = *data;
1228 pdev = &cf1_device;
1229 break;
1230 default:
1231 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1232 data->chipselect);
1233 return;
1234 }
1235
1236 at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1237
1238 if (gpio_is_valid(data->rst_pin)) {
1239 at91_set_multi_drive(data->rst_pin, 0);
1240 at91_set_gpio_output(data->rst_pin, 1);
1241 }
1242
1243 if (gpio_is_valid(data->irq_pin)) {
1244 at91_set_gpio_input(data->irq_pin, 0);
1245 at91_set_deglitch(data->irq_pin, 1);
1246 }
1247
1248 if (gpio_is_valid(data->det_pin)) {
1249 at91_set_gpio_input(data->det_pin, 0);
1250 at91_set_deglitch(data->det_pin, 1);
1251 }
1252
1253 at91_set_B_periph(AT91_PIN_PC6, 0); /* CFCE1 */
1254 at91_set_B_periph(AT91_PIN_PC7, 0); /* CFCE2 */
1255 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */
1256 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */
1257
1258 if (IS_ENABLED(CONFIG_PATA_AT91) && (data->flags & AT91_CF_TRUE_IDE))
1259 pdev->name = "pata_at91";
1260 else
1261 pdev->name = "at91_cf";
1262
1263 platform_device_register(pdev);
1264}
1265
1266#else
1267void __init at91_add_device_cf(struct at91_cf_data * data) {}
1268#endif
1269
1270/* --------------------------------------------------------------------
1271 * ADCs
1272 * -------------------------------------------------------------------- */
1273
1274#if IS_ENABLED(CONFIG_AT91_ADC)
1275static struct at91_adc_data adc_data;
1276
1277static struct resource adc_resources[] = {
1278 [0] = {
1279 .start = AT91SAM9260_BASE_ADC,
1280 .end = AT91SAM9260_BASE_ADC + SZ_16K - 1,
1281 .flags = IORESOURCE_MEM,
1282 },
1283 [1] = {
1284 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1285 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1286 .flags = IORESOURCE_IRQ,
1287 },
1288};
1289
1290static struct platform_device at91_adc_device = {
1291 .name = "at91sam9260-adc",
1292 .id = -1,
1293 .dev = {
1294 .platform_data = &adc_data,
1295 },
1296 .resource = adc_resources,
1297 .num_resources = ARRAY_SIZE(adc_resources),
1298};
1299
1300static struct at91_adc_trigger at91_adc_triggers[] = {
1301 [0] = {
1302 .name = "timer-counter-0",
1303 .value = 0x1,
1304 },
1305 [1] = {
1306 .name = "timer-counter-1",
1307 .value = 0x3,
1308 },
1309 [2] = {
1310 .name = "timer-counter-2",
1311 .value = 0x5,
1312 },
1313 [3] = {
1314 .name = "external",
1315 .value = 0xd,
1316 .is_external = true,
1317 },
1318};
1319
1320void __init at91_add_device_adc(struct at91_adc_data *data)
1321{
1322 if (!data)
1323 return;
1324
1325 if (test_bit(0, &data->channels_used))
1326 at91_set_A_periph(AT91_PIN_PC0, 0);
1327 if (test_bit(1, &data->channels_used))
1328 at91_set_A_periph(AT91_PIN_PC1, 0);
1329 if (test_bit(2, &data->channels_used))
1330 at91_set_A_periph(AT91_PIN_PC2, 0);
1331 if (test_bit(3, &data->channels_used))
1332 at91_set_A_periph(AT91_PIN_PC3, 0);
1333
1334 if (data->use_external_triggers)
1335 at91_set_A_periph(AT91_PIN_PA22, 0);
1336
1337 data->startup_time = 10;
1338 data->trigger_number = 4;
1339 data->trigger_list = at91_adc_triggers;
1340
1341 adc_data = *data;
1342 platform_device_register(&at91_adc_device);
1343}
1344#else
1345void __init at91_add_device_adc(struct at91_adc_data *data) {}
1346#endif
1347
1348/* -------------------------------------------------------------------- */
1349/*
1350 * These devices are always present and don't need any board-specific
1351 * setup.
1352 */
1353static int __init at91_add_standard_devices(void)
1354{
1355 if (of_have_populated_dt())
1356 return 0;
1357
1358 at91_add_device_rtt();
1359 at91_add_device_watchdog();
1360 at91_add_device_tc();
1361 return 0;
1362}
1363
1364arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index a8bd35963332..d29953ecb0c4 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -10,282 +10,12 @@
10 * 10 *
11 */ 11 */
12 12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/clk/at91_pmc.h>
16
17#include <asm/proc-fns.h>
18#include <asm/irq.h>
19#include <asm/mach/arch.h>
20#include <asm/mach/map.h>
21#include <asm/system_misc.h> 13#include <asm/system_misc.h>
22#include <mach/cpu.h> 14#include <mach/cpu.h>
23#include <mach/at91sam9261.h>
24#include <mach/hardware.h> 15#include <mach/hardware.h>
25 16
26#include "at91_aic.h"
27#include "soc.h" 17#include "soc.h"
28#include "generic.h" 18#include "generic.h"
29#include "sam9_smc.h"
30#include "pm.h"
31
32#if defined(CONFIG_OLD_CLK_AT91)
33#include "clock.h"
34
35/* --------------------------------------------------------------------
36 * Clocks
37 * -------------------------------------------------------------------- */
38
39/*
40 * The peripheral clocks.
41 */
42static struct clk pioA_clk = {
43 .name = "pioA_clk",
44 .pmc_mask = 1 << AT91SAM9261_ID_PIOA,
45 .type = CLK_TYPE_PERIPHERAL,
46};
47static struct clk pioB_clk = {
48 .name = "pioB_clk",
49 .pmc_mask = 1 << AT91SAM9261_ID_PIOB,
50 .type = CLK_TYPE_PERIPHERAL,
51};
52static struct clk pioC_clk = {
53 .name = "pioC_clk",
54 .pmc_mask = 1 << AT91SAM9261_ID_PIOC,
55 .type = CLK_TYPE_PERIPHERAL,
56};
57static struct clk usart0_clk = {
58 .name = "usart0_clk",
59 .pmc_mask = 1 << AT91SAM9261_ID_US0,
60 .type = CLK_TYPE_PERIPHERAL,
61};
62static struct clk usart1_clk = {
63 .name = "usart1_clk",
64 .pmc_mask = 1 << AT91SAM9261_ID_US1,
65 .type = CLK_TYPE_PERIPHERAL,
66};
67static struct clk usart2_clk = {
68 .name = "usart2_clk",
69 .pmc_mask = 1 << AT91SAM9261_ID_US2,
70 .type = CLK_TYPE_PERIPHERAL,
71};
72static struct clk mmc_clk = {
73 .name = "mci_clk",
74 .pmc_mask = 1 << AT91SAM9261_ID_MCI,
75 .type = CLK_TYPE_PERIPHERAL,
76};
77static struct clk udc_clk = {
78 .name = "udc_clk",
79 .pmc_mask = 1 << AT91SAM9261_ID_UDP,
80 .type = CLK_TYPE_PERIPHERAL,
81};
82static struct clk twi_clk = {
83 .name = "twi_clk",
84 .pmc_mask = 1 << AT91SAM9261_ID_TWI,
85 .type = CLK_TYPE_PERIPHERAL,
86};
87static struct clk spi0_clk = {
88 .name = "spi0_clk",
89 .pmc_mask = 1 << AT91SAM9261_ID_SPI0,
90 .type = CLK_TYPE_PERIPHERAL,
91};
92static struct clk spi1_clk = {
93 .name = "spi1_clk",
94 .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
95 .type = CLK_TYPE_PERIPHERAL,
96};
97static struct clk ssc0_clk = {
98 .name = "ssc0_clk",
99 .pmc_mask = 1 << AT91SAM9261_ID_SSC0,
100 .type = CLK_TYPE_PERIPHERAL,
101};
102static struct clk ssc1_clk = {
103 .name = "ssc1_clk",
104 .pmc_mask = 1 << AT91SAM9261_ID_SSC1,
105 .type = CLK_TYPE_PERIPHERAL,
106};
107static struct clk ssc2_clk = {
108 .name = "ssc2_clk",
109 .pmc_mask = 1 << AT91SAM9261_ID_SSC2,
110 .type = CLK_TYPE_PERIPHERAL,
111};
112static struct clk tc0_clk = {
113 .name = "tc0_clk",
114 .pmc_mask = 1 << AT91SAM9261_ID_TC0,
115 .type = CLK_TYPE_PERIPHERAL,
116};
117static struct clk tc1_clk = {
118 .name = "tc1_clk",
119 .pmc_mask = 1 << AT91SAM9261_ID_TC1,
120 .type = CLK_TYPE_PERIPHERAL,
121};
122static struct clk tc2_clk = {
123 .name = "tc2_clk",
124 .pmc_mask = 1 << AT91SAM9261_ID_TC2,
125 .type = CLK_TYPE_PERIPHERAL,
126};
127static struct clk ohci_clk = {
128 .name = "ohci_clk",
129 .pmc_mask = 1 << AT91SAM9261_ID_UHP,
130 .type = CLK_TYPE_PERIPHERAL,
131};
132static struct clk lcdc_clk = {
133 .name = "lcdc_clk",
134 .pmc_mask = 1 << AT91SAM9261_ID_LCDC,
135 .type = CLK_TYPE_PERIPHERAL,
136};
137
138/* HClocks */
139static struct clk hck0 = {
140 .name = "hck0",
141 .pmc_mask = AT91_PMC_HCK0,
142 .type = CLK_TYPE_SYSTEM,
143 .id = 0,
144};
145static struct clk hck1 = {
146 .name = "hck1",
147 .pmc_mask = AT91_PMC_HCK1,
148 .type = CLK_TYPE_SYSTEM,
149 .id = 1,
150};
151
152static struct clk *periph_clocks[] __initdata = {
153 &pioA_clk,
154 &pioB_clk,
155 &pioC_clk,
156 &usart0_clk,
157 &usart1_clk,
158 &usart2_clk,
159 &mmc_clk,
160 &udc_clk,
161 &twi_clk,
162 &spi0_clk,
163 &spi1_clk,
164 &ssc0_clk,
165 &ssc1_clk,
166 &ssc2_clk,
167 &tc0_clk,
168 &tc1_clk,
169 &tc2_clk,
170 &ohci_clk,
171 &lcdc_clk,
172 // irq0 .. irq2
173};
174
175static struct clk_lookup periph_clocks_lookups[] = {
176 CLKDEV_CON_DEV_ID("hclk", "at91sam9261-lcdfb.0", &hck1),
177 CLKDEV_CON_DEV_ID("hclk", "at91sam9g10-lcdfb.0", &hck1),
178 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
179 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
180 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
181 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
182 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
183 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
184 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
185 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.2", &ssc2_clk),
186 CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc0_clk),
187 CLKDEV_CON_DEV_ID("pclk", "fffc0000.ssc", &ssc1_clk),
188 CLKDEV_CON_DEV_ID("pclk", "fffc4000.ssc", &ssc2_clk),
189 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
190 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261.0", &twi_clk),
191 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi_clk),
192 CLKDEV_CON_ID("pioA", &pioA_clk),
193 CLKDEV_CON_ID("pioB", &pioB_clk),
194 CLKDEV_CON_ID("pioC", &pioC_clk),
195 /* more lookup table for DT entries */
196 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
197 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
198 CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
199 CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
200 CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
201 CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
202 CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
203 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0),
204 CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1),
205 CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
206 CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
207 CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
208 CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
209 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
210 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
211 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
212};
213
214static struct clk_lookup usart_clocks_lookups[] = {
215 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
216 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
217 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
218 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
219};
220
221/*
222 * The four programmable clocks.
223 * You must configure pin multiplexing to bring these signals out.
224 */
225static struct clk pck0 = {
226 .name = "pck0",
227 .pmc_mask = AT91_PMC_PCK0,
228 .type = CLK_TYPE_PROGRAMMABLE,
229 .id = 0,
230};
231static struct clk pck1 = {
232 .name = "pck1",
233 .pmc_mask = AT91_PMC_PCK1,
234 .type = CLK_TYPE_PROGRAMMABLE,
235 .id = 1,
236};
237static struct clk pck2 = {
238 .name = "pck2",
239 .pmc_mask = AT91_PMC_PCK2,
240 .type = CLK_TYPE_PROGRAMMABLE,
241 .id = 2,
242};
243static struct clk pck3 = {
244 .name = "pck3",
245 .pmc_mask = AT91_PMC_PCK3,
246 .type = CLK_TYPE_PROGRAMMABLE,
247 .id = 3,
248};
249
250static void __init at91sam9261_register_clocks(void)
251{
252 int i;
253
254 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
255 clk_register(periph_clocks[i]);
256
257 clkdev_add_table(periph_clocks_lookups,
258 ARRAY_SIZE(periph_clocks_lookups));
259 clkdev_add_table(usart_clocks_lookups,
260 ARRAY_SIZE(usart_clocks_lookups));
261
262 clk_register(&pck0);
263 clk_register(&pck1);
264 clk_register(&pck2);
265 clk_register(&pck3);
266
267 clk_register(&hck0);
268 clk_register(&hck1);
269}
270#else
271#define at91sam9261_register_clocks NULL
272#endif
273/* --------------------------------------------------------------------
274 * GPIO
275 * -------------------------------------------------------------------- */
276
277static struct at91_gpio_bank at91sam9261_gpio[] __initdata = {
278 {
279 .id = AT91SAM9261_ID_PIOA,
280 .regbase = AT91SAM9261_BASE_PIOA,
281 }, {
282 .id = AT91SAM9261_ID_PIOB,
283 .regbase = AT91SAM9261_BASE_PIOB,
284 }, {
285 .id = AT91SAM9261_ID_PIOC,
286 .regbase = AT91SAM9261_BASE_PIOC,
287 }
288};
289 19
290/* -------------------------------------------------------------------- 20/* --------------------------------------------------------------------
291 * AT91SAM9261 processor initialization 21 * AT91SAM9261 processor initialization
@@ -299,119 +29,14 @@ static void __init at91sam9261_map_io(void)
299 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); 29 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
300} 30}
301 31
302static void __init at91sam9261_ioremap_registers(void)
303{
304 at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512);
305 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
306 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
307 at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX);
308 at91_pm_set_standby(at91sam9_sdram_standby);
309}
310
311static void __init at91sam9261_initialize(void) 32static void __init at91sam9261_initialize(void)
312{ 33{
313 arm_pm_idle = at91sam9_idle; 34 arm_pm_idle = at91sam9_idle;
314 35
315 at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); 36 at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT);
316
317 /* Register GPIO subsystem */
318 at91_gpio_init(at91sam9261_gpio, 3);
319}
320
321static struct resource rstc_resources[] = {
322 [0] = {
323 .start = AT91SAM9261_BASE_RSTC,
324 .end = AT91SAM9261_BASE_RSTC + SZ_16 - 1,
325 .flags = IORESOURCE_MEM,
326 },
327 [1] = {
328 .start = AT91SAM9261_BASE_SDRAMC,
329 .end = AT91SAM9261_BASE_SDRAMC + SZ_512 - 1,
330 .flags = IORESOURCE_MEM,
331 },
332};
333
334static struct platform_device rstc_device = {
335 .name = "at91-sam9260-reset",
336 .resource = rstc_resources,
337 .num_resources = ARRAY_SIZE(rstc_resources),
338};
339
340static struct resource shdwc_resources[] = {
341 [0] = {
342 .start = AT91SAM9261_BASE_SHDWC,
343 .end = AT91SAM9261_BASE_SHDWC + SZ_16 - 1,
344 .flags = IORESOURCE_MEM,
345 },
346};
347
348static struct platform_device shdwc_device = {
349 .name = "at91-poweroff",
350 .resource = shdwc_resources,
351 .num_resources = ARRAY_SIZE(shdwc_resources),
352};
353
354static void __init at91sam9261_register_devices(void)
355{
356 platform_device_register(&rstc_device);
357 platform_device_register(&shdwc_device);
358}
359
360/* --------------------------------------------------------------------
361 * Interrupt initialization
362 * -------------------------------------------------------------------- */
363
364/*
365 * The default interrupt priority levels (0 = lowest, 7 = highest).
366 */
367static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
368 7, /* Advanced Interrupt Controller */
369 7, /* System Peripherals */
370 1, /* Parallel IO Controller A */
371 1, /* Parallel IO Controller B */
372 1, /* Parallel IO Controller C */
373 0,
374 5, /* USART 0 */
375 5, /* USART 1 */
376 5, /* USART 2 */
377 0, /* Multimedia Card Interface */
378 2, /* USB Device Port */
379 6, /* Two-Wire Interface */
380 5, /* Serial Peripheral Interface 0 */
381 5, /* Serial Peripheral Interface 1 */
382 4, /* Serial Synchronous Controller 0 */
383 4, /* Serial Synchronous Controller 1 */
384 4, /* Serial Synchronous Controller 2 */
385 0, /* Timer Counter 0 */
386 0, /* Timer Counter 1 */
387 0, /* Timer Counter 2 */
388 2, /* USB Host port */
389 3, /* LCD Controller */
390 0,
391 0,
392 0,
393 0,
394 0,
395 0,
396 0,
397 0, /* Advanced Interrupt Controller */
398 0, /* Advanced Interrupt Controller */
399 0, /* Advanced Interrupt Controller */
400};
401
402static void __init at91sam9261_init_time(void)
403{
404 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
405} 37}
406 38
407AT91_SOC_START(at91sam9261) 39AT91_SOC_START(at91sam9261)
408 .map_io = at91sam9261_map_io, 40 .map_io = at91sam9261_map_io,
409 .default_irq_priority = at91sam9261_default_irq_priority,
410 .extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
411 | (1 << AT91SAM9261_ID_IRQ2),
412 .ioremap_registers = at91sam9261_ioremap_registers,
413 .register_clocks = at91sam9261_register_clocks,
414 .register_devices = at91sam9261_register_devices,
415 .init = at91sam9261_initialize, 41 .init = at91sam9261_initialize,
416 .init_time = at91sam9261_init_time,
417AT91_SOC_END 42AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
deleted file mode 100644
index 29baacb5c359..000000000000
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ /dev/null
@@ -1,1098 +0,0 @@
1/*
2 * arch/arm/mach-at91/at91sam9261_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13#include <asm/mach/arch.h>
14#include <asm/mach/map.h>
15
16#include <linux/dma-mapping.h>
17#include <linux/gpio.h>
18#include <linux/platform_device.h>
19#include <linux/i2c-gpio.h>
20
21#include <linux/fb.h>
22#include <video/atmel_lcdc.h>
23
24#include <mach/at91sam9261.h>
25#include <mach/at91sam9261_matrix.h>
26#include <mach/at91_matrix.h>
27#include <mach/at91sam9_smc.h>
28#include <mach/hardware.h>
29
30#include "board.h"
31#include "generic.h"
32#include "gpio.h"
33
34/* --------------------------------------------------------------------
35 * USB Host
36 * -------------------------------------------------------------------- */
37
38#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
39static u64 ohci_dmamask = DMA_BIT_MASK(32);
40static struct at91_usbh_data usbh_data;
41
42static struct resource usbh_resources[] = {
43 [0] = {
44 .start = AT91SAM9261_UHP_BASE,
45 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
50 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
55static struct platform_device at91sam9261_usbh_device = {
56 .name = "at91_ohci",
57 .id = -1,
58 .dev = {
59 .dma_mask = &ohci_dmamask,
60 .coherent_dma_mask = DMA_BIT_MASK(32),
61 .platform_data = &usbh_data,
62 },
63 .resource = usbh_resources,
64 .num_resources = ARRAY_SIZE(usbh_resources),
65};
66
67void __init at91_add_device_usbh(struct at91_usbh_data *data)
68{
69 int i;
70
71 if (!data)
72 return;
73
74 /* Enable overcurrent notification */
75 for (i = 0; i < data->ports; i++) {
76 if (gpio_is_valid(data->overcurrent_pin[i]))
77 at91_set_gpio_input(data->overcurrent_pin[i], 1);
78 }
79
80 usbh_data = *data;
81 platform_device_register(&at91sam9261_usbh_device);
82}
83#else
84void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
85#endif
86
87
88/* --------------------------------------------------------------------
89 * USB Device (Gadget)
90 * -------------------------------------------------------------------- */
91
92#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
93static struct at91_udc_data udc_data;
94
95static struct resource udc_resources[] = {
96 [0] = {
97 .start = AT91SAM9261_BASE_UDP,
98 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
99 .flags = IORESOURCE_MEM,
100 },
101 [1] = {
102 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
103 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
104 .flags = IORESOURCE_IRQ,
105 },
106};
107
108static struct platform_device at91sam9261_udc_device = {
109 .name = "at91_udc",
110 .id = -1,
111 .dev = {
112 .platform_data = &udc_data,
113 },
114 .resource = udc_resources,
115 .num_resources = ARRAY_SIZE(udc_resources),
116};
117
118void __init at91_add_device_udc(struct at91_udc_data *data)
119{
120 if (!data)
121 return;
122
123 if (gpio_is_valid(data->vbus_pin)) {
124 at91_set_gpio_input(data->vbus_pin, 0);
125 at91_set_deglitch(data->vbus_pin, 1);
126 }
127
128 /* Pullup pin is handled internally by USB device peripheral */
129
130 udc_data = *data;
131 platform_device_register(&at91sam9261_udc_device);
132}
133#else
134void __init at91_add_device_udc(struct at91_udc_data *data) {}
135#endif
136
137/* --------------------------------------------------------------------
138 * MMC / SD
139 * -------------------------------------------------------------------- */
140
141#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
142static u64 mmc_dmamask = DMA_BIT_MASK(32);
143static struct mci_platform_data mmc_data;
144
145static struct resource mmc_resources[] = {
146 [0] = {
147 .start = AT91SAM9261_BASE_MCI,
148 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
149 .flags = IORESOURCE_MEM,
150 },
151 [1] = {
152 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
153 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
154 .flags = IORESOURCE_IRQ,
155 },
156};
157
158static struct platform_device at91sam9261_mmc_device = {
159 .name = "atmel_mci",
160 .id = -1,
161 .dev = {
162 .dma_mask = &mmc_dmamask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
164 .platform_data = &mmc_data,
165 },
166 .resource = mmc_resources,
167 .num_resources = ARRAY_SIZE(mmc_resources),
168};
169
170void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
171{
172 if (!data)
173 return;
174
175 if (data->slot[0].bus_width) {
176 /* input/irq */
177 if (gpio_is_valid(data->slot[0].detect_pin)) {
178 at91_set_gpio_input(data->slot[0].detect_pin, 1);
179 at91_set_deglitch(data->slot[0].detect_pin, 1);
180 }
181 if (gpio_is_valid(data->slot[0].wp_pin))
182 at91_set_gpio_input(data->slot[0].wp_pin, 1);
183
184 /* CLK */
185 at91_set_B_periph(AT91_PIN_PA2, 0);
186
187 /* CMD */
188 at91_set_B_periph(AT91_PIN_PA1, 1);
189
190 /* DAT0, maybe DAT1..DAT3 */
191 at91_set_B_periph(AT91_PIN_PA0, 1);
192 if (data->slot[0].bus_width == 4) {
193 at91_set_B_periph(AT91_PIN_PA4, 1);
194 at91_set_B_periph(AT91_PIN_PA5, 1);
195 at91_set_B_periph(AT91_PIN_PA6, 1);
196 }
197
198 mmc_data = *data;
199 platform_device_register(&at91sam9261_mmc_device);
200 }
201}
202#else
203void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
204#endif
205
206
207/* --------------------------------------------------------------------
208 * NAND / SmartMedia
209 * -------------------------------------------------------------------- */
210
211#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
212static struct atmel_nand_data nand_data;
213
214#define NAND_BASE AT91_CHIPSELECT_3
215
216static struct resource nand_resources[] = {
217 {
218 .start = NAND_BASE,
219 .end = NAND_BASE + SZ_256M - 1,
220 .flags = IORESOURCE_MEM,
221 }
222};
223
224static struct platform_device atmel_nand_device = {
225 .name = "atmel_nand",
226 .id = -1,
227 .dev = {
228 .platform_data = &nand_data,
229 },
230 .resource = nand_resources,
231 .num_resources = ARRAY_SIZE(nand_resources),
232};
233
234void __init at91_add_device_nand(struct atmel_nand_data *data)
235{
236 unsigned long csa;
237
238 if (!data)
239 return;
240
241 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
242 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
243
244 /* enable pin */
245 if (gpio_is_valid(data->enable_pin))
246 at91_set_gpio_output(data->enable_pin, 1);
247
248 /* ready/busy pin */
249 if (gpio_is_valid(data->rdy_pin))
250 at91_set_gpio_input(data->rdy_pin, 1);
251
252 /* card detect pin */
253 if (gpio_is_valid(data->det_pin))
254 at91_set_gpio_input(data->det_pin, 1);
255
256 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
257 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
258
259 nand_data = *data;
260 platform_device_register(&atmel_nand_device);
261}
262
263#else
264void __init at91_add_device_nand(struct atmel_nand_data *data) {}
265#endif
266
267
268/* --------------------------------------------------------------------
269 * TWI (i2c)
270 * -------------------------------------------------------------------- */
271
272/*
273 * Prefer the GPIO code since the TWI controller isn't robust
274 * (gets overruns and underruns under load) and can only issue
275 * repeated STARTs in one scenario (the driver doesn't yet handle them).
276 */
277#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
278
279static struct i2c_gpio_platform_data pdata = {
280 .sda_pin = AT91_PIN_PA7,
281 .sda_is_open_drain = 1,
282 .scl_pin = AT91_PIN_PA8,
283 .scl_is_open_drain = 1,
284 .udelay = 2, /* ~100 kHz */
285};
286
287static struct platform_device at91sam9261_twi_device = {
288 .name = "i2c-gpio",
289 .id = 0,
290 .dev.platform_data = &pdata,
291};
292
293void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
294{
295 at91_set_GPIO_periph(AT91_PIN_PA7, 1); /* TWD (SDA) */
296 at91_set_multi_drive(AT91_PIN_PA7, 1);
297
298 at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */
299 at91_set_multi_drive(AT91_PIN_PA8, 1);
300
301 i2c_register_board_info(0, devices, nr_devices);
302 platform_device_register(&at91sam9261_twi_device);
303}
304
305#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
306
307static struct resource twi_resources[] = {
308 [0] = {
309 .start = AT91SAM9261_BASE_TWI,
310 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
311 .flags = IORESOURCE_MEM,
312 },
313 [1] = {
314 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
315 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
316 .flags = IORESOURCE_IRQ,
317 },
318};
319
320static struct platform_device at91sam9261_twi_device = {
321 .id = 0,
322 .resource = twi_resources,
323 .num_resources = ARRAY_SIZE(twi_resources),
324};
325
326void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
327{
328 /* IP version is not the same on 9261 and g10 */
329 if (cpu_is_at91sam9g10()) {
330 at91sam9261_twi_device.name = "i2c-at91sam9g10";
331 /* I2C PIO must not be configured as open-drain on this chip */
332 } else {
333 at91sam9261_twi_device.name = "i2c-at91sam9261";
334 at91_set_multi_drive(AT91_PIN_PA7, 1);
335 at91_set_multi_drive(AT91_PIN_PA8, 1);
336 }
337
338 /* pins used for TWI interface */
339 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
340 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
341
342 i2c_register_board_info(0, devices, nr_devices);
343 platform_device_register(&at91sam9261_twi_device);
344}
345#else
346void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
347#endif
348
349
350/* --------------------------------------------------------------------
351 * SPI
352 * -------------------------------------------------------------------- */
353
354#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
355static u64 spi_dmamask = DMA_BIT_MASK(32);
356
357static struct resource spi0_resources[] = {
358 [0] = {
359 .start = AT91SAM9261_BASE_SPI0,
360 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
361 .flags = IORESOURCE_MEM,
362 },
363 [1] = {
364 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
365 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
366 .flags = IORESOURCE_IRQ,
367 },
368};
369
370static struct platform_device at91sam9261_spi0_device = {
371 .name = "atmel_spi",
372 .id = 0,
373 .dev = {
374 .dma_mask = &spi_dmamask,
375 .coherent_dma_mask = DMA_BIT_MASK(32),
376 },
377 .resource = spi0_resources,
378 .num_resources = ARRAY_SIZE(spi0_resources),
379};
380
381static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
382
383static struct resource spi1_resources[] = {
384 [0] = {
385 .start = AT91SAM9261_BASE_SPI1,
386 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
387 .flags = IORESOURCE_MEM,
388 },
389 [1] = {
390 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
391 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
392 .flags = IORESOURCE_IRQ,
393 },
394};
395
396static struct platform_device at91sam9261_spi1_device = {
397 .name = "atmel_spi",
398 .id = 1,
399 .dev = {
400 .dma_mask = &spi_dmamask,
401 .coherent_dma_mask = DMA_BIT_MASK(32),
402 },
403 .resource = spi1_resources,
404 .num_resources = ARRAY_SIZE(spi1_resources),
405};
406
407static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
408
409void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
410{
411 int i;
412 unsigned long cs_pin;
413 short enable_spi0 = 0;
414 short enable_spi1 = 0;
415
416 /* Choose SPI chip-selects */
417 for (i = 0; i < nr_devices; i++) {
418 if (devices[i].controller_data)
419 cs_pin = (unsigned long) devices[i].controller_data;
420 else if (devices[i].bus_num == 0)
421 cs_pin = spi0_standard_cs[devices[i].chip_select];
422 else
423 cs_pin = spi1_standard_cs[devices[i].chip_select];
424
425 if (!gpio_is_valid(cs_pin))
426 continue;
427
428 if (devices[i].bus_num == 0)
429 enable_spi0 = 1;
430 else
431 enable_spi1 = 1;
432
433 /* enable chip-select pin */
434 at91_set_gpio_output(cs_pin, 1);
435
436 /* pass chip-select pin to driver */
437 devices[i].controller_data = (void *) cs_pin;
438 }
439
440 spi_register_board_info(devices, nr_devices);
441
442 /* Configure SPI bus(es) */
443 if (enable_spi0) {
444 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
445 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
446 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
447
448 platform_device_register(&at91sam9261_spi0_device);
449 }
450 if (enable_spi1) {
451 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
452 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
453 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
454
455 platform_device_register(&at91sam9261_spi1_device);
456 }
457}
458#else
459void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
460#endif
461
462
463/* --------------------------------------------------------------------
464 * LCD Controller
465 * -------------------------------------------------------------------- */
466
467#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
468static u64 lcdc_dmamask = DMA_BIT_MASK(32);
469static struct atmel_lcdfb_pdata lcdc_data;
470
471static struct resource lcdc_resources[] = {
472 [0] = {
473 .start = AT91SAM9261_LCDC_BASE,
474 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
479 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
480 .flags = IORESOURCE_IRQ,
481 },
482#if defined(CONFIG_FB_INTSRAM)
483 [2] = {
484 .start = AT91SAM9261_SRAM_BASE,
485 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
486 .flags = IORESOURCE_MEM,
487 },
488#endif
489};
490
491static struct platform_device at91_lcdc_device = {
492 .id = 0,
493 .dev = {
494 .dma_mask = &lcdc_dmamask,
495 .coherent_dma_mask = DMA_BIT_MASK(32),
496 .platform_data = &lcdc_data,
497 },
498 .resource = lcdc_resources,
499 .num_resources = ARRAY_SIZE(lcdc_resources),
500};
501
502void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data)
503{
504 if (!data) {
505 return;
506 }
507
508 if (cpu_is_at91sam9g10())
509 at91_lcdc_device.name = "at91sam9g10-lcdfb";
510 else
511 at91_lcdc_device.name = "at91sam9261-lcdfb";
512
513#if defined(CONFIG_FB_ATMEL_STN)
514 at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */
515 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
516 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
517 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
518 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
519 at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD0 */
520 at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD1 */
521 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
522 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
523#else
524 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
525 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
526 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
527 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
528 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
529 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
530 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
531 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
532 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
533 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
534 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
535 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
536 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
537 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
538 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
539 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
540 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
541 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
542 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
543 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
544 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
545 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
546#endif
547
548 if (ARRAY_SIZE(lcdc_resources) > 2) {
549 void __iomem *fb;
550 struct resource *fb_res = &lcdc_resources[2];
551 size_t fb_len = resource_size(fb_res);
552
553 fb = ioremap(fb_res->start, fb_len);
554 if (fb) {
555 memset(fb, 0, fb_len);
556 iounmap(fb);
557 }
558 }
559 lcdc_data = *data;
560 platform_device_register(&at91_lcdc_device);
561}
562#else
563void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data) {}
564#endif
565
566
567/* --------------------------------------------------------------------
568 * Timer/Counter block
569 * -------------------------------------------------------------------- */
570
571#ifdef CONFIG_ATMEL_TCLIB
572
573static struct resource tcb_resources[] = {
574 [0] = {
575 .start = AT91SAM9261_BASE_TCB0,
576 .end = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
577 .flags = IORESOURCE_MEM,
578 },
579 [1] = {
580 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
581 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
582 .flags = IORESOURCE_IRQ,
583 },
584 [2] = {
585 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
586 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
587 .flags = IORESOURCE_IRQ,
588 },
589 [3] = {
590 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
591 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
592 .flags = IORESOURCE_IRQ,
593 },
594};
595
596static struct platform_device at91sam9261_tcb_device = {
597 .name = "atmel_tcb",
598 .id = 0,
599 .resource = tcb_resources,
600 .num_resources = ARRAY_SIZE(tcb_resources),
601};
602
603static void __init at91_add_device_tc(void)
604{
605 platform_device_register(&at91sam9261_tcb_device);
606}
607#else
608static void __init at91_add_device_tc(void) { }
609#endif
610
611
612/* --------------------------------------------------------------------
613 * RTT
614 * -------------------------------------------------------------------- */
615
616static struct resource rtt_resources[] = {
617 {
618 .start = AT91SAM9261_BASE_RTT,
619 .end = AT91SAM9261_BASE_RTT + SZ_16 - 1,
620 .flags = IORESOURCE_MEM,
621 }, {
622 .flags = IORESOURCE_MEM,
623 }, {
624 .flags = IORESOURCE_IRQ,
625 }
626};
627
628static struct platform_device at91sam9261_rtt_device = {
629 .name = "at91_rtt",
630 .id = 0,
631 .resource = rtt_resources,
632};
633
634#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
635static void __init at91_add_device_rtt_rtc(void)
636{
637 at91sam9261_rtt_device.name = "rtc-at91sam9";
638 /*
639 * The second resource is needed:
640 * GPBR will serve as the storage for RTC time offset
641 */
642 at91sam9261_rtt_device.num_resources = 3;
643 rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
644 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
645 rtt_resources[1].end = rtt_resources[1].start + 3;
646 rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
647 rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
648}
649#else
650static void __init at91_add_device_rtt_rtc(void)
651{
652 /* Only one resource is needed: RTT not used as RTC */
653 at91sam9261_rtt_device.num_resources = 1;
654}
655#endif
656
657static void __init at91_add_device_rtt(void)
658{
659 at91_add_device_rtt_rtc();
660 platform_device_register(&at91sam9261_rtt_device);
661}
662
663
664/* --------------------------------------------------------------------
665 * Watchdog
666 * -------------------------------------------------------------------- */
667
668#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
669static struct resource wdt_resources[] = {
670 {
671 .start = AT91SAM9261_BASE_WDT,
672 .end = AT91SAM9261_BASE_WDT + SZ_16 - 1,
673 .flags = IORESOURCE_MEM,
674 }
675};
676
677static struct platform_device at91sam9261_wdt_device = {
678 .name = "at91_wdt",
679 .id = -1,
680 .resource = wdt_resources,
681 .num_resources = ARRAY_SIZE(wdt_resources),
682};
683
684static void __init at91_add_device_watchdog(void)
685{
686 platform_device_register(&at91sam9261_wdt_device);
687}
688#else
689static void __init at91_add_device_watchdog(void) {}
690#endif
691
692
693/* --------------------------------------------------------------------
694 * SSC -- Synchronous Serial Controller
695 * -------------------------------------------------------------------- */
696
697#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
698static u64 ssc0_dmamask = DMA_BIT_MASK(32);
699
700static struct resource ssc0_resources[] = {
701 [0] = {
702 .start = AT91SAM9261_BASE_SSC0,
703 .end = AT91SAM9261_BASE_SSC0 + SZ_16K - 1,
704 .flags = IORESOURCE_MEM,
705 },
706 [1] = {
707 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
708 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
709 .flags = IORESOURCE_IRQ,
710 },
711};
712
713static struct platform_device at91sam9261_ssc0_device = {
714 .name = "at91rm9200_ssc",
715 .id = 0,
716 .dev = {
717 .dma_mask = &ssc0_dmamask,
718 .coherent_dma_mask = DMA_BIT_MASK(32),
719 },
720 .resource = ssc0_resources,
721 .num_resources = ARRAY_SIZE(ssc0_resources),
722};
723
724static inline void configure_ssc0_pins(unsigned pins)
725{
726 if (pins & ATMEL_SSC_TF)
727 at91_set_A_periph(AT91_PIN_PB21, 1);
728 if (pins & ATMEL_SSC_TK)
729 at91_set_A_periph(AT91_PIN_PB22, 1);
730 if (pins & ATMEL_SSC_TD)
731 at91_set_A_periph(AT91_PIN_PB23, 1);
732 if (pins & ATMEL_SSC_RD)
733 at91_set_A_periph(AT91_PIN_PB24, 1);
734 if (pins & ATMEL_SSC_RK)
735 at91_set_A_periph(AT91_PIN_PB25, 1);
736 if (pins & ATMEL_SSC_RF)
737 at91_set_A_periph(AT91_PIN_PB26, 1);
738}
739
740static u64 ssc1_dmamask = DMA_BIT_MASK(32);
741
742static struct resource ssc1_resources[] = {
743 [0] = {
744 .start = AT91SAM9261_BASE_SSC1,
745 .end = AT91SAM9261_BASE_SSC1 + SZ_16K - 1,
746 .flags = IORESOURCE_MEM,
747 },
748 [1] = {
749 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
750 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
751 .flags = IORESOURCE_IRQ,
752 },
753};
754
755static struct platform_device at91sam9261_ssc1_device = {
756 .name = "at91rm9200_ssc",
757 .id = 1,
758 .dev = {
759 .dma_mask = &ssc1_dmamask,
760 .coherent_dma_mask = DMA_BIT_MASK(32),
761 },
762 .resource = ssc1_resources,
763 .num_resources = ARRAY_SIZE(ssc1_resources),
764};
765
766static inline void configure_ssc1_pins(unsigned pins)
767{
768 if (pins & ATMEL_SSC_TF)
769 at91_set_B_periph(AT91_PIN_PA17, 1);
770 if (pins & ATMEL_SSC_TK)
771 at91_set_B_periph(AT91_PIN_PA18, 1);
772 if (pins & ATMEL_SSC_TD)
773 at91_set_B_periph(AT91_PIN_PA19, 1);
774 if (pins & ATMEL_SSC_RD)
775 at91_set_B_periph(AT91_PIN_PA20, 1);
776 if (pins & ATMEL_SSC_RK)
777 at91_set_B_periph(AT91_PIN_PA21, 1);
778 if (pins & ATMEL_SSC_RF)
779 at91_set_B_periph(AT91_PIN_PA22, 1);
780}
781
782static u64 ssc2_dmamask = DMA_BIT_MASK(32);
783
784static struct resource ssc2_resources[] = {
785 [0] = {
786 .start = AT91SAM9261_BASE_SSC2,
787 .end = AT91SAM9261_BASE_SSC2 + SZ_16K - 1,
788 .flags = IORESOURCE_MEM,
789 },
790 [1] = {
791 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
792 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
793 .flags = IORESOURCE_IRQ,
794 },
795};
796
797static struct platform_device at91sam9261_ssc2_device = {
798 .name = "at91rm9200_ssc",
799 .id = 2,
800 .dev = {
801 .dma_mask = &ssc2_dmamask,
802 .coherent_dma_mask = DMA_BIT_MASK(32),
803 },
804 .resource = ssc2_resources,
805 .num_resources = ARRAY_SIZE(ssc2_resources),
806};
807
808static inline void configure_ssc2_pins(unsigned pins)
809{
810 if (pins & ATMEL_SSC_TF)
811 at91_set_B_periph(AT91_PIN_PC25, 1);
812 if (pins & ATMEL_SSC_TK)
813 at91_set_B_periph(AT91_PIN_PC26, 1);
814 if (pins & ATMEL_SSC_TD)
815 at91_set_B_periph(AT91_PIN_PC27, 1);
816 if (pins & ATMEL_SSC_RD)
817 at91_set_B_periph(AT91_PIN_PC28, 1);
818 if (pins & ATMEL_SSC_RK)
819 at91_set_B_periph(AT91_PIN_PC29, 1);
820 if (pins & ATMEL_SSC_RF)
821 at91_set_B_periph(AT91_PIN_PC30, 1);
822}
823
824/*
825 * SSC controllers are accessed through library code, instead of any
826 * kind of all-singing/all-dancing driver. For example one could be
827 * used by a particular I2S audio codec's driver, while another one
828 * on the same system might be used by a custom data capture driver.
829 */
830void __init at91_add_device_ssc(unsigned id, unsigned pins)
831{
832 struct platform_device *pdev;
833
834 /*
835 * NOTE: caller is responsible for passing information matching
836 * "pins" to whatever will be using each particular controller.
837 */
838 switch (id) {
839 case AT91SAM9261_ID_SSC0:
840 pdev = &at91sam9261_ssc0_device;
841 configure_ssc0_pins(pins);
842 break;
843 case AT91SAM9261_ID_SSC1:
844 pdev = &at91sam9261_ssc1_device;
845 configure_ssc1_pins(pins);
846 break;
847 case AT91SAM9261_ID_SSC2:
848 pdev = &at91sam9261_ssc2_device;
849 configure_ssc2_pins(pins);
850 break;
851 default:
852 return;
853 }
854
855 platform_device_register(pdev);
856}
857
858#else
859void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
860#endif
861
862
863/* --------------------------------------------------------------------
864 * UART
865 * -------------------------------------------------------------------- */
866
867#if defined(CONFIG_SERIAL_ATMEL)
868static struct resource dbgu_resources[] = {
869 [0] = {
870 .start = AT91SAM9261_BASE_DBGU,
871 .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
872 .flags = IORESOURCE_MEM,
873 },
874 [1] = {
875 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
876 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
877 .flags = IORESOURCE_IRQ,
878 },
879};
880
881static struct atmel_uart_data dbgu_data = {
882 .use_dma_tx = 0,
883 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
884};
885
886static u64 dbgu_dmamask = DMA_BIT_MASK(32);
887
888static struct platform_device at91sam9261_dbgu_device = {
889 .name = "atmel_usart",
890 .id = 0,
891 .dev = {
892 .dma_mask = &dbgu_dmamask,
893 .coherent_dma_mask = DMA_BIT_MASK(32),
894 .platform_data = &dbgu_data,
895 },
896 .resource = dbgu_resources,
897 .num_resources = ARRAY_SIZE(dbgu_resources),
898};
899
900static inline void configure_dbgu_pins(void)
901{
902 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
903 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
904}
905
906static struct resource uart0_resources[] = {
907 [0] = {
908 .start = AT91SAM9261_BASE_US0,
909 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
910 .flags = IORESOURCE_MEM,
911 },
912 [1] = {
913 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
914 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
915 .flags = IORESOURCE_IRQ,
916 },
917};
918
919static struct atmel_uart_data uart0_data = {
920 .use_dma_tx = 1,
921 .use_dma_rx = 1,
922};
923
924static u64 uart0_dmamask = DMA_BIT_MASK(32);
925
926static struct platform_device at91sam9261_uart0_device = {
927 .name = "atmel_usart",
928 .id = 1,
929 .dev = {
930 .dma_mask = &uart0_dmamask,
931 .coherent_dma_mask = DMA_BIT_MASK(32),
932 .platform_data = &uart0_data,
933 },
934 .resource = uart0_resources,
935 .num_resources = ARRAY_SIZE(uart0_resources),
936};
937
938static inline void configure_usart0_pins(unsigned pins)
939{
940 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
941 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
942
943 if (pins & ATMEL_UART_RTS)
944 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
945 if (pins & ATMEL_UART_CTS)
946 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
947}
948
949static struct resource uart1_resources[] = {
950 [0] = {
951 .start = AT91SAM9261_BASE_US1,
952 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
953 .flags = IORESOURCE_MEM,
954 },
955 [1] = {
956 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
957 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
958 .flags = IORESOURCE_IRQ,
959 },
960};
961
962static struct atmel_uart_data uart1_data = {
963 .use_dma_tx = 1,
964 .use_dma_rx = 1,
965};
966
967static u64 uart1_dmamask = DMA_BIT_MASK(32);
968
969static struct platform_device at91sam9261_uart1_device = {
970 .name = "atmel_usart",
971 .id = 2,
972 .dev = {
973 .dma_mask = &uart1_dmamask,
974 .coherent_dma_mask = DMA_BIT_MASK(32),
975 .platform_data = &uart1_data,
976 },
977 .resource = uart1_resources,
978 .num_resources = ARRAY_SIZE(uart1_resources),
979};
980
981static inline void configure_usart1_pins(unsigned pins)
982{
983 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
984 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
985
986 if (pins & ATMEL_UART_RTS)
987 at91_set_B_periph(AT91_PIN_PA12, 0); /* RTS1 */
988 if (pins & ATMEL_UART_CTS)
989 at91_set_B_periph(AT91_PIN_PA13, 0); /* CTS1 */
990}
991
992static struct resource uart2_resources[] = {
993 [0] = {
994 .start = AT91SAM9261_BASE_US2,
995 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
996 .flags = IORESOURCE_MEM,
997 },
998 [1] = {
999 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
1000 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
1001 .flags = IORESOURCE_IRQ,
1002 },
1003};
1004
1005static struct atmel_uart_data uart2_data = {
1006 .use_dma_tx = 1,
1007 .use_dma_rx = 1,
1008};
1009
1010static u64 uart2_dmamask = DMA_BIT_MASK(32);
1011
1012static struct platform_device at91sam9261_uart2_device = {
1013 .name = "atmel_usart",
1014 .id = 3,
1015 .dev = {
1016 .dma_mask = &uart2_dmamask,
1017 .coherent_dma_mask = DMA_BIT_MASK(32),
1018 .platform_data = &uart2_data,
1019 },
1020 .resource = uart2_resources,
1021 .num_resources = ARRAY_SIZE(uart2_resources),
1022};
1023
1024static inline void configure_usart2_pins(unsigned pins)
1025{
1026 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
1027 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
1028
1029 if (pins & ATMEL_UART_RTS)
1030 at91_set_B_periph(AT91_PIN_PA15, 0); /* RTS2*/
1031 if (pins & ATMEL_UART_CTS)
1032 at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */
1033}
1034
1035static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1036
1037void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1038{
1039 struct platform_device *pdev;
1040 struct atmel_uart_data *pdata;
1041
1042 switch (id) {
1043 case 0: /* DBGU */
1044 pdev = &at91sam9261_dbgu_device;
1045 configure_dbgu_pins();
1046 break;
1047 case AT91SAM9261_ID_US0:
1048 pdev = &at91sam9261_uart0_device;
1049 configure_usart0_pins(pins);
1050 break;
1051 case AT91SAM9261_ID_US1:
1052 pdev = &at91sam9261_uart1_device;
1053 configure_usart1_pins(pins);
1054 break;
1055 case AT91SAM9261_ID_US2:
1056 pdev = &at91sam9261_uart2_device;
1057 configure_usart2_pins(pins);
1058 break;
1059 default:
1060 return;
1061 }
1062 pdata = pdev->dev.platform_data;
1063 pdata->num = portnr; /* update to mapped ID */
1064
1065 if (portnr < ATMEL_MAX_UART)
1066 at91_uarts[portnr] = pdev;
1067}
1068
1069void __init at91_add_device_serial(void)
1070{
1071 int i;
1072
1073 for (i = 0; i < ATMEL_MAX_UART; i++) {
1074 if (at91_uarts[i])
1075 platform_device_register(at91_uarts[i]);
1076 }
1077}
1078#else
1079void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1080void __init at91_add_device_serial(void) {}
1081#endif
1082
1083
1084/* -------------------------------------------------------------------- */
1085
1086/*
1087 * These devices are always present and don't need any board-specific
1088 * setup.
1089 */
1090static int __init at91_add_standard_devices(void)
1091{
1092 at91_add_device_rtt();
1093 at91_add_device_watchdog();
1094 at91_add_device_tc();
1095 return 0;
1096}
1097
1098arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index fbff228cc63e..e7ad14864083 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -10,304 +10,11 @@
10 * 10 *
11 */ 11 */
12 12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/clk/at91_pmc.h>
16
17#include <asm/proc-fns.h>
18#include <asm/irq.h>
19#include <asm/mach/arch.h>
20#include <asm/mach/map.h>
21#include <asm/system_misc.h> 13#include <asm/system_misc.h>
22#include <mach/at91sam9263.h>
23#include <mach/hardware.h> 14#include <mach/hardware.h>
24 15
25#include "at91_aic.h"
26#include "soc.h" 16#include "soc.h"
27#include "generic.h" 17#include "generic.h"
28#include "sam9_smc.h"
29#include "pm.h"
30
31#if defined(CONFIG_OLD_CLK_AT91)
32#include "clock.h"
33/* --------------------------------------------------------------------
34 * Clocks
35 * -------------------------------------------------------------------- */
36
37/*
38 * The peripheral clocks.
39 */
40static struct clk pioA_clk = {
41 .name = "pioA_clk",
42 .pmc_mask = 1 << AT91SAM9263_ID_PIOA,
43 .type = CLK_TYPE_PERIPHERAL,
44};
45static struct clk pioB_clk = {
46 .name = "pioB_clk",
47 .pmc_mask = 1 << AT91SAM9263_ID_PIOB,
48 .type = CLK_TYPE_PERIPHERAL,
49};
50static struct clk pioCDE_clk = {
51 .name = "pioCDE_clk",
52 .pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
53 .type = CLK_TYPE_PERIPHERAL,
54};
55static struct clk usart0_clk = {
56 .name = "usart0_clk",
57 .pmc_mask = 1 << AT91SAM9263_ID_US0,
58 .type = CLK_TYPE_PERIPHERAL,
59};
60static struct clk usart1_clk = {
61 .name = "usart1_clk",
62 .pmc_mask = 1 << AT91SAM9263_ID_US1,
63 .type = CLK_TYPE_PERIPHERAL,
64};
65static struct clk usart2_clk = {
66 .name = "usart2_clk",
67 .pmc_mask = 1 << AT91SAM9263_ID_US2,
68 .type = CLK_TYPE_PERIPHERAL,
69};
70static struct clk mmc0_clk = {
71 .name = "mci0_clk",
72 .pmc_mask = 1 << AT91SAM9263_ID_MCI0,
73 .type = CLK_TYPE_PERIPHERAL,
74};
75static struct clk mmc1_clk = {
76 .name = "mci1_clk",
77 .pmc_mask = 1 << AT91SAM9263_ID_MCI1,
78 .type = CLK_TYPE_PERIPHERAL,
79};
80static struct clk can_clk = {
81 .name = "can_clk",
82 .pmc_mask = 1 << AT91SAM9263_ID_CAN,
83 .type = CLK_TYPE_PERIPHERAL,
84};
85static struct clk twi_clk = {
86 .name = "twi_clk",
87 .pmc_mask = 1 << AT91SAM9263_ID_TWI,
88 .type = CLK_TYPE_PERIPHERAL,
89};
90static struct clk spi0_clk = {
91 .name = "spi0_clk",
92 .pmc_mask = 1 << AT91SAM9263_ID_SPI0,
93 .type = CLK_TYPE_PERIPHERAL,
94};
95static struct clk spi1_clk = {
96 .name = "spi1_clk",
97 .pmc_mask = 1 << AT91SAM9263_ID_SPI1,
98 .type = CLK_TYPE_PERIPHERAL,
99};
100static struct clk ssc0_clk = {
101 .name = "ssc0_clk",
102 .pmc_mask = 1 << AT91SAM9263_ID_SSC0,
103 .type = CLK_TYPE_PERIPHERAL,
104};
105static struct clk ssc1_clk = {
106 .name = "ssc1_clk",
107 .pmc_mask = 1 << AT91SAM9263_ID_SSC1,
108 .type = CLK_TYPE_PERIPHERAL,
109};
110static struct clk ac97_clk = {
111 .name = "ac97_clk",
112 .pmc_mask = 1 << AT91SAM9263_ID_AC97C,
113 .type = CLK_TYPE_PERIPHERAL,
114};
115static struct clk tcb_clk = {
116 .name = "tcb_clk",
117 .pmc_mask = 1 << AT91SAM9263_ID_TCB,
118 .type = CLK_TYPE_PERIPHERAL,
119};
120static struct clk pwm_clk = {
121 .name = "pwm_clk",
122 .pmc_mask = 1 << AT91SAM9263_ID_PWMC,
123 .type = CLK_TYPE_PERIPHERAL,
124};
125static struct clk macb_clk = {
126 .name = "pclk",
127 .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
128 .type = CLK_TYPE_PERIPHERAL,
129};
130static struct clk dma_clk = {
131 .name = "dma_clk",
132 .pmc_mask = 1 << AT91SAM9263_ID_DMA,
133 .type = CLK_TYPE_PERIPHERAL,
134};
135static struct clk twodge_clk = {
136 .name = "2dge_clk",
137 .pmc_mask = 1 << AT91SAM9263_ID_2DGE,
138 .type = CLK_TYPE_PERIPHERAL,
139};
140static struct clk udc_clk = {
141 .name = "udc_clk",
142 .pmc_mask = 1 << AT91SAM9263_ID_UDP,
143 .type = CLK_TYPE_PERIPHERAL,
144};
145static struct clk isi_clk = {
146 .name = "isi_clk",
147 .pmc_mask = 1 << AT91SAM9263_ID_ISI,
148 .type = CLK_TYPE_PERIPHERAL,
149};
150static struct clk lcdc_clk = {
151 .name = "lcdc_clk",
152 .pmc_mask = 1 << AT91SAM9263_ID_LCDC,
153 .type = CLK_TYPE_PERIPHERAL,
154};
155static struct clk ohci_clk = {
156 .name = "ohci_clk",
157 .pmc_mask = 1 << AT91SAM9263_ID_UHP,
158 .type = CLK_TYPE_PERIPHERAL,
159};
160
161static struct clk *periph_clocks[] __initdata = {
162 &pioA_clk,
163 &pioB_clk,
164 &pioCDE_clk,
165 &usart0_clk,
166 &usart1_clk,
167 &usart2_clk,
168 &mmc0_clk,
169 &mmc1_clk,
170 &can_clk,
171 &twi_clk,
172 &spi0_clk,
173 &spi1_clk,
174 &ssc0_clk,
175 &ssc1_clk,
176 &ac97_clk,
177 &tcb_clk,
178 &pwm_clk,
179 &macb_clk,
180 &twodge_clk,
181 &udc_clk,
182 &isi_clk,
183 &lcdc_clk,
184 &dma_clk,
185 &ohci_clk,
186 // irq0 .. irq1
187};
188
189static struct clk_lookup periph_clocks_lookups[] = {
190 /* One additional fake clock for macb_hclk */
191 CLKDEV_CON_ID("hclk", &macb_clk),
192 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
193 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
194 CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),
195 CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),
196 CLKDEV_CON_DEV_ID("hclk", "at91sam9263-lcdfb.0", &lcdc_clk),
197 CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
198 CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
199 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
200 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
201 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
202 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
203 CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),
204 /* fake hclk clock */
205 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
206 CLKDEV_CON_ID("pioA", &pioA_clk),
207 CLKDEV_CON_ID("pioB", &pioB_clk),
208 CLKDEV_CON_ID("pioC", &pioCDE_clk),
209 CLKDEV_CON_ID("pioD", &pioCDE_clk),
210 CLKDEV_CON_ID("pioE", &pioCDE_clk),
211 /* more usart lookup table for DT entries */
212 CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
213 CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
214 CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
215 CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
216 /* more tc lookup table for DT entries */
217 CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),
218 CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
219 CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
220 CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
221 CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
222 CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
223 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
224 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
225 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
226 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
227 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
228 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
229 CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
230};
231
232static struct clk_lookup usart_clocks_lookups[] = {
233 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
234 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
235 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
236 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
237};
238
239/*
240 * The four programmable clocks.
241 * You must configure pin multiplexing to bring these signals out.
242 */
243static struct clk pck0 = {
244 .name = "pck0",
245 .pmc_mask = AT91_PMC_PCK0,
246 .type = CLK_TYPE_PROGRAMMABLE,
247 .id = 0,
248};
249static struct clk pck1 = {
250 .name = "pck1",
251 .pmc_mask = AT91_PMC_PCK1,
252 .type = CLK_TYPE_PROGRAMMABLE,
253 .id = 1,
254};
255static struct clk pck2 = {
256 .name = "pck2",
257 .pmc_mask = AT91_PMC_PCK2,
258 .type = CLK_TYPE_PROGRAMMABLE,
259 .id = 2,
260};
261static struct clk pck3 = {
262 .name = "pck3",
263 .pmc_mask = AT91_PMC_PCK3,
264 .type = CLK_TYPE_PROGRAMMABLE,
265 .id = 3,
266};
267
268static void __init at91sam9263_register_clocks(void)
269{
270 int i;
271
272 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
273 clk_register(periph_clocks[i]);
274
275 clkdev_add_table(periph_clocks_lookups,
276 ARRAY_SIZE(periph_clocks_lookups));
277 clkdev_add_table(usart_clocks_lookups,
278 ARRAY_SIZE(usart_clocks_lookups));
279
280 clk_register(&pck0);
281 clk_register(&pck1);
282 clk_register(&pck2);
283 clk_register(&pck3);
284}
285#else
286#define at91sam9263_register_clocks NULL
287#endif
288
289/* --------------------------------------------------------------------
290 * GPIO
291 * -------------------------------------------------------------------- */
292
293static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
294 {
295 .id = AT91SAM9263_ID_PIOA,
296 .regbase = AT91SAM9263_BASE_PIOA,
297 }, {
298 .id = AT91SAM9263_ID_PIOB,
299 .regbase = AT91SAM9263_BASE_PIOB,
300 }, {
301 .id = AT91SAM9263_ID_PIOCDE,
302 .regbase = AT91SAM9263_BASE_PIOC,
303 }, {
304 .id = AT91SAM9263_ID_PIOCDE,
305 .regbase = AT91SAM9263_BASE_PIOD,
306 }, {
307 .id = AT91SAM9263_ID_PIOCDE,
308 .regbase = AT91SAM9263_BASE_PIOE,
309 }
310};
311 18
312/* -------------------------------------------------------------------- 19/* --------------------------------------------------------------------
313 * AT91SAM9263 processor initialization 20 * AT91SAM9263 processor initialization
@@ -319,121 +26,15 @@ static void __init at91sam9263_map_io(void)
319 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); 26 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
320} 27}
321 28
322static void __init at91sam9263_ioremap_registers(void)
323{
324 at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
325 at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
326 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
327 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
328 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
329 at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
330 at91_pm_set_standby(at91sam9_sdram_standby);
331}
332
333static void __init at91sam9263_initialize(void) 29static void __init at91sam9263_initialize(void)
334{ 30{
335 arm_pm_idle = at91sam9_idle; 31 arm_pm_idle = at91sam9_idle;
336 32
337 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); 33 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0);
338 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); 34 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1);
339
340 /* Register GPIO subsystem */
341 at91_gpio_init(at91sam9263_gpio, 5);
342}
343
344static struct resource rstc_resources[] = {
345 [0] = {
346 .start = AT91SAM9263_BASE_RSTC,
347 .end = AT91SAM9263_BASE_RSTC + SZ_16 - 1,
348 .flags = IORESOURCE_MEM,
349 },
350 [1] = {
351 .start = AT91SAM9263_BASE_SDRAMC0,
352 .end = AT91SAM9263_BASE_SDRAMC0 + SZ_512 - 1,
353 .flags = IORESOURCE_MEM,
354 },
355};
356
357static struct platform_device rstc_device = {
358 .name = "at91-sam9260-reset",
359 .resource = rstc_resources,
360 .num_resources = ARRAY_SIZE(rstc_resources),
361};
362
363static struct resource shdwc_resources[] = {
364 [0] = {
365 .start = AT91SAM9263_BASE_SHDWC,
366 .end = AT91SAM9263_BASE_SHDWC + SZ_16 - 1,
367 .flags = IORESOURCE_MEM,
368 },
369};
370
371static struct platform_device shdwc_device = {
372 .name = "at91-poweroff",
373 .resource = shdwc_resources,
374 .num_resources = ARRAY_SIZE(shdwc_resources),
375};
376
377static void __init at91sam9263_register_devices(void)
378{
379 platform_device_register(&rstc_device);
380 platform_device_register(&shdwc_device);
381}
382
383/* --------------------------------------------------------------------
384 * Interrupt initialization
385 * -------------------------------------------------------------------- */
386
387/*
388 * The default interrupt priority levels (0 = lowest, 7 = highest).
389 */
390static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
391 7, /* Advanced Interrupt Controller (FIQ) */
392 7, /* System Peripherals */
393 1, /* Parallel IO Controller A */
394 1, /* Parallel IO Controller B */
395 1, /* Parallel IO Controller C, D and E */
396 0,
397 0,
398 5, /* USART 0 */
399 5, /* USART 1 */
400 5, /* USART 2 */
401 0, /* Multimedia Card Interface 0 */
402 0, /* Multimedia Card Interface 1 */
403 3, /* CAN */
404 6, /* Two-Wire Interface */
405 5, /* Serial Peripheral Interface 0 */
406 5, /* Serial Peripheral Interface 1 */
407 4, /* Serial Synchronous Controller 0 */
408 4, /* Serial Synchronous Controller 1 */
409 5, /* AC97 Controller */
410 0, /* Timer Counter 0, 1 and 2 */
411 0, /* Pulse Width Modulation Controller */
412 3, /* Ethernet */
413 0,
414 0, /* 2D Graphic Engine */
415 2, /* USB Device Port */
416 0, /* Image Sensor Interface */
417 3, /* LDC Controller */
418 0, /* DMA Controller */
419 0,
420 2, /* USB Host port */
421 0, /* Advanced Interrupt Controller (IRQ0) */
422 0, /* Advanced Interrupt Controller (IRQ1) */
423};
424
425static void __init at91sam9263_init_time(void)
426{
427 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
428} 35}
429 36
430AT91_SOC_START(at91sam9263) 37AT91_SOC_START(at91sam9263)
431 .map_io = at91sam9263_map_io, 38 .map_io = at91sam9263_map_io,
432 .default_irq_priority = at91sam9263_default_irq_priority,
433 .extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
434 .ioremap_registers = at91sam9263_ioremap_registers,
435 .register_clocks = at91sam9263_register_clocks,
436 .register_devices = at91sam9263_register_devices,
437 .init = at91sam9263_initialize, 39 .init = at91sam9263_initialize,
438 .init_time = at91sam9263_init_time,
439AT91_SOC_END 40AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
deleted file mode 100644
index cef0e2f57068..000000000000
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ /dev/null
@@ -1,1538 +0,0 @@
1/*
2 * arch/arm/mach-at91/at91sam9263_devices.c
3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17#include <linux/platform_device.h>
18#include <linux/i2c-gpio.h>
19
20#include <linux/fb.h>
21#include <video/atmel_lcdc.h>
22
23#include <mach/at91sam9263.h>
24#include <mach/at91sam9263_matrix.h>
25#include <mach/at91_matrix.h>
26#include <mach/at91sam9_smc.h>
27#include <mach/hardware.h>
28
29#include "board.h"
30#include "generic.h"
31#include "gpio.h"
32
33
34/* --------------------------------------------------------------------
35 * USB Host
36 * -------------------------------------------------------------------- */
37
38#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
39static u64 ohci_dmamask = DMA_BIT_MASK(32);
40static struct at91_usbh_data usbh_data;
41
42static struct resource usbh_resources[] = {
43 [0] = {
44 .start = AT91SAM9263_UHP_BASE,
45 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
50 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
55static struct platform_device at91_usbh_device = {
56 .name = "at91_ohci",
57 .id = -1,
58 .dev = {
59 .dma_mask = &ohci_dmamask,
60 .coherent_dma_mask = DMA_BIT_MASK(32),
61 .platform_data = &usbh_data,
62 },
63 .resource = usbh_resources,
64 .num_resources = ARRAY_SIZE(usbh_resources),
65};
66
67void __init at91_add_device_usbh(struct at91_usbh_data *data)
68{
69 int i;
70
71 if (!data)
72 return;
73
74 /* Enable VBus control for UHP ports */
75 for (i = 0; i < data->ports; i++) {
76 if (gpio_is_valid(data->vbus_pin[i]))
77 at91_set_gpio_output(data->vbus_pin[i],
78 data->vbus_pin_active_low[i]);
79 }
80
81 /* Enable overcurrent notification */
82 for (i = 0; i < data->ports; i++) {
83 if (gpio_is_valid(data->overcurrent_pin[i]))
84 at91_set_gpio_input(data->overcurrent_pin[i], 1);
85 }
86
87 usbh_data = *data;
88 platform_device_register(&at91_usbh_device);
89}
90#else
91void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
92#endif
93
94
95/* --------------------------------------------------------------------
96 * USB Device (Gadget)
97 * -------------------------------------------------------------------- */
98
99#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
100static struct at91_udc_data udc_data;
101
102static struct resource udc_resources[] = {
103 [0] = {
104 .start = AT91SAM9263_BASE_UDP,
105 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
106 .flags = IORESOURCE_MEM,
107 },
108 [1] = {
109 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
110 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
111 .flags = IORESOURCE_IRQ,
112 },
113};
114
115static struct platform_device at91_udc_device = {
116 .name = "at91_udc",
117 .id = -1,
118 .dev = {
119 .platform_data = &udc_data,
120 },
121 .resource = udc_resources,
122 .num_resources = ARRAY_SIZE(udc_resources),
123};
124
125void __init at91_add_device_udc(struct at91_udc_data *data)
126{
127 if (!data)
128 return;
129
130 if (gpio_is_valid(data->vbus_pin)) {
131 at91_set_gpio_input(data->vbus_pin, 0);
132 at91_set_deglitch(data->vbus_pin, 1);
133 }
134
135 /* Pullup pin is handled internally by USB device peripheral */
136
137 udc_data = *data;
138 platform_device_register(&at91_udc_device);
139}
140#else
141void __init at91_add_device_udc(struct at91_udc_data *data) {}
142#endif
143
144
145/* --------------------------------------------------------------------
146 * Ethernet
147 * -------------------------------------------------------------------- */
148
149#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
150static u64 eth_dmamask = DMA_BIT_MASK(32);
151static struct macb_platform_data eth_data;
152
153static struct resource eth_resources[] = {
154 [0] = {
155 .start = AT91SAM9263_BASE_EMAC,
156 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
157 .flags = IORESOURCE_MEM,
158 },
159 [1] = {
160 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
161 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
162 .flags = IORESOURCE_IRQ,
163 },
164};
165
166static struct platform_device at91sam9263_eth_device = {
167 .name = "macb",
168 .id = -1,
169 .dev = {
170 .dma_mask = &eth_dmamask,
171 .coherent_dma_mask = DMA_BIT_MASK(32),
172 .platform_data = &eth_data,
173 },
174 .resource = eth_resources,
175 .num_resources = ARRAY_SIZE(eth_resources),
176};
177
178void __init at91_add_device_eth(struct macb_platform_data *data)
179{
180 if (!data)
181 return;
182
183 if (gpio_is_valid(data->phy_irq_pin)) {
184 at91_set_gpio_input(data->phy_irq_pin, 0);
185 at91_set_deglitch(data->phy_irq_pin, 1);
186 }
187
188 /* Pins used for MII and RMII */
189 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
190 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
191 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
192 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
193 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
194 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
195 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
196 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
197 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
198 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
199
200 if (!data->is_rmii) {
201 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
202 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
203 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
204 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
205 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
206 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
207 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
208 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
209 }
210
211 eth_data = *data;
212 platform_device_register(&at91sam9263_eth_device);
213}
214#else
215void __init at91_add_device_eth(struct macb_platform_data *data) {}
216#endif
217
218
219/* --------------------------------------------------------------------
220 * MMC / SD
221 * -------------------------------------------------------------------- */
222
223#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
224static u64 mmc_dmamask = DMA_BIT_MASK(32);
225static struct mci_platform_data mmc0_data, mmc1_data;
226
227static struct resource mmc0_resources[] = {
228 [0] = {
229 .start = AT91SAM9263_BASE_MCI0,
230 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
235 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
236 .flags = IORESOURCE_IRQ,
237 },
238};
239
240static struct platform_device at91sam9263_mmc0_device = {
241 .name = "atmel_mci",
242 .id = 0,
243 .dev = {
244 .dma_mask = &mmc_dmamask,
245 .coherent_dma_mask = DMA_BIT_MASK(32),
246 .platform_data = &mmc0_data,
247 },
248 .resource = mmc0_resources,
249 .num_resources = ARRAY_SIZE(mmc0_resources),
250};
251
252static struct resource mmc1_resources[] = {
253 [0] = {
254 .start = AT91SAM9263_BASE_MCI1,
255 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
256 .flags = IORESOURCE_MEM,
257 },
258 [1] = {
259 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
260 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
261 .flags = IORESOURCE_IRQ,
262 },
263};
264
265static struct platform_device at91sam9263_mmc1_device = {
266 .name = "atmel_mci",
267 .id = 1,
268 .dev = {
269 .dma_mask = &mmc_dmamask,
270 .coherent_dma_mask = DMA_BIT_MASK(32),
271 .platform_data = &mmc1_data,
272 },
273 .resource = mmc1_resources,
274 .num_resources = ARRAY_SIZE(mmc1_resources),
275};
276
277void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
278{
279 unsigned int i;
280 unsigned int slot_count = 0;
281
282 if (!data)
283 return;
284
285 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
286
287 if (!data->slot[i].bus_width)
288 continue;
289
290 /* input/irq */
291 if (gpio_is_valid(data->slot[i].detect_pin)) {
292 at91_set_gpio_input(data->slot[i].detect_pin,
293 1);
294 at91_set_deglitch(data->slot[i].detect_pin,
295 1);
296 }
297 if (gpio_is_valid(data->slot[i].wp_pin))
298 at91_set_gpio_input(data->slot[i].wp_pin, 1);
299
300 if (mmc_id == 0) { /* MCI0 */
301 switch (i) {
302 case 0: /* slot A */
303 /* CMD */
304 at91_set_A_periph(AT91_PIN_PA1, 1);
305 /* DAT0, maybe DAT1..DAT3 */
306 at91_set_A_periph(AT91_PIN_PA0, 1);
307 if (data->slot[i].bus_width == 4) {
308 at91_set_A_periph(AT91_PIN_PA3, 1);
309 at91_set_A_periph(AT91_PIN_PA4, 1);
310 at91_set_A_periph(AT91_PIN_PA5, 1);
311 }
312 slot_count++;
313 break;
314 case 1: /* slot B */
315 /* CMD */
316 at91_set_A_periph(AT91_PIN_PA16, 1);
317 /* DAT0, maybe DAT1..DAT3 */
318 at91_set_A_periph(AT91_PIN_PA17, 1);
319 if (data->slot[i].bus_width == 4) {
320 at91_set_A_periph(AT91_PIN_PA18, 1);
321 at91_set_A_periph(AT91_PIN_PA19, 1);
322 at91_set_A_periph(AT91_PIN_PA20, 1);
323 }
324 slot_count++;
325 break;
326 default:
327 printk(KERN_ERR
328 "AT91: SD/MMC slot %d not available\n", i);
329 break;
330 }
331 if (slot_count) {
332 /* CLK */
333 at91_set_A_periph(AT91_PIN_PA12, 0);
334
335 mmc0_data = *data;
336 platform_device_register(&at91sam9263_mmc0_device);
337 }
338 } else if (mmc_id == 1) { /* MCI1 */
339 switch (i) {
340 case 0: /* slot A */
341 /* CMD */
342 at91_set_A_periph(AT91_PIN_PA7, 1);
343 /* DAT0, maybe DAT1..DAT3 */
344 at91_set_A_periph(AT91_PIN_PA8, 1);
345 if (data->slot[i].bus_width == 4) {
346 at91_set_A_periph(AT91_PIN_PA9, 1);
347 at91_set_A_periph(AT91_PIN_PA10, 1);
348 at91_set_A_periph(AT91_PIN_PA11, 1);
349 }
350 slot_count++;
351 break;
352 case 1: /* slot B */
353 /* CMD */
354 at91_set_A_periph(AT91_PIN_PA21, 1);
355 /* DAT0, maybe DAT1..DAT3 */
356 at91_set_A_periph(AT91_PIN_PA22, 1);
357 if (data->slot[i].bus_width == 4) {
358 at91_set_A_periph(AT91_PIN_PA23, 1);
359 at91_set_A_periph(AT91_PIN_PA24, 1);
360 at91_set_A_periph(AT91_PIN_PA25, 1);
361 }
362 slot_count++;
363 break;
364 default:
365 printk(KERN_ERR
366 "AT91: SD/MMC slot %d not available\n", i);
367 break;
368 }
369 if (slot_count) {
370 /* CLK */
371 at91_set_A_periph(AT91_PIN_PA6, 0);
372
373 mmc1_data = *data;
374 platform_device_register(&at91sam9263_mmc1_device);
375 }
376 }
377 }
378}
379#else
380void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
381#endif
382
383/* --------------------------------------------------------------------
384 * Compact Flash (PCMCIA or IDE)
385 * -------------------------------------------------------------------- */
386
387#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
388 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
389
390static struct at91_cf_data cf0_data;
391
392static struct resource cf0_resources[] = {
393 [0] = {
394 .start = AT91_CHIPSELECT_4,
395 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
396 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
397 }
398};
399
400static struct platform_device cf0_device = {
401 .id = 0,
402 .dev = {
403 .platform_data = &cf0_data,
404 },
405 .resource = cf0_resources,
406 .num_resources = ARRAY_SIZE(cf0_resources),
407};
408
409static struct at91_cf_data cf1_data;
410
411static struct resource cf1_resources[] = {
412 [0] = {
413 .start = AT91_CHIPSELECT_5,
414 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
415 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
416 }
417};
418
419static struct platform_device cf1_device = {
420 .id = 1,
421 .dev = {
422 .platform_data = &cf1_data,
423 },
424 .resource = cf1_resources,
425 .num_resources = ARRAY_SIZE(cf1_resources),
426};
427
428void __init at91_add_device_cf(struct at91_cf_data *data)
429{
430 unsigned long ebi0_csa;
431 struct platform_device *pdev;
432
433 if (!data)
434 return;
435
436 /*
437 * assign CS4 or CS5 to SMC with Compact Flash logic support,
438 * we assume SMC timings are configured by board code,
439 * except True IDE where timings are controlled by driver
440 */
441 ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
442 switch (data->chipselect) {
443 case 4:
444 at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
445 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
446 cf0_data = *data;
447 pdev = &cf0_device;
448 break;
449 case 5:
450 at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
451 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
452 cf1_data = *data;
453 pdev = &cf1_device;
454 break;
455 default:
456 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
457 data->chipselect);
458 return;
459 }
460 at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
461
462 if (gpio_is_valid(data->det_pin)) {
463 at91_set_gpio_input(data->det_pin, 1);
464 at91_set_deglitch(data->det_pin, 1);
465 }
466
467 if (gpio_is_valid(data->irq_pin)) {
468 at91_set_gpio_input(data->irq_pin, 1);
469 at91_set_deglitch(data->irq_pin, 1);
470 }
471
472 if (gpio_is_valid(data->vcc_pin))
473 /* initially off */
474 at91_set_gpio_output(data->vcc_pin, 0);
475
476 /* enable EBI controlled pins */
477 at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
478 at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
479 at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
480 at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
481
482 pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
483 platform_device_register(pdev);
484}
485#else
486void __init at91_add_device_cf(struct at91_cf_data *data) {}
487#endif
488
489/* --------------------------------------------------------------------
490 * NAND / SmartMedia
491 * -------------------------------------------------------------------- */
492
493#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
494static struct atmel_nand_data nand_data;
495
496#define NAND_BASE AT91_CHIPSELECT_3
497
498static struct resource nand_resources[] = {
499 [0] = {
500 .start = NAND_BASE,
501 .end = NAND_BASE + SZ_256M - 1,
502 .flags = IORESOURCE_MEM,
503 },
504 [1] = {
505 .start = AT91SAM9263_BASE_ECC0,
506 .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
507 .flags = IORESOURCE_MEM,
508 }
509};
510
511static struct platform_device at91sam9263_nand_device = {
512 .name = "atmel_nand",
513 .id = -1,
514 .dev = {
515 .platform_data = &nand_data,
516 },
517 .resource = nand_resources,
518 .num_resources = ARRAY_SIZE(nand_resources),
519};
520
521void __init at91_add_device_nand(struct atmel_nand_data *data)
522{
523 unsigned long csa;
524
525 if (!data)
526 return;
527
528 csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
529 at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
530
531 /* enable pin */
532 if (gpio_is_valid(data->enable_pin))
533 at91_set_gpio_output(data->enable_pin, 1);
534
535 /* ready/busy pin */
536 if (gpio_is_valid(data->rdy_pin))
537 at91_set_gpio_input(data->rdy_pin, 1);
538
539 /* card detect pin */
540 if (gpio_is_valid(data->det_pin))
541 at91_set_gpio_input(data->det_pin, 1);
542
543 nand_data = *data;
544 platform_device_register(&at91sam9263_nand_device);
545}
546#else
547void __init at91_add_device_nand(struct atmel_nand_data *data) {}
548#endif
549
550
551/* --------------------------------------------------------------------
552 * TWI (i2c)
553 * -------------------------------------------------------------------- */
554
555/*
556 * Prefer the GPIO code since the TWI controller isn't robust
557 * (gets overruns and underruns under load) and can only issue
558 * repeated STARTs in one scenario (the driver doesn't yet handle them).
559 */
560#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
561
562static struct i2c_gpio_platform_data pdata = {
563 .sda_pin = AT91_PIN_PB4,
564 .sda_is_open_drain = 1,
565 .scl_pin = AT91_PIN_PB5,
566 .scl_is_open_drain = 1,
567 .udelay = 2, /* ~100 kHz */
568};
569
570static struct platform_device at91sam9263_twi_device = {
571 .name = "i2c-gpio",
572 .id = 0,
573 .dev.platform_data = &pdata,
574};
575
576void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
577{
578 at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */
579 at91_set_multi_drive(AT91_PIN_PB4, 1);
580
581 at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */
582 at91_set_multi_drive(AT91_PIN_PB5, 1);
583
584 i2c_register_board_info(0, devices, nr_devices);
585 platform_device_register(&at91sam9263_twi_device);
586}
587
588#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
589
590static struct resource twi_resources[] = {
591 [0] = {
592 .start = AT91SAM9263_BASE_TWI,
593 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
594 .flags = IORESOURCE_MEM,
595 },
596 [1] = {
597 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
598 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
599 .flags = IORESOURCE_IRQ,
600 },
601};
602
603static struct platform_device at91sam9263_twi_device = {
604 .name = "i2c-at91sam9260",
605 .id = 0,
606 .resource = twi_resources,
607 .num_resources = ARRAY_SIZE(twi_resources),
608};
609
610void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
611{
612 /* pins used for TWI interface */
613 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
614 at91_set_multi_drive(AT91_PIN_PB4, 1);
615
616 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
617 at91_set_multi_drive(AT91_PIN_PB5, 1);
618
619 i2c_register_board_info(0, devices, nr_devices);
620 platform_device_register(&at91sam9263_twi_device);
621}
622#else
623void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
624#endif
625
626
627/* --------------------------------------------------------------------
628 * SPI
629 * -------------------------------------------------------------------- */
630
631#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
632static u64 spi_dmamask = DMA_BIT_MASK(32);
633
634static struct resource spi0_resources[] = {
635 [0] = {
636 .start = AT91SAM9263_BASE_SPI0,
637 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
638 .flags = IORESOURCE_MEM,
639 },
640 [1] = {
641 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
642 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
643 .flags = IORESOURCE_IRQ,
644 },
645};
646
647static struct platform_device at91sam9263_spi0_device = {
648 .name = "atmel_spi",
649 .id = 0,
650 .dev = {
651 .dma_mask = &spi_dmamask,
652 .coherent_dma_mask = DMA_BIT_MASK(32),
653 },
654 .resource = spi0_resources,
655 .num_resources = ARRAY_SIZE(spi0_resources),
656};
657
658static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
659
660static struct resource spi1_resources[] = {
661 [0] = {
662 .start = AT91SAM9263_BASE_SPI1,
663 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
664 .flags = IORESOURCE_MEM,
665 },
666 [1] = {
667 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
668 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
669 .flags = IORESOURCE_IRQ,
670 },
671};
672
673static struct platform_device at91sam9263_spi1_device = {
674 .name = "atmel_spi",
675 .id = 1,
676 .dev = {
677 .dma_mask = &spi_dmamask,
678 .coherent_dma_mask = DMA_BIT_MASK(32),
679 },
680 .resource = spi1_resources,
681 .num_resources = ARRAY_SIZE(spi1_resources),
682};
683
684static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
685
686void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
687{
688 int i;
689 unsigned long cs_pin;
690 short enable_spi0 = 0;
691 short enable_spi1 = 0;
692
693 /* Choose SPI chip-selects */
694 for (i = 0; i < nr_devices; i++) {
695 if (devices[i].controller_data)
696 cs_pin = (unsigned long) devices[i].controller_data;
697 else if (devices[i].bus_num == 0)
698 cs_pin = spi0_standard_cs[devices[i].chip_select];
699 else
700 cs_pin = spi1_standard_cs[devices[i].chip_select];
701
702 if (!gpio_is_valid(cs_pin))
703 continue;
704
705 if (devices[i].bus_num == 0)
706 enable_spi0 = 1;
707 else
708 enable_spi1 = 1;
709
710 /* enable chip-select pin */
711 at91_set_gpio_output(cs_pin, 1);
712
713 /* pass chip-select pin to driver */
714 devices[i].controller_data = (void *) cs_pin;
715 }
716
717 spi_register_board_info(devices, nr_devices);
718
719 /* Configure SPI bus(es) */
720 if (enable_spi0) {
721 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
722 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
723 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
724
725 platform_device_register(&at91sam9263_spi0_device);
726 }
727 if (enable_spi1) {
728 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
729 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
730 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
731
732 platform_device_register(&at91sam9263_spi1_device);
733 }
734}
735#else
736void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
737#endif
738
739
740/* --------------------------------------------------------------------
741 * AC97
742 * -------------------------------------------------------------------- */
743
744#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
745static u64 ac97_dmamask = DMA_BIT_MASK(32);
746static struct ac97c_platform_data ac97_data;
747
748static struct resource ac97_resources[] = {
749 [0] = {
750 .start = AT91SAM9263_BASE_AC97C,
751 .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
752 .flags = IORESOURCE_MEM,
753 },
754 [1] = {
755 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
756 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
757 .flags = IORESOURCE_IRQ,
758 },
759};
760
761static struct platform_device at91sam9263_ac97_device = {
762 .name = "atmel_ac97c",
763 .id = 0,
764 .dev = {
765 .dma_mask = &ac97_dmamask,
766 .coherent_dma_mask = DMA_BIT_MASK(32),
767 .platform_data = &ac97_data,
768 },
769 .resource = ac97_resources,
770 .num_resources = ARRAY_SIZE(ac97_resources),
771};
772
773void __init at91_add_device_ac97(struct ac97c_platform_data *data)
774{
775 if (!data)
776 return;
777
778 at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
779 at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
780 at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
781 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
782
783 /* reset */
784 if (gpio_is_valid(data->reset_pin))
785 at91_set_gpio_output(data->reset_pin, 0);
786
787 ac97_data = *data;
788 platform_device_register(&at91sam9263_ac97_device);
789}
790#else
791void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
792#endif
793
794/* --------------------------------------------------------------------
795 * CAN Controller
796 * -------------------------------------------------------------------- */
797
798#if defined(CONFIG_CAN_AT91) || defined(CONFIG_CAN_AT91_MODULE)
799static struct resource can_resources[] = {
800 [0] = {
801 .start = AT91SAM9263_BASE_CAN,
802 .end = AT91SAM9263_BASE_CAN + SZ_16K - 1,
803 .flags = IORESOURCE_MEM,
804 },
805 [1] = {
806 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
807 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
808 .flags = IORESOURCE_IRQ,
809 },
810};
811
812static struct platform_device at91sam9263_can_device = {
813 .name = "at91_can",
814 .id = -1,
815 .resource = can_resources,
816 .num_resources = ARRAY_SIZE(can_resources),
817};
818
819void __init at91_add_device_can(struct at91_can_data *data)
820{
821 at91_set_A_periph(AT91_PIN_PA13, 0); /* CANTX */
822 at91_set_A_periph(AT91_PIN_PA14, 0); /* CANRX */
823 at91sam9263_can_device.dev.platform_data = data;
824
825 platform_device_register(&at91sam9263_can_device);
826}
827#else
828void __init at91_add_device_can(struct at91_can_data *data) {}
829#endif
830
831/* --------------------------------------------------------------------
832 * LCD Controller
833 * -------------------------------------------------------------------- */
834
835#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
836static u64 lcdc_dmamask = DMA_BIT_MASK(32);
837static struct atmel_lcdfb_pdata lcdc_data;
838
839static struct resource lcdc_resources[] = {
840 [0] = {
841 .start = AT91SAM9263_LCDC_BASE,
842 .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
843 .flags = IORESOURCE_MEM,
844 },
845 [1] = {
846 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
847 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
848 .flags = IORESOURCE_IRQ,
849 },
850};
851
852static struct platform_device at91_lcdc_device = {
853 .name = "at91sam9263-lcdfb",
854 .id = 0,
855 .dev = {
856 .dma_mask = &lcdc_dmamask,
857 .coherent_dma_mask = DMA_BIT_MASK(32),
858 .platform_data = &lcdc_data,
859 },
860 .resource = lcdc_resources,
861 .num_resources = ARRAY_SIZE(lcdc_resources),
862};
863
864void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data)
865{
866 if (!data)
867 return;
868
869 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
870 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
871 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
872 at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
873 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
874 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
875 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
876 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
877 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
878 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
879 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
880 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
881 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
882 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
883 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
884 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
885 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
886 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
887 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
888 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
889 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
890 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
891
892 lcdc_data = *data;
893 platform_device_register(&at91_lcdc_device);
894}
895#else
896void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data) {}
897#endif
898
899
900/* --------------------------------------------------------------------
901 * Image Sensor Interface
902 * -------------------------------------------------------------------- */
903
904#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
905
906struct resource isi_resources[] = {
907 [0] = {
908 .start = AT91SAM9263_BASE_ISI,
909 .end = AT91SAM9263_BASE_ISI + SZ_16K - 1,
910 .flags = IORESOURCE_MEM,
911 },
912 [1] = {
913 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
914 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
915 .flags = IORESOURCE_IRQ,
916 },
917};
918
919static struct platform_device at91sam9263_isi_device = {
920 .name = "at91_isi",
921 .id = -1,
922 .resource = isi_resources,
923 .num_resources = ARRAY_SIZE(isi_resources),
924};
925
926void __init at91_add_device_isi(struct isi_platform_data *data,
927 bool use_pck_as_mck)
928{
929 at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */
930 at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */
931 at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */
932 at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */
933 at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */
934 at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */
935 at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */
936 at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */
937 at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */
938 at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */
939 at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */
940 at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */
941 at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */
942 at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */
943 at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */
944
945 if (use_pck_as_mck) {
946 at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */
947
948 /* TODO: register the PCK for ISI_MCK and set its parent */
949 }
950}
951#else
952void __init at91_add_device_isi(struct isi_platform_data *data,
953 bool use_pck_as_mck) {}
954#endif
955
956
957/* --------------------------------------------------------------------
958 * Timer/Counter block
959 * -------------------------------------------------------------------- */
960
961#ifdef CONFIG_ATMEL_TCLIB
962
963static struct resource tcb_resources[] = {
964 [0] = {
965 .start = AT91SAM9263_BASE_TCB0,
966 .end = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
967 .flags = IORESOURCE_MEM,
968 },
969 [1] = {
970 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
971 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
972 .flags = IORESOURCE_IRQ,
973 },
974};
975
976static struct platform_device at91sam9263_tcb_device = {
977 .name = "atmel_tcb",
978 .id = 0,
979 .resource = tcb_resources,
980 .num_resources = ARRAY_SIZE(tcb_resources),
981};
982
983#if defined(CONFIG_OF)
984static struct of_device_id tcb_ids[] = {
985 { .compatible = "atmel,at91rm9200-tcb" },
986 { /*sentinel*/ }
987};
988#endif
989
990static void __init at91_add_device_tc(void)
991{
992#if defined(CONFIG_OF)
993 struct device_node *np;
994
995 np = of_find_matching_node(NULL, tcb_ids);
996 if (np) {
997 of_node_put(np);
998 return;
999 }
1000#endif
1001
1002 platform_device_register(&at91sam9263_tcb_device);
1003}
1004#else
1005static void __init at91_add_device_tc(void) { }
1006#endif
1007
1008
1009/* --------------------------------------------------------------------
1010 * RTT
1011 * -------------------------------------------------------------------- */
1012
1013static struct resource rtt0_resources[] = {
1014 {
1015 .start = AT91SAM9263_BASE_RTT0,
1016 .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
1017 .flags = IORESOURCE_MEM,
1018 }, {
1019 .flags = IORESOURCE_MEM,
1020 }, {
1021 .flags = IORESOURCE_IRQ,
1022 }
1023};
1024
1025static struct platform_device at91sam9263_rtt0_device = {
1026 .name = "at91_rtt",
1027 .id = 0,
1028 .resource = rtt0_resources,
1029};
1030
1031static struct resource rtt1_resources[] = {
1032 {
1033 .start = AT91SAM9263_BASE_RTT1,
1034 .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
1035 .flags = IORESOURCE_MEM,
1036 }, {
1037 .flags = IORESOURCE_MEM,
1038 }, {
1039 .flags = IORESOURCE_IRQ,
1040 }
1041};
1042
1043static struct platform_device at91sam9263_rtt1_device = {
1044 .name = "at91_rtt",
1045 .id = 1,
1046 .resource = rtt1_resources,
1047};
1048
1049#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
1050static void __init at91_add_device_rtt_rtc(void)
1051{
1052 struct platform_device *pdev;
1053 struct resource *r;
1054
1055 switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
1056 case 0:
1057 /*
1058 * The second resource is needed only for the chosen RTT:
1059 * GPBR will serve as the storage for RTC time offset
1060 */
1061 at91sam9263_rtt0_device.num_resources = 3;
1062 at91sam9263_rtt1_device.num_resources = 1;
1063 pdev = &at91sam9263_rtt0_device;
1064 r = rtt0_resources;
1065 break;
1066 case 1:
1067 at91sam9263_rtt0_device.num_resources = 1;
1068 at91sam9263_rtt1_device.num_resources = 3;
1069 pdev = &at91sam9263_rtt1_device;
1070 r = rtt1_resources;
1071 break;
1072 default:
1073 pr_err("at91sam9263: only supports 2 RTT (%d)\n",
1074 CONFIG_RTC_DRV_AT91SAM9_RTT);
1075 return;
1076 }
1077
1078 pdev->name = "rtc-at91sam9";
1079 r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
1080 r[1].end = r[1].start + 3;
1081 r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
1082 r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
1083}
1084#else
1085static void __init at91_add_device_rtt_rtc(void)
1086{
1087 /* Only one resource is needed: RTT not used as RTC */
1088 at91sam9263_rtt0_device.num_resources = 1;
1089 at91sam9263_rtt1_device.num_resources = 1;
1090}
1091#endif
1092
1093static void __init at91_add_device_rtt(void)
1094{
1095 at91_add_device_rtt_rtc();
1096 platform_device_register(&at91sam9263_rtt0_device);
1097 platform_device_register(&at91sam9263_rtt1_device);
1098}
1099
1100
1101/* --------------------------------------------------------------------
1102 * Watchdog
1103 * -------------------------------------------------------------------- */
1104
1105#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1106static struct resource wdt_resources[] = {
1107 {
1108 .start = AT91SAM9263_BASE_WDT,
1109 .end = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1110 .flags = IORESOURCE_MEM,
1111 }
1112};
1113
1114static struct platform_device at91sam9263_wdt_device = {
1115 .name = "at91_wdt",
1116 .id = -1,
1117 .resource = wdt_resources,
1118 .num_resources = ARRAY_SIZE(wdt_resources),
1119};
1120
1121static void __init at91_add_device_watchdog(void)
1122{
1123 platform_device_register(&at91sam9263_wdt_device);
1124}
1125#else
1126static void __init at91_add_device_watchdog(void) {}
1127#endif
1128
1129
1130/* --------------------------------------------------------------------
1131 * PWM
1132 * --------------------------------------------------------------------*/
1133
1134#if IS_ENABLED(CONFIG_PWM_ATMEL)
1135static struct resource pwm_resources[] = {
1136 [0] = {
1137 .start = AT91SAM9263_BASE_PWMC,
1138 .end = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
1139 .flags = IORESOURCE_MEM,
1140 },
1141 [1] = {
1142 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1143 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1144 .flags = IORESOURCE_IRQ,
1145 },
1146};
1147
1148static struct platform_device at91sam9263_pwm0_device = {
1149 .name = "at91sam9rl-pwm",
1150 .id = -1,
1151 .resource = pwm_resources,
1152 .num_resources = ARRAY_SIZE(pwm_resources),
1153};
1154
1155void __init at91_add_device_pwm(u32 mask)
1156{
1157 if (mask & (1 << AT91_PWM0))
1158 at91_set_B_periph(AT91_PIN_PB7, 1); /* enable PWM0 */
1159
1160 if (mask & (1 << AT91_PWM1))
1161 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
1162
1163 if (mask & (1 << AT91_PWM2))
1164 at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
1165
1166 if (mask & (1 << AT91_PWM3))
1167 at91_set_B_periph(AT91_PIN_PB29, 1); /* enable PWM3 */
1168
1169 platform_device_register(&at91sam9263_pwm0_device);
1170}
1171#else
1172void __init at91_add_device_pwm(u32 mask) {}
1173#endif
1174
1175
1176/* --------------------------------------------------------------------
1177 * SSC -- Synchronous Serial Controller
1178 * -------------------------------------------------------------------- */
1179
1180#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
1181static u64 ssc0_dmamask = DMA_BIT_MASK(32);
1182
1183static struct resource ssc0_resources[] = {
1184 [0] = {
1185 .start = AT91SAM9263_BASE_SSC0,
1186 .end = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
1187 .flags = IORESOURCE_MEM,
1188 },
1189 [1] = {
1190 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1191 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1192 .flags = IORESOURCE_IRQ,
1193 },
1194};
1195
1196static struct platform_device at91sam9263_ssc0_device = {
1197 .name = "at91rm9200_ssc",
1198 .id = 0,
1199 .dev = {
1200 .dma_mask = &ssc0_dmamask,
1201 .coherent_dma_mask = DMA_BIT_MASK(32),
1202 },
1203 .resource = ssc0_resources,
1204 .num_resources = ARRAY_SIZE(ssc0_resources),
1205};
1206
1207static inline void configure_ssc0_pins(unsigned pins)
1208{
1209 if (pins & ATMEL_SSC_TF)
1210 at91_set_B_periph(AT91_PIN_PB0, 1);
1211 if (pins & ATMEL_SSC_TK)
1212 at91_set_B_periph(AT91_PIN_PB1, 1);
1213 if (pins & ATMEL_SSC_TD)
1214 at91_set_B_periph(AT91_PIN_PB2, 1);
1215 if (pins & ATMEL_SSC_RD)
1216 at91_set_B_periph(AT91_PIN_PB3, 1);
1217 if (pins & ATMEL_SSC_RK)
1218 at91_set_B_periph(AT91_PIN_PB4, 1);
1219 if (pins & ATMEL_SSC_RF)
1220 at91_set_B_periph(AT91_PIN_PB5, 1);
1221}
1222
1223static u64 ssc1_dmamask = DMA_BIT_MASK(32);
1224
1225static struct resource ssc1_resources[] = {
1226 [0] = {
1227 .start = AT91SAM9263_BASE_SSC1,
1228 .end = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
1229 .flags = IORESOURCE_MEM,
1230 },
1231 [1] = {
1232 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1233 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1234 .flags = IORESOURCE_IRQ,
1235 },
1236};
1237
1238static struct platform_device at91sam9263_ssc1_device = {
1239 .name = "at91rm9200_ssc",
1240 .id = 1,
1241 .dev = {
1242 .dma_mask = &ssc1_dmamask,
1243 .coherent_dma_mask = DMA_BIT_MASK(32),
1244 },
1245 .resource = ssc1_resources,
1246 .num_resources = ARRAY_SIZE(ssc1_resources),
1247};
1248
1249static inline void configure_ssc1_pins(unsigned pins)
1250{
1251 if (pins & ATMEL_SSC_TF)
1252 at91_set_A_periph(AT91_PIN_PB6, 1);
1253 if (pins & ATMEL_SSC_TK)
1254 at91_set_A_periph(AT91_PIN_PB7, 1);
1255 if (pins & ATMEL_SSC_TD)
1256 at91_set_A_periph(AT91_PIN_PB8, 1);
1257 if (pins & ATMEL_SSC_RD)
1258 at91_set_A_periph(AT91_PIN_PB9, 1);
1259 if (pins & ATMEL_SSC_RK)
1260 at91_set_A_periph(AT91_PIN_PB10, 1);
1261 if (pins & ATMEL_SSC_RF)
1262 at91_set_A_periph(AT91_PIN_PB11, 1);
1263}
1264
1265/*
1266 * SSC controllers are accessed through library code, instead of any
1267 * kind of all-singing/all-dancing driver. For example one could be
1268 * used by a particular I2S audio codec's driver, while another one
1269 * on the same system might be used by a custom data capture driver.
1270 */
1271void __init at91_add_device_ssc(unsigned id, unsigned pins)
1272{
1273 struct platform_device *pdev;
1274
1275 /*
1276 * NOTE: caller is responsible for passing information matching
1277 * "pins" to whatever will be using each particular controller.
1278 */
1279 switch (id) {
1280 case AT91SAM9263_ID_SSC0:
1281 pdev = &at91sam9263_ssc0_device;
1282 configure_ssc0_pins(pins);
1283 break;
1284 case AT91SAM9263_ID_SSC1:
1285 pdev = &at91sam9263_ssc1_device;
1286 configure_ssc1_pins(pins);
1287 break;
1288 default:
1289 return;
1290 }
1291
1292 platform_device_register(pdev);
1293}
1294
1295#else
1296void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1297#endif
1298
1299
1300/* --------------------------------------------------------------------
1301 * UART
1302 * -------------------------------------------------------------------- */
1303
1304#if defined(CONFIG_SERIAL_ATMEL)
1305
1306static struct resource dbgu_resources[] = {
1307 [0] = {
1308 .start = AT91SAM9263_BASE_DBGU,
1309 .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1310 .flags = IORESOURCE_MEM,
1311 },
1312 [1] = {
1313 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1314 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1315 .flags = IORESOURCE_IRQ,
1316 },
1317};
1318
1319static struct atmel_uart_data dbgu_data = {
1320 .use_dma_tx = 0,
1321 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1322};
1323
1324static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1325
1326static struct platform_device at91sam9263_dbgu_device = {
1327 .name = "atmel_usart",
1328 .id = 0,
1329 .dev = {
1330 .dma_mask = &dbgu_dmamask,
1331 .coherent_dma_mask = DMA_BIT_MASK(32),
1332 .platform_data = &dbgu_data,
1333 },
1334 .resource = dbgu_resources,
1335 .num_resources = ARRAY_SIZE(dbgu_resources),
1336};
1337
1338static inline void configure_dbgu_pins(void)
1339{
1340 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
1341 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
1342}
1343
1344static struct resource uart0_resources[] = {
1345 [0] = {
1346 .start = AT91SAM9263_BASE_US0,
1347 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1348 .flags = IORESOURCE_MEM,
1349 },
1350 [1] = {
1351 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1352 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1353 .flags = IORESOURCE_IRQ,
1354 },
1355};
1356
1357static struct atmel_uart_data uart0_data = {
1358 .use_dma_tx = 1,
1359 .use_dma_rx = 1,
1360};
1361
1362static u64 uart0_dmamask = DMA_BIT_MASK(32);
1363
1364static struct platform_device at91sam9263_uart0_device = {
1365 .name = "atmel_usart",
1366 .id = 1,
1367 .dev = {
1368 .dma_mask = &uart0_dmamask,
1369 .coherent_dma_mask = DMA_BIT_MASK(32),
1370 .platform_data = &uart0_data,
1371 },
1372 .resource = uart0_resources,
1373 .num_resources = ARRAY_SIZE(uart0_resources),
1374};
1375
1376static inline void configure_usart0_pins(unsigned pins)
1377{
1378 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
1379 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
1380
1381 if (pins & ATMEL_UART_RTS)
1382 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
1383 if (pins & ATMEL_UART_CTS)
1384 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
1385}
1386
1387static struct resource uart1_resources[] = {
1388 [0] = {
1389 .start = AT91SAM9263_BASE_US1,
1390 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1391 .flags = IORESOURCE_MEM,
1392 },
1393 [1] = {
1394 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1395 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1396 .flags = IORESOURCE_IRQ,
1397 },
1398};
1399
1400static struct atmel_uart_data uart1_data = {
1401 .use_dma_tx = 1,
1402 .use_dma_rx = 1,
1403};
1404
1405static u64 uart1_dmamask = DMA_BIT_MASK(32);
1406
1407static struct platform_device at91sam9263_uart1_device = {
1408 .name = "atmel_usart",
1409 .id = 2,
1410 .dev = {
1411 .dma_mask = &uart1_dmamask,
1412 .coherent_dma_mask = DMA_BIT_MASK(32),
1413 .platform_data = &uart1_data,
1414 },
1415 .resource = uart1_resources,
1416 .num_resources = ARRAY_SIZE(uart1_resources),
1417};
1418
1419static inline void configure_usart1_pins(unsigned pins)
1420{
1421 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
1422 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
1423
1424 if (pins & ATMEL_UART_RTS)
1425 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
1426 if (pins & ATMEL_UART_CTS)
1427 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
1428}
1429
1430static struct resource uart2_resources[] = {
1431 [0] = {
1432 .start = AT91SAM9263_BASE_US2,
1433 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1434 .flags = IORESOURCE_MEM,
1435 },
1436 [1] = {
1437 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1438 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1439 .flags = IORESOURCE_IRQ,
1440 },
1441};
1442
1443static struct atmel_uart_data uart2_data = {
1444 .use_dma_tx = 1,
1445 .use_dma_rx = 1,
1446};
1447
1448static u64 uart2_dmamask = DMA_BIT_MASK(32);
1449
1450static struct platform_device at91sam9263_uart2_device = {
1451 .name = "atmel_usart",
1452 .id = 3,
1453 .dev = {
1454 .dma_mask = &uart2_dmamask,
1455 .coherent_dma_mask = DMA_BIT_MASK(32),
1456 .platform_data = &uart2_data,
1457 },
1458 .resource = uart2_resources,
1459 .num_resources = ARRAY_SIZE(uart2_resources),
1460};
1461
1462static inline void configure_usart2_pins(unsigned pins)
1463{
1464 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
1465 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
1466
1467 if (pins & ATMEL_UART_RTS)
1468 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
1469 if (pins & ATMEL_UART_CTS)
1470 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
1471}
1472
1473static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1474
1475void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1476{
1477 struct platform_device *pdev;
1478 struct atmel_uart_data *pdata;
1479
1480 switch (id) {
1481 case 0: /* DBGU */
1482 pdev = &at91sam9263_dbgu_device;
1483 configure_dbgu_pins();
1484 break;
1485 case AT91SAM9263_ID_US0:
1486 pdev = &at91sam9263_uart0_device;
1487 configure_usart0_pins(pins);
1488 break;
1489 case AT91SAM9263_ID_US1:
1490 pdev = &at91sam9263_uart1_device;
1491 configure_usart1_pins(pins);
1492 break;
1493 case AT91SAM9263_ID_US2:
1494 pdev = &at91sam9263_uart2_device;
1495 configure_usart2_pins(pins);
1496 break;
1497 default:
1498 return;
1499 }
1500 pdata = pdev->dev.platform_data;
1501 pdata->num = portnr; /* update to mapped ID */
1502
1503 if (portnr < ATMEL_MAX_UART)
1504 at91_uarts[portnr] = pdev;
1505}
1506
1507void __init at91_add_device_serial(void)
1508{
1509 int i;
1510
1511 for (i = 0; i < ATMEL_MAX_UART; i++) {
1512 if (at91_uarts[i])
1513 platform_device_register(at91_uarts[i]);
1514 }
1515}
1516#else
1517void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1518void __init at91_add_device_serial(void) {}
1519#endif
1520
1521
1522/* -------------------------------------------------------------------- */
1523/*
1524 * These devices are always present and don't need any board-specific
1525 * setup.
1526 */
1527static int __init at91_add_standard_devices(void)
1528{
1529 if (of_have_populated_dt())
1530 return 0;
1531
1532 at91_add_device_rtt();
1533 at91_add_device_watchdog();
1534 at91_add_device_tc();
1535 return 0;
1536}
1537
1538arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index dcd867143c75..b6117bea9a6f 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -12,7 +12,6 @@
12 12
13#include <asm/system_misc.h> 13#include <asm/system_misc.h>
14#include <asm/irq.h> 14#include <asm/irq.h>
15#include <mach/cpu.h>
16#include <mach/hardware.h> 15#include <mach/hardware.h>
17 16
18#include "soc.h" 17#include "soc.h"
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
deleted file mode 100644
index e76e35ce81e7..000000000000
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ /dev/null
@@ -1,223 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-afeb-9260v1.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 * Copyright (C) 2008 Sergey Lapin
7 *
8 * A custom board designed as open hardware; PCBs and various information
9 * is available at http://groups.google.com/group/arm9fpga-evolution-board/
10 * Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/types.h>
28#include <linux/gpio.h>
29#include <linux/init.h>
30#include <linux/mm.h>
31#include <linux/module.h>
32#include <linux/platform_device.h>
33#include <linux/spi/spi.h>
34#include <linux/clk.h>
35#include <linux/dma-mapping.h>
36
37#include <mach/hardware.h>
38#include <asm/setup.h>
39#include <asm/mach-types.h>
40#include <asm/irq.h>
41
42#include <asm/mach/arch.h>
43#include <asm/mach/map.h>
44#include <asm/mach/irq.h>
45
46#include "at91_aic.h"
47#include "board.h"
48#include "generic.h"
49#include "gpio.h"
50
51
52static void __init afeb9260_init_early(void)
53{
54 /* Initialize processor: 18.432 MHz crystal */
55 at91_initialize(18432000);
56}
57
58/*
59 * USB Host port
60 */
61static struct at91_usbh_data __initdata afeb9260_usbh_data = {
62 .ports = 1,
63 .vbus_pin = {-EINVAL, -EINVAL},
64 .overcurrent_pin= {-EINVAL, -EINVAL},
65};
66
67/*
68 * USB Device port
69 */
70static struct at91_udc_data __initdata afeb9260_udc_data = {
71 .vbus_pin = AT91_PIN_PC5,
72 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
73};
74
75
76
77/*
78 * SPI devices.
79 */
80static struct spi_board_info afeb9260_spi_devices[] = {
81 { /* DataFlash chip */
82 .modalias = "mtd_dataflash",
83 .chip_select = 1,
84 .max_speed_hz = 15 * 1000 * 1000,
85 .bus_num = 0,
86 },
87};
88
89
90/*
91 * MACB Ethernet device
92 */
93static struct macb_platform_data __initdata afeb9260_macb_data = {
94 .phy_irq_pin = AT91_PIN_PA9,
95 .is_rmii = 0,
96};
97
98
99/*
100 * NAND flash
101 */
102static struct mtd_partition __initdata afeb9260_nand_partition[] = {
103 {
104 .name = "bootloader",
105 .offset = 0,
106 .size = (640 * SZ_1K),
107 },
108 {
109 .name = "kernel",
110 .offset = MTDPART_OFS_NXTBLK,
111 .size = SZ_2M,
112 },
113 {
114 .name = "rootfs",
115 .offset = MTDPART_OFS_NXTBLK,
116 .size = MTDPART_SIZ_FULL,
117 },
118};
119
120static struct atmel_nand_data __initdata afeb9260_nand_data = {
121 .ale = 21,
122 .cle = 22,
123 .rdy_pin = AT91_PIN_PC13,
124 .enable_pin = AT91_PIN_PC14,
125 .bus_width_16 = 0,
126 .ecc_mode = NAND_ECC_SOFT,
127 .parts = afeb9260_nand_partition,
128 .num_parts = ARRAY_SIZE(afeb9260_nand_partition),
129 .det_pin = -EINVAL,
130};
131
132
133/*
134 * MCI (SD/MMC)
135 */
136static struct mci_platform_data __initdata afeb9260_mci0_data = {
137 .slot[1] = {
138 .bus_width = 4,
139 .detect_pin = AT91_PIN_PC9,
140 .wp_pin = AT91_PIN_PC4,
141 },
142};
143
144
145
146static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
147 {
148 I2C_BOARD_INFO("tlv320aic23", 0x1a),
149 }, {
150 I2C_BOARD_INFO("fm3130", 0x68),
151 }, {
152 I2C_BOARD_INFO("24c64", 0x50),
153 },
154};
155
156/*
157 * IDE (CF True IDE mode)
158 */
159static struct at91_cf_data afeb9260_cf_data = {
160 .chipselect = 4,
161 .irq_pin = AT91_PIN_PA6,
162 .det_pin = -EINVAL,
163 .vcc_pin = -EINVAL,
164 .rst_pin = AT91_PIN_PA7,
165 .flags = AT91_CF_TRUE_IDE,
166};
167
168static void __init afeb9260_board_init(void)
169{
170 at91_register_devices();
171
172 /* Serial */
173 /* DBGU on ttyS0. (Rx & Tx only) */
174 at91_register_uart(0, 0, 0);
175
176 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
177 at91_register_uart(AT91SAM9260_ID_US0, 1,
178 ATMEL_UART_CTS | ATMEL_UART_RTS
179 | ATMEL_UART_DTR | ATMEL_UART_DSR
180 | ATMEL_UART_DCD | ATMEL_UART_RI);
181
182 /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
183 at91_register_uart(AT91SAM9260_ID_US1, 2,
184 ATMEL_UART_CTS | ATMEL_UART_RTS);
185 at91_add_device_serial();
186 /* USB Host */
187 at91_add_device_usbh(&afeb9260_usbh_data);
188 /* USB Device */
189 at91_add_device_udc(&afeb9260_udc_data);
190 /* SPI */
191 at91_add_device_spi(afeb9260_spi_devices,
192 ARRAY_SIZE(afeb9260_spi_devices));
193 /* NAND */
194 at91_add_device_nand(&afeb9260_nand_data);
195 /* Ethernet */
196 at91_add_device_eth(&afeb9260_macb_data);
197
198 /* Standard function's pin assignments are not
199 * appropriate for us and generic code provide
200 * no API to configure these pins any other way */
201 at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
202 at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
203 /* MMC */
204 at91_add_device_mci(0, &afeb9260_mci0_data);
205 /* I2C */
206 at91_add_device_i2c(afeb9260_i2c_devices,
207 ARRAY_SIZE(afeb9260_i2c_devices));
208 /* Audio */
209 at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
210 /* IDE */
211 at91_add_device_cf(&afeb9260_cf_data);
212}
213
214MACHINE_START(AFEB9260, "Custom afeb9260 board")
215 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
216 .init_time = at91_init_time,
217 .map_io = at91_map_io,
218 .handle_irq = at91_aic_handle_irq,
219 .init_early = afeb9260_init_early,
220 .init_irq = at91_init_irq_default,
221 .init_machine = afeb9260_board_init,
222MACHINE_END
223
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
deleted file mode 100644
index ae827dd2d0d2..000000000000
--- a/arch/arm/mach-at91/board-cam60.c
+++ /dev/null
@@ -1,199 +0,0 @@
1/*
2 * KwikByte CAM60 (KB9260)
3 *
4 * based on board-sam9260ek.c
5 * Copyright (C) 2005 SAN People
6 * Copyright (C) 2006 Atmel
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
24#include <linux/gpio.h>
25#include <linux/init.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/platform_device.h>
29#include <linux/spi/spi.h>
30#include <linux/spi/flash.h>
31
32#include <mach/hardware.h>
33#include <asm/setup.h>
34#include <asm/mach-types.h>
35#include <asm/irq.h>
36
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39#include <asm/mach/irq.h>
40
41#include <mach/at91sam9_smc.h>
42
43#include "at91_aic.h"
44#include "board.h"
45#include "sam9_smc.h"
46#include "generic.h"
47#include "gpio.h"
48
49
50static void __init cam60_init_early(void)
51{
52 /* Initialize processor: 10 MHz crystal */
53 at91_initialize(10000000);
54}
55
56/*
57 * USB Host
58 */
59static struct at91_usbh_data __initdata cam60_usbh_data = {
60 .ports = 1,
61 .vbus_pin = {-EINVAL, -EINVAL},
62 .overcurrent_pin= {-EINVAL, -EINVAL},
63};
64
65
66/*
67 * SPI devices.
68 */
69#if defined(CONFIG_MTD_DATAFLASH)
70static struct mtd_partition cam60_spi_partitions[] = {
71 {
72 .name = "BOOT1",
73 .offset = 0,
74 .size = 4 * 1056,
75 },
76 {
77 .name = "BOOT2",
78 .offset = MTDPART_OFS_NXTBLK,
79 .size = 256 * 1056,
80 },
81 {
82 .name = "kernel",
83 .offset = MTDPART_OFS_NXTBLK,
84 .size = 2222 * 1056,
85 },
86 {
87 .name = "file system",
88 .offset = MTDPART_OFS_NXTBLK,
89 .size = MTDPART_SIZ_FULL,
90 },
91};
92
93static struct flash_platform_data cam60_spi_flash_platform_data = {
94 .name = "spi_flash",
95 .parts = cam60_spi_partitions,
96 .nr_parts = ARRAY_SIZE(cam60_spi_partitions)
97};
98#endif
99
100static struct spi_board_info cam60_spi_devices[] __initdata = {
101#if defined(CONFIG_MTD_DATAFLASH)
102 { /* DataFlash chip */
103 .modalias = "mtd_dataflash",
104 .chip_select = 0,
105 .max_speed_hz = 15 * 1000 * 1000,
106 .bus_num = 0,
107 .platform_data = &cam60_spi_flash_platform_data
108 },
109#endif
110};
111
112
113/*
114 * MACB Ethernet device
115 */
116static struct macb_platform_data cam60_macb_data __initdata = {
117 .phy_irq_pin = AT91_PIN_PB5,
118 .is_rmii = 0,
119};
120
121
122/*
123 * NAND Flash
124 */
125static struct mtd_partition __initdata cam60_nand_partition[] = {
126 {
127 .name = "nand_fs",
128 .offset = 0,
129 .size = MTDPART_SIZ_FULL,
130 },
131};
132
133static struct atmel_nand_data __initdata cam60_nand_data = {
134 .ale = 21,
135 .cle = 22,
136 .det_pin = -EINVAL,
137 .rdy_pin = AT91_PIN_PA9,
138 .enable_pin = AT91_PIN_PA7,
139 .ecc_mode = NAND_ECC_SOFT,
140 .parts = cam60_nand_partition,
141 .num_parts = ARRAY_SIZE(cam60_nand_partition),
142};
143
144static struct sam9_smc_config __initdata cam60_nand_smc_config = {
145 .ncs_read_setup = 0,
146 .nrd_setup = 1,
147 .ncs_write_setup = 0,
148 .nwe_setup = 1,
149
150 .ncs_read_pulse = 3,
151 .nrd_pulse = 3,
152 .ncs_write_pulse = 3,
153 .nwe_pulse = 3,
154
155 .read_cycle = 5,
156 .write_cycle = 5,
157
158 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
159 .tdf_cycles = 2,
160};
161
162static void __init cam60_add_device_nand(void)
163{
164 /* configure chip-select 3 (NAND) */
165 sam9_smc_configure(0, 3, &cam60_nand_smc_config);
166
167 at91_add_device_nand(&cam60_nand_data);
168}
169
170
171static void __init cam60_board_init(void)
172{
173 at91_register_devices();
174
175 /* Serial */
176 /* DBGU on ttyS0. (Rx & Tx only) */
177 at91_register_uart(0, 0, 0);
178 at91_add_device_serial();
179 /* SPI */
180 at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
181 /* Ethernet */
182 at91_add_device_eth(&cam60_macb_data);
183 /* USB Host */
184 /* enable USB power supply circuit */
185 at91_set_gpio_output(AT91_PIN_PB18, 1);
186 at91_add_device_usbh(&cam60_usbh_data);
187 /* NAND */
188 cam60_add_device_nand();
189}
190
191MACHINE_START(CAM60, "KwikByte CAM60")
192 /* Maintainer: KwikByte */
193 .init_time = at91_init_time,
194 .map_io = at91_map_io,
195 .handle_irq = at91_aic_handle_irq,
196 .init_early = cam60_init_early,
197 .init_irq = at91_init_irq_default,
198 .init_machine = cam60_board_init,
199MACHINE_END
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
deleted file mode 100644
index 731c8318f4f5..000000000000
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ /dev/null
@@ -1,386 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-cpu9krea.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
24#include <linux/gpio.h>
25#include <linux/init.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/platform_device.h>
29#include <linux/clk.h>
30#include <linux/gpio_keys.h>
31#include <linux/input.h>
32#include <linux/mtd/physmap.h>
33
34#include <asm/setup.h>
35#include <asm/mach-types.h>
36#include <asm/irq.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/irq.h>
41
42#include <mach/hardware.h>
43#include <mach/at91sam9_smc.h>
44#include <mach/at91sam9260_matrix.h>
45#include <mach/at91_matrix.h>
46
47#include "at91_aic.h"
48#include "board.h"
49#include "sam9_smc.h"
50#include "generic.h"
51#include "gpio.h"
52
53static void __init cpu9krea_init_early(void)
54{
55 /* Initialize processor: 18.432 MHz crystal */
56 at91_initialize(18432000);
57}
58
59/*
60 * USB Host port
61 */
62static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
63 .ports = 2,
64 .vbus_pin = {-EINVAL, -EINVAL},
65 .overcurrent_pin= {-EINVAL, -EINVAL},
66};
67
68/*
69 * USB Device port
70 */
71static struct at91_udc_data __initdata cpu9krea_udc_data = {
72 .vbus_pin = AT91_PIN_PC8,
73 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
74};
75
76/*
77 * MACB Ethernet device
78 */
79static struct macb_platform_data __initdata cpu9krea_macb_data = {
80 .phy_irq_pin = -EINVAL,
81 .is_rmii = 1,
82};
83
84/*
85 * NAND flash
86 */
87static struct atmel_nand_data __initdata cpu9krea_nand_data = {
88 .ale = 21,
89 .cle = 22,
90 .rdy_pin = AT91_PIN_PC13,
91 .enable_pin = AT91_PIN_PC14,
92 .bus_width_16 = 0,
93 .det_pin = -EINVAL,
94 .ecc_mode = NAND_ECC_SOFT,
95};
96
97#ifdef CONFIG_MACH_CPU9260
98static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
99 .ncs_read_setup = 0,
100 .nrd_setup = 1,
101 .ncs_write_setup = 0,
102 .nwe_setup = 1,
103
104 .ncs_read_pulse = 3,
105 .nrd_pulse = 3,
106 .ncs_write_pulse = 3,
107 .nwe_pulse = 3,
108
109 .read_cycle = 5,
110 .write_cycle = 5,
111
112 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
113 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
114 .tdf_cycles = 2,
115};
116#else
117static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
118 .ncs_read_setup = 0,
119 .nrd_setup = 2,
120 .ncs_write_setup = 0,
121 .nwe_setup = 2,
122
123 .ncs_read_pulse = 4,
124 .nrd_pulse = 4,
125 .ncs_write_pulse = 4,
126 .nwe_pulse = 4,
127
128 .read_cycle = 7,
129 .write_cycle = 7,
130
131 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
132 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
133 .tdf_cycles = 3,
134};
135#endif
136
137static void __init cpu9krea_add_device_nand(void)
138{
139 sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config);
140 at91_add_device_nand(&cpu9krea_nand_data);
141}
142
143/*
144 * NOR flash
145 */
146static struct physmap_flash_data cpuat9260_nor_data = {
147 .width = 2,
148};
149
150#define NOR_BASE AT91_CHIPSELECT_0
151#define NOR_SIZE SZ_64M
152
153static struct resource nor_flash_resources[] = {
154 {
155 .start = NOR_BASE,
156 .end = NOR_BASE + NOR_SIZE - 1,
157 .flags = IORESOURCE_MEM,
158 }
159};
160
161static struct platform_device cpu9krea_nor_flash = {
162 .name = "physmap-flash",
163 .id = 0,
164 .dev = {
165 .platform_data = &cpuat9260_nor_data,
166 },
167 .resource = nor_flash_resources,
168 .num_resources = ARRAY_SIZE(nor_flash_resources),
169};
170
171#ifdef CONFIG_MACH_CPU9260
172static struct sam9_smc_config __initdata cpu9krea_nor_smc_config = {
173 .ncs_read_setup = 0,
174 .nrd_setup = 1,
175 .ncs_write_setup = 0,
176 .nwe_setup = 1,
177
178 .ncs_read_pulse = 10,
179 .nrd_pulse = 10,
180 .ncs_write_pulse = 6,
181 .nwe_pulse = 6,
182
183 .read_cycle = 12,
184 .write_cycle = 8,
185
186 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
187 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
188 | AT91_SMC_DBW_16,
189 .tdf_cycles = 2,
190};
191#else
192static struct sam9_smc_config __initdata cpu9krea_nor_smc_config = {
193 .ncs_read_setup = 0,
194 .nrd_setup = 1,
195 .ncs_write_setup = 0,
196 .nwe_setup = 1,
197
198 .ncs_read_pulse = 13,
199 .nrd_pulse = 13,
200 .ncs_write_pulse = 8,
201 .nwe_pulse = 8,
202
203 .read_cycle = 15,
204 .write_cycle = 10,
205
206 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
207 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
208 | AT91_SMC_DBW_16,
209 .tdf_cycles = 2,
210};
211#endif
212
213static __init void cpu9krea_add_device_nor(void)
214{
215 unsigned long csa;
216
217 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
218 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
219
220 /* configure chip-select 0 (NOR) */
221 sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
222
223 platform_device_register(&cpu9krea_nor_flash);
224}
225
226/*
227 * LEDs
228 */
229static struct gpio_led cpu9krea_leds[] = {
230 { /* LED1 */
231 .name = "LED1",
232 .gpio = AT91_PIN_PC11,
233 .active_low = 1,
234 .default_trigger = "timer",
235 },
236 { /* LED2 */
237 .name = "LED2",
238 .gpio = AT91_PIN_PC12,
239 .active_low = 1,
240 .default_trigger = "heartbeat",
241 },
242 { /* LED3 */
243 .name = "LED3",
244 .gpio = AT91_PIN_PC7,
245 .active_low = 1,
246 .default_trigger = "none",
247 },
248 { /* LED4 */
249 .name = "LED4",
250 .gpio = AT91_PIN_PC9,
251 .active_low = 1,
252 .default_trigger = "none",
253 }
254};
255
256static struct i2c_board_info __initdata cpu9krea_i2c_devices[] = {
257 {
258 I2C_BOARD_INFO("ds1339", 0x68),
259 },
260};
261
262/*
263 * GPIO Buttons
264 */
265#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
266static struct gpio_keys_button cpu9krea_buttons[] = {
267 {
268 .gpio = AT91_PIN_PC3,
269 .code = BTN_0,
270 .desc = "BP1",
271 .active_low = 1,
272 .wakeup = 1,
273 },
274 {
275 .gpio = AT91_PIN_PB20,
276 .code = BTN_1,
277 .desc = "BP2",
278 .active_low = 1,
279 .wakeup = 1,
280 }
281};
282
283static struct gpio_keys_platform_data cpu9krea_button_data = {
284 .buttons = cpu9krea_buttons,
285 .nbuttons = ARRAY_SIZE(cpu9krea_buttons),
286};
287
288static struct platform_device cpu9krea_button_device = {
289 .name = "gpio-keys",
290 .id = -1,
291 .num_resources = 0,
292 .dev = {
293 .platform_data = &cpu9krea_button_data,
294 }
295};
296
297static void __init cpu9krea_add_device_buttons(void)
298{
299 at91_set_gpio_input(AT91_PIN_PC3, 1); /* BP1 */
300 at91_set_deglitch(AT91_PIN_PC3, 1);
301 at91_set_gpio_input(AT91_PIN_PB20, 1); /* BP2 */
302 at91_set_deglitch(AT91_PIN_PB20, 1);
303
304 platform_device_register(&cpu9krea_button_device);
305}
306#else
307static void __init cpu9krea_add_device_buttons(void)
308{
309}
310#endif
311
312/*
313 * MCI (SD/MMC)
314 */
315static struct mci_platform_data __initdata cpu9krea_mci0_data = {
316 .slot[0] = {
317 .bus_width = 4,
318 .detect_pin = AT91_PIN_PA29,
319 .wp_pin = -EINVAL,
320 },
321};
322
323static void __init cpu9krea_board_init(void)
324{
325 at91_register_devices();
326
327 /* NOR */
328 cpu9krea_add_device_nor();
329 /* Serial */
330 /* DGBU on ttyS0. (Rx & Tx only) */
331 at91_register_uart(0, 0, 0);
332
333 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
334 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
335 ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
336 ATMEL_UART_DCD | ATMEL_UART_RI);
337
338 /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
339 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
340 ATMEL_UART_RTS);
341
342 /* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
343 at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
344 ATMEL_UART_RTS);
345
346 /* USART3 on ttyS4. (Rx, Tx) */
347 at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
348
349 /* USART4 on ttyS5. (Rx, Tx) */
350 at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
351
352 /* USART5 on ttyS6. (Rx, Tx) */
353 at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
354 at91_add_device_serial();
355 /* USB Host */
356 at91_add_device_usbh(&cpu9krea_usbh_data);
357 /* USB Device */
358 at91_add_device_udc(&cpu9krea_udc_data);
359 /* NAND */
360 cpu9krea_add_device_nand();
361 /* Ethernet */
362 at91_add_device_eth(&cpu9krea_macb_data);
363 /* MMC */
364 at91_add_device_mci(0, &cpu9krea_mci0_data);
365 /* I2C */
366 at91_add_device_i2c(cpu9krea_i2c_devices,
367 ARRAY_SIZE(cpu9krea_i2c_devices));
368 /* LEDs */
369 at91_gpio_leds(cpu9krea_leds, ARRAY_SIZE(cpu9krea_leds));
370 /* Push Buttons */
371 cpu9krea_add_device_buttons();
372}
373
374#ifdef CONFIG_MACH_CPU9260
375MACHINE_START(CPUAT9260, "Eukrea CPU9260")
376#else
377MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
378#endif
379 /* Maintainer: Eric Benard - EUKREA Electromatique */
380 .init_time = at91_init_time,
381 .map_io = at91_map_io,
382 .handle_irq = at91_aic_handle_irq,
383 .init_early = cpu9krea_init_early,
384 .init_irq = at91_init_irq_default,
385 .init_machine = cpu9krea_board_init,
386MACHINE_END
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
deleted file mode 100644
index a6aa4a2432f2..000000000000
--- a/arch/arm/mach-at91/board-flexibity.c
+++ /dev/null
@@ -1,171 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-flexibity.c
3 *
4 * Copyright (C) 2010-2011 Flexibity
5 * Copyright (C) 2005 SAN People
6 * Copyright (C) 2006 Atmel
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/init.h>
24#include <linux/platform_device.h>
25#include <linux/spi/spi.h>
26#include <linux/input.h>
27#include <linux/gpio.h>
28
29#include <asm/mach-types.h>
30
31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33#include <asm/mach/irq.h>
34
35#include <mach/hardware.h>
36
37#include "at91_aic.h"
38#include "board.h"
39#include "generic.h"
40#include "gpio.h"
41
42static void __init flexibity_init_early(void)
43{
44 /* Initialize processor: 18.432 MHz crystal */
45 at91_initialize(18432000);
46}
47
48/* USB Host port */
49static struct at91_usbh_data __initdata flexibity_usbh_data = {
50 .ports = 2,
51 .vbus_pin = {-EINVAL, -EINVAL},
52 .overcurrent_pin= {-EINVAL, -EINVAL},
53};
54
55/* USB Device port */
56static struct at91_udc_data __initdata flexibity_udc_data = {
57 .vbus_pin = AT91_PIN_PC5,
58 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
59};
60
61/* I2C devices */
62static struct i2c_board_info __initdata flexibity_i2c_devices[] = {
63 {
64 I2C_BOARD_INFO("ds1307", 0x68),
65 },
66};
67
68/* SPI devices */
69static struct spi_board_info flexibity_spi_devices[] = {
70 { /* DataFlash chip */
71 .modalias = "mtd_dataflash",
72 .chip_select = 1,
73 .max_speed_hz = 15 * 1000 * 1000,
74 .bus_num = 0,
75 },
76};
77
78/* MCI (SD/MMC) */
79static struct mci_platform_data __initdata flexibity_mci0_data = {
80 .slot[0] = {
81 .bus_width = 4,
82 .detect_pin = AT91_PIN_PC9,
83 .wp_pin = AT91_PIN_PC4,
84 },
85};
86
87/* LEDs */
88static struct gpio_led flexibity_leds[] = {
89 {
90 .name = "usb1:green",
91 .gpio = AT91_PIN_PA12,
92 .active_low = 1,
93 .default_trigger = "default-on",
94 },
95 {
96 .name = "usb1:red",
97 .gpio = AT91_PIN_PA13,
98 .active_low = 1,
99 .default_trigger = "default-on",
100 },
101 {
102 .name = "usb2:green",
103 .gpio = AT91_PIN_PB26,
104 .active_low = 1,
105 .default_trigger = "default-on",
106 },
107 {
108 .name = "usb2:red",
109 .gpio = AT91_PIN_PB27,
110 .active_low = 1,
111 .default_trigger = "default-on",
112 },
113 {
114 .name = "usb3:green",
115 .gpio = AT91_PIN_PC8,
116 .active_low = 1,
117 .default_trigger = "default-on",
118 },
119 {
120 .name = "usb3:red",
121 .gpio = AT91_PIN_PC6,
122 .active_low = 1,
123 .default_trigger = "default-on",
124 },
125 {
126 .name = "usb4:green",
127 .gpio = AT91_PIN_PB4,
128 .active_low = 1,
129 .default_trigger = "default-on",
130 },
131 {
132 .name = "usb4:red",
133 .gpio = AT91_PIN_PB5,
134 .active_low = 1,
135 .default_trigger = "default-on",
136 }
137};
138
139static void __init flexibity_board_init(void)
140{
141 at91_register_devices();
142
143 /* Serial */
144 /* DBGU on ttyS0. (Rx & Tx only) */
145 at91_register_uart(0, 0, 0);
146 at91_add_device_serial();
147 /* USB Host */
148 at91_add_device_usbh(&flexibity_usbh_data);
149 /* USB Device */
150 at91_add_device_udc(&flexibity_udc_data);
151 /* I2C */
152 at91_add_device_i2c(flexibity_i2c_devices,
153 ARRAY_SIZE(flexibity_i2c_devices));
154 /* SPI */
155 at91_add_device_spi(flexibity_spi_devices,
156 ARRAY_SIZE(flexibity_spi_devices));
157 /* MMC */
158 at91_add_device_mci(0, &flexibity_mci0_data);
159 /* LEDs */
160 at91_gpio_leds(flexibity_leds, ARRAY_SIZE(flexibity_leds));
161}
162
163MACHINE_START(FLEXIBITY, "Flexibity Connect")
164 /* Maintainer: Maxim Osipov */
165 .init_time = at91_init_time,
166 .map_io = at91_map_io,
167 .handle_irq = at91_aic_handle_irq,
168 .init_early = flexibity_init_early,
169 .init_irq = at91_init_irq_default,
170 .init_machine = flexibity_board_init,
171MACHINE_END
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
deleted file mode 100644
index bf5cc55c7db6..000000000000
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ /dev/null
@@ -1,585 +0,0 @@
1/*
2 * Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de>
3 * taskit GmbH
4 * 2010 Igor Plyatov <plyatov@gmail.com>
5 * GeoSIG Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/platform_device.h>
23#include <linux/gpio.h>
24#include <linux/w1-gpio.h>
25#include <linux/i2c.h>
26#include <linux/i2c/pcf857x.h>
27#include <linux/gpio_keys.h>
28#include <linux/input.h>
29
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32
33#include <mach/at91sam9_smc.h>
34#include <mach/hardware.h>
35
36#include "at91_aic.h"
37#include "board.h"
38#include "sam9_smc.h"
39#include "generic.h"
40#include "gsia18s.h"
41#include "stamp9g20.h"
42#include "gpio.h"
43
44static void __init gsia18s_init_early(void)
45{
46 stamp9g20_init_early();
47}
48
49/*
50 * Two USB Host ports
51 */
52static struct at91_usbh_data __initdata usbh_data = {
53 .ports = 2,
54 .vbus_pin = {-EINVAL, -EINVAL},
55 .overcurrent_pin= {-EINVAL, -EINVAL},
56};
57
58/*
59 * USB Device port
60 */
61static struct at91_udc_data __initdata udc_data = {
62 .vbus_pin = AT91_PIN_PA22,
63 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
64};
65
66/*
67 * MACB Ethernet device
68 */
69static struct macb_platform_data __initdata macb_data = {
70 .phy_irq_pin = AT91_PIN_PA28,
71 .is_rmii = 1,
72};
73
74/*
75 * LEDs and GPOs
76 */
77static struct gpio_led gpio_leds[] = {
78 {
79 .name = "gpo:spi1reset",
80 .gpio = AT91_PIN_PC1,
81 .active_low = 0,
82 .default_trigger = "none",
83 .default_state = LEDS_GPIO_DEFSTATE_OFF,
84 },
85 {
86 .name = "gpo:trig_net_out",
87 .gpio = AT91_PIN_PB20,
88 .active_low = 0,
89 .default_trigger = "none",
90 .default_state = LEDS_GPIO_DEFSTATE_OFF,
91 },
92 {
93 .name = "gpo:trig_net_dir",
94 .gpio = AT91_PIN_PB19,
95 .active_low = 0,
96 .default_trigger = "none",
97 .default_state = LEDS_GPIO_DEFSTATE_OFF,
98 },
99 {
100 .name = "gpo:charge_dis",
101 .gpio = AT91_PIN_PC2,
102 .active_low = 0,
103 .default_trigger = "none",
104 .default_state = LEDS_GPIO_DEFSTATE_OFF,
105 },
106 {
107 .name = "led:event",
108 .gpio = AT91_PIN_PB17,
109 .active_low = 1,
110 .default_trigger = "none",
111 .default_state = LEDS_GPIO_DEFSTATE_OFF,
112 },
113 {
114 .name = "led:lan",
115 .gpio = AT91_PIN_PB18,
116 .active_low = 1,
117 .default_trigger = "none",
118 .default_state = LEDS_GPIO_DEFSTATE_OFF,
119 },
120 {
121 .name = "led:error",
122 .gpio = AT91_PIN_PB16,
123 .active_low = 1,
124 .default_trigger = "none",
125 .default_state = LEDS_GPIO_DEFSTATE_ON,
126 }
127};
128
129static struct gpio_led_platform_data gpio_led_info = {
130 .leds = gpio_leds,
131 .num_leds = ARRAY_SIZE(gpio_leds),
132};
133
134static struct platform_device leds = {
135 .name = "leds-gpio",
136 .id = 0,
137 .dev = {
138 .platform_data = &gpio_led_info,
139 }
140};
141
142static void __init gsia18s_leds_init(void)
143{
144 platform_device_register(&leds);
145}
146
147/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */
148static struct gpio_led pcf_gpio_leds1[] = {
149 { /* bit 0 */
150 .name = "gpo:hdc_power",
151 .gpio = PCF_GPIO_HDC_POWER,
152 .active_low = 0,
153 .default_trigger = "none",
154 .default_state = LEDS_GPIO_DEFSTATE_OFF,
155 },
156 { /* bit 1 */
157 .name = "gpo:wifi_setup",
158 .gpio = PCF_GPIO_WIFI_SETUP,
159 .active_low = 1,
160 .default_trigger = "none",
161 .default_state = LEDS_GPIO_DEFSTATE_OFF,
162 },
163 { /* bit 2 */
164 .name = "gpo:wifi_enable",
165 .gpio = PCF_GPIO_WIFI_ENABLE,
166 .active_low = 1,
167 .default_trigger = "none",
168 .default_state = LEDS_GPIO_DEFSTATE_OFF,
169 },
170 { /* bit 3 */
171 .name = "gpo:wifi_reset",
172 .gpio = PCF_GPIO_WIFI_RESET,
173 .active_low = 1,
174 .default_trigger = "none",
175 .default_state = LEDS_GPIO_DEFSTATE_ON,
176 },
177 /* bit 4 used as GPI */
178 { /* bit 5 */
179 .name = "gpo:gps_setup",
180 .gpio = PCF_GPIO_GPS_SETUP,
181 .active_low = 1,
182 .default_trigger = "none",
183 .default_state = LEDS_GPIO_DEFSTATE_OFF,
184 },
185 { /* bit 6 */
186 .name = "gpo:gps_standby",
187 .gpio = PCF_GPIO_GPS_STANDBY,
188 .active_low = 0,
189 .default_trigger = "none",
190 .default_state = LEDS_GPIO_DEFSTATE_ON,
191 },
192 { /* bit 7 */
193 .name = "gpo:gps_power",
194 .gpio = PCF_GPIO_GPS_POWER,
195 .active_low = 0,
196 .default_trigger = "none",
197 .default_state = LEDS_GPIO_DEFSTATE_OFF,
198 }
199};
200
201static struct gpio_led_platform_data pcf_gpio_led_info1 = {
202 .leds = pcf_gpio_leds1,
203 .num_leds = ARRAY_SIZE(pcf_gpio_leds1),
204};
205
206static struct platform_device pcf_leds1 = {
207 .name = "leds-gpio", /* GS_IA18-CB_board */
208 .id = 1,
209 .dev = {
210 .platform_data = &pcf_gpio_led_info1,
211 }
212};
213
214/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
215static struct gpio_led pcf_gpio_leds2[] = {
216 { /* bit 0 */
217 .name = "gpo:alarm_1",
218 .gpio = PCF_GPIO_ALARM1,
219 .active_low = 1,
220 .default_trigger = "none",
221 .default_state = LEDS_GPIO_DEFSTATE_OFF,
222 },
223 { /* bit 1 */
224 .name = "gpo:alarm_2",
225 .gpio = PCF_GPIO_ALARM2,
226 .active_low = 1,
227 .default_trigger = "none",
228 .default_state = LEDS_GPIO_DEFSTATE_OFF,
229 },
230 { /* bit 2 */
231 .name = "gpo:alarm_3",
232 .gpio = PCF_GPIO_ALARM3,
233 .active_low = 1,
234 .default_trigger = "none",
235 .default_state = LEDS_GPIO_DEFSTATE_OFF,
236 },
237 { /* bit 3 */
238 .name = "gpo:alarm_4",
239 .gpio = PCF_GPIO_ALARM4,
240 .active_low = 1,
241 .default_trigger = "none",
242 .default_state = LEDS_GPIO_DEFSTATE_OFF,
243 },
244 /* bits 4, 5, 6 not used */
245 { /* bit 7 */
246 .name = "gpo:alarm_v_relay_on",
247 .gpio = PCF_GPIO_ALARM_V_RELAY_ON,
248 .active_low = 0,
249 .default_trigger = "none",
250 .default_state = LEDS_GPIO_DEFSTATE_OFF,
251 },
252};
253
254static struct gpio_led_platform_data pcf_gpio_led_info2 = {
255 .leds = pcf_gpio_leds2,
256 .num_leds = ARRAY_SIZE(pcf_gpio_leds2),
257};
258
259static struct platform_device pcf_leds2 = {
260 .name = "leds-gpio",
261 .id = 2,
262 .dev = {
263 .platform_data = &pcf_gpio_led_info2,
264 }
265};
266
267/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */
268static struct gpio_led pcf_gpio_leds3[] = {
269 { /* bit 0 */
270 .name = "gpo:modem_power",
271 .gpio = PCF_GPIO_MODEM_POWER,
272 .active_low = 1,
273 .default_trigger = "none",
274 .default_state = LEDS_GPIO_DEFSTATE_OFF,
275 },
276 /* bits 1 and 2 not used */
277 { /* bit 3 */
278 .name = "gpo:modem_reset",
279 .gpio = PCF_GPIO_MODEM_RESET,
280 .active_low = 1,
281 .default_trigger = "none",
282 .default_state = LEDS_GPIO_DEFSTATE_ON,
283 },
284 /* bits 4, 5 and 6 not used */
285 { /* bit 7 */
286 .name = "gpo:trx_reset",
287 .gpio = PCF_GPIO_TRX_RESET,
288 .active_low = 1,
289 .default_trigger = "none",
290 .default_state = LEDS_GPIO_DEFSTATE_ON,
291 }
292};
293
294static struct gpio_led_platform_data pcf_gpio_led_info3 = {
295 .leds = pcf_gpio_leds3,
296 .num_leds = ARRAY_SIZE(pcf_gpio_leds3),
297};
298
299static struct platform_device pcf_leds3 = {
300 .name = "leds-gpio",
301 .id = 3,
302 .dev = {
303 .platform_data = &pcf_gpio_led_info3,
304 }
305};
306
307static void __init gsia18s_pcf_leds_init(void)
308{
309 platform_device_register(&pcf_leds1);
310 platform_device_register(&pcf_leds2);
311 platform_device_register(&pcf_leds3);
312}
313
314/*
315 * SPI busses.
316 */
317static struct spi_board_info gsia18s_spi_devices[] = {
318 { /* User accessible spi0, cs0 used for communication with MSP RTC */
319 .modalias = "spidev",
320 .bus_num = 0,
321 .chip_select = 0,
322 .max_speed_hz = 580000,
323 .mode = SPI_MODE_1,
324 },
325 { /* User accessible spi1, cs0 used for communication with int. DSP */
326 .modalias = "spidev",
327 .bus_num = 1,
328 .chip_select = 0,
329 .max_speed_hz = 5600000,
330 .mode = SPI_MODE_0,
331 },
332 { /* User accessible spi1, cs1 used for communication with ext. DSP */
333 .modalias = "spidev",
334 .bus_num = 1,
335 .chip_select = 1,
336 .max_speed_hz = 5600000,
337 .mode = SPI_MODE_0,
338 },
339 { /* User accessible spi1, cs2 used for communication with ext. DSP */
340 .modalias = "spidev",
341 .bus_num = 1,
342 .chip_select = 2,
343 .max_speed_hz = 5600000,
344 .mode = SPI_MODE_0,
345 },
346 { /* User accessible spi1, cs3 used for communication with ext. DSP */
347 .modalias = "spidev",
348 .bus_num = 1,
349 .chip_select = 3,
350 .max_speed_hz = 5600000,
351 .mode = SPI_MODE_0,
352 }
353};
354
355/*
356 * GPI Buttons
357 */
358static struct gpio_keys_button buttons[] = {
359 {
360 .gpio = GPIO_TRIG_NET_IN,
361 .code = BTN_1,
362 .desc = "TRIG_NET_IN",
363 .type = EV_KEY,
364 .active_low = 0,
365 .wakeup = 1,
366 },
367 { /* SW80 on the GS_IA18_S-MN board*/
368 .gpio = GPIO_CARD_UNMOUNT_0,
369 .code = BTN_2,
370 .desc = "Card umount 0",
371 .type = EV_KEY,
372 .active_low = 1,
373 .wakeup = 1,
374 },
375 { /* SW79 on the GS_IA18_S-MN board*/
376 .gpio = GPIO_CARD_UNMOUNT_1,
377 .code = BTN_3,
378 .desc = "Card umount 1",
379 .type = EV_KEY,
380 .active_low = 1,
381 .wakeup = 1,
382 },
383 { /* SW280 on the GS_IA18-CB board*/
384 .gpio = GPIO_KEY_POWER,
385 .code = KEY_POWER,
386 .desc = "Power Off Button",
387 .type = EV_KEY,
388 .active_low = 0,
389 .wakeup = 1,
390 }
391};
392
393static struct gpio_keys_platform_data button_data = {
394 .buttons = buttons,
395 .nbuttons = ARRAY_SIZE(buttons),
396};
397
398static struct platform_device button_device = {
399 .name = "gpio-keys",
400 .id = -1,
401 .num_resources = 0,
402 .dev = {
403 .platform_data = &button_data,
404 }
405};
406
407static void __init gsia18s_add_device_buttons(void)
408{
409 at91_set_gpio_input(GPIO_TRIG_NET_IN, 1);
410 at91_set_deglitch(GPIO_TRIG_NET_IN, 1);
411 at91_set_gpio_input(GPIO_CARD_UNMOUNT_0, 1);
412 at91_set_deglitch(GPIO_CARD_UNMOUNT_0, 1);
413 at91_set_gpio_input(GPIO_CARD_UNMOUNT_1, 1);
414 at91_set_deglitch(GPIO_CARD_UNMOUNT_1, 1);
415 at91_set_gpio_input(GPIO_KEY_POWER, 0);
416 at91_set_deglitch(GPIO_KEY_POWER, 1);
417
418 platform_device_register(&button_device);
419}
420
421/*
422 * I2C
423 */
424static int pcf8574x_0x20_setup(struct i2c_client *client, int gpio,
425 unsigned int ngpio, void *context)
426{
427 int status;
428
429 status = gpio_request(gpio + PCF_GPIO_ETH_DETECT, "eth_det");
430 if (status < 0) {
431 pr_err("error: can't request GPIO%d\n",
432 gpio + PCF_GPIO_ETH_DETECT);
433 return status;
434 }
435 status = gpio_direction_input(gpio + PCF_GPIO_ETH_DETECT);
436 if (status < 0) {
437 pr_err("error: can't setup GPIO%d as input\n",
438 gpio + PCF_GPIO_ETH_DETECT);
439 return status;
440 }
441 status = gpio_export(gpio + PCF_GPIO_ETH_DETECT, false);
442 if (status < 0) {
443 pr_err("error: can't export GPIO%d\n",
444 gpio + PCF_GPIO_ETH_DETECT);
445 return status;
446 }
447 status = gpio_sysfs_set_active_low(gpio + PCF_GPIO_ETH_DETECT, 1);
448 if (status < 0) {
449 pr_err("error: gpio_sysfs_set active_low(GPIO%d, 1)\n",
450 gpio + PCF_GPIO_ETH_DETECT);
451 return status;
452 }
453
454 return 0;
455}
456
457static int pcf8574x_0x20_teardown(struct i2c_client *client, int gpio,
458 unsigned ngpio, void *context)
459{
460 gpio_free(gpio + PCF_GPIO_ETH_DETECT);
461 return 0;
462}
463
464static struct pcf857x_platform_data pcf20_pdata = {
465 .gpio_base = GS_IA18_S_PCF_GPIO_BASE0,
466 .n_latch = (1 << 4),
467 .setup = pcf8574x_0x20_setup,
468 .teardown = pcf8574x_0x20_teardown,
469};
470
471static struct pcf857x_platform_data pcf22_pdata = {
472 .gpio_base = GS_IA18_S_PCF_GPIO_BASE1,
473};
474
475static struct pcf857x_platform_data pcf24_pdata = {
476 .gpio_base = GS_IA18_S_PCF_GPIO_BASE2,
477};
478
479static struct i2c_board_info __initdata gsia18s_i2c_devices[] = {
480 { /* U1 on the GS_IA18-CB_V3 board */
481 I2C_BOARD_INFO("pcf8574", 0x20),
482 .platform_data = &pcf20_pdata,
483 },
484 { /* U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
485 I2C_BOARD_INFO("pcf8574", 0x22),
486 .platform_data = &pcf22_pdata,
487 },
488 { /* U1 on the GS_2G-OPT23-A_V0 board (Modem) */
489 I2C_BOARD_INFO("pcf8574", 0x24),
490 .platform_data = &pcf24_pdata,
491 },
492 { /* U161 on the GS_IA18_S-MN board */
493 I2C_BOARD_INFO("24c1024", 0x50),
494 },
495 { /* U162 on the GS_IA18_S-MN board */
496 I2C_BOARD_INFO("24c01", 0x53),
497 },
498};
499
500/*
501 * Compact Flash
502 */
503static struct at91_cf_data __initdata gsia18s_cf1_data = {
504 .irq_pin = AT91_PIN_PA27,
505 .det_pin = AT91_PIN_PB30,
506 .vcc_pin = -EINVAL,
507 .rst_pin = AT91_PIN_PB31,
508 .chipselect = 5,
509 .flags = AT91_CF_TRUE_IDE,
510};
511
512/* Power Off by RTC */
513static void gsia18s_power_off(void)
514{
515 pr_notice("Power supply will be switched off automatically now or after 60 seconds without ArmDAS.\n");
516 at91_set_gpio_output(AT91_PIN_PA25, 1);
517 /* Spin to death... */
518 while (1)
519 ;
520}
521
522static int __init gsia18s_power_off_init(void)
523{
524 pm_power_off = gsia18s_power_off;
525 return 0;
526}
527
528/* ---------------------------------------------------------------------------*/
529
530static void __init gsia18s_board_init(void)
531{
532 /*
533 * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
534 * Used for Internal Analog Modem.
535 */
536 at91_register_uart(AT91SAM9260_ID_US0, 1,
537 ATMEL_UART_CTS | ATMEL_UART_RTS |
538 ATMEL_UART_DTR | ATMEL_UART_DSR |
539 ATMEL_UART_DCD | ATMEL_UART_RI);
540 /*
541 * USART1 on ttyS2 (Rx, Tx, CTS, RTS).
542 * Used for GPS or WiFi or Data stream.
543 */
544 at91_register_uart(AT91SAM9260_ID_US1, 2,
545 ATMEL_UART_CTS | ATMEL_UART_RTS);
546 /*
547 * USART2 on ttyS3 (Rx, Tx, CTS, RTS).
548 * Used for External Modem.
549 */
550 at91_register_uart(AT91SAM9260_ID_US2, 3,
551 ATMEL_UART_CTS | ATMEL_UART_RTS);
552 /*
553 * USART3 on ttyS4 (Rx, Tx, RTS).
554 * Used for RS-485.
555 */
556 at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
557
558 /*
559 * USART4 on ttyS5 (Rx, Tx).
560 * Used for TRX433 Radio Module.
561 */
562 at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
563 stamp9g20_board_init();
564 at91_add_device_usbh(&usbh_data);
565 at91_add_device_udc(&udc_data);
566 at91_add_device_eth(&macb_data);
567 gsia18s_leds_init();
568 gsia18s_pcf_leds_init();
569 gsia18s_add_device_buttons();
570 at91_add_device_i2c(gsia18s_i2c_devices,
571 ARRAY_SIZE(gsia18s_i2c_devices));
572 at91_add_device_cf(&gsia18s_cf1_data);
573 at91_add_device_spi(gsia18s_spi_devices,
574 ARRAY_SIZE(gsia18s_spi_devices));
575 gsia18s_power_off_init();
576}
577
578MACHINE_START(GSIA18S, "GS_IA18_S")
579 .init_time = at91_init_time,
580 .map_io = at91_map_io,
581 .handle_irq = at91_aic_handle_irq,
582 .init_early = gsia18s_init_early,
583 .init_irq = at91_init_irq_default,
584 .init_machine = gsia18s_board_init,
585MACHINE_END
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
deleted file mode 100644
index 9c26b94ce448..000000000000
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ /dev/null
@@ -1,228 +0,0 @@
1/*
2 * Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de>
3 * taskit GmbH
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19/*
20 * copied and adjusted from board-stamp9g20.c
21 * by Peter Gsellmann <pgsellmann@portner-elektronik.at>
22 */
23
24#include <linux/mm.h>
25#include <linux/platform_device.h>
26#include <linux/gpio.h>
27#include <linux/w1-gpio.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31
32#include <mach/at91sam9_smc.h>
33#include <mach/hardware.h>
34
35#include "at91_aic.h"
36#include "board.h"
37#include "sam9_smc.h"
38#include "generic.h"
39#include "stamp9g20.h"
40#include "gpio.h"
41
42
43static void __init pcontrol_g20_init_early(void)
44{
45 stamp9g20_init_early();
46}
47
48static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
49 .ncs_read_setup = 16,
50 .nrd_setup = 18,
51 .ncs_write_setup = 16,
52 .nwe_setup = 18,
53
54 .ncs_read_pulse = 63,
55 .nrd_pulse = 55,
56 .ncs_write_pulse = 63,
57 .nwe_pulse = 55,
58
59 .read_cycle = 127,
60 .write_cycle = 127,
61
62 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
63 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_SELECT
64 | AT91_SMC_DBW_8 | AT91_SMC_PS_4
65 | AT91_SMC_TDFMODE,
66 .tdf_cycles = 3,
67}, {
68 .ncs_read_setup = 0,
69 .nrd_setup = 0,
70 .ncs_write_setup = 0,
71 .nwe_setup = 1,
72
73 .ncs_read_pulse = 8,
74 .nrd_pulse = 8,
75 .ncs_write_pulse = 5,
76 .nwe_pulse = 4,
77
78 .read_cycle = 8,
79 .write_cycle = 7,
80
81 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
82 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_SELECT
83 | AT91_SMC_DBW_16 | AT91_SMC_PS_8
84 | AT91_SMC_TDFMODE,
85 .tdf_cycles = 1,
86} };
87
88static void __init add_device_pcontrol(void)
89{
90 /* configure chip-select 4 (IO compatible to 8051 X4 ) */
91 sam9_smc_configure(0, 4, &pcontrol_smc_config[0]);
92 /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */
93 sam9_smc_configure(0, 7, &pcontrol_smc_config[1]);
94}
95
96
97/*
98 * USB Host port
99 */
100static struct at91_usbh_data __initdata usbh_data = {
101 .ports = 2,
102 .vbus_pin = {-EINVAL, -EINVAL},
103 .overcurrent_pin= {-EINVAL, -EINVAL},
104};
105
106
107/*
108 * USB Device port
109 */
110static struct at91_udc_data __initdata pcontrol_g20_udc_data = {
111 .vbus_pin = AT91_PIN_PA22, /* Detect +5V bus voltage */
112 .pullup_pin = AT91_PIN_PA4, /* K-state, active low */
113};
114
115
116/*
117 * MACB Ethernet device
118 */
119static struct macb_platform_data __initdata macb_data = {
120 .phy_irq_pin = AT91_PIN_PA28,
121 .is_rmii = 1,
122};
123
124
125/*
126 * I2C devices: eeprom and phy/switch
127 */
128static struct i2c_board_info __initdata pcontrol_g20_i2c_devices[] = {
129{ /* D7 address width=2, 8KiB */
130 I2C_BOARD_INFO("24c64", 0x50)
131}, { /* D8 address width=1, 1 byte has 32 bits! */
132 I2C_BOARD_INFO("lan9303", 0x0a)
133}, };
134
135
136/*
137 * LEDs
138 */
139static struct gpio_led pcontrol_g20_leds[] = {
140 {
141 .name = "LED1", /* red H5 */
142 .gpio = AT91_PIN_PB18,
143 .active_low = 1,
144 .default_trigger = "none", /* supervisor */
145 }, {
146 .name = "LED2", /* yellow H7 */
147 .gpio = AT91_PIN_PB19,
148 .active_low = 1,
149 .default_trigger = "mmc0", /* SD-card activity */
150 }, {
151 .name = "LED3", /* green H2 */
152 .gpio = AT91_PIN_PB20,
153 .active_low = 1,
154 .default_trigger = "heartbeat", /* blinky */
155 }, {
156 .name = "LED4", /* red H3 */
157 .gpio = AT91_PIN_PC6,
158 .active_low = 1,
159 .default_trigger = "none", /* connection lost */
160 }, {
161 .name = "LED5", /* yellow H6 */
162 .gpio = AT91_PIN_PC7,
163 .active_low = 1,
164 .default_trigger = "none", /* unsent data */
165 }, {
166 .name = "LED6", /* green H1 */
167 .gpio = AT91_PIN_PC9,
168 .active_low = 1,
169 .default_trigger = "none", /* snafu */
170 }
171};
172
173
174/*
175 * SPI devices
176 */
177static struct spi_board_info pcontrol_g20_spi_devices[] = {
178 {
179 .modalias = "spidev", /* HMI port X4 */
180 .chip_select = 1,
181 .max_speed_hz = 50 * 1000 * 1000,
182 .bus_num = 0,
183 }, {
184 .modalias = "spidev", /* piggyback A2 */
185 .chip_select = 0,
186 .max_speed_hz = 50 * 1000 * 1000,
187 .bus_num = 1,
188 },
189};
190
191
192static void __init pcontrol_g20_board_init(void)
193{
194 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
195 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
196 | ATMEL_UART_RTS);
197
198 /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */
199 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
200 | ATMEL_UART_RTS);
201
202 /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
203 at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
204 stamp9g20_board_init();
205 at91_add_device_usbh(&usbh_data);
206 at91_add_device_eth(&macb_data);
207 at91_add_device_i2c(pcontrol_g20_i2c_devices,
208 ARRAY_SIZE(pcontrol_g20_i2c_devices));
209 add_device_pcontrol();
210 at91_add_device_spi(pcontrol_g20_spi_devices,
211 ARRAY_SIZE(pcontrol_g20_spi_devices));
212 at91_add_device_udc(&pcontrol_g20_udc_data);
213 at91_gpio_leds(pcontrol_g20_leds,
214 ARRAY_SIZE(pcontrol_g20_leds));
215 /* piggyback A2 */
216 at91_set_gpio_output(AT91_PIN_PB31, 1);
217}
218
219
220MACHINE_START(PCONTROL_G20, "PControl G20")
221 /* Maintainer: pgsellmann@portner-elektronik.at */
222 .init_time = at91_init_time,
223 .map_io = at91_map_io,
224 .handle_irq = at91_aic_handle_irq,
225 .init_early = pcontrol_g20_init_early,
226 .init_irq = at91_init_irq_default,
227 .init_machine = pcontrol_g20_board_init,
228MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
deleted file mode 100644
index c2166e3a236c..000000000000
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ /dev/null
@@ -1,230 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-sam9-l9260.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 * Copyright (C) 2007 Olimex Ltd
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/types.h>
24#include <linux/gpio.h>
25#include <linux/init.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/platform_device.h>
29#include <linux/spi/spi.h>
30
31#include <mach/hardware.h>
32#include <asm/setup.h>
33#include <asm/mach-types.h>
34#include <asm/irq.h>
35
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38#include <asm/mach/irq.h>
39
40#include <mach/at91sam9_smc.h>
41
42#include "at91_aic.h"
43#include "board.h"
44#include "sam9_smc.h"
45#include "generic.h"
46#include "gpio.h"
47
48
49static void __init ek_init_early(void)
50{
51 /* Initialize processor: 18.432 MHz crystal */
52 at91_initialize(18432000);
53}
54
55/*
56 * USB Host port
57 */
58static struct at91_usbh_data __initdata ek_usbh_data = {
59 .ports = 2,
60 .vbus_pin = {-EINVAL, -EINVAL},
61 .overcurrent_pin= {-EINVAL, -EINVAL},
62};
63
64/*
65 * USB Device port
66 */
67static struct at91_udc_data __initdata ek_udc_data = {
68 .vbus_pin = AT91_PIN_PC5,
69 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
70};
71
72
73/*
74 * SPI devices.
75 */
76static struct spi_board_info ek_spi_devices[] = {
77#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
78 { /* DataFlash chip */
79 .modalias = "mtd_dataflash",
80 .chip_select = 1,
81 .max_speed_hz = 15 * 1000 * 1000,
82 .bus_num = 0,
83 },
84#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
85 { /* DataFlash card */
86 .modalias = "mtd_dataflash",
87 .chip_select = 0,
88 .max_speed_hz = 15 * 1000 * 1000,
89 .bus_num = 0,
90 },
91#endif
92#endif
93};
94
95
96/*
97 * MACB Ethernet device
98 */
99static struct macb_platform_data __initdata ek_macb_data = {
100 .phy_irq_pin = AT91_PIN_PA7,
101 .is_rmii = 0,
102};
103
104
105/*
106 * NAND flash
107 */
108static struct mtd_partition __initdata ek_nand_partition[] = {
109 {
110 .name = "Bootloader Area",
111 .offset = 0,
112 .size = 10 * SZ_1M,
113 },
114 {
115 .name = "User Area",
116 .offset = MTDPART_OFS_NXTBLK,
117 .size = MTDPART_SIZ_FULL,
118 },
119};
120
121static struct atmel_nand_data __initdata ek_nand_data = {
122 .ale = 21,
123 .cle = 22,
124 .det_pin = -EINVAL,
125 .rdy_pin = AT91_PIN_PC13,
126 .enable_pin = AT91_PIN_PC14,
127 .ecc_mode = NAND_ECC_SOFT,
128 .parts = ek_nand_partition,
129 .num_parts = ARRAY_SIZE(ek_nand_partition),
130};
131
132static struct sam9_smc_config __initdata ek_nand_smc_config = {
133 .ncs_read_setup = 0,
134 .nrd_setup = 1,
135 .ncs_write_setup = 0,
136 .nwe_setup = 1,
137
138 .ncs_read_pulse = 3,
139 .nrd_pulse = 3,
140 .ncs_write_pulse = 3,
141 .nwe_pulse = 3,
142
143 .read_cycle = 5,
144 .write_cycle = 5,
145
146 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
147 .tdf_cycles = 2,
148};
149
150static void __init ek_add_device_nand(void)
151{
152 /* configure chip-select 3 (NAND) */
153 sam9_smc_configure(0, 3, &ek_nand_smc_config);
154
155 at91_add_device_nand(&ek_nand_data);
156}
157
158
159/*
160 * MCI (SD/MMC)
161 */
162static struct mci_platform_data __initdata ek_mci0_data = {
163 .slot[1] = {
164 .bus_width = 4,
165 .detect_pin = AT91_PIN_PC8,
166 .wp_pin = AT91_PIN_PC4,
167 },
168};
169
170/*
171 * LEDs
172 */
173static struct gpio_led ek_leds[] = {
174 { /* D1 */
175 .name = "led1",
176 .gpio = AT91_PIN_PA9,
177 .active_low = 1,
178 .default_trigger = "heartbeat",
179 },
180 { /* D2 */
181 .name = "led2",
182 .gpio = AT91_PIN_PA6,
183 .active_low = 1,
184 .default_trigger = "timer",
185 }
186};
187
188static void __init ek_board_init(void)
189{
190 at91_register_devices();
191
192 /* Serial */
193 /* DBGU on ttyS0. (Rx & Tx only) */
194 at91_register_uart(0, 0, 0);
195
196 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
197 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
198 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
199 | ATMEL_UART_RI);
200
201 /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
202 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
203 at91_add_device_serial();
204 /* USB Host */
205 at91_add_device_usbh(&ek_usbh_data);
206 /* USB Device */
207 at91_add_device_udc(&ek_udc_data);
208 /* SPI */
209 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
210 /* NAND */
211 ek_add_device_nand();
212 /* Ethernet */
213 at91_add_device_eth(&ek_macb_data);
214 /* MMC */
215 at91_add_device_mci(0, &ek_mci0_data);
216 /* I2C */
217 at91_add_device_i2c(NULL, 0);
218 /* LEDs */
219 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
220}
221
222MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
223 /* Maintainer: Olimex */
224 .init_time = at91_init_time,
225 .map_io = at91_map_io,
226 .handle_irq = at91_aic_handle_irq,
227 .init_early = ek_init_early,
228 .init_irq = at91_init_irq_default,
229 .init_machine = ek_board_init,
230MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
deleted file mode 100644
index bf8a946b4cd0..000000000000
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ /dev/null
@@ -1,354 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-sam9260ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/gpio.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/spi/at73c213.h>
30#include <linux/clk.h>
31#include <linux/platform_data/at24.h>
32#include <linux/gpio_keys.h>
33#include <linux/input.h>
34
35#include <asm/setup.h>
36#include <asm/mach-types.h>
37#include <asm/irq.h>
38
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/irq.h>
42
43#include <mach/hardware.h>
44#include <mach/at91sam9_smc.h>
45#include <mach/system_rev.h>
46
47#include "at91_aic.h"
48#include "board.h"
49#include "sam9_smc.h"
50#include "generic.h"
51#include "gpio.h"
52
53
54static void __init ek_init_early(void)
55{
56 /* Initialize processor: 18.432 MHz crystal */
57 at91_initialize(18432000);
58}
59
60/*
61 * USB Host port
62 */
63static struct at91_usbh_data __initdata ek_usbh_data = {
64 .ports = 2,
65 .vbus_pin = {-EINVAL, -EINVAL},
66 .overcurrent_pin= {-EINVAL, -EINVAL},
67};
68
69/*
70 * USB Device port
71 */
72static struct at91_udc_data __initdata ek_udc_data = {
73 .vbus_pin = AT91_PIN_PC5,
74 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
75};
76
77
78/*
79 * Audio
80 */
81static struct at73c213_board_info at73c213_data = {
82 .ssc_id = 0,
83 .shortname = "AT91SAM9260-EK external DAC",
84};
85
86#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
87static void __init at73c213_set_clk(struct at73c213_board_info *info)
88{
89 struct clk *pck0;
90 struct clk *plla;
91
92 pck0 = clk_get(NULL, "pck0");
93 plla = clk_get(NULL, "plla");
94
95 /* AT73C213 MCK Clock */
96 at91_set_B_periph(AT91_PIN_PC1, 0); /* PCK0 */
97
98 clk_set_parent(pck0, plla);
99 clk_put(plla);
100
101 info->dac_clk = pck0;
102}
103#else
104static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
105#endif
106
107/*
108 * SPI devices.
109 */
110static struct spi_board_info ek_spi_devices[] = {
111#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
112 { /* DataFlash chip */
113 .modalias = "mtd_dataflash",
114 .chip_select = 1,
115 .max_speed_hz = 15 * 1000 * 1000,
116 .bus_num = 0,
117 },
118#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
119 { /* DataFlash card */
120 .modalias = "mtd_dataflash",
121 .chip_select = 0,
122 .max_speed_hz = 15 * 1000 * 1000,
123 .bus_num = 0,
124 },
125#endif
126#endif
127#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
128 { /* AT73C213 DAC */
129 .modalias = "at73c213",
130 .chip_select = 0,
131 .max_speed_hz = 10 * 1000 * 1000,
132 .bus_num = 1,
133 .mode = SPI_MODE_1,
134 .platform_data = &at73c213_data,
135 },
136#endif
137};
138
139
140/*
141 * MACB Ethernet device
142 */
143static struct macb_platform_data __initdata ek_macb_data = {
144 .phy_irq_pin = AT91_PIN_PA7,
145 .is_rmii = 1,
146};
147
148
149/*
150 * NAND flash
151 */
152static struct mtd_partition __initdata ek_nand_partition[] = {
153 {
154 .name = "Partition 1",
155 .offset = 0,
156 .size = SZ_256K,
157 },
158 {
159 .name = "Partition 2",
160 .offset = MTDPART_OFS_NXTBLK,
161 .size = MTDPART_SIZ_FULL,
162 },
163};
164
165static struct atmel_nand_data __initdata ek_nand_data = {
166 .ale = 21,
167 .cle = 22,
168 .det_pin = -EINVAL,
169 .rdy_pin = AT91_PIN_PC13,
170 .enable_pin = AT91_PIN_PC14,
171 .ecc_mode = NAND_ECC_SOFT,
172 .on_flash_bbt = 1,
173 .parts = ek_nand_partition,
174 .num_parts = ARRAY_SIZE(ek_nand_partition),
175};
176
177static struct sam9_smc_config __initdata ek_nand_smc_config = {
178 .ncs_read_setup = 0,
179 .nrd_setup = 1,
180 .ncs_write_setup = 0,
181 .nwe_setup = 1,
182
183 .ncs_read_pulse = 3,
184 .nrd_pulse = 3,
185 .ncs_write_pulse = 3,
186 .nwe_pulse = 3,
187
188 .read_cycle = 5,
189 .write_cycle = 5,
190
191 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
192 .tdf_cycles = 2,
193};
194
195static void __init ek_add_device_nand(void)
196{
197 ek_nand_data.bus_width_16 = board_have_nand_16bit();
198 /* setup bus-width (8 or 16) */
199 if (ek_nand_data.bus_width_16)
200 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
201 else
202 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
203
204 /* configure chip-select 3 (NAND) */
205 sam9_smc_configure(0, 3, &ek_nand_smc_config);
206
207 at91_add_device_nand(&ek_nand_data);
208}
209
210
211/*
212 * MCI (SD/MMC)
213 */
214static struct mci_platform_data __initdata ek_mci0_data = {
215 .slot[1] = {
216 .bus_width = 4,
217 .detect_pin = -EINVAL,
218 .wp_pin = -EINVAL,
219 },
220};
221
222
223/*
224 * LEDs
225 */
226static struct gpio_led ek_leds[] = {
227 { /* "bottom" led, green, userled1 to be defined */
228 .name = "ds5",
229 .gpio = AT91_PIN_PA6,
230 .active_low = 1,
231 .default_trigger = "none",
232 },
233 { /* "power" led, yellow */
234 .name = "ds1",
235 .gpio = AT91_PIN_PA9,
236 .default_trigger = "heartbeat",
237 }
238};
239
240/*
241 * I2C devices
242 */
243static struct at24_platform_data at24c512 = {
244 .byte_len = SZ_512K / 8,
245 .page_size = 128,
246 .flags = AT24_FLAG_ADDR16,
247};
248
249static struct i2c_board_info __initdata ek_i2c_devices[] = {
250 {
251 I2C_BOARD_INFO("24c512", 0x50),
252 .platform_data = &at24c512,
253 },
254 /* more devices can be added using expansion connectors */
255};
256
257
258/*
259 * GPIO Buttons
260 */
261#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
262static struct gpio_keys_button ek_buttons[] = {
263 {
264 .gpio = AT91_PIN_PA30,
265 .code = BTN_3,
266 .desc = "Button 3",
267 .active_low = 1,
268 .wakeup = 1,
269 },
270 {
271 .gpio = AT91_PIN_PA31,
272 .code = BTN_4,
273 .desc = "Button 4",
274 .active_low = 1,
275 .wakeup = 1,
276 }
277};
278
279static struct gpio_keys_platform_data ek_button_data = {
280 .buttons = ek_buttons,
281 .nbuttons = ARRAY_SIZE(ek_buttons),
282};
283
284static struct platform_device ek_button_device = {
285 .name = "gpio-keys",
286 .id = -1,
287 .num_resources = 0,
288 .dev = {
289 .platform_data = &ek_button_data,
290 }
291};
292
293static void __init ek_add_device_buttons(void)
294{
295 at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
296 at91_set_deglitch(AT91_PIN_PA30, 1);
297 at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
298 at91_set_deglitch(AT91_PIN_PA31, 1);
299
300 platform_device_register(&ek_button_device);
301}
302#else
303static void __init ek_add_device_buttons(void) {}
304#endif
305
306
307static void __init ek_board_init(void)
308{
309 at91_register_devices();
310
311 /* Serial */
312 /* DBGU on ttyS0. (Rx & Tx only) */
313 at91_register_uart(0, 0, 0);
314
315 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
316 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
317 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
318 | ATMEL_UART_RI);
319
320 /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
321 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
322 at91_add_device_serial();
323 /* USB Host */
324 at91_add_device_usbh(&ek_usbh_data);
325 /* USB Device */
326 at91_add_device_udc(&ek_udc_data);
327 /* SPI */
328 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
329 /* NAND */
330 ek_add_device_nand();
331 /* Ethernet */
332 at91_add_device_eth(&ek_macb_data);
333 /* MMC */
334 at91_add_device_mci(0, &ek_mci0_data);
335 /* I2C */
336 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
337 /* SSC (to AT73C213) */
338 at73c213_set_clk(&at73c213_data);
339 at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
340 /* LEDs */
341 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
342 /* Push Buttons */
343 ek_add_device_buttons();
344}
345
346MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
347 /* Maintainer: Atmel */
348 .init_time = at91_init_time,
349 .map_io = at91_map_io,
350 .handle_irq = at91_aic_handle_irq,
351 .init_early = ek_init_early,
352 .init_irq = at91_init_irq_default,
353 .init_machine = ek_board_init,
354MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
deleted file mode 100644
index e85ada820bfb..000000000000
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ /dev/null
@@ -1,623 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-sam9261ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/gpio.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h>
30#include <linux/spi/at73c213.h>
31#include <linux/clk.h>
32#include <linux/dm9000.h>
33#include <linux/fb.h>
34#include <linux/gpio_keys.h>
35#include <linux/input.h>
36
37#include <video/atmel_lcdc.h>
38
39#include <asm/setup.h>
40#include <asm/mach-types.h>
41#include <asm/irq.h>
42
43#include <asm/mach/arch.h>
44#include <asm/mach/map.h>
45#include <asm/mach/irq.h>
46
47#include <mach/hardware.h>
48#include <mach/at91sam9_smc.h>
49#include <mach/system_rev.h>
50
51#include "at91_aic.h"
52#include "board.h"
53#include "sam9_smc.h"
54#include "generic.h"
55#include "gpio.h"
56
57
58static void __init ek_init_early(void)
59{
60 /* Initialize processor: 18.432 MHz crystal */
61 at91_initialize(18432000);
62}
63
64/*
65 * DM9000 ethernet device
66 */
67#if defined(CONFIG_DM9000)
68static struct resource dm9000_resource[] = {
69 [0] = {
70 .start = AT91_CHIPSELECT_2,
71 .end = AT91_CHIPSELECT_2 + 3,
72 .flags = IORESOURCE_MEM
73 },
74 [1] = {
75 .start = AT91_CHIPSELECT_2 + 0x44,
76 .end = AT91_CHIPSELECT_2 + 0xFF,
77 .flags = IORESOURCE_MEM
78 },
79 [2] = {
80 .flags = IORESOURCE_IRQ
81 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
82 }
83};
84
85static struct dm9000_plat_data dm9000_platdata = {
86 .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM,
87};
88
89static struct platform_device dm9000_device = {
90 .name = "dm9000",
91 .id = 0,
92 .num_resources = ARRAY_SIZE(dm9000_resource),
93 .resource = dm9000_resource,
94 .dev = {
95 .platform_data = &dm9000_platdata,
96 }
97};
98
99/*
100 * SMC timings for the DM9000.
101 * Note: These timings were calculated for MASTER_CLOCK = 100000000 according to the DM9000 timings.
102 */
103static struct sam9_smc_config __initdata dm9000_smc_config = {
104 .ncs_read_setup = 0,
105 .nrd_setup = 2,
106 .ncs_write_setup = 0,
107 .nwe_setup = 2,
108
109 .ncs_read_pulse = 8,
110 .nrd_pulse = 4,
111 .ncs_write_pulse = 8,
112 .nwe_pulse = 4,
113
114 .read_cycle = 16,
115 .write_cycle = 16,
116
117 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
118 .tdf_cycles = 1,
119};
120
121static void __init ek_add_device_dm9000(void)
122{
123 struct resource *r = &dm9000_resource[2];
124
125 /* Configure chip-select 2 (DM9000) */
126 sam9_smc_configure(0, 2, &dm9000_smc_config);
127
128 /* Configure Reset signal as output */
129 at91_set_gpio_output(AT91_PIN_PC10, 0);
130
131 /* Configure Interrupt pin as input, no pull-up */
132 at91_set_gpio_input(AT91_PIN_PC11, 0);
133
134 r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
135 platform_device_register(&dm9000_device);
136}
137#else
138static void __init ek_add_device_dm9000(void) {}
139#endif /* CONFIG_DM9000 */
140
141
142/*
143 * USB Host Port
144 */
145static struct at91_usbh_data __initdata ek_usbh_data = {
146 .ports = 2,
147 .vbus_pin = {-EINVAL, -EINVAL},
148 .overcurrent_pin= {-EINVAL, -EINVAL},
149};
150
151
152/*
153 * USB Device Port
154 */
155static struct at91_udc_data __initdata ek_udc_data = {
156 .vbus_pin = AT91_PIN_PB29,
157 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
158};
159
160
161/*
162 * NAND flash
163 */
164static struct mtd_partition __initdata ek_nand_partition[] = {
165 {
166 .name = "Partition 1",
167 .offset = 0,
168 .size = SZ_256K,
169 },
170 {
171 .name = "Partition 2",
172 .offset = MTDPART_OFS_NXTBLK,
173 .size = MTDPART_SIZ_FULL,
174 },
175};
176
177static struct atmel_nand_data __initdata ek_nand_data = {
178 .ale = 22,
179 .cle = 21,
180 .det_pin = -EINVAL,
181 .rdy_pin = AT91_PIN_PC15,
182 .enable_pin = AT91_PIN_PC14,
183 .ecc_mode = NAND_ECC_SOFT,
184 .on_flash_bbt = 1,
185 .parts = ek_nand_partition,
186 .num_parts = ARRAY_SIZE(ek_nand_partition),
187};
188
189static struct sam9_smc_config __initdata ek_nand_smc_config = {
190 .ncs_read_setup = 0,
191 .nrd_setup = 1,
192 .ncs_write_setup = 0,
193 .nwe_setup = 1,
194
195 .ncs_read_pulse = 3,
196 .nrd_pulse = 3,
197 .ncs_write_pulse = 3,
198 .nwe_pulse = 3,
199
200 .read_cycle = 5,
201 .write_cycle = 5,
202
203 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
204 .tdf_cycles = 2,
205};
206
207static void __init ek_add_device_nand(void)
208{
209 ek_nand_data.bus_width_16 = board_have_nand_16bit();
210 /* setup bus-width (8 or 16) */
211 if (ek_nand_data.bus_width_16)
212 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
213 else
214 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
215
216 /* configure chip-select 3 (NAND) */
217 sam9_smc_configure(0, 3, &ek_nand_smc_config);
218
219 at91_add_device_nand(&ek_nand_data);
220}
221
222/*
223 * SPI related devices
224 */
225#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
226
227/*
228 * ADS7846 Touchscreen
229 */
230#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
231
232static int ads7843_pendown_state(void)
233{
234 return !at91_get_gpio_value(AT91_PIN_PC2); /* Touchscreen PENIRQ */
235}
236
237static struct ads7846_platform_data ads_info = {
238 .model = 7843,
239 .x_min = 150,
240 .x_max = 3830,
241 .y_min = 190,
242 .y_max = 3830,
243 .vref_delay_usecs = 100,
244 .x_plate_ohms = 450,
245 .y_plate_ohms = 250,
246 .pressure_max = 15000,
247 .debounce_max = 1,
248 .debounce_rep = 0,
249 .debounce_tol = (~0),
250 .get_pendown_state = ads7843_pendown_state,
251};
252
253static void __init ek_add_device_ts(void)
254{
255 at91_set_B_periph(AT91_PIN_PC2, 1); /* External IRQ0, with pullup */
256 at91_set_gpio_input(AT91_PIN_PA11, 1); /* Touchscreen BUSY signal */
257}
258#else
259static void __init ek_add_device_ts(void) {}
260#endif
261
262/*
263 * Audio
264 */
265static struct at73c213_board_info at73c213_data = {
266 .ssc_id = 1,
267 .shortname = "AT91SAM9261/9G10-EK external DAC",
268};
269
270#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
271static void __init at73c213_set_clk(struct at73c213_board_info *info)
272{
273 struct clk *pck2;
274 struct clk *plla;
275
276 pck2 = clk_get(NULL, "pck2");
277 plla = clk_get(NULL, "plla");
278
279 /* AT73C213 MCK Clock */
280 at91_set_B_periph(AT91_PIN_PB31, 0); /* PCK2 */
281
282 clk_set_parent(pck2, plla);
283 clk_put(plla);
284
285 info->dac_clk = pck2;
286}
287#else
288static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
289#endif
290
291/*
292 * SPI devices
293 */
294static struct spi_board_info ek_spi_devices[] = {
295 { /* DataFlash chip */
296 .modalias = "mtd_dataflash",
297 .chip_select = 0,
298 .max_speed_hz = 15 * 1000 * 1000,
299 .bus_num = 0,
300 },
301#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
302 {
303 .modalias = "ads7846",
304 .chip_select = 2,
305 .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
306 .bus_num = 0,
307 .platform_data = &ads_info,
308 .irq = NR_IRQS_LEGACY + AT91SAM9261_ID_IRQ0,
309 .controller_data = (void *) AT91_PIN_PA28, /* CS pin */
310 },
311#endif
312#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
313 { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
314 .modalias = "mtd_dataflash",
315 .chip_select = 3,
316 .max_speed_hz = 15 * 1000 * 1000,
317 .bus_num = 0,
318 },
319#elif defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
320 { /* AT73C213 DAC */
321 .modalias = "at73c213",
322 .chip_select = 3,
323 .max_speed_hz = 10 * 1000 * 1000,
324 .bus_num = 0,
325 .mode = SPI_MODE_1,
326 .platform_data = &at73c213_data,
327 .controller_data = (void*) AT91_PIN_PA29, /* default for CS3 is PA6, but it must be PA29 */
328 },
329#endif
330};
331
332#else /* CONFIG_SPI_ATMEL_* */
333/* spi0 and mmc/sd share the same PIO pins: cannot be used at the same time */
334
335/*
336 * MCI (SD/MMC)
337 * det_pin, wp_pin and vcc_pin are not connected
338 */
339static struct mci_platform_data __initdata mci0_data = {
340 .slot[0] = {
341 .bus_width = 4,
342 .detect_pin = -EINVAL,
343 .wp_pin = -EINVAL,
344 },
345};
346
347#endif /* CONFIG_SPI_ATMEL_* */
348
349
350/*
351 * LCD Controller
352 */
353#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
354
355#if defined(CONFIG_FB_ATMEL_STN)
356
357/* STN */
358static struct fb_videomode at91_stn_modes[] = {
359 {
360 .name = "SP06Q002 @ 75",
361 .refresh = 75,
362 .xres = 320, .yres = 240,
363 .pixclock = KHZ2PICOS(1440),
364
365 .left_margin = 1, .right_margin = 1,
366 .upper_margin = 0, .lower_margin = 0,
367 .hsync_len = 1, .vsync_len = 1,
368
369 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
370 .vmode = FB_VMODE_NONINTERLACED,
371 },
372};
373
374static struct fb_monspecs at91fb_default_stn_monspecs = {
375 .manufacturer = "HIT",
376 .monitor = "SP06Q002",
377
378 .modedb = at91_stn_modes,
379 .modedb_len = ARRAY_SIZE(at91_stn_modes),
380 .hfmin = 15000,
381 .hfmax = 64000,
382 .vfmin = 50,
383 .vfmax = 150,
384};
385
386#define AT91SAM9261_DEFAULT_STN_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
387 | ATMEL_LCDC_DISTYPE_STNMONO \
388 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE \
389 | ATMEL_LCDC_IFWIDTH_4 \
390 | ATMEL_LCDC_SCANMOD_SINGLE)
391
392static void at91_lcdc_stn_power_control(struct atmel_lcdfb_pdata *pdata, int on)
393{
394 /* backlight */
395 if (on) { /* power up */
396 at91_set_gpio_value(AT91_PIN_PC14, 0);
397 at91_set_gpio_value(AT91_PIN_PC15, 0);
398 } else { /* power down */
399 at91_set_gpio_value(AT91_PIN_PC14, 1);
400 at91_set_gpio_value(AT91_PIN_PC15, 1);
401 }
402}
403
404static struct atmel_lcdfb_pdata __initdata ek_lcdc_data = {
405 .default_bpp = 1,
406 .default_dmacon = ATMEL_LCDC_DMAEN,
407 .default_lcdcon2 = AT91SAM9261_DEFAULT_STN_LCDCON2,
408 .default_monspecs = &at91fb_default_stn_monspecs,
409 .atmel_lcdfb_power_control = at91_lcdc_stn_power_control,
410 .guard_time = 1,
411};
412
413#else
414
415/* TFT */
416static struct fb_videomode at91_tft_vga_modes[] = {
417 {
418 .name = "TX09D50VM1CCA @ 60",
419 .refresh = 60,
420 .xres = 240, .yres = 320,
421 .pixclock = KHZ2PICOS(4965),
422
423 .left_margin = 1, .right_margin = 33,
424 .upper_margin = 1, .lower_margin = 0,
425 .hsync_len = 5, .vsync_len = 1,
426
427 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
428 .vmode = FB_VMODE_NONINTERLACED,
429 },
430};
431
432static struct fb_monspecs at91fb_default_tft_monspecs = {
433 .manufacturer = "HIT",
434 .monitor = "TX09D50VM1CCA",
435
436 .modedb = at91_tft_vga_modes,
437 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
438 .hfmin = 15000,
439 .hfmax = 64000,
440 .vfmin = 50,
441 .vfmax = 150,
442};
443
444#define AT91SAM9261_DEFAULT_TFT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
445 | ATMEL_LCDC_DISTYPE_TFT \
446 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
447
448static void at91_lcdc_tft_power_control(struct atmel_lcdfb_pdata *pdata, int on)
449{
450 if (on)
451 at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */
452 else
453 at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */
454}
455
456static struct atmel_lcdfb_pdata __initdata ek_lcdc_data = {
457 .lcdcon_is_backlight = true,
458 .default_bpp = 16,
459 .default_dmacon = ATMEL_LCDC_DMAEN,
460 .default_lcdcon2 = AT91SAM9261_DEFAULT_TFT_LCDCON2,
461 .default_monspecs = &at91fb_default_tft_monspecs,
462 .atmel_lcdfb_power_control = at91_lcdc_tft_power_control,
463 .guard_time = 1,
464};
465#endif
466
467#else
468static struct atmel_lcdfb_pdata __initdata ek_lcdc_data;
469#endif
470
471
472/*
473 * GPIO Buttons
474 */
475#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
476static struct gpio_keys_button ek_buttons[] = {
477 {
478 .gpio = AT91_PIN_PA27,
479 .code = BTN_0,
480 .desc = "Button 0",
481 .active_low = 1,
482 .wakeup = 1,
483 },
484 {
485 .gpio = AT91_PIN_PA26,
486 .code = BTN_1,
487 .desc = "Button 1",
488 .active_low = 1,
489 .wakeup = 1,
490 },
491 {
492 .gpio = AT91_PIN_PA25,
493 .code = BTN_2,
494 .desc = "Button 2",
495 .active_low = 1,
496 .wakeup = 1,
497 },
498 {
499 .gpio = AT91_PIN_PA24,
500 .code = BTN_3,
501 .desc = "Button 3",
502 .active_low = 1,
503 .wakeup = 1,
504 }
505};
506
507static struct gpio_keys_platform_data ek_button_data = {
508 .buttons = ek_buttons,
509 .nbuttons = ARRAY_SIZE(ek_buttons),
510};
511
512static struct platform_device ek_button_device = {
513 .name = "gpio-keys",
514 .id = -1,
515 .num_resources = 0,
516 .dev = {
517 .platform_data = &ek_button_data,
518 }
519};
520
521static void __init ek_add_device_buttons(void)
522{
523 at91_set_gpio_input(AT91_PIN_PA27, 1); /* btn0 */
524 at91_set_deglitch(AT91_PIN_PA27, 1);
525 at91_set_gpio_input(AT91_PIN_PA26, 1); /* btn1 */
526 at91_set_deglitch(AT91_PIN_PA26, 1);
527 at91_set_gpio_input(AT91_PIN_PA25, 1); /* btn2 */
528 at91_set_deglitch(AT91_PIN_PA25, 1);
529 at91_set_gpio_input(AT91_PIN_PA24, 1); /* btn3 */
530 at91_set_deglitch(AT91_PIN_PA24, 1);
531
532 platform_device_register(&ek_button_device);
533}
534#else
535static void __init ek_add_device_buttons(void) {}
536#endif
537
538/*
539 * LEDs
540 */
541static struct gpio_led ek_leds[] = {
542 { /* "bottom" led, green, userled1 to be defined */
543 .name = "ds7",
544 .gpio = AT91_PIN_PA14,
545 .active_low = 1,
546 .default_trigger = "none",
547 },
548 { /* "top" led, green, userled2 to be defined */
549 .name = "ds8",
550 .gpio = AT91_PIN_PA13,
551 .active_low = 1,
552 .default_trigger = "none",
553 },
554 { /* "power" led, yellow */
555 .name = "ds1",
556 .gpio = AT91_PIN_PA23,
557 .default_trigger = "heartbeat",
558 }
559};
560
561static void __init ek_board_init(void)
562{
563 at91_register_devices();
564
565 /* Serial */
566 /* DBGU on ttyS0. (Rx & Tx only) */
567 at91_register_uart(0, 0, 0);
568 at91_add_device_serial();
569
570 if (cpu_is_at91sam9g10())
571 ek_lcdc_data.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB;
572
573 /* USB Host */
574 at91_add_device_usbh(&ek_usbh_data);
575 /* USB Device */
576 at91_add_device_udc(&ek_udc_data);
577 /* I2C */
578 at91_add_device_i2c(NULL, 0);
579 /* NAND */
580 ek_add_device_nand();
581 /* DM9000 ethernet */
582 ek_add_device_dm9000();
583
584 /* spi0 and mmc/sd share the same PIO pins */
585#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
586 /* SPI */
587 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
588 /* Touchscreen */
589 ek_add_device_ts();
590 /* SSC (to AT73C213) */
591 at73c213_set_clk(&at73c213_data);
592 at91_add_device_ssc(AT91SAM9261_ID_SSC1, ATMEL_SSC_TX);
593#else
594 /* MMC */
595 at91_add_device_mci(0, &mci0_data);
596#endif
597 /* LCD Controller */
598 at91_add_device_lcdc(&ek_lcdc_data);
599 /* Push Buttons */
600 ek_add_device_buttons();
601 /* LEDs */
602 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
603}
604
605MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
606 /* Maintainer: Atmel */
607 .init_time = at91_init_time,
608 .map_io = at91_map_io,
609 .handle_irq = at91_aic_handle_irq,
610 .init_early = ek_init_early,
611 .init_irq = at91_init_irq_default,
612 .init_machine = ek_board_init,
613MACHINE_END
614
615MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
616 /* Maintainer: Atmel */
617 .init_time = at91_init_time,
618 .map_io = at91_map_io,
619 .handle_irq = at91_aic_handle_irq,
620 .init_early = ek_init_early,
621 .init_irq = at91_init_irq_default,
622 .init_machine = ek_board_init,
623MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
deleted file mode 100644
index d76680f2a209..000000000000
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ /dev/null
@@ -1,493 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-sam9263ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/gpio.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h>
30#include <linux/platform_data/at24.h>
31#include <linux/fb.h>
32#include <linux/gpio_keys.h>
33#include <linux/input.h>
34#include <linux/leds.h>
35#include <linux/pwm.h>
36#include <linux/leds_pwm.h>
37
38#include <video/atmel_lcdc.h>
39
40#include <asm/setup.h>
41#include <asm/mach-types.h>
42#include <asm/irq.h>
43
44#include <asm/mach/arch.h>
45#include <asm/mach/map.h>
46#include <asm/mach/irq.h>
47
48#include <mach/hardware.h>
49#include <mach/at91sam9_smc.h>
50#include <mach/system_rev.h>
51
52#include "at91_aic.h"
53#include "board.h"
54#include "sam9_smc.h"
55#include "generic.h"
56#include "gpio.h"
57
58
59static void __init ek_init_early(void)
60{
61 /* Initialize processor: 16.367 MHz crystal */
62 at91_initialize(16367660);
63}
64
65/*
66 * USB Host port
67 */
68static struct at91_usbh_data __initdata ek_usbh_data = {
69 .ports = 2,
70 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
71 .vbus_pin_active_low = {1, 1},
72 .overcurrent_pin= {-EINVAL, -EINVAL},
73};
74
75/*
76 * USB Device port
77 */
78static struct at91_udc_data __initdata ek_udc_data = {
79 .vbus_pin = AT91_PIN_PA25,
80 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
81};
82
83
84/*
85 * ADS7846 Touchscreen
86 */
87#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
88static int ads7843_pendown_state(void)
89{
90 return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */
91}
92
93static struct ads7846_platform_data ads_info = {
94 .model = 7843,
95 .x_min = 150,
96 .x_max = 3830,
97 .y_min = 190,
98 .y_max = 3830,
99 .vref_delay_usecs = 100,
100 .x_plate_ohms = 450,
101 .y_plate_ohms = 250,
102 .pressure_max = 15000,
103 .debounce_max = 1,
104 .debounce_rep = 0,
105 .debounce_tol = (~0),
106 .get_pendown_state = ads7843_pendown_state,
107};
108
109static void __init ek_add_device_ts(void)
110{
111 at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */
112 at91_set_gpio_input(AT91_PIN_PA31, 1); /* Touchscreen BUSY signal */
113}
114#else
115static void __init ek_add_device_ts(void) {}
116#endif
117
118/*
119 * SPI devices.
120 */
121static struct spi_board_info ek_spi_devices[] = {
122#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
123 { /* DataFlash card */
124 .modalias = "mtd_dataflash",
125 .chip_select = 0,
126 .max_speed_hz = 15 * 1000 * 1000,
127 .bus_num = 0,
128 },
129#endif
130#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
131 {
132 .modalias = "ads7846",
133 .chip_select = 3,
134 .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
135 .bus_num = 0,
136 .platform_data = &ads_info,
137 .irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
138 },
139#endif
140};
141
142
143/*
144 * MCI (SD/MMC)
145 */
146static struct mci_platform_data __initdata mci1_data = {
147 .slot[0] = {
148 .bus_width = 4,
149 .detect_pin = AT91_PIN_PE18,
150 .wp_pin = AT91_PIN_PE19,
151 },
152};
153
154
155/*
156 * MACB Ethernet device
157 */
158static struct macb_platform_data __initdata ek_macb_data = {
159 .phy_irq_pin = AT91_PIN_PE31,
160 .is_rmii = 1,
161};
162
163
164/*
165 * NAND flash
166 */
167static struct mtd_partition __initdata ek_nand_partition[] = {
168 {
169 .name = "Partition 1",
170 .offset = 0,
171 .size = SZ_64M,
172 },
173 {
174 .name = "Partition 2",
175 .offset = MTDPART_OFS_NXTBLK,
176 .size = MTDPART_SIZ_FULL,
177 },
178};
179
180static struct atmel_nand_data __initdata ek_nand_data = {
181 .ale = 21,
182 .cle = 22,
183 .det_pin = -EINVAL,
184 .rdy_pin = AT91_PIN_PA22,
185 .enable_pin = AT91_PIN_PD15,
186 .ecc_mode = NAND_ECC_SOFT,
187 .on_flash_bbt = 1,
188 .parts = ek_nand_partition,
189 .num_parts = ARRAY_SIZE(ek_nand_partition),
190};
191
192static struct sam9_smc_config __initdata ek_nand_smc_config = {
193 .ncs_read_setup = 0,
194 .nrd_setup = 1,
195 .ncs_write_setup = 0,
196 .nwe_setup = 1,
197
198 .ncs_read_pulse = 3,
199 .nrd_pulse = 3,
200 .ncs_write_pulse = 3,
201 .nwe_pulse = 3,
202
203 .read_cycle = 5,
204 .write_cycle = 5,
205
206 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
207 .tdf_cycles = 2,
208};
209
210static void __init ek_add_device_nand(void)
211{
212 ek_nand_data.bus_width_16 = board_have_nand_16bit();
213 /* setup bus-width (8 or 16) */
214 if (ek_nand_data.bus_width_16)
215 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
216 else
217 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
218
219 /* configure chip-select 3 (NAND) */
220 sam9_smc_configure(0, 3, &ek_nand_smc_config);
221
222 at91_add_device_nand(&ek_nand_data);
223}
224
225
226/*
227 * I2C devices
228 */
229static struct at24_platform_data at24c512 = {
230 .byte_len = SZ_512K / 8,
231 .page_size = 128,
232 .flags = AT24_FLAG_ADDR16,
233};
234
235
236static struct i2c_board_info __initdata ek_i2c_devices[] = {
237 {
238 I2C_BOARD_INFO("24c512", 0x50),
239 .platform_data = &at24c512,
240 },
241 /* more devices can be added using expansion connectors */
242};
243
244/*
245 * LCD Controller
246 */
247#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
248static struct fb_videomode at91_tft_vga_modes[] = {
249 {
250 .name = "TX09D50VM1CCA @ 60",
251 .refresh = 60,
252 .xres = 240, .yres = 320,
253 .pixclock = KHZ2PICOS(4965),
254
255 .left_margin = 1, .right_margin = 33,
256 .upper_margin = 1, .lower_margin = 0,
257 .hsync_len = 5, .vsync_len = 1,
258
259 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
260 .vmode = FB_VMODE_NONINTERLACED,
261 },
262};
263
264static struct fb_monspecs at91fb_default_monspecs = {
265 .manufacturer = "HIT",
266 .monitor = "TX09D70VM1CCA",
267
268 .modedb = at91_tft_vga_modes,
269 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
270 .hfmin = 15000,
271 .hfmax = 64000,
272 .vfmin = 50,
273 .vfmax = 150,
274};
275
276#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
277 | ATMEL_LCDC_DISTYPE_TFT \
278 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
279
280static void at91_lcdc_power_control(struct atmel_lcdfb_pdata *pdata, int on)
281{
282 at91_set_gpio_value(AT91_PIN_PA30, on);
283}
284
285/* Driver datas */
286static struct atmel_lcdfb_pdata __initdata ek_lcdc_data = {
287 .lcdcon_is_backlight = true,
288 .default_bpp = 16,
289 .default_dmacon = ATMEL_LCDC_DMAEN,
290 .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
291 .default_monspecs = &at91fb_default_monspecs,
292 .atmel_lcdfb_power_control = at91_lcdc_power_control,
293 .guard_time = 1,
294};
295
296#else
297static struct atmel_lcdfb_pdata __initdata ek_lcdc_data;
298#endif
299
300
301/*
302 * GPIO Buttons
303 */
304#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
305static struct gpio_keys_button ek_buttons[] = {
306 { /* BP1, "leftclic" */
307 .code = BTN_LEFT,
308 .gpio = AT91_PIN_PC5,
309 .active_low = 1,
310 .desc = "left_click",
311 .wakeup = 1,
312 },
313 { /* BP2, "rightclic" */
314 .code = BTN_RIGHT,
315 .gpio = AT91_PIN_PC4,
316 .active_low = 1,
317 .desc = "right_click",
318 .wakeup = 1,
319 }
320};
321
322static struct gpio_keys_platform_data ek_button_data = {
323 .buttons = ek_buttons,
324 .nbuttons = ARRAY_SIZE(ek_buttons),
325};
326
327static struct platform_device ek_button_device = {
328 .name = "gpio-keys",
329 .id = -1,
330 .num_resources = 0,
331 .dev = {
332 .platform_data = &ek_button_data,
333 }
334};
335
336static void __init ek_add_device_buttons(void)
337{
338 at91_set_GPIO_periph(AT91_PIN_PC5, 1); /* left button */
339 at91_set_deglitch(AT91_PIN_PC5, 1);
340 at91_set_GPIO_periph(AT91_PIN_PC4, 1); /* right button */
341 at91_set_deglitch(AT91_PIN_PC4, 1);
342
343 platform_device_register(&ek_button_device);
344}
345#else
346static void __init ek_add_device_buttons(void) {}
347#endif
348
349
350/*
351 * AC97
352 * reset_pin is not connected: NRST
353 */
354static struct ac97c_platform_data ek_ac97_data = {
355 .reset_pin = -EINVAL,
356};
357
358
359/*
360 * LEDs ... these could all be PWM-driven, for variable brightness
361 */
362static struct gpio_led ek_leds[] = {
363 { /* "right" led, green, userled2 (could be driven by pwm2) */
364 .name = "ds2",
365 .gpio = AT91_PIN_PC29,
366 .active_low = 1,
367 .default_trigger = "nand-disk",
368 },
369 { /* "power" led, yellow (could be driven by pwm0) */
370 .name = "ds3",
371 .gpio = AT91_PIN_PB7,
372 .default_trigger = "heartbeat",
373 },
374#if !IS_ENABLED(CONFIG_LEDS_PWM)
375 {
376 .name = "ds1",
377 .gpio = AT91_PIN_PB8,
378 .active_low = 1,
379 .default_trigger = "none",
380 }
381#endif
382};
383
384/*
385 * PWM Leds
386 */
387static struct pwm_lookup pwm_lookup[] = {
388 PWM_LOOKUP("at91sam9rl-pwm", 1, "leds_pwm", "ds1",
389 5000, PWM_POLARITY_INVERSED),
390};
391
392#if IS_ENABLED(CONFIG_LEDS_PWM)
393static struct led_pwm pwm_leds[] = {
394 {
395 .name = "ds1",
396 .max_brightness = 255,
397 },
398};
399
400static struct led_pwm_platform_data pwm_data = {
401 .num_leds = ARRAY_SIZE(pwm_leds),
402 .leds = pwm_leds,
403};
404
405static struct platform_device leds_pwm = {
406 .name = "leds_pwm",
407 .id = -1,
408 .dev = {
409 .platform_data = &pwm_data,
410 },
411};
412#endif
413
414
415/*
416 * CAN
417 */
418static void sam9263ek_transceiver_switch(int on)
419{
420 if (on) {
421 at91_set_gpio_output(AT91_PIN_PA18, 1); /* CANRXEN */
422 at91_set_gpio_output(AT91_PIN_PA19, 0); /* CANRS */
423 } else {
424 at91_set_gpio_output(AT91_PIN_PA18, 0); /* CANRXEN */
425 at91_set_gpio_output(AT91_PIN_PA19, 1); /* CANRS */
426 }
427}
428
429static struct at91_can_data ek_can_data = {
430 .transceiver_switch = sam9263ek_transceiver_switch,
431};
432
433static struct platform_device *devices[] __initdata = {
434#if IS_ENABLED(CONFIG_LEDS_PWM)
435 &leds_pwm,
436#endif
437};
438
439static void __init ek_board_init(void)
440{
441 at91_register_devices();
442
443 /* Serial */
444 /* DBGU on ttyS0. (Rx & Tx only) */
445 at91_register_uart(0, 0, 0);
446
447 /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
448 at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
449 at91_add_device_serial();
450 /* USB Host */
451 at91_add_device_usbh(&ek_usbh_data);
452 /* USB Device */
453 at91_add_device_udc(&ek_udc_data);
454 /* SPI */
455 at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
456 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
457 /* Touchscreen */
458 ek_add_device_ts();
459 /* MMC */
460 at91_add_device_mci(1, &mci1_data);
461 /* Ethernet */
462 at91_add_device_eth(&ek_macb_data);
463 /* NAND */
464 ek_add_device_nand();
465 /* I2C */
466 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
467 /* LCD Controller */
468 at91_add_device_lcdc(&ek_lcdc_data);
469 /* Push Buttons */
470 ek_add_device_buttons();
471 /* AC97 */
472 at91_add_device_ac97(&ek_ac97_data);
473 /* LEDs */
474 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
475 pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
476#if IS_ENABLED(CONFIG_LEDS_PWM)
477 at91_add_device_pwm(1 << AT91_PWM1);
478#endif
479 /* CAN */
480 at91_add_device_can(&ek_can_data);
481 /* Other platform devices */
482 platform_add_devices(devices, ARRAY_SIZE(devices));
483}
484
485MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
486 /* Maintainer: Atmel */
487 .init_time = at91_init_time,
488 .map_io = at91_map_io,
489 .handle_irq = at91_aic_handle_irq,
490 .init_early = ek_init_early,
491 .init_irq = at91_init_irq_default,
492 .init_machine = ek_board_init,
493MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
deleted file mode 100644
index 49f075213451..000000000000
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ /dev/null
@@ -1,429 +0,0 @@
1/*
2 * Copyright (C) 2005 SAN People
3 * Copyright (C) 2008 Atmel
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/types.h>
21#include <linux/gpio.h>
22#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/module.h>
25#include <linux/platform_device.h>
26#include <linux/spi/spi.h>
27#include <linux/spi/at73c213.h>
28#include <linux/gpio_keys.h>
29#include <linux/input.h>
30#include <linux/clk.h>
31#include <linux/regulator/machine.h>
32#include <linux/regulator/fixed.h>
33#include <linux/regulator/consumer.h>
34
35#include <linux/platform_data/at91_adc.h>
36
37#include <mach/hardware.h>
38#include <asm/setup.h>
39#include <asm/mach-types.h>
40#include <asm/irq.h>
41
42#include <asm/mach/arch.h>
43#include <asm/mach/map.h>
44#include <asm/mach/irq.h>
45
46#include <mach/at91sam9_smc.h>
47#include <mach/system_rev.h>
48
49#include "at91_aic.h"
50#include "board.h"
51#include "sam9_smc.h"
52#include "generic.h"
53#include "gpio.h"
54
55/*
56 * board revision encoding
57 * bit 0:
58 * 0 => 1 sd/mmc slot
59 * 1 => 2 sd/mmc slots connectors (board from revision C)
60 */
61#define HAVE_2MMC (1 << 0)
62static int inline ek_have_2mmc(void)
63{
64 return machine_is_at91sam9g20ek_2mmc() || (system_rev & HAVE_2MMC);
65}
66
67
68static void __init ek_init_early(void)
69{
70 /* Initialize processor: 18.432 MHz crystal */
71 at91_initialize(18432000);
72}
73
74/*
75 * USB Host port
76 */
77static struct at91_usbh_data __initdata ek_usbh_data = {
78 .ports = 2,
79 .vbus_pin = {-EINVAL, -EINVAL},
80 .overcurrent_pin= {-EINVAL, -EINVAL},
81};
82
83/*
84 * USB Device port
85 */
86static struct at91_udc_data __initdata ek_udc_data = {
87 .vbus_pin = AT91_PIN_PC5,
88 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
89};
90
91
92/*
93 * SPI devices.
94 */
95static struct spi_board_info ek_spi_devices[] = {
96#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
97 { /* DataFlash chip */
98 .modalias = "mtd_dataflash",
99 .chip_select = 1,
100 .max_speed_hz = 15 * 1000 * 1000,
101 .bus_num = 0,
102 },
103#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
104 { /* DataFlash card */
105 .modalias = "mtd_dataflash",
106 .chip_select = 0,
107 .max_speed_hz = 15 * 1000 * 1000,
108 .bus_num = 0,
109 },
110#endif
111#endif
112};
113
114
115/*
116 * MACB Ethernet device
117 */
118static struct macb_platform_data __initdata ek_macb_data = {
119 .phy_irq_pin = AT91_PIN_PA7,
120 .is_rmii = 1,
121};
122
123static void __init ek_add_device_macb(void)
124{
125 if (ek_have_2mmc())
126 ek_macb_data.phy_irq_pin = AT91_PIN_PB0;
127
128 at91_add_device_eth(&ek_macb_data);
129}
130
131/*
132 * NAND flash
133 */
134static struct mtd_partition __initdata ek_nand_partition[] = {
135 {
136 .name = "Bootstrap",
137 .offset = 0,
138 .size = 4 * SZ_1M,
139 },
140 {
141 .name = "Partition 1",
142 .offset = MTDPART_OFS_NXTBLK,
143 .size = 60 * SZ_1M,
144 },
145 {
146 .name = "Partition 2",
147 .offset = MTDPART_OFS_NXTBLK,
148 .size = MTDPART_SIZ_FULL,
149 },
150};
151
152/* det_pin is not connected */
153static struct atmel_nand_data __initdata ek_nand_data = {
154 .ale = 21,
155 .cle = 22,
156 .rdy_pin = AT91_PIN_PC13,
157 .enable_pin = AT91_PIN_PC14,
158 .det_pin = -EINVAL,
159 .ecc_mode = NAND_ECC_SOFT,
160 .on_flash_bbt = 1,
161 .parts = ek_nand_partition,
162 .num_parts = ARRAY_SIZE(ek_nand_partition),
163};
164
165static struct sam9_smc_config __initdata ek_nand_smc_config = {
166 .ncs_read_setup = 0,
167 .nrd_setup = 2,
168 .ncs_write_setup = 0,
169 .nwe_setup = 2,
170
171 .ncs_read_pulse = 4,
172 .nrd_pulse = 4,
173 .ncs_write_pulse = 4,
174 .nwe_pulse = 4,
175
176 .read_cycle = 7,
177 .write_cycle = 7,
178
179 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
180 .tdf_cycles = 3,
181};
182
183static void __init ek_add_device_nand(void)
184{
185 ek_nand_data.bus_width_16 = board_have_nand_16bit();
186 /* setup bus-width (8 or 16) */
187 if (ek_nand_data.bus_width_16)
188 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
189 else
190 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
191
192 /* configure chip-select 3 (NAND) */
193 sam9_smc_configure(0, 3, &ek_nand_smc_config);
194
195 at91_add_device_nand(&ek_nand_data);
196}
197
198
199/*
200 * MCI (SD/MMC)
201 * wp_pin and vcc_pin are not connected
202 */
203static struct mci_platform_data __initdata ek_mmc_data = {
204 .slot[1] = {
205 .bus_width = 4,
206 .detect_pin = AT91_PIN_PC9,
207 .wp_pin = -EINVAL,
208 },
209
210};
211
212static void __init ek_add_device_mmc(void)
213{
214 if (ek_have_2mmc()) {
215 ek_mmc_data.slot[0].bus_width = 4;
216 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2;
217 ek_mmc_data.slot[0].wp_pin = -1;
218 }
219 at91_add_device_mci(0, &ek_mmc_data);
220}
221
222/*
223 * LEDs
224 */
225static struct gpio_led ek_leds[] = {
226 { /* "bottom" led, green, userled1 to be defined */
227 .name = "ds5",
228 .gpio = AT91_PIN_PA6,
229 .active_low = 1,
230 .default_trigger = "none",
231 },
232 { /* "power" led, yellow */
233 .name = "ds1",
234 .gpio = AT91_PIN_PA9,
235 .default_trigger = "heartbeat",
236 }
237};
238
239static void __init ek_add_device_gpio_leds(void)
240{
241 if (ek_have_2mmc()) {
242 ek_leds[0].gpio = AT91_PIN_PB8;
243 ek_leds[1].gpio = AT91_PIN_PB9;
244 }
245
246 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
247}
248
249/*
250 * GPIO Buttons
251 */
252#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
253static struct gpio_keys_button ek_buttons[] = {
254 {
255 .gpio = AT91_PIN_PA30,
256 .code = BTN_3,
257 .desc = "Button 3",
258 .active_low = 1,
259 .wakeup = 1,
260 },
261 {
262 .gpio = AT91_PIN_PA31,
263 .code = BTN_4,
264 .desc = "Button 4",
265 .active_low = 1,
266 .wakeup = 1,
267 }
268};
269
270static struct gpio_keys_platform_data ek_button_data = {
271 .buttons = ek_buttons,
272 .nbuttons = ARRAY_SIZE(ek_buttons),
273};
274
275static struct platform_device ek_button_device = {
276 .name = "gpio-keys",
277 .id = -1,
278 .num_resources = 0,
279 .dev = {
280 .platform_data = &ek_button_data,
281 }
282};
283
284static void __init ek_add_device_buttons(void)
285{
286 at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
287 at91_set_deglitch(AT91_PIN_PA30, 1);
288 at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
289 at91_set_deglitch(AT91_PIN_PA31, 1);
290
291 platform_device_register(&ek_button_device);
292}
293#else
294static void __init ek_add_device_buttons(void) {}
295#endif
296
297/*
298 * ADCs
299 */
300
301static struct at91_adc_data ek_adc_data = {
302 .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3),
303 .use_external_triggers = true,
304 .vref = 3300,
305};
306
307#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
308static struct regulator_consumer_supply ek_audio_consumer_supplies[] = {
309 REGULATOR_SUPPLY("AVDD", "0-001b"),
310 REGULATOR_SUPPLY("HPVDD", "0-001b"),
311 REGULATOR_SUPPLY("DBVDD", "0-001b"),
312 REGULATOR_SUPPLY("DCVDD", "0-001b"),
313};
314
315static struct regulator_init_data ek_avdd_reg_init_data = {
316 .constraints = {
317 .name = "3V3",
318 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
319 },
320 .consumer_supplies = ek_audio_consumer_supplies,
321 .num_consumer_supplies = ARRAY_SIZE(ek_audio_consumer_supplies),
322};
323
324static struct fixed_voltage_config ek_vdd_pdata = {
325 .supply_name = "board-3V3",
326 .microvolts = 3300000,
327 .gpio = -EINVAL,
328 .enabled_at_boot = 0,
329 .init_data = &ek_avdd_reg_init_data,
330};
331static struct platform_device ek_voltage_regulator = {
332 .name = "reg-fixed-voltage",
333 .id = -1,
334 .num_resources = 0,
335 .dev = {
336 .platform_data = &ek_vdd_pdata,
337 },
338};
339static void __init ek_add_regulators(void)
340{
341 platform_device_register(&ek_voltage_regulator);
342}
343#else
344static void __init ek_add_regulators(void) {}
345#endif
346
347
348static struct i2c_board_info __initdata ek_i2c_devices[] = {
349 {
350 I2C_BOARD_INFO("24c512", 0x50)
351 },
352 {
353 I2C_BOARD_INFO("wm8731", 0x1b)
354 },
355};
356
357static struct platform_device sam9g20ek_audio_device = {
358 .name = "at91sam9g20ek-audio",
359 .id = -1,
360};
361
362static void __init ek_add_device_audio(void)
363{
364 platform_device_register(&sam9g20ek_audio_device);
365}
366
367
368static void __init ek_board_init(void)
369{
370 /* Serial */
371 /* DBGU on ttyS0. (Rx & Tx only) */
372 at91_register_uart(0, 0, 0);
373
374 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
375 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
376 | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
377 | ATMEL_UART_RI);
378
379 /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
380 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
381 at91_add_device_serial();
382 /* USB Host */
383 at91_add_device_usbh(&ek_usbh_data);
384 /* USB Device */
385 at91_add_device_udc(&ek_udc_data);
386 /* SPI */
387 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
388 /* NAND */
389 ek_add_device_nand();
390 /* Ethernet */
391 ek_add_device_macb();
392 /* Regulators */
393 ek_add_regulators();
394 /* MMC */
395 ek_add_device_mmc();
396 /* I2C */
397 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
398 /* LEDs */
399 ek_add_device_gpio_leds();
400 /* Push Buttons */
401 ek_add_device_buttons();
402 /* ADCs */
403 at91_add_device_adc(&ek_adc_data);
404 /* PCK0 provides MCLK to the WM8731 */
405 at91_set_B_periph(AT91_PIN_PC1, 0);
406 /* SSC (for WM8731) */
407 at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
408 ek_add_device_audio();
409}
410
411MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
412 /* Maintainer: Atmel */
413 .init_time = at91_init_time,
414 .map_io = at91_map_io,
415 .handle_irq = at91_aic_handle_irq,
416 .init_early = ek_init_early,
417 .init_irq = at91_init_irq_default,
418 .init_machine = ek_board_init,
419MACHINE_END
420
421MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
422 /* Maintainer: Atmel */
423 .init_time = at91_init_time,
424 .map_io = at91_map_io,
425 .handle_irq = at91_aic_handle_irq,
426 .init_early = ek_init_early,
427 .init_irq = at91_init_irq_default,
428 .init_machine = ek_board_init,
429MACHINE_END
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
deleted file mode 100644
index b4aff840a1a0..000000000000
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-snapper9260.c
3 *
4 * Copyright (C) 2010 Bluewater System Ltd
5 *
6 * Author: Andre Renaud <andre@bluewatersys.com>
7 * Author: Ryan Mallon
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#include <linux/init.h>
26#include <linux/gpio.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/platform_data/pca953x.h>
30
31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
33
34#include <mach/hardware.h>
35#include <mach/at91sam9_smc.h>
36
37#include "at91_aic.h"
38#include "board.h"
39#include "sam9_smc.h"
40#include "generic.h"
41#include "gpio.h"
42
43#define SNAPPER9260_IO_EXP_GPIO(x) (NR_BUILTIN_GPIO + (x))
44
45static void __init snapper9260_init_early(void)
46{
47 at91_initialize(18432000);
48}
49
50static struct at91_usbh_data __initdata snapper9260_usbh_data = {
51 .ports = 2,
52 .vbus_pin = {-EINVAL, -EINVAL},
53 .overcurrent_pin= {-EINVAL, -EINVAL},
54};
55
56static struct at91_udc_data __initdata snapper9260_udc_data = {
57 .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5),
58 .vbus_active_low = 1,
59 .vbus_polled = 1,
60 .pullup_pin = -EINVAL,
61};
62
63static struct macb_platform_data snapper9260_macb_data = {
64 .phy_irq_pin = -EINVAL,
65 .is_rmii = 1,
66};
67
68static struct mtd_partition __initdata snapper9260_nand_partitions[] = {
69 {
70 .name = "Preboot",
71 .offset = 0,
72 .size = SZ_128K,
73 },
74 {
75 .name = "Bootloader",
76 .offset = MTDPART_OFS_APPEND,
77 .size = SZ_256K,
78 },
79 {
80 .name = "Environment",
81 .offset = MTDPART_OFS_APPEND,
82 .size = SZ_128K,
83 },
84 {
85 .name = "Kernel",
86 .offset = MTDPART_OFS_APPEND,
87 .size = SZ_4M,
88 },
89 {
90 .name = "Filesystem",
91 .offset = MTDPART_OFS_APPEND,
92 .size = MTDPART_SIZ_FULL,
93 },
94};
95
96static struct atmel_nand_data __initdata snapper9260_nand_data = {
97 .ale = 21,
98 .cle = 22,
99 .rdy_pin = AT91_PIN_PC13,
100 .parts = snapper9260_nand_partitions,
101 .num_parts = ARRAY_SIZE(snapper9260_nand_partitions),
102 .bus_width_16 = 0,
103 .enable_pin = -EINVAL,
104 .det_pin = -EINVAL,
105 .ecc_mode = NAND_ECC_SOFT,
106};
107
108static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
109 .ncs_read_setup = 0,
110 .nrd_setup = 0,
111 .ncs_write_setup = 0,
112 .nwe_setup = 0,
113
114 .ncs_read_pulse = 5,
115 .nrd_pulse = 2,
116 .ncs_write_pulse = 5,
117 .nwe_pulse = 2,
118
119 .read_cycle = 7,
120 .write_cycle = 7,
121
122 .mode = (AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
123 AT91_SMC_EXNWMODE_DISABLE),
124 .tdf_cycles = 1,
125};
126
127static struct pca953x_platform_data snapper9260_io_expander_data = {
128 .gpio_base = SNAPPER9260_IO_EXP_GPIO(0),
129};
130
131static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
132 {
133 /* IO expander */
134 I2C_BOARD_INFO("max7312", 0x28),
135 .platform_data = &snapper9260_io_expander_data,
136 },
137 {
138 /* Audio codec */
139 I2C_BOARD_INFO("tlv320aic23", 0x1a),
140 },
141};
142
143static struct i2c_board_info __initdata snapper9260_i2c_isl1208 = {
144 /* RTC */
145 I2C_BOARD_INFO("isl1208", 0x6f),
146};
147
148static void __init snapper9260_add_device_nand(void)
149{
150 at91_set_A_periph(AT91_PIN_PC14, 0);
151 sam9_smc_configure(0, 3, &snapper9260_nand_smc_config);
152 at91_add_device_nand(&snapper9260_nand_data);
153}
154
155static void __init snapper9260_board_init(void)
156{
157 at91_register_devices();
158
159 at91_add_device_i2c(snapper9260_i2c_devices,
160 ARRAY_SIZE(snapper9260_i2c_devices));
161
162 snapper9260_i2c_isl1208.irq = gpio_to_irq(AT91_PIN_PA31);
163 i2c_register_board_info(0, &snapper9260_i2c_isl1208, 1);
164
165 /* Debug on ttyS0 */
166 at91_register_uart(0, 0, 0);
167
168 at91_register_uart(AT91SAM9260_ID_US0, 1,
169 ATMEL_UART_CTS | ATMEL_UART_RTS);
170 at91_register_uart(AT91SAM9260_ID_US1, 2,
171 ATMEL_UART_CTS | ATMEL_UART_RTS);
172 at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
173 at91_add_device_serial();
174 at91_add_device_usbh(&snapper9260_usbh_data);
175 at91_add_device_udc(&snapper9260_udc_data);
176 at91_add_device_eth(&snapper9260_macb_data);
177 at91_add_device_ssc(AT91SAM9260_ID_SSC, (ATMEL_SSC_TF | ATMEL_SSC_TK |
178 ATMEL_SSC_TD | ATMEL_SSC_RD));
179 snapper9260_add_device_nand();
180}
181
182MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
183 .init_time = at91_init_time,
184 .map_io = at91_map_io,
185 .handle_irq = at91_aic_handle_irq,
186 .init_early = snapper9260_init_early,
187 .init_irq = at91_init_irq_default,
188 .init_machine = snapper9260_board_init,
189MACHINE_END
190
191
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
deleted file mode 100644
index e825641a1dee..000000000000
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ /dev/null
@@ -1,294 +0,0 @@
1/*
2 * Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de>
3 * taskit GmbH
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/mm.h>
21#include <linux/platform_device.h>
22#include <linux/gpio.h>
23#include <linux/w1-gpio.h>
24
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27
28#include <mach/at91sam9_smc.h>
29#include <mach/hardware.h>
30
31#include "at91_aic.h"
32#include "board.h"
33#include "sam9_smc.h"
34#include "generic.h"
35#include "gpio.h"
36
37
38void __init stamp9g20_init_early(void)
39{
40 /* Initialize processor: 18.432 MHz crystal */
41 at91_initialize(18432000);
42}
43
44/*
45 * NAND flash
46 */
47static struct atmel_nand_data __initdata nand_data = {
48 .ale = 21,
49 .cle = 22,
50 .rdy_pin = AT91_PIN_PC13,
51 .enable_pin = AT91_PIN_PC14,
52 .bus_width_16 = 0,
53 .det_pin = -EINVAL,
54 .ecc_mode = NAND_ECC_SOFT,
55};
56
57static struct sam9_smc_config __initdata nand_smc_config = {
58 .ncs_read_setup = 0,
59 .nrd_setup = 2,
60 .ncs_write_setup = 0,
61 .nwe_setup = 2,
62
63 .ncs_read_pulse = 4,
64 .nrd_pulse = 4,
65 .ncs_write_pulse = 4,
66 .nwe_pulse = 4,
67
68 .read_cycle = 7,
69 .write_cycle = 7,
70
71 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
72 .tdf_cycles = 3,
73};
74
75static void __init add_device_nand(void)
76{
77 /* configure chip-select 3 (NAND) */
78 sam9_smc_configure(0, 3, &nand_smc_config);
79
80 at91_add_device_nand(&nand_data);
81}
82
83
84/*
85 * MCI (SD/MMC)
86 * det_pin, wp_pin and vcc_pin are not connected
87 */
88static struct mci_platform_data __initdata mmc_data = {
89 .slot[0] = {
90 .bus_width = 4,
91 .detect_pin = -1,
92 .wp_pin = -1,
93 },
94};
95
96
97/*
98 * USB Host port
99 */
100static struct at91_usbh_data __initdata usbh_data = {
101 .ports = 2,
102 .vbus_pin = {-EINVAL, -EINVAL},
103 .overcurrent_pin= {-EINVAL, -EINVAL},
104};
105
106
107/*
108 * USB Device port
109 */
110static struct at91_udc_data __initdata portuxg20_udc_data = {
111 .vbus_pin = AT91_PIN_PC7,
112 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
113};
114
115static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
116 .vbus_pin = AT91_PIN_PA22,
117 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
118};
119
120
121/*
122 * MACB Ethernet device
123 */
124static struct macb_platform_data __initdata macb_data = {
125 .phy_irq_pin = AT91_PIN_PA28,
126 .is_rmii = 1,
127};
128
129
130/*
131 * LEDs
132 */
133static struct gpio_led portuxg20_leds[] = {
134 {
135 .name = "LED2",
136 .gpio = AT91_PIN_PC5,
137 .default_trigger = "none",
138 }, {
139 .name = "LED3",
140 .gpio = AT91_PIN_PC4,
141 .default_trigger = "none",
142 }, {
143 .name = "LED4",
144 .gpio = AT91_PIN_PC10,
145 .default_trigger = "heartbeat",
146 }
147};
148
149static struct gpio_led stamp9g20evb_leds[] = {
150 {
151 .name = "D8",
152 .gpio = AT91_PIN_PB18,
153 .active_low = 1,
154 .default_trigger = "none",
155 }, {
156 .name = "D9",
157 .gpio = AT91_PIN_PB19,
158 .active_low = 1,
159 .default_trigger = "none",
160 }, {
161 .name = "D10",
162 .gpio = AT91_PIN_PB20,
163 .active_low = 1,
164 .default_trigger = "heartbeat",
165 }
166};
167
168
169/*
170 * SPI devices
171 */
172static struct spi_board_info portuxg20_spi_devices[] = {
173 {
174 .modalias = "spidev",
175 .chip_select = 0,
176 .max_speed_hz = 1 * 1000 * 1000,
177 .bus_num = 0,
178 }, {
179 .modalias = "spidev",
180 .chip_select = 0,
181 .max_speed_hz = 1 * 1000 * 1000,
182 .bus_num = 1,
183 },
184};
185
186
187/*
188 * Dallas 1-Wire
189 */
190static struct w1_gpio_platform_data w1_gpio_pdata = {
191 .pin = AT91_PIN_PA29,
192 .is_open_drain = 1,
193 .ext_pullup_enable_pin = -EINVAL,
194};
195
196static struct platform_device w1_device = {
197 .name = "w1-gpio",
198 .id = -1,
199 .dev.platform_data = &w1_gpio_pdata,
200};
201
202void add_w1(void)
203{
204 at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
205 at91_set_multi_drive(w1_gpio_pdata.pin, 1);
206 platform_device_register(&w1_device);
207}
208
209
210void __init stamp9g20_board_init(void)
211{
212 /* Serial */
213 /* DGBU on ttyS0. (Rx & Tx only) */
214 at91_register_uart(0, 0, 0);
215 at91_add_device_serial();
216 /* NAND */
217 add_device_nand();
218 /* MMC */
219 at91_add_device_mci(0, &mmc_data);
220 /* W1 */
221 add_w1();
222}
223
224static void __init portuxg20_board_init(void)
225{
226 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
227 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
228 | ATMEL_UART_DTR | ATMEL_UART_DSR
229 | ATMEL_UART_DCD | ATMEL_UART_RI);
230
231 /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
232 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
233
234 /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
235 at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
236
237 /* USART4 on ttyS5. (Rx, Tx only) */
238 at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
239
240 /* USART5 on ttyS6. (Rx, Tx only) */
241 at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
242 stamp9g20_board_init();
243 /* USB Host */
244 at91_add_device_usbh(&usbh_data);
245 /* USB Device */
246 at91_add_device_udc(&portuxg20_udc_data);
247 /* Ethernet */
248 at91_add_device_eth(&macb_data);
249 /* I2C */
250 at91_add_device_i2c(NULL, 0);
251 /* SPI */
252 at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices));
253 /* LEDs */
254 at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds));
255}
256
257static void __init stamp9g20evb_board_init(void)
258{
259 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
260 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
261 | ATMEL_UART_DTR | ATMEL_UART_DSR
262 | ATMEL_UART_DCD | ATMEL_UART_RI);
263 stamp9g20_board_init();
264 /* USB Host */
265 at91_add_device_usbh(&usbh_data);
266 /* USB Device */
267 at91_add_device_udc(&stamp9g20evb_udc_data);
268 /* Ethernet */
269 at91_add_device_eth(&macb_data);
270 /* I2C */
271 at91_add_device_i2c(NULL, 0);
272 /* LEDs */
273 at91_gpio_leds(stamp9g20evb_leds, ARRAY_SIZE(stamp9g20evb_leds));
274}
275
276MACHINE_START(PORTUXG20, "taskit PortuxG20")
277 /* Maintainer: taskit GmbH */
278 .init_time = at91_init_time,
279 .map_io = at91_map_io,
280 .handle_irq = at91_aic_handle_irq,
281 .init_early = stamp9g20_init_early,
282 .init_irq = at91_init_irq_default,
283 .init_machine = portuxg20_board_init,
284MACHINE_END
285
286MACHINE_START(STAMP9G20, "taskit Stamp9G20")
287 /* Maintainer: taskit GmbH */
288 .init_time = at91_init_time,
289 .map_io = at91_map_io,
290 .handle_irq = at91_aic_handle_irq,
291 .init_early = stamp9g20_init_early,
292 .init_irq = at91_init_irq_default,
293 .init_machine = stamp9g20evb_board_init,
294MACHINE_END
diff --git a/arch/arm/mach-at91/stamp9g20.h b/arch/arm/mach-at91/stamp9g20.h
deleted file mode 100644
index f62c0abca4b4..000000000000
--- a/arch/arm/mach-at91/stamp9g20.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __MACH_STAMP9G20_H
2#define __MACH_STAMP9G20_H
3
4void stamp9g20_init_early(void);
5void stamp9g20_board_init(void);
6
7#endif
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index bbeb4516facf..006242c8bca0 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -75,7 +75,7 @@ config ATMEL_TCB_CLKSRC
75config ATMEL_TCB_CLKSRC_BLOCK 75config ATMEL_TCB_CLKSRC_BLOCK
76 int 76 int
77 depends on ATMEL_TCB_CLKSRC 77 depends on ATMEL_TCB_CLKSRC
78 prompt "TC Block" if ARCH_AT91RM9200 || ARCH_AT91SAM9260 || CPU_AT32AP700X 78 prompt "TC Block" if CPU_AT32AP700X
79 default 0 79 default 0
80 range 0 1 80 range 0 1
81 help 81 help
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 4f8b9e95ef0a..15a232e1c2a0 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1124,7 +1124,6 @@ config RTC_DRV_AT91SAM9_RTT
1124 int 1124 int
1125 range 0 1 1125 range 0 1
1126 default 0 1126 default 0
1127 prompt "RTT module Number" if ARCH_AT91SAM9263
1128 depends on RTC_DRV_AT91SAM9 1127 depends on RTC_DRV_AT91SAM9
1129 help 1128 help
1130 More than one RTT module is available. You can choose which 1129 More than one RTT module is available. You can choose which
@@ -1133,8 +1132,7 @@ config RTC_DRV_AT91SAM9_RTT
1133 1132
1134config RTC_DRV_AT91SAM9_GPBR 1133config RTC_DRV_AT91SAM9_GPBR
1135 int 1134 int
1136 range 0 3 if !ARCH_AT91SAM9263 1135 range 0 3
1137 range 0 15 if ARCH_AT91SAM9263
1138 default 0 1136 default 0
1139 prompt "Backup Register Number" 1137 prompt "Backup Register Number"
1140 depends on RTC_DRV_AT91SAM9 1138 depends on RTC_DRV_AT91SAM9
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 8d03924749b8..efb09046a8cf 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -168,7 +168,6 @@ if BACKLIGHT_CLASS_DEVICE
168config BACKLIGHT_ATMEL_LCDC 168config BACKLIGHT_ATMEL_LCDC
169 bool "Atmel LCDC Contrast-as-Backlight control" 169 bool "Atmel LCDC Contrast-as-Backlight control"
170 depends on FB_ATMEL 170 depends on FB_ATMEL
171 default y if MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK || MACH_AT91SAM9263EK
172 help 171 help
173 This provides a backlight control internal to the Atmel LCDC 172 This provides a backlight control internal to the Atmel LCDC
174 driver. If the LCD "contrast control" on your board is wired 173 driver. If the LCD "contrast control" on your board is wired
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index c7bf606a8706..c78bfd1d1b34 100644
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -999,23 +999,6 @@ config FB_ATMEL
999 help 999 help
1000 This enables support for the AT91/AT32 LCD Controller. 1000 This enables support for the AT91/AT32 LCD Controller.
1001 1001
1002config FB_INTSRAM
1003 bool "Frame Buffer in internal SRAM"
1004 depends on FB_ATMEL && ARCH_AT91SAM9261
1005 help
1006 Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
1007 to let frame buffer in external SDRAM.
1008
1009config FB_ATMEL_STN
1010 bool "Use a STN display with AT91/AT32 LCD Controller"
1011 depends on FB_ATMEL && (MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK)
1012 default n
1013 help
1014 Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD
1015 Controller. Say N if you want to connect a TFT.
1016
1017 If unsure, say N.
1018
1019config FB_NVIDIA 1002config FB_NVIDIA
1020 tristate "nVidia Framebuffer Support" 1003 tristate "nVidia Framebuffer Support"
1021 depends on FB && PCI 1004 depends on FB && PCI
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-29 05:50:41 -0400