diff options
285 files changed, 12067 insertions, 10929 deletions
diff --git a/Documentation/devicetree/bindings/sound/adi,axi-i2s.txt b/Documentation/devicetree/bindings/sound/adi,axi-i2s.txt new file mode 100644 index 000000000000..5875ca459ed1 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/adi,axi-i2s.txt | |||
@@ -0,0 +1,31 @@ | |||
1 | ADI AXI-I2S controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible : Must be "adi,axi-i2s-1.00.a" | ||
5 | - reg : Must contain I2S core's registers location and length | ||
6 | - clocks : Pairs of phandle and specifier referencing the controller's clocks. | ||
7 | The controller expects two clocks, the clock used for the AXI interface and | ||
8 | the clock used as the sampling rate reference clock sample. | ||
9 | - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample | ||
10 | rate reference clock. | ||
11 | - dmas: Pairs of phandle and specifier for the DMA channels that are used by | ||
12 | the core. The core expects two dma channels, one for transmit and one for | ||
13 | receive. | ||
14 | - dma-names : "tx" for the transmit channel, "rx" for the receive channel. | ||
15 | |||
16 | For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties | ||
17 | please check: | ||
18 | * resource-names.txt | ||
19 | * clock/clock-bindings.txt | ||
20 | * dma/dma.txt | ||
21 | |||
22 | Example: | ||
23 | |||
24 | i2s: i2s@0x77600000 { | ||
25 | compatible = "adi,axi-i2s-1.00.a"; | ||
26 | reg = <0x77600000 0x1000>; | ||
27 | clocks = <&clk 15>, <&audio_clock>; | ||
28 | clock-names = "axi", "ref"; | ||
29 | dmas = <&ps7_dma 0>, <&ps7_dma 1>; | ||
30 | dma-names = "tx", "rx"; | ||
31 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/adi,axi-spdif-tx.txt b/Documentation/devicetree/bindings/sound/adi,axi-spdif-tx.txt new file mode 100644 index 000000000000..46f344965313 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/adi,axi-spdif-tx.txt | |||
@@ -0,0 +1,30 @@ | |||
1 | ADI AXI-SPDIF controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible : Must be "adi,axi-spdif-1.00.a" | ||
5 | - reg : Must contain SPDIF core's registers location and length | ||
6 | - clocks : Pairs of phandle and specifier referencing the controller's clocks. | ||
7 | The controller expects two clocks, the clock used for the AXI interface and | ||
8 | the clock used as the sampling rate reference clock sample. | ||
9 | - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample | ||
10 | rate reference clock. | ||
11 | - dmas: Pairs of phandle and specifier for the DMA channel that is used by | ||
12 | the core. The core expects one dma channel for transmit. | ||
13 | - dma-names : Must be "tx" | ||
14 | |||
15 | For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties | ||
16 | please check: | ||
17 | * resource-names.txt | ||
18 | * clock/clock-bindings.txt | ||
19 | * dma/dma.txt | ||
20 | |||
21 | Example: | ||
22 | |||
23 | spdif: spdif@0x77400000 { | ||
24 | compatible = "adi,axi-spdif-tx-1.00.a"; | ||
25 | reg = <0x77600000 0x1000>; | ||
26 | clocks = <&clk 15>, <&audio_clock>; | ||
27 | clock-names = "axi", "ref"; | ||
28 | dmas = <&ps7_dma 0>; | ||
29 | dma-names = "tx"; | ||
30 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt b/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt new file mode 100644 index 000000000000..65783de0aedf --- /dev/null +++ b/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt | |||
@@ -0,0 +1,25 @@ | |||
1 | * Broadcom BCM2835 SoC I2S/PCM module | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: "brcm,bcm2835-i2s" | ||
5 | - reg: A list of base address and size entries: | ||
6 | * The first entry should cover the PCM registers | ||
7 | * The second entry should cover the PCM clock registers | ||
8 | - dmas: List of DMA controller phandle and DMA request line ordered pairs. | ||
9 | - dma-names: Identifier string for each DMA request line in the dmas property. | ||
10 | These strings correspond 1:1 with the ordered pairs in dmas. | ||
11 | |||
12 | One of the DMA channels will be responsible for transmission (should be | ||
13 | named "tx") and one for reception (should be named "rx"). | ||
14 | |||
15 | Example: | ||
16 | |||
17 | bcm2835_i2s: i2s@7e203000 { | ||
18 | compatible = "brcm,bcm2835-i2s"; | ||
19 | reg = <0x7e203000 0x20>, | ||
20 | <0x7e101098 0x02>; | ||
21 | |||
22 | dmas = <&dma 2>, | ||
23 | <&dma 3>; | ||
24 | dma-names = "tx", "rx"; | ||
25 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/cs42l52.txt b/Documentation/devicetree/bindings/sound/cs42l52.txt new file mode 100644 index 000000000000..bc03c9312a19 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cs42l52.txt | |||
@@ -0,0 +1,46 @@ | |||
1 | CS42L52 audio CODEC | ||
2 | |||
3 | Required properties: | ||
4 | |||
5 | - compatible : "cirrus,cs42l52" | ||
6 | |||
7 | - reg : the I2C address of the device for I2C | ||
8 | |||
9 | Optional properties: | ||
10 | |||
11 | - cirrus,reset-gpio : GPIO controller's phandle and the number | ||
12 | of the GPIO used to reset the codec. | ||
13 | |||
14 | - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency. | ||
15 | Allowable values of 0x00 through 0x0F. These are raw values written to the | ||
16 | register, not the actual frequency. The frequency is determined by the following. | ||
17 | Frequency = (64xFs)/(N+2) | ||
18 | N = chgfreq_val | ||
19 | Fs = Sample Rate (variable) | ||
20 | |||
21 | - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured | ||
22 | as a differential input. If not present then the MICA input is configured as | ||
23 | Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input. | ||
24 | |||
25 | - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured | ||
26 | as a differential input. If not present then the MICB input is configured as | ||
27 | Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input. | ||
28 | |||
29 | - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin | ||
30 | 0 = 0.5 x VA | ||
31 | 1 = 0.6 x VA | ||
32 | 2 = 0.7 x VA | ||
33 | 3 = 0.8 x VA | ||
34 | 4 = 0.83 x VA | ||
35 | 5 = 0.91 x VA | ||
36 | |||
37 | Example: | ||
38 | |||
39 | codec: codec@4a { | ||
40 | compatible = "cirrus,cs42l52"; | ||
41 | reg = <0x4a>; | ||
42 | reset-gpio = <&gpio 10 0>; | ||
43 | cirrus,chgfreq-divisor = <0x05>; | ||
44 | cirrus.mica-differential-cfg; | ||
45 | cirrus,micbias-lvl = <5>; | ||
46 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt index ed785b3f67be..569b26c4a81e 100644 --- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt +++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt | |||
@@ -4,7 +4,8 @@ Required properties: | |||
4 | - compatible : | 4 | - compatible : |
5 | "ti,dm646x-mcasp-audio" : for DM646x platforms | 5 | "ti,dm646x-mcasp-audio" : for DM646x platforms |
6 | "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms | 6 | "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms |
7 | "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, TI81xx) | 7 | "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, AM43xx, TI81xx) |
8 | "ti,dra7-mcasp-audio" : for DRA7xx platforms | ||
8 | 9 | ||
9 | - reg : Should contain reg specifiers for the entries in the reg-names property. | 10 | - reg : Should contain reg specifiers for the entries in the reg-names property. |
10 | - reg-names : Should contain: | 11 | - reg-names : Should contain: |
@@ -36,7 +37,8 @@ Optional properties: | |||
36 | - pinctrl-0: Should specify pin control group used for this controller. | 37 | - pinctrl-0: Should specify pin control group used for this controller. |
37 | - pinctrl-names: Should contain only one value - "default", for more details | 38 | - pinctrl-names: Should contain only one value - "default", for more details |
38 | please refer to pinctrl-bindings.txt | 39 | please refer to pinctrl-bindings.txt |
39 | 40 | - fck_parent : Should contain a valid clock name which will be used as parent | |
41 | for the McASP fck | ||
40 | 42 | ||
41 | Example: | 43 | Example: |
42 | 44 | ||
diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt new file mode 100644 index 000000000000..d7b99fa637b5 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/fsl,esai.txt | |||
@@ -0,0 +1,50 @@ | |||
1 | Freescale Enhanced Serial Audio Interface (ESAI) Controller | ||
2 | |||
3 | The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port | ||
4 | for serial communication with a variety of serial devices, including industry | ||
5 | standard codecs, Sony/Phillips Digital Interface (S/PDIF) transceivers, and | ||
6 | other DSPs. It has up to six transmitters and four receivers. | ||
7 | |||
8 | Required properties: | ||
9 | |||
10 | - compatible : Compatible list, must contain "fsl,imx35-esai". | ||
11 | |||
12 | - reg : Offset and length of the register set for the device. | ||
13 | |||
14 | - interrupts : Contains the spdif interrupt. | ||
15 | |||
16 | - dmas : Generic dma devicetree binding as described in | ||
17 | Documentation/devicetree/bindings/dma/dma.txt. | ||
18 | |||
19 | - dma-names : Two dmas have to be defined, "tx" and "rx". | ||
20 | |||
21 | - clocks: Contains an entry for each entry in clock-names. | ||
22 | |||
23 | - clock-names : Includes the following entries: | ||
24 | "core" The core clock used to access registers | ||
25 | "extal" The esai baud clock for esai controller used to derive | ||
26 | HCK, SCK and FS. | ||
27 | "fsys" The system clock derived from ahb clock used to derive | ||
28 | HCK, SCK and FS. | ||
29 | |||
30 | - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs. | ||
31 | This number is the maximum allowed value for TFCR[TFWM] or RFCR[RFWM]. | ||
32 | |||
33 | - fsl,esai-synchronous: This is a boolean property. If present, indicating | ||
34 | that ESAI would work in the synchronous mode, which means all the settings | ||
35 | for Receiving would be duplicated from Transmition related registers. | ||
36 | |||
37 | Example: | ||
38 | |||
39 | esai: esai@02024000 { | ||
40 | compatible = "fsl,imx35-esai"; | ||
41 | reg = <0x02024000 0x4000>; | ||
42 | interrupts = <0 51 0x04>; | ||
43 | clocks = <&clks 208>, <&clks 118>, <&clks 208>; | ||
44 | clock-names = "core", "extal", "fsys"; | ||
45 | dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; | ||
46 | dma-names = "rx", "tx"; | ||
47 | fsl,fifo-depth = <128>; | ||
48 | fsl,esai-synchronous; | ||
49 | status = "disabled"; | ||
50 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/fsl,ssi.txt b/Documentation/devicetree/bindings/sound/fsl,ssi.txt index 4303b6ab6208..b93e9a91e30e 100644 --- a/Documentation/devicetree/bindings/sound/fsl,ssi.txt +++ b/Documentation/devicetree/bindings/sound/fsl,ssi.txt | |||
@@ -4,7 +4,12 @@ The SSI is a serial device that communicates with audio codecs. It can | |||
4 | be programmed in AC97, I2S, left-justified, or right-justified modes. | 4 | be programmed in AC97, I2S, left-justified, or right-justified modes. |
5 | 5 | ||
6 | Required properties: | 6 | Required properties: |
7 | - compatible: Compatible list, contains "fsl,ssi". | 7 | - compatible: Compatible list, should contain one of the following |
8 | compatibles: | ||
9 | fsl,mpc8610-ssi | ||
10 | fsl,imx51-ssi | ||
11 | fsl,imx35-ssi | ||
12 | fsl,imx21-ssi | ||
8 | - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on. | 13 | - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on. |
9 | - reg: Offset and length of the register set for the device. | 14 | - reg: Offset and length of the register set for the device. |
10 | - interrupts: <a b> where a is the interrupt number and b is a | 15 | - interrupts: <a b> where a is the interrupt number and b is a |
diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt new file mode 100644 index 000000000000..98611a6761c0 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt | |||
@@ -0,0 +1,40 @@ | |||
1 | Freescale Synchronous Audio Interface (SAI). | ||
2 | |||
3 | The SAI is based on I2S module that used communicating with audio codecs, | ||
4 | which provides a synchronous audio interface that supports fullduplex | ||
5 | serial interfaces with frame synchronization such as I2S, AC97, TDM, and | ||
6 | codec/DSP interfaces. | ||
7 | |||
8 | |||
9 | Required properties: | ||
10 | - compatible: Compatible list, contains "fsl,vf610-sai". | ||
11 | - reg: Offset and length of the register set for the device. | ||
12 | - clocks: Must contain an entry for each entry in clock-names. | ||
13 | - clock-names : Must include the "sai" entry. | ||
14 | - dmas : Generic dma devicetree binding as described in | ||
15 | Documentation/devicetree/bindings/dma/dma.txt. | ||
16 | - dma-names : Two dmas have to be defined, "tx" and "rx". | ||
17 | - pinctrl-names: Must contain a "default" entry. | ||
18 | - pinctrl-NNN: One property must exist for each entry in pinctrl-names. | ||
19 | See ../pinctrl/pinctrl-bindings.txt for details of the property values. | ||
20 | - big-endian-regs: If this property is absent, the little endian mode will | ||
21 | be in use as default, or the big endian mode will be in use for all the | ||
22 | device registers. | ||
23 | - big-endian-data: If this property is absent, the little endian mode will | ||
24 | be in use as default, or the big endian mode will be in use for all the | ||
25 | fifo data. | ||
26 | |||
27 | Example: | ||
28 | sai2: sai@40031000 { | ||
29 | compatible = "fsl,vf610-sai"; | ||
30 | reg = <0x40031000 0x1000>; | ||
31 | pinctrl-names = "default"; | ||
32 | pinctrl-0 = <&pinctrl_sai2_1>; | ||
33 | clocks = <&clks VF610_CLK_SAI2>; | ||
34 | clock-names = "sai"; | ||
35 | dma-names = "tx", "rx"; | ||
36 | dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>, | ||
37 | <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>; | ||
38 | big-endian-regs; | ||
39 | big-endian-data; | ||
40 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/hdmi.txt b/Documentation/devicetree/bindings/sound/hdmi.txt new file mode 100644 index 000000000000..31af7bca3099 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/hdmi.txt | |||
@@ -0,0 +1,17 @@ | |||
1 | Device-Tree bindings for dummy HDMI codec | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: should be "linux,hdmi-audio". | ||
5 | |||
6 | CODEC output pins: | ||
7 | * TX | ||
8 | |||
9 | CODEC input pins: | ||
10 | * RX | ||
11 | |||
12 | Example node: | ||
13 | |||
14 | hdmi_audio: hdmi_audio@0 { | ||
15 | compatible = "linux,hdmi-audio"; | ||
16 | status = "okay"; | ||
17 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/max98090.txt b/Documentation/devicetree/bindings/sound/max98090.txt new file mode 100644 index 000000000000..e4c8b36dcf89 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/max98090.txt | |||
@@ -0,0 +1,43 @@ | |||
1 | MAX98090 audio CODEC | ||
2 | |||
3 | This device supports I2C only. | ||
4 | |||
5 | Required properties: | ||
6 | |||
7 | - compatible : "maxim,max98090". | ||
8 | |||
9 | - reg : The I2C address of the device. | ||
10 | |||
11 | - interrupts : The CODEC's interrupt output. | ||
12 | |||
13 | Pins on the device (for linking into audio routes): | ||
14 | |||
15 | * MIC1 | ||
16 | * MIC2 | ||
17 | * DMICL | ||
18 | * DMICR | ||
19 | * IN1 | ||
20 | * IN2 | ||
21 | * IN3 | ||
22 | * IN4 | ||
23 | * IN5 | ||
24 | * IN6 | ||
25 | * IN12 | ||
26 | * IN34 | ||
27 | * IN56 | ||
28 | * HPL | ||
29 | * HPR | ||
30 | * SPKL | ||
31 | * SPKR | ||
32 | * RCVL | ||
33 | * RCVR | ||
34 | * MICBIAS | ||
35 | |||
36 | Example: | ||
37 | |||
38 | audio-codec@10 { | ||
39 | compatible = "maxim,max98090"; | ||
40 | reg = <0x10>; | ||
41 | interrupt-parent = <&gpio>; | ||
42 | interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; | ||
43 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt new file mode 100644 index 000000000000..9c7c55c71370 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt | |||
@@ -0,0 +1,51 @@ | |||
1 | NVIDIA Tegra audio complex, with MAX98090 CODEC | ||
2 | |||
3 | Required properties: | ||
4 | - compatible : "nvidia,tegra-audio-max98090" | ||
5 | - clocks : Must contain an entry for each entry in clock-names. | ||
6 | See ../clocks/clock-bindings.txt for details. | ||
7 | - clock-names : Must include the following entries: | ||
8 | - pll_a | ||
9 | - pll_a_out0 | ||
10 | - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk) | ||
11 | - nvidia,model : The user-visible name of this sound complex. | ||
12 | - nvidia,audio-routing : A list of the connections between audio components. | ||
13 | Each entry is a pair of strings, the first being the connection's sink, | ||
14 | the second being the connection's source. Valid names for sources and | ||
15 | sinks are the MAX98090's pins (as documented in its binding), and the jacks | ||
16 | on the board: | ||
17 | |||
18 | * Headphones | ||
19 | * Speakers | ||
20 | * Mic Jack | ||
21 | |||
22 | - nvidia,i2s-controller : The phandle of the Tegra I2S controller that's | ||
23 | connected to the CODEC. | ||
24 | - nvidia,audio-codec : The phandle of the MAX98090 audio codec. | ||
25 | |||
26 | Optional properties: | ||
27 | - nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in | ||
28 | |||
29 | Example: | ||
30 | |||
31 | sound { | ||
32 | compatible = "nvidia,tegra-audio-max98090-venice2", | ||
33 | "nvidia,tegra-audio-max98090"; | ||
34 | nvidia,model = "NVIDIA Tegra Venice2"; | ||
35 | |||
36 | nvidia,audio-routing = | ||
37 | "Headphones", "HPR", | ||
38 | "Headphones", "HPL", | ||
39 | "Speakers", "SPKR", | ||
40 | "Speakers", "SPKL", | ||
41 | "Mic Jack", "MICBIAS", | ||
42 | "IN34", "Mic Jack"; | ||
43 | |||
44 | nvidia,i2s-controller = <&tegra_i2s1>; | ||
45 | nvidia,audio-codec = <&acodec>; | ||
46 | |||
47 | clocks = <&tegra_car TEGRA124_CLK_PLL_A>, | ||
48 | <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, | ||
49 | <&tegra_car TEGRA124_CLK_EXTERN1>; | ||
50 | clock-names = "pll_a", "pll_a_out0", "mclk"; | ||
51 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt new file mode 100644 index 000000000000..e9e20ec67d62 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/simple-card.txt | |||
@@ -0,0 +1,77 @@ | |||
1 | Simple-Card: | ||
2 | |||
3 | Simple-Card specifies audio DAI connection of SoC <-> codec. | ||
4 | |||
5 | Required properties: | ||
6 | |||
7 | - compatible : "simple-audio-card" | ||
8 | |||
9 | Optional properties: | ||
10 | |||
11 | - simple-audio-card,format : CPU/CODEC common audio format. | ||
12 | "i2s", "right_j", "left_j" , "dsp_a" | ||
13 | "dsp_b", "ac97", "pdm", "msb", "lsb" | ||
14 | - simple-audio-card,routing : A list of the connections between audio components. | ||
15 | Each entry is a pair of strings, the first being the | ||
16 | connection's sink, the second being the connection's | ||
17 | source. | ||
18 | |||
19 | Required subnodes: | ||
20 | |||
21 | - simple-audio-card,cpu : CPU sub-node | ||
22 | - simple-audio-card,codec : CODEC sub-node | ||
23 | |||
24 | Required CPU/CODEC subnodes properties: | ||
25 | |||
26 | - sound-dai : phandle and port of CPU/CODEC | ||
27 | |||
28 | Optional CPU/CODEC subnodes properties: | ||
29 | |||
30 | - format : CPU/CODEC specific audio format if needed. | ||
31 | see simple-audio-card,format | ||
32 | - frame-master : bool property. add this if subnode is frame master | ||
33 | - bitclock-master : bool property. add this if subnode is bitclock master | ||
34 | - bitclock-inversion : bool property. add this if subnode has clock inversion | ||
35 | - frame-inversion : bool property. add this if subnode has frame inversion | ||
36 | - clocks / system-clock-frequency : specify subnode's clock if needed. | ||
37 | it can be specified via "clocks" if system has | ||
38 | clock node (= common clock), or "system-clock-frequency" | ||
39 | (if system doens't support common clock) | ||
40 | |||
41 | Example: | ||
42 | |||
43 | sound { | ||
44 | compatible = "simple-audio-card"; | ||
45 | simple-audio-card,format = "left_j"; | ||
46 | simple-audio-routing = | ||
47 | "MIC_IN", "Mic Jack", | ||
48 | "Headphone Jack", "HP_OUT", | ||
49 | "Ext Spk", "LINE_OUT"; | ||
50 | |||
51 | simple-audio-card,cpu { | ||
52 | sound-dai = <&sh_fsi2 0>; | ||
53 | }; | ||
54 | |||
55 | simple-audio-card,codec { | ||
56 | sound-dai = <&ak4648>; | ||
57 | bitclock-master; | ||
58 | frame-master; | ||
59 | clocks = <&osc>; | ||
60 | }; | ||
61 | }; | ||
62 | |||
63 | &i2c0 { | ||
64 | ak4648: ak4648@12 { | ||
65 | #sound-dai-cells = <0>; | ||
66 | compatible = "asahi-kasei,ak4648"; | ||
67 | reg = <0x12>; | ||
68 | }; | ||
69 | }; | ||
70 | |||
71 | sh_fsi2: sh_fsi2@ec230000 { | ||
72 | #sound-dai-cells = <1>; | ||
73 | compatible = "renesas,sh_fsi2"; | ||
74 | reg = <0xec230000 0x400>; | ||
75 | interrupt-parent = <&gic>; | ||
76 | interrupts = <0 146 0x4>; | ||
77 | }; | ||
diff --git a/Documentation/devicetree/bindings/sound/tlv320aic3x.txt b/Documentation/devicetree/bindings/sound/tlv320aic3x.txt index 5e6040c2c2e9..9d8ea14db490 100644 --- a/Documentation/devicetree/bindings/sound/tlv320aic3x.txt +++ b/Documentation/devicetree/bindings/sound/tlv320aic3x.txt | |||
@@ -6,6 +6,7 @@ Required properties: | |||
6 | 6 | ||
7 | - compatible - "string" - One of: | 7 | - compatible - "string" - One of: |
8 | "ti,tlv320aic3x" - Generic TLV320AIC3x device | 8 | "ti,tlv320aic3x" - Generic TLV320AIC3x device |
9 | "ti,tlv320aic32x4" - TLV320AIC32x4 | ||
9 | "ti,tlv320aic33" - TLV320AIC33 | 10 | "ti,tlv320aic33" - TLV320AIC33 |
10 | "ti,tlv320aic3007" - TLV320AIC3007 | 11 | "ti,tlv320aic3007" - TLV320AIC3007 |
11 | "ti,tlv320aic3106" - TLV320AIC3106 | 12 | "ti,tlv320aic3106" - TLV320AIC3106 |
diff --git a/Documentation/sound/alsa/soc/overview.txt b/Documentation/sound/alsa/soc/overview.txt index 138ac88c1461..ff88f52eec98 100644 --- a/Documentation/sound/alsa/soc/overview.txt +++ b/Documentation/sound/alsa/soc/overview.txt | |||
@@ -49,18 +49,23 @@ features :- | |||
49 | * Machine specific controls: Allow machines to add controls to the sound card | 49 | * Machine specific controls: Allow machines to add controls to the sound card |
50 | (e.g. volume control for speaker amplifier). | 50 | (e.g. volume control for speaker amplifier). |
51 | 51 | ||
52 | To achieve all this, ASoC basically splits an embedded audio system into 3 | 52 | To achieve all this, ASoC basically splits an embedded audio system into |
53 | components :- | 53 | multiple re-usable component drivers :- |
54 | 54 | ||
55 | * Codec driver: The codec driver is platform independent and contains audio | 55 | * Codec class drivers: The codec class driver is platform independent and |
56 | controls, audio interface capabilities, codec DAPM definition and codec IO | 56 | contains audio controls, audio interface capabilities, codec DAPM |
57 | functions. | 57 | definition and codec IO functions. This class extends to BT, FM and MODEM |
58 | ICs if required. Codec class drivers should be generic code that can run | ||
59 | on any architecture and machine. | ||
58 | 60 | ||
59 | * Platform driver: The platform driver contains the audio DMA engine and audio | 61 | * Platform class drivers: The platform class driver includes the audio DMA |
60 | interface drivers (e.g. I2S, AC97, PCM) for that platform. | 62 | engine driver, digital audio interface (DAI) drivers (e.g. I2S, AC97, PCM) |
63 | and any audio DSP drivers for that platform. | ||
61 | 64 | ||
62 | * Machine driver: The machine driver handles any machine specific controls and | 65 | * Machine class driver: The machine driver class acts as the glue that |
63 | audio events (e.g. turning on an amp at start of playback). | 66 | decribes and binds the other component drivers together to form an ALSA |
67 | "sound card device". It handles any machine specific controls and | ||
68 | machine level audio events (e.g. turning on an amp at start of playback). | ||
64 | 69 | ||
65 | 70 | ||
66 | Documentation | 71 | Documentation |
@@ -84,3 +89,7 @@ machine.txt: Machine driver internals. | |||
84 | pop_clicks.txt: How to minimise audio artifacts. | 89 | pop_clicks.txt: How to minimise audio artifacts. |
85 | 90 | ||
86 | clocking.txt: ASoC clocking for best power performance. | 91 | clocking.txt: ASoC clocking for best power performance. |
92 | |||
93 | jack.txt: ASoC jack detection. | ||
94 | |||
95 | DPCM.txt: Dynamic PCM - Describes DPCM with DSP examples. | ||
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b9df6224609c..ab1689c96a71 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -723,6 +723,7 @@ config ARCH_S3C64XX | |||
723 | bool "Samsung S3C64XX" | 723 | bool "Samsung S3C64XX" |
724 | select ARCH_HAS_CPUFREQ | 724 | select ARCH_HAS_CPUFREQ |
725 | select ARCH_REQUIRE_GPIOLIB | 725 | select ARCH_REQUIRE_GPIOLIB |
726 | select ARM_AMBA | ||
726 | select ARM_VIC | 727 | select ARM_VIC |
727 | select CLKDEV_LOOKUP | 728 | select CLKDEV_LOOKUP |
728 | select CLKSRC_SAMSUNG_PWM | 729 | select CLKSRC_SAMSUNG_PWM |
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 175f01501129..64f04e6f9c31 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig | |||
@@ -17,9 +17,10 @@ config CPU_S3C6410 | |||
17 | help | 17 | help |
18 | Enable S3C6410 CPU support | 18 | Enable S3C6410 CPU support |
19 | 19 | ||
20 | config S3C64XX_DMA | 20 | config S3C64XX_PL080 |
21 | bool "S3C64XX DMA" | 21 | bool "S3C64XX DMA using generic PL08x driver" |
22 | select S3C_DMA | 22 | select AMBA_PL08X |
23 | select SAMSUNG_DMADEV | ||
23 | 24 | ||
24 | config S3C64XX_SETUP_SDHCI | 25 | config S3C64XX_SETUP_SDHCI |
25 | bool | 26 | bool |
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 6faedcffce04..58069a702a43 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile | |||
@@ -26,7 +26,7 @@ obj-$(CONFIG_CPU_IDLE) += cpuidle.o | |||
26 | 26 | ||
27 | # DMA support | 27 | # DMA support |
28 | 28 | ||
29 | obj-$(CONFIG_S3C64XX_DMA) += dma.o | 29 | obj-$(CONFIG_S3C64XX_PL080) += pl080.o |
30 | 30 | ||
31 | # Device support | 31 | # Device support |
32 | 32 | ||
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h index bd3bd562011e..7043e7a3a67e 100644 --- a/arch/arm/mach-s3c64xx/common.h +++ b/arch/arm/mach-s3c64xx/common.h | |||
@@ -58,4 +58,9 @@ int __init s3c64xx_pm_late_initcall(void); | |||
58 | static inline int s3c64xx_pm_late_initcall(void) { return 0; } | 58 | static inline int s3c64xx_pm_late_initcall(void) { return 0; } |
59 | #endif | 59 | #endif |
60 | 60 | ||
61 | #ifdef CONFIG_S3C64XX_PL080 | ||
62 | extern struct pl08x_platform_data s3c64xx_dma0_plat_data; | ||
63 | extern struct pl08x_platform_data s3c64xx_dma1_plat_data; | ||
64 | #endif | ||
65 | |||
61 | #endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */ | 66 | #endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */ |
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c deleted file mode 100644 index 7e22c2113816..000000000000 --- a/arch/arm/mach-s3c64xx/dma.c +++ /dev/null | |||
@@ -1,762 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c64xx/dma.c | ||
2 | * | ||
3 | * Copyright 2009 Openmoko, Inc. | ||
4 | * Copyright 2009 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX DMA core | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | /* | ||
16 | * NOTE: Code in this file is not used when booting with Device Tree support. | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/module.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/dmapool.h> | ||
23 | #include <linux/device.h> | ||
24 | #include <linux/errno.h> | ||
25 | #include <linux/slab.h> | ||
26 | #include <linux/delay.h> | ||
27 | #include <linux/clk.h> | ||
28 | #include <linux/err.h> | ||
29 | #include <linux/io.h> | ||
30 | #include <linux/amba/pl080.h> | ||
31 | #include <linux/of.h> | ||
32 | |||
33 | #include <mach/dma.h> | ||
34 | #include <mach/map.h> | ||
35 | #include <mach/irqs.h> | ||
36 | |||
37 | #include "regs-sys.h" | ||
38 | |||
39 | /* dma channel state information */ | ||
40 | |||
41 | struct s3c64xx_dmac { | ||
42 | struct device dev; | ||
43 | struct clk *clk; | ||
44 | void __iomem *regs; | ||
45 | struct s3c2410_dma_chan *channels; | ||
46 | enum dma_ch chanbase; | ||
47 | }; | ||
48 | |||
49 | /* pool to provide LLI buffers */ | ||
50 | static struct dma_pool *dma_pool; | ||
51 | |||
52 | /* Debug configuration and code */ | ||
53 | |||
54 | static unsigned char debug_show_buffs = 0; | ||
55 | |||
56 | static void dbg_showchan(struct s3c2410_dma_chan *chan) | ||
57 | { | ||
58 | pr_debug("DMA%d: %08x->%08x L %08x C %08x,%08x S %08x\n", | ||
59 | chan->number, | ||
60 | readl(chan->regs + PL080_CH_SRC_ADDR), | ||
61 | readl(chan->regs + PL080_CH_DST_ADDR), | ||
62 | readl(chan->regs + PL080_CH_LLI), | ||
63 | readl(chan->regs + PL080_CH_CONTROL), | ||
64 | readl(chan->regs + PL080S_CH_CONTROL2), | ||
65 | readl(chan->regs + PL080S_CH_CONFIG)); | ||
66 | } | ||
67 | |||
68 | static void show_lli(struct pl080s_lli *lli) | ||
69 | { | ||
70 | pr_debug("LLI[%p] %08x->%08x, NL %08x C %08x,%08x\n", | ||
71 | lli, lli->src_addr, lli->dst_addr, lli->next_lli, | ||
72 | lli->control0, lli->control1); | ||
73 | } | ||
74 | |||
75 | static void dbg_showbuffs(struct s3c2410_dma_chan *chan) | ||
76 | { | ||
77 | struct s3c64xx_dma_buff *ptr; | ||
78 | struct s3c64xx_dma_buff *end; | ||
79 | |||
80 | pr_debug("DMA%d: buffs next %p, curr %p, end %p\n", | ||
81 | chan->number, chan->next, chan->curr, chan->end); | ||
82 | |||
83 | ptr = chan->next; | ||
84 | end = chan->end; | ||
85 | |||
86 | if (debug_show_buffs) { | ||
87 | for (; ptr != NULL; ptr = ptr->next) { | ||
88 | pr_debug("DMA%d: %08x ", | ||
89 | chan->number, ptr->lli_dma); | ||
90 | show_lli(ptr->lli); | ||
91 | } | ||
92 | } | ||
93 | } | ||
94 | |||
95 | /* End of Debug */ | ||
96 | |||
97 | static struct s3c2410_dma_chan *s3c64xx_dma_map_channel(unsigned int channel) | ||
98 | { | ||
99 | struct s3c2410_dma_chan *chan; | ||
100 | unsigned int start, offs; | ||
101 | |||
102 | start = 0; | ||
103 | |||
104 | if (channel >= DMACH_PCM1_TX) | ||
105 | start = 8; | ||
106 | |||
107 | for (offs = 0; offs < 8; offs++) { | ||
108 | chan = &s3c2410_chans[start + offs]; | ||
109 | if (!chan->in_use) | ||
110 | goto found; | ||
111 | } | ||
112 | |||
113 | return NULL; | ||
114 | |||
115 | found: | ||
116 | s3c_dma_chan_map[channel] = chan; | ||
117 | return chan; | ||
118 | } | ||
119 | |||
120 | int s3c2410_dma_config(enum dma_ch channel, int xferunit) | ||
121 | { | ||
122 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | ||
123 | |||
124 | if (chan == NULL) | ||
125 | return -EINVAL; | ||
126 | |||
127 | switch (xferunit) { | ||
128 | case 1: | ||
129 | chan->hw_width = 0; | ||
130 | break; | ||
131 | case 2: | ||
132 | chan->hw_width = 1; | ||
133 | break; | ||
134 | case 4: | ||
135 | chan->hw_width = 2; | ||
136 | break; | ||
137 | default: | ||
138 | printk(KERN_ERR "%s: illegal width %d\n", __func__, xferunit); | ||
139 | return -EINVAL; | ||
140 | } | ||
141 | |||
142 | return 0; | ||
143 | } | ||
144 | EXPORT_SYMBOL(s3c2410_dma_config); | ||
145 | |||
146 | static void s3c64xx_dma_fill_lli(struct s3c2410_dma_chan *chan, | ||
147 | struct pl080s_lli *lli, | ||
148 | dma_addr_t data, int size) | ||
149 | { | ||
150 | dma_addr_t src, dst; | ||
151 | u32 control0, control1; | ||
152 | |||
153 | switch (chan->source) { | ||
154 | case DMA_FROM_DEVICE: | ||
155 | src = chan->dev_addr; | ||
156 | dst = data; | ||
157 | control0 = PL080_CONTROL_SRC_AHB2; | ||
158 | control0 |= PL080_CONTROL_DST_INCR; | ||
159 | break; | ||
160 | |||
161 | case DMA_TO_DEVICE: | ||
162 | src = data; | ||
163 | dst = chan->dev_addr; | ||
164 | control0 = PL080_CONTROL_DST_AHB2; | ||
165 | control0 |= PL080_CONTROL_SRC_INCR; | ||
166 | break; | ||
167 | default: | ||
168 | BUG(); | ||
169 | } | ||
170 | |||
171 | /* note, we do not currently setup any of the burst controls */ | ||
172 | |||
173 | control1 = size >> chan->hw_width; /* size in no of xfers */ | ||
174 | control0 |= PL080_CONTROL_PROT_SYS; /* always in priv. mode */ | ||
175 | control0 |= PL080_CONTROL_TC_IRQ_EN; /* always fire IRQ */ | ||
176 | control0 |= (u32)chan->hw_width << PL080_CONTROL_DWIDTH_SHIFT; | ||
177 | control0 |= (u32)chan->hw_width << PL080_CONTROL_SWIDTH_SHIFT; | ||
178 | |||
179 | lli->src_addr = src; | ||
180 | lli->dst_addr = dst; | ||
181 | lli->next_lli = 0; | ||
182 | lli->control0 = control0; | ||
183 | lli->control1 = control1; | ||
184 | } | ||
185 | |||
186 | static void s3c64xx_lli_to_regs(struct s3c2410_dma_chan *chan, | ||
187 | struct pl080s_lli *lli) | ||
188 | { | ||
189 | void __iomem *regs = chan->regs; | ||
190 | |||
191 | pr_debug("%s: LLI %p => regs\n", __func__, lli); | ||
192 | show_lli(lli); | ||
193 | |||
194 | writel(lli->src_addr, regs + PL080_CH_SRC_ADDR); | ||
195 | writel(lli->dst_addr, regs + PL080_CH_DST_ADDR); | ||
196 | writel(lli->next_lli, regs + PL080_CH_LLI); | ||
197 | writel(lli->control0, regs + PL080_CH_CONTROL); | ||
198 | writel(lli->control1, regs + PL080S_CH_CONTROL2); | ||
199 | } | ||
200 | |||
201 | static int s3c64xx_dma_start(struct s3c2410_dma_chan *chan) | ||
202 | { | ||
203 | struct s3c64xx_dmac *dmac = chan->dmac; | ||
204 | u32 config; | ||
205 | u32 bit = chan->bit; | ||
206 | |||
207 | dbg_showchan(chan); | ||
208 | |||
209 | pr_debug("%s: clearing interrupts\n", __func__); | ||
210 | |||
211 | /* clear interrupts */ | ||
212 | writel(bit, dmac->regs + PL080_TC_CLEAR); | ||
213 | writel(bit, dmac->regs + PL080_ERR_CLEAR); | ||
214 | |||
215 | pr_debug("%s: starting channel\n", __func__); | ||
216 | |||
217 | config = readl(chan->regs + PL080S_CH_CONFIG); | ||
218 | config |= PL080_CONFIG_ENABLE; | ||
219 | config &= ~PL080_CONFIG_HALT; | ||
220 | |||
221 | pr_debug("%s: writing config %08x\n", __func__, config); | ||
222 | writel(config, chan->regs + PL080S_CH_CONFIG); | ||
223 | |||
224 | return 0; | ||
225 | } | ||
226 | |||
227 | static int s3c64xx_dma_stop(struct s3c2410_dma_chan *chan) | ||
228 | { | ||
229 | u32 config; | ||
230 | int timeout; | ||
231 | |||
232 | pr_debug("%s: stopping channel\n", __func__); | ||
233 | |||
234 | dbg_showchan(chan); | ||
235 | |||
236 | config = readl(chan->regs + PL080S_CH_CONFIG); | ||
237 | config |= PL080_CONFIG_HALT; | ||
238 | writel(config, chan->regs + PL080S_CH_CONFIG); | ||
239 | |||
240 | timeout = 1000; | ||
241 | do { | ||
242 | config = readl(chan->regs + PL080S_CH_CONFIG); | ||
243 | pr_debug("%s: %d - config %08x\n", __func__, timeout, config); | ||
244 | if (config & PL080_CONFIG_ACTIVE) | ||
245 | udelay(10); | ||
246 | else | ||
247 | break; | ||
248 | } while (--timeout > 0); | ||
249 | |||
250 | if (config & PL080_CONFIG_ACTIVE) { | ||
251 | printk(KERN_ERR "%s: channel still active\n", __func__); | ||
252 | return -EFAULT; | ||
253 | } | ||
254 | |||
255 | config = readl(chan->regs + PL080S_CH_CONFIG); | ||
256 | config &= ~PL080_CONFIG_ENABLE; | ||
257 | writel(config, chan->regs + PL080S_CH_CONFIG); | ||
258 | |||
259 | return 0; | ||
260 | } | ||
261 | |||
262 | static inline void s3c64xx_dma_bufffdone(struct s3c2410_dma_chan *chan, | ||
263 | struct s3c64xx_dma_buff *buf, | ||
264 | enum s3c2410_dma_buffresult result) | ||
265 | { | ||
266 | if (chan->callback_fn != NULL) | ||
267 | (chan->callback_fn)(chan, buf->pw, 0, result); | ||
268 | } | ||
269 | |||
270 | static void s3c64xx_dma_freebuff(struct s3c64xx_dma_buff *buff) | ||
271 | { | ||
272 | dma_pool_free(dma_pool, buff->lli, buff->lli_dma); | ||
273 | kfree(buff); | ||
274 | } | ||
275 | |||
276 | static int s3c64xx_dma_flush(struct s3c2410_dma_chan *chan) | ||
277 | { | ||
278 | struct s3c64xx_dma_buff *buff, *next; | ||
279 | u32 config; | ||
280 | |||
281 | dbg_showchan(chan); | ||
282 | |||
283 | pr_debug("%s: flushing channel\n", __func__); | ||
284 | |||
285 | config = readl(chan->regs + PL080S_CH_CONFIG); | ||
286 | config &= ~PL080_CONFIG_ENABLE; | ||
287 | writel(config, chan->regs + PL080S_CH_CONFIG); | ||
288 | |||
289 | /* dump all the buffers associated with this channel */ | ||
290 | |||
291 | for (buff = chan->curr; buff != NULL; buff = next) { | ||
292 | next = buff->next; | ||
293 | pr_debug("%s: buff %p (next %p)\n", __func__, buff, buff->next); | ||
294 | |||
295 | s3c64xx_dma_bufffdone(chan, buff, S3C2410_RES_ABORT); | ||
296 | s3c64xx_dma_freebuff(buff); | ||
297 | } | ||
298 | |||
299 | chan->curr = chan->next = chan->end = NULL; | ||
300 | |||
301 | return 0; | ||
302 | } | ||
303 | |||
304 | int s3c2410_dma_ctrl(enum dma_ch channel, enum s3c2410_chan_op op) | ||
305 | { | ||
306 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | ||
307 | |||
308 | WARN_ON(!chan); | ||
309 | if (!chan) | ||
310 | return -EINVAL; | ||
311 | |||
312 | switch (op) { | ||
313 | case S3C2410_DMAOP_START: | ||
314 | return s3c64xx_dma_start(chan); | ||
315 | |||
316 | case S3C2410_DMAOP_STOP: | ||
317 | return s3c64xx_dma_stop(chan); | ||
318 | |||
319 | case S3C2410_DMAOP_FLUSH: | ||
320 | return s3c64xx_dma_flush(chan); | ||
321 | |||
322 | /* believe PAUSE/RESUME are no-ops */ | ||
323 | case S3C2410_DMAOP_PAUSE: | ||
324 | case S3C2410_DMAOP_RESUME: | ||
325 | case S3C2410_DMAOP_STARTED: | ||
326 | case S3C2410_DMAOP_TIMEOUT: | ||
327 | return 0; | ||
328 | } | ||
329 | |||
330 | return -ENOENT; | ||
331 | } | ||
332 | EXPORT_SYMBOL(s3c2410_dma_ctrl); | ||
333 | |||
334 | /* s3c2410_dma_enque | ||
335 | * | ||
336 | */ | ||
337 | |||
338 | int s3c2410_dma_enqueue(enum dma_ch channel, void *id, | ||
339 | dma_addr_t data, int size) | ||
340 | { | ||
341 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | ||
342 | struct s3c64xx_dma_buff *next; | ||
343 | struct s3c64xx_dma_buff *buff; | ||
344 | struct pl080s_lli *lli; | ||
345 | unsigned long flags; | ||
346 | int ret; | ||
347 | |||
348 | WARN_ON(!chan); | ||
349 | if (!chan) | ||
350 | return -EINVAL; | ||
351 | |||
352 | buff = kzalloc(sizeof(struct s3c64xx_dma_buff), GFP_ATOMIC); | ||
353 | if (!buff) { | ||
354 | printk(KERN_ERR "%s: no memory for buffer\n", __func__); | ||
355 | return -ENOMEM; | ||
356 | } | ||
357 | |||
358 | lli = dma_pool_alloc(dma_pool, GFP_ATOMIC, &buff->lli_dma); | ||
359 | if (!lli) { | ||
360 | printk(KERN_ERR "%s: no memory for lli\n", __func__); | ||
361 | ret = -ENOMEM; | ||
362 | goto err_buff; | ||
363 | } | ||
364 | |||
365 | pr_debug("%s: buff %p, dp %08x lli (%p, %08x) %d\n", | ||
366 | __func__, buff, data, lli, (u32)buff->lli_dma, size); | ||
367 | |||
368 | buff->lli = lli; | ||
369 | buff->pw = id; | ||
370 | |||
371 | s3c64xx_dma_fill_lli(chan, lli, data, size); | ||
372 | |||
373 | local_irq_save(flags); | ||
374 | |||
375 | if ((next = chan->next) != NULL) { | ||
376 | struct s3c64xx_dma_buff *end = chan->end; | ||
377 | struct pl080s_lli *endlli = end->lli; | ||
378 | |||
379 | pr_debug("enquing onto channel\n"); | ||
380 | |||
381 | end->next = buff; | ||
382 | endlli->next_lli = buff->lli_dma; | ||
383 | |||
384 | if (chan->flags & S3C2410_DMAF_CIRCULAR) { | ||
385 | struct s3c64xx_dma_buff *curr = chan->curr; | ||
386 | lli->next_lli = curr->lli_dma; | ||
387 | } | ||
388 | |||
389 | if (next == chan->curr) { | ||
390 | writel(buff->lli_dma, chan->regs + PL080_CH_LLI); | ||
391 | chan->next = buff; | ||
392 | } | ||
393 | |||
394 | show_lli(endlli); | ||
395 | chan->end = buff; | ||
396 | } else { | ||
397 | pr_debug("enquing onto empty channel\n"); | ||
398 | |||
399 | chan->curr = buff; | ||
400 | chan->next = buff; | ||
401 | chan->end = buff; | ||
402 | |||
403 | s3c64xx_lli_to_regs(chan, lli); | ||
404 | } | ||
405 | |||
406 | local_irq_restore(flags); | ||
407 | |||
408 | show_lli(lli); | ||
409 | |||
410 | dbg_showchan(chan); | ||
411 | dbg_showbuffs(chan); | ||
412 | return 0; | ||
413 | |||
414 | err_buff: | ||
415 | kfree(buff); | ||
416 | return ret; | ||
417 | } | ||
418 | |||
419 | EXPORT_SYMBOL(s3c2410_dma_enqueue); | ||
420 | |||
421 | |||
422 | int s3c2410_dma_devconfig(enum dma_ch channel, | ||
423 | enum dma_data_direction source, | ||
424 | unsigned long devaddr) | ||
425 | { | ||
426 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | ||
427 | u32 peripheral; | ||
428 | u32 config = 0; | ||
429 | |||
430 | pr_debug("%s: channel %d, source %d, dev %08lx, chan %p\n", | ||
431 | __func__, channel, source, devaddr, chan); | ||
432 | |||
433 | WARN_ON(!chan); | ||
434 | if (!chan) | ||
435 | return -EINVAL; | ||
436 | |||
437 | peripheral = (chan->peripheral & 0xf); | ||
438 | chan->source = source; | ||
439 | chan->dev_addr = devaddr; | ||
440 | |||
441 | pr_debug("%s: peripheral %d\n", __func__, peripheral); | ||
442 | |||
443 | switch (source) { | ||
444 | case DMA_FROM_DEVICE: | ||
445 | config = 2 << PL080_CONFIG_FLOW_CONTROL_SHIFT; | ||
446 | config |= peripheral << PL080_CONFIG_SRC_SEL_SHIFT; | ||
447 | break; | ||
448 | case DMA_TO_DEVICE: | ||
449 | config = 1 << PL080_CONFIG_FLOW_CONTROL_SHIFT; | ||
450 | config |= peripheral << PL080_CONFIG_DST_SEL_SHIFT; | ||
451 | break; | ||
452 | default: | ||
453 | printk(KERN_ERR "%s: bad source\n", __func__); | ||
454 | return -EINVAL; | ||
455 | } | ||
456 | |||
457 | /* allow TC and ERR interrupts */ | ||
458 | config |= PL080_CONFIG_TC_IRQ_MASK; | ||
459 | config |= PL080_CONFIG_ERR_IRQ_MASK; | ||
460 | |||
461 | pr_debug("%s: config %08x\n", __func__, config); | ||
462 | |||
463 | writel(config, chan->regs + PL080S_CH_CONFIG); | ||
464 | |||
465 | return 0; | ||
466 | } | ||
467 | EXPORT_SYMBOL(s3c2410_dma_devconfig); | ||
468 | |||
469 | |||
470 | int s3c2410_dma_getposition(enum dma_ch channel, | ||
471 | dma_addr_t *src, dma_addr_t *dst) | ||
472 | { | ||
473 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | ||
474 | |||
475 | WARN_ON(!chan); | ||
476 | if (!chan) | ||
477 | return -EINVAL; | ||
478 | |||
479 | if (src != NULL) | ||
480 | *src = readl(chan->regs + PL080_CH_SRC_ADDR); | ||
481 | |||
482 | if (dst != NULL) | ||
483 | *dst = readl(chan->regs + PL080_CH_DST_ADDR); | ||
484 | |||
485 | return 0; | ||
486 | } | ||
487 | EXPORT_SYMBOL(s3c2410_dma_getposition); | ||
488 | |||
489 | /* s3c2410_request_dma | ||
490 | * | ||
491 | * get control of an dma channel | ||
492 | */ | ||
493 | |||
494 | int s3c2410_dma_request(enum dma_ch channel, | ||
495 | struct s3c2410_dma_client *client, | ||
496 | void *dev) | ||
497 | { | ||
498 | struct s3c2410_dma_chan *chan; | ||
499 | unsigned long flags; | ||
500 | |||
501 | pr_debug("dma%d: s3c2410_request_dma: client=%s, dev=%p\n", | ||
502 | channel, client->name, dev); | ||
503 | |||
504 | local_irq_save(flags); | ||
505 | |||
506 | chan = s3c64xx_dma_map_channel(channel); | ||
507 | if (chan == NULL) { | ||
508 | local_irq_restore(flags); | ||
509 | return -EBUSY; | ||
510 | } | ||
511 | |||
512 | dbg_showchan(chan); | ||
513 | |||
514 | chan->client = client; | ||
515 | chan->in_use = 1; | ||
516 | chan->peripheral = channel; | ||
517 | chan->flags = 0; | ||
518 | |||
519 | local_irq_restore(flags); | ||
520 | |||
521 | /* need to setup */ | ||
522 | |||
523 | pr_debug("%s: channel initialised, %p\n", __func__, chan); | ||
524 | |||
525 | return chan->number | DMACH_LOW_LEVEL; | ||
526 | } | ||
527 | |||
528 | EXPORT_SYMBOL(s3c2410_dma_request); | ||
529 | |||
530 | /* s3c2410_dma_free | ||
531 | * | ||
532 | * release the given channel back to the system, will stop and flush | ||
533 | * any outstanding transfers, and ensure the channel is ready for the | ||
534 | * next claimant. | ||
535 | * | ||
536 | * Note, although a warning is currently printed if the freeing client | ||
537 | * info is not the same as the registrant's client info, the free is still | ||
538 | * allowed to go through. | ||
539 | */ | ||
540 | |||
541 | int s3c2410_dma_free(enum dma_ch channel, struct s3c2410_dma_client *client) | ||
542 | { | ||
543 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | ||
544 | unsigned long flags; | ||
545 | |||
546 | if (chan == NULL) | ||
547 | return -EINVAL; | ||
548 | |||
549 | local_irq_save(flags); | ||
550 | |||
551 | if (chan->client != client) { | ||
552 | printk(KERN_WARNING "dma%d: possible free from different client (channel %p, passed %p)\n", | ||
553 | channel, chan->client, client); | ||
554 | } | ||
555 | |||
556 | /* sort out stopping and freeing the channel */ | ||
557 | |||
558 | |||
559 | chan->client = NULL; | ||
560 | chan->in_use = 0; | ||
561 | |||
562 | if (!(channel & DMACH_LOW_LEVEL)) | ||
563 | s3c_dma_chan_map[channel] = NULL; | ||
564 | |||
565 | local_irq_restore(flags); | ||
566 | |||
567 | return 0; | ||
568 | } | ||
569 | |||
570 | EXPORT_SYMBOL(s3c2410_dma_free); | ||
571 | |||
572 | static irqreturn_t s3c64xx_dma_irq(int irq, void *pw) | ||
573 | { | ||
574 | struct s3c64xx_dmac *dmac = pw; | ||
575 | struct s3c2410_dma_chan *chan; | ||
576 | enum s3c2410_dma_buffresult res; | ||
577 | u32 tcstat, errstat; | ||
578 | u32 bit; | ||
579 | int offs; | ||
580 | |||
581 | tcstat = readl(dmac->regs + PL080_TC_STATUS); | ||
582 | errstat = readl(dmac->regs + PL080_ERR_STATUS); | ||
583 | |||
584 | for (offs = 0, bit = 1; offs < 8; offs++, bit <<= 1) { | ||
585 | struct s3c64xx_dma_buff *buff; | ||
586 | |||
587 | if (!(errstat & bit) && !(tcstat & bit)) | ||
588 | continue; | ||
589 | |||
590 | chan = dmac->channels + offs; | ||
591 | res = S3C2410_RES_ERR; | ||
592 | |||
593 | if (tcstat & bit) { | ||
594 | writel(bit, dmac->regs + PL080_TC_CLEAR); | ||
595 | res = S3C2410_RES_OK; | ||
596 | } | ||
597 | |||
598 | if (errstat & bit) | ||
599 | writel(bit, dmac->regs + PL080_ERR_CLEAR); | ||
600 | |||
601 | /* 'next' points to the buffer that is next to the | ||
602 | * currently active buffer. | ||
603 | * For CIRCULAR queues, 'next' will be same as 'curr' | ||
604 | * when 'end' is the active buffer. | ||
605 | */ | ||
606 | buff = chan->curr; | ||
607 | while (buff && buff != chan->next | ||
608 | && buff->next != chan->next) | ||
609 | buff = buff->next; | ||
610 | |||
611 | if (!buff) | ||
612 | BUG(); | ||
613 | |||
614 | if (buff == chan->next) | ||
615 | buff = chan->end; | ||
616 | |||
617 | s3c64xx_dma_bufffdone(chan, buff, res); | ||
618 | |||
619 | /* Free the node and update curr, if non-circular queue */ | ||
620 | if (!(chan->flags & S3C2410_DMAF_CIRCULAR)) { | ||
621 | chan->curr = buff->next; | ||
622 | s3c64xx_dma_freebuff(buff); | ||
623 | } | ||
624 | |||
625 | /* Update 'next' */ | ||
626 | buff = chan->next; | ||
627 | if (chan->next == chan->end) { | ||
628 | chan->next = chan->curr; | ||
629 | if (!(chan->flags & S3C2410_DMAF_CIRCULAR)) | ||
630 | chan->end = NULL; | ||
631 | } else { | ||
632 | chan->next = buff->next; | ||
633 | } | ||
634 | } | ||
635 | |||
636 | return IRQ_HANDLED; | ||
637 | } | ||
638 | |||
639 | static struct bus_type dma_subsys = { | ||
640 | .name = "s3c64xx-dma", | ||
641 | .dev_name = "s3c64xx-dma", | ||
642 | }; | ||
643 | |||
644 | static int s3c64xx_dma_init1(int chno, enum dma_ch chbase, | ||
645 | int irq, unsigned int base) | ||
646 | { | ||
647 | struct s3c2410_dma_chan *chptr = &s3c2410_chans[chno]; | ||
648 | struct s3c64xx_dmac *dmac; | ||
649 | char clkname[16]; | ||
650 | void __iomem *regs; | ||
651 | void __iomem *regptr; | ||
652 | int err, ch; | ||
653 | |||
654 | dmac = kzalloc(sizeof(struct s3c64xx_dmac), GFP_KERNEL); | ||
655 | if (!dmac) { | ||
656 | printk(KERN_ERR "%s: failed to alloc mem\n", __func__); | ||
657 | return -ENOMEM; | ||
658 | } | ||
659 | |||
660 | dmac->dev.id = chno / 8; | ||
661 | dmac->dev.bus = &dma_subsys; | ||
662 | |||
663 | err = device_register(&dmac->dev); | ||
664 | if (err) { | ||
665 | printk(KERN_ERR "%s: failed to register device\n", __func__); | ||
666 | goto err_alloc; | ||
667 | } | ||
668 | |||
669 | regs = ioremap(base, 0x200); | ||
670 | if (!regs) { | ||
671 | printk(KERN_ERR "%s: failed to ioremap()\n", __func__); | ||
672 | err = -ENXIO; | ||
673 | goto err_dev; | ||
674 | } | ||
675 | |||
676 | snprintf(clkname, sizeof(clkname), "dma%d", dmac->dev.id); | ||
677 | |||
678 | dmac->clk = clk_get(NULL, clkname); | ||
679 | if (IS_ERR(dmac->clk)) { | ||
680 | printk(KERN_ERR "%s: failed to get clock %s\n", __func__, clkname); | ||
681 | err = PTR_ERR(dmac->clk); | ||
682 | goto err_map; | ||
683 | } | ||
684 | |||
685 | clk_prepare_enable(dmac->clk); | ||
686 | |||
687 | dmac->regs = regs; | ||
688 | dmac->chanbase = chbase; | ||
689 | dmac->channels = chptr; | ||
690 | |||
691 | err = request_irq(irq, s3c64xx_dma_irq, 0, "DMA", dmac); | ||
692 | if (err < 0) { | ||
693 | printk(KERN_ERR "%s: failed to get irq\n", __func__); | ||
694 | goto err_clk; | ||
695 | } | ||
696 | |||
697 | regptr = regs + PL080_Cx_BASE(0); | ||
698 | |||
699 | for (ch = 0; ch < 8; ch++, chptr++) { | ||
700 | pr_debug("%s: registering DMA %d (%p)\n", | ||
701 | __func__, chno + ch, regptr); | ||
702 | |||
703 | chptr->bit = 1 << ch; | ||
704 | chptr->number = chno + ch; | ||
705 | chptr->dmac = dmac; | ||
706 | chptr->regs = regptr; | ||
707 | regptr += PL080_Cx_STRIDE; | ||
708 | } | ||
709 | |||
710 | /* for the moment, permanently enable the controller */ | ||
711 | writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG); | ||
712 | |||
713 | printk(KERN_INFO "PL080: IRQ %d, at %p, channels %d..%d\n", | ||
714 | irq, regs, chno, chno+8); | ||
715 | |||
716 | return 0; | ||
717 | |||
718 | err_clk: | ||
719 | clk_disable_unprepare(dmac->clk); | ||
720 | clk_put(dmac->clk); | ||
721 | err_map: | ||
722 | iounmap(regs); | ||
723 | err_dev: | ||
724 | device_unregister(&dmac->dev); | ||
725 | err_alloc: | ||
726 | kfree(dmac); | ||
727 | return err; | ||
728 | } | ||
729 | |||
730 | static int __init s3c64xx_dma_init(void) | ||
731 | { | ||
732 | int ret; | ||
733 | |||
734 | /* This driver is not supported when booting with device tree. */ | ||
735 | if (of_have_populated_dt()) | ||
736 | return -ENODEV; | ||
737 | |||
738 | printk(KERN_INFO "%s: Registering DMA channels\n", __func__); | ||
739 | |||
740 | dma_pool = dma_pool_create("DMA-LLI", NULL, sizeof(struct pl080s_lli), 16, 0); | ||
741 | if (!dma_pool) { | ||
742 | printk(KERN_ERR "%s: failed to create pool\n", __func__); | ||
743 | return -ENOMEM; | ||
744 | } | ||
745 | |||
746 | ret = subsys_system_register(&dma_subsys, NULL); | ||
747 | if (ret) { | ||
748 | printk(KERN_ERR "%s: failed to create subsys\n", __func__); | ||
749 | return -ENOMEM; | ||
750 | } | ||
751 | |||
752 | /* Set all DMA configuration to be DMA, not SDMA */ | ||
753 | writel(0xffffff, S3C64XX_SDMA_SEL); | ||
754 | |||
755 | /* Register standard DMA controllers */ | ||
756 | s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); | ||
757 | s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x75100000); | ||
758 | |||
759 | return 0; | ||
760 | } | ||
761 | |||
762 | arch_initcall(s3c64xx_dma_init); | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h b/arch/arm/mach-s3c64xx/include/mach/dma.h index fe1a98cf0e4c..059b1fc85037 100644 --- a/arch/arm/mach-s3c64xx/include/mach/dma.h +++ b/arch/arm/mach-s3c64xx/include/mach/dma.h | |||
@@ -11,51 +11,48 @@ | |||
11 | #ifndef __ASM_ARCH_DMA_H | 11 | #ifndef __ASM_ARCH_DMA_H |
12 | #define __ASM_ARCH_DMA_H __FILE__ | 12 | #define __ASM_ARCH_DMA_H __FILE__ |
13 | 13 | ||
14 | #define S3C_DMA_CHANNELS (16) | 14 | #define S3C64XX_DMA_CHAN(name) ((unsigned long)(name)) |
15 | |||
16 | /* DMA0/SDMA0 */ | ||
17 | #define DMACH_UART0 S3C64XX_DMA_CHAN("uart0_tx") | ||
18 | #define DMACH_UART0_SRC2 S3C64XX_DMA_CHAN("uart0_rx") | ||
19 | #define DMACH_UART1 S3C64XX_DMA_CHAN("uart1_tx") | ||
20 | #define DMACH_UART1_SRC2 S3C64XX_DMA_CHAN("uart1_rx") | ||
21 | #define DMACH_UART2 S3C64XX_DMA_CHAN("uart2_tx") | ||
22 | #define DMACH_UART2_SRC2 S3C64XX_DMA_CHAN("uart2_rx") | ||
23 | #define DMACH_UART3 S3C64XX_DMA_CHAN("uart3_tx") | ||
24 | #define DMACH_UART3_SRC2 S3C64XX_DMA_CHAN("uart3_rx") | ||
25 | #define DMACH_PCM0_TX S3C64XX_DMA_CHAN("pcm0_tx") | ||
26 | #define DMACH_PCM0_RX S3C64XX_DMA_CHAN("pcm0_rx") | ||
27 | #define DMACH_I2S0_OUT S3C64XX_DMA_CHAN("i2s0_tx") | ||
28 | #define DMACH_I2S0_IN S3C64XX_DMA_CHAN("i2s0_rx") | ||
29 | #define DMACH_SPI0_TX S3C64XX_DMA_CHAN("spi0_tx") | ||
30 | #define DMACH_SPI0_RX S3C64XX_DMA_CHAN("spi0_rx") | ||
31 | #define DMACH_HSI_I2SV40_TX S3C64XX_DMA_CHAN("i2s2_tx") | ||
32 | #define DMACH_HSI_I2SV40_RX S3C64XX_DMA_CHAN("i2s2_rx") | ||
33 | |||
34 | /* DMA1/SDMA1 */ | ||
35 | #define DMACH_PCM1_TX S3C64XX_DMA_CHAN("pcm1_tx") | ||
36 | #define DMACH_PCM1_RX S3C64XX_DMA_CHAN("pcm1_rx") | ||
37 | #define DMACH_I2S1_OUT S3C64XX_DMA_CHAN("i2s1_tx") | ||
38 | #define DMACH_I2S1_IN S3C64XX_DMA_CHAN("i2s1_rx") | ||
39 | #define DMACH_SPI1_TX S3C64XX_DMA_CHAN("spi1_tx") | ||
40 | #define DMACH_SPI1_RX S3C64XX_DMA_CHAN("spi1_rx") | ||
41 | #define DMACH_AC97_PCMOUT S3C64XX_DMA_CHAN("ac97_out") | ||
42 | #define DMACH_AC97_PCMIN S3C64XX_DMA_CHAN("ac97_in") | ||
43 | #define DMACH_AC97_MICIN S3C64XX_DMA_CHAN("ac97_mic") | ||
44 | #define DMACH_PWM S3C64XX_DMA_CHAN("pwm") | ||
45 | #define DMACH_IRDA S3C64XX_DMA_CHAN("irda") | ||
46 | #define DMACH_EXTERNAL S3C64XX_DMA_CHAN("external") | ||
47 | #define DMACH_SECURITY_RX S3C64XX_DMA_CHAN("sec_rx") | ||
48 | #define DMACH_SECURITY_TX S3C64XX_DMA_CHAN("sec_tx") | ||
15 | 49 | ||
16 | /* see mach-s3c2410/dma.h for notes on dma channel numbers */ | ||
17 | |||
18 | /* Note, for the S3C64XX architecture we keep the DMACH_ | ||
19 | * defines in the order they are allocated to [S]DMA0/[S]DMA1 | ||
20 | * so that is easy to do DHACH_ -> DMA controller conversion | ||
21 | */ | ||
22 | enum dma_ch { | 50 | enum dma_ch { |
23 | /* DMA0/SDMA0 */ | 51 | DMACH_MAX = 32 |
24 | DMACH_UART0 = 0, | 52 | }; |
25 | DMACH_UART0_SRC2, | ||
26 | DMACH_UART1, | ||
27 | DMACH_UART1_SRC2, | ||
28 | DMACH_UART2, | ||
29 | DMACH_UART2_SRC2, | ||
30 | DMACH_UART3, | ||
31 | DMACH_UART3_SRC2, | ||
32 | DMACH_PCM0_TX, | ||
33 | DMACH_PCM0_RX, | ||
34 | DMACH_I2S0_OUT, | ||
35 | DMACH_I2S0_IN, | ||
36 | DMACH_SPI0_TX, | ||
37 | DMACH_SPI0_RX, | ||
38 | DMACH_HSI_I2SV40_TX, | ||
39 | DMACH_HSI_I2SV40_RX, | ||
40 | 53 | ||
41 | /* DMA1/SDMA1 */ | 54 | struct s3c2410_dma_client { |
42 | DMACH_PCM1_TX = 16, | 55 | char *name; |
43 | DMACH_PCM1_RX, | ||
44 | DMACH_I2S1_OUT, | ||
45 | DMACH_I2S1_IN, | ||
46 | DMACH_SPI1_TX, | ||
47 | DMACH_SPI1_RX, | ||
48 | DMACH_AC97_PCMOUT, | ||
49 | DMACH_AC97_PCMIN, | ||
50 | DMACH_AC97_MICIN, | ||
51 | DMACH_PWM, | ||
52 | DMACH_IRDA, | ||
53 | DMACH_EXTERNAL, | ||
54 | DMACH_RES1, | ||
55 | DMACH_RES2, | ||
56 | DMACH_SECURITY_RX, /* SDMA1 only */ | ||
57 | DMACH_SECURITY_TX, /* SDMA1 only */ | ||
58 | DMACH_MAX /* the end */ | ||
59 | }; | 56 | }; |
60 | 57 | ||
61 | static inline bool samsung_dma_has_circular(void) | 58 | static inline bool samsung_dma_has_circular(void) |
@@ -65,67 +62,10 @@ static inline bool samsung_dma_has_circular(void) | |||
65 | 62 | ||
66 | static inline bool samsung_dma_is_dmadev(void) | 63 | static inline bool samsung_dma_is_dmadev(void) |
67 | { | 64 | { |
68 | return false; | 65 | return true; |
69 | } | 66 | } |
70 | #define S3C2410_DMAF_CIRCULAR (1 << 0) | ||
71 | |||
72 | #include <plat/dma.h> | ||
73 | |||
74 | #define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ | ||
75 | |||
76 | struct s3c64xx_dma_buff; | ||
77 | |||
78 | /** s3c64xx_dma_buff - S3C64XX DMA buffer descriptor | ||
79 | * @next: Pointer to next buffer in queue or ring. | ||
80 | * @pw: Client provided identifier | ||
81 | * @lli: Pointer to hardware descriptor this buffer is associated with. | ||
82 | * @lli_dma: Hardare address of the descriptor. | ||
83 | */ | ||
84 | struct s3c64xx_dma_buff { | ||
85 | struct s3c64xx_dma_buff *next; | ||
86 | |||
87 | void *pw; | ||
88 | struct pl080s_lli *lli; | ||
89 | dma_addr_t lli_dma; | ||
90 | }; | ||
91 | |||
92 | struct s3c64xx_dmac; | ||
93 | |||
94 | struct s3c2410_dma_chan { | ||
95 | unsigned char number; /* number of this dma channel */ | ||
96 | unsigned char in_use; /* channel allocated */ | ||
97 | unsigned char bit; /* bit for enable/disable/etc */ | ||
98 | unsigned char hw_width; | ||
99 | unsigned char peripheral; | ||
100 | |||
101 | unsigned int flags; | ||
102 | enum dma_data_direction source; | ||
103 | |||
104 | |||
105 | dma_addr_t dev_addr; | ||
106 | |||
107 | struct s3c2410_dma_client *client; | ||
108 | struct s3c64xx_dmac *dmac; /* pointer to controller */ | ||
109 | |||
110 | void __iomem *regs; | ||
111 | |||
112 | /* cdriver callbacks */ | ||
113 | s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ | ||
114 | s3c2410_dma_opfn_t op_fn; /* channel op callback */ | ||
115 | |||
116 | /* buffer list and information */ | ||
117 | struct s3c64xx_dma_buff *curr; /* current dma buffer */ | ||
118 | struct s3c64xx_dma_buff *next; /* next buffer to load */ | ||
119 | struct s3c64xx_dma_buff *end; /* end of queue */ | ||
120 | |||
121 | /* note, when channel is running in circular mode, curr is the | ||
122 | * first buffer enqueued, end is the last and curr is where the | ||
123 | * last buffer-done event is set-at. The buffers are not freed | ||
124 | * and the last buffer hardware descriptor points back to the | ||
125 | * first. | ||
126 | */ | ||
127 | }; | ||
128 | 67 | ||
129 | #include <plat/dma-core.h> | 68 | #include <linux/amba/pl08x.h> |
69 | #include <plat/dma-ops.h> | ||
130 | 70 | ||
131 | #endif /* __ASM_ARCH_IRQ_H */ | 71 | #endif /* __ASM_ARCH_IRQ_H */ |
diff --git a/arch/arm/mach-s3c64xx/pl080.c b/arch/arm/mach-s3c64xx/pl080.c new file mode 100644 index 000000000000..901a984bddc2 --- /dev/null +++ b/arch/arm/mach-s3c64xx/pl080.c | |||
@@ -0,0 +1,244 @@ | |||
1 | /* | ||
2 | * Samsung's S3C64XX generic DMA support using amba-pl08x driver. | ||
3 | * | ||
4 | * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/amba/bus.h> | ||
13 | #include <linux/amba/pl080.h> | ||
14 | #include <linux/amba/pl08x.h> | ||
15 | #include <linux/of.h> | ||
16 | |||
17 | #include <mach/irqs.h> | ||
18 | #include <mach/map.h> | ||
19 | |||
20 | #include "regs-sys.h" | ||
21 | |||
22 | static int pl08x_get_xfer_signal(const struct pl08x_channel_data *cd) | ||
23 | { | ||
24 | return cd->min_signal; | ||
25 | } | ||
26 | |||
27 | static void pl08x_put_xfer_signal(const struct pl08x_channel_data *cd, int ch) | ||
28 | { | ||
29 | } | ||
30 | |||
31 | /* | ||
32 | * DMA0 | ||
33 | */ | ||
34 | |||
35 | static struct pl08x_channel_data s3c64xx_dma0_info[] = { | ||
36 | { | ||
37 | .bus_id = "uart0_tx", | ||
38 | .min_signal = 0, | ||
39 | .max_signal = 0, | ||
40 | .periph_buses = PL08X_AHB2, | ||
41 | }, { | ||
42 | .bus_id = "uart0_rx", | ||
43 | .min_signal = 1, | ||
44 | .max_signal = 1, | ||
45 | .periph_buses = PL08X_AHB2, | ||
46 | }, { | ||
47 | .bus_id = "uart1_tx", | ||
48 | .min_signal = 2, | ||
49 | .max_signal = 2, | ||
50 | .periph_buses = PL08X_AHB2, | ||
51 | }, { | ||
52 | .bus_id = "uart1_rx", | ||
53 | .min_signal = 3, | ||
54 | .max_signal = 3, | ||
55 | .periph_buses = PL08X_AHB2, | ||
56 | }, { | ||
57 | .bus_id = "uart2_tx", | ||
58 | .min_signal = 4, | ||
59 | .max_signal = 4, | ||
60 | .periph_buses = PL08X_AHB2, | ||
61 | }, { | ||
62 | .bus_id = "uart2_rx", | ||
63 | .min_signal = 5, | ||
64 | .max_signal = 5, | ||
65 | .periph_buses = PL08X_AHB2, | ||
66 | }, { | ||
67 | .bus_id = "uart3_tx", | ||
68 | .min_signal = 6, | ||
69 | .max_signal = 6, | ||
70 | .periph_buses = PL08X_AHB2, | ||
71 | }, { | ||
72 | .bus_id = "uart3_rx", | ||
73 | .min_signal = 7, | ||
74 | .max_signal = 7, | ||
75 | .periph_buses = PL08X_AHB2, | ||
76 | }, { | ||
77 | .bus_id = "pcm0_tx", | ||
78 | .min_signal = 8, | ||
79 | .max_signal = 8, | ||
80 | .periph_buses = PL08X_AHB2, | ||
81 | }, { | ||
82 | .bus_id = "pcm0_rx", | ||
83 | .min_signal = 9, | ||
84 | .max_signal = 9, | ||
85 | .periph_buses = PL08X_AHB2, | ||
86 | }, { | ||
87 | .bus_id = "i2s0_tx", | ||
88 | .min_signal = 10, | ||
89 | .max_signal = 10, | ||
90 | .periph_buses = PL08X_AHB2, | ||
91 | }, { | ||
92 | .bus_id = "i2s0_rx", | ||
93 | .min_signal = 11, | ||
94 | .max_signal = 11, | ||
95 | .periph_buses = PL08X_AHB2, | ||
96 | }, { | ||
97 | .bus_id = "spi0_tx", | ||
98 | .min_signal = 12, | ||
99 | .max_signal = 12, | ||
100 | .periph_buses = PL08X_AHB2, | ||
101 | }, { | ||
102 | .bus_id = "spi0_rx", | ||
103 | .min_signal = 13, | ||
104 | .max_signal = 13, | ||
105 | .periph_buses = PL08X_AHB2, | ||
106 | }, { | ||
107 | .bus_id = "i2s2_tx", | ||
108 | .min_signal = 14, | ||
109 | .max_signal = 14, | ||
110 | .periph_buses = PL08X_AHB2, | ||
111 | }, { | ||
112 | .bus_id = "i2s2_rx", | ||
113 | .min_signal = 15, | ||
114 | .max_signal = 15, | ||
115 | .periph_buses = PL08X_AHB2, | ||
116 | } | ||
117 | }; | ||
118 | |||
119 | struct pl08x_platform_data s3c64xx_dma0_plat_data = { | ||
120 | .memcpy_channel = { | ||
121 | .bus_id = "memcpy", | ||
122 | .cctl_memcpy = | ||
123 | (PL080_BSIZE_4 << PL080_CONTROL_SB_SIZE_SHIFT | | ||
124 | PL080_BSIZE_4 << PL080_CONTROL_DB_SIZE_SHIFT | | ||
125 | PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | | ||
126 | PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | | ||
127 | PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | | ||
128 | PL080_CONTROL_PROT_SYS), | ||
129 | }, | ||
130 | .lli_buses = PL08X_AHB1, | ||
131 | .mem_buses = PL08X_AHB1, | ||
132 | .get_xfer_signal = pl08x_get_xfer_signal, | ||
133 | .put_xfer_signal = pl08x_put_xfer_signal, | ||
134 | .slave_channels = s3c64xx_dma0_info, | ||
135 | .num_slave_channels = ARRAY_SIZE(s3c64xx_dma0_info), | ||
136 | }; | ||
137 | |||
138 | static AMBA_AHB_DEVICE(s3c64xx_dma0, "dma-pl080s.0", 0, | ||
139 | 0x75000000, {IRQ_DMA0}, &s3c64xx_dma0_plat_data); | ||
140 | |||
141 | /* | ||
142 | * DMA1 | ||
143 | */ | ||
144 | |||
145 | static struct pl08x_channel_data s3c64xx_dma1_info[] = { | ||
146 | { | ||
147 | .bus_id = "pcm1_tx", | ||
148 | .min_signal = 0, | ||
149 | .max_signal = 0, | ||
150 | .periph_buses = PL08X_AHB2, | ||
151 | }, { | ||
152 | .bus_id = "pcm1_rx", | ||
153 | .min_signal = 1, | ||
154 | .max_signal = 1, | ||
155 | .periph_buses = PL08X_AHB2, | ||
156 | }, { | ||
157 | .bus_id = "i2s1_tx", | ||
158 | .min_signal = 2, | ||
159 | .max_signal = 2, | ||
160 | .periph_buses = PL08X_AHB2, | ||
161 | }, { | ||
162 | .bus_id = "i2s1_rx", | ||
163 | .min_signal = 3, | ||
164 | .max_signal = 3, | ||
165 | .periph_buses = PL08X_AHB2, | ||
166 | }, { | ||
167 | .bus_id = "spi1_tx", | ||
168 | .min_signal = 4, | ||
169 | .max_signal = 4, | ||
170 | .periph_buses = PL08X_AHB2, | ||
171 | }, { | ||
172 | .bus_id = "spi1_rx", | ||
173 | .min_signal = 5, | ||
174 | .max_signal = 5, | ||
175 | .periph_buses = PL08X_AHB2, | ||
176 | }, { | ||
177 | .bus_id = "ac97_out", | ||
178 | .min_signal = 6, | ||
179 | .max_signal = 6, | ||
180 | .periph_buses = PL08X_AHB2, | ||
181 | }, { | ||
182 | .bus_id = "ac97_in", | ||
183 | .min_signal = 7, | ||
184 | .max_signal = 7, | ||
185 | .periph_buses = PL08X_AHB2, | ||
186 | }, { | ||
187 | .bus_id = "ac97_mic", | ||
188 | .min_signal = 8, | ||
189 | .max_signal = 8, | ||
190 | .periph_buses = PL08X_AHB2, | ||
191 | }, { | ||
192 | .bus_id = "pwm", | ||
193 | .min_signal = 9, | ||
194 | .max_signal = 9, | ||
195 | .periph_buses = PL08X_AHB2, | ||
196 | }, { | ||
197 | .bus_id = "irda", | ||
198 | .min_signal = 10, | ||
199 | .max_signal = 10, | ||
200 | .periph_buses = PL08X_AHB2, | ||
201 | }, { | ||
202 | .bus_id = "external", | ||
203 | .min_signal = 11, | ||
204 | .max_signal = 11, | ||
205 | .periph_buses = PL08X_AHB2, | ||
206 | }, | ||
207 | }; | ||
208 | |||
209 | struct pl08x_platform_data s3c64xx_dma1_plat_data = { | ||
210 | .memcpy_channel = { | ||
211 | .bus_id = "memcpy", | ||
212 | .cctl_memcpy = | ||
213 | (PL080_BSIZE_4 << PL080_CONTROL_SB_SIZE_SHIFT | | ||
214 | PL080_BSIZE_4 << PL080_CONTROL_DB_SIZE_SHIFT | | ||
215 | PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | | ||
216 | PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | | ||
217 | PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | | ||
218 | PL080_CONTROL_PROT_SYS), | ||
219 | }, | ||
220 | .lli_buses = PL08X_AHB1, | ||
221 | .mem_buses = PL08X_AHB1, | ||
222 | .get_xfer_signal = pl08x_get_xfer_signal, | ||
223 | .put_xfer_signal = pl08x_put_xfer_signal, | ||
224 | .slave_channels = s3c64xx_dma1_info, | ||
225 | .num_slave_channels = ARRAY_SIZE(s3c64xx_dma1_info), | ||
226 | }; | ||
227 | |||
228 | static AMBA_AHB_DEVICE(s3c64xx_dma1, "dma-pl080s.1", 0, | ||
229 | 0x75100000, {IRQ_DMA1}, &s3c64xx_dma1_plat_data); | ||
230 | |||
231 | static int __init s3c64xx_pl080_init(void) | ||
232 | { | ||
233 | /* Set all DMA configuration to be DMA, not SDMA */ | ||
234 | writel(0xffffff, S3C64XX_SDMA_SEL); | ||
235 | |||
236 | if (of_have_populated_dt()) | ||
237 | return 0; | ||
238 | |||
239 | amba_device_register(&s3c64xx_dma0_device, &iomem_resource); | ||
240 | amba_device_register(&s3c64xx_dma1_device, &iomem_resource); | ||
241 | |||
242 | return 0; | ||
243 | } | ||
244 | arch_initcall(s3c64xx_pl080_init); | ||
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c index 154e15f59702..43d6cb8c381d 100644 --- a/arch/arm/mach-ux500/board-mop500-audio.c +++ b/arch/arm/mach-ux500/board-mop500-audio.c | |||
@@ -31,7 +31,7 @@ static struct stedma40_chan_cfg msp0_dma_tx = { | |||
31 | }; | 31 | }; |
32 | 32 | ||
33 | struct msp_i2s_platform_data msp0_platform_data = { | 33 | struct msp_i2s_platform_data msp0_platform_data = { |
34 | .id = MSP_I2S_0, | 34 | .id = 0, |
35 | .msp_i2s_dma_rx = &msp0_dma_rx, | 35 | .msp_i2s_dma_rx = &msp0_dma_rx, |
36 | .msp_i2s_dma_tx = &msp0_dma_tx, | 36 | .msp_i2s_dma_tx = &msp0_dma_tx, |
37 | }; | 37 | }; |
@@ -49,7 +49,7 @@ static struct stedma40_chan_cfg msp1_dma_tx = { | |||
49 | }; | 49 | }; |
50 | 50 | ||
51 | struct msp_i2s_platform_data msp1_platform_data = { | 51 | struct msp_i2s_platform_data msp1_platform_data = { |
52 | .id = MSP_I2S_1, | 52 | .id = 1, |
53 | .msp_i2s_dma_rx = NULL, | 53 | .msp_i2s_dma_rx = NULL, |
54 | .msp_i2s_dma_tx = &msp1_dma_tx, | 54 | .msp_i2s_dma_tx = &msp1_dma_tx, |
55 | }; | 55 | }; |
@@ -69,13 +69,13 @@ static struct stedma40_chan_cfg msp2_dma_tx = { | |||
69 | }; | 69 | }; |
70 | 70 | ||
71 | struct msp_i2s_platform_data msp2_platform_data = { | 71 | struct msp_i2s_platform_data msp2_platform_data = { |
72 | .id = MSP_I2S_2, | 72 | .id = 2, |
73 | .msp_i2s_dma_rx = &msp2_dma_rx, | 73 | .msp_i2s_dma_rx = &msp2_dma_rx, |
74 | .msp_i2s_dma_tx = &msp2_dma_tx, | 74 | .msp_i2s_dma_tx = &msp2_dma_tx, |
75 | }; | 75 | }; |
76 | 76 | ||
77 | struct msp_i2s_platform_data msp3_platform_data = { | 77 | struct msp_i2s_platform_data msp3_platform_data = { |
78 | .id = MSP_I2S_3, | 78 | .id = 3, |
79 | .msp_i2s_dma_rx = &msp1_dma_rx, | 79 | .msp_i2s_dma_rx = &msp1_dma_rx, |
80 | .msp_i2s_dma_tx = NULL, | 80 | .msp_i2s_dma_tx = NULL, |
81 | }; | 81 | }; |
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 99a3590f0349..ac07e871f6a7 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -1468,6 +1468,8 @@ void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |||
1468 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; | 1468 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; |
1469 | #if defined(CONFIG_PL330_DMA) | 1469 | #if defined(CONFIG_PL330_DMA) |
1470 | pd.filter = pl330_filter; | 1470 | pd.filter = pl330_filter; |
1471 | #elif defined(CONFIG_S3C64XX_PL080) | ||
1472 | pd.filter = pl08x_filter_id; | ||
1471 | #elif defined(CONFIG_S3C24XX_DMAC) | 1473 | #elif defined(CONFIG_S3C24XX_DMAC) |
1472 | pd.filter = s3c24xx_dma_filter; | 1474 | pd.filter = s3c24xx_dma_filter; |
1473 | #endif | 1475 | #endif |
@@ -1509,8 +1511,10 @@ void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |||
1509 | pd.num_cs = num_cs; | 1511 | pd.num_cs = num_cs; |
1510 | pd.src_clk_nr = src_clk_nr; | 1512 | pd.src_clk_nr = src_clk_nr; |
1511 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; | 1513 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; |
1512 | #ifdef CONFIG_PL330_DMA | 1514 | #if defined(CONFIG_PL330_DMA) |
1513 | pd.filter = pl330_filter; | 1515 | pd.filter = pl330_filter; |
1516 | #elif defined(CONFIG_S3C64XX_PL080) | ||
1517 | pd.filter = pl08x_filter_id; | ||
1514 | #endif | 1518 | #endif |
1515 | 1519 | ||
1516 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); | 1520 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); |
@@ -1550,8 +1554,10 @@ void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |||
1550 | pd.num_cs = num_cs; | 1554 | pd.num_cs = num_cs; |
1551 | pd.src_clk_nr = src_clk_nr; | 1555 | pd.src_clk_nr = src_clk_nr; |
1552 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; | 1556 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; |
1553 | #ifdef CONFIG_PL330_DMA | 1557 | #if defined(CONFIG_PL330_DMA) |
1554 | pd.filter = pl330_filter; | 1558 | pd.filter = pl330_filter; |
1559 | #elif defined(CONFIG_S3C64XX_PL080) | ||
1560 | pd.filter = pl08x_filter_id; | ||
1555 | #endif | 1561 | #endif |
1556 | 1562 | ||
1557 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); | 1563 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); |
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c index ec0d731b0e7b..886326ee6f6c 100644 --- a/arch/arm/plat-samsung/dma-ops.c +++ b/arch/arm/plat-samsung/dma-ops.c | |||
@@ -18,6 +18,12 @@ | |||
18 | 18 | ||
19 | #include <mach/dma.h> | 19 | #include <mach/dma.h> |
20 | 20 | ||
21 | #if defined(CONFIG_PL330_DMA) | ||
22 | #define dma_filter pl330_filter | ||
23 | #elif defined(CONFIG_S3C64XX_PL080) | ||
24 | #define dma_filter pl08x_filter_id | ||
25 | #endif | ||
26 | |||
21 | static unsigned samsung_dmadev_request(enum dma_ch dma_ch, | 27 | static unsigned samsung_dmadev_request(enum dma_ch dma_ch, |
22 | struct samsung_dma_req *param, | 28 | struct samsung_dma_req *param, |
23 | struct device *dev, char *ch_name) | 29 | struct device *dev, char *ch_name) |
@@ -30,7 +36,7 @@ static unsigned samsung_dmadev_request(enum dma_ch dma_ch, | |||
30 | if (dev->of_node) | 36 | if (dev->of_node) |
31 | return (unsigned)dma_request_slave_channel(dev, ch_name); | 37 | return (unsigned)dma_request_slave_channel(dev, ch_name); |
32 | else | 38 | else |
33 | return (unsigned)dma_request_channel(mask, pl330_filter, | 39 | return (unsigned)dma_request_channel(mask, dma_filter, |
34 | (void *)dma_ch); | 40 | (void *)dma_ch); |
35 | } | 41 | } |
36 | 42 | ||
diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c index 7d2c84265947..8e27aee6887e 100644 --- a/drivers/clk/samsung/clk-s3c64xx.c +++ b/drivers/clk/samsung/clk-s3c64xx.c | |||
@@ -331,8 +331,8 @@ static struct samsung_clock_alias s3c64xx_clock_aliases[] = { | |||
331 | ALIAS(HCLK_HSMMC1, "s3c-sdhci.1", "mmc_busclk.0"), | 331 | ALIAS(HCLK_HSMMC1, "s3c-sdhci.1", "mmc_busclk.0"), |
332 | ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "hsmmc"), | 332 | ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "hsmmc"), |
333 | ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "mmc_busclk.0"), | 333 | ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "mmc_busclk.0"), |
334 | ALIAS(HCLK_DMA1, NULL, "dma1"), | 334 | ALIAS(HCLK_DMA1, "dma-pl080s.1", "apb_pclk"), |
335 | ALIAS(HCLK_DMA0, NULL, "dma0"), | 335 | ALIAS(HCLK_DMA0, "dma-pl080s.0", "apb_pclk"), |
336 | ALIAS(HCLK_CAMIF, "s3c-camif", "camif"), | 336 | ALIAS(HCLK_CAMIF, "s3c-camif", "camif"), |
337 | ALIAS(HCLK_LCD, "s3c-fb", "lcd"), | 337 | ALIAS(HCLK_LCD, "s3c-fb", "lcd"), |
338 | ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi"), | 338 | ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi"), |
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index ef63b9058f3c..92caad629d99 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c | |||
@@ -540,6 +540,8 @@ EXPORT_SYMBOL_GPL(dma_get_slave_channel); | |||
540 | * @mask: capabilities that the channel must satisfy | 540 | * @mask: capabilities that the channel must satisfy |
541 | * @fn: optional callback to disposition available channels | 541 | * @fn: optional callback to disposition available channels |
542 | * @fn_param: opaque parameter to pass to dma_filter_fn | 542 | * @fn_param: opaque parameter to pass to dma_filter_fn |
543 | * | ||
544 | * Returns pointer to appropriate DMA channel on success or NULL. | ||
543 | */ | 545 | */ |
544 | struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, | 546 | struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, |
545 | dma_filter_fn fn, void *fn_param) | 547 | dma_filter_fn fn, void *fn_param) |
@@ -591,18 +593,43 @@ EXPORT_SYMBOL_GPL(__dma_request_channel); | |||
591 | * dma_request_slave_channel - try to allocate an exclusive slave channel | 593 | * dma_request_slave_channel - try to allocate an exclusive slave channel |
592 | * @dev: pointer to client device structure | 594 | * @dev: pointer to client device structure |
593 | * @name: slave channel name | 595 | * @name: slave channel name |
596 | * | ||
597 | * Returns pointer to appropriate DMA channel on success or an error pointer. | ||
594 | */ | 598 | */ |
595 | struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name) | 599 | struct dma_chan *dma_request_slave_channel_reason(struct device *dev, |
600 | const char *name) | ||
596 | { | 601 | { |
602 | struct dma_chan *chan; | ||
603 | |||
597 | /* If device-tree is present get slave info from here */ | 604 | /* If device-tree is present get slave info from here */ |
598 | if (dev->of_node) | 605 | if (dev->of_node) |
599 | return of_dma_request_slave_channel(dev->of_node, name); | 606 | return of_dma_request_slave_channel(dev->of_node, name); |
600 | 607 | ||
601 | /* If device was enumerated by ACPI get slave info from here */ | 608 | /* If device was enumerated by ACPI get slave info from here */ |
602 | if (ACPI_HANDLE(dev)) | 609 | if (ACPI_HANDLE(dev)) { |
603 | return acpi_dma_request_slave_chan_by_name(dev, name); | 610 | chan = acpi_dma_request_slave_chan_by_name(dev, name); |
611 | if (chan) | ||
612 | return chan; | ||
613 | } | ||
604 | 614 | ||
605 | return NULL; | 615 | return ERR_PTR(-ENODEV); |
616 | } | ||
617 | EXPORT_SYMBOL_GPL(dma_request_slave_channel_reason); | ||
618 | |||
619 | /** | ||
620 | * dma_request_slave_channel - try to allocate an exclusive slave channel | ||
621 | * @dev: pointer to client device structure | ||
622 | * @name: slave channel name | ||
623 | * | ||
624 | * Returns pointer to appropriate DMA channel on success or NULL. | ||
625 | */ | ||
626 | struct dma_chan *dma_request_slave_channel(struct device *dev, | ||
627 | const char *name) | ||
628 | { | ||
629 | struct dma_chan *ch = dma_request_slave_channel_reason(dev, name); | ||
630 | if (IS_ERR(ch)) | ||
631 | return NULL; | ||
632 | return ch; | ||
606 | } | 633 | } |
607 | EXPORT_SYMBOL_GPL(dma_request_slave_channel); | 634 | EXPORT_SYMBOL_GPL(dma_request_slave_channel); |
608 | 635 | ||
diff --git a/drivers/dma/of-dma.c b/drivers/dma/of-dma.c index 0b88dd3d05f4..e8fe9dc455f4 100644 --- a/drivers/dma/of-dma.c +++ b/drivers/dma/of-dma.c | |||
@@ -143,7 +143,7 @@ static int of_dma_match_channel(struct device_node *np, const char *name, | |||
143 | * @np: device node to get DMA request from | 143 | * @np: device node to get DMA request from |
144 | * @name: name of desired channel | 144 | * @name: name of desired channel |
145 | * | 145 | * |
146 | * Returns pointer to appropriate dma channel on success or NULL on error. | 146 | * Returns pointer to appropriate DMA channel on success or an error pointer. |
147 | */ | 147 | */ |
148 | struct dma_chan *of_dma_request_slave_channel(struct device_node *np, | 148 | struct dma_chan *of_dma_request_slave_channel(struct device_node *np, |
149 | const char *name) | 149 | const char *name) |
@@ -152,17 +152,18 @@ struct dma_chan *of_dma_request_slave_channel(struct device_node *np, | |||
152 | struct of_dma *ofdma; | 152 | struct of_dma *ofdma; |
153 | struct dma_chan *chan; | 153 | struct dma_chan *chan; |
154 | int count, i; | 154 | int count, i; |
155 | int ret_no_channel = -ENODEV; | ||
155 | 156 | ||
156 | if (!np || !name) { | 157 | if (!np || !name) { |
157 | pr_err("%s: not enough information provided\n", __func__); | 158 | pr_err("%s: not enough information provided\n", __func__); |
158 | return NULL; | 159 | return ERR_PTR(-ENODEV); |
159 | } | 160 | } |
160 | 161 | ||
161 | count = of_property_count_strings(np, "dma-names"); | 162 | count = of_property_count_strings(np, "dma-names"); |
162 | if (count < 0) { | 163 | if (count < 0) { |
163 | pr_err("%s: dma-names property of node '%s' missing or empty\n", | 164 | pr_err("%s: dma-names property of node '%s' missing or empty\n", |
164 | __func__, np->full_name); | 165 | __func__, np->full_name); |
165 | return NULL; | 166 | return ERR_PTR(-ENODEV); |
166 | } | 167 | } |
167 | 168 | ||
168 | for (i = 0; i < count; i++) { | 169 | for (i = 0; i < count; i++) { |
@@ -172,10 +173,12 @@ struct dma_chan *of_dma_request_slave_channel(struct device_node *np, | |||
172 | mutex_lock(&of_dma_lock); | 173 | mutex_lock(&of_dma_lock); |
173 | ofdma = of_dma_find_controller(&dma_spec); | 174 | ofdma = of_dma_find_controller(&dma_spec); |
174 | 175 | ||
175 | if (ofdma) | 176 | if (ofdma) { |
176 | chan = ofdma->of_dma_xlate(&dma_spec, ofdma); | 177 | chan = ofdma->of_dma_xlate(&dma_spec, ofdma); |
177 | else | 178 | } else { |
179 | ret_no_channel = -EPROBE_DEFER; | ||
178 | chan = NULL; | 180 | chan = NULL; |
181 | } | ||
179 | 182 | ||
180 | mutex_unlock(&of_dma_lock); | 183 | mutex_unlock(&of_dma_lock); |
181 | 184 | ||
@@ -185,7 +188,7 @@ struct dma_chan *of_dma_request_slave_channel(struct device_node *np, | |||
185 | return chan; | 188 | return chan; |
186 | } | 189 | } |
187 | 190 | ||
188 | return NULL; | 191 | return ERR_PTR(ret_no_channel); |
189 | } | 192 | } |
190 | 193 | ||
191 | /** | 194 | /** |
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 536632f6479c..c90edecee463 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c | |||
@@ -2884,6 +2884,7 @@ static int pl330_dma_device_slave_caps(struct dma_chan *dchan, | |||
2884 | caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); | 2884 | caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); |
2885 | caps->cmd_pause = false; | 2885 | caps->cmd_pause = false; |
2886 | caps->cmd_terminate = true; | 2886 | caps->cmd_terminate = true; |
2887 | caps->residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR; | ||
2887 | 2888 | ||
2888 | return 0; | 2889 | return 0; |
2889 | } | 2890 | } |
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c index 29473c2c95ae..6ef7685a4cf8 100644 --- a/drivers/mfd/twl-core.c +++ b/drivers/mfd/twl-core.c | |||
@@ -47,6 +47,9 @@ | |||
47 | #include <linux/i2c.h> | 47 | #include <linux/i2c.h> |
48 | #include <linux/i2c/twl.h> | 48 | #include <linux/i2c/twl.h> |
49 | 49 | ||
50 | /* Register descriptions for audio */ | ||
51 | #include <linux/mfd/twl4030-audio.h> | ||
52 | |||
50 | #include "twl-core.h" | 53 | #include "twl-core.h" |
51 | 54 | ||
52 | /* | 55 | /* |
@@ -200,6 +203,105 @@ static struct twl_mapping twl4030_map[] = { | |||
200 | { 2, TWL5031_BASEADD_INTERRUPTS }, | 203 | { 2, TWL5031_BASEADD_INTERRUPTS }, |
201 | }; | 204 | }; |
202 | 205 | ||
206 | static struct reg_default twl4030_49_defaults[] = { | ||
207 | /* Audio Registers */ | ||
208 | { 0x01, 0x00}, /* CODEC_MODE */ | ||
209 | { 0x02, 0x00}, /* OPTION */ | ||
210 | /* 0x03 Unused */ | ||
211 | { 0x04, 0x00}, /* MICBIAS_CTL */ | ||
212 | { 0x05, 0x00}, /* ANAMICL */ | ||
213 | { 0x06, 0x00}, /* ANAMICR */ | ||
214 | { 0x07, 0x00}, /* AVADC_CTL */ | ||
215 | { 0x08, 0x00}, /* ADCMICSEL */ | ||
216 | { 0x09, 0x00}, /* DIGMIXING */ | ||
217 | { 0x0a, 0x0f}, /* ATXL1PGA */ | ||
218 | { 0x0b, 0x0f}, /* ATXR1PGA */ | ||
219 | { 0x0c, 0x0f}, /* AVTXL2PGA */ | ||
220 | { 0x0d, 0x0f}, /* AVTXR2PGA */ | ||
221 | { 0x0e, 0x00}, /* AUDIO_IF */ | ||
222 | { 0x0f, 0x00}, /* VOICE_IF */ | ||
223 | { 0x10, 0x3f}, /* ARXR1PGA */ | ||
224 | { 0x11, 0x3f}, /* ARXL1PGA */ | ||
225 | { 0x12, 0x3f}, /* ARXR2PGA */ | ||
226 | { 0x13, 0x3f}, /* ARXL2PGA */ | ||
227 | { 0x14, 0x25}, /* VRXPGA */ | ||
228 | { 0x15, 0x00}, /* VSTPGA */ | ||
229 | { 0x16, 0x00}, /* VRX2ARXPGA */ | ||
230 | { 0x17, 0x00}, /* AVDAC_CTL */ | ||
231 | { 0x18, 0x00}, /* ARX2VTXPGA */ | ||
232 | { 0x19, 0x32}, /* ARXL1_APGA_CTL*/ | ||
233 | { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/ | ||
234 | { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/ | ||
235 | { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/ | ||
236 | { 0x1d, 0x00}, /* ATX2ARXPGA */ | ||
237 | { 0x1e, 0x00}, /* BT_IF */ | ||
238 | { 0x1f, 0x55}, /* BTPGA */ | ||
239 | { 0x20, 0x00}, /* BTSTPGA */ | ||
240 | { 0x21, 0x00}, /* EAR_CTL */ | ||
241 | { 0x22, 0x00}, /* HS_SEL */ | ||
242 | { 0x23, 0x00}, /* HS_GAIN_SET */ | ||
243 | { 0x24, 0x00}, /* HS_POPN_SET */ | ||
244 | { 0x25, 0x00}, /* PREDL_CTL */ | ||
245 | { 0x26, 0x00}, /* PREDR_CTL */ | ||
246 | { 0x27, 0x00}, /* PRECKL_CTL */ | ||
247 | { 0x28, 0x00}, /* PRECKR_CTL */ | ||
248 | { 0x29, 0x00}, /* HFL_CTL */ | ||
249 | { 0x2a, 0x00}, /* HFR_CTL */ | ||
250 | { 0x2b, 0x05}, /* ALC_CTL */ | ||
251 | { 0x2c, 0x00}, /* ALC_SET1 */ | ||
252 | { 0x2d, 0x00}, /* ALC_SET2 */ | ||
253 | { 0x2e, 0x00}, /* BOOST_CTL */ | ||
254 | { 0x2f, 0x00}, /* SOFTVOL_CTL */ | ||
255 | { 0x30, 0x13}, /* DTMF_FREQSEL */ | ||
256 | { 0x31, 0x00}, /* DTMF_TONEXT1H */ | ||
257 | { 0x32, 0x00}, /* DTMF_TONEXT1L */ | ||
258 | { 0x33, 0x00}, /* DTMF_TONEXT2H */ | ||
259 | { 0x34, 0x00}, /* DTMF_TONEXT2L */ | ||
260 | { 0x35, 0x79}, /* DTMF_TONOFF */ | ||
261 | { 0x36, 0x11}, /* DTMF_WANONOFF */ | ||
262 | { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */ | ||
263 | { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */ | ||
264 | { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */ | ||
265 | { 0x3a, 0x06}, /* APLL_CTL */ | ||
266 | { 0x3b, 0x00}, /* DTMF_CTL */ | ||
267 | { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */ | ||
268 | { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */ | ||
269 | { 0x3e, 0x00}, /* MISC_SET_1 */ | ||
270 | { 0x3f, 0x00}, /* PCMBTMUX */ | ||
271 | /* 0x40 - 0x42 Unused */ | ||
272 | { 0x43, 0x00}, /* RX_PATH_SEL */ | ||
273 | { 0x44, 0x32}, /* VDL_APGA_CTL */ | ||
274 | { 0x45, 0x00}, /* VIBRA_CTL */ | ||
275 | { 0x46, 0x00}, /* VIBRA_SET */ | ||
276 | { 0x47, 0x00}, /* VIBRA_PWM_SET */ | ||
277 | { 0x48, 0x00}, /* ANAMIC_GAIN */ | ||
278 | { 0x49, 0x00}, /* MISC_SET_2 */ | ||
279 | /* End of Audio Registers */ | ||
280 | }; | ||
281 | |||
282 | static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg) | ||
283 | { | ||
284 | switch (reg) { | ||
285 | case 0: | ||
286 | case 3: | ||
287 | case 40: | ||
288 | case 41: | ||
289 | case 42: | ||
290 | return false; | ||
291 | default: | ||
292 | return true; | ||
293 | } | ||
294 | } | ||
295 | |||
296 | static const struct regmap_range twl4030_49_volatile_ranges[] = { | ||
297 | regmap_reg_range(TWL4030_BASEADD_TEST, 0xff), | ||
298 | }; | ||
299 | |||
300 | static const struct regmap_access_table twl4030_49_volatile_table = { | ||
301 | .yes_ranges = twl4030_49_volatile_ranges, | ||
302 | .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges), | ||
303 | }; | ||
304 | |||
203 | static struct regmap_config twl4030_regmap_config[4] = { | 305 | static struct regmap_config twl4030_regmap_config[4] = { |
204 | { | 306 | { |
205 | /* Address 0x48 */ | 307 | /* Address 0x48 */ |
@@ -212,6 +314,15 @@ static struct regmap_config twl4030_regmap_config[4] = { | |||
212 | .reg_bits = 8, | 314 | .reg_bits = 8, |
213 | .val_bits = 8, | 315 | .val_bits = 8, |
214 | .max_register = 0xff, | 316 | .max_register = 0xff, |
317 | |||
318 | .readable_reg = twl4030_49_nop_reg, | ||
319 | .writeable_reg = twl4030_49_nop_reg, | ||
320 | |||
321 | .volatile_table = &twl4030_49_volatile_table, | ||
322 | |||
323 | .reg_defaults = twl4030_49_defaults, | ||
324 | .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults), | ||
325 | .cache_type = REGCACHE_RBTREE, | ||
215 | }, | 326 | }, |
216 | { | 327 | { |
217 | /* Address 0x4a */ | 328 | /* Address 0x4a */ |
@@ -302,35 +413,50 @@ unsigned int twl_rev(void) | |||
302 | EXPORT_SYMBOL(twl_rev); | 413 | EXPORT_SYMBOL(twl_rev); |
303 | 414 | ||
304 | /** | 415 | /** |
305 | * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0 | 416 | * twl_get_regmap - Get the regmap associated with the given module |
306 | * @mod_no: module number | 417 | * @mod_no: module number |
307 | * @value: an array of num_bytes+1 containing data to write | ||
308 | * @reg: register address (just offset will do) | ||
309 | * @num_bytes: number of bytes to transfer | ||
310 | * | 418 | * |
311 | * Returns the result of operation - 0 is success | 419 | * Returns the regmap pointer or NULL in case of failure. |
312 | */ | 420 | */ |
313 | int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) | 421 | static struct regmap *twl_get_regmap(u8 mod_no) |
314 | { | 422 | { |
315 | int ret; | ||
316 | int sid; | 423 | int sid; |
317 | struct twl_client *twl; | 424 | struct twl_client *twl; |
318 | 425 | ||
319 | if (unlikely(!twl_priv || !twl_priv->ready)) { | 426 | if (unlikely(!twl_priv || !twl_priv->ready)) { |
320 | pr_err("%s: not initialized\n", DRIVER_NAME); | 427 | pr_err("%s: not initialized\n", DRIVER_NAME); |
321 | return -EPERM; | 428 | return NULL; |
322 | } | 429 | } |
323 | if (unlikely(mod_no >= twl_get_last_module())) { | 430 | if (unlikely(mod_no >= twl_get_last_module())) { |
324 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); | 431 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); |
325 | return -EPERM; | 432 | return NULL; |
326 | } | 433 | } |
327 | 434 | ||
328 | sid = twl_priv->twl_map[mod_no].sid; | 435 | sid = twl_priv->twl_map[mod_no].sid; |
329 | twl = &twl_priv->twl_modules[sid]; | 436 | twl = &twl_priv->twl_modules[sid]; |
330 | 437 | ||
331 | ret = regmap_bulk_write(twl->regmap, | 438 | return twl->regmap; |
332 | twl_priv->twl_map[mod_no].base + reg, value, | 439 | } |
333 | num_bytes); | 440 | |
441 | /** | ||
442 | * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0 | ||
443 | * @mod_no: module number | ||
444 | * @value: an array of num_bytes+1 containing data to write | ||
445 | * @reg: register address (just offset will do) | ||
446 | * @num_bytes: number of bytes to transfer | ||
447 | * | ||
448 | * Returns the result of operation - 0 is success | ||
449 | */ | ||
450 | int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) | ||
451 | { | ||
452 | struct regmap *regmap = twl_get_regmap(mod_no); | ||
453 | int ret; | ||
454 | |||
455 | if (!regmap) | ||
456 | return -EPERM; | ||
457 | |||
458 | ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg, | ||
459 | value, num_bytes); | ||
334 | 460 | ||
335 | if (ret) | 461 | if (ret) |
336 | pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n", | 462 | pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n", |
@@ -351,25 +477,14 @@ EXPORT_SYMBOL(twl_i2c_write); | |||
351 | */ | 477 | */ |
352 | int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) | 478 | int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) |
353 | { | 479 | { |
480 | struct regmap *regmap = twl_get_regmap(mod_no); | ||
354 | int ret; | 481 | int ret; |
355 | int sid; | ||
356 | struct twl_client *twl; | ||
357 | 482 | ||
358 | if (unlikely(!twl_priv || !twl_priv->ready)) { | 483 | if (!regmap) |
359 | pr_err("%s: not initialized\n", DRIVER_NAME); | ||
360 | return -EPERM; | ||
361 | } | ||
362 | if (unlikely(mod_no >= twl_get_last_module())) { | ||
363 | pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); | ||
364 | return -EPERM; | 484 | return -EPERM; |
365 | } | ||
366 | |||
367 | sid = twl_priv->twl_map[mod_no].sid; | ||
368 | twl = &twl_priv->twl_modules[sid]; | ||
369 | 485 | ||
370 | ret = regmap_bulk_read(twl->regmap, | 486 | ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg, |
371 | twl_priv->twl_map[mod_no].base + reg, value, | 487 | value, num_bytes); |
372 | num_bytes); | ||
373 | 488 | ||
374 | if (ret) | 489 | if (ret) |
375 | pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n", | 490 | pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n", |
@@ -379,6 +494,27 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) | |||
379 | } | 494 | } |
380 | EXPORT_SYMBOL(twl_i2c_read); | 495 | EXPORT_SYMBOL(twl_i2c_read); |
381 | 496 | ||
497 | /** | ||
498 | * twl_regcache_bypass - Configure the regcache bypass for the regmap associated | ||
499 | * with the module | ||
500 | * @mod_no: module number | ||
501 | * @enable: Regcache bypass state | ||
502 | * | ||
503 | * Returns 0 else failure. | ||
504 | */ | ||
505 | int twl_set_regcache_bypass(u8 mod_no, bool enable) | ||
506 | { | ||
507 | struct regmap *regmap = twl_get_regmap(mod_no); | ||
508 | |||
509 | if (!regmap) | ||
510 | return -EPERM; | ||
511 | |||
512 | regcache_cache_bypass(regmap, enable); | ||
513 | |||
514 | return 0; | ||
515 | } | ||
516 | EXPORT_SYMBOL(twl_set_regcache_bypass); | ||
517 | |||
382 | /*----------------------------------------------------------------------*/ | 518 | /*----------------------------------------------------------------------*/ |
383 | 519 | ||
384 | /** | 520 | /** |
diff --git a/drivers/mfd/twl6040.c b/drivers/mfd/twl6040.c index 0779d5ab9ab1..51b6df1a7949 100644 --- a/drivers/mfd/twl6040.c +++ b/drivers/mfd/twl6040.c | |||
@@ -44,6 +44,54 @@ | |||
44 | #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1) | 44 | #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1) |
45 | #define TWL6040_NUM_SUPPLIES (2) | 45 | #define TWL6040_NUM_SUPPLIES (2) |
46 | 46 | ||
47 | static struct reg_default twl6040_defaults[] = { | ||
48 | { 0x01, 0x4B }, /* REG_ASICID (ro) */ | ||
49 | { 0x02, 0x00 }, /* REG_ASICREV (ro) */ | ||
50 | { 0x03, 0x00 }, /* REG_INTID */ | ||
51 | { 0x04, 0x00 }, /* REG_INTMR */ | ||
52 | { 0x05, 0x00 }, /* REG_NCPCTRL */ | ||
53 | { 0x06, 0x00 }, /* REG_LDOCTL */ | ||
54 | { 0x07, 0x60 }, /* REG_HPPLLCTL */ | ||
55 | { 0x08, 0x00 }, /* REG_LPPLLCTL */ | ||
56 | { 0x09, 0x4A }, /* REG_LPPLLDIV */ | ||
57 | { 0x0A, 0x00 }, /* REG_AMICBCTL */ | ||
58 | { 0x0B, 0x00 }, /* REG_DMICBCTL */ | ||
59 | { 0x0C, 0x00 }, /* REG_MICLCTL */ | ||
60 | { 0x0D, 0x00 }, /* REG_MICRCTL */ | ||
61 | { 0x0E, 0x00 }, /* REG_MICGAIN */ | ||
62 | { 0x0F, 0x1B }, /* REG_LINEGAIN */ | ||
63 | { 0x10, 0x00 }, /* REG_HSLCTL */ | ||
64 | { 0x11, 0x00 }, /* REG_HSRCTL */ | ||
65 | { 0x12, 0x00 }, /* REG_HSGAIN */ | ||
66 | { 0x13, 0x00 }, /* REG_EARCTL */ | ||
67 | { 0x14, 0x00 }, /* REG_HFLCTL */ | ||
68 | { 0x15, 0x00 }, /* REG_HFLGAIN */ | ||
69 | { 0x16, 0x00 }, /* REG_HFRCTL */ | ||
70 | { 0x17, 0x00 }, /* REG_HFRGAIN */ | ||
71 | { 0x18, 0x00 }, /* REG_VIBCTLL */ | ||
72 | { 0x19, 0x00 }, /* REG_VIBDATL */ | ||
73 | { 0x1A, 0x00 }, /* REG_VIBCTLR */ | ||
74 | { 0x1B, 0x00 }, /* REG_VIBDATR */ | ||
75 | { 0x1C, 0x00 }, /* REG_HKCTL1 */ | ||
76 | { 0x1D, 0x00 }, /* REG_HKCTL2 */ | ||
77 | { 0x1E, 0x00 }, /* REG_GPOCTL */ | ||
78 | { 0x1F, 0x00 }, /* REG_ALB */ | ||
79 | { 0x20, 0x00 }, /* REG_DLB */ | ||
80 | /* 0x28, REG_TRIM1 */ | ||
81 | /* 0x29, REG_TRIM2 */ | ||
82 | /* 0x2A, REG_TRIM3 */ | ||
83 | /* 0x2B, REG_HSOTRIM */ | ||
84 | /* 0x2C, REG_HFOTRIM */ | ||
85 | { 0x2D, 0x08 }, /* REG_ACCCTL */ | ||
86 | { 0x2E, 0x00 }, /* REG_STATUS (ro) */ | ||
87 | }; | ||
88 | |||
89 | struct reg_default twl6040_patch[] = { | ||
90 | /* Select I2C bus access to dual access registers */ | ||
91 | { TWL6040_REG_ACCCTL, 0x09 }, | ||
92 | }; | ||
93 | |||
94 | |||
47 | static bool twl6040_has_vibra(struct device_node *node) | 95 | static bool twl6040_has_vibra(struct device_node *node) |
48 | { | 96 | { |
49 | #ifdef CONFIG_OF | 97 | #ifdef CONFIG_OF |
@@ -238,6 +286,9 @@ int twl6040_power(struct twl6040 *twl6040, int on) | |||
238 | if (twl6040->power_count++) | 286 | if (twl6040->power_count++) |
239 | goto out; | 287 | goto out; |
240 | 288 | ||
289 | /* Allow writes to the chip */ | ||
290 | regcache_cache_only(twl6040->regmap, false); | ||
291 | |||
241 | if (gpio_is_valid(twl6040->audpwron)) { | 292 | if (gpio_is_valid(twl6040->audpwron)) { |
242 | /* use automatic power-up sequence */ | 293 | /* use automatic power-up sequence */ |
243 | ret = twl6040_power_up_automatic(twl6040); | 294 | ret = twl6040_power_up_automatic(twl6040); |
@@ -253,6 +304,10 @@ int twl6040_power(struct twl6040 *twl6040, int on) | |||
253 | goto out; | 304 | goto out; |
254 | } | 305 | } |
255 | } | 306 | } |
307 | |||
308 | /* Sync with the HW */ | ||
309 | regcache_sync(twl6040->regmap); | ||
310 | |||
256 | /* Default PLL configuration after power up */ | 311 | /* Default PLL configuration after power up */ |
257 | twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL; | 312 | twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL; |
258 | twl6040->sysclk = 19200000; | 313 | twl6040->sysclk = 19200000; |
@@ -279,6 +334,11 @@ int twl6040_power(struct twl6040 *twl6040, int on) | |||
279 | /* use manual power-down sequence */ | 334 | /* use manual power-down sequence */ |
280 | twl6040_power_down_manual(twl6040); | 335 | twl6040_power_down_manual(twl6040); |
281 | } | 336 | } |
337 | |||
338 | /* Set regmap to cache only and mark it as dirty */ | ||
339 | regcache_cache_only(twl6040->regmap, true); | ||
340 | regcache_mark_dirty(twl6040->regmap); | ||
341 | |||
282 | twl6040->sysclk = 0; | 342 | twl6040->sysclk = 0; |
283 | twl6040->mclk = 0; | 343 | twl6040->mclk = 0; |
284 | } | 344 | } |
@@ -490,9 +550,24 @@ static bool twl6040_readable_reg(struct device *dev, unsigned int reg) | |||
490 | static bool twl6040_volatile_reg(struct device *dev, unsigned int reg) | 550 | static bool twl6040_volatile_reg(struct device *dev, unsigned int reg) |
491 | { | 551 | { |
492 | switch (reg) { | 552 | switch (reg) { |
493 | case TWL6040_REG_VIBCTLL: | 553 | case TWL6040_REG_ASICID: |
494 | case TWL6040_REG_VIBCTLR: | 554 | case TWL6040_REG_ASICREV: |
495 | case TWL6040_REG_INTMR: | 555 | case TWL6040_REG_INTID: |
556 | case TWL6040_REG_LPPLLCTL: | ||
557 | case TWL6040_REG_HPPLLCTL: | ||
558 | case TWL6040_REG_STATUS: | ||
559 | return true; | ||
560 | default: | ||
561 | return false; | ||
562 | } | ||
563 | } | ||
564 | |||
565 | static bool twl6040_writeable_reg(struct device *dev, unsigned int reg) | ||
566 | { | ||
567 | switch (reg) { | ||
568 | case TWL6040_REG_ASICID: | ||
569 | case TWL6040_REG_ASICREV: | ||
570 | case TWL6040_REG_STATUS: | ||
496 | return false; | 571 | return false; |
497 | default: | 572 | default: |
498 | return true; | 573 | return true; |
@@ -502,10 +577,15 @@ static bool twl6040_volatile_reg(struct device *dev, unsigned int reg) | |||
502 | static struct regmap_config twl6040_regmap_config = { | 577 | static struct regmap_config twl6040_regmap_config = { |
503 | .reg_bits = 8, | 578 | .reg_bits = 8, |
504 | .val_bits = 8, | 579 | .val_bits = 8, |
580 | |||
581 | .reg_defaults = twl6040_defaults, | ||
582 | .num_reg_defaults = ARRAY_SIZE(twl6040_defaults), | ||
583 | |||
505 | .max_register = TWL6040_REG_STATUS, /* 0x2e */ | 584 | .max_register = TWL6040_REG_STATUS, /* 0x2e */ |
506 | 585 | ||
507 | .readable_reg = twl6040_readable_reg, | 586 | .readable_reg = twl6040_readable_reg, |
508 | .volatile_reg = twl6040_volatile_reg, | 587 | .volatile_reg = twl6040_volatile_reg, |
588 | .writeable_reg = twl6040_writeable_reg, | ||
509 | 589 | ||
510 | .cache_type = REGCACHE_RBTREE, | 590 | .cache_type = REGCACHE_RBTREE, |
511 | }; | 591 | }; |
@@ -624,6 +704,8 @@ static int twl6040_probe(struct i2c_client *client, | |||
624 | 704 | ||
625 | /* dual-access registers controlled by I2C only */ | 705 | /* dual-access registers controlled by I2C only */ |
626 | twl6040_set_bits(twl6040, TWL6040_REG_ACCCTL, TWL6040_I2CSEL); | 706 | twl6040_set_bits(twl6040, TWL6040_REG_ACCCTL, TWL6040_I2CSEL); |
707 | regmap_register_patch(twl6040->regmap, twl6040_patch, | ||
708 | ARRAY_SIZE(twl6040_patch)); | ||
627 | 709 | ||
628 | /* | 710 | /* |
629 | * The main functionality of twl6040 to provide audio on OMAP4+ systems. | 711 | * The main functionality of twl6040 to provide audio on OMAP4+ systems. |
@@ -656,6 +738,10 @@ static int twl6040_probe(struct i2c_client *client, | |||
656 | cell->name = "twl6040-gpo"; | 738 | cell->name = "twl6040-gpo"; |
657 | children++; | 739 | children++; |
658 | 740 | ||
741 | /* The chip is powered down so mark regmap to cache only and dirty */ | ||
742 | regcache_cache_only(twl6040->regmap, true); | ||
743 | regcache_mark_dirty(twl6040->regmap); | ||
744 | |||
659 | ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children, | 745 | ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children, |
660 | NULL, 0, NULL); | 746 | NULL, 0, NULL); |
661 | if (ret) | 747 | if (ret) |
diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index bf8b3b5ad1fe..4a4432eb499c 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c | |||
@@ -14,6 +14,7 @@ | |||
14 | 14 | ||
15 | #include <linux/mfd/arizona/core.h> | 15 | #include <linux/mfd/arizona/core.h> |
16 | #include <linux/mfd/arizona/registers.h> | 16 | #include <linux/mfd/arizona/registers.h> |
17 | #include <linux/device.h> | ||
17 | 18 | ||
18 | #include "arizona.h" | 19 | #include "arizona.h" |
19 | 20 | ||
@@ -524,6 +525,7 @@ static const struct reg_default wm5110_reg_default[] = { | |||
524 | { 0x00000300, 0x0000 }, /* R768 - Input Enables */ | 525 | { 0x00000300, 0x0000 }, /* R768 - Input Enables */ |
525 | { 0x00000308, 0x0000 }, /* R776 - Input Rate */ | 526 | { 0x00000308, 0x0000 }, /* R776 - Input Rate */ |
526 | { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ | 527 | { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ |
528 | { 0x0000030C, 0x0002 }, /* R780 - HPF Control */ | ||
527 | { 0x00000310, 0x2080 }, /* R784 - IN1L Control */ | 529 | { 0x00000310, 0x2080 }, /* R784 - IN1L Control */ |
528 | { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ | 530 | { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ |
529 | { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ | 531 | { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ |
@@ -545,6 +547,7 @@ static const struct reg_default wm5110_reg_default[] = { | |||
545 | { 0x00000328, 0x2000 }, /* R808 - IN4L Control */ | 547 | { 0x00000328, 0x2000 }, /* R808 - IN4L Control */ |
546 | { 0x00000329, 0x0180 }, /* R809 - ADC Digital Volume 4L */ | 548 | { 0x00000329, 0x0180 }, /* R809 - ADC Digital Volume 4L */ |
547 | { 0x0000032A, 0x0000 }, /* R810 - DMIC4L Control */ | 549 | { 0x0000032A, 0x0000 }, /* R810 - DMIC4L Control */ |
550 | { 0x0000032C, 0x0000 }, /* R812 - IN4R Control */ | ||
548 | { 0x0000032D, 0x0180 }, /* R813 - ADC Digital Volume 4R */ | 551 | { 0x0000032D, 0x0180 }, /* R813 - ADC Digital Volume 4R */ |
549 | { 0x0000032E, 0x0000 }, /* R814 - DMIC4R Control */ | 552 | { 0x0000032E, 0x0000 }, /* R814 - DMIC4R Control */ |
550 | { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ | 553 | { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ |
@@ -598,6 +601,7 @@ static const struct reg_default wm5110_reg_default[] = { | |||
598 | { 0x0000043D, 0x0180 }, /* R1085 - DAC Digital Volume 6R */ | 601 | { 0x0000043D, 0x0180 }, /* R1085 - DAC Digital Volume 6R */ |
599 | { 0x0000043E, 0x0080 }, /* R1086 - DAC Volume Limit 6R */ | 602 | { 0x0000043E, 0x0080 }, /* R1086 - DAC Volume Limit 6R */ |
600 | { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */ | 603 | { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */ |
604 | { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ | ||
601 | { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ | 605 | { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ |
602 | { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ | 606 | { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ |
603 | { 0x00000480, 0x0040 }, /* R1152 - Class W ANC Threshold 1 */ | 607 | { 0x00000480, 0x0040 }, /* R1152 - Class W ANC Threshold 1 */ |
@@ -606,6 +610,9 @@ static const struct reg_default wm5110_reg_default[] = { | |||
606 | { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */ | 610 | { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */ |
607 | { 0x00000492, 0x0069 }, /* R1170 - PDM SPK2 CTRL 1 */ | 611 | { 0x00000492, 0x0069 }, /* R1170 - PDM SPK2 CTRL 1 */ |
608 | { 0x00000493, 0x0000 }, /* R1171 - PDM SPK2 CTRL 2 */ | 612 | { 0x00000493, 0x0000 }, /* R1171 - PDM SPK2 CTRL 2 */ |
613 | { 0x000004A0, 0x3480 }, /* R1184 - HP1 Short Circuit Ctrl */ | ||
614 | { 0x000004A1, 0x3480 }, /* R1185 - HP2 Short Circuit Ctrl */ | ||
615 | { 0x000004A2, 0x3480 }, /* R1186 - HP3 Short Circuit Ctrl */ | ||
609 | { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ | 616 | { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ |
610 | { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ | 617 | { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ |
611 | { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ | 618 | { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ |
@@ -882,6 +889,38 @@ static const struct reg_default wm5110_reg_default[] = { | |||
882 | { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ | 889 | { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ |
883 | { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ | 890 | { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ |
884 | { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ | 891 | { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ |
892 | { 0x00000750, 0x0000 }, /* R1872 - AIF2TX3MIX Input 1 Source */ | ||
893 | { 0x00000751, 0x0080 }, /* R1873 - AIF2TX3MIX Input 1 Volume */ | ||
894 | { 0x00000752, 0x0000 }, /* R1874 - AIF2TX3MIX Input 2 Source */ | ||
895 | { 0x00000753, 0x0080 }, /* R1875 - AIF2TX3MIX Input 2 Volume */ | ||
896 | { 0x00000754, 0x0000 }, /* R1876 - AIF2TX3MIX Input 3 Source */ | ||
897 | { 0x00000755, 0x0080 }, /* R1877 - AIF2TX3MIX Input 3 Volume */ | ||
898 | { 0x00000756, 0x0000 }, /* R1878 - AIF2TX3MIX Input 4 Source */ | ||
899 | { 0x00000757, 0x0080 }, /* R1879 - AIF2TX3MIX Input 4 Volume */ | ||
900 | { 0x00000758, 0x0000 }, /* R1880 - AIF2TX4MIX Input 1 Source */ | ||
901 | { 0x00000759, 0x0080 }, /* R1881 - AIF2TX4MIX Input 1 Volume */ | ||
902 | { 0x0000075A, 0x0000 }, /* R1882 - AIF2TX4MIX Input 2 Source */ | ||
903 | { 0x0000075B, 0x0080 }, /* R1883 - AIF2TX4MIX Input 2 Volume */ | ||
904 | { 0x0000075C, 0x0000 }, /* R1884 - AIF2TX4MIX Input 3 Source */ | ||
905 | { 0x0000075D, 0x0080 }, /* R1885 - AIF2TX4MIX Input 3 Volume */ | ||
906 | { 0x0000075E, 0x0000 }, /* R1886 - AIF2TX4MIX Input 4 Source */ | ||
907 | { 0x0000075F, 0x0080 }, /* R1887 - AIF2TX4MIX Input 4 Volume */ | ||
908 | { 0x00000760, 0x0000 }, /* R1888 - AIF2TX5MIX Input 1 Source */ | ||
909 | { 0x00000761, 0x0080 }, /* R1889 - AIF2TX5MIX Input 1 Volume */ | ||
910 | { 0x00000762, 0x0000 }, /* R1890 - AIF2TX5MIX Input 2 Source */ | ||
911 | { 0x00000763, 0x0080 }, /* R1891 - AIF2TX5MIX Input 2 Volume */ | ||
912 | { 0x00000764, 0x0000 }, /* R1892 - AIF2TX5MIX Input 3 Source */ | ||
913 | { 0x00000765, 0x0080 }, /* R1893 - AIF2TX5MIX Input 3 Volume */ | ||
914 | { 0x00000766, 0x0000 }, /* R1894 - AIF2TX5MIX Input 4 Source */ | ||
915 | { 0x00000767, 0x0080 }, /* R1895 - AIF2TX5MIX Input 4 Volume */ | ||
916 | { 0x00000768, 0x0000 }, /* R1896 - AIF2TX6MIX Input 1 Source */ | ||
917 | { 0x00000769, 0x0080 }, /* R1897 - AIF2TX6MIX Input 1 Volume */ | ||
918 | { 0x0000076A, 0x0000 }, /* R1898 - AIF2TX6MIX Input 2 Source */ | ||
919 | { 0x0000076B, 0x0080 }, /* R1899 - AIF2TX6MIX Input 2 Volume */ | ||
920 | { 0x0000076C, 0x0000 }, /* R1900 - AIF2TX6MIX Input 3 Source */ | ||
921 | { 0x0000076D, 0x0080 }, /* R1901 - AIF2TX6MIX Input 3 Volume */ | ||
922 | { 0x0000076E, 0x0000 }, /* R1902 - AIF2TX6MIX Input 4 Source */ | ||
923 | { 0x0000076F, 0x0080 }, /* R1903 - AIF2TX6MIX Input 4 Volume */ | ||
885 | { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ | 924 | { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ |
886 | { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ | 925 | { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ |
887 | { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ | 926 | { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ |
@@ -1342,6 +1381,64 @@ static const struct reg_default wm5110_reg_default[] = { | |||
1342 | { 0x00001404, 0x0000 }, /* R5124 - DSP4 Status 1 */ | 1381 | { 0x00001404, 0x0000 }, /* R5124 - DSP4 Status 1 */ |
1343 | }; | 1382 | }; |
1344 | 1383 | ||
1384 | static bool wm5110_is_rev_b_adsp_memory(unsigned int reg) | ||
1385 | { | ||
1386 | if ((reg >= 0x100000 && reg < 0x103000) || | ||
1387 | (reg >= 0x180000 && reg < 0x181000) || | ||
1388 | (reg >= 0x190000 && reg < 0x192000) || | ||
1389 | (reg >= 0x1a8000 && reg < 0x1a9000) || | ||
1390 | (reg >= 0x200000 && reg < 0x209000) || | ||
1391 | (reg >= 0x280000 && reg < 0x281000) || | ||
1392 | (reg >= 0x290000 && reg < 0x29a000) || | ||
1393 | (reg >= 0x2a8000 && reg < 0x2aa000) || | ||
1394 | (reg >= 0x300000 && reg < 0x30f000) || | ||
1395 | (reg >= 0x380000 && reg < 0x382000) || | ||
1396 | (reg >= 0x390000 && reg < 0x39e000) || | ||
1397 | (reg >= 0x3a8000 && reg < 0x3b6000) || | ||
1398 | (reg >= 0x400000 && reg < 0x403000) || | ||
1399 | (reg >= 0x480000 && reg < 0x481000) || | ||
1400 | (reg >= 0x490000 && reg < 0x492000) || | ||
1401 | (reg >= 0x4a8000 && reg < 0x4a9000)) | ||
1402 | return true; | ||
1403 | else | ||
1404 | return false; | ||
1405 | } | ||
1406 | |||
1407 | static bool wm5110_is_rev_d_adsp_memory(unsigned int reg) | ||
1408 | { | ||
1409 | if ((reg >= 0x100000 && reg < 0x106000) || | ||
1410 | (reg >= 0x180000 && reg < 0x182000) || | ||
1411 | (reg >= 0x190000 && reg < 0x198000) || | ||
1412 | (reg >= 0x1a8000 && reg < 0x1aa000) || | ||
1413 | (reg >= 0x200000 && reg < 0x20f000) || | ||
1414 | (reg >= 0x280000 && reg < 0x282000) || | ||
1415 | (reg >= 0x290000 && reg < 0x29c000) || | ||
1416 | (reg >= 0x2a6000 && reg < 0x2b4000) || | ||
1417 | (reg >= 0x300000 && reg < 0x30f000) || | ||
1418 | (reg >= 0x380000 && reg < 0x382000) || | ||
1419 | (reg >= 0x390000 && reg < 0x3a2000) || | ||
1420 | (reg >= 0x3a6000 && reg < 0x3b4000) || | ||
1421 | (reg >= 0x400000 && reg < 0x406000) || | ||
1422 | (reg >= 0x480000 && reg < 0x482000) || | ||
1423 | (reg >= 0x490000 && reg < 0x498000) || | ||
1424 | (reg >= 0x4a8000 && reg < 0x4aa000)) | ||
1425 | return true; | ||
1426 | else | ||
1427 | return false; | ||
1428 | } | ||
1429 | |||
1430 | static bool wm5110_is_adsp_memory(struct device *dev, unsigned int reg) | ||
1431 | { | ||
1432 | struct arizona *arizona = dev_get_drvdata(dev); | ||
1433 | |||
1434 | switch (arizona->rev) { | ||
1435 | case 0 ... 2: | ||
1436 | return wm5110_is_rev_b_adsp_memory(reg); | ||
1437 | default: | ||
1438 | return wm5110_is_rev_d_adsp_memory(reg); | ||
1439 | } | ||
1440 | } | ||
1441 | |||
1345 | static bool wm5110_readable_register(struct device *dev, unsigned int reg) | 1442 | static bool wm5110_readable_register(struct device *dev, unsigned int reg) |
1346 | { | 1443 | { |
1347 | switch (reg) { | 1444 | switch (reg) { |
@@ -1460,6 +1557,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) | |||
1460 | case ARIZONA_INPUT_ENABLES_STATUS: | 1557 | case ARIZONA_INPUT_ENABLES_STATUS: |
1461 | case ARIZONA_INPUT_RATE: | 1558 | case ARIZONA_INPUT_RATE: |
1462 | case ARIZONA_INPUT_VOLUME_RAMP: | 1559 | case ARIZONA_INPUT_VOLUME_RAMP: |
1560 | case ARIZONA_HPF_CONTROL: | ||
1463 | case ARIZONA_IN1L_CONTROL: | 1561 | case ARIZONA_IN1L_CONTROL: |
1464 | case ARIZONA_ADC_DIGITAL_VOLUME_1L: | 1562 | case ARIZONA_ADC_DIGITAL_VOLUME_1L: |
1465 | case ARIZONA_DMIC1L_CONTROL: | 1563 | case ARIZONA_DMIC1L_CONTROL: |
@@ -1481,6 +1579,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) | |||
1481 | case ARIZONA_IN4L_CONTROL: | 1579 | case ARIZONA_IN4L_CONTROL: |
1482 | case ARIZONA_ADC_DIGITAL_VOLUME_4L: | 1580 | case ARIZONA_ADC_DIGITAL_VOLUME_4L: |
1483 | case ARIZONA_DMIC4L_CONTROL: | 1581 | case ARIZONA_DMIC4L_CONTROL: |
1582 | case ARIZONA_IN4R_CONTROL: | ||
1484 | case ARIZONA_ADC_DIGITAL_VOLUME_4R: | 1583 | case ARIZONA_ADC_DIGITAL_VOLUME_4R: |
1485 | case ARIZONA_DMIC4R_CONTROL: | 1584 | case ARIZONA_DMIC4R_CONTROL: |
1486 | case ARIZONA_OUTPUT_ENABLES_1: | 1585 | case ARIZONA_OUTPUT_ENABLES_1: |
@@ -1536,12 +1635,16 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) | |||
1536 | case ARIZONA_DAC_DIGITAL_VOLUME_6R: | 1635 | case ARIZONA_DAC_DIGITAL_VOLUME_6R: |
1537 | case ARIZONA_DAC_VOLUME_LIMIT_6R: | 1636 | case ARIZONA_DAC_VOLUME_LIMIT_6R: |
1538 | case ARIZONA_NOISE_GATE_SELECT_6R: | 1637 | case ARIZONA_NOISE_GATE_SELECT_6R: |
1638 | case ARIZONA_DRE_ENABLE: | ||
1539 | case ARIZONA_DAC_AEC_CONTROL_1: | 1639 | case ARIZONA_DAC_AEC_CONTROL_1: |
1540 | case ARIZONA_NOISE_GATE_CONTROL: | 1640 | case ARIZONA_NOISE_GATE_CONTROL: |
1541 | case ARIZONA_PDM_SPK1_CTRL_1: | 1641 | case ARIZONA_PDM_SPK1_CTRL_1: |
1542 | case ARIZONA_PDM_SPK1_CTRL_2: | 1642 | case ARIZONA_PDM_SPK1_CTRL_2: |
1543 | case ARIZONA_PDM_SPK2_CTRL_1: | 1643 | case ARIZONA_PDM_SPK2_CTRL_1: |
1544 | case ARIZONA_PDM_SPK2_CTRL_2: | 1644 | case ARIZONA_PDM_SPK2_CTRL_2: |
1645 | case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: | ||
1646 | case ARIZONA_HP2_SHORT_CIRCUIT_CTRL: | ||
1647 | case ARIZONA_HP3_SHORT_CIRCUIT_CTRL: | ||
1545 | case ARIZONA_AIF1_BCLK_CTRL: | 1648 | case ARIZONA_AIF1_BCLK_CTRL: |
1546 | case ARIZONA_AIF1_TX_PIN_CTRL: | 1649 | case ARIZONA_AIF1_TX_PIN_CTRL: |
1547 | case ARIZONA_AIF1_RX_PIN_CTRL: | 1650 | case ARIZONA_AIF1_RX_PIN_CTRL: |
@@ -1820,6 +1923,38 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) | |||
1820 | case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: | 1923 | case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: |
1821 | case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: | 1924 | case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: |
1822 | case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: | 1925 | case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: |
1926 | case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: | ||
1927 | case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: | ||
1928 | case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: | ||
1929 | case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: | ||
1930 | case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: | ||
1931 | case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: | ||
1932 | case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: | ||
1933 | case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: | ||
1934 | case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: | ||
1935 | case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: | ||
1936 | case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: | ||
1937 | case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: | ||
1938 | case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: | ||
1939 | case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: | ||
1940 | case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: | ||
1941 | case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: | ||
1942 | case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE: | ||
1943 | case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME: | ||
1944 | case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE: | ||
1945 | case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME: | ||
1946 | case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE: | ||
1947 | case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME: | ||
1948 | case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE: | ||
1949 | case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME: | ||
1950 | case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE: | ||
1951 | case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME: | ||
1952 | case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE: | ||
1953 | case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME: | ||
1954 | case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE: | ||
1955 | case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: | ||
1956 | case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: | ||
1957 | case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: | ||
1823 | case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: | 1958 | case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: |
1824 | case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: | 1959 | case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: |
1825 | case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: | 1960 | case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: |
@@ -2331,7 +2466,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) | |||
2331 | case ARIZONA_DSP4_SCRATCH_3: | 2466 | case ARIZONA_DSP4_SCRATCH_3: |
2332 | return true; | 2467 | return true; |
2333 | default: | 2468 | default: |
2334 | return false; | 2469 | return wm5110_is_adsp_memory(dev, reg); |
2335 | } | 2470 | } |
2336 | } | 2471 | } |
2337 | 2472 | ||
@@ -2407,16 +2542,18 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) | |||
2407 | case ARIZONA_DSP4_SCRATCH_3: | 2542 | case ARIZONA_DSP4_SCRATCH_3: |
2408 | return true; | 2543 | return true; |
2409 | default: | 2544 | default: |
2410 | return false; | 2545 | return wm5110_is_adsp_memory(dev, reg); |
2411 | } | 2546 | } |
2412 | } | 2547 | } |
2413 | 2548 | ||
2549 | #define WM5110_MAX_REGISTER 0x4a9fff | ||
2550 | |||
2414 | const struct regmap_config wm5110_spi_regmap = { | 2551 | const struct regmap_config wm5110_spi_regmap = { |
2415 | .reg_bits = 32, | 2552 | .reg_bits = 32, |
2416 | .pad_bits = 16, | 2553 | .pad_bits = 16, |
2417 | .val_bits = 16, | 2554 | .val_bits = 16, |
2418 | 2555 | ||
2419 | .max_register = ARIZONA_DSP1_STATUS_2, | 2556 | .max_register = WM5110_MAX_REGISTER, |
2420 | .readable_reg = wm5110_readable_register, | 2557 | .readable_reg = wm5110_readable_register, |
2421 | .volatile_reg = wm5110_volatile_register, | 2558 | .volatile_reg = wm5110_volatile_register, |
2422 | 2559 | ||
@@ -2430,7 +2567,7 @@ const struct regmap_config wm5110_i2c_regmap = { | |||
2430 | .reg_bits = 32, | 2567 | .reg_bits = 32, |
2431 | .val_bits = 16, | 2568 | .val_bits = 16, |
2432 | 2569 | ||
2433 | .max_register = ARIZONA_DSP1_STATUS_2, | 2570 | .max_register = WM5110_MAX_REGISTER, |
2434 | .readable_reg = wm5110_readable_register, | 2571 | .readable_reg = wm5110_readable_register, |
2435 | .volatile_reg = wm5110_volatile_register, | 2572 | .volatile_reg = wm5110_volatile_register, |
2436 | 2573 | ||
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index eb1f1ef5fa2e..e2dd2fbec5ee 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig | |||
@@ -395,7 +395,7 @@ config SPI_S3C24XX_FIQ | |||
395 | config SPI_S3C64XX | 395 | config SPI_S3C64XX |
396 | tristate "Samsung S3C64XX series type SPI" | 396 | tristate "Samsung S3C64XX series type SPI" |
397 | depends on PLAT_SAMSUNG | 397 | depends on PLAT_SAMSUNG |
398 | select S3C64XX_DMA if ARCH_S3C64XX | 398 | select S3C64XX_PL080 if ARCH_S3C64XX |
399 | help | 399 | help |
400 | SPI driver for Samsung S3C64XX and newer SoCs. | 400 | SPI driver for Samsung S3C64XX and newer SoCs. |
401 | 401 | ||
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 41cf0c399288..ba5f96db0754 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h | |||
@@ -22,6 +22,7 @@ | |||
22 | #define LINUX_DMAENGINE_H | 22 | #define LINUX_DMAENGINE_H |
23 | 23 | ||
24 | #include <linux/device.h> | 24 | #include <linux/device.h> |
25 | #include <linux/err.h> | ||
25 | #include <linux/uio.h> | 26 | #include <linux/uio.h> |
26 | #include <linux/bug.h> | 27 | #include <linux/bug.h> |
27 | #include <linux/scatterlist.h> | 28 | #include <linux/scatterlist.h> |
@@ -363,6 +364,32 @@ struct dma_slave_config { | |||
363 | unsigned int slave_id; | 364 | unsigned int slave_id; |
364 | }; | 365 | }; |
365 | 366 | ||
367 | /** | ||
368 | * enum dma_residue_granularity - Granularity of the reported transfer residue | ||
369 | * @DMA_RESIDUE_GRANULARITY_DESCRIPTOR: Residue reporting is not support. The | ||
370 | * DMA channel is only able to tell whether a descriptor has been completed or | ||
371 | * not, which means residue reporting is not supported by this channel. The | ||
372 | * residue field of the dma_tx_state field will always be 0. | ||
373 | * @DMA_RESIDUE_GRANULARITY_SEGMENT: Residue is updated after each successfully | ||
374 | * completed segment of the transfer (For cyclic transfers this is after each | ||
375 | * period). This is typically implemented by having the hardware generate an | ||
376 | * interrupt after each transferred segment and then the drivers updates the | ||
377 | * outstanding residue by the size of the segment. Another possibility is if | ||
378 | * the hardware supports scatter-gather and the segment descriptor has a field | ||
379 | * which gets set after the segment has been completed. The driver then counts | ||
380 | * the number of segments without the flag set to compute the residue. | ||
381 | * @DMA_RESIDUE_GRANULARITY_BURST: Residue is updated after each transferred | ||
382 | * burst. This is typically only supported if the hardware has a progress | ||
383 | * register of some sort (E.g. a register with the current read/write address | ||
384 | * or a register with the amount of bursts/beats/bytes that have been | ||
385 | * transferred or still need to be transferred). | ||
386 | */ | ||
387 | enum dma_residue_granularity { | ||
388 | DMA_RESIDUE_GRANULARITY_DESCRIPTOR = 0, | ||
389 | DMA_RESIDUE_GRANULARITY_SEGMENT = 1, | ||
390 | DMA_RESIDUE_GRANULARITY_BURST = 2, | ||
391 | }; | ||
392 | |||
366 | /* struct dma_slave_caps - expose capabilities of a slave channel only | 393 | /* struct dma_slave_caps - expose capabilities of a slave channel only |
367 | * | 394 | * |
368 | * @src_addr_widths: bit mask of src addr widths the channel supports | 395 | * @src_addr_widths: bit mask of src addr widths the channel supports |
@@ -373,6 +400,7 @@ struct dma_slave_config { | |||
373 | * should be checked by controller as well | 400 | * should be checked by controller as well |
374 | * @cmd_pause: true, if pause and thereby resume is supported | 401 | * @cmd_pause: true, if pause and thereby resume is supported |
375 | * @cmd_terminate: true, if terminate cmd is supported | 402 | * @cmd_terminate: true, if terminate cmd is supported |
403 | * @residue_granularity: granularity of the reported transfer residue | ||
376 | */ | 404 | */ |
377 | struct dma_slave_caps { | 405 | struct dma_slave_caps { |
378 | u32 src_addr_widths; | 406 | u32 src_addr_widths; |
@@ -380,6 +408,7 @@ struct dma_slave_caps { | |||
380 | u32 directions; | 408 | u32 directions; |
381 | bool cmd_pause; | 409 | bool cmd_pause; |
382 | bool cmd_terminate; | 410 | bool cmd_terminate; |
411 | enum dma_residue_granularity residue_granularity; | ||
383 | }; | 412 | }; |
384 | 413 | ||
385 | static inline const char *dma_chan_name(struct dma_chan *chan) | 414 | static inline const char *dma_chan_name(struct dma_chan *chan) |
@@ -1040,6 +1069,8 @@ enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); | |||
1040 | void dma_issue_pending_all(void); | 1069 | void dma_issue_pending_all(void); |
1041 | struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, | 1070 | struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, |
1042 | dma_filter_fn fn, void *fn_param); | 1071 | dma_filter_fn fn, void *fn_param); |
1072 | struct dma_chan *dma_request_slave_channel_reason(struct device *dev, | ||
1073 | const char *name); | ||
1043 | struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name); | 1074 | struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name); |
1044 | void dma_release_channel(struct dma_chan *chan); | 1075 | void dma_release_channel(struct dma_chan *chan); |
1045 | #else | 1076 | #else |
@@ -1063,6 +1094,11 @@ static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, | |||
1063 | { | 1094 | { |
1064 | return NULL; | 1095 | return NULL; |
1065 | } | 1096 | } |
1097 | static inline struct dma_chan *dma_request_slave_channel_reason( | ||
1098 | struct device *dev, const char *name) | ||
1099 | { | ||
1100 | return ERR_PTR(-ENODEV); | ||
1101 | } | ||
1066 | static inline struct dma_chan *dma_request_slave_channel(struct device *dev, | 1102 | static inline struct dma_chan *dma_request_slave_channel(struct device *dev, |
1067 | const char *name) | 1103 | const char *name) |
1068 | { | 1104 | { |
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index 673a3ce67f31..ade1c06d4ceb 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h | |||
@@ -175,6 +175,9 @@ static inline int twl_class_is_ ##class(void) \ | |||
175 | TWL_CLASS_IS(4030, TWL4030_CLASS_ID) | 175 | TWL_CLASS_IS(4030, TWL4030_CLASS_ID) |
176 | TWL_CLASS_IS(6030, TWL6030_CLASS_ID) | 176 | TWL_CLASS_IS(6030, TWL6030_CLASS_ID) |
177 | 177 | ||
178 | /* Set the regcache bypass for the regmap associated with the nodule */ | ||
179 | int twl_set_regcache_bypass(u8 mod_no, bool enable); | ||
180 | |||
178 | /* | 181 | /* |
179 | * Read and write several 8-bit registers at once. | 182 | * Read and write several 8-bit registers at once. |
180 | */ | 183 | */ |
@@ -667,8 +670,6 @@ struct twl4030_codec_data { | |||
667 | unsigned int digimic_delay; /* in ms */ | 670 | unsigned int digimic_delay; /* in ms */ |
668 | unsigned int ramp_delay_value; | 671 | unsigned int ramp_delay_value; |
669 | unsigned int offset_cncl_path; | 672 | unsigned int offset_cncl_path; |
670 | unsigned int check_defaults:1; | ||
671 | unsigned int reset_registers:1; | ||
672 | unsigned int hs_extmute:1; | 673 | unsigned int hs_extmute:1; |
673 | int hs_extmute_gpio; | 674 | int hs_extmute_gpio; |
674 | }; | 675 | }; |
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index b31976595eba..fdf3aa376eb2 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h | |||
@@ -139,6 +139,7 @@ | |||
139 | #define ARIZONA_INPUT_ENABLES_STATUS 0x301 | 139 | #define ARIZONA_INPUT_ENABLES_STATUS 0x301 |
140 | #define ARIZONA_INPUT_RATE 0x308 | 140 | #define ARIZONA_INPUT_RATE 0x308 |
141 | #define ARIZONA_INPUT_VOLUME_RAMP 0x309 | 141 | #define ARIZONA_INPUT_VOLUME_RAMP 0x309 |
142 | #define ARIZONA_HPF_CONTROL 0x30C | ||
142 | #define ARIZONA_IN1L_CONTROL 0x310 | 143 | #define ARIZONA_IN1L_CONTROL 0x310 |
143 | #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311 | 144 | #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311 |
144 | #define ARIZONA_DMIC1L_CONTROL 0x312 | 145 | #define ARIZONA_DMIC1L_CONTROL 0x312 |
@@ -160,6 +161,7 @@ | |||
160 | #define ARIZONA_IN4L_CONTROL 0x328 | 161 | #define ARIZONA_IN4L_CONTROL 0x328 |
161 | #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329 | 162 | #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329 |
162 | #define ARIZONA_DMIC4L_CONTROL 0x32A | 163 | #define ARIZONA_DMIC4L_CONTROL 0x32A |
164 | #define ARIZONA_IN4R_CONTROL 0x32C | ||
163 | #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D | 165 | #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D |
164 | #define ARIZONA_DMIC4R_CONTROL 0x32E | 166 | #define ARIZONA_DMIC4R_CONTROL 0x32E |
165 | #define ARIZONA_OUTPUT_ENABLES_1 0x400 | 167 | #define ARIZONA_OUTPUT_ENABLES_1 0x400 |
@@ -224,6 +226,9 @@ | |||
224 | #define ARIZONA_PDM_SPK1_CTRL_2 0x491 | 226 | #define ARIZONA_PDM_SPK1_CTRL_2 0x491 |
225 | #define ARIZONA_PDM_SPK2_CTRL_1 0x492 | 227 | #define ARIZONA_PDM_SPK2_CTRL_1 0x492 |
226 | #define ARIZONA_PDM_SPK2_CTRL_2 0x493 | 228 | #define ARIZONA_PDM_SPK2_CTRL_2 0x493 |
229 | #define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0 | ||
230 | #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 | ||
231 | #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 | ||
227 | #define ARIZONA_SPK_CTRL_2 0x4B5 | 232 | #define ARIZONA_SPK_CTRL_2 0x4B5 |
228 | #define ARIZONA_SPK_CTRL_3 0x4B6 | 233 | #define ARIZONA_SPK_CTRL_3 0x4B6 |
229 | #define ARIZONA_DAC_COMP_1 0x4DC | 234 | #define ARIZONA_DAC_COMP_1 0x4DC |
@@ -511,6 +516,38 @@ | |||
511 | #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D | 516 | #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D |
512 | #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E | 517 | #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E |
513 | #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F | 518 | #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F |
519 | #define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750 | ||
520 | #define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751 | ||
521 | #define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752 | ||
522 | #define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753 | ||
523 | #define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754 | ||
524 | #define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755 | ||
525 | #define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756 | ||
526 | #define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757 | ||
527 | #define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758 | ||
528 | #define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759 | ||
529 | #define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A | ||
530 | #define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B | ||
531 | #define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C | ||
532 | #define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D | ||
533 | #define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E | ||
534 | #define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F | ||
535 | #define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760 | ||
536 | #define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761 | ||
537 | #define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762 | ||
538 | #define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763 | ||
539 | #define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764 | ||
540 | #define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765 | ||
541 | #define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766 | ||
542 | #define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767 | ||
543 | #define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768 | ||
544 | #define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769 | ||
545 | #define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A | ||
546 | #define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B | ||
547 | #define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C | ||
548 | #define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D | ||
549 | #define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E | ||
550 | #define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F | ||
514 | #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 | 551 | #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 |
515 | #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 | 552 | #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 |
516 | #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 | 553 | #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 |
@@ -2302,8 +2339,18 @@ | |||
2302 | #define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */ | 2339 | #define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */ |
2303 | 2340 | ||
2304 | /* | 2341 | /* |
2342 | * R780 (0x30C) - HPF Control | ||
2343 | */ | ||
2344 | #define ARIZONA_IN_HPF_CUT_MASK 0x0007 /* IN_HPF_CUT [2:0] */ | ||
2345 | #define ARIZONA_IN_HPF_CUT_SHIFT 0 /* IN_HPF_CUT [2:0] */ | ||
2346 | #define ARIZONA_IN_HPF_CUT_WIDTH 3 /* IN_HPF_CUT [2:0] */ | ||
2347 | |||
2348 | /* | ||
2305 | * R784 (0x310) - IN1L Control | 2349 | * R784 (0x310) - IN1L Control |
2306 | */ | 2350 | */ |
2351 | #define ARIZONA_IN1L_HPF_MASK 0x8000 /* IN1L_HPF - [15] */ | ||
2352 | #define ARIZONA_IN1L_HPF_SHIFT 15 /* IN1L_HPF - [15] */ | ||
2353 | #define ARIZONA_IN1L_HPF_WIDTH 1 /* IN1L_HPF - [15] */ | ||
2307 | #define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */ | 2354 | #define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */ |
2308 | #define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */ | 2355 | #define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */ |
2309 | #define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */ | 2356 | #define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */ |
@@ -2342,6 +2389,9 @@ | |||
2342 | /* | 2389 | /* |
2343 | * R788 (0x314) - IN1R Control | 2390 | * R788 (0x314) - IN1R Control |
2344 | */ | 2391 | */ |
2392 | #define ARIZONA_IN1R_HPF_MASK 0x8000 /* IN1R_HPF - [15] */ | ||
2393 | #define ARIZONA_IN1R_HPF_SHIFT 15 /* IN1R_HPF - [15] */ | ||
2394 | #define ARIZONA_IN1R_HPF_WIDTH 1 /* IN1R_HPF - [15] */ | ||
2345 | #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ | 2395 | #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ |
2346 | #define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ | 2396 | #define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ |
2347 | #define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ | 2397 | #define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ |
@@ -2371,6 +2421,9 @@ | |||
2371 | /* | 2421 | /* |
2372 | * R792 (0x318) - IN2L Control | 2422 | * R792 (0x318) - IN2L Control |
2373 | */ | 2423 | */ |
2424 | #define ARIZONA_IN2L_HPF_MASK 0x8000 /* IN2L_HPF - [15] */ | ||
2425 | #define ARIZONA_IN2L_HPF_SHIFT 15 /* IN2L_HPF - [15] */ | ||
2426 | #define ARIZONA_IN2L_HPF_WIDTH 1 /* IN2L_HPF - [15] */ | ||
2374 | #define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */ | 2427 | #define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */ |
2375 | #define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */ | 2428 | #define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */ |
2376 | #define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */ | 2429 | #define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */ |
@@ -2409,6 +2462,9 @@ | |||
2409 | /* | 2462 | /* |
2410 | * R796 (0x31C) - IN2R Control | 2463 | * R796 (0x31C) - IN2R Control |
2411 | */ | 2464 | */ |
2465 | #define ARIZONA_IN2R_HPF_MASK 0x8000 /* IN2R_HPF - [15] */ | ||
2466 | #define ARIZONA_IN2R_HPF_SHIFT 15 /* IN2R_HPF - [15] */ | ||
2467 | #define ARIZONA_IN2R_HPF_WIDTH 1 /* IN2R_HPF - [15] */ | ||
2412 | #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ | 2468 | #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ |
2413 | #define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ | 2469 | #define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ |
2414 | #define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ | 2470 | #define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ |
@@ -2438,6 +2494,9 @@ | |||
2438 | /* | 2494 | /* |
2439 | * R800 (0x320) - IN3L Control | 2495 | * R800 (0x320) - IN3L Control |
2440 | */ | 2496 | */ |
2497 | #define ARIZONA_IN3L_HPF_MASK 0x8000 /* IN3L_HPF - [15] */ | ||
2498 | #define ARIZONA_IN3L_HPF_SHIFT 15 /* IN3L_HPF - [15] */ | ||
2499 | #define ARIZONA_IN3L_HPF_WIDTH 1 /* IN3L_HPF - [15] */ | ||
2441 | #define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */ | 2500 | #define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */ |
2442 | #define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */ | 2501 | #define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */ |
2443 | #define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */ | 2502 | #define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */ |
@@ -2476,6 +2535,9 @@ | |||
2476 | /* | 2535 | /* |
2477 | * R804 (0x324) - IN3R Control | 2536 | * R804 (0x324) - IN3R Control |
2478 | */ | 2537 | */ |
2538 | #define ARIZONA_IN3R_HPF_MASK 0x8000 /* IN3R_HPF - [15] */ | ||
2539 | #define ARIZONA_IN3R_HPF_SHIFT 15 /* IN3R_HPF - [15] */ | ||
2540 | #define ARIZONA_IN3R_HPF_WIDTH 1 /* IN3R_HPF - [15] */ | ||
2479 | #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ | 2541 | #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ |
2480 | #define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ | 2542 | #define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ |
2481 | #define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ | 2543 | #define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ |
@@ -2505,6 +2567,9 @@ | |||
2505 | /* | 2567 | /* |
2506 | * R808 (0x328) - IN4 Control | 2568 | * R808 (0x328) - IN4 Control |
2507 | */ | 2569 | */ |
2570 | #define ARIZONA_IN4L_HPF_MASK 0x8000 /* IN4L_HPF - [15] */ | ||
2571 | #define ARIZONA_IN4L_HPF_SHIFT 15 /* IN4L_HPF - [15] */ | ||
2572 | #define ARIZONA_IN4L_HPF_WIDTH 1 /* IN4L_HPF - [15] */ | ||
2508 | #define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */ | 2573 | #define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */ |
2509 | #define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */ | 2574 | #define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */ |
2510 | #define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */ | 2575 | #define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */ |
@@ -2535,6 +2600,13 @@ | |||
2535 | #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ | 2600 | #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ |
2536 | 2601 | ||
2537 | /* | 2602 | /* |
2603 | * R812 (0x32C) - IN4R Control | ||
2604 | */ | ||
2605 | #define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */ | ||
2606 | #define ARIZONA_IN4R_HPF_SHIFT 15 /* IN4R_HPF - [15] */ | ||
2607 | #define ARIZONA_IN4R_HPF_WIDTH 1 /* IN4R_HPF - [15] */ | ||
2608 | |||
2609 | /* | ||
2538 | * R813 (0x32D) - ADC Digital Volume 4R | 2610 | * R813 (0x32D) - ADC Digital Volume 4R |
2539 | */ | 2611 | */ |
2540 | #define ARIZONA_IN_VU 0x0200 /* IN_VU */ | 2612 | #define ARIZONA_IN_VU 0x0200 /* IN_VU */ |
@@ -3147,6 +3219,10 @@ | |||
3147 | /* | 3219 | /* |
3148 | * R1088 (0x440) - DRE Enable | 3220 | * R1088 (0x440) - DRE Enable |
3149 | */ | 3221 | */ |
3222 | #define ARIZONA_DRE3R_ENA 0x0020 /* DRE3R_ENA */ | ||
3223 | #define ARIZONA_DRE3R_ENA_MASK 0x0020 /* DRE3R_ENA */ | ||
3224 | #define ARIZONA_DRE3R_ENA_SHIFT 5 /* DRE3R_ENA */ | ||
3225 | #define ARIZONA_DRE3R_ENA_WIDTH 1 /* DRE3R_ENA */ | ||
3150 | #define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ | 3226 | #define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ |
3151 | #define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ | 3227 | #define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ |
3152 | #define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ | 3228 | #define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ |
@@ -3269,6 +3345,30 @@ | |||
3269 | #define ARIZONA_SPK2_FMT_WIDTH 1 /* SPK2_FMT */ | 3345 | #define ARIZONA_SPK2_FMT_WIDTH 1 /* SPK2_FMT */ |
3270 | 3346 | ||
3271 | /* | 3347 | /* |
3348 | * R1184 (0x4A0) - HP1 Short Circuit Ctrl | ||
3349 | */ | ||
3350 | #define ARIZONA_HP1_SC_ENA 0x1000 /* HP1_SC_ENA */ | ||
3351 | #define ARIZONA_HP1_SC_ENA_MASK 0x1000 /* HP1_SC_ENA */ | ||
3352 | #define ARIZONA_HP1_SC_ENA_SHIFT 12 /* HP1_SC_ENA */ | ||
3353 | #define ARIZONA_HP1_SC_ENA_WIDTH 1 /* HP1_SC_ENA */ | ||
3354 | |||
3355 | /* | ||
3356 | * R1185 (0x4A1) - HP2 Short Circuit Ctrl | ||
3357 | */ | ||
3358 | #define ARIZONA_HP2_SC_ENA 0x1000 /* HP2_SC_ENA */ | ||
3359 | #define ARIZONA_HP2_SC_ENA_MASK 0x1000 /* HP2_SC_ENA */ | ||
3360 | #define ARIZONA_HP2_SC_ENA_SHIFT 12 /* HP2_SC_ENA */ | ||
3361 | #define ARIZONA_HP2_SC_ENA_WIDTH 1 /* HP2_SC_ENA */ | ||
3362 | |||
3363 | /* | ||
3364 | * R1186 (0x4A2) - HP3 Short Circuit Ctrl | ||
3365 | */ | ||
3366 | #define ARIZONA_HP3_SC_ENA 0x1000 /* HP3_SC_ENA */ | ||
3367 | #define ARIZONA_HP3_SC_ENA_MASK 0x1000 /* HP3_SC_ENA */ | ||
3368 | #define ARIZONA_HP3_SC_ENA_SHIFT 12 /* HP3_SC_ENA */ | ||
3369 | #define ARIZONA_HP3_SC_ENA_WIDTH 1 /* HP3_SC_ENA */ | ||
3370 | |||
3371 | /* | ||
3272 | * R1244 (0x4DC) - DAC comp 1 | 3372 | * R1244 (0x4DC) - DAC comp 1 |
3273 | */ | 3373 | */ |
3274 | #define ARIZONA_OUT_COMP_COEFF_MASK 0xFFFF /* OUT_COMP_COEFF - [15:0] */ | 3374 | #define ARIZONA_OUT_COMP_COEFF_MASK 0xFFFF /* OUT_COMP_COEFF - [15:0] */ |
@@ -3735,6 +3835,35 @@ | |||
3735 | #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */ | 3835 | #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */ |
3736 | 3836 | ||
3737 | /* | 3837 | /* |
3838 | * R1355 (0x54B) - AIF2 Frame Ctrl 5 | ||
3839 | */ | ||
3840 | #define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */ | ||
3841 | #define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */ | ||
3842 | #define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */ | ||
3843 | |||
3844 | /* | ||
3845 | * R1356 (0x54C) - AIF2 Frame Ctrl 6 | ||
3846 | */ | ||
3847 | #define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */ | ||
3848 | #define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */ | ||
3849 | #define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */ | ||
3850 | |||
3851 | |||
3852 | /* | ||
3853 | * R1357 (0x54D) - AIF2 Frame Ctrl 7 | ||
3854 | */ | ||
3855 | #define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */ | ||
3856 | #define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */ | ||
3857 | #define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */ | ||
3858 | |||
3859 | /* | ||
3860 | * R1358 (0x54E) - AIF2 Frame Ctrl 8 | ||
3861 | */ | ||
3862 | #define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */ | ||
3863 | #define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */ | ||
3864 | #define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */ | ||
3865 | |||
3866 | /* | ||
3738 | * R1361 (0x551) - AIF2 Frame Ctrl 11 | 3867 | * R1361 (0x551) - AIF2 Frame Ctrl 11 |
3739 | */ | 3868 | */ |
3740 | #define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */ | 3869 | #define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */ |
@@ -3749,8 +3878,52 @@ | |||
3749 | #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */ | 3878 | #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */ |
3750 | 3879 | ||
3751 | /* | 3880 | /* |
3881 | * R1363 (0x553) - AIF2 Frame Ctrl 13 | ||
3882 | */ | ||
3883 | #define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */ | ||
3884 | #define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */ | ||
3885 | #define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */ | ||
3886 | |||
3887 | /* | ||
3888 | * R1364 (0x554) - AIF2 Frame Ctrl 14 | ||
3889 | */ | ||
3890 | #define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */ | ||
3891 | #define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */ | ||
3892 | #define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */ | ||
3893 | |||
3894 | /* | ||
3895 | * R1365 (0x555) - AIF2 Frame Ctrl 15 | ||
3896 | */ | ||
3897 | #define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */ | ||
3898 | #define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */ | ||
3899 | #define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */ | ||
3900 | |||
3901 | /* | ||
3902 | * R1366 (0x556) - AIF2 Frame Ctrl 16 | ||
3903 | */ | ||
3904 | #define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */ | ||
3905 | #define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */ | ||
3906 | #define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */ | ||
3907 | |||
3908 | /* | ||
3752 | * R1369 (0x559) - AIF2 Tx Enables | 3909 | * R1369 (0x559) - AIF2 Tx Enables |
3753 | */ | 3910 | */ |
3911 | #define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */ | ||
3912 | #define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */ | ||
3913 | #define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */ | ||
3914 | #define ARIZONA_AIF2TX6_ENA_WIDTH 1 /* AIF2TX6_ENA */ | ||
3915 | #define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */ | ||
3916 | #define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */ | ||
3917 | #define ARIZONA_AIF2TX5_ENA_SHIFT 4 /* AIF2TX5_ENA */ | ||
3918 | #define ARIZONA_AIF2TX5_ENA_WIDTH 1 /* AIF2TX5_ENA */ | ||
3919 | #define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */ | ||
3920 | #define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */ | ||
3921 | #define ARIZONA_AIF2TX4_ENA_SHIFT 3 /* AIF2TX4_ENA */ | ||
3922 | #define ARIZONA_AIF2TX4_ENA_WIDTH 1 /* AIF2TX4_ENA */ | ||
3923 | #define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */ | ||
3924 | #define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */ | ||
3925 | #define ARIZONA_AIF2TX3_ENA_SHIFT 2 /* AIF2TX3_ENA */ | ||
3926 | #define ARIZONA_AIF2TX3_ENA_WIDTH 1 /* AIF2TX3_ENA */ | ||
3754 | #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */ | 3927 | #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */ |
3755 | #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */ | 3928 | #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */ |
3756 | #define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */ | 3929 | #define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */ |
@@ -3763,6 +3936,22 @@ | |||
3763 | /* | 3936 | /* |
3764 | * R1370 (0x55A) - AIF2 Rx Enables | 3937 | * R1370 (0x55A) - AIF2 Rx Enables |
3765 | */ | 3938 | */ |
3939 | #define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */ | ||
3940 | #define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */ | ||
3941 | #define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */ | ||
3942 | #define ARIZONA_AIF2RX6_ENA_WIDTH 1 /* AIF2RX6_ENA */ | ||
3943 | #define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */ | ||
3944 | #define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */ | ||
3945 | #define ARIZONA_AIF2RX5_ENA_SHIFT 4 /* AIF2RX5_ENA */ | ||
3946 | #define ARIZONA_AIF2RX5_ENA_WIDTH 1 /* AIF2RX5_ENA */ | ||
3947 | #define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */ | ||
3948 | #define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */ | ||
3949 | #define ARIZONA_AIF2RX4_ENA_SHIFT 3 /* AIF2RX4_ENA */ | ||
3950 | #define ARIZONA_AIF2RX4_ENA_WIDTH 1 /* AIF2RX4_ENA */ | ||
3951 | #define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */ | ||
3952 | #define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */ | ||
3953 | #define ARIZONA_AIF2RX3_ENA_SHIFT 2 /* AIF2RX3_ENA */ | ||
3954 | #define ARIZONA_AIF2RX3_ENA_WIDTH 1 /* AIF2RX3_ENA */ | ||
3766 | #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */ | 3955 | #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */ |
3767 | #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */ | 3956 | #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */ |
3768 | #define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */ | 3957 | #define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */ |
diff --git a/include/linux/platform_data/asoc-ti-mcbsp.h b/include/linux/platform_data/asoc-ti-mcbsp.h index c78d90b28b19..3c73c045f8da 100644 --- a/include/linux/platform_data/asoc-ti-mcbsp.h +++ b/include/linux/platform_data/asoc-ti-mcbsp.h | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/plat-omap/include/mach/mcbsp.h | ||
3 | * | ||
4 | * Defines for Multi-Channel Buffered Serial Port | 2 | * Defines for Multi-Channel Buffered Serial Port |
5 | * | 3 | * |
6 | * Copyright (C) 2002 RidgeRun, Inc. | 4 | * Copyright (C) 2002 RidgeRun, Inc. |
@@ -21,8 +19,8 @@ | |||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
22 | * | 20 | * |
23 | */ | 21 | */ |
24 | #ifndef __ASM_ARCH_OMAP_MCBSP_H | 22 | #ifndef __ASOC_TI_MCBSP_H |
25 | #define __ASM_ARCH_OMAP_MCBSP_H | 23 | #define __ASOC_TI_MCBSP_H |
26 | 24 | ||
27 | #include <linux/spinlock.h> | 25 | #include <linux/spinlock.h> |
28 | #include <linux/clk.h> | 26 | #include <linux/clk.h> |
diff --git a/include/linux/platform_data/asoc-ux500-msp.h b/include/linux/platform_data/asoc-ux500-msp.h index 9991aea3d577..2f34bb98fe2a 100644 --- a/include/linux/platform_data/asoc-ux500-msp.h +++ b/include/linux/platform_data/asoc-ux500-msp.h | |||
@@ -10,16 +10,9 @@ | |||
10 | 10 | ||
11 | #include <linux/platform_data/dma-ste-dma40.h> | 11 | #include <linux/platform_data/dma-ste-dma40.h> |
12 | 12 | ||
13 | enum msp_i2s_id { | ||
14 | MSP_I2S_0 = 0, | ||
15 | MSP_I2S_1, | ||
16 | MSP_I2S_2, | ||
17 | MSP_I2S_3, | ||
18 | }; | ||
19 | |||
20 | /* Platform data structure for a MSP I2S-device */ | 13 | /* Platform data structure for a MSP I2S-device */ |
21 | struct msp_i2s_platform_data { | 14 | struct msp_i2s_platform_data { |
22 | enum msp_i2s_id id; | 15 | int id; |
23 | struct stedma40_chan_cfg *msp_i2s_dma_rx; | 16 | struct stedma40_chan_cfg *msp_i2s_dma_rx; |
24 | struct stedma40_chan_cfg *msp_i2s_dma_tx; | 17 | struct stedma40_chan_cfg *msp_i2s_dma_tx; |
25 | }; | 18 | }; |
diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h index 689a856b86f9..5245992b0367 100644 --- a/include/linux/platform_data/davinci_asp.h +++ b/include/linux/platform_data/davinci_asp.h | |||
@@ -92,6 +92,7 @@ enum { | |||
92 | MCASP_VERSION_1 = 0, /* DM646x */ | 92 | MCASP_VERSION_1 = 0, /* DM646x */ |
93 | MCASP_VERSION_2, /* DA8xx/OMAPL1x */ | 93 | MCASP_VERSION_2, /* DA8xx/OMAPL1x */ |
94 | MCASP_VERSION_3, /* TI81xx/AM33xx */ | 94 | MCASP_VERSION_3, /* TI81xx/AM33xx */ |
95 | MCASP_VERSION_4, /* DRA7xxx */ | ||
95 | }; | 96 | }; |
96 | 97 | ||
97 | enum mcbsp_clk_input_pin { | 98 | enum mcbsp_clk_input_pin { |
diff --git a/include/sound/cs42l52.h b/include/sound/cs42l52.h index 7c2be4a51894..bbabf84bdb44 100644 --- a/include/sound/cs42l52.h +++ b/include/sound/cs42l52.h | |||
@@ -16,17 +16,11 @@ struct cs42l52_platform_data { | |||
16 | /* MICBIAS Level. Check datasheet Pg48 */ | 16 | /* MICBIAS Level. Check datasheet Pg48 */ |
17 | unsigned int micbias_lvl; | 17 | unsigned int micbias_lvl; |
18 | 18 | ||
19 | /* MICA mode selection 0=Single 1=Differential */ | 19 | /* MICA mode selection Differential or Single-ended */ |
20 | unsigned int mica_cfg; | 20 | bool mica_diff_cfg; |
21 | 21 | ||
22 | /* MICB mode selection 0=Single 1=Differential */ | 22 | /* MICB mode selection Differential or Single-ended */ |
23 | unsigned int micb_cfg; | 23 | bool micb_diff_cfg; |
24 | |||
25 | /* MICA Select 0=MIC1A 1=MIC2A */ | ||
26 | unsigned int mica_sel; | ||
27 | |||
28 | /* MICB Select 0=MIC2A 1=MIC2B */ | ||
29 | unsigned int micb_sel; | ||
30 | 24 | ||
31 | /* Charge Pump Freq. Check datasheet Pg73 */ | 25 | /* Charge Pump Freq. Check datasheet Pg73 */ |
32 | unsigned int chgfreq; | 26 | unsigned int chgfreq; |
diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h index 15017311f2e9..eb73a3a39ec2 100644 --- a/include/sound/dmaengine_pcm.h +++ b/include/sound/dmaengine_pcm.h | |||
@@ -114,6 +114,10 @@ void snd_dmaengine_pcm_set_config_from_dai_data( | |||
114 | * @compat_filter_fn: Will be used as the filter function when requesting a | 114 | * @compat_filter_fn: Will be used as the filter function when requesting a |
115 | * channel for platforms which do not use devicetree. The filter parameter | 115 | * channel for platforms which do not use devicetree. The filter parameter |
116 | * will be the DAI's DMA data. | 116 | * will be the DAI's DMA data. |
117 | * @dma_dev: If set, request DMA channel on this device rather than the DAI | ||
118 | * device. | ||
119 | * @chan_names: If set, these custom DMA channel names will be requested at | ||
120 | * registration time. | ||
117 | * @pcm_hardware: snd_pcm_hardware struct to be used for the PCM. | 121 | * @pcm_hardware: snd_pcm_hardware struct to be used for the PCM. |
118 | * @prealloc_buffer_size: Size of the preallocated audio buffer. | 122 | * @prealloc_buffer_size: Size of the preallocated audio buffer. |
119 | * | 123 | * |
@@ -130,6 +134,8 @@ struct snd_dmaengine_pcm_config { | |||
130 | struct snd_soc_pcm_runtime *rtd, | 134 | struct snd_soc_pcm_runtime *rtd, |
131 | struct snd_pcm_substream *substream); | 135 | struct snd_pcm_substream *substream); |
132 | dma_filter_fn compat_filter_fn; | 136 | dma_filter_fn compat_filter_fn; |
137 | struct device *dma_dev; | ||
138 | const char *chan_names[SNDRV_PCM_STREAM_LAST + 1]; | ||
133 | 139 | ||
134 | const struct snd_pcm_hardware *pcm_hardware; | 140 | const struct snd_pcm_hardware *pcm_hardware; |
135 | unsigned int prealloc_buffer_size; | 141 | unsigned int prealloc_buffer_size; |
@@ -140,6 +146,10 @@ int snd_dmaengine_pcm_register(struct device *dev, | |||
140 | unsigned int flags); | 146 | unsigned int flags); |
141 | void snd_dmaengine_pcm_unregister(struct device *dev); | 147 | void snd_dmaengine_pcm_unregister(struct device *dev); |
142 | 148 | ||
149 | int devm_snd_dmaengine_pcm_register(struct device *dev, | ||
150 | const struct snd_dmaengine_pcm_config *config, | ||
151 | unsigned int flags); | ||
152 | |||
143 | int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, | 153 | int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, |
144 | struct snd_pcm_hw_params *params, | 154 | struct snd_pcm_hw_params *params, |
145 | struct dma_slave_config *slave_config); | 155 | struct dma_slave_config *slave_config); |
diff --git a/include/sound/hda_verbs.h b/include/sound/hda_verbs.h new file mode 100644 index 000000000000..d0509db6d0ec --- /dev/null +++ b/include/sound/hda_verbs.h | |||
@@ -0,0 +1,554 @@ | |||
1 | /* | ||
2 | * HD-audio codec verbs | ||
3 | */ | ||
4 | |||
5 | #ifndef __SOUND_HDA_VERBS_H | ||
6 | #define __SOUND_HDA_VERBS_H | ||
7 | |||
8 | /* | ||
9 | * nodes | ||
10 | */ | ||
11 | #define AC_NODE_ROOT 0x00 | ||
12 | |||
13 | /* | ||
14 | * function group types | ||
15 | */ | ||
16 | enum { | ||
17 | AC_GRP_AUDIO_FUNCTION = 0x01, | ||
18 | AC_GRP_MODEM_FUNCTION = 0x02, | ||
19 | }; | ||
20 | |||
21 | /* | ||
22 | * widget types | ||
23 | */ | ||
24 | enum { | ||
25 | AC_WID_AUD_OUT, /* Audio Out */ | ||
26 | AC_WID_AUD_IN, /* Audio In */ | ||
27 | AC_WID_AUD_MIX, /* Audio Mixer */ | ||
28 | AC_WID_AUD_SEL, /* Audio Selector */ | ||
29 | AC_WID_PIN, /* Pin Complex */ | ||
30 | AC_WID_POWER, /* Power */ | ||
31 | AC_WID_VOL_KNB, /* Volume Knob */ | ||
32 | AC_WID_BEEP, /* Beep Generator */ | ||
33 | AC_WID_VENDOR = 0x0f /* Vendor specific */ | ||
34 | }; | ||
35 | |||
36 | /* | ||
37 | * GET verbs | ||
38 | */ | ||
39 | #define AC_VERB_GET_STREAM_FORMAT 0x0a00 | ||
40 | #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00 | ||
41 | #define AC_VERB_GET_PROC_COEF 0x0c00 | ||
42 | #define AC_VERB_GET_COEF_INDEX 0x0d00 | ||
43 | #define AC_VERB_PARAMETERS 0x0f00 | ||
44 | #define AC_VERB_GET_CONNECT_SEL 0x0f01 | ||
45 | #define AC_VERB_GET_CONNECT_LIST 0x0f02 | ||
46 | #define AC_VERB_GET_PROC_STATE 0x0f03 | ||
47 | #define AC_VERB_GET_SDI_SELECT 0x0f04 | ||
48 | #define AC_VERB_GET_POWER_STATE 0x0f05 | ||
49 | #define AC_VERB_GET_CONV 0x0f06 | ||
50 | #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07 | ||
51 | #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08 | ||
52 | #define AC_VERB_GET_PIN_SENSE 0x0f09 | ||
53 | #define AC_VERB_GET_BEEP_CONTROL 0x0f0a | ||
54 | #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c | ||
55 | #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d | ||
56 | #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */ | ||
57 | #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f | ||
58 | /* f10-f1a: GPIO */ | ||
59 | #define AC_VERB_GET_GPIO_DATA 0x0f15 | ||
60 | #define AC_VERB_GET_GPIO_MASK 0x0f16 | ||
61 | #define AC_VERB_GET_GPIO_DIRECTION 0x0f17 | ||
62 | #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18 | ||
63 | #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19 | ||
64 | #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a | ||
65 | #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c | ||
66 | /* f20: AFG/MFG */ | ||
67 | #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 | ||
68 | #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d | ||
69 | #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e | ||
70 | #define AC_VERB_GET_HDMI_ELDD 0x0f2f | ||
71 | #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30 | ||
72 | #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31 | ||
73 | #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32 | ||
74 | #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33 | ||
75 | #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34 | ||
76 | #define AC_VERB_GET_DEVICE_SEL 0xf35 | ||
77 | #define AC_VERB_GET_DEVICE_LIST 0xf36 | ||
78 | |||
79 | /* | ||
80 | * SET verbs | ||
81 | */ | ||
82 | #define AC_VERB_SET_STREAM_FORMAT 0x200 | ||
83 | #define AC_VERB_SET_AMP_GAIN_MUTE 0x300 | ||
84 | #define AC_VERB_SET_PROC_COEF 0x400 | ||
85 | #define AC_VERB_SET_COEF_INDEX 0x500 | ||
86 | #define AC_VERB_SET_CONNECT_SEL 0x701 | ||
87 | #define AC_VERB_SET_PROC_STATE 0x703 | ||
88 | #define AC_VERB_SET_SDI_SELECT 0x704 | ||
89 | #define AC_VERB_SET_POWER_STATE 0x705 | ||
90 | #define AC_VERB_SET_CHANNEL_STREAMID 0x706 | ||
91 | #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707 | ||
92 | #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708 | ||
93 | #define AC_VERB_SET_PIN_SENSE 0x709 | ||
94 | #define AC_VERB_SET_BEEP_CONTROL 0x70a | ||
95 | #define AC_VERB_SET_EAPD_BTLENABLE 0x70c | ||
96 | #define AC_VERB_SET_DIGI_CONVERT_1 0x70d | ||
97 | #define AC_VERB_SET_DIGI_CONVERT_2 0x70e | ||
98 | #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f | ||
99 | #define AC_VERB_SET_GPIO_DATA 0x715 | ||
100 | #define AC_VERB_SET_GPIO_MASK 0x716 | ||
101 | #define AC_VERB_SET_GPIO_DIRECTION 0x717 | ||
102 | #define AC_VERB_SET_GPIO_WAKE_MASK 0x718 | ||
103 | #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719 | ||
104 | #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a | ||
105 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c | ||
106 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d | ||
107 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e | ||
108 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f | ||
109 | #define AC_VERB_SET_EAPD 0x788 | ||
110 | #define AC_VERB_SET_CODEC_RESET 0x7ff | ||
111 | #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d | ||
112 | #define AC_VERB_SET_HDMI_DIP_INDEX 0x730 | ||
113 | #define AC_VERB_SET_HDMI_DIP_DATA 0x731 | ||
114 | #define AC_VERB_SET_HDMI_DIP_XMIT 0x732 | ||
115 | #define AC_VERB_SET_HDMI_CP_CTRL 0x733 | ||
116 | #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734 | ||
117 | #define AC_VERB_SET_DEVICE_SEL 0x735 | ||
118 | |||
119 | /* | ||
120 | * Parameter IDs | ||
121 | */ | ||
122 | #define AC_PAR_VENDOR_ID 0x00 | ||
123 | #define AC_PAR_SUBSYSTEM_ID 0x01 | ||
124 | #define AC_PAR_REV_ID 0x02 | ||
125 | #define AC_PAR_NODE_COUNT 0x04 | ||
126 | #define AC_PAR_FUNCTION_TYPE 0x05 | ||
127 | #define AC_PAR_AUDIO_FG_CAP 0x08 | ||
128 | #define AC_PAR_AUDIO_WIDGET_CAP 0x09 | ||
129 | #define AC_PAR_PCM 0x0a | ||
130 | #define AC_PAR_STREAM 0x0b | ||
131 | #define AC_PAR_PIN_CAP 0x0c | ||
132 | #define AC_PAR_AMP_IN_CAP 0x0d | ||
133 | #define AC_PAR_CONNLIST_LEN 0x0e | ||
134 | #define AC_PAR_POWER_STATE 0x0f | ||
135 | #define AC_PAR_PROC_CAP 0x10 | ||
136 | #define AC_PAR_GPIO_CAP 0x11 | ||
137 | #define AC_PAR_AMP_OUT_CAP 0x12 | ||
138 | #define AC_PAR_VOL_KNB_CAP 0x13 | ||
139 | #define AC_PAR_DEVLIST_LEN 0x15 | ||
140 | #define AC_PAR_HDMI_LPCM_CAP 0x20 | ||
141 | |||
142 | /* | ||
143 | * AC_VERB_PARAMETERS results (32bit) | ||
144 | */ | ||
145 | |||
146 | /* Function Group Type */ | ||
147 | #define AC_FGT_TYPE (0xff<<0) | ||
148 | #define AC_FGT_TYPE_SHIFT 0 | ||
149 | #define AC_FGT_UNSOL_CAP (1<<8) | ||
150 | |||
151 | /* Audio Function Group Capabilities */ | ||
152 | #define AC_AFG_OUT_DELAY (0xf<<0) | ||
153 | #define AC_AFG_IN_DELAY (0xf<<8) | ||
154 | #define AC_AFG_BEEP_GEN (1<<16) | ||
155 | |||
156 | /* Audio Widget Capabilities */ | ||
157 | #define AC_WCAP_STEREO (1<<0) /* stereo I/O */ | ||
158 | #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */ | ||
159 | #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */ | ||
160 | #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */ | ||
161 | #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */ | ||
162 | #define AC_WCAP_STRIPE (1<<5) /* stripe */ | ||
163 | #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */ | ||
164 | #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */ | ||
165 | #define AC_WCAP_CONN_LIST (1<<8) /* connection list */ | ||
166 | #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */ | ||
167 | #define AC_WCAP_POWER (1<<10) /* power control */ | ||
168 | #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */ | ||
169 | #define AC_WCAP_CP_CAPS (1<<12) /* content protection */ | ||
170 | #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */ | ||
171 | #define AC_WCAP_DELAY (0xf<<16) | ||
172 | #define AC_WCAP_DELAY_SHIFT 16 | ||
173 | #define AC_WCAP_TYPE (0xf<<20) | ||
174 | #define AC_WCAP_TYPE_SHIFT 20 | ||
175 | |||
176 | /* supported PCM rates and bits */ | ||
177 | #define AC_SUPPCM_RATES (0xfff << 0) | ||
178 | #define AC_SUPPCM_BITS_8 (1<<16) | ||
179 | #define AC_SUPPCM_BITS_16 (1<<17) | ||
180 | #define AC_SUPPCM_BITS_20 (1<<18) | ||
181 | #define AC_SUPPCM_BITS_24 (1<<19) | ||
182 | #define AC_SUPPCM_BITS_32 (1<<20) | ||
183 | |||
184 | /* supported PCM stream format */ | ||
185 | #define AC_SUPFMT_PCM (1<<0) | ||
186 | #define AC_SUPFMT_FLOAT32 (1<<1) | ||
187 | #define AC_SUPFMT_AC3 (1<<2) | ||
188 | |||
189 | /* GP I/O count */ | ||
190 | #define AC_GPIO_IO_COUNT (0xff<<0) | ||
191 | #define AC_GPIO_O_COUNT (0xff<<8) | ||
192 | #define AC_GPIO_O_COUNT_SHIFT 8 | ||
193 | #define AC_GPIO_I_COUNT (0xff<<16) | ||
194 | #define AC_GPIO_I_COUNT_SHIFT 16 | ||
195 | #define AC_GPIO_UNSOLICITED (1<<30) | ||
196 | #define AC_GPIO_WAKE (1<<31) | ||
197 | |||
198 | /* Converter stream, channel */ | ||
199 | #define AC_CONV_CHANNEL (0xf<<0) | ||
200 | #define AC_CONV_STREAM (0xf<<4) | ||
201 | #define AC_CONV_STREAM_SHIFT 4 | ||
202 | |||
203 | /* Input converter SDI select */ | ||
204 | #define AC_SDI_SELECT (0xf<<0) | ||
205 | |||
206 | /* stream format id */ | ||
207 | #define AC_FMT_CHAN_SHIFT 0 | ||
208 | #define AC_FMT_CHAN_MASK (0x0f << 0) | ||
209 | #define AC_FMT_BITS_SHIFT 4 | ||
210 | #define AC_FMT_BITS_MASK (7 << 4) | ||
211 | #define AC_FMT_BITS_8 (0 << 4) | ||
212 | #define AC_FMT_BITS_16 (1 << 4) | ||
213 | #define AC_FMT_BITS_20 (2 << 4) | ||
214 | #define AC_FMT_BITS_24 (3 << 4) | ||
215 | #define AC_FMT_BITS_32 (4 << 4) | ||
216 | #define AC_FMT_DIV_SHIFT 8 | ||
217 | #define AC_FMT_DIV_MASK (7 << 8) | ||
218 | #define AC_FMT_MULT_SHIFT 11 | ||
219 | #define AC_FMT_MULT_MASK (7 << 11) | ||
220 | #define AC_FMT_BASE_SHIFT 14 | ||
221 | #define AC_FMT_BASE_48K (0 << 14) | ||
222 | #define AC_FMT_BASE_44K (1 << 14) | ||
223 | #define AC_FMT_TYPE_SHIFT 15 | ||
224 | #define AC_FMT_TYPE_PCM (0 << 15) | ||
225 | #define AC_FMT_TYPE_NON_PCM (1 << 15) | ||
226 | |||
227 | /* Unsolicited response control */ | ||
228 | #define AC_UNSOL_TAG (0x3f<<0) | ||
229 | #define AC_UNSOL_ENABLED (1<<7) | ||
230 | #define AC_USRSP_EN AC_UNSOL_ENABLED | ||
231 | |||
232 | /* Unsolicited responses */ | ||
233 | #define AC_UNSOL_RES_TAG (0x3f<<26) | ||
234 | #define AC_UNSOL_RES_TAG_SHIFT 26 | ||
235 | #define AC_UNSOL_RES_SUBTAG (0x1f<<21) | ||
236 | #define AC_UNSOL_RES_SUBTAG_SHIFT 21 | ||
237 | #define AC_UNSOL_RES_DE (0x3f<<15) /* Device Entry | ||
238 | * (for DP1.2 MST) | ||
239 | */ | ||
240 | #define AC_UNSOL_RES_DE_SHIFT 15 | ||
241 | #define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */ | ||
242 | #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */ | ||
243 | #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */ | ||
244 | #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */ | ||
245 | #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */ | ||
246 | |||
247 | /* Pin widget capabilies */ | ||
248 | #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ | ||
249 | #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ | ||
250 | #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */ | ||
251 | #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */ | ||
252 | #define AC_PINCAP_OUT (1<<4) /* output capable */ | ||
253 | #define AC_PINCAP_IN (1<<5) /* input capable */ | ||
254 | #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */ | ||
255 | /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification, | ||
256 | * but is marked reserved in the Intel HDA specification. | ||
257 | */ | ||
258 | #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */ | ||
259 | /* Note: The same bit as LR_SWAP is newly defined as HDMI capability | ||
260 | * in HD-audio specification | ||
261 | */ | ||
262 | #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */ | ||
263 | #define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can | ||
264 | * coexist with AC_PINCAP_HDMI | ||
265 | */ | ||
266 | #define AC_PINCAP_VREF (0x37<<8) | ||
267 | #define AC_PINCAP_VREF_SHIFT 8 | ||
268 | #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */ | ||
269 | #define AC_PINCAP_HBR (1<<27) /* High Bit Rate */ | ||
270 | /* Vref status (used in pin cap) */ | ||
271 | #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */ | ||
272 | #define AC_PINCAP_VREF_50 (1<<1) /* 50% */ | ||
273 | #define AC_PINCAP_VREF_GRD (1<<2) /* ground */ | ||
274 | #define AC_PINCAP_VREF_80 (1<<4) /* 80% */ | ||
275 | #define AC_PINCAP_VREF_100 (1<<5) /* 100% */ | ||
276 | |||
277 | /* Amplifier capabilities */ | ||
278 | #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */ | ||
279 | #define AC_AMPCAP_OFFSET_SHIFT 0 | ||
280 | #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */ | ||
281 | #define AC_AMPCAP_NUM_STEPS_SHIFT 8 | ||
282 | #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB | ||
283 | * in 0.25dB | ||
284 | */ | ||
285 | #define AC_AMPCAP_STEP_SIZE_SHIFT 16 | ||
286 | #define AC_AMPCAP_MUTE (1<<31) /* mute capable */ | ||
287 | #define AC_AMPCAP_MUTE_SHIFT 31 | ||
288 | |||
289 | /* driver-specific amp-caps: using bits 24-30 */ | ||
290 | #define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */ | ||
291 | |||
292 | /* Connection list */ | ||
293 | #define AC_CLIST_LENGTH (0x7f<<0) | ||
294 | #define AC_CLIST_LONG (1<<7) | ||
295 | |||
296 | /* Supported power status */ | ||
297 | #define AC_PWRST_D0SUP (1<<0) | ||
298 | #define AC_PWRST_D1SUP (1<<1) | ||
299 | #define AC_PWRST_D2SUP (1<<2) | ||
300 | #define AC_PWRST_D3SUP (1<<3) | ||
301 | #define AC_PWRST_D3COLDSUP (1<<4) | ||
302 | #define AC_PWRST_S3D3COLDSUP (1<<29) | ||
303 | #define AC_PWRST_CLKSTOP (1<<30) | ||
304 | #define AC_PWRST_EPSS (1U<<31) | ||
305 | |||
306 | /* Power state values */ | ||
307 | #define AC_PWRST_SETTING (0xf<<0) | ||
308 | #define AC_PWRST_ACTUAL (0xf<<4) | ||
309 | #define AC_PWRST_ACTUAL_SHIFT 4 | ||
310 | #define AC_PWRST_D0 0x00 | ||
311 | #define AC_PWRST_D1 0x01 | ||
312 | #define AC_PWRST_D2 0x02 | ||
313 | #define AC_PWRST_D3 0x03 | ||
314 | #define AC_PWRST_ERROR (1<<8) | ||
315 | #define AC_PWRST_CLK_STOP_OK (1<<9) | ||
316 | #define AC_PWRST_SETTING_RESET (1<<10) | ||
317 | |||
318 | /* Processing capabilies */ | ||
319 | #define AC_PCAP_BENIGN (1<<0) | ||
320 | #define AC_PCAP_NUM_COEF (0xff<<8) | ||
321 | #define AC_PCAP_NUM_COEF_SHIFT 8 | ||
322 | |||
323 | /* Volume knobs capabilities */ | ||
324 | #define AC_KNBCAP_NUM_STEPS (0x7f<<0) | ||
325 | #define AC_KNBCAP_DELTA (1<<7) | ||
326 | |||
327 | /* HDMI LPCM capabilities */ | ||
328 | #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */ | ||
329 | #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */ | ||
330 | #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */ | ||
331 | #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */ | ||
332 | #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */ | ||
333 | #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */ | ||
334 | #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */ | ||
335 | #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */ | ||
336 | #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */ | ||
337 | #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */ | ||
338 | #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */ | ||
339 | #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */ | ||
340 | #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */ | ||
341 | #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */ | ||
342 | |||
343 | /* Display pin's device list length */ | ||
344 | #define AC_DEV_LIST_LEN_MASK 0x3f | ||
345 | #define AC_MAX_DEV_LIST_LEN 64 | ||
346 | |||
347 | /* | ||
348 | * Control Parameters | ||
349 | */ | ||
350 | |||
351 | /* Amp gain/mute */ | ||
352 | #define AC_AMP_MUTE (1<<7) | ||
353 | #define AC_AMP_GAIN (0x7f) | ||
354 | #define AC_AMP_GET_INDEX (0xf<<0) | ||
355 | |||
356 | #define AC_AMP_GET_LEFT (1<<13) | ||
357 | #define AC_AMP_GET_RIGHT (0<<13) | ||
358 | #define AC_AMP_GET_OUTPUT (1<<15) | ||
359 | #define AC_AMP_GET_INPUT (0<<15) | ||
360 | |||
361 | #define AC_AMP_SET_INDEX (0xf<<8) | ||
362 | #define AC_AMP_SET_INDEX_SHIFT 8 | ||
363 | #define AC_AMP_SET_RIGHT (1<<12) | ||
364 | #define AC_AMP_SET_LEFT (1<<13) | ||
365 | #define AC_AMP_SET_INPUT (1<<14) | ||
366 | #define AC_AMP_SET_OUTPUT (1<<15) | ||
367 | |||
368 | /* DIGITAL1 bits */ | ||
369 | #define AC_DIG1_ENABLE (1<<0) | ||
370 | #define AC_DIG1_V (1<<1) | ||
371 | #define AC_DIG1_VCFG (1<<2) | ||
372 | #define AC_DIG1_EMPHASIS (1<<3) | ||
373 | #define AC_DIG1_COPYRIGHT (1<<4) | ||
374 | #define AC_DIG1_NONAUDIO (1<<5) | ||
375 | #define AC_DIG1_PROFESSIONAL (1<<6) | ||
376 | #define AC_DIG1_LEVEL (1<<7) | ||
377 | |||
378 | /* DIGITAL2 bits */ | ||
379 | #define AC_DIG2_CC (0x7f<<0) | ||
380 | |||
381 | /* DIGITAL3 bits */ | ||
382 | #define AC_DIG3_ICT (0xf<<0) | ||
383 | #define AC_DIG3_KAE (1<<7) | ||
384 | |||
385 | /* Pin widget control - 8bit */ | ||
386 | #define AC_PINCTL_EPT (0x3<<0) | ||
387 | #define AC_PINCTL_EPT_NATIVE 0 | ||
388 | #define AC_PINCTL_EPT_HBR 3 | ||
389 | #define AC_PINCTL_VREFEN (0x7<<0) | ||
390 | #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */ | ||
391 | #define AC_PINCTL_VREF_50 1 /* 50% */ | ||
392 | #define AC_PINCTL_VREF_GRD 2 /* ground */ | ||
393 | #define AC_PINCTL_VREF_80 4 /* 80% */ | ||
394 | #define AC_PINCTL_VREF_100 5 /* 100% */ | ||
395 | #define AC_PINCTL_IN_EN (1<<5) | ||
396 | #define AC_PINCTL_OUT_EN (1<<6) | ||
397 | #define AC_PINCTL_HP_EN (1<<7) | ||
398 | |||
399 | /* Pin sense - 32bit */ | ||
400 | #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) | ||
401 | #define AC_PINSENSE_PRESENCE (1<<31) | ||
402 | #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */ | ||
403 | |||
404 | /* EAPD/BTL enable - 32bit */ | ||
405 | #define AC_EAPDBTL_BALANCED (1<<0) | ||
406 | #define AC_EAPDBTL_EAPD (1<<1) | ||
407 | #define AC_EAPDBTL_LR_SWAP (1<<2) | ||
408 | |||
409 | /* HDMI ELD data */ | ||
410 | #define AC_ELDD_ELD_VALID (1<<31) | ||
411 | #define AC_ELDD_ELD_DATA 0xff | ||
412 | |||
413 | /* HDMI DIP size */ | ||
414 | #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */ | ||
415 | #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */ | ||
416 | |||
417 | /* HDMI DIP index */ | ||
418 | #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */ | ||
419 | #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */ | ||
420 | |||
421 | /* HDMI DIP xmit (transmit) control */ | ||
422 | #define AC_DIPXMIT_MASK (0x3<<6) | ||
423 | #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */ | ||
424 | #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */ | ||
425 | #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */ | ||
426 | |||
427 | /* HDMI content protection (CP) control */ | ||
428 | #define AC_CPCTRL_CES (1<<9) /* current encryption state */ | ||
429 | #define AC_CPCTRL_READY (1<<8) /* ready bit */ | ||
430 | #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */ | ||
431 | #define AC_CPCTRL_STATE (3<<0) /* current CP request state */ | ||
432 | |||
433 | /* Converter channel <-> HDMI slot mapping */ | ||
434 | #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */ | ||
435 | #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */ | ||
436 | |||
437 | /* configuration default - 32bit */ | ||
438 | #define AC_DEFCFG_SEQUENCE (0xf<<0) | ||
439 | #define AC_DEFCFG_DEF_ASSOC (0xf<<4) | ||
440 | #define AC_DEFCFG_ASSOC_SHIFT 4 | ||
441 | #define AC_DEFCFG_MISC (0xf<<8) | ||
442 | #define AC_DEFCFG_MISC_SHIFT 8 | ||
443 | #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0) | ||
444 | #define AC_DEFCFG_COLOR (0xf<<12) | ||
445 | #define AC_DEFCFG_COLOR_SHIFT 12 | ||
446 | #define AC_DEFCFG_CONN_TYPE (0xf<<16) | ||
447 | #define AC_DEFCFG_CONN_TYPE_SHIFT 16 | ||
448 | #define AC_DEFCFG_DEVICE (0xf<<20) | ||
449 | #define AC_DEFCFG_DEVICE_SHIFT 20 | ||
450 | #define AC_DEFCFG_LOCATION (0x3f<<24) | ||
451 | #define AC_DEFCFG_LOCATION_SHIFT 24 | ||
452 | #define AC_DEFCFG_PORT_CONN (0x3<<30) | ||
453 | #define AC_DEFCFG_PORT_CONN_SHIFT 30 | ||
454 | |||
455 | /* Display pin's device list entry */ | ||
456 | #define AC_DE_PD (1<<0) | ||
457 | #define AC_DE_ELDV (1<<1) | ||
458 | #define AC_DE_IA (1<<2) | ||
459 | |||
460 | /* device device types (0x0-0xf) */ | ||
461 | enum { | ||
462 | AC_JACK_LINE_OUT, | ||
463 | AC_JACK_SPEAKER, | ||
464 | AC_JACK_HP_OUT, | ||
465 | AC_JACK_CD, | ||
466 | AC_JACK_SPDIF_OUT, | ||
467 | AC_JACK_DIG_OTHER_OUT, | ||
468 | AC_JACK_MODEM_LINE_SIDE, | ||
469 | AC_JACK_MODEM_HAND_SIDE, | ||
470 | AC_JACK_LINE_IN, | ||
471 | AC_JACK_AUX, | ||
472 | AC_JACK_MIC_IN, | ||
473 | AC_JACK_TELEPHONY, | ||
474 | AC_JACK_SPDIF_IN, | ||
475 | AC_JACK_DIG_OTHER_IN, | ||
476 | AC_JACK_OTHER = 0xf, | ||
477 | }; | ||
478 | |||
479 | /* jack connection types (0x0-0xf) */ | ||
480 | enum { | ||
481 | AC_JACK_CONN_UNKNOWN, | ||
482 | AC_JACK_CONN_1_8, | ||
483 | AC_JACK_CONN_1_4, | ||
484 | AC_JACK_CONN_ATAPI, | ||
485 | AC_JACK_CONN_RCA, | ||
486 | AC_JACK_CONN_OPTICAL, | ||
487 | AC_JACK_CONN_OTHER_DIGITAL, | ||
488 | AC_JACK_CONN_OTHER_ANALOG, | ||
489 | AC_JACK_CONN_DIN, | ||
490 | AC_JACK_CONN_XLR, | ||
491 | AC_JACK_CONN_RJ11, | ||
492 | AC_JACK_CONN_COMB, | ||
493 | AC_JACK_CONN_OTHER = 0xf, | ||
494 | }; | ||
495 | |||
496 | /* jack colors (0x0-0xf) */ | ||
497 | enum { | ||
498 | AC_JACK_COLOR_UNKNOWN, | ||
499 | AC_JACK_COLOR_BLACK, | ||
500 | AC_JACK_COLOR_GREY, | ||
501 | AC_JACK_COLOR_BLUE, | ||
502 | AC_JACK_COLOR_GREEN, | ||
503 | AC_JACK_COLOR_RED, | ||
504 | AC_JACK_COLOR_ORANGE, | ||
505 | AC_JACK_COLOR_YELLOW, | ||
506 | AC_JACK_COLOR_PURPLE, | ||
507 | AC_JACK_COLOR_PINK, | ||
508 | AC_JACK_COLOR_WHITE = 0xe, | ||
509 | AC_JACK_COLOR_OTHER, | ||
510 | }; | ||
511 | |||
512 | /* Jack location (0x0-0x3f) */ | ||
513 | /* common case */ | ||
514 | enum { | ||
515 | AC_JACK_LOC_NONE, | ||
516 | AC_JACK_LOC_REAR, | ||
517 | AC_JACK_LOC_FRONT, | ||
518 | AC_JACK_LOC_LEFT, | ||
519 | AC_JACK_LOC_RIGHT, | ||
520 | AC_JACK_LOC_TOP, | ||
521 | AC_JACK_LOC_BOTTOM, | ||
522 | }; | ||
523 | /* bits 4-5 */ | ||
524 | enum { | ||
525 | AC_JACK_LOC_EXTERNAL = 0x00, | ||
526 | AC_JACK_LOC_INTERNAL = 0x10, | ||
527 | AC_JACK_LOC_SEPARATE = 0x20, | ||
528 | AC_JACK_LOC_OTHER = 0x30, | ||
529 | }; | ||
530 | enum { | ||
531 | /* external on primary chasis */ | ||
532 | AC_JACK_LOC_REAR_PANEL = 0x07, | ||
533 | AC_JACK_LOC_DRIVE_BAY, | ||
534 | /* internal */ | ||
535 | AC_JACK_LOC_RISER = 0x17, | ||
536 | AC_JACK_LOC_HDMI, | ||
537 | AC_JACK_LOC_ATAPI, | ||
538 | /* others */ | ||
539 | AC_JACK_LOC_MOBILE_IN = 0x37, | ||
540 | AC_JACK_LOC_MOBILE_OUT, | ||
541 | }; | ||
542 | |||
543 | /* Port connectivity (0-3) */ | ||
544 | enum { | ||
545 | AC_JACK_PORT_COMPLEX, | ||
546 | AC_JACK_PORT_NONE, | ||
547 | AC_JACK_PORT_FIXED, | ||
548 | AC_JACK_PORT_BOTH, | ||
549 | }; | ||
550 | |||
551 | /* max. codec address */ | ||
552 | #define HDA_MAX_CODEC_ADDRESS 0x0f | ||
553 | |||
554 | #endif /* __SOUND_HDA_VERBS_H */ | ||
diff --git a/include/sound/memalloc.h b/include/sound/memalloc.h index 5f73785f5977..782d1df34208 100644 --- a/include/sound/memalloc.h +++ b/include/sound/memalloc.h | |||
@@ -149,13 +149,6 @@ int snd_dma_alloc_pages_fallback(int type, struct device *dev, size_t size, | |||
149 | struct snd_dma_buffer *dmab); | 149 | struct snd_dma_buffer *dmab); |
150 | void snd_dma_free_pages(struct snd_dma_buffer *dmab); | 150 | void snd_dma_free_pages(struct snd_dma_buffer *dmab); |
151 | 151 | ||
152 | /* buffer-preservation managements */ | ||
153 | |||
154 | #define snd_dma_pci_buf_id(pci) (((unsigned int)(pci)->vendor << 16) | (pci)->device) | ||
155 | |||
156 | size_t snd_dma_get_reserved_buf(struct snd_dma_buffer *dmab, unsigned int id); | ||
157 | int snd_dma_reserve_buf(struct snd_dma_buffer *dmab, unsigned int id); | ||
158 | |||
159 | /* basic memory allocation functions */ | 152 | /* basic memory allocation functions */ |
160 | void *snd_malloc_pages(size_t size, gfp_t gfp_flags); | 153 | void *snd_malloc_pages(size_t size, gfp_t gfp_flags); |
161 | void snd_free_pages(void *ptr, size_t size); | 154 | void snd_free_pages(void *ptr, size_t size); |
diff --git a/include/sound/pcm.h b/include/sound/pcm.h index 84b10f9a2832..4883499ab38b 100644 --- a/include/sound/pcm.h +++ b/include/sound/pcm.h | |||
@@ -381,7 +381,6 @@ struct snd_pcm_substream { | |||
381 | struct pm_qos_request latency_pm_qos_req; /* pm_qos request */ | 381 | struct pm_qos_request latency_pm_qos_req; /* pm_qos request */ |
382 | size_t buffer_bytes_max; /* limit ring buffer size */ | 382 | size_t buffer_bytes_max; /* limit ring buffer size */ |
383 | struct snd_dma_buffer dma_buffer; | 383 | struct snd_dma_buffer dma_buffer; |
384 | unsigned int dma_buf_id; | ||
385 | size_t dma_max; | 384 | size_t dma_max; |
386 | /* -- hardware operations -- */ | 385 | /* -- hardware operations -- */ |
387 | const struct snd_pcm_ops *ops; | 386 | const struct snd_pcm_ops *ops; |
@@ -901,6 +900,8 @@ extern const struct snd_pcm_hw_constraint_list snd_pcm_known_rates; | |||
901 | int snd_pcm_limit_hw_rates(struct snd_pcm_runtime *runtime); | 900 | int snd_pcm_limit_hw_rates(struct snd_pcm_runtime *runtime); |
902 | unsigned int snd_pcm_rate_to_rate_bit(unsigned int rate); | 901 | unsigned int snd_pcm_rate_to_rate_bit(unsigned int rate); |
903 | unsigned int snd_pcm_rate_bit_to_rate(unsigned int rate_bit); | 902 | unsigned int snd_pcm_rate_bit_to_rate(unsigned int rate_bit); |
903 | unsigned int snd_pcm_rate_mask_intersect(unsigned int rates_a, | ||
904 | unsigned int rates_b); | ||
904 | 905 | ||
905 | static inline void snd_pcm_set_runtime_buffer(struct snd_pcm_substream *substream, | 906 | static inline void snd_pcm_set_runtime_buffer(struct snd_pcm_substream *substream, |
906 | struct snd_dma_buffer *bufp) | 907 | struct snd_dma_buffer *bufp) |
diff --git a/include/sound/pcm_params.h b/include/sound/pcm_params.h index 37ae12e0ab06..6b1c78f05fab 100644 --- a/include/sound/pcm_params.h +++ b/include/sound/pcm_params.h | |||
@@ -354,4 +354,16 @@ params_period_bytes(const struct snd_pcm_hw_params *p) | |||
354 | params_channels(p)) / 8; | 354 | params_channels(p)) / 8; |
355 | } | 355 | } |
356 | 356 | ||
357 | static inline int | ||
358 | params_width(const struct snd_pcm_hw_params *p) | ||
359 | { | ||
360 | return snd_pcm_format_width(params_format(p)); | ||
361 | } | ||
362 | |||
363 | static inline int | ||
364 | params_physical_width(const struct snd_pcm_hw_params *p) | ||
365 | { | ||
366 | return snd_pcm_format_physical_width(params_format(p)); | ||
367 | } | ||
368 | |||
357 | #endif /* __SOUND_PCM_PARAMS_H */ | 369 | #endif /* __SOUND_PCM_PARAMS_H */ |
diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h index 12afab18945d..e147498abe50 100644 --- a/include/sound/rcar_snd.h +++ b/include/sound/rcar_snd.h | |||
@@ -18,7 +18,7 @@ | |||
18 | #define RSND_GEN1_ADG 1 | 18 | #define RSND_GEN1_ADG 1 |
19 | #define RSND_GEN1_SSI 2 | 19 | #define RSND_GEN1_SSI 2 |
20 | 20 | ||
21 | #define RSND_GEN2_SRU 0 | 21 | #define RSND_GEN2_SCU 0 |
22 | #define RSND_GEN2_ADG 1 | 22 | #define RSND_GEN2_ADG 1 |
23 | #define RSND_GEN2_SSIU 2 | 23 | #define RSND_GEN2_SSIU 2 |
24 | #define RSND_GEN2_SSI 3 | 24 | #define RSND_GEN2_SSI 3 |
@@ -58,6 +58,7 @@ struct rsnd_ssi_platform_info { | |||
58 | 58 | ||
59 | struct rsnd_scu_platform_info { | 59 | struct rsnd_scu_platform_info { |
60 | u32 flags; | 60 | u32 flags; |
61 | u32 convert_rate; /* sampling rate convert */ | ||
61 | }; | 62 | }; |
62 | 63 | ||
63 | /* | 64 | /* |
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index 800c101bb096..71f27c403194 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h | |||
@@ -123,6 +123,8 @@ int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate); | |||
123 | int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute, | 123 | int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute, |
124 | int direction); | 124 | int direction); |
125 | 125 | ||
126 | int snd_soc_dai_is_dummy(struct snd_soc_dai *dai); | ||
127 | |||
126 | struct snd_soc_dai_ops { | 128 | struct snd_soc_dai_ops { |
127 | /* | 129 | /* |
128 | * DAI clocking configuration, all optional. | 130 | * DAI clocking configuration, all optional. |
@@ -220,6 +222,8 @@ struct snd_soc_dai_driver { | |||
220 | struct snd_soc_pcm_stream capture; | 222 | struct snd_soc_pcm_stream capture; |
221 | struct snd_soc_pcm_stream playback; | 223 | struct snd_soc_pcm_stream playback; |
222 | unsigned int symmetric_rates:1; | 224 | unsigned int symmetric_rates:1; |
225 | unsigned int symmetric_channels:1; | ||
226 | unsigned int symmetric_samplebits:1; | ||
223 | 227 | ||
224 | /* probe ordering - for components with runtime dependencies */ | 228 | /* probe ordering - for components with runtime dependencies */ |
225 | int probe_order; | 229 | int probe_order; |
@@ -244,6 +248,8 @@ struct snd_soc_dai { | |||
244 | unsigned int capture_active:1; /* stream is in use */ | 248 | unsigned int capture_active:1; /* stream is in use */ |
245 | unsigned int playback_active:1; /* stream is in use */ | 249 | unsigned int playback_active:1; /* stream is in use */ |
246 | unsigned int symmetric_rates:1; | 250 | unsigned int symmetric_rates:1; |
251 | unsigned int symmetric_channels:1; | ||
252 | unsigned int symmetric_samplebits:1; | ||
247 | struct snd_pcm_runtime *runtime; | 253 | struct snd_pcm_runtime *runtime; |
248 | unsigned int active; | 254 | unsigned int active; |
249 | unsigned char probed:1; | 255 | unsigned char probed:1; |
@@ -258,6 +264,8 @@ struct snd_soc_dai { | |||
258 | 264 | ||
259 | /* Symmetry data - only valid if symmetry is being enforced */ | 265 | /* Symmetry data - only valid if symmetry is being enforced */ |
260 | unsigned int rate; | 266 | unsigned int rate; |
267 | unsigned int channels; | ||
268 | unsigned int sample_bits; | ||
261 | 269 | ||
262 | /* parent platform/codec */ | 270 | /* parent platform/codec */ |
263 | struct snd_soc_platform *platform; | 271 | struct snd_soc_platform *platform; |
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 56ebdfca6273..68d92e36facd 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h | |||
@@ -412,6 +412,7 @@ int snd_soc_dapm_new_controls(struct snd_soc_dapm_context *dapm, | |||
412 | int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, | 412 | int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, |
413 | struct snd_soc_dai *dai); | 413 | struct snd_soc_dai *dai); |
414 | int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card); | 414 | int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card); |
415 | void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card); | ||
415 | int snd_soc_dapm_new_pcm(struct snd_soc_card *card, | 416 | int snd_soc_dapm_new_pcm(struct snd_soc_card *card, |
416 | const struct snd_soc_pcm_stream *params, | 417 | const struct snd_soc_pcm_stream *params, |
417 | struct snd_soc_dapm_widget *source, | 418 | struct snd_soc_dapm_widget *source, |
diff --git a/include/sound/soc-dpcm.h b/include/sound/soc-dpcm.h index 047d657c331c..2883a7a6f9f3 100644 --- a/include/sound/soc-dpcm.h +++ b/include/sound/soc-dpcm.h | |||
@@ -11,6 +11,7 @@ | |||
11 | #ifndef __LINUX_SND_SOC_DPCM_H | 11 | #ifndef __LINUX_SND_SOC_DPCM_H |
12 | #define __LINUX_SND_SOC_DPCM_H | 12 | #define __LINUX_SND_SOC_DPCM_H |
13 | 13 | ||
14 | #include <linux/slab.h> | ||
14 | #include <linux/list.h> | 15 | #include <linux/list.h> |
15 | #include <sound/pcm.h> | 16 | #include <sound/pcm.h> |
16 | 17 | ||
@@ -135,4 +136,25 @@ int soc_dpcm_be_digital_mute(struct snd_soc_pcm_runtime *fe, int mute); | |||
135 | int soc_dpcm_debugfs_add(struct snd_soc_pcm_runtime *rtd); | 136 | int soc_dpcm_debugfs_add(struct snd_soc_pcm_runtime *rtd); |
136 | int soc_dpcm_runtime_update(struct snd_soc_card *); | 137 | int soc_dpcm_runtime_update(struct snd_soc_card *); |
137 | 138 | ||
139 | int dpcm_path_get(struct snd_soc_pcm_runtime *fe, | ||
140 | int stream, struct snd_soc_dapm_widget_list **list_); | ||
141 | int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, | ||
142 | int stream, struct snd_soc_dapm_widget_list **list, int new); | ||
143 | int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream); | ||
144 | int dpcm_be_dai_shutdown(struct snd_soc_pcm_runtime *fe, int stream); | ||
145 | void dpcm_be_disconnect(struct snd_soc_pcm_runtime *fe, int stream); | ||
146 | void dpcm_clear_pending_state(struct snd_soc_pcm_runtime *fe, int stream); | ||
147 | int dpcm_be_dai_hw_free(struct snd_soc_pcm_runtime *fe, int stream); | ||
148 | int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int tream); | ||
149 | int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream, int cmd); | ||
150 | int dpcm_be_dai_prepare(struct snd_soc_pcm_runtime *fe, int stream); | ||
151 | int dpcm_dapm_stream_event(struct snd_soc_pcm_runtime *fe, int dir, | ||
152 | int event); | ||
153 | |||
154 | static inline void dpcm_path_put(struct snd_soc_dapm_widget_list **list) | ||
155 | { | ||
156 | kfree(*list); | ||
157 | } | ||
158 | |||
159 | |||
138 | #endif | 160 | #endif |
diff --git a/include/sound/soc.h b/include/sound/soc.h index 1f741cb24f33..9a001472b96a 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h | |||
@@ -334,9 +334,7 @@ struct snd_soc_jack_pin; | |||
334 | #include <sound/soc-dapm.h> | 334 | #include <sound/soc-dapm.h> |
335 | #include <sound/soc-dpcm.h> | 335 | #include <sound/soc-dpcm.h> |
336 | 336 | ||
337 | #ifdef CONFIG_GPIOLIB | ||
338 | struct snd_soc_jack_gpio; | 337 | struct snd_soc_jack_gpio; |
339 | #endif | ||
340 | 338 | ||
341 | typedef int (*hw_write_t)(void *,const char* ,int); | 339 | typedef int (*hw_write_t)(void *,const char* ,int); |
342 | 340 | ||
@@ -446,6 +444,17 @@ int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, | |||
446 | struct snd_soc_jack_gpio *gpios); | 444 | struct snd_soc_jack_gpio *gpios); |
447 | void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, | 445 | void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, |
448 | struct snd_soc_jack_gpio *gpios); | 446 | struct snd_soc_jack_gpio *gpios); |
447 | #else | ||
448 | static inline int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, | ||
449 | struct snd_soc_jack_gpio *gpios) | ||
450 | { | ||
451 | return 0; | ||
452 | } | ||
453 | |||
454 | static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, | ||
455 | struct snd_soc_jack_gpio *gpios) | ||
456 | { | ||
457 | } | ||
449 | #endif | 458 | #endif |
450 | 459 | ||
451 | /* codec register bit access */ | 460 | /* codec register bit access */ |
@@ -580,7 +589,6 @@ struct snd_soc_jack_zone { | |||
580 | * to provide more complex checks (eg, reading an | 589 | * to provide more complex checks (eg, reading an |
581 | * ADC). | 590 | * ADC). |
582 | */ | 591 | */ |
583 | #ifdef CONFIG_GPIOLIB | ||
584 | struct snd_soc_jack_gpio { | 592 | struct snd_soc_jack_gpio { |
585 | unsigned int gpio; | 593 | unsigned int gpio; |
586 | const char *name; | 594 | const char *name; |
@@ -594,7 +602,6 @@ struct snd_soc_jack_gpio { | |||
594 | 602 | ||
595 | int (*jack_status_check)(void); | 603 | int (*jack_status_check)(void); |
596 | }; | 604 | }; |
597 | #endif | ||
598 | 605 | ||
599 | struct snd_soc_jack { | 606 | struct snd_soc_jack { |
600 | struct mutex mutex; | 607 | struct mutex mutex; |
@@ -879,6 +886,8 @@ struct snd_soc_dai_link { | |||
879 | 886 | ||
880 | /* Symmetry requirements */ | 887 | /* Symmetry requirements */ |
881 | unsigned int symmetric_rates:1; | 888 | unsigned int symmetric_rates:1; |
889 | unsigned int symmetric_channels:1; | ||
890 | unsigned int symmetric_samplebits:1; | ||
882 | 891 | ||
883 | /* Do not create a PCM for this DAI link (Backend link) */ | 892 | /* Do not create a PCM for this DAI link (Backend link) */ |
884 | unsigned int no_pcm:1; | 893 | unsigned int no_pcm:1; |
@@ -886,6 +895,10 @@ struct snd_soc_dai_link { | |||
886 | /* This DAI link can route to other DAI links at runtime (Frontend)*/ | 895 | /* This DAI link can route to other DAI links at runtime (Frontend)*/ |
887 | unsigned int dynamic:1; | 896 | unsigned int dynamic:1; |
888 | 897 | ||
898 | /* DPCM capture and Playback support */ | ||
899 | unsigned int dpcm_capture:1; | ||
900 | unsigned int dpcm_playback:1; | ||
901 | |||
889 | /* pmdown_time is ignored at stop */ | 902 | /* pmdown_time is ignored at stop */ |
890 | unsigned int ignore_pmdown_time:1; | 903 | unsigned int ignore_pmdown_time:1; |
891 | 904 | ||
@@ -1029,6 +1042,7 @@ struct snd_soc_pcm_runtime { | |||
1029 | 1042 | ||
1030 | /* Dynamic PCM BE runtime data */ | 1043 | /* Dynamic PCM BE runtime data */ |
1031 | struct snd_soc_dpcm_runtime dpcm[2]; | 1044 | struct snd_soc_dpcm_runtime dpcm[2]; |
1045 | int fe_compr; | ||
1032 | 1046 | ||
1033 | long pmdown_time; | 1047 | long pmdown_time; |
1034 | unsigned char pop_wait:1; | 1048 | unsigned char pop_wait:1; |
diff --git a/include/sound/spear_dma.h b/include/sound/spear_dma.h index 1b365bfdfb37..65aca51fe255 100644 --- a/include/sound/spear_dma.h +++ b/include/sound/spear_dma.h | |||
@@ -29,7 +29,6 @@ struct spear_dma_data { | |||
29 | dma_addr_t addr; | 29 | dma_addr_t addr; |
30 | u32 max_burst; | 30 | u32 max_burst; |
31 | enum dma_slave_buswidth addr_width; | 31 | enum dma_slave_buswidth addr_width; |
32 | bool (*filter)(struct dma_chan *chan, void *slave); | ||
33 | }; | 32 | }; |
34 | 33 | ||
35 | #endif /* SPEAR_DMA_H */ | 34 | #endif /* SPEAR_DMA_H */ |
diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h index 602dc6c45d1a..165e7059de75 100644 --- a/include/uapi/sound/compress_params.h +++ b/include/uapi/sound/compress_params.h | |||
@@ -57,6 +57,7 @@ | |||
57 | #define MAX_NUM_CODECS 32 | 57 | #define MAX_NUM_CODECS 32 |
58 | #define MAX_NUM_CODEC_DESCRIPTORS 32 | 58 | #define MAX_NUM_CODEC_DESCRIPTORS 32 |
59 | #define MAX_NUM_BITRATES 32 | 59 | #define MAX_NUM_BITRATES 32 |
60 | #define MAX_NUM_SAMPLE_RATES 32 | ||
60 | 61 | ||
61 | /* Codecs are listed linearly to allow for extensibility */ | 62 | /* Codecs are listed linearly to allow for extensibility */ |
62 | #define SND_AUDIOCODEC_PCM ((__u32) 0x00000001) | 63 | #define SND_AUDIOCODEC_PCM ((__u32) 0x00000001) |
@@ -324,7 +325,8 @@ union snd_codec_options { | |||
324 | 325 | ||
325 | /** struct snd_codec_desc - description of codec capabilities | 326 | /** struct snd_codec_desc - description of codec capabilities |
326 | * @max_ch: Maximum number of audio channels | 327 | * @max_ch: Maximum number of audio channels |
327 | * @sample_rates: Sampling rates in Hz, use SNDRV_PCM_RATE_xxx for this | 328 | * @sample_rates: Sampling rates in Hz, use values like 48000 for this |
329 | * @num_sample_rates: Number of valid values in sample_rates array | ||
328 | * @bit_rate: Indexed array containing supported bit rates | 330 | * @bit_rate: Indexed array containing supported bit rates |
329 | * @num_bitrates: Number of valid values in bit_rate array | 331 | * @num_bitrates: Number of valid values in bit_rate array |
330 | * @rate_control: value is specified by SND_RATECONTROLMODE defines. | 332 | * @rate_control: value is specified by SND_RATECONTROLMODE defines. |
@@ -346,7 +348,8 @@ union snd_codec_options { | |||
346 | 348 | ||
347 | struct snd_codec_desc { | 349 | struct snd_codec_desc { |
348 | __u32 max_ch; | 350 | __u32 max_ch; |
349 | __u32 sample_rates; | 351 | __u32 sample_rates[MAX_NUM_SAMPLE_RATES]; |
352 | __u32 num_sample_rates; | ||
350 | __u32 bit_rate[MAX_NUM_BITRATES]; | 353 | __u32 bit_rate[MAX_NUM_BITRATES]; |
351 | __u32 num_bitrates; | 354 | __u32 num_bitrates; |
352 | __u32 rate_control; | 355 | __u32 rate_control; |
@@ -364,7 +367,8 @@ struct snd_codec_desc { | |||
364 | * @ch_out: Number of output channels. In case of contradiction between | 367 | * @ch_out: Number of output channels. In case of contradiction between |
365 | * this field and the channelMode field, the channelMode field | 368 | * this field and the channelMode field, the channelMode field |
366 | * overrides. | 369 | * overrides. |
367 | * @sample_rate: Audio sample rate of input data | 370 | * @sample_rate: Audio sample rate of input data in Hz, use values like 48000 |
371 | * for this. | ||
368 | * @bit_rate: Bitrate of encoded data. May be ignored by decoders | 372 | * @bit_rate: Bitrate of encoded data. May be ignored by decoders |
369 | * @rate_control: Encoding rate control. See SND_RATECONTROLMODE defines. | 373 | * @rate_control: Encoding rate control. See SND_RATECONTROLMODE defines. |
370 | * Encoders may rely on profiles for quality levels. | 374 | * Encoders may rely on profiles for quality levels. |
diff --git a/sound/arm/aaci.c b/sound/arm/aaci.c index 1ca8dc2ccb89..c421fdb3c7a1 100644 --- a/sound/arm/aaci.c +++ b/sound/arm/aaci.c | |||
@@ -753,7 +753,7 @@ static struct snd_pcm_ops aaci_capture_ops = { | |||
753 | * Power Management. | 753 | * Power Management. |
754 | */ | 754 | */ |
755 | #ifdef CONFIG_PM | 755 | #ifdef CONFIG_PM |
756 | static int aaci_do_suspend(struct snd_card *card, unsigned int state) | 756 | static int aaci_do_suspend(struct snd_card *card) |
757 | { | 757 | { |
758 | struct aaci *aaci = card->private_data; | 758 | struct aaci *aaci = card->private_data; |
759 | snd_power_change_state(card, SNDRV_CTL_POWER_D3cold); | 759 | snd_power_change_state(card, SNDRV_CTL_POWER_D3cold); |
@@ -761,28 +761,28 @@ static int aaci_do_suspend(struct snd_card *card, unsigned int state) | |||
761 | return 0; | 761 | return 0; |
762 | } | 762 | } |
763 | 763 | ||
764 | static int aaci_do_resume(struct snd_card *card, unsigned int state) | 764 | static int aaci_do_resume(struct snd_card *card) |
765 | { | 765 | { |
766 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); | 766 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
767 | return 0; | 767 | return 0; |
768 | } | 768 | } |
769 | 769 | ||
770 | static int aaci_suspend(struct amba_device *dev, pm_message_t state) | 770 | static int aaci_suspend(struct device *dev) |
771 | { | 771 | { |
772 | struct snd_card *card = amba_get_drvdata(dev); | 772 | struct snd_card *card = dev_get_drvdata(dev); |
773 | return card ? aaci_do_suspend(card) : 0; | 773 | return card ? aaci_do_suspend(card) : 0; |
774 | } | 774 | } |
775 | 775 | ||
776 | static int aaci_resume(struct amba_device *dev) | 776 | static int aaci_resume(struct device *dev) |
777 | { | 777 | { |
778 | struct snd_card *card = amba_get_drvdata(dev); | 778 | struct snd_card *card = dev_get_drvdata(dev); |
779 | return card ? aaci_do_resume(card) : 0; | 779 | return card ? aaci_do_resume(card) : 0; |
780 | } | 780 | } |
781 | |||
782 | static SIMPLE_DEV_PM_OPS(aaci_dev_pm_ops, aaci_suspend, aaci_resume); | ||
783 | #define AACI_DEV_PM_OPS (&aaci_dev_pm_ops) | ||
781 | #else | 784 | #else |
782 | #define aaci_do_suspend NULL | 785 | #define AACI_DEV_PM_OPS NULL |
783 | #define aaci_do_resume NULL | ||
784 | #define aaci_suspend NULL | ||
785 | #define aaci_resume NULL | ||
786 | #endif | 786 | #endif |
787 | 787 | ||
788 | 788 | ||
@@ -1100,11 +1100,10 @@ MODULE_DEVICE_TABLE(amba, aaci_ids); | |||
1100 | static struct amba_driver aaci_driver = { | 1100 | static struct amba_driver aaci_driver = { |
1101 | .drv = { | 1101 | .drv = { |
1102 | .name = DRIVER_NAME, | 1102 | .name = DRIVER_NAME, |
1103 | .pm = AACI_DEV_PM_OPS, | ||
1103 | }, | 1104 | }, |
1104 | .probe = aaci_probe, | 1105 | .probe = aaci_probe, |
1105 | .remove = aaci_remove, | 1106 | .remove = aaci_remove, |
1106 | .suspend = aaci_suspend, | ||
1107 | .resume = aaci_resume, | ||
1108 | .id_table = aaci_ids, | 1107 | .id_table = aaci_ids, |
1109 | }; | 1108 | }; |
1110 | 1109 | ||
diff --git a/sound/atmel/abdac.c b/sound/atmel/abdac.c index 721d8fd45685..3519518e25a0 100644 --- a/sound/atmel/abdac.c +++ b/sound/atmel/abdac.c | |||
@@ -354,7 +354,7 @@ static int set_sample_rates(struct atmel_abdac *dac) | |||
354 | /* we start at 192 kHz and work our way down to 5112 Hz */ | 354 | /* we start at 192 kHz and work our way down to 5112 Hz */ |
355 | while (new_rate >= RATE_MIN && index < (MAX_NUM_RATES + 1)) { | 355 | while (new_rate >= RATE_MIN && index < (MAX_NUM_RATES + 1)) { |
356 | new_rate = clk_round_rate(dac->sample_clk, 256 * new_rate); | 356 | new_rate = clk_round_rate(dac->sample_clk, 256 * new_rate); |
357 | if (new_rate < 0) | 357 | if (new_rate <= 0) |
358 | break; | 358 | break; |
359 | /* make sure we are below the ABDAC clock */ | 359 | /* make sure we are below the ABDAC clock */ |
360 | if (index < MAX_NUM_RATES && | 360 | if (index < MAX_NUM_RATES && |
diff --git a/sound/core/Makefile b/sound/core/Makefile index 5e890cfed423..394a38909f6b 100644 --- a/sound/core/Makefile +++ b/sound/core/Makefile | |||
@@ -10,14 +10,12 @@ snd-$(CONFIG_SND_VMASTER) += vmaster.o | |||
10 | snd-$(CONFIG_SND_KCTL_JACK) += ctljack.o | 10 | snd-$(CONFIG_SND_KCTL_JACK) += ctljack.o |
11 | snd-$(CONFIG_SND_JACK) += jack.o | 11 | snd-$(CONFIG_SND_JACK) += jack.o |
12 | 12 | ||
13 | snd-pcm-objs := pcm.o pcm_native.o pcm_lib.o pcm_timer.o pcm_misc.o \ | 13 | snd-pcm-y := pcm.o pcm_native.o pcm_lib.o pcm_timer.o pcm_misc.o \ |
14 | pcm_memory.o | 14 | pcm_memory.o memalloc.o |
15 | snd-pcm-$(CONFIG_SND_DMA_SGBUF) += sgbuf.o | ||
15 | 16 | ||
16 | snd-pcm-dmaengine-objs := pcm_dmaengine.o | 17 | snd-pcm-dmaengine-objs := pcm_dmaengine.o |
17 | 18 | ||
18 | snd-page-alloc-y := memalloc.o | ||
19 | snd-page-alloc-$(CONFIG_SND_DMA_SGBUF) += sgbuf.o | ||
20 | |||
21 | snd-rawmidi-objs := rawmidi.o | 19 | snd-rawmidi-objs := rawmidi.o |
22 | snd-timer-objs := timer.o | 20 | snd-timer-objs := timer.o |
23 | snd-hrtimer-objs := hrtimer.o | 21 | snd-hrtimer-objs := hrtimer.o |
@@ -31,7 +29,7 @@ obj-$(CONFIG_SND_HWDEP) += snd-hwdep.o | |||
31 | obj-$(CONFIG_SND_TIMER) += snd-timer.o | 29 | obj-$(CONFIG_SND_TIMER) += snd-timer.o |
32 | obj-$(CONFIG_SND_HRTIMER) += snd-hrtimer.o | 30 | obj-$(CONFIG_SND_HRTIMER) += snd-hrtimer.o |
33 | obj-$(CONFIG_SND_RTCTIMER) += snd-rtctimer.o | 31 | obj-$(CONFIG_SND_RTCTIMER) += snd-rtctimer.o |
34 | obj-$(CONFIG_SND_PCM) += snd-pcm.o snd-page-alloc.o | 32 | obj-$(CONFIG_SND_PCM) += snd-pcm.o |
35 | obj-$(CONFIG_SND_DMAENGINE_PCM) += snd-pcm-dmaengine.o | 33 | obj-$(CONFIG_SND_DMAENGINE_PCM) += snd-pcm-dmaengine.o |
36 | obj-$(CONFIG_SND_RAWMIDI) += snd-rawmidi.o | 34 | obj-$(CONFIG_SND_RAWMIDI) += snd-rawmidi.o |
37 | 35 | ||
diff --git a/sound/core/compress_offload.c b/sound/core/compress_offload.c index 9d518ac73eea..7a20897d33db 100644 --- a/sound/core/compress_offload.c +++ b/sound/core/compress_offload.c | |||
@@ -501,9 +501,6 @@ static int snd_compress_check_input(struct snd_compr_params *params) | |||
501 | if (params->codec.ch_in == 0 || params->codec.ch_out == 0) | 501 | if (params->codec.ch_in == 0 || params->codec.ch_out == 0) |
502 | return -EINVAL; | 502 | return -EINVAL; |
503 | 503 | ||
504 | if (!(params->codec.sample_rate & SNDRV_PCM_RATE_8000_192000)) | ||
505 | return -EINVAL; | ||
506 | |||
507 | return 0; | 504 | return 0; |
508 | } | 505 | } |
509 | 506 | ||
diff --git a/sound/core/memalloc.c b/sound/core/memalloc.c index 5e1c7bc73b29..4595f93d151e 100644 --- a/sound/core/memalloc.c +++ b/sound/core/memalloc.c | |||
@@ -21,60 +21,18 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/proc_fs.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/pci.h> | ||
28 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
29 | #include <linux/mm.h> | 25 | #include <linux/mm.h> |
30 | #include <linux/seq_file.h> | ||
31 | #include <asm/uaccess.h> | ||
32 | #include <linux/dma-mapping.h> | 26 | #include <linux/dma-mapping.h> |
33 | #include <linux/genalloc.h> | 27 | #include <linux/genalloc.h> |
34 | #include <linux/moduleparam.h> | ||
35 | #include <linux/mutex.h> | ||
36 | #include <sound/memalloc.h> | 28 | #include <sound/memalloc.h> |
37 | 29 | ||
38 | |||
39 | MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>, Jaroslav Kysela <perex@perex.cz>"); | ||
40 | MODULE_DESCRIPTION("Memory allocator for ALSA system."); | ||
41 | MODULE_LICENSE("GPL"); | ||
42 | |||
43 | |||
44 | /* | ||
45 | */ | ||
46 | |||
47 | static DEFINE_MUTEX(list_mutex); | ||
48 | static LIST_HEAD(mem_list_head); | ||
49 | |||
50 | /* buffer preservation list */ | ||
51 | struct snd_mem_list { | ||
52 | struct snd_dma_buffer buffer; | ||
53 | unsigned int id; | ||
54 | struct list_head list; | ||
55 | }; | ||
56 | |||
57 | /* id for pre-allocated buffers */ | ||
58 | #define SNDRV_DMA_DEVICE_UNUSED (unsigned int)-1 | ||
59 | |||
60 | /* | 30 | /* |
61 | * | 31 | * |
62 | * Generic memory allocators | 32 | * Generic memory allocators |
63 | * | 33 | * |
64 | */ | 34 | */ |
65 | 35 | ||
66 | static long snd_allocated_pages; /* holding the number of allocated pages */ | ||
67 | |||
68 | static inline void inc_snd_pages(int order) | ||
69 | { | ||
70 | snd_allocated_pages += 1 << order; | ||
71 | } | ||
72 | |||
73 | static inline void dec_snd_pages(int order) | ||
74 | { | ||
75 | snd_allocated_pages -= 1 << order; | ||
76 | } | ||
77 | |||
78 | /** | 36 | /** |
79 | * snd_malloc_pages - allocate pages with the given size | 37 | * snd_malloc_pages - allocate pages with the given size |
80 | * @size: the size to allocate in bytes | 38 | * @size: the size to allocate in bytes |
@@ -87,7 +45,6 @@ static inline void dec_snd_pages(int order) | |||
87 | void *snd_malloc_pages(size_t size, gfp_t gfp_flags) | 45 | void *snd_malloc_pages(size_t size, gfp_t gfp_flags) |
88 | { | 46 | { |
89 | int pg; | 47 | int pg; |
90 | void *res; | ||
91 | 48 | ||
92 | if (WARN_ON(!size)) | 49 | if (WARN_ON(!size)) |
93 | return NULL; | 50 | return NULL; |
@@ -95,9 +52,7 @@ void *snd_malloc_pages(size_t size, gfp_t gfp_flags) | |||
95 | return NULL; | 52 | return NULL; |
96 | gfp_flags |= __GFP_COMP; /* compound page lets parts be mapped */ | 53 | gfp_flags |= __GFP_COMP; /* compound page lets parts be mapped */ |
97 | pg = get_order(size); | 54 | pg = get_order(size); |
98 | if ((res = (void *) __get_free_pages(gfp_flags, pg)) != NULL) | 55 | return (void *) __get_free_pages(gfp_flags, pg); |
99 | inc_snd_pages(pg); | ||
100 | return res; | ||
101 | } | 56 | } |
102 | 57 | ||
103 | /** | 58 | /** |
@@ -114,7 +69,6 @@ void snd_free_pages(void *ptr, size_t size) | |||
114 | if (ptr == NULL) | 69 | if (ptr == NULL) |
115 | return; | 70 | return; |
116 | pg = get_order(size); | 71 | pg = get_order(size); |
117 | dec_snd_pages(pg); | ||
118 | free_pages((unsigned long) ptr, pg); | 72 | free_pages((unsigned long) ptr, pg); |
119 | } | 73 | } |
120 | 74 | ||
@@ -129,7 +83,6 @@ void snd_free_pages(void *ptr, size_t size) | |||
129 | static void *snd_malloc_dev_pages(struct device *dev, size_t size, dma_addr_t *dma) | 83 | static void *snd_malloc_dev_pages(struct device *dev, size_t size, dma_addr_t *dma) |
130 | { | 84 | { |
131 | int pg; | 85 | int pg; |
132 | void *res; | ||
133 | gfp_t gfp_flags; | 86 | gfp_t gfp_flags; |
134 | 87 | ||
135 | if (WARN_ON(!dma)) | 88 | if (WARN_ON(!dma)) |
@@ -139,11 +92,7 @@ static void *snd_malloc_dev_pages(struct device *dev, size_t size, dma_addr_t *d | |||
139 | | __GFP_COMP /* compound page lets parts be mapped */ | 92 | | __GFP_COMP /* compound page lets parts be mapped */ |
140 | | __GFP_NORETRY /* don't trigger OOM-killer */ | 93 | | __GFP_NORETRY /* don't trigger OOM-killer */ |
141 | | __GFP_NOWARN; /* no stack trace print - this call is non-critical */ | 94 | | __GFP_NOWARN; /* no stack trace print - this call is non-critical */ |
142 | res = dma_alloc_coherent(dev, PAGE_SIZE << pg, dma, gfp_flags); | 95 | return dma_alloc_coherent(dev, PAGE_SIZE << pg, dma, gfp_flags); |
143 | if (res != NULL) | ||
144 | inc_snd_pages(pg); | ||
145 | |||
146 | return res; | ||
147 | } | 96 | } |
148 | 97 | ||
149 | /* free the coherent DMA pages */ | 98 | /* free the coherent DMA pages */ |
@@ -155,7 +104,6 @@ static void snd_free_dev_pages(struct device *dev, size_t size, void *ptr, | |||
155 | if (ptr == NULL) | 104 | if (ptr == NULL) |
156 | return; | 105 | return; |
157 | pg = get_order(size); | 106 | pg = get_order(size); |
158 | dec_snd_pages(pg); | ||
159 | dma_free_coherent(dev, PAGE_SIZE << pg, ptr, dma); | 107 | dma_free_coherent(dev, PAGE_SIZE << pg, ptr, dma); |
160 | } | 108 | } |
161 | 109 | ||
@@ -340,256 +288,6 @@ void snd_dma_free_pages(struct snd_dma_buffer *dmab) | |||
340 | } | 288 | } |
341 | } | 289 | } |
342 | 290 | ||
343 | |||
344 | /** | ||
345 | * snd_dma_get_reserved - get the reserved buffer for the given device | ||
346 | * @dmab: the buffer allocation record to store | ||
347 | * @id: the buffer id | ||
348 | * | ||
349 | * Looks for the reserved-buffer list and re-uses if the same buffer | ||
350 | * is found in the list. When the buffer is found, it's removed from the free list. | ||
351 | * | ||
352 | * Return: The size of buffer if the buffer is found, or zero if not found. | ||
353 | */ | ||
354 | size_t snd_dma_get_reserved_buf(struct snd_dma_buffer *dmab, unsigned int id) | ||
355 | { | ||
356 | struct snd_mem_list *mem; | ||
357 | |||
358 | if (WARN_ON(!dmab)) | ||
359 | return 0; | ||
360 | |||
361 | mutex_lock(&list_mutex); | ||
362 | list_for_each_entry(mem, &mem_list_head, list) { | ||
363 | if (mem->id == id && | ||
364 | (mem->buffer.dev.dev == NULL || dmab->dev.dev == NULL || | ||
365 | ! memcmp(&mem->buffer.dev, &dmab->dev, sizeof(dmab->dev)))) { | ||
366 | struct device *dev = dmab->dev.dev; | ||
367 | list_del(&mem->list); | ||
368 | *dmab = mem->buffer; | ||
369 | if (dmab->dev.dev == NULL) | ||
370 | dmab->dev.dev = dev; | ||
371 | kfree(mem); | ||
372 | mutex_unlock(&list_mutex); | ||
373 | return dmab->bytes; | ||
374 | } | ||
375 | } | ||
376 | mutex_unlock(&list_mutex); | ||
377 | return 0; | ||
378 | } | ||
379 | |||
380 | /** | ||
381 | * snd_dma_reserve_buf - reserve the buffer | ||
382 | * @dmab: the buffer to reserve | ||
383 | * @id: the buffer id | ||
384 | * | ||
385 | * Reserves the given buffer as a reserved buffer. | ||
386 | * | ||
387 | * Return: Zero if successful, or a negative code on error. | ||
388 | */ | ||
389 | int snd_dma_reserve_buf(struct snd_dma_buffer *dmab, unsigned int id) | ||
390 | { | ||
391 | struct snd_mem_list *mem; | ||
392 | |||
393 | if (WARN_ON(!dmab)) | ||
394 | return -EINVAL; | ||
395 | mem = kmalloc(sizeof(*mem), GFP_KERNEL); | ||
396 | if (! mem) | ||
397 | return -ENOMEM; | ||
398 | mutex_lock(&list_mutex); | ||
399 | mem->buffer = *dmab; | ||
400 | mem->id = id; | ||
401 | list_add_tail(&mem->list, &mem_list_head); | ||
402 | mutex_unlock(&list_mutex); | ||
403 | return 0; | ||
404 | } | ||
405 | |||
406 | /* | ||
407 | * purge all reserved buffers | ||
408 | */ | ||
409 | static void free_all_reserved_pages(void) | ||
410 | { | ||
411 | struct list_head *p; | ||
412 | struct snd_mem_list *mem; | ||
413 | |||
414 | mutex_lock(&list_mutex); | ||
415 | while (! list_empty(&mem_list_head)) { | ||
416 | p = mem_list_head.next; | ||
417 | mem = list_entry(p, struct snd_mem_list, list); | ||
418 | list_del(p); | ||
419 | snd_dma_free_pages(&mem->buffer); | ||
420 | kfree(mem); | ||
421 | } | ||
422 | mutex_unlock(&list_mutex); | ||
423 | } | ||
424 | |||
425 | |||
426 | #ifdef CONFIG_PROC_FS | ||
427 | /* | ||
428 | * proc file interface | ||
429 | */ | ||
430 | #define SND_MEM_PROC_FILE "driver/snd-page-alloc" | ||
431 | static struct proc_dir_entry *snd_mem_proc; | ||
432 | |||
433 | static int snd_mem_proc_read(struct seq_file *seq, void *offset) | ||
434 | { | ||
435 | long pages = snd_allocated_pages >> (PAGE_SHIFT-12); | ||
436 | struct snd_mem_list *mem; | ||
437 | int devno; | ||
438 | static char *types[] = { "UNKNOWN", "CONT", "DEV", "DEV-SG" }; | ||
439 | |||
440 | mutex_lock(&list_mutex); | ||
441 | seq_printf(seq, "pages : %li bytes (%li pages per %likB)\n", | ||
442 | pages * PAGE_SIZE, pages, PAGE_SIZE / 1024); | ||
443 | devno = 0; | ||
444 | list_for_each_entry(mem, &mem_list_head, list) { | ||
445 | devno++; | ||
446 | seq_printf(seq, "buffer %d : ID %08x : type %s\n", | ||
447 | devno, mem->id, types[mem->buffer.dev.type]); | ||
448 | seq_printf(seq, " addr = 0x%lx, size = %d bytes\n", | ||
449 | (unsigned long)mem->buffer.addr, | ||
450 | (int)mem->buffer.bytes); | ||
451 | } | ||
452 | mutex_unlock(&list_mutex); | ||
453 | return 0; | ||
454 | } | ||
455 | |||
456 | static int snd_mem_proc_open(struct inode *inode, struct file *file) | ||
457 | { | ||
458 | return single_open(file, snd_mem_proc_read, NULL); | ||
459 | } | ||
460 | |||
461 | /* FIXME: for pci only - other bus? */ | ||
462 | #ifdef CONFIG_PCI | ||
463 | #define gettoken(bufp) strsep(bufp, " \t\n") | ||
464 | |||
465 | static ssize_t snd_mem_proc_write(struct file *file, const char __user * buffer, | ||
466 | size_t count, loff_t * ppos) | ||
467 | { | ||
468 | char buf[128]; | ||
469 | char *token, *p; | ||
470 | |||
471 | if (count > sizeof(buf) - 1) | ||
472 | return -EINVAL; | ||
473 | if (copy_from_user(buf, buffer, count)) | ||
474 | return -EFAULT; | ||
475 | buf[count] = '\0'; | ||
476 | |||
477 | p = buf; | ||
478 | token = gettoken(&p); | ||
479 | if (! token || *token == '#') | ||
480 | return count; | ||
481 | if (strcmp(token, "add") == 0) { | ||
482 | char *endp; | ||
483 | int vendor, device, size, buffers; | ||
484 | long mask; | ||
485 | int i, alloced; | ||
486 | struct pci_dev *pci; | ||
487 | |||
488 | if ((token = gettoken(&p)) == NULL || | ||
489 | (vendor = simple_strtol(token, NULL, 0)) <= 0 || | ||
490 | (token = gettoken(&p)) == NULL || | ||
491 | (device = simple_strtol(token, NULL, 0)) <= 0 || | ||
492 | (token = gettoken(&p)) == NULL || | ||
493 | (mask = simple_strtol(token, NULL, 0)) < 0 || | ||
494 | (token = gettoken(&p)) == NULL || | ||
495 | (size = memparse(token, &endp)) < 64*1024 || | ||
496 | size > 16*1024*1024 /* too big */ || | ||
497 | (token = gettoken(&p)) == NULL || | ||
498 | (buffers = simple_strtol(token, NULL, 0)) <= 0 || | ||
499 | buffers > 4) { | ||
500 | printk(KERN_ERR "snd-page-alloc: invalid proc write format\n"); | ||
501 | return count; | ||
502 | } | ||
503 | vendor &= 0xffff; | ||
504 | device &= 0xffff; | ||
505 | |||
506 | alloced = 0; | ||
507 | pci = NULL; | ||
508 | while ((pci = pci_get_device(vendor, device, pci)) != NULL) { | ||
509 | if (mask > 0 && mask < 0xffffffff) { | ||
510 | if (pci_set_dma_mask(pci, mask) < 0 || | ||
511 | pci_set_consistent_dma_mask(pci, mask) < 0) { | ||
512 | printk(KERN_ERR "snd-page-alloc: cannot set DMA mask %lx for pci %04x:%04x\n", mask, vendor, device); | ||
513 | pci_dev_put(pci); | ||
514 | return count; | ||
515 | } | ||
516 | } | ||
517 | for (i = 0; i < buffers; i++) { | ||
518 | struct snd_dma_buffer dmab; | ||
519 | memset(&dmab, 0, sizeof(dmab)); | ||
520 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | ||
521 | size, &dmab) < 0) { | ||
522 | printk(KERN_ERR "snd-page-alloc: cannot allocate buffer pages (size = %d)\n", size); | ||
523 | pci_dev_put(pci); | ||
524 | return count; | ||
525 | } | ||
526 | snd_dma_reserve_buf(&dmab, snd_dma_pci_buf_id(pci)); | ||
527 | } | ||
528 | alloced++; | ||
529 | } | ||
530 | if (! alloced) { | ||
531 | for (i = 0; i < buffers; i++) { | ||
532 | struct snd_dma_buffer dmab; | ||
533 | memset(&dmab, 0, sizeof(dmab)); | ||
534 | /* FIXME: We can allocate only in ZONE_DMA | ||
535 | * without a device pointer! | ||
536 | */ | ||
537 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, NULL, | ||
538 | size, &dmab) < 0) { | ||
539 | printk(KERN_ERR "snd-page-alloc: cannot allocate buffer pages (size = %d)\n", size); | ||
540 | break; | ||
541 | } | ||
542 | snd_dma_reserve_buf(&dmab, (unsigned int)((vendor << 16) | device)); | ||
543 | } | ||
544 | } | ||
545 | } else if (strcmp(token, "erase") == 0) | ||
546 | /* FIXME: need for releasing each buffer chunk? */ | ||
547 | free_all_reserved_pages(); | ||
548 | else | ||
549 | printk(KERN_ERR "snd-page-alloc: invalid proc cmd\n"); | ||
550 | return count; | ||
551 | } | ||
552 | #endif /* CONFIG_PCI */ | ||
553 | |||
554 | static const struct file_operations snd_mem_proc_fops = { | ||
555 | .owner = THIS_MODULE, | ||
556 | .open = snd_mem_proc_open, | ||
557 | .read = seq_read, | ||
558 | #ifdef CONFIG_PCI | ||
559 | .write = snd_mem_proc_write, | ||
560 | #endif | ||
561 | .llseek = seq_lseek, | ||
562 | .release = single_release, | ||
563 | }; | ||
564 | |||
565 | #endif /* CONFIG_PROC_FS */ | ||
566 | |||
567 | /* | ||
568 | * module entry | ||
569 | */ | ||
570 | |||
571 | static int __init snd_mem_init(void) | ||
572 | { | ||
573 | #ifdef CONFIG_PROC_FS | ||
574 | snd_mem_proc = proc_create(SND_MEM_PROC_FILE, 0644, NULL, | ||
575 | &snd_mem_proc_fops); | ||
576 | #endif | ||
577 | return 0; | ||
578 | } | ||
579 | |||
580 | static void __exit snd_mem_exit(void) | ||
581 | { | ||
582 | remove_proc_entry(SND_MEM_PROC_FILE, NULL); | ||
583 | free_all_reserved_pages(); | ||
584 | if (snd_allocated_pages > 0) | ||
585 | printk(KERN_ERR "snd-malloc: Memory leak? pages not freed = %li\n", snd_allocated_pages); | ||
586 | } | ||
587 | |||
588 | |||
589 | module_init(snd_mem_init) | ||
590 | module_exit(snd_mem_exit) | ||
591 | |||
592 | |||
593 | /* | 291 | /* |
594 | * exports | 292 | * exports |
595 | */ | 293 | */ |
@@ -597,8 +295,5 @@ EXPORT_SYMBOL(snd_dma_alloc_pages); | |||
597 | EXPORT_SYMBOL(snd_dma_alloc_pages_fallback); | 295 | EXPORT_SYMBOL(snd_dma_alloc_pages_fallback); |
598 | EXPORT_SYMBOL(snd_dma_free_pages); | 296 | EXPORT_SYMBOL(snd_dma_free_pages); |
599 | 297 | ||
600 | EXPORT_SYMBOL(snd_dma_get_reserved_buf); | ||
601 | EXPORT_SYMBOL(snd_dma_reserve_buf); | ||
602 | |||
603 | EXPORT_SYMBOL(snd_malloc_pages); | 298 | EXPORT_SYMBOL(snd_malloc_pages); |
604 | EXPORT_SYMBOL(snd_free_pages); | 299 | EXPORT_SYMBOL(snd_free_pages); |
diff --git a/sound/core/pcm_memory.c b/sound/core/pcm_memory.c index 0af622c34e19..54debc07f5cb 100644 --- a/sound/core/pcm_memory.c +++ b/sound/core/pcm_memory.c | |||
@@ -51,17 +51,9 @@ static const size_t snd_minimum_buffer = 16384; | |||
51 | static int preallocate_pcm_pages(struct snd_pcm_substream *substream, size_t size) | 51 | static int preallocate_pcm_pages(struct snd_pcm_substream *substream, size_t size) |
52 | { | 52 | { |
53 | struct snd_dma_buffer *dmab = &substream->dma_buffer; | 53 | struct snd_dma_buffer *dmab = &substream->dma_buffer; |
54 | size_t orig_size = size; | ||
54 | int err; | 55 | int err; |
55 | 56 | ||
56 | /* already reserved? */ | ||
57 | if (snd_dma_get_reserved_buf(dmab, substream->dma_buf_id) > 0) { | ||
58 | if (dmab->bytes >= size) | ||
59 | return 0; /* yes */ | ||
60 | /* no, free the reserved block */ | ||
61 | snd_dma_free_pages(dmab); | ||
62 | dmab->bytes = 0; | ||
63 | } | ||
64 | |||
65 | do { | 57 | do { |
66 | if ((err = snd_dma_alloc_pages(dmab->dev.type, dmab->dev.dev, | 58 | if ((err = snd_dma_alloc_pages(dmab->dev.type, dmab->dev.dev, |
67 | size, dmab)) < 0) { | 59 | size, dmab)) < 0) { |
@@ -72,6 +64,10 @@ static int preallocate_pcm_pages(struct snd_pcm_substream *substream, size_t siz | |||
72 | size >>= 1; | 64 | size >>= 1; |
73 | } while (size >= snd_minimum_buffer); | 65 | } while (size >= snd_minimum_buffer); |
74 | dmab->bytes = 0; /* tell error */ | 66 | dmab->bytes = 0; /* tell error */ |
67 | pr_warn("ALSA pcmC%dD%d%c,%d:%s: cannot preallocate for size %zu\n", | ||
68 | substream->pcm->card->number, substream->pcm->device, | ||
69 | substream->stream ? 'c' : 'p', substream->number, | ||
70 | substream->pcm->name, orig_size); | ||
75 | return 0; | 71 | return 0; |
76 | } | 72 | } |
77 | 73 | ||
@@ -82,10 +78,7 @@ static void snd_pcm_lib_preallocate_dma_free(struct snd_pcm_substream *substream | |||
82 | { | 78 | { |
83 | if (substream->dma_buffer.area == NULL) | 79 | if (substream->dma_buffer.area == NULL) |
84 | return; | 80 | return; |
85 | if (substream->dma_buf_id) | 81 | snd_dma_free_pages(&substream->dma_buffer); |
86 | snd_dma_reserve_buf(&substream->dma_buffer, substream->dma_buf_id); | ||
87 | else | ||
88 | snd_dma_free_pages(&substream->dma_buffer); | ||
89 | substream->dma_buffer.area = NULL; | 82 | substream->dma_buffer.area = NULL; |
90 | } | 83 | } |
91 | 84 | ||
@@ -260,11 +253,6 @@ static int snd_pcm_lib_preallocate_pages1(struct snd_pcm_substream *substream, | |||
260 | * | 253 | * |
261 | * Do pre-allocation for the given DMA buffer type. | 254 | * Do pre-allocation for the given DMA buffer type. |
262 | * | 255 | * |
263 | * When substream->dma_buf_id is set, the function tries to look for | ||
264 | * the reserved buffer, and the buffer is not freed but reserved at | ||
265 | * destruction time. The dma_buf_id must be unique for all systems | ||
266 | * (in the same DMA buffer type) e.g. using snd_dma_pci_buf_id(). | ||
267 | * | ||
268 | * Return: Zero if successful, or a negative error code on failure. | 256 | * Return: Zero if successful, or a negative error code on failure. |
269 | */ | 257 | */ |
270 | int snd_pcm_lib_preallocate_pages(struct snd_pcm_substream *substream, | 258 | int snd_pcm_lib_preallocate_pages(struct snd_pcm_substream *substream, |
diff --git a/sound/core/pcm_misc.c b/sound/core/pcm_misc.c index 43f24cce3dec..4560ca0e5651 100644 --- a/sound/core/pcm_misc.c +++ b/sound/core/pcm_misc.c | |||
@@ -514,3 +514,42 @@ unsigned int snd_pcm_rate_bit_to_rate(unsigned int rate_bit) | |||
514 | return 0; | 514 | return 0; |
515 | } | 515 | } |
516 | EXPORT_SYMBOL(snd_pcm_rate_bit_to_rate); | 516 | EXPORT_SYMBOL(snd_pcm_rate_bit_to_rate); |
517 | |||
518 | static unsigned int snd_pcm_rate_mask_sanitize(unsigned int rates) | ||
519 | { | ||
520 | if (rates & SNDRV_PCM_RATE_CONTINUOUS) | ||
521 | return SNDRV_PCM_RATE_CONTINUOUS; | ||
522 | else if (rates & SNDRV_PCM_RATE_KNOT) | ||
523 | return SNDRV_PCM_RATE_KNOT; | ||
524 | return rates; | ||
525 | } | ||
526 | |||
527 | /** | ||
528 | * snd_pcm_rate_mask_intersect - computes the intersection between two rate masks | ||
529 | * @rates_a: The first rate mask | ||
530 | * @rates_b: The second rate mask | ||
531 | * | ||
532 | * This function computes the rates that are supported by both rate masks passed | ||
533 | * to the function. It will take care of the special handling of | ||
534 | * SNDRV_PCM_RATE_CONTINUOUS and SNDRV_PCM_RATE_KNOT. | ||
535 | * | ||
536 | * Return: A rate mask containing the rates that are supported by both rates_a | ||
537 | * and rates_b. | ||
538 | */ | ||
539 | unsigned int snd_pcm_rate_mask_intersect(unsigned int rates_a, | ||
540 | unsigned int rates_b) | ||
541 | { | ||
542 | rates_a = snd_pcm_rate_mask_sanitize(rates_a); | ||
543 | rates_b = snd_pcm_rate_mask_sanitize(rates_b); | ||
544 | |||
545 | if (rates_a & SNDRV_PCM_RATE_CONTINUOUS) | ||
546 | return rates_b; | ||
547 | else if (rates_b & SNDRV_PCM_RATE_CONTINUOUS) | ||
548 | return rates_a; | ||
549 | else if (rates_a & SNDRV_PCM_RATE_KNOT) | ||
550 | return rates_b; | ||
551 | else if (rates_b & SNDRV_PCM_RATE_KNOT) | ||
552 | return rates_a; | ||
553 | return rates_a & rates_b; | ||
554 | } | ||
555 | EXPORT_SYMBOL_GPL(snd_pcm_rate_mask_intersect); | ||
diff --git a/sound/oss/dmabuf.c b/sound/oss/dmabuf.c index 461d94cfecbe..e3f29132d3ac 100644 --- a/sound/oss/dmabuf.c +++ b/sound/oss/dmabuf.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/mm.h> | 28 | #include <linux/mm.h> |
29 | #include <linux/gfp.h> | 29 | #include <linux/gfp.h> |
30 | #include "sound_config.h" | 30 | #include "sound_config.h" |
31 | #include "sleep.h" | ||
31 | 32 | ||
32 | #define DMAP_FREE_ON_CLOSE 0 | 33 | #define DMAP_FREE_ON_CLOSE 0 |
33 | #define DMAP_KEEP_ON_CLOSE 1 | 34 | #define DMAP_KEEP_ON_CLOSE 1 |
@@ -351,8 +352,7 @@ static void dma_reset_output(int dev) | |||
351 | if (!signal_pending(current) && adev->dmap_out->qlen && | 352 | if (!signal_pending(current) && adev->dmap_out->qlen && |
352 | adev->dmap_out->underrun_count == 0){ | 353 | adev->dmap_out->underrun_count == 0){ |
353 | spin_unlock_irqrestore(&dmap->lock,flags); | 354 | spin_unlock_irqrestore(&dmap->lock,flags); |
354 | interruptible_sleep_on_timeout(&adev->out_sleeper, | 355 | oss_broken_sleep_on(&adev->out_sleeper, dmabuf_timeout(dmap)); |
355 | dmabuf_timeout(dmap)); | ||
356 | spin_lock_irqsave(&dmap->lock,flags); | 356 | spin_lock_irqsave(&dmap->lock,flags); |
357 | } | 357 | } |
358 | adev->dmap_out->flags &= ~(DMA_SYNCING | DMA_ACTIVE); | 358 | adev->dmap_out->flags &= ~(DMA_SYNCING | DMA_ACTIVE); |
@@ -446,7 +446,7 @@ int DMAbuf_sync(int dev) | |||
446 | long t = dmabuf_timeout(dmap); | 446 | long t = dmabuf_timeout(dmap); |
447 | spin_unlock_irqrestore(&dmap->lock,flags); | 447 | spin_unlock_irqrestore(&dmap->lock,flags); |
448 | /* FIXME: not safe may miss events */ | 448 | /* FIXME: not safe may miss events */ |
449 | t = interruptible_sleep_on_timeout(&adev->out_sleeper, t); | 449 | t = oss_broken_sleep_on(&adev->out_sleeper, t); |
450 | spin_lock_irqsave(&dmap->lock,flags); | 450 | spin_lock_irqsave(&dmap->lock,flags); |
451 | if (!t) { | 451 | if (!t) { |
452 | adev->dmap_out->flags &= ~DMA_SYNCING; | 452 | adev->dmap_out->flags &= ~DMA_SYNCING; |
@@ -466,7 +466,7 @@ int DMAbuf_sync(int dev) | |||
466 | while (!signal_pending(current) && | 466 | while (!signal_pending(current) && |
467 | adev->d->local_qlen(dev)){ | 467 | adev->d->local_qlen(dev)){ |
468 | spin_unlock_irqrestore(&dmap->lock,flags); | 468 | spin_unlock_irqrestore(&dmap->lock,flags); |
469 | interruptible_sleep_on_timeout(&adev->out_sleeper, | 469 | oss_broken_sleep_on(&adev->out_sleeper, |
470 | dmabuf_timeout(dmap)); | 470 | dmabuf_timeout(dmap)); |
471 | spin_lock_irqsave(&dmap->lock,flags); | 471 | spin_lock_irqsave(&dmap->lock,flags); |
472 | } | 472 | } |
@@ -587,8 +587,7 @@ int DMAbuf_getrdbuffer(int dev, char **buf, int *len, int dontblock) | |||
587 | timeout = dmabuf_timeout(dmap); | 587 | timeout = dmabuf_timeout(dmap); |
588 | 588 | ||
589 | spin_unlock_irqrestore(&dmap->lock,flags); | 589 | spin_unlock_irqrestore(&dmap->lock,flags); |
590 | timeout = interruptible_sleep_on_timeout(&adev->in_sleeper, | 590 | timeout = oss_broken_sleep_on(&adev->in_sleeper, timeout); |
591 | timeout); | ||
592 | if (!timeout) { | 591 | if (!timeout) { |
593 | /* FIXME: include device name */ | 592 | /* FIXME: include device name */ |
594 | err = -EIO; | 593 | err = -EIO; |
@@ -768,8 +767,7 @@ static int output_sleep(int dev, int dontblock) | |||
768 | timeout_value = dmabuf_timeout(dmap); | 767 | timeout_value = dmabuf_timeout(dmap); |
769 | else | 768 | else |
770 | timeout_value = MAX_SCHEDULE_TIMEOUT; | 769 | timeout_value = MAX_SCHEDULE_TIMEOUT; |
771 | timeout_value = interruptible_sleep_on_timeout(&adev->out_sleeper, | 770 | timeout_value = oss_broken_sleep_on(&adev->out_sleeper, timeout_value); |
772 | timeout_value); | ||
773 | if (timeout != MAX_SCHEDULE_TIMEOUT && !timeout_value) { | 771 | if (timeout != MAX_SCHEDULE_TIMEOUT && !timeout_value) { |
774 | printk(KERN_WARNING "Sound: DMA (output) timed out - IRQ/DRQ config error?\n"); | 772 | printk(KERN_WARNING "Sound: DMA (output) timed out - IRQ/DRQ config error?\n"); |
775 | dma_reset_output(dev); | 773 | dma_reset_output(dev); |
diff --git a/sound/oss/dmasound/dmasound.h b/sound/oss/dmasound/dmasound.h index 1308d8d34186..01019f06fa91 100644 --- a/sound/oss/dmasound/dmasound.h +++ b/sound/oss/dmasound/dmasound.h | |||
@@ -239,7 +239,6 @@ struct sound_queue { | |||
239 | int busy, syncing, xruns, died; | 239 | int busy, syncing, xruns, died; |
240 | }; | 240 | }; |
241 | 241 | ||
242 | #define SLEEP(queue) interruptible_sleep_on_timeout(&queue, HZ) | ||
243 | #define WAKE_UP(queue) (wake_up_interruptible(&queue)) | 242 | #define WAKE_UP(queue) (wake_up_interruptible(&queue)) |
244 | 243 | ||
245 | extern struct sound_queue dmasound_write_sq; | 244 | extern struct sound_queue dmasound_write_sq; |
diff --git a/sound/oss/dmasound/dmasound_core.c b/sound/oss/dmasound/dmasound_core.c index bac43b5b6e95..f4ee85a4c42f 100644 --- a/sound/oss/dmasound/dmasound_core.c +++ b/sound/oss/dmasound/dmasound_core.c | |||
@@ -619,15 +619,27 @@ static ssize_t sq_write(struct file *file, const char __user *src, size_t uLeft, | |||
619 | } | 619 | } |
620 | 620 | ||
621 | while (uLeft) { | 621 | while (uLeft) { |
622 | DEFINE_WAIT(wait); | ||
623 | |||
622 | while (write_sq.count >= write_sq.max_active) { | 624 | while (write_sq.count >= write_sq.max_active) { |
625 | prepare_to_wait(&write_sq.action_queue, &wait, TASK_INTERRUPTIBLE); | ||
623 | sq_play(); | 626 | sq_play(); |
624 | if (write_sq.non_blocking) | 627 | if (write_sq.non_blocking) { |
628 | finish_wait(&write_sq.action_queue, &wait); | ||
625 | return uWritten > 0 ? uWritten : -EAGAIN; | 629 | return uWritten > 0 ? uWritten : -EAGAIN; |
626 | SLEEP(write_sq.action_queue); | 630 | } |
627 | if (signal_pending(current)) | 631 | if (write_sq.count < write_sq.max_active) |
632 | break; | ||
633 | |||
634 | schedule_timeout(HZ); | ||
635 | if (signal_pending(current)) { | ||
636 | finish_wait(&write_sq.action_queue, &wait); | ||
628 | return uWritten > 0 ? uWritten : -EINTR; | 637 | return uWritten > 0 ? uWritten : -EINTR; |
638 | } | ||
629 | } | 639 | } |
630 | 640 | ||
641 | finish_wait(&write_sq.action_queue, &wait); | ||
642 | |||
631 | /* Here, we can avoid disabling the interrupt by first | 643 | /* Here, we can avoid disabling the interrupt by first |
632 | * copying and translating the data, and then updating | 644 | * copying and translating the data, and then updating |
633 | * the write_sq variables. Until this is done, the interrupt | 645 | * the write_sq variables. Until this is done, the interrupt |
@@ -707,11 +719,8 @@ static int sq_open2(struct sound_queue *sq, struct file *file, fmode_t mode, | |||
707 | if (file->f_flags & O_NONBLOCK) | 719 | if (file->f_flags & O_NONBLOCK) |
708 | return rc; | 720 | return rc; |
709 | rc = -EINTR; | 721 | rc = -EINTR; |
710 | while (sq->busy) { | 722 | if (wait_event_interruptible(sq->open_queue, !sq->busy)) |
711 | SLEEP(sq->open_queue); | 723 | return rc; |
712 | if (signal_pending(current)) | ||
713 | return rc; | ||
714 | } | ||
715 | rc = 0; | 724 | rc = 0; |
716 | #else | 725 | #else |
717 | /* OSS manual says we will return EBUSY regardless | 726 | /* OSS manual says we will return EBUSY regardless |
@@ -844,7 +853,8 @@ static int sq_fsync(void) | |||
844 | sq_play(); /* there may be an incomplete frame waiting */ | 853 | sq_play(); /* there may be an incomplete frame waiting */ |
845 | 854 | ||
846 | while (write_sq.active) { | 855 | while (write_sq.active) { |
847 | SLEEP(write_sq.sync_queue); | 856 | wait_event_interruptible_timeout(write_sq.sync_queue, |
857 | !write_sq.active, HZ); | ||
848 | if (signal_pending(current)) { | 858 | if (signal_pending(current)) { |
849 | /* While waiting for audio output to drain, an | 859 | /* While waiting for audio output to drain, an |
850 | * interrupt occurred. Stop audio output immediately | 860 | * interrupt occurred. Stop audio output immediately |
diff --git a/sound/oss/midibuf.c b/sound/oss/midibuf.c index 8cdb2cfe65c8..8f45cd999965 100644 --- a/sound/oss/midibuf.c +++ b/sound/oss/midibuf.c | |||
@@ -86,9 +86,8 @@ static void drain_midi_queue(int dev) | |||
86 | */ | 86 | */ |
87 | 87 | ||
88 | if (midi_devs[dev]->buffer_status != NULL) | 88 | if (midi_devs[dev]->buffer_status != NULL) |
89 | while (!signal_pending(current) && midi_devs[dev]->buffer_status(dev)) | 89 | wait_event_interruptible_timeout(midi_sleeper[dev], |
90 | interruptible_sleep_on_timeout(&midi_sleeper[dev], | 90 | !midi_devs[dev]->buffer_status(dev), HZ/10); |
91 | HZ/10); | ||
92 | } | 91 | } |
93 | 92 | ||
94 | static void midi_input_intr(int dev, unsigned char data) | 93 | static void midi_input_intr(int dev, unsigned char data) |
@@ -233,8 +232,8 @@ void MIDIbuf_release(int dev, struct file *file) | |||
233 | * devices | 232 | * devices |
234 | */ | 233 | */ |
235 | 234 | ||
236 | while (!signal_pending(current) && DATA_AVAIL(midi_out_buf[dev])) | 235 | wait_event_interruptible(midi_sleeper[dev], |
237 | interruptible_sleep_on(&midi_sleeper[dev]); | 236 | !DATA_AVAIL(midi_out_buf[dev])); |
238 | /* | 237 | /* |
239 | * Sync | 238 | * Sync |
240 | */ | 239 | */ |
@@ -282,8 +281,8 @@ int MIDIbuf_write(int dev, struct file *file, const char __user *buf, int count) | |||
282 | goto out; | 281 | goto out; |
283 | } | 282 | } |
284 | 283 | ||
285 | interruptible_sleep_on(&midi_sleeper[dev]); | 284 | if (wait_event_interruptible(midi_sleeper[dev], |
286 | if (signal_pending(current)) | 285 | SPACE_AVAIL(midi_out_buf[dev]))) |
287 | { | 286 | { |
288 | c = -EINTR; | 287 | c = -EINTR; |
289 | goto out; | 288 | goto out; |
@@ -325,8 +324,9 @@ int MIDIbuf_read(int dev, struct file *file, char __user *buf, int count) | |||
325 | c = -EAGAIN; | 324 | c = -EAGAIN; |
326 | goto out; | 325 | goto out; |
327 | } | 326 | } |
328 | interruptible_sleep_on_timeout(&input_sleeper[dev], | 327 | wait_event_interruptible_timeout(input_sleeper[dev], |
329 | parms[dev].prech_timeout); | 328 | DATA_AVAIL(midi_in_buf[dev]), |
329 | parms[dev].prech_timeout); | ||
330 | 330 | ||
331 | if (signal_pending(current)) | 331 | if (signal_pending(current)) |
332 | c = -EINTR; /* The user is getting restless */ | 332 | c = -EINTR; /* The user is getting restless */ |
diff --git a/sound/oss/msnd_pinnacle.c b/sound/oss/msnd_pinnacle.c index 11ff7c55240c..c23f9f95bfa5 100644 --- a/sound/oss/msnd_pinnacle.c +++ b/sound/oss/msnd_pinnacle.c | |||
@@ -664,12 +664,15 @@ static long dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
664 | 664 | ||
665 | static void dsp_write_flush(void) | 665 | static void dsp_write_flush(void) |
666 | { | 666 | { |
667 | int timeout = get_play_delay_jiffies(dev.DAPF.len); | ||
668 | |||
667 | if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags)) | 669 | if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags)) |
668 | return; | 670 | return; |
669 | set_bit(F_WRITEFLUSH, &dev.flags); | 671 | set_bit(F_WRITEFLUSH, &dev.flags); |
670 | interruptible_sleep_on_timeout( | 672 | wait_event_interruptible_timeout( |
671 | &dev.writeflush, | 673 | dev.writeflush, |
672 | get_play_delay_jiffies(dev.DAPF.len)); | 674 | !test_bit(F_WRITEFLUSH, &dev.flags), |
675 | timeout); | ||
673 | clear_bit(F_WRITEFLUSH, &dev.flags); | 676 | clear_bit(F_WRITEFLUSH, &dev.flags); |
674 | if (!signal_pending(current)) { | 677 | if (!signal_pending(current)) { |
675 | current->state = TASK_INTERRUPTIBLE; | 678 | current->state = TASK_INTERRUPTIBLE; |
@@ -897,6 +900,7 @@ static int dsp_read(char __user *buf, size_t len) | |||
897 | { | 900 | { |
898 | int count = len; | 901 | int count = len; |
899 | char *page = (char *)__get_free_page(GFP_KERNEL); | 902 | char *page = (char *)__get_free_page(GFP_KERNEL); |
903 | int timeout = get_rec_delay_jiffies(DAR_BUFF_SIZE); | ||
900 | 904 | ||
901 | if (!page) | 905 | if (!page) |
902 | return -ENOMEM; | 906 | return -ENOMEM; |
@@ -936,11 +940,11 @@ static int dsp_read(char __user *buf, size_t len) | |||
936 | 940 | ||
937 | if (count > 0) { | 941 | if (count > 0) { |
938 | set_bit(F_READBLOCK, &dev.flags); | 942 | set_bit(F_READBLOCK, &dev.flags); |
939 | if (!interruptible_sleep_on_timeout( | 943 | if (wait_event_interruptible_timeout( |
940 | &dev.readblock, | 944 | dev.readblock, |
941 | get_rec_delay_jiffies(DAR_BUFF_SIZE))) | 945 | test_bit(F_READBLOCK, &dev.flags), |
946 | timeout) <= 0) | ||
942 | clear_bit(F_READING, &dev.flags); | 947 | clear_bit(F_READING, &dev.flags); |
943 | clear_bit(F_READBLOCK, &dev.flags); | ||
944 | if (signal_pending(current)) { | 948 | if (signal_pending(current)) { |
945 | free_page((unsigned long)page); | 949 | free_page((unsigned long)page); |
946 | return -EINTR; | 950 | return -EINTR; |
@@ -955,6 +959,7 @@ static int dsp_write(const char __user *buf, size_t len) | |||
955 | { | 959 | { |
956 | int count = len; | 960 | int count = len; |
957 | char *page = (char *)__get_free_page(GFP_KERNEL); | 961 | char *page = (char *)__get_free_page(GFP_KERNEL); |
962 | int timeout = get_play_delay_jiffies(DAP_BUFF_SIZE); | ||
958 | 963 | ||
959 | if (!page) | 964 | if (!page) |
960 | return -ENOMEM; | 965 | return -ENOMEM; |
@@ -995,10 +1000,10 @@ static int dsp_write(const char __user *buf, size_t len) | |||
995 | 1000 | ||
996 | if (count > 0) { | 1001 | if (count > 0) { |
997 | set_bit(F_WRITEBLOCK, &dev.flags); | 1002 | set_bit(F_WRITEBLOCK, &dev.flags); |
998 | interruptible_sleep_on_timeout( | 1003 | wait_event_interruptible_timeout( |
999 | &dev.writeblock, | 1004 | dev.writeblock, |
1000 | get_play_delay_jiffies(DAP_BUFF_SIZE)); | 1005 | test_bit(F_WRITEBLOCK, &dev.flags), |
1001 | clear_bit(F_WRITEBLOCK, &dev.flags); | 1006 | timeout); |
1002 | if (signal_pending(current)) { | 1007 | if (signal_pending(current)) { |
1003 | free_page((unsigned long)page); | 1008 | free_page((unsigned long)page); |
1004 | return -EINTR; | 1009 | return -EINTR; |
@@ -1044,7 +1049,7 @@ static __inline__ void eval_dsp_msg(register WORD wMessage) | |||
1044 | clear_bit(F_WRITING, &dev.flags); | 1049 | clear_bit(F_WRITING, &dev.flags); |
1045 | } | 1050 | } |
1046 | 1051 | ||
1047 | if (test_bit(F_WRITEBLOCK, &dev.flags)) | 1052 | if (test_and_clear_bit(F_WRITEBLOCK, &dev.flags)) |
1048 | wake_up_interruptible(&dev.writeblock); | 1053 | wake_up_interruptible(&dev.writeblock); |
1049 | break; | 1054 | break; |
1050 | 1055 | ||
@@ -1055,7 +1060,7 @@ static __inline__ void eval_dsp_msg(register WORD wMessage) | |||
1055 | 1060 | ||
1056 | pack_DARQ_to_DARF(dev.last_recbank); | 1061 | pack_DARQ_to_DARF(dev.last_recbank); |
1057 | 1062 | ||
1058 | if (test_bit(F_READBLOCK, &dev.flags)) | 1063 | if (test_and_clear_bit(F_READBLOCK, &dev.flags)) |
1059 | wake_up_interruptible(&dev.readblock); | 1064 | wake_up_interruptible(&dev.readblock); |
1060 | break; | 1065 | break; |
1061 | 1066 | ||
diff --git a/sound/oss/sequencer.c b/sound/oss/sequencer.c index 4ff60a6427d9..9b9f7d385134 100644 --- a/sound/oss/sequencer.c +++ b/sound/oss/sequencer.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include "sound_config.h" | 19 | #include "sound_config.h" |
20 | 20 | ||
21 | #include "midi_ctrl.h" | 21 | #include "midi_ctrl.h" |
22 | #include "sleep.h" | ||
22 | 23 | ||
23 | static int sequencer_ok; | 24 | static int sequencer_ok; |
24 | static struct sound_timer_operations *tmr; | 25 | static struct sound_timer_operations *tmr; |
@@ -100,8 +101,7 @@ int sequencer_read(int dev, struct file *file, char __user *buf, int count) | |||
100 | return -EAGAIN; | 101 | return -EAGAIN; |
101 | } | 102 | } |
102 | 103 | ||
103 | interruptible_sleep_on_timeout(&midi_sleeper, | 104 | oss_broken_sleep_on(&midi_sleeper, pre_event_timeout); |
104 | pre_event_timeout); | ||
105 | spin_lock_irqsave(&lock,flags); | 105 | spin_lock_irqsave(&lock,flags); |
106 | if (!iqlen) | 106 | if (!iqlen) |
107 | { | 107 | { |
@@ -343,7 +343,7 @@ static int seq_queue(unsigned char *note, char nonblock) | |||
343 | /* | 343 | /* |
344 | * Sleep until there is enough space on the queue | 344 | * Sleep until there is enough space on the queue |
345 | */ | 345 | */ |
346 | interruptible_sleep_on(&seq_sleeper); | 346 | oss_broken_sleep_on(&seq_sleeper, MAX_SCHEDULE_TIMEOUT); |
347 | } | 347 | } |
348 | if (qlen >= SEQ_MAX_QUEUE) | 348 | if (qlen >= SEQ_MAX_QUEUE) |
349 | { | 349 | { |
@@ -1122,8 +1122,7 @@ static void seq_drain_midi_queues(void) | |||
1122 | */ | 1122 | */ |
1123 | 1123 | ||
1124 | if (n) | 1124 | if (n) |
1125 | interruptible_sleep_on_timeout(&seq_sleeper, | 1125 | oss_broken_sleep_on(&seq_sleeper, HZ/10); |
1126 | HZ/10); | ||
1127 | } | 1126 | } |
1128 | } | 1127 | } |
1129 | 1128 | ||
@@ -1145,8 +1144,7 @@ void sequencer_release(int dev, struct file *file) | |||
1145 | while (!signal_pending(current) && qlen > 0) | 1144 | while (!signal_pending(current) && qlen > 0) |
1146 | { | 1145 | { |
1147 | seq_sync(); | 1146 | seq_sync(); |
1148 | interruptible_sleep_on_timeout(&seq_sleeper, | 1147 | oss_broken_sleep_on(&seq_sleeper, 3*HZ); |
1149 | 3*HZ); | ||
1150 | /* Extra delay */ | 1148 | /* Extra delay */ |
1151 | } | 1149 | } |
1152 | } | 1150 | } |
@@ -1201,7 +1199,7 @@ static int seq_sync(void) | |||
1201 | seq_startplay(); | 1199 | seq_startplay(); |
1202 | 1200 | ||
1203 | if (qlen > 0) | 1201 | if (qlen > 0) |
1204 | interruptible_sleep_on_timeout(&seq_sleeper, HZ); | 1202 | oss_broken_sleep_on(&seq_sleeper, HZ); |
1205 | return qlen; | 1203 | return qlen; |
1206 | } | 1204 | } |
1207 | 1205 | ||
@@ -1224,7 +1222,7 @@ static void midi_outc(int dev, unsigned char data) | |||
1224 | 1222 | ||
1225 | spin_lock_irqsave(&lock,flags); | 1223 | spin_lock_irqsave(&lock,flags); |
1226 | while (n && !midi_devs[dev]->outputc(dev, data)) { | 1224 | while (n && !midi_devs[dev]->outputc(dev, data)) { |
1227 | interruptible_sleep_on_timeout(&seq_sleeper, HZ/25); | 1225 | oss_broken_sleep_on(&seq_sleeper, HZ/25); |
1228 | n--; | 1226 | n--; |
1229 | } | 1227 | } |
1230 | spin_unlock_irqrestore(&lock,flags); | 1228 | spin_unlock_irqrestore(&lock,flags); |
diff --git a/sound/oss/sleep.h b/sound/oss/sleep.h new file mode 100644 index 000000000000..a20fc925a5ce --- /dev/null +++ b/sound/oss/sleep.h | |||
@@ -0,0 +1,18 @@ | |||
1 | #include <linux/wait.h> | ||
2 | |||
3 | /* | ||
4 | * Do not use. This is a replacement for the old | ||
5 | * "interruptible_sleep_on_timeout" function that has been | ||
6 | * deprecated for ages. All users should instead try to use | ||
7 | * wait_event_interruptible_timeout. | ||
8 | */ | ||
9 | |||
10 | static inline long | ||
11 | oss_broken_sleep_on(wait_queue_head_t *q, long timeout) | ||
12 | { | ||
13 | DEFINE_WAIT(wait); | ||
14 | prepare_to_wait(q, &wait, TASK_INTERRUPTIBLE); | ||
15 | timeout = schedule_timeout(timeout); | ||
16 | finish_wait(q, &wait); | ||
17 | return timeout; | ||
18 | } | ||
diff --git a/sound/oss/swarm_cs4297a.c b/sound/oss/swarm_cs4297a.c index 7d8803a00b79..f851fd0e199c 100644 --- a/sound/oss/swarm_cs4297a.c +++ b/sound/oss/swarm_cs4297a.c | |||
@@ -90,6 +90,8 @@ | |||
90 | #include <asm/sibyte/sb1250_mac.h> | 90 | #include <asm/sibyte/sb1250_mac.h> |
91 | #include <asm/sibyte/sb1250.h> | 91 | #include <asm/sibyte/sb1250.h> |
92 | 92 | ||
93 | #include "sleep.h" | ||
94 | |||
93 | struct cs4297a_state; | 95 | struct cs4297a_state; |
94 | 96 | ||
95 | static DEFINE_MUTEX(swarm_cs4297a_mutex); | 97 | static DEFINE_MUTEX(swarm_cs4297a_mutex); |
@@ -748,7 +750,7 @@ static int serdma_reg_access(struct cs4297a_state *s, u64 data) | |||
748 | /* Since a writer has the DSP open, we have to mux the | 750 | /* Since a writer has the DSP open, we have to mux the |
749 | request in */ | 751 | request in */ |
750 | s->reg_request = data; | 752 | s->reg_request = data; |
751 | interruptible_sleep_on(&s->dma_dac.reg_wait); | 753 | oss_broken_sleep_on(&s->dma_dac.reg_wait, MAX_SCHEDULE_TIMEOUT); |
752 | /* XXXKW how can I deal with the starvation case where | 754 | /* XXXKW how can I deal with the starvation case where |
753 | the opener isn't writing? */ | 755 | the opener isn't writing? */ |
754 | } else { | 756 | } else { |
@@ -790,7 +792,7 @@ static int cs4297a_read_ac97(struct cs4297a_state *s, u32 offset, | |||
790 | if (serdma_reg_access(s, (0xCLL << 60) | (1LL << 47) | ((u64)(offset & 0x7F) << 40))) | 792 | if (serdma_reg_access(s, (0xCLL << 60) | (1LL << 47) | ((u64)(offset & 0x7F) << 40))) |
791 | return -1; | 793 | return -1; |
792 | 794 | ||
793 | interruptible_sleep_on(&s->dma_adc.reg_wait); | 795 | oss_broken_sleep_on(&s->dma_adc.reg_wait, MAX_SCHEDULE_TIMEOUT); |
794 | *value = s->read_value; | 796 | *value = s->read_value; |
795 | CS_DBGOUT(CS_AC97, 2, | 797 | CS_DBGOUT(CS_AC97, 2, |
796 | printk(KERN_INFO "cs4297a: rdr reg %x -> %x\n", s->read_reg, s->read_value)); | 798 | printk(KERN_INFO "cs4297a: rdr reg %x -> %x\n", s->read_reg, s->read_value)); |
@@ -1740,7 +1742,7 @@ static ssize_t cs4297a_read(struct file *file, char *buffer, size_t count, | |||
1740 | start_adc(s); | 1742 | start_adc(s); |
1741 | if (file->f_flags & O_NONBLOCK) | 1743 | if (file->f_flags & O_NONBLOCK) |
1742 | return ret ? ret : -EAGAIN; | 1744 | return ret ? ret : -EAGAIN; |
1743 | interruptible_sleep_on(&s->dma_adc.wait); | 1745 | oss_broken_sleep_on(&s->dma_adc.wait, MAX_SCHEDULE_TIMEOUT); |
1744 | if (signal_pending(current)) | 1746 | if (signal_pending(current)) |
1745 | return ret ? ret : -ERESTARTSYS; | 1747 | return ret ? ret : -ERESTARTSYS; |
1746 | continue; | 1748 | continue; |
@@ -1836,7 +1838,7 @@ static ssize_t cs4297a_write(struct file *file, const char *buffer, | |||
1836 | start_dac(s); | 1838 | start_dac(s); |
1837 | if (file->f_flags & O_NONBLOCK) | 1839 | if (file->f_flags & O_NONBLOCK) |
1838 | return ret ? ret : -EAGAIN; | 1840 | return ret ? ret : -EAGAIN; |
1839 | interruptible_sleep_on(&d->wait); | 1841 | oss_broken_sleep_on(&d->wait, MAX_SCHEDULE_TIMEOUT); |
1840 | if (signal_pending(current)) | 1842 | if (signal_pending(current)) |
1841 | return ret ? ret : -ERESTARTSYS; | 1843 | return ret ? ret : -ERESTARTSYS; |
1842 | continue; | 1844 | continue; |
@@ -2452,7 +2454,7 @@ static int cs4297a_locked_open(struct inode *inode, struct file *file) | |||
2452 | return -EBUSY; | 2454 | return -EBUSY; |
2453 | } | 2455 | } |
2454 | mutex_unlock(&s->open_sem_dac); | 2456 | mutex_unlock(&s->open_sem_dac); |
2455 | interruptible_sleep_on(&s->open_wait_dac); | 2457 | oss_broken_sleep_on(&s->open_wait_dac, MAX_SCHEDULE_TIMEOUT); |
2456 | 2458 | ||
2457 | if (signal_pending(current)) { | 2459 | if (signal_pending(current)) { |
2458 | printk("open - sig pending\n"); | 2460 | printk("open - sig pending\n"); |
@@ -2469,7 +2471,7 @@ static int cs4297a_locked_open(struct inode *inode, struct file *file) | |||
2469 | return -EBUSY; | 2471 | return -EBUSY; |
2470 | } | 2472 | } |
2471 | mutex_unlock(&s->open_sem_adc); | 2473 | mutex_unlock(&s->open_sem_adc); |
2472 | interruptible_sleep_on(&s->open_wait_adc); | 2474 | oss_broken_sleep_on(&s->open_wait_adc, MAX_SCHEDULE_TIMEOUT); |
2473 | 2475 | ||
2474 | if (signal_pending(current)) { | 2476 | if (signal_pending(current)) { |
2475 | printk("open - sig pending\n"); | 2477 | printk("open - sig pending\n"); |
diff --git a/sound/oss/vwsnd.c b/sound/oss/vwsnd.c index 4bbcc0fcd4eb..a077e9c69a5e 100644 --- a/sound/oss/vwsnd.c +++ b/sound/oss/vwsnd.c | |||
@@ -2921,6 +2921,7 @@ static int vwsnd_audio_open(struct inode *inode, struct file *file) | |||
2921 | vwsnd_dev_t *devc; | 2921 | vwsnd_dev_t *devc; |
2922 | int minor = iminor(inode); | 2922 | int minor = iminor(inode); |
2923 | int sw_samplefmt; | 2923 | int sw_samplefmt; |
2924 | DEFINE_WAIT(wait); | ||
2924 | 2925 | ||
2925 | DBGE("(inode=0x%p, file=0x%p)\n", inode, file); | 2926 | DBGE("(inode=0x%p, file=0x%p)\n", inode, file); |
2926 | 2927 | ||
@@ -2937,21 +2938,26 @@ static int vwsnd_audio_open(struct inode *inode, struct file *file) | |||
2937 | } | 2938 | } |
2938 | 2939 | ||
2939 | mutex_lock(&devc->open_mutex); | 2940 | mutex_lock(&devc->open_mutex); |
2940 | while (devc->open_mode & file->f_mode) { | 2941 | while (1) { |
2942 | prepare_to_wait(&devc->open_wait, &wait, TASK_INTERRUPTIBLE); | ||
2943 | if (!(devc->open_mode & file->f_mode)) | ||
2944 | break; | ||
2945 | |||
2941 | mutex_unlock(&devc->open_mutex); | 2946 | mutex_unlock(&devc->open_mutex); |
2947 | mutex_unlock(&vwsnd_mutex); | ||
2942 | if (file->f_flags & O_NONBLOCK) { | 2948 | if (file->f_flags & O_NONBLOCK) { |
2943 | DEC_USE_COUNT; | 2949 | DEC_USE_COUNT; |
2944 | mutex_unlock(&vwsnd_mutex); | ||
2945 | return -EBUSY; | 2950 | return -EBUSY; |
2946 | } | 2951 | } |
2947 | interruptible_sleep_on(&devc->open_wait); | 2952 | schedule(); |
2948 | if (signal_pending(current)) { | 2953 | if (signal_pending(current)) { |
2949 | DEC_USE_COUNT; | 2954 | DEC_USE_COUNT; |
2950 | mutex_unlock(&vwsnd_mutex); | ||
2951 | return -ERESTARTSYS; | 2955 | return -ERESTARTSYS; |
2952 | } | 2956 | } |
2957 | mutex_lock(&vwsnd_mutex); | ||
2953 | mutex_lock(&devc->open_mutex); | 2958 | mutex_lock(&devc->open_mutex); |
2954 | } | 2959 | } |
2960 | finish_wait(&devc->open_wait, &wait); | ||
2955 | devc->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE); | 2961 | devc->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE); |
2956 | mutex_unlock(&devc->open_mutex); | 2962 | mutex_unlock(&devc->open_mutex); |
2957 | 2963 | ||
diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig index 46ed9e8ae0fd..8756c8e32922 100644 --- a/sound/pci/Kconfig +++ b/sound/pci/Kconfig | |||
@@ -25,6 +25,7 @@ config SND_ALS300 | |||
25 | select SND_PCM | 25 | select SND_PCM |
26 | select SND_AC97_CODEC | 26 | select SND_AC97_CODEC |
27 | select SND_OPL3_LIB | 27 | select SND_OPL3_LIB |
28 | select ZONE_DMA | ||
28 | help | 29 | help |
29 | Say 'Y' or 'M' to include support for Avance Logic ALS300/ALS300+ | 30 | Say 'Y' or 'M' to include support for Avance Logic ALS300/ALS300+ |
30 | 31 | ||
@@ -49,6 +50,7 @@ config SND_ALI5451 | |||
49 | tristate "ALi M5451 PCI Audio Controller" | 50 | tristate "ALi M5451 PCI Audio Controller" |
50 | select SND_MPU401_UART | 51 | select SND_MPU401_UART |
51 | select SND_AC97_CODEC | 52 | select SND_AC97_CODEC |
53 | select ZONE_DMA | ||
52 | help | 54 | help |
53 | Say Y here to include support for the integrated AC97 sound | 55 | Say Y here to include support for the integrated AC97 sound |
54 | device on motherboards using the ALi M5451 Audio Controller | 56 | device on motherboards using the ALi M5451 Audio Controller |
@@ -153,6 +155,7 @@ config SND_AZT3328 | |||
153 | select SND_PCM | 155 | select SND_PCM |
154 | select SND_RAWMIDI | 156 | select SND_RAWMIDI |
155 | select SND_AC97_CODEC | 157 | select SND_AC97_CODEC |
158 | select ZONE_DMA | ||
156 | help | 159 | help |
157 | Say Y here to include support for Aztech AZF3328 (PCI168) | 160 | Say Y here to include support for Aztech AZF3328 (PCI168) |
158 | soundcards. | 161 | soundcards. |
@@ -254,6 +257,7 @@ config SND_CS46XX | |||
254 | tristate "Cirrus Logic (Sound Fusion) CS4280/CS461x/CS462x/CS463x" | 257 | tristate "Cirrus Logic (Sound Fusion) CS4280/CS461x/CS462x/CS463x" |
255 | select SND_RAWMIDI | 258 | select SND_RAWMIDI |
256 | select SND_AC97_CODEC | 259 | select SND_AC97_CODEC |
260 | select FW_LOADER | ||
257 | help | 261 | help |
258 | Say Y here to include support for Cirrus Logic CS4610/CS4612/ | 262 | Say Y here to include support for Cirrus Logic CS4610/CS4612/ |
259 | CS4614/CS4615/CS4622/CS4624/CS4630/CS4280 chips. | 263 | CS4614/CS4615/CS4622/CS4624/CS4630/CS4280 chips. |
@@ -458,6 +462,7 @@ config SND_EMU10K1 | |||
458 | select SND_HWDEP | 462 | select SND_HWDEP |
459 | select SND_RAWMIDI | 463 | select SND_RAWMIDI |
460 | select SND_AC97_CODEC | 464 | select SND_AC97_CODEC |
465 | select ZONE_DMA | ||
461 | help | 466 | help |
462 | Say Y to include support for Sound Blaster PCI 512, Live!, | 467 | Say Y to include support for Sound Blaster PCI 512, Live!, |
463 | Audigy and E-mu APS (partially supported) soundcards. | 468 | Audigy and E-mu APS (partially supported) soundcards. |
@@ -473,6 +478,7 @@ config SND_EMU10K1X | |||
473 | tristate "Emu10k1X (Dell OEM Version)" | 478 | tristate "Emu10k1X (Dell OEM Version)" |
474 | select SND_AC97_CODEC | 479 | select SND_AC97_CODEC |
475 | select SND_RAWMIDI | 480 | select SND_RAWMIDI |
481 | select ZONE_DMA | ||
476 | help | 482 | help |
477 | Say Y here to include support for the Dell OEM version of the | 483 | Say Y here to include support for the Dell OEM version of the |
478 | Sound Blaster Live!. | 484 | Sound Blaster Live!. |
@@ -506,6 +512,7 @@ config SND_ES1938 | |||
506 | select SND_OPL3_LIB | 512 | select SND_OPL3_LIB |
507 | select SND_MPU401_UART | 513 | select SND_MPU401_UART |
508 | select SND_AC97_CODEC | 514 | select SND_AC97_CODEC |
515 | select ZONE_DMA | ||
509 | help | 516 | help |
510 | Say Y here to include support for soundcards based on ESS Solo-1 | 517 | Say Y here to include support for soundcards based on ESS Solo-1 |
511 | (ES1938, ES1946, ES1969) chips. | 518 | (ES1938, ES1946, ES1969) chips. |
@@ -517,6 +524,7 @@ config SND_ES1968 | |||
517 | tristate "ESS ES1968/1978 (Maestro-1/2/2E)" | 524 | tristate "ESS ES1968/1978 (Maestro-1/2/2E)" |
518 | select SND_MPU401_UART | 525 | select SND_MPU401_UART |
519 | select SND_AC97_CODEC | 526 | select SND_AC97_CODEC |
527 | select ZONE_DMA | ||
520 | help | 528 | help |
521 | Say Y here to include support for soundcards based on ESS Maestro | 529 | Say Y here to include support for soundcards based on ESS Maestro |
522 | 1/2/2E chips. | 530 | 1/2/2E chips. |
@@ -605,6 +613,7 @@ config SND_ICE1712 | |||
605 | select SND_MPU401_UART | 613 | select SND_MPU401_UART |
606 | select SND_AC97_CODEC | 614 | select SND_AC97_CODEC |
607 | select BITREVERSE | 615 | select BITREVERSE |
616 | select ZONE_DMA | ||
608 | help | 617 | help |
609 | Say Y here to include support for soundcards based on the | 618 | Say Y here to include support for soundcards based on the |
610 | ICE1712 (Envy24) chip. | 619 | ICE1712 (Envy24) chip. |
@@ -692,6 +701,7 @@ config SND_LX6464ES | |||
692 | config SND_MAESTRO3 | 701 | config SND_MAESTRO3 |
693 | tristate "ESS Allegro/Maestro3" | 702 | tristate "ESS Allegro/Maestro3" |
694 | select SND_AC97_CODEC | 703 | select SND_AC97_CODEC |
704 | select ZONE_DMA | ||
695 | help | 705 | help |
696 | Say Y here to include support for soundcards based on ESS Maestro 3 | 706 | Say Y here to include support for soundcards based on ESS Maestro 3 |
697 | (Allegro) chips. | 707 | (Allegro) chips. |
@@ -788,6 +798,7 @@ config SND_SIS7019 | |||
788 | tristate "SiS 7019 Audio Accelerator" | 798 | tristate "SiS 7019 Audio Accelerator" |
789 | depends on X86 && !X86_64 | 799 | depends on X86 && !X86_64 |
790 | select SND_AC97_CODEC | 800 | select SND_AC97_CODEC |
801 | select ZONE_DMA | ||
791 | help | 802 | help |
792 | Say Y here to include support for the SiS 7019 Audio Accelerator. | 803 | Say Y here to include support for the SiS 7019 Audio Accelerator. |
793 | 804 | ||
@@ -799,6 +810,7 @@ config SND_SONICVIBES | |||
799 | select SND_OPL3_LIB | 810 | select SND_OPL3_LIB |
800 | select SND_MPU401_UART | 811 | select SND_MPU401_UART |
801 | select SND_AC97_CODEC | 812 | select SND_AC97_CODEC |
813 | select ZONE_DMA | ||
802 | help | 814 | help |
803 | Say Y here to include support for soundcards based on the S3 | 815 | Say Y here to include support for soundcards based on the S3 |
804 | SonicVibes chip. | 816 | SonicVibes chip. |
@@ -810,6 +822,7 @@ config SND_TRIDENT | |||
810 | tristate "Trident 4D-Wave DX/NX; SiS 7018" | 822 | tristate "Trident 4D-Wave DX/NX; SiS 7018" |
811 | select SND_MPU401_UART | 823 | select SND_MPU401_UART |
812 | select SND_AC97_CODEC | 824 | select SND_AC97_CODEC |
825 | select ZONE_DMA | ||
813 | help | 826 | help |
814 | Say Y here to include support for soundcards based on Trident | 827 | Say Y here to include support for soundcards based on Trident |
815 | 4D-Wave DX/NX or SiS 7018 chips. | 828 | 4D-Wave DX/NX or SiS 7018 chips. |
diff --git a/sound/pci/cs46xx/cs46xx.h b/sound/pci/cs46xx/cs46xx.h index fc339ef0a0ae..c49a082c378b 100644 --- a/sound/pci/cs46xx/cs46xx.h +++ b/sound/pci/cs46xx/cs46xx.h | |||
@@ -1716,9 +1716,14 @@ struct snd_cs46xx { | |||
1716 | struct snd_pcm *pcm_rear; | 1716 | struct snd_pcm *pcm_rear; |
1717 | struct snd_pcm *pcm_center_lfe; | 1717 | struct snd_pcm *pcm_center_lfe; |
1718 | struct snd_pcm *pcm_iec958; | 1718 | struct snd_pcm *pcm_iec958; |
1719 | |||
1720 | #define CS46XX_DSP_MODULES 5 | ||
1721 | struct dsp_module_desc *modules[CS46XX_DSP_MODULES]; | ||
1719 | #else /* for compatibility */ | 1722 | #else /* for compatibility */ |
1720 | struct snd_cs46xx_pcm *playback_pcm; | 1723 | struct snd_cs46xx_pcm *playback_pcm; |
1721 | unsigned int play_ctl; | 1724 | unsigned int play_ctl; |
1725 | |||
1726 | struct ba1_struct *ba1; | ||
1722 | #endif | 1727 | #endif |
1723 | 1728 | ||
1724 | #ifdef CONFIG_PM_SLEEP | 1729 | #ifdef CONFIG_PM_SLEEP |
diff --git a/sound/pci/cs46xx/cs46xx_image.h b/sound/pci/cs46xx/cs46xx_image.h deleted file mode 100644 index dc93f62db2c2..000000000000 --- a/sound/pci/cs46xx/cs46xx_image.h +++ /dev/null | |||
@@ -1,3468 +0,0 @@ | |||
1 | struct BA1struct { | ||
2 | struct { | ||
3 | unsigned long offset; | ||
4 | unsigned long size; | ||
5 | } memory[BA1_MEMORY_COUNT]; | ||
6 | u32 map[BA1_DWORD_SIZE]; | ||
7 | }; | ||
8 | |||
9 | |||
10 | static struct BA1struct BA1Struct = { | ||
11 | {{ 0x00000000, 0x00003000 },{ 0x00010000, 0x00003800 },{ 0x00020000, 0x00007000 }}, | ||
12 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
13 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
14 | 0x00000000,0x00000000,0x00000163,0x00000000, | ||
15 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
16 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
17 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
18 | 0x00000000,0x00200040,0x00008010,0x00000000, | ||
19 | 0x00000000,0x80000001,0x00000001,0x00060000, | ||
20 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
21 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
22 | 0x00000000,0x00900080,0x00000173,0x00000000, | ||
23 | 0x00000000,0x00000010,0x00800000,0x00900000, | ||
24 | 0xf2c0000f,0x00000200,0x00000000,0x00010600, | ||
25 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
26 | 0x00000000,0x00000000,0x00000163,0x330300c2, | ||
27 | 0x06000000,0x00000000,0x80008000,0x80008000, | ||
28 | 0x3fc0000f,0x00000301,0x00010400,0x00000000, | ||
29 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
30 | 0x00000000,0x00b00000,0x00d0806d,0x330480c3, | ||
31 | 0x04800000,0x00000001,0x00800001,0x0000ffff, | ||
32 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
33 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
34 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
35 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
36 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
37 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
38 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
39 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
40 | 0x066a0600,0x06350070,0x0000929d,0x929d929d, | ||
41 | 0x00000000,0x0000735a,0x00000600,0x00000000, | ||
42 | 0x929d735a,0x8734abfe,0x00010000,0x735a735a, | ||
43 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
44 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
45 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
46 | 0x00000000,0x00000000,0x0000804f,0x000000c3, | ||
47 | 0x05000000,0x00a00010,0x00000000,0x80008000, | ||
48 | 0x00000000,0x00000000,0x00000700,0x00000000, | ||
49 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
50 | 0x00000080,0x00a00000,0x0000809a,0x000000c2, | ||
51 | 0x07400000,0x00000000,0x80008000,0xffffffff, | ||
52 | 0x00c80028,0x00005555,0x00000000,0x000107a0, | ||
53 | 0x00c80028,0x000000c2,0x06800000,0x00000000, | ||
54 | 0x06e00080,0x00300000,0x000080bb,0x000000c9, | ||
55 | 0x07a00000,0x04000000,0x80008000,0xffffffff, | ||
56 | 0x00c80028,0x00005555,0x00000000,0x00000780, | ||
57 | 0x00c80028,0x000000c5,0xff800000,0x00000000, | ||
58 | 0x00640080,0x00c00000,0x00008197,0x000000c9, | ||
59 | 0x07800000,0x04000000,0x80008000,0xffffffff, | ||
60 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
61 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
62 | 0x00000000,0x00000000,0x0000805e,0x000000c1, | ||
63 | 0x00000000,0x00800000,0x80008000,0x80008000, | ||
64 | 0x00020000,0x0000ffff,0x00000000,0x00000000, | ||
65 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
66 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
67 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
68 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
69 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
70 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
71 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
72 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
73 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
74 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
75 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
76 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
77 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
78 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
79 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
80 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
81 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
82 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
83 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
84 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
85 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
86 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
87 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
88 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
89 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
90 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
91 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
92 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
93 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
94 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
95 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
96 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
97 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
98 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
99 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
100 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
101 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
102 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
103 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
104 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
105 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
106 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
107 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
108 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
109 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
110 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
111 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
112 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
113 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
114 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
115 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
116 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
117 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
118 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
119 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
120 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
121 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
122 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
123 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
124 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
125 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
126 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
127 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
128 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
129 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
130 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
131 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
132 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
133 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
134 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
135 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
136 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
137 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
138 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
139 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
140 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
141 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
142 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
143 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
144 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
145 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
146 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
147 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
148 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
149 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
150 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
151 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
152 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
153 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
154 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
155 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
156 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
157 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
158 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
159 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
160 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
161 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
162 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
163 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
164 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
165 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
166 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
167 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
168 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
169 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
170 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
171 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
172 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
173 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
174 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
175 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
176 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
177 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
178 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
179 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
180 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
181 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
182 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
183 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
184 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
185 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
186 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
187 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
188 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
189 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
190 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
191 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
192 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
193 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
194 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
195 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
196 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
197 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
198 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
199 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
200 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
201 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
202 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
203 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
204 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
205 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
206 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
207 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
208 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
209 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
210 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
211 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
212 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
213 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
214 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
215 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
216 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
217 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
218 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
219 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
220 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
221 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
222 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
223 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
224 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
225 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
226 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
227 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
228 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
229 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
230 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
231 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
232 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
233 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
234 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
235 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
236 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
237 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
238 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
239 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
240 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
241 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
242 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
243 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
244 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
245 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
246 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
247 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
248 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
249 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
250 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
251 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
252 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
253 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
254 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
255 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
256 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
257 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
258 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
259 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
260 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
261 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
262 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
263 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
264 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
265 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
266 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
267 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
268 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
269 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
270 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
271 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
272 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
273 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
274 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
275 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
276 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
277 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
278 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
279 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
280 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
281 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
282 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
283 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
284 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
285 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
286 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
287 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
288 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
289 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
290 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
291 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
292 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
293 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
294 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
295 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
296 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
297 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
298 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
299 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
300 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
301 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
302 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
303 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
304 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
305 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
306 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
307 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
308 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
309 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
310 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
311 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
312 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
313 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
314 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
315 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
316 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
317 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
318 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
319 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
320 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
321 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
322 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
323 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
324 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
325 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
326 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
327 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
328 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
329 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
330 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
331 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
332 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
333 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
334 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
335 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
336 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
337 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
338 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
339 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
340 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
341 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
342 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
343 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
344 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
345 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
346 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
347 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
348 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
349 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
350 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
351 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
352 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
353 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
354 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
355 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
356 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
357 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
358 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
359 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
360 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
361 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
362 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
363 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
364 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
365 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
366 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
367 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
368 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
369 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
370 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
371 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
372 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
373 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
374 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
375 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
376 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
377 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
378 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
379 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
380 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
381 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
382 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
383 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
384 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
385 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
386 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
387 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
388 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
389 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
390 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
391 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
392 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
393 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
394 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
395 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
396 | 0x929d0600,0x929d929d,0x929d929d,0x929d0000, | ||
397 | 0x929d929d,0x929d929d,0x929d929d,0x929d929d, | ||
398 | 0x929d929d,0x00100635,0x060b013f,0x00000004, | ||
399 | 0x00000001,0x007a0002,0x00000000,0x066e0610, | ||
400 | 0x0105929d,0x929d929d,0x929d929d,0x929d929d, | ||
401 | 0x929d929d,0xa431ac75,0x0001735a,0xa431ac75, | ||
402 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
403 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
404 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
405 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
406 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
407 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
408 | 0xa431ac75,0xa431ac75,0xa431ac75,0x735a0051, | ||
409 | 0x00000000,0x929d929d,0x929d929d,0x929d929d, | ||
410 | 0x929d929d,0x929d929d,0x929d929d,0x929d929d, | ||
411 | 0x929d929d,0x929d929d,0x00000000,0x06400136, | ||
412 | 0x0000270f,0x00010000,0x007a0000,0x00000000, | ||
413 | 0x068e0645,0x0105929d,0x929d929d,0x929d929d, | ||
414 | 0x929d929d,0x929d929d,0xa431ac75,0x0001735a, | ||
415 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
416 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
417 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
418 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
419 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
420 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
421 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
422 | 0x735a0100,0x00000000,0x00000000,0x00000000, | ||
423 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
424 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
425 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
426 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
427 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
428 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
429 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
430 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
431 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
432 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
433 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
434 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
435 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
436 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
437 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
438 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
439 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
440 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
441 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
442 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
443 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
444 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
445 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
446 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
447 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
448 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
449 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
450 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
451 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
452 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
453 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
454 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
455 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
456 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
457 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
458 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
459 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
460 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
461 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
462 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
463 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
464 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
465 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
466 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
467 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
468 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
469 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
470 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
471 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
472 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
473 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
474 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
475 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
476 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
477 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
478 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
479 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
480 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
481 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
482 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
483 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
484 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
485 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
486 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
487 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
488 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
489 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
490 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
491 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
492 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
493 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
494 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
495 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
496 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
497 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
498 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
499 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
500 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
501 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
502 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
503 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
504 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
505 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
506 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
507 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
508 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
509 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
510 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
511 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
512 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
513 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
514 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
515 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
516 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
517 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
518 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
519 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
520 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
521 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
522 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
523 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
524 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
525 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
526 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
527 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
528 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
529 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
530 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
531 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
532 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
533 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
534 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
535 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
536 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
537 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
538 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
539 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
540 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
541 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
542 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
543 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
544 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
545 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
546 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
547 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
548 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
549 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
550 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
551 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
552 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
553 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
554 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
555 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
556 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
557 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
558 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
559 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
560 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
561 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
562 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
563 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
564 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
565 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
566 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
567 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
568 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
569 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
570 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
571 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
572 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
573 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
574 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
575 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
576 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
577 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
578 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
579 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
580 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
581 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
582 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
583 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
584 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
585 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
586 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
587 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
588 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
589 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
590 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
591 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
592 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
593 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
594 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
595 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
596 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
597 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
598 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
599 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
600 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
601 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
602 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
603 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
604 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
605 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
606 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
607 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
608 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
609 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
610 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
611 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
612 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
613 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
614 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
615 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
616 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
617 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
618 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
619 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
620 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
621 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
622 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
623 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
624 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
625 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
626 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
627 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
628 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
629 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
630 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
631 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
632 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
633 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
634 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
635 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
636 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
637 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
638 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
639 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
640 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
641 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
642 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
643 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
644 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
645 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
646 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
647 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
648 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
649 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
650 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
651 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
652 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
653 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
654 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
655 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
656 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
657 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
658 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
659 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
660 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
661 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
662 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
663 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
664 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
665 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
666 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
667 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
668 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
669 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
670 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
671 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
672 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
673 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
674 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
675 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
676 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
677 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
678 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
679 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
680 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
681 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
682 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
683 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
684 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
685 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
686 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
687 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
688 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
689 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
690 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
691 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
692 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
693 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
694 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
695 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
696 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
697 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
698 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
699 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
700 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
701 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
702 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
703 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
704 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
705 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
706 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
707 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
708 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
709 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
710 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
711 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
712 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
713 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
714 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
715 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
716 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
717 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
718 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
719 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
720 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
721 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
722 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
723 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
724 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
725 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
726 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
727 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
728 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
729 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
730 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
731 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
732 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
733 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
734 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
735 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
736 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
737 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
738 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
739 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
740 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
741 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
742 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
743 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
744 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
745 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
746 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
747 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
748 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
749 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
750 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
751 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
752 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
753 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
754 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
755 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
756 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
757 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
758 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
759 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
760 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
761 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
762 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
763 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
764 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
765 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
766 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
767 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
768 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
769 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
770 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
771 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
772 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
773 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
774 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
775 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
776 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
777 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
778 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
779 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
780 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
781 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
782 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
783 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
784 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
785 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
786 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
787 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
788 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
789 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
790 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
791 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
792 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
793 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
794 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
795 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
796 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
797 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
798 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
799 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
800 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
801 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
802 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
803 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
804 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
805 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
806 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
807 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
808 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
809 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
810 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
811 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
812 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
813 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
814 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
815 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
816 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
817 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
818 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
819 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
820 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
821 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
822 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
823 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
824 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
825 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
826 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
827 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
828 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
829 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
830 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
831 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
832 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
833 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
834 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
835 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
836 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
837 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
838 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
839 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
840 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
841 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
842 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
843 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
844 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
845 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
846 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
847 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
848 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
849 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
850 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
851 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
852 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
853 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
854 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
855 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
856 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
857 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
858 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
859 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
860 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
861 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
862 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
863 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
864 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
865 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
866 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
867 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
868 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
869 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
870 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
871 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
872 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
873 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
874 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
875 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
876 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
877 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
878 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
879 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
880 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
881 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
882 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
883 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
884 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
885 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
886 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
887 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
888 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
889 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
890 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
891 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
892 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
893 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
894 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
895 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
896 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
897 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
898 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
899 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
900 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
901 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
902 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
903 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
904 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
905 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
906 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
907 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
908 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
909 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
910 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
911 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
912 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
913 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
914 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
915 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
916 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
917 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
918 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
919 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
920 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
921 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
922 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
923 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
924 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
925 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
926 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
927 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
928 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
929 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
930 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
931 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
932 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
933 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
934 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
935 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
936 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
937 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
938 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
939 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
940 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
941 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
942 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
943 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
944 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
945 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
946 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
947 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
948 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
949 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
950 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
951 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
952 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
953 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
954 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
955 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
956 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
957 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
958 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
959 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
960 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
961 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
962 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
963 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
964 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
965 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
966 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
967 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
968 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
969 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
970 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
971 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
972 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
973 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
974 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
975 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
976 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
977 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
978 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
979 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
980 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
981 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
982 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
983 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
984 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
985 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
986 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
987 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
988 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
989 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
990 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
991 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
992 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
993 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
994 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
995 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
996 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
997 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
998 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
999 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1000 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1001 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1002 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1003 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1004 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1005 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1006 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1007 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1008 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1009 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1010 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1011 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1012 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1013 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1014 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1015 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1016 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1017 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1018 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1019 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1020 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1021 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1022 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1023 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1024 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1025 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1026 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1027 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1028 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1029 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1030 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1031 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1032 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1033 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1034 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1035 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1036 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1037 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1038 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1039 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1040 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1041 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1042 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1043 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1044 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1045 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1046 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1047 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1048 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1049 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1050 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1051 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1052 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1053 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1054 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1055 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1056 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1057 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1058 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1059 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1060 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1061 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1062 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1063 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1064 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1065 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1066 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1067 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1068 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1069 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1070 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1071 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1072 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1073 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1074 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1075 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1076 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1077 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1078 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1079 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1080 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1081 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1082 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1083 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1084 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1085 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1086 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1087 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1088 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1089 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1090 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1091 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1092 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1093 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1094 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1095 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1096 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1097 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1098 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1099 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1100 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1101 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1102 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1103 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1104 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1105 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1106 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1107 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1108 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1109 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1110 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1111 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1112 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1113 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1114 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1115 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1116 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1117 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1118 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1119 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1120 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1121 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1122 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1123 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1124 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1125 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1126 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1127 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1128 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1129 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1130 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1131 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1132 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1133 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1134 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1135 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1136 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1137 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1138 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1139 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1140 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1141 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1142 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1143 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1144 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1145 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1146 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1147 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1148 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1149 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1150 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1151 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1152 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1153 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1154 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1155 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1156 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1157 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1158 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1159 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1160 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1161 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1162 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1163 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1164 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1165 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1166 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1167 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1168 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1169 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1170 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1171 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1172 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1173 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1174 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1175 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1176 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1177 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1178 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1179 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1180 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1181 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1182 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1183 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1184 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1185 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1186 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1187 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1188 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1189 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1190 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1191 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1192 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1193 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1194 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1195 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1196 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1197 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1198 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1199 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1200 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1201 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1202 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1203 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1204 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1205 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1206 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1207 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1208 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1209 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1210 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1211 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1212 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1213 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1214 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1215 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1216 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1217 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1218 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1219 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1220 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1221 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1222 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1223 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1224 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1225 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1226 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1227 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1228 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1229 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1230 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1231 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1232 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1233 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1234 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1235 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1236 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1237 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1238 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1239 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1240 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1241 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1242 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1243 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1244 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1245 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1246 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1247 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1248 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1249 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1250 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1251 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1252 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1253 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1254 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1255 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1256 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1257 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1258 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1259 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1260 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1261 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1262 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1263 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1264 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1265 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1266 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1267 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1268 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1269 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1270 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1271 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1272 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1273 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1274 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1275 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1276 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1277 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1278 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1279 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1280 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1281 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1282 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1283 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1284 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1285 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1286 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1287 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1288 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1289 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1290 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1291 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1292 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1293 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1294 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1295 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1296 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1297 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1298 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1299 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1300 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1301 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1302 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1303 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1304 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1305 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1306 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1307 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1308 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1309 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1310 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1311 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1312 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1313 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1314 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1315 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1316 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1317 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1318 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1319 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1320 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1321 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1322 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1323 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1324 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1325 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1326 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1327 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1328 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1329 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1330 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1331 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1332 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1333 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1334 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1335 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1336 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1337 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1338 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1339 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1340 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1341 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1342 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1343 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1344 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1345 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1346 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1347 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1348 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1349 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1350 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1351 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1352 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1353 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1354 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1355 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1356 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1357 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1358 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1359 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1360 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1361 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1362 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1363 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1364 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1365 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1366 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1367 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1368 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1369 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1370 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1371 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1372 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1373 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1374 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1375 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1376 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1377 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1378 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1379 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1380 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1381 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1382 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1383 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1384 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1385 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1386 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1387 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1388 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1389 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1390 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1391 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1392 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1393 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1394 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1395 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1396 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1397 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1398 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1399 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1400 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1401 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1402 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1403 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1404 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1405 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1406 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1407 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1408 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1409 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1410 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1411 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1412 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1413 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1414 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1415 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1416 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1417 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1418 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1419 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1420 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1421 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1422 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1423 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1424 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1425 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1426 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1427 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1428 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1429 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1430 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1431 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1432 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1433 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1434 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1435 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1436 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1437 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1438 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1439 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1440 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1441 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1442 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1443 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1444 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1445 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1446 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1447 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1448 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1449 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1450 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1451 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1452 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1453 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1454 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1455 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1456 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1457 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1458 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1459 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1460 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1461 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1462 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1463 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1464 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1465 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1466 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1467 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1468 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1469 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1470 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1471 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1472 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1473 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1474 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1475 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1476 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1477 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1478 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1479 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1480 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1481 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1482 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1483 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1484 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1485 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1486 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1487 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1488 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1489 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1490 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1491 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1492 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1493 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1494 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1495 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1496 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1497 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1498 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1499 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1500 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1501 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1502 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1503 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1504 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1505 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1506 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1507 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1508 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1509 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1510 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1511 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1512 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1513 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1514 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1515 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1516 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1517 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1518 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1519 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1520 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1521 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1522 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1523 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1524 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1525 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1526 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1527 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1528 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1529 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1530 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1531 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1532 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1533 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1534 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1535 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1536 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1537 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1538 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1539 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1540 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1541 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1542 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1543 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1544 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1545 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1546 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1547 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1548 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1549 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1550 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1551 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1552 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1553 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1554 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1555 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1556 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1557 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1558 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1559 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1560 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1561 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1562 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1563 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1564 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1565 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1566 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1567 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1568 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1569 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1570 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1571 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1572 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1573 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1574 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1575 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1576 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1577 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1578 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1579 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1580 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1581 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1582 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1583 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1584 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1585 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1586 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1587 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1588 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1589 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1590 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1591 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1592 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1593 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1594 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1595 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1596 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1597 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1598 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1599 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1600 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1601 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1602 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1603 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1604 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1605 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1606 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1607 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1608 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1609 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1610 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1611 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1612 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1613 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1614 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1615 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1616 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1617 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1618 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1619 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1620 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1621 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1622 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1623 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1624 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1625 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1626 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1627 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1628 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1629 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1630 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1631 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1632 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1633 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1634 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1635 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1636 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1637 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1638 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1639 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1640 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1641 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1642 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1643 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1644 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1645 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1646 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1647 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1648 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1649 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1650 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1651 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1652 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1653 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1654 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1655 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1656 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1657 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1658 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1659 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1660 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1661 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1662 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1663 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1664 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1665 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1666 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1667 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1668 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1669 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1670 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1671 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1672 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1673 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1674 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1675 | 0x00000000,0x00000000,0x00000000,0x00010004, | ||
1676 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1677 | 0x00001705,0x00001400,0x000a411e,0x00001003, | ||
1678 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1679 | 0x00009705,0x00001400,0x000a411e,0x00001003, | ||
1680 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1681 | 0x00011705,0x00001400,0x000a411e,0x00001003, | ||
1682 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1683 | 0x00019705,0x00001400,0x000a411e,0x00001003, | ||
1684 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1685 | 0x00021705,0x00001400,0x000a411e,0x00001003, | ||
1686 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1687 | 0x00029705,0x00001400,0x000a411e,0x00001003, | ||
1688 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1689 | 0x00031705,0x00001400,0x000a411e,0x00001003, | ||
1690 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1691 | 0x00039705,0x00001400,0x000a411e,0x00001003, | ||
1692 | 0x000fe19e,0x00001003,0x0009c730,0x00001003, | ||
1693 | 0x0008e19c,0x00001003,0x000083c1,0x00093040, | ||
1694 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1695 | 0x00009705,0x00001400,0x000a211e,0x00001003, | ||
1696 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1697 | 0x00011705,0x00001400,0x000a211e,0x00001003, | ||
1698 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1699 | 0x00019705,0x00001400,0x000a211e,0x00001003, | ||
1700 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1701 | 0x00021705,0x00001400,0x000a211e,0x00001003, | ||
1702 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1703 | 0x00029705,0x00001400,0x000a211e,0x00001003, | ||
1704 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1705 | 0x00031705,0x00001400,0x000a211e,0x00001003, | ||
1706 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1707 | 0x00039705,0x00001400,0x000a211e,0x00001003, | ||
1708 | 0x0000a730,0x00001008,0x000e2730,0x00001002, | ||
1709 | 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
1710 | 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
1711 | 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
1712 | 0x00000000,0x00000000,0x000f619c,0x00001003, | ||
1713 | 0x0007f801,0x000c0000,0x00000037,0x00001000, | ||
1714 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1715 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1716 | 0x00000000,0x000c0000,0x00000000,0x00000000, | ||
1717 | 0x0000373c,0x00001000,0x00000000,0x00000000, | ||
1718 | 0x000ee19c,0x00001003,0x0007f801,0x000c0000, | ||
1719 | 0x00000037,0x00001000,0x00000000,0x00000000, | ||
1720 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1721 | 0x00000000,0x00000000,0x0000273c,0x00001000, | ||
1722 | 0x00000033,0x00001000,0x000e679e,0x00001003, | ||
1723 | 0x00007705,0x00001400,0x000ac71e,0x00001003, | ||
1724 | 0x00087fc1,0x000c3be0,0x0007f801,0x000c0000, | ||
1725 | 0x00000037,0x00001000,0x00000000,0x00000000, | ||
1726 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1727 | 0x00000000,0x00000000,0x0000a730,0x00001003, | ||
1728 | 0x00000033,0x00001000,0x0007f801,0x000c0000, | ||
1729 | 0x00000037,0x00001000,0x00000000,0x00000000, | ||
1730 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1731 | 0x00000000,0x00000000,0x00000000,0x000c0000, | ||
1732 | 0x00000032,0x00001000,0x0000273d,0x00001000, | ||
1733 | 0x0004a730,0x00001003,0x00000f41,0x00097140, | ||
1734 | 0x0000a841,0x0009b240,0x0000a0c1,0x0009f040, | ||
1735 | 0x0001c641,0x00093540,0x0001cec1,0x0009b5c0, | ||
1736 | 0x00000000,0x00000000,0x0001bf05,0x0003fc40, | ||
1737 | 0x00002725,0x000aa400,0x00013705,0x00093a00, | ||
1738 | 0x0000002e,0x0009d6c0,0x00038630,0x00001004, | ||
1739 | 0x0004ef0a,0x000eb785,0x0003fc8a,0x00000000, | ||
1740 | 0x00000000,0x000c70e0,0x0007d182,0x0002c640, | ||
1741 | 0x00000630,0x00001004,0x000799b8,0x0002c6c0, | ||
1742 | 0x00031705,0x00092240,0x00039f05,0x000932c0, | ||
1743 | 0x0003520a,0x00000000,0x00040731,0x0000100b, | ||
1744 | 0x00010705,0x000b20c0,0x00000000,0x000eba44, | ||
1745 | 0x00032108,0x000c60c4,0x00065208,0x000c2917, | ||
1746 | 0x000406b0,0x00001007,0x00012f05,0x00036880, | ||
1747 | 0x0002818e,0x000c0000,0x0004410a,0x00000000, | ||
1748 | 0x00040630,0x00001007,0x00029705,0x000c0000, | ||
1749 | 0x00000000,0x00000000,0x00003fc1,0x0003fc40, | ||
1750 | 0x000037c1,0x00091b40,0x00003fc1,0x000911c0, | ||
1751 | 0x000037c1,0x000957c0,0x00003fc1,0x000951c0, | ||
1752 | 0x000037c1,0x00000000,0x00003fc1,0x000991c0, | ||
1753 | 0x000037c1,0x00000000,0x00003fc1,0x0009d1c0, | ||
1754 | 0x000037c1,0x00000000,0x0001ccc1,0x000915c0, | ||
1755 | 0x0001c441,0x0009d800,0x0009cdc1,0x00091240, | ||
1756 | 0x0001c541,0x00091d00,0x0009cfc1,0x00095240, | ||
1757 | 0x0001c741,0x00095c80,0x000e8ca9,0x00099240, | ||
1758 | 0x000e85ad,0x00095640,0x00069ca9,0x00099d80, | ||
1759 | 0x000e952d,0x00099640,0x000eaca9,0x0009d6c0, | ||
1760 | 0x000ea5ad,0x00091a40,0x0006bca9,0x0009de80, | ||
1761 | 0x000eb52d,0x00095a40,0x000ecca9,0x00099ac0, | ||
1762 | 0x000ec5ad,0x0009da40,0x000edca9,0x0009d300, | ||
1763 | 0x000a6e0a,0x00001000,0x000ed52d,0x00091e40, | ||
1764 | 0x000eeca9,0x00095ec0,0x000ee5ad,0x00099e40, | ||
1765 | 0x0006fca9,0x00002500,0x000fb208,0x000c59a0, | ||
1766 | 0x000ef52d,0x0009de40,0x00068ca9,0x000912c1, | ||
1767 | 0x000683ad,0x00095241,0x00020f05,0x000991c1, | ||
1768 | 0x00000000,0x00000000,0x00086f88,0x00001000, | ||
1769 | 0x0009cf81,0x000b5340,0x0009c701,0x000b92c0, | ||
1770 | 0x0009de81,0x000bd300,0x0009d601,0x000b1700, | ||
1771 | 0x0001fd81,0x000b9d80,0x0009f501,0x000b57c0, | ||
1772 | 0x000a0f81,0x000bd740,0x00020701,0x000b5c80, | ||
1773 | 0x000a1681,0x000b97c0,0x00021601,0x00002500, | ||
1774 | 0x000a0701,0x000b9b40,0x000a0f81,0x000b1bc0, | ||
1775 | 0x00021681,0x00002d00,0x00020f81,0x000bd800, | ||
1776 | 0x000a0701,0x000b5bc0,0x00021601,0x00003500, | ||
1777 | 0x000a0f81,0x000b5f40,0x000a0701,0x000bdbc0, | ||
1778 | 0x00021681,0x00003d00,0x00020f81,0x000b1d00, | ||
1779 | 0x000a0701,0x000b1fc0,0x00021601,0x00020500, | ||
1780 | 0x00020f81,0x000b1341,0x000a0701,0x000b9fc0, | ||
1781 | 0x00021681,0x00020d00,0x00020f81,0x000bde80, | ||
1782 | 0x000a0701,0x000bdfc0,0x00021601,0x00021500, | ||
1783 | 0x00020f81,0x000b9341,0x00020701,0x000b53c1, | ||
1784 | 0x00021681,0x00021d00,0x000a0f81,0x000d0380, | ||
1785 | 0x0000b601,0x000b15c0,0x00007b01,0x00000000, | ||
1786 | 0x00007b81,0x000bd1c0,0x00007b01,0x00000000, | ||
1787 | 0x00007b81,0x000b91c0,0x00007b01,0x000b57c0, | ||
1788 | 0x00007b81,0x000b51c0,0x00007b01,0x000b1b40, | ||
1789 | 0x00007b81,0x000b11c0,0x00087b01,0x000c3dc0, | ||
1790 | 0x0007e488,0x000d7e45,0x00000000,0x000d7a44, | ||
1791 | 0x0007e48a,0x00000000,0x00011f05,0x00084080, | ||
1792 | 0x00000000,0x00000000,0x00001705,0x000b3540, | ||
1793 | 0x00008a01,0x000bf040,0x00007081,0x000bb5c0, | ||
1794 | 0x00055488,0x00000000,0x0000d482,0x0003fc40, | ||
1795 | 0x0003fc88,0x00000000,0x0001e401,0x000b3a00, | ||
1796 | 0x0001ec81,0x000bd6c0,0x0004ef08,0x000eb784, | ||
1797 | 0x000c86b0,0x00001007,0x00008281,0x000bb240, | ||
1798 | 0x0000b801,0x000b7140,0x00007888,0x00000000, | ||
1799 | 0x0000073c,0x00001000,0x0007f188,0x000c0000, | ||
1800 | 0x00000000,0x00000000,0x00055288,0x000c555c, | ||
1801 | 0x0005528a,0x000c0000,0x0009fa88,0x000c5d00, | ||
1802 | 0x0000fa88,0x00000000,0x00000032,0x00001000, | ||
1803 | 0x0000073d,0x00001000,0x0007f188,0x000c0000, | ||
1804 | 0x00000000,0x00000000,0x0008c01c,0x00001003, | ||
1805 | 0x00002705,0x00001008,0x0008b201,0x000c1392, | ||
1806 | 0x0000ba01,0x00000000,0x00008731,0x00001400, | ||
1807 | 0x0004c108,0x000fe0c4,0x00057488,0x00000000, | ||
1808 | 0x000a6388,0x00001001,0x0008b334,0x000bc141, | ||
1809 | 0x0003020e,0x00000000,0x000886b0,0x00001008, | ||
1810 | 0x00003625,0x000c5dfa,0x000a638a,0x00001001, | ||
1811 | 0x0008020e,0x00001002,0x0008a6b0,0x00001008, | ||
1812 | 0x0007f301,0x00000000,0x00000000,0x00000000, | ||
1813 | 0x00002725,0x000a8c40,0x000000ae,0x00000000, | ||
1814 | 0x000d8630,0x00001008,0x00000000,0x000c74e0, | ||
1815 | 0x0007d182,0x0002d640,0x000a8630,0x00001008, | ||
1816 | 0x000799b8,0x0002d6c0,0x0000748a,0x000c3ec5, | ||
1817 | 0x0007420a,0x000c0000,0x00062208,0x000c4117, | ||
1818 | 0x00070630,0x00001009,0x00000000,0x000c0000, | ||
1819 | 0x0001022e,0x00000000,0x0003a630,0x00001009, | ||
1820 | 0x00000000,0x000c0000,0x00000036,0x00001000, | ||
1821 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1822 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1823 | 0x0002a730,0x00001008,0x0007f801,0x000c0000, | ||
1824 | 0x00000037,0x00001000,0x00000000,0x00000000, | ||
1825 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1826 | 0x00000000,0x00000000,0x0002a730,0x00001008, | ||
1827 | 0x00000033,0x00001000,0x0002a705,0x00001008, | ||
1828 | 0x00007a01,0x000c0000,0x000e6288,0x000d550a, | ||
1829 | 0x0006428a,0x00000000,0x00060730,0x0000100a, | ||
1830 | 0x00000000,0x000c0000,0x00000000,0x00000000, | ||
1831 | 0x0007aab0,0x00034880,0x00078fb0,0x0000100b, | ||
1832 | 0x00057488,0x00000000,0x00033b94,0x00081140, | ||
1833 | 0x000183ae,0x00000000,0x000786b0,0x0000100b, | ||
1834 | 0x00022f05,0x000c3545,0x0000eb8a,0x00000000, | ||
1835 | 0x00042731,0x00001003,0x0007aab0,0x00034880, | ||
1836 | 0x00048fb0,0x0000100a,0x00057488,0x00000000, | ||
1837 | 0x00033b94,0x00081140,0x000183ae,0x00000000, | ||
1838 | 0x000806b0,0x0000100b,0x00022f05,0x00000000, | ||
1839 | 0x00007401,0x00091140,0x00048f05,0x000951c0, | ||
1840 | 0x00042731,0x00001003,0x0000473d,0x00001000, | ||
1841 | 0x000f19b0,0x000bbc47,0x00080000,0x000bffc7, | ||
1842 | 0x000fe19e,0x00001003,0x00000000,0x00000000, | ||
1843 | 0x0008e19c,0x00001003,0x000083c1,0x00093040, | ||
1844 | 0x00000f41,0x00097140,0x0000a841,0x0009b240, | ||
1845 | 0x0000a0c1,0x0009f040,0x0001c641,0x00093540, | ||
1846 | 0x0001cec1,0x0009b5c0,0x00000000,0x000fdc44, | ||
1847 | 0x00055208,0x00000000,0x00010705,0x000a2880, | ||
1848 | 0x0000a23a,0x00093a00,0x0003fc8a,0x000df6c5, | ||
1849 | 0x0004ef0a,0x000c0000,0x00012f05,0x00036880, | ||
1850 | 0x00065308,0x000c2997,0x000d86b0,0x0000100a, | ||
1851 | 0x0004410a,0x000d40c7,0x00000000,0x00000000, | ||
1852 | 0x00080730,0x00001004,0x00056f0a,0x000ea105, | ||
1853 | 0x00000000,0x00000000,0x0000473d,0x00001000, | ||
1854 | 0x000f19b0,0x000bbc47,0x00080000,0x000bffc7, | ||
1855 | 0x0000273d,0x00001000,0x00000000,0x000eba44, | ||
1856 | 0x00048f05,0x0000f440,0x00007401,0x0000f7c0, | ||
1857 | 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
1858 | 0x00006a88,0x000c75c4,0x00000000,0x000e5084, | ||
1859 | 0x00000000,0x000eba44,0x00087401,0x000e4782, | ||
1860 | 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
1861 | 0x00006a88,0x000c75c4,0x0007c108,0x000c0000, | ||
1862 | 0x0007e721,0x000bed40,0x00005f25,0x000badc0, | ||
1863 | 0x0003ba97,0x000beb80,0x00065590,0x000b2e00, | ||
1864 | 0x00033217,0x00003ec0,0x00065590,0x000b8e40, | ||
1865 | 0x0003ed80,0x000491c0,0x00073fb0,0x00074c80, | ||
1866 | 0x000283a0,0x0000100c,0x000ee388,0x00042970, | ||
1867 | 0x00008301,0x00021ef2,0x000b8f14,0x0000000f, | ||
1868 | 0x000c4d8d,0x0000001b,0x000d6dc2,0x000e06c6, | ||
1869 | 0x000032ac,0x000c3916,0x0004edc2,0x00074c80, | ||
1870 | 0x00078898,0x00001000,0x00038894,0x00000032, | ||
1871 | 0x000c4d8d,0x00092e1b,0x000d6dc2,0x000e06c6, | ||
1872 | 0x0004edc2,0x000c1956,0x0000722c,0x00034a00, | ||
1873 | 0x00041705,0x0009ed40,0x00058730,0x00001400, | ||
1874 | 0x000d7488,0x000c3a00,0x00048f05,0x00000000, | ||
1875 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1876 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1877 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1878 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1879 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1880 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1881 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1882 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1883 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1884 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1885 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1886 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1887 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1888 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1889 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1890 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1891 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1892 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1893 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1894 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1895 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1896 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1897 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1898 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1899 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1900 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1901 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1902 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1903 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1904 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1905 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1906 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1907 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1908 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1909 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1910 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1911 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1912 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1913 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1914 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1915 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1916 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1917 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1918 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1919 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1920 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1921 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1922 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1923 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1924 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1925 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1926 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1927 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1928 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1929 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1930 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1931 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1932 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1933 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1934 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1935 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1936 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1937 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1938 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1939 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1940 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1941 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1942 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1943 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1944 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1945 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1946 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1947 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1948 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1949 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1950 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1951 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1952 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1953 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1954 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1955 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1956 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1957 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1958 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1959 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1960 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1961 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1962 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1963 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1964 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1965 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1966 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1967 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1968 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1969 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1970 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1971 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1972 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1973 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1974 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1975 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1976 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1977 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1978 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1979 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1980 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1981 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1982 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1983 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1984 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1985 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1986 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1987 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1988 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1989 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1990 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1991 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1992 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1993 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1994 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1995 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1996 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1997 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1998 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1999 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2000 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2001 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2002 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2003 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2004 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2005 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2006 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2007 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2008 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2009 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2010 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2011 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2012 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2013 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2014 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2015 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2016 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2017 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2018 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2019 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2020 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2021 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2022 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2023 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2024 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2025 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2026 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2027 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2028 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2029 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2030 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2031 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2032 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2033 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2034 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2035 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2036 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2037 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2038 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2039 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2040 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2041 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2042 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2043 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2044 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2045 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2046 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2047 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2048 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2049 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2050 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2051 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2052 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2053 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2054 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2055 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2056 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2057 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2058 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2059 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2060 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2061 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2062 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2063 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2064 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2065 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2066 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2067 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2068 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2069 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2070 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2071 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2072 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2073 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2074 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2075 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2076 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2077 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2078 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2079 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2080 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2081 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2082 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2083 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2084 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2085 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2086 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2087 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2088 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2089 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2090 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2091 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2092 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2093 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2094 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2095 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2096 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2097 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2098 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2099 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2100 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2101 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2102 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2103 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2104 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2105 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2106 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2107 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2108 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2109 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2110 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2111 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2112 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2113 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2114 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2115 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2116 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2117 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2118 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2119 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2120 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2121 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2122 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2123 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2124 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2125 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2126 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2127 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2128 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2129 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2130 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2131 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2132 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2133 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2134 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2135 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2136 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2137 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2138 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2139 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2140 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2141 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2142 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2143 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2144 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2145 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2146 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2147 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2148 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2149 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2150 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2151 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2152 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2153 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2154 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2155 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2156 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2157 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2158 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2159 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2160 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2161 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2162 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2163 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2164 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2165 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2166 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2167 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2168 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2169 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2170 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2171 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2172 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2173 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2174 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2175 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2176 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2177 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2178 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2179 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2180 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2181 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2182 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2183 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2184 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2185 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2186 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2187 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2188 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2189 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2190 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2191 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2192 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2193 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2194 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2195 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2196 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2197 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2198 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2199 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2200 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2201 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2202 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2203 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2204 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2205 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2206 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2207 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2208 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2209 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2210 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2211 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2212 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2213 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2214 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2215 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2216 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2217 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2218 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2219 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2220 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2221 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2222 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2223 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2224 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2225 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2226 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2227 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2228 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2229 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2230 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2231 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2232 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2233 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2234 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2235 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2236 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2237 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2238 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2239 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2240 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2241 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2242 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2243 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2244 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2245 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2246 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2247 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2248 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2249 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2250 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2251 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2252 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2253 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2254 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2255 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2256 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2257 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2258 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2259 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2260 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2261 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2262 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2263 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2264 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2265 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2266 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2267 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2268 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2269 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2270 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2271 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2272 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2273 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2274 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2275 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2276 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2277 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2278 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2279 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2280 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2281 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2282 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2283 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2284 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2285 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2286 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2287 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2288 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2289 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2290 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2291 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2292 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2293 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2294 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2295 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2296 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2297 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2298 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2299 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2300 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2301 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2302 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2303 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2304 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2305 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2306 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2307 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2308 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2309 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2310 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2311 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2312 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2313 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2314 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2315 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2316 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2317 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2318 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2319 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2320 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2321 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2322 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2323 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2324 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2325 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2326 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2327 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2328 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2329 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2330 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2331 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2332 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2333 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2334 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2335 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2336 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2337 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2338 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2339 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2340 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2341 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2342 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2343 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2344 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2345 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2346 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2347 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2348 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2349 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2350 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2351 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2352 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2353 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2354 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2355 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2356 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2357 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2358 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2359 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2360 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2361 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2362 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2363 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2364 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2365 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2366 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2367 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2368 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2369 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2370 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2371 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2372 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2373 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2374 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2375 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2376 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2377 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2378 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2379 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2380 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2381 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2382 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2383 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2384 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2385 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2386 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2387 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2388 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2389 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2390 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2391 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2392 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2393 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2394 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2395 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2396 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2397 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2398 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2399 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2400 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2401 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2402 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2403 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2404 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2405 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2406 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2407 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2408 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2409 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2410 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2411 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2412 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2413 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2414 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2415 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2416 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2417 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2418 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2419 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2420 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2421 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2422 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2423 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2424 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2425 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2426 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2427 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2428 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2429 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2430 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2431 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2432 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2433 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2434 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2435 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2436 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2437 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2438 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2439 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2440 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2441 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2442 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2443 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2444 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2445 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2446 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2447 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2448 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2449 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2450 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2451 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2452 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2453 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2454 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2455 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2456 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2457 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2458 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2459 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2460 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2461 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2462 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2463 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2464 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2465 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2466 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2467 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2468 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2469 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2470 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2471 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2472 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2473 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2474 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2475 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2476 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2477 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2478 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2479 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2480 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2481 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2482 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2483 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2484 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2485 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2486 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2487 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2488 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2489 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2490 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2491 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2492 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2493 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2494 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2495 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2496 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2497 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2498 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2499 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2500 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2501 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2502 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2503 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2504 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2505 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2506 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2507 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2508 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2509 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2510 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2511 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2512 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2513 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2514 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2515 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2516 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2517 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2518 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2519 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2520 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2521 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2522 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2523 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2524 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2525 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2526 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2527 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2528 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2529 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2530 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2531 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2532 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2533 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2534 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2535 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2536 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2537 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2538 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2539 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2540 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2541 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2542 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2543 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2544 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2545 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2546 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2547 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2548 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2549 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2550 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2551 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2552 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2553 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2554 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2555 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2556 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2557 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2558 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2559 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2560 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2561 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2562 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2563 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2564 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2565 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2566 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2567 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2568 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2569 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2570 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2571 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2572 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2573 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2574 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2575 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2576 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2577 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2578 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2579 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2580 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2581 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2582 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2583 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2584 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2585 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2586 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2587 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2588 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2589 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2590 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2591 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2592 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2593 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2594 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2595 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2596 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2597 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2598 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2599 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2600 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2601 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2602 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2603 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2604 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2605 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2606 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2607 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2608 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2609 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2610 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2611 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2612 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2613 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2614 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2615 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2616 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2617 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2618 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2619 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2620 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2621 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2622 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2623 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2624 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2625 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2626 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2627 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2628 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2629 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2630 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2631 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2632 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2633 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2634 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2635 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2636 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2637 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2638 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2639 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2640 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2641 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2642 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2643 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2644 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2645 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2646 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2647 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2648 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2649 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2650 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2651 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2652 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2653 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2654 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2655 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2656 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2657 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2658 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2659 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2660 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2661 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2662 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2663 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2664 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2665 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2666 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2667 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2668 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2669 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2670 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2671 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2672 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2673 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2674 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2675 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2676 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2677 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2678 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2679 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2680 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2681 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2682 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2683 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2684 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2685 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2686 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2687 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2688 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2689 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2690 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2691 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2692 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2693 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2694 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2695 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2696 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2697 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2698 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2699 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2700 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2701 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2702 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2703 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2704 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2705 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2706 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2707 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2708 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2709 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2710 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2711 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2712 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2713 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2714 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2715 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2716 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2717 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2718 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2719 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2720 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2721 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2722 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2723 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2724 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2725 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2726 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2727 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2728 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2729 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2730 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2731 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2732 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2733 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2734 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2735 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2736 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2737 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2738 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2739 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2740 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2741 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2742 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2743 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2744 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2745 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2746 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2747 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2748 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2749 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2750 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2751 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2752 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2753 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2754 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2755 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2756 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2757 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2758 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2759 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2760 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2761 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2762 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2763 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2764 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2765 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2766 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2767 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2768 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2769 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2770 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2771 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2772 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2773 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2774 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2775 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2776 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2777 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2778 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2779 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2780 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2781 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2782 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2783 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2784 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2785 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2786 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2787 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2788 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2789 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2790 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2791 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2792 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2793 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2794 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2795 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2796 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2797 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2798 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2799 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2800 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2801 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2802 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2803 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2804 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2805 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2806 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2807 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2808 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2809 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2810 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2811 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2812 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2813 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2814 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2815 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2816 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2817 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2818 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2819 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2820 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2821 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2822 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2823 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2824 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2825 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2826 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2827 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2828 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2829 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2830 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2831 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2832 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2833 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2834 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2835 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2836 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2837 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2838 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2839 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2840 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2841 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2842 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2843 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2844 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2845 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2846 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2847 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2848 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2849 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2850 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2851 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2852 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2853 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2854 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2855 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2856 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2857 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2858 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2859 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2860 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2861 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2862 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2863 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2864 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2865 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2866 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2867 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2868 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2869 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2870 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2871 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2872 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2873 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2874 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2875 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2876 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2877 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2878 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2879 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2880 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2881 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2882 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2883 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2884 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2885 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2886 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2887 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2888 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2889 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2890 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2891 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2892 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2893 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2894 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2895 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2896 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2897 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2898 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2899 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2900 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2901 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2902 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2903 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2904 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2905 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2906 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2907 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2908 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2909 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2910 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2911 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2912 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2913 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2914 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2915 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2916 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2917 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2918 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2919 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2920 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2921 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2922 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2923 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2924 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2925 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2926 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2927 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2928 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2929 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2930 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2931 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2932 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2933 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2934 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2935 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2936 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2937 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2938 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2939 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2940 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2941 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2942 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2943 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2944 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2945 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2946 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2947 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2948 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2949 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2950 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2951 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2952 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2953 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2954 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2955 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2956 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2957 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2958 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2959 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2960 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2961 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2962 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2963 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2964 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2965 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2966 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2967 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2968 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2969 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2970 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2971 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2972 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2973 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2974 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2975 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2976 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2977 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2978 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2979 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2980 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2981 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2982 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2983 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2984 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2985 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2986 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2987 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2988 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2989 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2990 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2991 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2992 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2993 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2994 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2995 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2996 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2997 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2998 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2999 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3000 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3001 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3002 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3003 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3004 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3005 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3006 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3007 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3008 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3009 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3010 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3011 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3012 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3013 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3014 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3015 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3016 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3017 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3018 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3019 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3020 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3021 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3022 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3023 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3024 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3025 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3026 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3027 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3028 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3029 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3030 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3031 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3032 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3033 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3034 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3035 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3036 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3037 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3038 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3039 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3040 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3041 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3042 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3043 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3044 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3045 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3046 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3047 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3048 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3049 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3050 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3051 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3052 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3053 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3054 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3055 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3056 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3057 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3058 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3059 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3060 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3061 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3062 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3063 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3064 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3065 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3066 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3067 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3068 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3069 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3070 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3071 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3072 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3073 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3074 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3075 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3076 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3077 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3078 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3079 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3080 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3081 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3082 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3083 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3084 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3085 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3086 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3087 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3088 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3089 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3090 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3091 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3092 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3093 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3094 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3095 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3096 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3097 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3098 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3099 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3100 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3101 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3102 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3103 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3104 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3105 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3106 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3107 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3108 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3109 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3110 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3111 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3112 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3113 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3114 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3115 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3116 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3117 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3118 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3119 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3120 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3121 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3122 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3123 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3124 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3125 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3126 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3127 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3128 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3129 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3130 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3131 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3132 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3133 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3134 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3135 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3136 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3137 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3138 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3139 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3140 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3141 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3142 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3143 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3144 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3145 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3146 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3147 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3148 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3149 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3150 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3151 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3152 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3153 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3154 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3155 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3156 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3157 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3158 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3159 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3160 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3161 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3162 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3163 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3164 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3165 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3166 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3167 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3168 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3169 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3170 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3171 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3172 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3173 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3174 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3175 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3176 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3177 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3178 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3179 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3180 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3181 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3182 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3183 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3184 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3185 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3186 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3187 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3188 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3189 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3190 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3191 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3192 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3193 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3194 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3195 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3196 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3197 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3198 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3199 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3200 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3201 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3202 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3203 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3204 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3205 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3206 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3207 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3208 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3209 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3210 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3211 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3212 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3213 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3214 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3215 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3216 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3217 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3218 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3219 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3220 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3221 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3222 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3223 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3224 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3225 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3226 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3227 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3228 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3229 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3230 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3231 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3232 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3233 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3234 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3235 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3236 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3237 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3238 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3239 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3240 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3241 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3242 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3243 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3244 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3245 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3246 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3247 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3248 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3249 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3250 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3251 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3252 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3253 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3254 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3255 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3256 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3257 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3258 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3259 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3260 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3261 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3262 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3263 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3264 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3265 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3266 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3267 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3268 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3269 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3270 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3271 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3272 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3273 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3274 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3275 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3276 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3277 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3278 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3279 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3280 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3281 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3282 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3283 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3284 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3285 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3286 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3287 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3288 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3289 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3290 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3291 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3292 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3293 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3294 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3295 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3296 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3297 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3298 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3299 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3300 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3301 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3302 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3303 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3304 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3305 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3306 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3307 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3308 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3309 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3310 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3311 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3312 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3313 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3314 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3315 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3316 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3317 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3318 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3319 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3320 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3321 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3322 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3323 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3324 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3325 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3326 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3327 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3328 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3329 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3330 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3331 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3332 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3333 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3334 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3335 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3336 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3337 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3338 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3339 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3340 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3341 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3342 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3343 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3344 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3345 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3346 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3347 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3348 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3349 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3350 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3351 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3352 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3353 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3354 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3355 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3356 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3357 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3358 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3359 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3360 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3361 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3362 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3363 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3364 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3365 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3366 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3367 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3368 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3369 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3370 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3371 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3372 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3373 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3374 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3375 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3376 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3377 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3378 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3379 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3380 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3381 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3382 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3383 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3384 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3385 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3386 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3387 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3388 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3389 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3390 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3391 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3392 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3393 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3394 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3395 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3396 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3397 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3398 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3399 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3400 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3401 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3402 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3403 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3404 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3405 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3406 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3407 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3408 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3409 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3410 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3411 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3412 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3413 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3414 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3415 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3416 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3417 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3418 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3419 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3420 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3421 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3422 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3423 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3424 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3425 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3426 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3427 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3428 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3429 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3430 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3431 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3432 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3433 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3434 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3435 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3436 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3437 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3438 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3439 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3440 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3441 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3442 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3443 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3444 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3445 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3446 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3447 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3448 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3449 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3450 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3451 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3452 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3453 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3454 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3455 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3456 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3457 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3458 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3459 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3460 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3461 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3462 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3463 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3464 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3465 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3466 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3467 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
3468 | }; | ||
diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c index 1b66efd9b728..f18e5878f58b 100644 --- a/sound/pci/cs46xx/cs46xx_lib.c +++ b/sound/pci/cs46xx/cs46xx_lib.c | |||
@@ -54,7 +54,9 @@ | |||
54 | #include <linux/gameport.h> | 54 | #include <linux/gameport.h> |
55 | #include <linux/mutex.h> | 55 | #include <linux/mutex.h> |
56 | #include <linux/export.h> | 56 | #include <linux/export.h> |
57 | 57 | #include <linux/module.h> | |
58 | #include <linux/firmware.h> | ||
59 | #include <linux/vmalloc.h> | ||
58 | 60 | ||
59 | #include <sound/core.h> | 61 | #include <sound/core.h> |
60 | #include <sound/control.h> | 62 | #include <sound/control.h> |
@@ -330,13 +332,146 @@ int snd_cs46xx_download(struct snd_cs46xx *chip, | |||
330 | return 0; | 332 | return 0; |
331 | } | 333 | } |
332 | 334 | ||
335 | static inline void memcpy_le32(void *dst, const void *src, unsigned int len) | ||
336 | { | ||
337 | #ifdef __LITTLE_ENDIAN | ||
338 | memcpy(dst, src, len); | ||
339 | #else | ||
340 | u32 *_dst = dst; | ||
341 | const __le32 *_src = src; | ||
342 | len /= 4; | ||
343 | while (len-- > 0) | ||
344 | *_dst++ = le32_to_cpu(*_src++); | ||
345 | #endif | ||
346 | } | ||
347 | |||
333 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | 348 | #ifdef CONFIG_SND_CS46XX_NEW_DSP |
334 | 349 | ||
335 | #include "imgs/cwc4630.h" | 350 | static const char *module_names[CS46XX_DSP_MODULES] = { |
336 | #include "imgs/cwcasync.h" | 351 | "cwc4630", "cwcasync", "cwcsnoop", "cwcbinhack", "cwcdma" |
337 | #include "imgs/cwcsnoop.h" | 352 | }; |
338 | #include "imgs/cwcbinhack.h" | 353 | |
339 | #include "imgs/cwcdma.h" | 354 | MODULE_FIRMWARE("cs46xx/cwc4630"); |
355 | MODULE_FIRMWARE("cs46xx/cwcasync"); | ||
356 | MODULE_FIRMWARE("cs46xx/cwcsnoop"); | ||
357 | MODULE_FIRMWARE("cs46xx/cwcbinhack"); | ||
358 | MODULE_FIRMWARE("cs46xx/cwcdma"); | ||
359 | |||
360 | static void free_module_desc(struct dsp_module_desc *module) | ||
361 | { | ||
362 | if (!module) | ||
363 | return; | ||
364 | kfree(module->module_name); | ||
365 | kfree(module->symbol_table.symbols); | ||
366 | if (module->segments) { | ||
367 | int i; | ||
368 | for (i = 0; i < module->nsegments; i++) | ||
369 | kfree(module->segments[i].data); | ||
370 | kfree(module->segments); | ||
371 | } | ||
372 | } | ||
373 | |||
374 | /* firmware binary format: | ||
375 | * le32 nsymbols; | ||
376 | * struct { | ||
377 | * le32 address; | ||
378 | * char symbol_name[DSP_MAX_SYMBOL_NAME]; | ||
379 | * le32 symbol_type; | ||
380 | * } symbols[nsymbols]; | ||
381 | * le32 nsegments; | ||
382 | * struct { | ||
383 | * le32 segment_type; | ||
384 | * le32 offset; | ||
385 | * le32 size; | ||
386 | * le32 data[size]; | ||
387 | * } segments[nsegments]; | ||
388 | */ | ||
389 | |||
390 | static int load_firmware(struct snd_cs46xx *chip, | ||
391 | struct dsp_module_desc **module_ret, | ||
392 | const char *fw_name) | ||
393 | { | ||
394 | int i, err; | ||
395 | unsigned int nums, fwlen, fwsize; | ||
396 | const __le32 *fwdat; | ||
397 | struct dsp_module_desc *module = NULL; | ||
398 | const struct firmware *fw; | ||
399 | char fw_path[32]; | ||
400 | |||
401 | sprintf(fw_path, "cs46xx/%s", fw_name); | ||
402 | err = request_firmware(&fw, fw_path, &chip->pci->dev); | ||
403 | if (err < 0) | ||
404 | return err; | ||
405 | fwsize = fw->size / 4; | ||
406 | if (fwsize < 2) { | ||
407 | err = -EINVAL; | ||
408 | goto error; | ||
409 | } | ||
410 | |||
411 | err = -ENOMEM; | ||
412 | module = kzalloc(sizeof(*module), GFP_KERNEL); | ||
413 | if (!module) | ||
414 | goto error; | ||
415 | module->module_name = kstrdup(fw_name, GFP_KERNEL); | ||
416 | if (!module->module_name) | ||
417 | goto error; | ||
418 | |||
419 | fwlen = 0; | ||
420 | fwdat = (const __le32 *)fw->data; | ||
421 | nums = module->symbol_table.nsymbols = le32_to_cpu(fwdat[fwlen++]); | ||
422 | if (nums >= 40) | ||
423 | goto error_inval; | ||
424 | module->symbol_table.symbols = | ||
425 | kcalloc(nums, sizeof(struct dsp_symbol_entry), GFP_KERNEL); | ||
426 | if (!module->symbol_table.symbols) | ||
427 | goto error; | ||
428 | for (i = 0; i < nums; i++) { | ||
429 | struct dsp_symbol_entry *entry = | ||
430 | &module->symbol_table.symbols[i]; | ||
431 | if (fwlen + 2 + DSP_MAX_SYMBOL_NAME / 4 > fwsize) | ||
432 | goto error_inval; | ||
433 | entry->address = le32_to_cpu(fwdat[fwlen++]); | ||
434 | memcpy(entry->symbol_name, &fwdat[fwlen], DSP_MAX_SYMBOL_NAME - 1); | ||
435 | fwlen += DSP_MAX_SYMBOL_NAME / 4; | ||
436 | entry->symbol_type = le32_to_cpu(fwdat[fwlen++]); | ||
437 | } | ||
438 | |||
439 | if (fwlen >= fwsize) | ||
440 | goto error_inval; | ||
441 | nums = module->nsegments = le32_to_cpu(fwdat[fwlen++]); | ||
442 | if (nums > 10) | ||
443 | goto error_inval; | ||
444 | module->segments = | ||
445 | kcalloc(nums, sizeof(struct dsp_segment_desc), GFP_KERNEL); | ||
446 | if (!module->segments) | ||
447 | goto error; | ||
448 | for (i = 0; i < nums; i++) { | ||
449 | struct dsp_segment_desc *entry = &module->segments[i]; | ||
450 | if (fwlen + 3 > fwsize) | ||
451 | goto error_inval; | ||
452 | entry->segment_type = le32_to_cpu(fwdat[fwlen++]); | ||
453 | entry->offset = le32_to_cpu(fwdat[fwlen++]); | ||
454 | entry->size = le32_to_cpu(fwdat[fwlen++]); | ||
455 | if (fwlen + entry->size > fwsize) | ||
456 | goto error_inval; | ||
457 | entry->data = kmalloc(entry->size * 4, GFP_KERNEL); | ||
458 | if (!entry->data) | ||
459 | goto error; | ||
460 | memcpy_le32(entry->data, &fwdat[fwlen], entry->size * 4); | ||
461 | fwlen += entry->size; | ||
462 | } | ||
463 | |||
464 | *module_ret = module; | ||
465 | release_firmware(fw); | ||
466 | return 0; | ||
467 | |||
468 | error_inval: | ||
469 | err = -EINVAL; | ||
470 | error: | ||
471 | free_module_desc(module); | ||
472 | release_firmware(fw); | ||
473 | return err; | ||
474 | } | ||
340 | 475 | ||
341 | int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, | 476 | int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, |
342 | unsigned long offset, | 477 | unsigned long offset, |
@@ -361,20 +496,63 @@ int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, | |||
361 | 496 | ||
362 | #else /* old DSP image */ | 497 | #else /* old DSP image */ |
363 | 498 | ||
364 | #include "cs46xx_image.h" | 499 | struct ba1_struct { |
500 | struct { | ||
501 | u32 offset; | ||
502 | u32 size; | ||
503 | } memory[BA1_MEMORY_COUNT]; | ||
504 | u32 map[BA1_DWORD_SIZE]; | ||
505 | }; | ||
506 | |||
507 | MODULE_FIRMWARE("cs46xx/ba1"); | ||
508 | |||
509 | static int load_firmware(struct snd_cs46xx *chip) | ||
510 | { | ||
511 | const struct firmware *fw; | ||
512 | int i, size, err; | ||
513 | |||
514 | err = request_firmware(&fw, "cs46xx/ba1", &chip->pci->dev); | ||
515 | if (err < 0) | ||
516 | return err; | ||
517 | if (fw->size != sizeof(*chip->ba1)) { | ||
518 | err = -EINVAL; | ||
519 | goto error; | ||
520 | } | ||
521 | |||
522 | chip->ba1 = vmalloc(sizeof(*chip->ba1)); | ||
523 | if (!chip->ba1) { | ||
524 | err = -ENOMEM; | ||
525 | goto error; | ||
526 | } | ||
527 | |||
528 | memcpy_le32(chip->ba1, fw->data, sizeof(*chip->ba1)); | ||
529 | |||
530 | /* sanity check */ | ||
531 | size = 0; | ||
532 | for (i = 0; i < BA1_MEMORY_COUNT; i++) | ||
533 | size += chip->ba1->memory[i].size; | ||
534 | if (size > BA1_DWORD_SIZE * 4) | ||
535 | err = -EINVAL; | ||
536 | |||
537 | error: | ||
538 | release_firmware(fw); | ||
539 | return err; | ||
540 | } | ||
365 | 541 | ||
366 | int snd_cs46xx_download_image(struct snd_cs46xx *chip) | 542 | int snd_cs46xx_download_image(struct snd_cs46xx *chip) |
367 | { | 543 | { |
368 | int idx, err; | 544 | int idx, err; |
369 | unsigned long offset = 0; | 545 | unsigned int offset = 0; |
546 | struct ba1_struct *ba1 = chip->ba1; | ||
370 | 547 | ||
371 | for (idx = 0; idx < BA1_MEMORY_COUNT; idx++) { | 548 | for (idx = 0; idx < BA1_MEMORY_COUNT; idx++) { |
372 | if ((err = snd_cs46xx_download(chip, | 549 | err = snd_cs46xx_download(chip, |
373 | &BA1Struct.map[offset], | 550 | &ba1->map[offset], |
374 | BA1Struct.memory[idx].offset, | 551 | ba1->memory[idx].offset, |
375 | BA1Struct.memory[idx].size)) < 0) | 552 | ba1->memory[idx].size); |
553 | if (err < 0) | ||
376 | return err; | 554 | return err; |
377 | offset += BA1Struct.memory[idx].size >> 2; | 555 | offset += ba1->memory[idx].size >> 2; |
378 | } | 556 | } |
379 | return 0; | 557 | return 0; |
380 | } | 558 | } |
@@ -2798,6 +2976,10 @@ static int snd_cs46xx_free(struct snd_cs46xx *chip) | |||
2798 | cs46xx_dsp_spos_destroy(chip); | 2976 | cs46xx_dsp_spos_destroy(chip); |
2799 | chip->dsp_spos_instance = NULL; | 2977 | chip->dsp_spos_instance = NULL; |
2800 | } | 2978 | } |
2979 | for (idx = 0; idx < CS46XX_DSP_MODULES; idx++) | ||
2980 | free_module_desc(chip->modules[idx]); | ||
2981 | #else | ||
2982 | vfree(chip->ba1); | ||
2801 | #endif | 2983 | #endif |
2802 | 2984 | ||
2803 | #ifdef CONFIG_PM_SLEEP | 2985 | #ifdef CONFIG_PM_SLEEP |
@@ -3067,6 +3249,11 @@ static void cs46xx_enable_stream_irqs(struct snd_cs46xx *chip) | |||
3067 | int snd_cs46xx_start_dsp(struct snd_cs46xx *chip) | 3249 | int snd_cs46xx_start_dsp(struct snd_cs46xx *chip) |
3068 | { | 3250 | { |
3069 | unsigned int tmp; | 3251 | unsigned int tmp; |
3252 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3253 | int i; | ||
3254 | #endif | ||
3255 | int err; | ||
3256 | |||
3070 | /* | 3257 | /* |
3071 | * Reset the processor. | 3258 | * Reset the processor. |
3072 | */ | 3259 | */ |
@@ -3075,45 +3262,33 @@ int snd_cs46xx_start_dsp(struct snd_cs46xx *chip) | |||
3075 | * Download the image to the processor. | 3262 | * Download the image to the processor. |
3076 | */ | 3263 | */ |
3077 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | 3264 | #ifdef CONFIG_SND_CS46XX_NEW_DSP |
3078 | #if 0 | 3265 | for (i = 0; i < CS46XX_DSP_MODULES; i++) { |
3079 | if (cs46xx_dsp_load_module(chip, &cwcemb80_module) < 0) { | 3266 | err = load_firmware(chip, &chip->modules[i], module_names[i]); |
3080 | snd_printk(KERN_ERR "image download error\n"); | 3267 | if (err < 0) { |
3081 | return -EIO; | 3268 | snd_printk(KERN_ERR "firmware load error [%s]\n", |
3082 | } | 3269 | module_names[i]); |
3083 | #endif | 3270 | return err; |
3084 | 3271 | } | |
3085 | if (cs46xx_dsp_load_module(chip, &cwc4630_module) < 0) { | 3272 | err = cs46xx_dsp_load_module(chip, chip->modules[i]); |
3086 | snd_printk(KERN_ERR "image download error [cwc4630]\n"); | 3273 | if (err < 0) { |
3087 | return -EIO; | 3274 | snd_printk(KERN_ERR "image download error [%s]\n", |
3088 | } | 3275 | module_names[i]); |
3089 | 3276 | return err; | |
3090 | if (cs46xx_dsp_load_module(chip, &cwcasync_module) < 0) { | 3277 | } |
3091 | snd_printk(KERN_ERR "image download error [cwcasync]\n"); | ||
3092 | return -EIO; | ||
3093 | } | ||
3094 | |||
3095 | if (cs46xx_dsp_load_module(chip, &cwcsnoop_module) < 0) { | ||
3096 | snd_printk(KERN_ERR "image download error [cwcsnoop]\n"); | ||
3097 | return -EIO; | ||
3098 | } | ||
3099 | |||
3100 | if (cs46xx_dsp_load_module(chip, &cwcbinhack_module) < 0) { | ||
3101 | snd_printk(KERN_ERR "image download error [cwcbinhack]\n"); | ||
3102 | return -EIO; | ||
3103 | } | ||
3104 | |||
3105 | if (cs46xx_dsp_load_module(chip, &cwcdma_module) < 0) { | ||
3106 | snd_printk(KERN_ERR "image download error [cwcdma]\n"); | ||
3107 | return -EIO; | ||
3108 | } | 3278 | } |
3109 | 3279 | ||
3110 | if (cs46xx_dsp_scb_and_task_init(chip) < 0) | 3280 | if (cs46xx_dsp_scb_and_task_init(chip) < 0) |
3111 | return -EIO; | 3281 | return -EIO; |
3112 | #else | 3282 | #else |
3283 | err = load_firmware(chip); | ||
3284 | if (err < 0) | ||
3285 | return err; | ||
3286 | |||
3113 | /* old image */ | 3287 | /* old image */ |
3114 | if (snd_cs46xx_download_image(chip) < 0) { | 3288 | err = snd_cs46xx_download_image(chip); |
3289 | if (err < 0) { | ||
3115 | snd_printk(KERN_ERR "image download error\n"); | 3290 | snd_printk(KERN_ERR "image download error\n"); |
3116 | return -EIO; | 3291 | return err; |
3117 | } | 3292 | } |
3118 | 3293 | ||
3119 | /* | 3294 | /* |
diff --git a/sound/pci/cs46xx/imgs/cwc4630.h b/sound/pci/cs46xx/imgs/cwc4630.h deleted file mode 100644 index 37c4f1318dc5..000000000000 --- a/sound/pci/cs46xx/imgs/cwc4630.h +++ /dev/null | |||
@@ -1,320 +0,0 @@ | |||
1 | /* generated from cwc4630.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwc4630_H__ | ||
4 | #define __HEADER_cwc4630_H__ | ||
5 | |||
6 | static struct dsp_symbol_entry cwc4630_symbols[] = { | ||
7 | { 0x0000, "BEGINADDRESS",0x00 }, | ||
8 | { 0x8000, "EXECCHILD",0x03 }, | ||
9 | { 0x8001, "EXECCHILD_98",0x03 }, | ||
10 | { 0x8003, "EXECCHILD_PUSH1IND",0x03 }, | ||
11 | { 0x8008, "EXECSIBLING",0x03 }, | ||
12 | { 0x800a, "EXECSIBLING_298",0x03 }, | ||
13 | { 0x800b, "EXECSIBLING_2IND1",0x03 }, | ||
14 | { 0x8010, "TIMINGMASTER",0x03 }, | ||
15 | { 0x804f, "S16_CODECINPUTTASK",0x03 }, | ||
16 | { 0x805e, "PCMSERIALINPUTTASK",0x03 }, | ||
17 | { 0x806d, "S16_MIX_TO_OSTREAM",0x03 }, | ||
18 | { 0x809a, "S16_MIX",0x03 }, | ||
19 | { 0x80bb, "S16_UPSRC",0x03 }, | ||
20 | { 0x813b, "MIX3_EXP",0x03 }, | ||
21 | { 0x8164, "DECIMATEBYPOW2",0x03 }, | ||
22 | { 0x8197, "VARIDECIMATE",0x03 }, | ||
23 | { 0x81f2, "_3DINPUTTASK",0x03 }, | ||
24 | { 0x820a, "_3DPRLGCINPTASK",0x03 }, | ||
25 | { 0x8227, "_3DSTEREOINPUTTASK",0x03 }, | ||
26 | { 0x8242, "_3DOUTPUTTASK",0x03 }, | ||
27 | { 0x82c4, "HRTF_MORPH_TASK",0x03 }, | ||
28 | { 0x82c6, "WAIT4DATA",0x03 }, | ||
29 | { 0x82fa, "PROLOGIC",0x03 }, | ||
30 | { 0x8496, "DECORRELATOR",0x03 }, | ||
31 | { 0x84a4, "STEREO2MONO",0x03 }, | ||
32 | { 0x0070, "SPOSCB",0x02 }, | ||
33 | { 0x0107, "TASKTREETHREAD",0x03 }, | ||
34 | { 0x013c, "TASKTREEHEADERCODE",0x03 }, | ||
35 | { 0x0145, "FGTASKTREEHEADERCODE",0x03 }, | ||
36 | { 0x0169, "NULLALGORITHM",0x03 }, | ||
37 | { 0x016d, "HFGEXECCHILD",0x03 }, | ||
38 | { 0x016e, "HFGEXECCHILD_98",0x03 }, | ||
39 | { 0x0170, "HFGEXECCHILD_PUSH1IND",0x03 }, | ||
40 | { 0x0173, "HFGEXECSIBLING",0x03 }, | ||
41 | { 0x0175, "HFGEXECSIBLING_298",0x03 }, | ||
42 | { 0x0176, "HFGEXECSIBLING_2IND1",0x03 }, | ||
43 | { 0x0179, "S16_CODECOUTPUTTASK",0x03 }, | ||
44 | { 0x0194, "#CODE_END",0x00 }, | ||
45 | }; /* cwc4630 symbols */ | ||
46 | |||
47 | static u32 cwc4630_code[] = { | ||
48 | /* BEGINADDRESS */ | ||
49 | /* 0000 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
50 | /* 0002 */ 0x00001705,0x00001400,0x000a411e,0x00001003, | ||
51 | /* 0004 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
52 | /* 0006 */ 0x00009705,0x00001400,0x000a411e,0x00001003, | ||
53 | /* 0008 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
54 | /* 000A */ 0x00011705,0x00001400,0x000a411e,0x00001003, | ||
55 | /* 000C */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
56 | /* 000E */ 0x00019705,0x00001400,0x000a411e,0x00001003, | ||
57 | /* 0010 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
58 | /* 0012 */ 0x00021705,0x00001400,0x000a411e,0x00001003, | ||
59 | /* 0014 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
60 | /* 0016 */ 0x00029705,0x00001400,0x000a411e,0x00001003, | ||
61 | /* 0018 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
62 | /* 001A */ 0x00031705,0x00001400,0x000a411e,0x00001003, | ||
63 | /* 001C */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
64 | /* 001E */ 0x00039705,0x00001400,0x000a411e,0x00001003, | ||
65 | /* 0020 */ 0x000fe19e,0x00001003,0x0009c730,0x00001003, | ||
66 | /* 0022 */ 0x0008e19c,0x00001003,0x000083c1,0x00093040, | ||
67 | /* 0024 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
68 | /* 0026 */ 0x00009705,0x00001400,0x000a211e,0x00001003, | ||
69 | /* 0028 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
70 | /* 002A */ 0x00011705,0x00001400,0x000a211e,0x00001003, | ||
71 | /* 002C */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
72 | /* 002E */ 0x00019705,0x00001400,0x000a211e,0x00001003, | ||
73 | /* 0030 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
74 | /* 0032 */ 0x00021705,0x00001400,0x000a211e,0x00001003, | ||
75 | /* 0034 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
76 | /* 0036 */ 0x00029705,0x00001400,0x000a211e,0x00001003, | ||
77 | /* 0038 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
78 | /* 003A */ 0x00031705,0x00001400,0x000a211e,0x00001003, | ||
79 | /* 003C */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
80 | /* 003E */ 0x00039705,0x00001400,0x000a211e,0x00001003, | ||
81 | /* 0040 */ 0x0001a730,0x00001008,0x000e2730,0x00001002, | ||
82 | /* 0042 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
83 | /* 0044 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
84 | /* 0046 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
85 | /* 0048 */ 0x00000000,0x00000000,0x000f619c,0x00001003, | ||
86 | /* 004A */ 0x0007f801,0x000c0000,0x00000037,0x00001000, | ||
87 | /* 004C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
88 | /* 004E */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
89 | /* 0050 */ 0x00000000,0x000c0000,0x00000000,0x00000000, | ||
90 | /* 0052 */ 0x0000373c,0x00001000,0x00000000,0x00000000, | ||
91 | /* 0054 */ 0x000ee19c,0x00001003,0x0007f801,0x000c0000, | ||
92 | /* 0056 */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
93 | /* 0058 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
94 | /* 005A */ 0x00000000,0x00000000,0x0000273c,0x00001000, | ||
95 | /* 005C */ 0x00000033,0x00001000,0x000e679e,0x00001003, | ||
96 | /* 005E */ 0x00007705,0x00001400,0x000ac71e,0x00001003, | ||
97 | /* 0060 */ 0x00087fc1,0x000c3be0,0x0007f801,0x000c0000, | ||
98 | /* 0062 */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
99 | /* 0064 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
100 | /* 0066 */ 0x00000000,0x00000000,0x0000a730,0x00001003, | ||
101 | /* 0068 */ 0x00000033,0x00001000,0x0007f801,0x000c0000, | ||
102 | /* 006A */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
103 | /* 006C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
104 | /* 006E */ 0x00000000,0x00000000,0x00000000,0x000c0000, | ||
105 | /* 0070 */ 0x00000032,0x00001000,0x0000273d,0x00001000, | ||
106 | /* 0072 */ 0x0004a730,0x00001003,0x00000f41,0x00097140, | ||
107 | /* 0074 */ 0x0000a841,0x0009b240,0x0000a0c1,0x0009f040, | ||
108 | /* 0076 */ 0x0001c641,0x00093540,0x0001cec1,0x0009b5c0, | ||
109 | /* 0078 */ 0x00000000,0x00000000,0x0001bf05,0x0003fc40, | ||
110 | /* 007A */ 0x00002725,0x000aa400,0x00013705,0x00093a00, | ||
111 | /* 007C */ 0x0000002e,0x0009d6c0,0x0002ef8a,0x00000000, | ||
112 | /* 007E */ 0x00040630,0x00001004,0x0004ef0a,0x000eb785, | ||
113 | /* 0080 */ 0x0003fc8a,0x00000000,0x00000000,0x000c70e0, | ||
114 | /* 0082 */ 0x0007d182,0x0002c640,0x00008630,0x00001004, | ||
115 | /* 0084 */ 0x000799b8,0x0002c6c0,0x00031705,0x00092240, | ||
116 | /* 0086 */ 0x00039f05,0x000932c0,0x0003520a,0x00000000, | ||
117 | /* 0088 */ 0x00070731,0x0000100b,0x00010705,0x000b20c0, | ||
118 | /* 008A */ 0x00000000,0x000eba44,0x00032108,0x000c60c4, | ||
119 | /* 008C */ 0x00065208,0x000c2917,0x000486b0,0x00001007, | ||
120 | /* 008E */ 0x00012f05,0x00036880,0x0002818e,0x000c0000, | ||
121 | /* 0090 */ 0x0004410a,0x00000000,0x00048630,0x00001007, | ||
122 | /* 0092 */ 0x00029705,0x000c0000,0x00000000,0x00000000, | ||
123 | /* 0094 */ 0x00003fc1,0x0003fc40,0x000037c1,0x00091b40, | ||
124 | /* 0096 */ 0x00003fc1,0x000911c0,0x000037c1,0x000957c0, | ||
125 | /* 0098 */ 0x00003fc1,0x000951c0,0x000037c1,0x00000000, | ||
126 | /* 009A */ 0x00003fc1,0x000991c0,0x000037c1,0x00000000, | ||
127 | /* 009C */ 0x00003fc1,0x0009d1c0,0x000037c1,0x00000000, | ||
128 | /* 009E */ 0x0001ccc1,0x000915c0,0x0001c441,0x0009d800, | ||
129 | /* 00A0 */ 0x0009cdc1,0x00091240,0x0001c541,0x00091d00, | ||
130 | /* 00A2 */ 0x0009cfc1,0x00095240,0x0001c741,0x00095c80, | ||
131 | /* 00A4 */ 0x000e8ca9,0x00099240,0x000e85ad,0x00095640, | ||
132 | /* 00A6 */ 0x00069ca9,0x00099d80,0x000e952d,0x00099640, | ||
133 | /* 00A8 */ 0x000eaca9,0x0009d6c0,0x000ea5ad,0x00091a40, | ||
134 | /* 00AA */ 0x0006bca9,0x0009de80,0x000eb52d,0x00095a40, | ||
135 | /* 00AC */ 0x000ecca9,0x00099ac0,0x000ec5ad,0x0009da40, | ||
136 | /* 00AE */ 0x000edca9,0x0009d300,0x000a6e0a,0x00001000, | ||
137 | /* 00B0 */ 0x000ed52d,0x00091e40,0x000eeca9,0x00095ec0, | ||
138 | /* 00B2 */ 0x000ee5ad,0x00099e40,0x0006fca9,0x00002500, | ||
139 | /* 00B4 */ 0x000fb208,0x000c59a0,0x000ef52d,0x0009de40, | ||
140 | /* 00B6 */ 0x00068ca9,0x000912c1,0x000683ad,0x00095241, | ||
141 | /* 00B8 */ 0x00020f05,0x000991c1,0x00000000,0x00000000, | ||
142 | /* 00BA */ 0x00086f88,0x00001000,0x0009cf81,0x000b5340, | ||
143 | /* 00BC */ 0x0009c701,0x000b92c0,0x0009de81,0x000bd300, | ||
144 | /* 00BE */ 0x0009d601,0x000b1700,0x0001fd81,0x000b9d80, | ||
145 | /* 00C0 */ 0x0009f501,0x000b57c0,0x000a0f81,0x000bd740, | ||
146 | /* 00C2 */ 0x00020701,0x000b5c80,0x000a1681,0x000b97c0, | ||
147 | /* 00C4 */ 0x00021601,0x00002500,0x000a0701,0x000b9b40, | ||
148 | /* 00C6 */ 0x000a0f81,0x000b1bc0,0x00021681,0x00002d00, | ||
149 | /* 00C8 */ 0x00020f81,0x000bd800,0x000a0701,0x000b5bc0, | ||
150 | /* 00CA */ 0x00021601,0x00003500,0x000a0f81,0x000b5f40, | ||
151 | /* 00CC */ 0x000a0701,0x000bdbc0,0x00021681,0x00003d00, | ||
152 | /* 00CE */ 0x00020f81,0x000b1d00,0x000a0701,0x000b1fc0, | ||
153 | /* 00D0 */ 0x00021601,0x00020500,0x00020f81,0x000b1341, | ||
154 | /* 00D2 */ 0x000a0701,0x000b9fc0,0x00021681,0x00020d00, | ||
155 | /* 00D4 */ 0x00020f81,0x000bde80,0x000a0701,0x000bdfc0, | ||
156 | /* 00D6 */ 0x00021601,0x00021500,0x00020f81,0x000b9341, | ||
157 | /* 00D8 */ 0x00020701,0x000b53c1,0x00021681,0x00021d00, | ||
158 | /* 00DA */ 0x000a0f81,0x000d0380,0x0000b601,0x000b15c0, | ||
159 | /* 00DC */ 0x00007b01,0x00000000,0x00007b81,0x000bd1c0, | ||
160 | /* 00DE */ 0x00007b01,0x00000000,0x00007b81,0x000b91c0, | ||
161 | /* 00E0 */ 0x00007b01,0x000b57c0,0x00007b81,0x000b51c0, | ||
162 | /* 00E2 */ 0x00007b01,0x000b1b40,0x00007b81,0x000b11c0, | ||
163 | /* 00E4 */ 0x00087b01,0x000c3dc0,0x0007e488,0x000d7e45, | ||
164 | /* 00E6 */ 0x00000000,0x000d7a44,0x0007e48a,0x00000000, | ||
165 | /* 00E8 */ 0x00011f05,0x00084080,0x00000000,0x00000000, | ||
166 | /* 00EA */ 0x00001705,0x000b3540,0x00008a01,0x000bf040, | ||
167 | /* 00EC */ 0x00007081,0x000bb5c0,0x00055488,0x00000000, | ||
168 | /* 00EE */ 0x0000d482,0x0003fc40,0x0003fc88,0x00000000, | ||
169 | /* 00F0 */ 0x0001e401,0x000b3a00,0x0001ec81,0x000bd6c0, | ||
170 | /* 00F2 */ 0x0002ef88,0x000e7784,0x00056f08,0x00000000, | ||
171 | /* 00F4 */ 0x000d86b0,0x00001007,0x00008281,0x000bb240, | ||
172 | /* 00F6 */ 0x0000b801,0x000b7140,0x00007888,0x00000000, | ||
173 | /* 00F8 */ 0x0000073c,0x00001000,0x0007f188,0x000c0000, | ||
174 | /* 00FA */ 0x00000000,0x00000000,0x00055288,0x000c555c, | ||
175 | /* 00FC */ 0x0005528a,0x000c0000,0x0009fa88,0x000c5d00, | ||
176 | /* 00FE */ 0x0000fa88,0x00000000,0x00000032,0x00001000, | ||
177 | /* 0100 */ 0x0000073d,0x00001000,0x0007f188,0x000c0000, | ||
178 | /* 0102 */ 0x00000000,0x00000000,0x0008c01c,0x00001003, | ||
179 | /* 0104 */ 0x00002705,0x00001008,0x0008b201,0x000c1392, | ||
180 | /* 0106 */ 0x0000ba01,0x00000000, | ||
181 | /* TASKTREETHREAD */ | ||
182 | /* 0107 */ 0x00008731,0x00001400,0x0004c108,0x000fe0c4, | ||
183 | /* 0109 */ 0x00057488,0x00000000,0x000a6388,0x00001001, | ||
184 | /* 010B */ 0x0008b334,0x000bc141,0x0003020e,0x00000000, | ||
185 | /* 010D */ 0x000986b0,0x00001008,0x00003625,0x000c5dfa, | ||
186 | /* 010F */ 0x000a638a,0x00001001,0x0008020e,0x00001002, | ||
187 | /* 0111 */ 0x0009a6b0,0x00001008,0x0007f301,0x00000000, | ||
188 | /* 0113 */ 0x00000000,0x00000000,0x00002725,0x000a8c40, | ||
189 | /* 0115 */ 0x000000ae,0x00000000,0x000e8630,0x00001008, | ||
190 | /* 0117 */ 0x00000000,0x000c74e0,0x0007d182,0x0002d640, | ||
191 | /* 0119 */ 0x000b8630,0x00001008,0x000799b8,0x0002d6c0, | ||
192 | /* 011B */ 0x0000748a,0x000c3ec5,0x0007420a,0x000c0000, | ||
193 | /* 011D */ 0x00062208,0x000c4117,0x000a0630,0x00001009, | ||
194 | /* 011F */ 0x00000000,0x000c0000,0x0001022e,0x00000000, | ||
195 | /* 0121 */ 0x0006a630,0x00001009,0x00000032,0x00001000, | ||
196 | /* 0123 */ 0x000ca21c,0x00001003,0x00005a02,0x00000000, | ||
197 | /* 0125 */ 0x0001a630,0x00001009,0x00000000,0x000c0000, | ||
198 | /* 0127 */ 0x00000036,0x00001000,0x00000000,0x00000000, | ||
199 | /* 0129 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
200 | /* 012B */ 0x00000000,0x00000000,0x0003a730,0x00001008, | ||
201 | /* 012D */ 0x0007f801,0x000c0000,0x00000037,0x00001000, | ||
202 | /* 012F */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
203 | /* 0131 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
204 | /* 0133 */ 0x0003a730,0x00001008,0x00000033,0x00001000, | ||
205 | /* 0135 */ 0x0003a705,0x00001008,0x00007a01,0x000c0000, | ||
206 | /* 0137 */ 0x000e6288,0x000d550a,0x0006428a,0x00000000, | ||
207 | /* 0139 */ 0x00090730,0x0000100a,0x00000000,0x000c0000, | ||
208 | /* 013B */ 0x00000000,0x00000000, | ||
209 | /* TASKTREEHEADERCODE */ | ||
210 | /* 013C */ 0x0007aab0,0x00034880,0x000a8fb0,0x0000100b, | ||
211 | /* 013E */ 0x00057488,0x00000000,0x00033b94,0x00081140, | ||
212 | /* 0140 */ 0x000183ae,0x00000000,0x000a86b0,0x0000100b, | ||
213 | /* 0142 */ 0x00022f05,0x000c3545,0x0000eb8a,0x00000000, | ||
214 | /* 0144 */ 0x00042731,0x00001003, | ||
215 | /* FGTASKTREEHEADERCODE */ | ||
216 | /* 0145 */ 0x0007aab0,0x00034880,0x00078fb0,0x0000100a, | ||
217 | /* 0147 */ 0x00057488,0x00000000,0x00033b94,0x00081140, | ||
218 | /* 0149 */ 0x000183ae,0x00000000,0x000b06b0,0x0000100b, | ||
219 | /* 014B */ 0x00022f05,0x00000000,0x00007401,0x00091140, | ||
220 | /* 014D */ 0x00048f05,0x000951c0,0x00042731,0x00001003, | ||
221 | /* 014F */ 0x0000473d,0x00001000,0x000f19b0,0x000bbc47, | ||
222 | /* 0151 */ 0x00080000,0x000bffc7,0x000fe19e,0x00001003, | ||
223 | /* 0153 */ 0x00000000,0x00000000,0x0008e19c,0x00001003, | ||
224 | /* 0155 */ 0x000083c1,0x00093040,0x00000f41,0x00097140, | ||
225 | /* 0157 */ 0x0000a841,0x0009b240,0x0000a0c1,0x0009f040, | ||
226 | /* 0159 */ 0x0001c641,0x00093540,0x0001cec1,0x0009b5c0, | ||
227 | /* 015B */ 0x00000000,0x000fdc44,0x00055208,0x00000000, | ||
228 | /* 015D */ 0x00010705,0x000a2880,0x0000a23a,0x00093a00, | ||
229 | /* 015F */ 0x0003fc8a,0x000df6c5,0x0004ef0a,0x000c0000, | ||
230 | /* 0161 */ 0x00012f05,0x00036880,0x00065308,0x000c2997, | ||
231 | /* 0163 */ 0x000086b0,0x0000100b,0x0004410a,0x000d40c7, | ||
232 | /* 0165 */ 0x00000000,0x00000000,0x00088730,0x00001004, | ||
233 | /* 0167 */ 0x00056f0a,0x000ea105,0x00000000,0x00000000, | ||
234 | /* NULLALGORITHM */ | ||
235 | /* 0169 */ 0x0000473d,0x00001000,0x000f19b0,0x000bbc47, | ||
236 | /* 016B */ 0x00080000,0x000bffc7,0x0000273d,0x00001000, | ||
237 | /* HFGEXECCHILD */ | ||
238 | /* 016D */ 0x00000000,0x000eba44, | ||
239 | /* HFGEXECCHILD_98 */ | ||
240 | /* 016E */ 0x00048f05,0x0000f440,0x00007401,0x0000f7c0, | ||
241 | /* HFGEXECCHILD_PUSH1IND */ | ||
242 | /* 0170 */ 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
243 | /* 0172 */ 0x00006a88,0x000c75c4, | ||
244 | /* HFGEXECSIBLING */ | ||
245 | /* 0173 */ 0x00000000,0x000e5084,0x00000000,0x000eba44, | ||
246 | /* HFGEXECSIBLING_298 */ | ||
247 | /* 0175 */ 0x00087401,0x000e4782, | ||
248 | /* HFGEXECSIBLING_2IND1 */ | ||
249 | /* 0176 */ 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
250 | /* 0178 */ 0x00006a88,0x000c75c4, | ||
251 | /* S16_CODECOUTPUTTASK */ | ||
252 | /* 0179 */ 0x0007c108,0x000c0000,0x0007e721,0x000bed40, | ||
253 | /* 017B */ 0x00005f25,0x000badc0,0x0003ba97,0x000beb80, | ||
254 | /* 017D */ 0x00065590,0x000b2e00,0x00033217,0x00003ec0, | ||
255 | /* 017F */ 0x00065590,0x000b8e40,0x0003ed80,0x000491c0, | ||
256 | /* 0181 */ 0x00073fb0,0x00074c80,0x000583a0,0x0000100c, | ||
257 | /* 0183 */ 0x000ee388,0x00042970,0x00008301,0x00021ef2, | ||
258 | /* 0185 */ 0x000b8f14,0x0000000f,0x000c4d8d,0x0000001b, | ||
259 | /* 0187 */ 0x000d6dc2,0x000e06c6,0x000032ac,0x000c3916, | ||
260 | /* 0189 */ 0x0004edc2,0x00074c80,0x00078898,0x00001000, | ||
261 | /* 018B */ 0x00038894,0x00000032,0x000c4d8d,0x00092e1b, | ||
262 | /* 018D */ 0x000d6dc2,0x000e06c6,0x0004edc2,0x000c1956, | ||
263 | /* 018F */ 0x0000722c,0x00034a00,0x00041705,0x0009ed40, | ||
264 | /* 0191 */ 0x00058730,0x00001400,0x000d7488,0x000c3a00, | ||
265 | /* 0193 */ 0x00048f05,0x00000000 | ||
266 | }; | ||
267 | /* #CODE_END */ | ||
268 | |||
269 | static u32 cwc4630_parameter[] = { | ||
270 | /* 0000 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
271 | /* 0004 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
272 | /* 0008 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
273 | /* 000C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
274 | /* 0010 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
275 | /* 0014 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
276 | /* 0018 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
277 | /* 001C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
278 | /* 0020 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
279 | /* 0024 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
280 | /* 0028 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
281 | /* 002C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
282 | /* 0030 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
283 | /* 0034 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
284 | /* 0038 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
285 | /* 003C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
286 | /* 0040 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
287 | /* 0044 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
288 | /* 0048 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
289 | /* 004C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
290 | /* 0050 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
291 | /* 0054 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
292 | /* 0058 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
293 | /* 005C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
294 | /* 0060 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
295 | /* 0064 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
296 | /* 0068 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
297 | /* 006C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
298 | /* 0070 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
299 | /* 0074 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
300 | /* 0078 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
301 | /* 007C */ 0x00000000,0x00000000,0x00000000,0x00000000 | ||
302 | }; /* #PARAMETER_END */ | ||
303 | |||
304 | |||
305 | static struct dsp_segment_desc cwc4630_segments[] = { | ||
306 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x00000328, cwc4630_code }, | ||
307 | { SEGTYPE_SP_PARAMETER, 0x00000000, 0x00000080, cwc4630_parameter }, | ||
308 | }; | ||
309 | |||
310 | static struct dsp_module_desc cwc4630_module = { | ||
311 | "cwc4630", | ||
312 | { | ||
313 | 38, | ||
314 | cwc4630_symbols | ||
315 | }, | ||
316 | 2, | ||
317 | cwc4630_segments, | ||
318 | }; | ||
319 | |||
320 | #endif /* __HEADER_cwc4630_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcasync.h b/sound/pci/cs46xx/imgs/cwcasync.h deleted file mode 100644 index 70e63e13c2b3..000000000000 --- a/sound/pci/cs46xx/imgs/cwcasync.h +++ /dev/null | |||
@@ -1,176 +0,0 @@ | |||
1 | /* generated from cwcasync.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwcasync_H__ | ||
4 | #define __HEADER_cwcasync_H__ | ||
5 | |||
6 | static struct dsp_symbol_entry cwcasync_symbols[] = { | ||
7 | { 0x8000, "EXECCHILD",0x03 }, | ||
8 | { 0x8001, "EXECCHILD_98",0x03 }, | ||
9 | { 0x8003, "EXECCHILD_PUSH1IND",0x03 }, | ||
10 | { 0x8008, "EXECSIBLING",0x03 }, | ||
11 | { 0x800a, "EXECSIBLING_298",0x03 }, | ||
12 | { 0x800b, "EXECSIBLING_2IND1",0x03 }, | ||
13 | { 0x8010, "TIMINGMASTER",0x03 }, | ||
14 | { 0x804f, "S16_CODECINPUTTASK",0x03 }, | ||
15 | { 0x805e, "PCMSERIALINPUTTASK",0x03 }, | ||
16 | { 0x806d, "S16_MIX_TO_OSTREAM",0x03 }, | ||
17 | { 0x809a, "S16_MIX",0x03 }, | ||
18 | { 0x80bb, "S16_UPSRC",0x03 }, | ||
19 | { 0x813b, "MIX3_EXP",0x03 }, | ||
20 | { 0x8164, "DECIMATEBYPOW2",0x03 }, | ||
21 | { 0x8197, "VARIDECIMATE",0x03 }, | ||
22 | { 0x81f2, "_3DINPUTTASK",0x03 }, | ||
23 | { 0x820a, "_3DPRLGCINPTASK",0x03 }, | ||
24 | { 0x8227, "_3DSTEREOINPUTTASK",0x03 }, | ||
25 | { 0x8242, "_3DOUTPUTTASK",0x03 }, | ||
26 | { 0x82c4, "HRTF_MORPH_TASK",0x03 }, | ||
27 | { 0x82c6, "WAIT4DATA",0x03 }, | ||
28 | { 0x82fa, "PROLOGIC",0x03 }, | ||
29 | { 0x8496, "DECORRELATOR",0x03 }, | ||
30 | { 0x84a4, "STEREO2MONO",0x03 }, | ||
31 | { 0x0000, "OVERLAYBEGINADDRESS",0x00 }, | ||
32 | { 0x0000, "SPIOWRITE",0x03 }, | ||
33 | { 0x000d, "S16_ASYNCCODECINPUTTASK",0x03 }, | ||
34 | { 0x0043, "SPDIFITASK",0x03 }, | ||
35 | { 0x007b, "SPDIFOTASK",0x03 }, | ||
36 | { 0x0097, "ASYNCHFGTXCODE",0x03 }, | ||
37 | { 0x00be, "ASYNCHFGRXCODE",0x03 }, | ||
38 | { 0x00db, "#CODE_END",0x00 }, | ||
39 | }; /* cwcasync symbols */ | ||
40 | |||
41 | static u32 cwcasync_code[] = { | ||
42 | /* OVERLAYBEGINADDRESS */ | ||
43 | /* 0000 */ 0x00002731,0x00001400,0x00003725,0x000a8440, | ||
44 | /* 0002 */ 0x000000ae,0x00000000,0x00060630,0x00001000, | ||
45 | /* 0004 */ 0x00000000,0x000c7560,0x00075282,0x0002d640, | ||
46 | /* 0006 */ 0x00021705,0x00000000,0x00072ab8,0x0002d6c0, | ||
47 | /* 0008 */ 0x00020630,0x00001000,0x000c74c2,0x000d4b82, | ||
48 | /* 000A */ 0x000475c2,0x00000000,0x0003430a,0x000c0000, | ||
49 | /* 000C */ 0x00042730,0x00001400, | ||
50 | /* S16_ASYNCCODECINPUTTASK */ | ||
51 | /* 000D */ 0x0006a108,0x000cf2c4,0x0004f4c0,0x00000000, | ||
52 | /* 000F */ 0x000fa418,0x0000101f,0x0005d402,0x0001c500, | ||
53 | /* 0011 */ 0x000f0630,0x00001000,0x00004418,0x00001380, | ||
54 | /* 0013 */ 0x000e243d,0x000d394a,0x00049705,0x00000000, | ||
55 | /* 0015 */ 0x0007d530,0x000b4240,0x000e00f2,0x00001000, | ||
56 | /* 0017 */ 0x00009134,0x000ca20a,0x00004c90,0x00001000, | ||
57 | /* 0019 */ 0x0005d705,0x00000000,0x00004f25,0x00098240, | ||
58 | /* 001B */ 0x00004725,0x00000000,0x0000e48a,0x00000000, | ||
59 | /* 001D */ 0x00027295,0x0009c2c0,0x0003df25,0x00000000, | ||
60 | /* 001F */ 0x000e8030,0x00001001,0x0005f718,0x000ac600, | ||
61 | /* 0021 */ 0x0007cf30,0x000c2a01,0x00082630,0x00001001, | ||
62 | /* 0023 */ 0x000504a0,0x00001001,0x00029314,0x000bcb80, | ||
63 | /* 0025 */ 0x0003cf25,0x000b0e00,0x0004f5c0,0x00000000, | ||
64 | /* 0027 */ 0x00049118,0x000d888a,0x0007dd02,0x000c6efa, | ||
65 | /* 0029 */ 0x00000000,0x00000000,0x0004f5c0,0x00069c80, | ||
66 | /* 002B */ 0x0000d402,0x00000000,0x000e8630,0x00001001, | ||
67 | /* 002D */ 0x00079130,0x00000000,0x00049118,0x00090e00, | ||
68 | /* 002F */ 0x0006c10a,0x00000000,0x00000000,0x000c0000, | ||
69 | /* 0031 */ 0x0007cf30,0x00030580,0x00005725,0x00000000, | ||
70 | /* 0033 */ 0x000d84a0,0x00001001,0x00029314,0x000b4780, | ||
71 | /* 0035 */ 0x0003cf25,0x000b8600,0x00000000,0x00000000, | ||
72 | /* 0037 */ 0x00000000,0x000c0000,0x00000000,0x00042c80, | ||
73 | /* 0039 */ 0x0001dec1,0x000e488c,0x00031114,0x00000000, | ||
74 | /* 003B */ 0x0004f5c2,0x00000000,0x0003640a,0x00000000, | ||
75 | /* 003D */ 0x00000000,0x000e5084,0x00000000,0x000eb844, | ||
76 | /* 003F */ 0x00007001,0x00000000,0x00000734,0x00001000, | ||
77 | /* 0041 */ 0x00010705,0x000a6880,0x00006a88,0x000c75c4, | ||
78 | /* SPDIFITASK */ | ||
79 | /* 0043 */ 0x0006a108,0x000cf2c4,0x0004f4c0,0x000d5384, | ||
80 | /* 0045 */ 0x0007e48a,0x00000000,0x00067718,0x00001000, | ||
81 | /* 0047 */ 0x0007a418,0x00001000,0x0007221a,0x00000000, | ||
82 | /* 0049 */ 0x0005d402,0x00014500,0x000b8630,0x00001002, | ||
83 | /* 004B */ 0x00004418,0x00001780,0x000e243d,0x000d394a, | ||
84 | /* 004D */ 0x00049705,0x00000000,0x0007d530,0x000b4240, | ||
85 | /* 004F */ 0x000ac0f2,0x00001002,0x00014414,0x00000000, | ||
86 | /* 0051 */ 0x00004c90,0x00001000,0x0005d705,0x00000000, | ||
87 | /* 0053 */ 0x00004f25,0x00098240,0x00004725,0x00000000, | ||
88 | /* 0055 */ 0x0000e48a,0x00000000,0x00027295,0x0009c2c0, | ||
89 | /* 0057 */ 0x0007df25,0x00000000,0x000ac030,0x00001003, | ||
90 | /* 0059 */ 0x0005f718,0x000fe798,0x00029314,0x000bcb80, | ||
91 | /* 005B */ 0x00000930,0x000b0e00,0x0004f5c0,0x000de204, | ||
92 | /* 005D */ 0x000884a0,0x00001003,0x0007cf25,0x000e3560, | ||
93 | /* 005F */ 0x00049118,0x00000000,0x00049118,0x000d888a, | ||
94 | /* 0061 */ 0x0007dd02,0x000c6efa,0x0000c434,0x00030040, | ||
95 | /* 0063 */ 0x000fda82,0x000c2312,0x000fdc0e,0x00001001, | ||
96 | /* 0065 */ 0x00083402,0x000c2b92,0x000706b0,0x00001003, | ||
97 | /* 0067 */ 0x00075a82,0x00000000,0x0000d625,0x000b0940, | ||
98 | /* 0069 */ 0x0000840e,0x00001002,0x0000aabc,0x000c511e, | ||
99 | /* 006B */ 0x00078730,0x00001003,0x0000aaf4,0x000e910a, | ||
100 | /* 006D */ 0x0004628a,0x00000000,0x00006aca,0x00000000, | ||
101 | /* 006F */ 0x00000930,0x00000000,0x0004f5c0,0x00069c80, | ||
102 | /* 0071 */ 0x00046ac0,0x00000000,0x0003c40a,0x000fc898, | ||
103 | /* 0073 */ 0x00049118,0x00090e00,0x0006c10a,0x00000000, | ||
104 | /* 0075 */ 0x00000000,0x000e5084,0x00000000,0x000eb844, | ||
105 | /* 0077 */ 0x00007001,0x00000000,0x00000734,0x00001000, | ||
106 | /* 0079 */ 0x00010705,0x000a6880,0x00006a88,0x000c75c4, | ||
107 | /* SPDIFOTASK */ | ||
108 | /* 007B */ 0x0006a108,0x000c0000,0x0004f4c0,0x000c3245, | ||
109 | /* 007D */ 0x0000a418,0x00001000,0x0003a20a,0x00000000, | ||
110 | /* 007F */ 0x00004418,0x00001380,0x000e243d,0x000d394a, | ||
111 | /* 0081 */ 0x000c9705,0x000def92,0x0008c030,0x00001004, | ||
112 | /* 0083 */ 0x0005f718,0x000fe798,0x00000000,0x000c0000, | ||
113 | /* 0085 */ 0x00005725,0x00000000,0x000704a0,0x00001004, | ||
114 | /* 0087 */ 0x00029314,0x000b4780,0x0003cf25,0x000b8600, | ||
115 | /* 0089 */ 0x00000000,0x00000000,0x00000000,0x000c0000, | ||
116 | /* 008B */ 0x00000000,0x00042c80,0x0001dec1,0x000e488c, | ||
117 | /* 008D */ 0x00031114,0x00000000,0x0004f5c2,0x00000000, | ||
118 | /* 008F */ 0x0004a918,0x00098600,0x0006c28a,0x00000000, | ||
119 | /* 0091 */ 0x00000000,0x000e5084,0x00000000,0x000eb844, | ||
120 | /* 0093 */ 0x00007001,0x00000000,0x00000734,0x00001000, | ||
121 | /* 0095 */ 0x00010705,0x000a6880,0x00006a88,0x000c75c4, | ||
122 | /* ASYNCHFGTXCODE */ | ||
123 | /* 0097 */ 0x0002a880,0x000b4e40,0x00042214,0x000e5548, | ||
124 | /* 0099 */ 0x000542bf,0x00000000,0x00000000,0x000481c0, | ||
125 | /* 009B */ 0x00000000,0x00000000,0x00000000,0x00000030, | ||
126 | /* 009D */ 0x0000072d,0x000fbf8a,0x00077f94,0x000ea7df, | ||
127 | /* 009F */ 0x0002ac95,0x000d3145,0x00002731,0x00001400, | ||
128 | /* 00A1 */ 0x00006288,0x000c71c4,0x00014108,0x000e6044, | ||
129 | /* 00A3 */ 0x00035408,0x00000000,0x00025418,0x000a0ec0, | ||
130 | /* 00A5 */ 0x0001443d,0x000ca21e,0x00046595,0x000d730c, | ||
131 | /* 00A7 */ 0x0006538e,0x00000000,0x00064630,0x00001005, | ||
132 | /* 00A9 */ 0x000e7b0e,0x000df782,0x000746b0,0x00001005, | ||
133 | /* 00AB */ 0x00036f05,0x000c0000,0x00043695,0x000d598c, | ||
134 | /* 00AD */ 0x0005331a,0x000f2185,0x00000000,0x00000000, | ||
135 | /* 00AF */ 0x000007ae,0x000bdb00,0x00040630,0x00001400, | ||
136 | /* 00B1 */ 0x0005e708,0x000c0000,0x0007ef30,0x000b1c00, | ||
137 | /* 00B3 */ 0x000d86a0,0x00001005,0x00066408,0x000c0000, | ||
138 | /* 00B5 */ 0x00000000,0x00000000,0x00021843,0x00000000, | ||
139 | /* 00B7 */ 0x00000cac,0x00062c00,0x00001dac,0x00063400, | ||
140 | /* 00B9 */ 0x00002cac,0x0006cc80,0x000db943,0x000e5ca1, | ||
141 | /* 00BB */ 0x00000000,0x00000000,0x0006680a,0x000f3205, | ||
142 | /* 00BD */ 0x00042730,0x00001400, | ||
143 | /* ASYNCHFGRXCODE */ | ||
144 | /* 00BE */ 0x00014108,0x000f2204,0x00025418,0x000a2ec0, | ||
145 | /* 00C0 */ 0x00015dbd,0x00038100,0x00015dbc,0x00000000, | ||
146 | /* 00C2 */ 0x0005e415,0x00034880,0x0001258a,0x000d730c, | ||
147 | /* 00C4 */ 0x0006538e,0x000baa40,0x00060630,0x00001006, | ||
148 | /* 00C6 */ 0x00067b0e,0x000ac380,0x0003ef05,0x00000000, | ||
149 | /* 00C8 */ 0x0000f734,0x0001c300,0x000586b0,0x00001400, | ||
150 | /* 00CA */ 0x000b6f05,0x000c3a00,0x00048f05,0x00000000, | ||
151 | /* 00CC */ 0x0005b695,0x0008c380,0x0002058e,0x00000000, | ||
152 | /* 00CE */ 0x000500b0,0x00001400,0x0002b318,0x000e998d, | ||
153 | /* 00D0 */ 0x0006430a,0x00000000,0x00000000,0x000ef384, | ||
154 | /* 00D2 */ 0x00004725,0x000c0000,0x00000000,0x000f3204, | ||
155 | /* 00D4 */ 0x00004f25,0x000c0000,0x00080000,0x000e5ca1, | ||
156 | /* 00D6 */ 0x000cb943,0x000e5ca1,0x0004b943,0x00000000, | ||
157 | /* 00D8 */ 0x00040730,0x00001400,0x000cb943,0x000e5ca1, | ||
158 | /* 00DA */ 0x0004b943,0x00000000 | ||
159 | }; | ||
160 | /* #CODE_END */ | ||
161 | |||
162 | static struct dsp_segment_desc cwcasync_segments[] = { | ||
163 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x000001b6, cwcasync_code }, | ||
164 | }; | ||
165 | |||
166 | static struct dsp_module_desc cwcasync_module = { | ||
167 | "cwcasync", | ||
168 | { | ||
169 | 32, | ||
170 | cwcasync_symbols | ||
171 | }, | ||
172 | 1, | ||
173 | cwcasync_segments, | ||
174 | }; | ||
175 | |||
176 | #endif /* __HEADER_cwcasync_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcbinhack.h b/sound/pci/cs46xx/imgs/cwcbinhack.h deleted file mode 100644 index f4d93689cd49..000000000000 --- a/sound/pci/cs46xx/imgs/cwcbinhack.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* generated by Benny | ||
2 | MODIFY ON YOUR OWN RISK */ | ||
3 | |||
4 | #ifndef __HEADER_cwcbinhack_H__ | ||
5 | #define __HEADER_cwcbinhack_H__ | ||
6 | |||
7 | static struct dsp_symbol_entry cwcbinhack_symbols[] = { | ||
8 | { 0x02c8, "OVERLAYBEGINADDRESS",0x00 }, | ||
9 | { 0x02c8, "MAGICSNOOPTASK",0x03 }, | ||
10 | { 0x0308, "#CODE_END",0x00 }, | ||
11 | }; /* cwcbinhack symbols */ | ||
12 | |||
13 | static u32 cwcbinhack_code[] = { | ||
14 | /* 0x02c8 */ | ||
15 | 0x0007bfb0,0x000bc240,0x00000c2e,0x000c6084, /* 1 */ | ||
16 | 0x000b8630,0x00001016,0x00006408,0x000efb84, /* 2 */ | ||
17 | 0x00016008,0x00000000,0x0001c088,0x000c0000, /* 3 */ | ||
18 | 0x000fc908,0x000e3392,0x0005f488,0x000efb84, /* 4 */ | ||
19 | 0x0001d402,0x000b2e00,0x0003d418,0x00001000, /* 5 */ | ||
20 | 0x0008d574,0x000c4293,0x00065625,0x000ea30e, /* 6 */ | ||
21 | 0x00096c01,0x000c6f92,0x0001a58a,0x000c6085, /* 7 */ | ||
22 | 0x00002f43,0x00000000,0x000e03a0,0x00001016, /* 8 */ | ||
23 | 0x0005e608,0x000c0000,0x00000000,0x00000000, /* 9 */ | ||
24 | 0x000ca108,0x000dcca1,0x00003bac,0x000c3205, /* 10 */ | ||
25 | 0x00073843,0x00000000,0x00010730,0x00001017, /* 11 */ | ||
26 | 0x0001600a,0x000c0000,0x00057488,0x00000000, /* 12 */ | ||
27 | 0x00000000,0x000e5084,0x00000000,0x000eba44, /* 13 */ | ||
28 | 0x00087401,0x000e4782,0x00000734,0x00001000, /* 14 */ | ||
29 | 0x00010705,0x000a6880,0x00006a88,0x000c75c4, /* 15 */ | ||
30 | 0x00000000,0x00000000,0x00000000,0x00000000, /* 16 */ | ||
31 | }; | ||
32 | /* #CODE_END */ | ||
33 | |||
34 | static struct dsp_segment_desc cwcbinhack_segments[] = { | ||
35 | { SEGTYPE_SP_PROGRAM, 0x00000000, 64, cwcbinhack_code }, | ||
36 | }; | ||
37 | |||
38 | static struct dsp_module_desc cwcbinhack_module = { | ||
39 | "cwcbinhack", | ||
40 | { | ||
41 | 3, | ||
42 | cwcbinhack_symbols | ||
43 | }, | ||
44 | 1, | ||
45 | cwcbinhack_segments, | ||
46 | }; | ||
47 | |||
48 | #endif /* __HEADER_cwcbinhack_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcdma.asp b/sound/pci/cs46xx/imgs/cwcdma.asp deleted file mode 100644 index a65e1193c89a..000000000000 --- a/sound/pci/cs46xx/imgs/cwcdma.asp +++ /dev/null | |||
@@ -1,170 +0,0 @@ | |||
1 | // | ||
2 | // Copyright(c) by Benny Sjostrand (benny@hostmobility.com) | ||
3 | // | ||
4 | // This program is free software; you can redistribute it and/or modify | ||
5 | // it under the terms of the GNU General Public License as published by | ||
6 | // the Free Software Foundation; either version 2 of the License, or | ||
7 | // (at your option) any later version. | ||
8 | // | ||
9 | // This program is distributed in the hope that it will be useful, | ||
10 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | // GNU General Public License for more details. | ||
13 | // | ||
14 | // You should have received a copy of the GNU General Public License | ||
15 | // along with this program; if not, write to the Free Software | ||
16 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
17 | // | ||
18 | |||
19 | |||
20 | // | ||
21 | // This code runs inside the DSP (cs4610, cs4612, cs4624, or cs4630), | ||
22 | // to compile it you need a tool named SPASM 3.0 and DSP code owned by | ||
23 | // Cirrus Logic(R). The SPASM program will generate a object file (cwcdma.osp), | ||
24 | // the "ospparser" tool will genereate the cwcdma.h file it's included from | ||
25 | // the cs46xx_lib.c file. | ||
26 | // | ||
27 | // | ||
28 | // The purpose of this code is very simple: make it possible to tranfser | ||
29 | // the samples 'as they are' with no alteration from a PCMreader | ||
30 | // SCB (DMA from host) to any other SCB. This is useful for AC3 through SPDIF. | ||
31 | // SRC (source rate converters) task always alters the samples in somehow, | ||
32 | // however it's from 48khz -> 48khz. | ||
33 | // The alterations are not audible, but AC3 wont work. | ||
34 | // | ||
35 | // ... | ||
36 | // | | ||
37 | // +---------------+ | ||
38 | // | AsynchFGTxSCB | | ||
39 | // +---------------+ | ||
40 | // | | ||
41 | // subListPtr | ||
42 | // | | ||
43 | // +--------------+ | ||
44 | // | DMAReader | | ||
45 | // +--------------+ | ||
46 | // | | ||
47 | // subListPtr | ||
48 | // | | ||
49 | // +-------------+ | ||
50 | // | PCMReader | | ||
51 | // +-------------+ | ||
52 | // (DMA from host) | ||
53 | // | ||
54 | |||
55 | struct dmaSCB | ||
56 | { | ||
57 | long dma_reserved1[3]; | ||
58 | |||
59 | short dma_reserved2:dma_outBufPtr; | ||
60 | |||
61 | short dma_unused1:dma_unused2; | ||
62 | |||
63 | long dma_reserved3[4]; | ||
64 | |||
65 | short dma_subListPtr:dma_nextSCB; | ||
66 | short dma_SPBptr:dma_entryPoint; | ||
67 | |||
68 | long dma_strmRsConfig; | ||
69 | long dma_strmBufPtr; | ||
70 | |||
71 | long dma_reserved4; | ||
72 | |||
73 | VolumeControl s2m_volume; | ||
74 | }; | ||
75 | |||
76 | #export DMAReader | ||
77 | void DMAReader() | ||
78 | { | ||
79 | execChild(); | ||
80 | r2 = r0->dma_subListPtr; | ||
81 | r1 = r0->nextSCB; | ||
82 | |||
83 | rsConfig01 = r2->strmRsConfig; | ||
84 | // Load rsConfig for input buffer | ||
85 | |||
86 | rsDMA01 = r2->basicReq.daw, , tb = Z(0 - rf); | ||
87 | // Load rsDMA in case input buffer is a DMA buffer Test to see if there is any data to transfer | ||
88 | |||
89 | if (tb) goto execSibling_2ind1 after { | ||
90 | r5 = rf + (-1); | ||
91 | r6 = r1->dma_entryPoint; // r6 = entry point of sibling task | ||
92 | r1 = r1->dma_SPBptr, // r1 = pointer to sibling task's SPB | ||
93 | , ind = r6; // Load entry point of sibling task | ||
94 | } | ||
95 | |||
96 | rsConfig23 = r0->dma_strmRsConfig; | ||
97 | // Load rsConfig for output buffer (never a DMA buffer) | ||
98 | |||
99 | r4 = r0->dma_outBufPtr; | ||
100 | |||
101 | rsa0 = r2->strmBufPtr; | ||
102 | // rsa0 = input buffer pointer | ||
103 | |||
104 | for (i = r5; i >= 0; --i) | ||
105 | after { | ||
106 | rsa2 = r4; | ||
107 | // rsa2 = output buffer pointer | ||
108 | |||
109 | nop; | ||
110 | nop; | ||
111 | } | ||
112 | //***************************** | ||
113 | // TODO: cycles to this point * | ||
114 | //***************************** | ||
115 | { | ||
116 | acc0 = (rsd0 = *rsa0++1); | ||
117 | // get sample | ||
118 | |||
119 | nop; // Those "nop"'s are really uggly, but there's | ||
120 | nop; // something with DSP's pipelines which I don't | ||
121 | nop; // understand, resulting this code to fail without | ||
122 | // having those "nop"'s (Benny) | ||
123 | |||
124 | rsa0?reqDMA = r2; | ||
125 | // Trigger DMA transfer on input stream, | ||
126 | // if needed to replenish input buffer | ||
127 | |||
128 | nop; | ||
129 | // Yet another magic "nop" to make stuff work | ||
130 | |||
131 | ,,r98 = acc0 $+>> 0; | ||
132 | // store sample in ALU | ||
133 | |||
134 | nop; | ||
135 | // latency on load register. | ||
136 | // (this one is understandable) | ||
137 | |||
138 | *rsa2++1 = r98; | ||
139 | // store sample in output buffer | ||
140 | |||
141 | nop; // The same story | ||
142 | nop; // as above again ... | ||
143 | nop; | ||
144 | } | ||
145 | // TODO: cycles per loop iteration | ||
146 | |||
147 | r2->strmBufPtr = rsa0,, ; | ||
148 | // Update the modified buffer pointers | ||
149 | |||
150 | r4 = rsa2; | ||
151 | // Load output pointer position into r4 | ||
152 | |||
153 | r2 = r0->nextSCB; | ||
154 | // Sibling task | ||
155 | |||
156 | goto execSibling_2ind1 // takes 6 cycles | ||
157 | after { | ||
158 | r98 = r2->thisSPB:entryPoint; | ||
159 | // Load child routine entry and data address | ||
160 | |||
161 | r1 = r9; | ||
162 | // r9 is r2->thisSPB | ||
163 | |||
164 | r0->dma_outBufPtr = r4,, | ||
165 | // Store updated output buffer pointer | ||
166 | |||
167 | ind = r8; | ||
168 | // r8 is r2->entryPoint | ||
169 | } | ||
170 | } | ||
diff --git a/sound/pci/cs46xx/imgs/cwcdma.h b/sound/pci/cs46xx/imgs/cwcdma.h deleted file mode 100644 index 7ff0d4587161..000000000000 --- a/sound/pci/cs46xx/imgs/cwcdma.h +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | /* generated from cwcdma.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwcdma_H__ | ||
4 | #define __HEADER_cwcdma_H__ | ||
5 | |||
6 | static struct dsp_symbol_entry cwcdma_symbols[] = { | ||
7 | { 0x8000, "EXECCHILD",0x03 }, | ||
8 | { 0x8001, "EXECCHILD_98",0x03 }, | ||
9 | { 0x8003, "EXECCHILD_PUSH1IND",0x03 }, | ||
10 | { 0x8008, "EXECSIBLING",0x03 }, | ||
11 | { 0x800a, "EXECSIBLING_298",0x03 }, | ||
12 | { 0x800b, "EXECSIBLING_2IND1",0x03 }, | ||
13 | { 0x8010, "TIMINGMASTER",0x03 }, | ||
14 | { 0x804f, "S16_CODECINPUTTASK",0x03 }, | ||
15 | { 0x805e, "PCMSERIALINPUTTASK",0x03 }, | ||
16 | { 0x806d, "S16_MIX_TO_OSTREAM",0x03 }, | ||
17 | { 0x809a, "S16_MIX",0x03 }, | ||
18 | { 0x80bb, "S16_UPSRC",0x03 }, | ||
19 | { 0x813b, "MIX3_EXP",0x03 }, | ||
20 | { 0x8164, "DECIMATEBYPOW2",0x03 }, | ||
21 | { 0x8197, "VARIDECIMATE",0x03 }, | ||
22 | { 0x81f2, "_3DINPUTTASK",0x03 }, | ||
23 | { 0x820a, "_3DPRLGCINPTASK",0x03 }, | ||
24 | { 0x8227, "_3DSTEREOINPUTTASK",0x03 }, | ||
25 | { 0x8242, "_3DOUTPUTTASK",0x03 }, | ||
26 | { 0x82c4, "HRTF_MORPH_TASK",0x03 }, | ||
27 | { 0x82c6, "WAIT4DATA",0x03 }, | ||
28 | { 0x82fa, "PROLOGIC",0x03 }, | ||
29 | { 0x8496, "DECORRELATOR",0x03 }, | ||
30 | { 0x84a4, "STEREO2MONO",0x03 }, | ||
31 | { 0x0000, "OVERLAYBEGINADDRESS",0x00 }, | ||
32 | { 0x0000, "DMAREADER",0x03 }, | ||
33 | { 0x0018, "#CODE_END",0x00 }, | ||
34 | }; /* cwcdma symbols */ | ||
35 | |||
36 | static u32 cwcdma_code[] = { | ||
37 | /* OVERLAYBEGINADDRESS */ | ||
38 | /* 0000 */ 0x00002731,0x00001400,0x0004c108,0x000e5044, | ||
39 | /* 0002 */ 0x0005f608,0x00000000,0x000007ae,0x000be300, | ||
40 | /* 0004 */ 0x00058630,0x00001400,0x0007afb0,0x000e9584, | ||
41 | /* 0006 */ 0x00007301,0x000a9840,0x0005e708,0x000cd104, | ||
42 | /* 0008 */ 0x00067008,0x00000000,0x000902a0,0x00001000, | ||
43 | /* 000A */ 0x00012a01,0x000c0000,0x00000000,0x00000000, | ||
44 | /* 000C */ 0x00021843,0x000c0000,0x00000000,0x000c0000, | ||
45 | /* 000E */ 0x0000e101,0x000c0000,0x00000cac,0x00000000, | ||
46 | /* 0010 */ 0x00080000,0x000e5ca1,0x00000000,0x000c0000, | ||
47 | /* 0012 */ 0x00000000,0x00000000,0x00000000,0x00092c00, | ||
48 | /* 0014 */ 0x000122c1,0x000e5084,0x00058730,0x00001400, | ||
49 | /* 0016 */ 0x000d7488,0x000e4782,0x00007401,0x0001c100 | ||
50 | }; | ||
51 | |||
52 | /* #CODE_END */ | ||
53 | |||
54 | static struct dsp_segment_desc cwcdma_segments[] = { | ||
55 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x00000030, cwcdma_code }, | ||
56 | }; | ||
57 | |||
58 | static struct dsp_module_desc cwcdma_module = { | ||
59 | "cwcdma", | ||
60 | { | ||
61 | 27, | ||
62 | cwcdma_symbols | ||
63 | }, | ||
64 | 1, | ||
65 | cwcdma_segments, | ||
66 | }; | ||
67 | |||
68 | #endif /* __HEADER_cwcdma_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcsnoop.h b/sound/pci/cs46xx/imgs/cwcsnoop.h deleted file mode 100644 index 6929d0a5a3f3..000000000000 --- a/sound/pci/cs46xx/imgs/cwcsnoop.h +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | /* generated from cwcsnoop.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwcsnoop_H__ | ||
4 | #define __HEADER_cwcsnoop_H__ | ||
5 | |||
6 | static struct dsp_symbol_entry cwcsnoop_symbols[] = { | ||
7 | { 0x0500, "OVERLAYBEGINADDRESS",0x00 }, | ||
8 | { 0x0500, "OUTPUTSNOOP",0x03 }, | ||
9 | { 0x051f, "#CODE_END",0x00 }, | ||
10 | }; /* cwcsnoop symbols */ | ||
11 | |||
12 | static u32 cwcsnoop_code[] = { | ||
13 | /* 0000 */ 0x0007bfb0,0x000b4e40,0x0007c088,0x000c0617, | ||
14 | /* 0002 */ 0x00049705,0x00000000,0x00080630,0x00001028, | ||
15 | /* 0004 */ 0x00076408,0x000efb84,0x00066008,0x00000000, | ||
16 | /* 0006 */ 0x0007c908,0x000c0000,0x00046725,0x000efa44, | ||
17 | /* 0008 */ 0x0005f708,0x00000000,0x0001d402,0x000b2e00, | ||
18 | /* 000A */ 0x0003d418,0x00001000,0x0008d574,0x000c4293, | ||
19 | /* 000C */ 0x00065625,0x000ea30e,0x00096c01,0x000c6f92, | ||
20 | /* 000E */ 0x0006a58a,0x000f6085,0x00002f43,0x00000000, | ||
21 | /* 0010 */ 0x000a83a0,0x00001028,0x0005e608,0x000c0000, | ||
22 | /* 0012 */ 0x00000000,0x00000000,0x000ca108,0x000dcca1, | ||
23 | /* 0014 */ 0x00003bac,0x000fb205,0x00073843,0x00000000, | ||
24 | /* 0016 */ 0x000d8730,0x00001028,0x0006600a,0x000c0000, | ||
25 | /* 0018 */ 0x00057488,0x00000000,0x00000000,0x000e5084, | ||
26 | /* 001A */ 0x00000000,0x000eba44,0x00087401,0x000e4782, | ||
27 | /* 001C */ 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
28 | /* 001E */ 0x00006a88,0x000c75c4 | ||
29 | }; | ||
30 | /* #CODE_END */ | ||
31 | |||
32 | static struct dsp_segment_desc cwcsnoop_segments[] = { | ||
33 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x0000003e, cwcsnoop_code }, | ||
34 | }; | ||
35 | |||
36 | static struct dsp_module_desc cwcsnoop_module = { | ||
37 | "cwcsnoop", | ||
38 | { | ||
39 | 3, | ||
40 | cwcsnoop_symbols | ||
41 | }, | ||
42 | 1, | ||
43 | cwcsnoop_segments, | ||
44 | }; | ||
45 | |||
46 | #endif /* __HEADER_cwcsnoop_H__ */ | ||
diff --git a/sound/pci/cs5535audio/cs5535audio.c b/sound/pci/cs5535audio/cs5535audio.c index 902bebd3b3fb..c0d2835344da 100644 --- a/sound/pci/cs5535audio/cs5535audio.c +++ b/sound/pci/cs5535audio/cs5535audio.c | |||
@@ -253,7 +253,7 @@ static irqreturn_t snd_cs5535audio_interrupt(int irq, void *dev_id) | |||
253 | static int snd_cs5535audio_free(struct cs5535audio *cs5535au) | 253 | static int snd_cs5535audio_free(struct cs5535audio *cs5535au) |
254 | { | 254 | { |
255 | synchronize_irq(cs5535au->irq); | 255 | synchronize_irq(cs5535au->irq); |
256 | pci_set_power_state(cs5535au->pci, 3); | 256 | pci_set_power_state(cs5535au->pci, PCI_D3hot); |
257 | 257 | ||
258 | if (cs5535au->irq >= 0) | 258 | if (cs5535au->irq >= 0) |
259 | free_irq(cs5535au->irq, cs5535au); | 259 | free_irq(cs5535au->irq, cs5535au); |
diff --git a/sound/pci/ctxfi/ctatc.c b/sound/pci/ctxfi/ctatc.c index b5fa583a239a..eb86829529eb 100644 --- a/sound/pci/ctxfi/ctatc.c +++ b/sound/pci/ctxfi/ctatc.c | |||
@@ -435,6 +435,11 @@ atc_pcm_playback_position(struct ct_atc *atc, struct ct_atc_pcm *apcm) | |||
435 | return 0; | 435 | return 0; |
436 | position = src->ops->get_ca(src); | 436 | position = src->ops->get_ca(src); |
437 | 437 | ||
438 | if (position < apcm->vm_block->addr) { | ||
439 | snd_printdd("ctxfi: bad ca - ca=0x%08x, vba=0x%08x, vbs=0x%08x\n", position, apcm->vm_block->addr, apcm->vm_block->size); | ||
440 | position = apcm->vm_block->addr; | ||
441 | } | ||
442 | |||
438 | size = apcm->vm_block->size; | 443 | size = apcm->vm_block->size; |
439 | max_cisz = src->multi * src->rsc.msr; | 444 | max_cisz = src->multi * src->rsc.msr; |
440 | max_cisz = 128 * (max_cisz < 8 ? max_cisz : 8); | 445 | max_cisz = 128 * (max_cisz < 8 ? max_cisz : 8); |
diff --git a/sound/pci/es1968.c b/sound/pci/es1968.c index b0e3d92c4656..772cc36f951d 100644 --- a/sound/pci/es1968.c +++ b/sound/pci/es1968.c | |||
@@ -1422,7 +1422,7 @@ static void snd_es1968_free_dmabuf(struct es1968 *chip) | |||
1422 | 1422 | ||
1423 | if (! chip->dma.area) | 1423 | if (! chip->dma.area) |
1424 | return; | 1424 | return; |
1425 | snd_dma_reserve_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci)); | 1425 | snd_dma_free_pages(&chip->dma); |
1426 | while ((p = chip->buf_list.next) != &chip->buf_list) { | 1426 | while ((p = chip->buf_list.next) != &chip->buf_list) { |
1427 | struct esm_memory *chunk = list_entry(p, struct esm_memory, list); | 1427 | struct esm_memory *chunk = list_entry(p, struct esm_memory, list); |
1428 | list_del(p); | 1428 | list_del(p); |
@@ -1438,20 +1438,18 @@ snd_es1968_init_dmabuf(struct es1968 *chip) | |||
1438 | 1438 | ||
1439 | chip->dma.dev.type = SNDRV_DMA_TYPE_DEV; | 1439 | chip->dma.dev.type = SNDRV_DMA_TYPE_DEV; |
1440 | chip->dma.dev.dev = snd_dma_pci_data(chip->pci); | 1440 | chip->dma.dev.dev = snd_dma_pci_data(chip->pci); |
1441 | if (! snd_dma_get_reserved_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci))) { | 1441 | err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV, |
1442 | err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV, | 1442 | snd_dma_pci_data(chip->pci), |
1443 | snd_dma_pci_data(chip->pci), | 1443 | chip->total_bufsize, &chip->dma); |
1444 | chip->total_bufsize, &chip->dma); | 1444 | if (err < 0 || ! chip->dma.area) { |
1445 | if (err < 0 || ! chip->dma.area) { | 1445 | snd_printk(KERN_ERR "es1968: can't allocate dma pages for size %d\n", |
1446 | snd_printk(KERN_ERR "es1968: can't allocate dma pages for size %d\n", | 1446 | chip->total_bufsize); |
1447 | chip->total_bufsize); | 1447 | return -ENOMEM; |
1448 | return -ENOMEM; | 1448 | } |
1449 | } | 1449 | if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) { |
1450 | if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) { | 1450 | snd_dma_free_pages(&chip->dma); |
1451 | snd_dma_free_pages(&chip->dma); | 1451 | snd_printk(KERN_ERR "es1968: DMA buffer beyond 256MB.\n"); |
1452 | snd_printk(KERN_ERR "es1968: DMA buffer beyond 256MB.\n"); | 1452 | return -ENOMEM; |
1453 | return -ENOMEM; | ||
1454 | } | ||
1455 | } | 1453 | } |
1456 | 1454 | ||
1457 | INIT_LIST_HEAD(&chip->buf_list); | 1455 | INIT_LIST_HEAD(&chip->buf_list); |
diff --git a/sound/pci/hda/Kconfig b/sound/pci/hda/Kconfig index 4cdd9ded4563..0e53634dbbd8 100644 --- a/sound/pci/hda/Kconfig +++ b/sound/pci/hda/Kconfig | |||
@@ -87,69 +87,54 @@ config SND_HDA_PATCH_LOADER | |||
87 | This option turns on hwdep and reconfig features automatically. | 87 | This option turns on hwdep and reconfig features automatically. |
88 | 88 | ||
89 | config SND_HDA_CODEC_REALTEK | 89 | config SND_HDA_CODEC_REALTEK |
90 | bool "Build Realtek HD-audio codec support" | 90 | tristate "Build Realtek HD-audio codec support" |
91 | default y | ||
92 | select SND_HDA_GENERIC | 91 | select SND_HDA_GENERIC |
93 | help | 92 | help |
94 | Say Y here to include Realtek HD-audio codec support in | 93 | Say Y or M here to include Realtek HD-audio codec support in |
95 | snd-hda-intel driver, such as ALC880. | 94 | snd-hda-intel driver, such as ALC880. |
96 | 95 | ||
97 | When the HD-audio driver is built as a module, the codec | 96 | comment "Set to Y if you want auto-loading the codec driver" |
98 | support code is also built as another module, | 97 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_REALTEK=m |
99 | snd-hda-codec-realtek. | ||
100 | This module is automatically loaded at probing. | ||
101 | 98 | ||
102 | config SND_HDA_CODEC_ANALOG | 99 | config SND_HDA_CODEC_ANALOG |
103 | bool "Build Analog Device HD-audio codec support" | 100 | tristate "Build Analog Device HD-audio codec support" |
104 | default y | ||
105 | select SND_HDA_GENERIC | 101 | select SND_HDA_GENERIC |
106 | help | 102 | help |
107 | Say Y here to include Analog Device HD-audio codec support in | 103 | Say Y or M here to include Analog Device HD-audio codec support in |
108 | snd-hda-intel driver, such as AD1986A. | 104 | snd-hda-intel driver, such as AD1986A. |
109 | 105 | ||
110 | When the HD-audio driver is built as a module, the codec | 106 | comment "Set to Y if you want auto-loading the codec driver" |
111 | support code is also built as another module, | 107 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_ANALOG=m |
112 | snd-hda-codec-analog. | ||
113 | This module is automatically loaded at probing. | ||
114 | 108 | ||
115 | config SND_HDA_CODEC_SIGMATEL | 109 | config SND_HDA_CODEC_SIGMATEL |
116 | bool "Build IDT/Sigmatel HD-audio codec support" | 110 | tristate "Build IDT/Sigmatel HD-audio codec support" |
117 | default y | ||
118 | select SND_HDA_GENERIC | 111 | select SND_HDA_GENERIC |
119 | help | 112 | help |
120 | Say Y here to include IDT (Sigmatel) HD-audio codec support in | 113 | Say Y or M here to include IDT (Sigmatel) HD-audio codec support in |
121 | snd-hda-intel driver, such as STAC9200. | 114 | snd-hda-intel driver, such as STAC9200. |
122 | 115 | ||
123 | When the HD-audio driver is built as a module, the codec | 116 | comment "Set to Y if you want auto-loading the codec driver" |
124 | support code is also built as another module, | 117 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_SIGMATEL=m |
125 | snd-hda-codec-idt. | ||
126 | This module is automatically loaded at probing. | ||
127 | 118 | ||
128 | config SND_HDA_CODEC_VIA | 119 | config SND_HDA_CODEC_VIA |
129 | bool "Build VIA HD-audio codec support" | 120 | tristate "Build VIA HD-audio codec support" |
130 | default y | ||
131 | select SND_HDA_GENERIC | 121 | select SND_HDA_GENERIC |
132 | help | 122 | help |
133 | Say Y here to include VIA HD-audio codec support in | 123 | Say Y or M here to include VIA HD-audio codec support in |
134 | snd-hda-intel driver, such as VT1708. | 124 | snd-hda-intel driver, such as VT1708. |
135 | 125 | ||
136 | When the HD-audio driver is built as a module, the codec | 126 | comment "Set to Y if you want auto-loading the codec driver" |
137 | support code is also built as another module, | 127 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_VIA=m |
138 | snd-hda-codec-via. | ||
139 | This module is automatically loaded at probing. | ||
140 | 128 | ||
141 | config SND_HDA_CODEC_HDMI | 129 | config SND_HDA_CODEC_HDMI |
142 | bool "Build HDMI/DisplayPort HD-audio codec support" | 130 | tristate "Build HDMI/DisplayPort HD-audio codec support" |
143 | default y | ||
144 | help | 131 | help |
145 | Say Y here to include HDMI and DisplayPort HD-audio codec | 132 | Say Y or M here to include HDMI and DisplayPort HD-audio codec |
146 | support in snd-hda-intel driver. This includes all AMD/ATI, | 133 | support in snd-hda-intel driver. This includes all AMD/ATI, |
147 | Intel and Nvidia HDMI/DisplayPort codecs. | 134 | Intel and Nvidia HDMI/DisplayPort codecs. |
148 | 135 | ||
149 | When the HD-audio driver is built as a module, the codec | 136 | comment "Set to Y if you want auto-loading the codec driver" |
150 | support code is also built as another module, | 137 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_HDMI=m |
151 | snd-hda-codec-hdmi. | ||
152 | This module is automatically loaded at probing. | ||
153 | 138 | ||
154 | config SND_HDA_I915 | 139 | config SND_HDA_I915 |
155 | bool | 140 | bool |
@@ -157,55 +142,43 @@ config SND_HDA_I915 | |||
157 | depends on DRM_I915 | 142 | depends on DRM_I915 |
158 | 143 | ||
159 | config SND_HDA_CODEC_CIRRUS | 144 | config SND_HDA_CODEC_CIRRUS |
160 | bool "Build Cirrus Logic codec support" | 145 | tristate "Build Cirrus Logic codec support" |
161 | default y | ||
162 | select SND_HDA_GENERIC | 146 | select SND_HDA_GENERIC |
163 | help | 147 | help |
164 | Say Y here to include Cirrus Logic codec support in | 148 | Say Y or M here to include Cirrus Logic codec support in |
165 | snd-hda-intel driver, such as CS4206. | 149 | snd-hda-intel driver, such as CS4206. |
166 | 150 | ||
167 | When the HD-audio driver is built as a module, the codec | 151 | comment "Set to Y if you want auto-loading the codec driver" |
168 | support code is also built as another module, | 152 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_CIRRUS=m |
169 | snd-hda-codec-cirrus. | ||
170 | This module is automatically loaded at probing. | ||
171 | 153 | ||
172 | config SND_HDA_CODEC_CONEXANT | 154 | config SND_HDA_CODEC_CONEXANT |
173 | bool "Build Conexant HD-audio codec support" | 155 | tristate "Build Conexant HD-audio codec support" |
174 | default y | ||
175 | select SND_HDA_GENERIC | 156 | select SND_HDA_GENERIC |
176 | help | 157 | help |
177 | Say Y here to include Conexant HD-audio codec support in | 158 | Say Y or M here to include Conexant HD-audio codec support in |
178 | snd-hda-intel driver, such as CX20549. | 159 | snd-hda-intel driver, such as CX20549. |
179 | 160 | ||
180 | When the HD-audio driver is built as a module, the codec | 161 | comment "Set to Y if you want auto-loading the codec driver" |
181 | support code is also built as another module, | 162 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_CONEXANT=m |
182 | snd-hda-codec-conexant. | ||
183 | This module is automatically loaded at probing. | ||
184 | 163 | ||
185 | config SND_HDA_CODEC_CA0110 | 164 | config SND_HDA_CODEC_CA0110 |
186 | bool "Build Creative CA0110-IBG codec support" | 165 | tristate "Build Creative CA0110-IBG codec support" |
187 | default y | ||
188 | select SND_HDA_GENERIC | 166 | select SND_HDA_GENERIC |
189 | help | 167 | help |
190 | Say Y here to include Creative CA0110-IBG codec support in | 168 | Say Y or M here to include Creative CA0110-IBG codec support in |
191 | snd-hda-intel driver, found on some Creative X-Fi cards. | 169 | snd-hda-intel driver, found on some Creative X-Fi cards. |
192 | 170 | ||
193 | When the HD-audio driver is built as a module, the codec | 171 | comment "Set to Y if you want auto-loading the codec driver" |
194 | support code is also built as another module, | 172 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_CA0110=m |
195 | snd-hda-codec-ca0110. | ||
196 | This module is automatically loaded at probing. | ||
197 | 173 | ||
198 | config SND_HDA_CODEC_CA0132 | 174 | config SND_HDA_CODEC_CA0132 |
199 | bool "Build Creative CA0132 codec support" | 175 | tristate "Build Creative CA0132 codec support" |
200 | default y | ||
201 | help | 176 | help |
202 | Say Y here to include Creative CA0132 codec support in | 177 | Say Y or M here to include Creative CA0132 codec support in |
203 | snd-hda-intel driver. | 178 | snd-hda-intel driver. |
204 | 179 | ||
205 | When the HD-audio driver is built as a module, the codec | 180 | comment "Set to Y if you want auto-loading the codec driver" |
206 | support code is also built as another module, | 181 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_CA0132=m |
207 | snd-hda-codec-ca0132. | ||
208 | This module is automatically loaded at probing. | ||
209 | 182 | ||
210 | config SND_HDA_CODEC_CA0132_DSP | 183 | config SND_HDA_CODEC_CA0132_DSP |
211 | bool "Support new DSP code for CA0132 codec" | 184 | bool "Support new DSP code for CA0132 codec" |
@@ -220,37 +193,33 @@ config SND_HDA_CODEC_CA0132_DSP | |||
220 | (ctefx.bin). | 193 | (ctefx.bin). |
221 | 194 | ||
222 | config SND_HDA_CODEC_CMEDIA | 195 | config SND_HDA_CODEC_CMEDIA |
223 | bool "Build C-Media HD-audio codec support" | 196 | tristate "Build C-Media HD-audio codec support" |
224 | default y | ||
225 | select SND_HDA_GENERIC | 197 | select SND_HDA_GENERIC |
226 | help | 198 | help |
227 | Say Y here to include C-Media HD-audio codec support in | 199 | Say Y or M here to include C-Media HD-audio codec support in |
228 | snd-hda-intel driver, such as CMI9880. | 200 | snd-hda-intel driver, such as CMI9880. |
229 | 201 | ||
230 | When the HD-audio driver is built as a module, the codec | 202 | comment "Set to Y if you want auto-loading the codec driver" |
231 | support code is also built as another module, | 203 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_CMEDIA=m |
232 | snd-hda-codec-cmedia. | ||
233 | This module is automatically loaded at probing. | ||
234 | 204 | ||
235 | config SND_HDA_CODEC_SI3054 | 205 | config SND_HDA_CODEC_SI3054 |
236 | bool "Build Silicon Labs 3054 HD-modem codec support" | 206 | tristate "Build Silicon Labs 3054 HD-modem codec support" |
237 | default y | ||
238 | help | 207 | help |
239 | Say Y here to include Silicon Labs 3054 HD-modem codec | 208 | Say Y or M here to include Silicon Labs 3054 HD-modem codec |
240 | (and compatibles) support in snd-hda-intel driver. | 209 | (and compatibles) support in snd-hda-intel driver. |
241 | 210 | ||
242 | When the HD-audio driver is built as a module, the codec | 211 | comment "Set to Y if you want auto-loading the codec driver" |
243 | support code is also built as another module, | 212 | depends on SND_HDA_INTEL=y && SND_HDA_CODEC_SI3054=m |
244 | snd-hda-codec-si3054. | ||
245 | This module is automatically loaded at probing. | ||
246 | 213 | ||
247 | config SND_HDA_GENERIC | 214 | config SND_HDA_GENERIC |
248 | bool "Enable generic HD-audio codec parser" | 215 | tristate "Enable generic HD-audio codec parser" |
249 | default y | ||
250 | help | 216 | help |
251 | Say Y here to enable the generic HD-audio codec parser | 217 | Say Y or M here to enable the generic HD-audio codec parser |
252 | in snd-hda-intel driver. | 218 | in snd-hda-intel driver. |
253 | 219 | ||
220 | comment "Set to Y if you want auto-loading the codec driver" | ||
221 | depends on SND_HDA_INTEL=y && SND_HDA_GENERIC=m | ||
222 | |||
254 | config SND_HDA_POWER_SAVE_DEFAULT | 223 | config SND_HDA_POWER_SAVE_DEFAULT |
255 | int "Default time-out for HD-audio power-save mode" | 224 | int "Default time-out for HD-audio power-save mode" |
256 | depends on PM | 225 | depends on PM |
diff --git a/sound/pci/hda/Makefile b/sound/pci/hda/Makefile index c091438286a3..1fcb118e480a 100644 --- a/sound/pci/hda/Makefile +++ b/sound/pci/hda/Makefile | |||
@@ -3,7 +3,6 @@ snd-hda-intel-objs := hda_intel.o | |||
3 | snd-hda-intel-$(CONFIG_SND_HDA_I915) += hda_i915.o | 3 | snd-hda-intel-$(CONFIG_SND_HDA_I915) += hda_i915.o |
4 | 4 | ||
5 | snd-hda-codec-y := hda_codec.o hda_jack.o hda_auto_parser.o | 5 | snd-hda-codec-y := hda_codec.o hda_jack.o hda_auto_parser.o |
6 | snd-hda-codec-$(CONFIG_SND_HDA_GENERIC) += hda_generic.o | ||
7 | snd-hda-codec-$(CONFIG_PROC_FS) += hda_proc.o | 6 | snd-hda-codec-$(CONFIG_PROC_FS) += hda_proc.o |
8 | snd-hda-codec-$(CONFIG_SND_HDA_HWDEP) += hda_hwdep.o | 7 | snd-hda-codec-$(CONFIG_SND_HDA_HWDEP) += hda_hwdep.o |
9 | snd-hda-codec-$(CONFIG_SND_HDA_INPUT_BEEP) += hda_beep.o | 8 | snd-hda-codec-$(CONFIG_SND_HDA_INPUT_BEEP) += hda_beep.o |
@@ -12,6 +11,7 @@ snd-hda-codec-$(CONFIG_SND_HDA_INPUT_BEEP) += hda_beep.o | |||
12 | CFLAGS_hda_codec.o := -I$(src) | 11 | CFLAGS_hda_codec.o := -I$(src) |
13 | CFLAGS_hda_intel.o := -I$(src) | 12 | CFLAGS_hda_intel.o := -I$(src) |
14 | 13 | ||
14 | snd-hda-codec-generic-objs := hda_generic.o | ||
15 | snd-hda-codec-realtek-objs := patch_realtek.o | 15 | snd-hda-codec-realtek-objs := patch_realtek.o |
16 | snd-hda-codec-cmedia-objs := patch_cmedia.o | 16 | snd-hda-codec-cmedia-objs := patch_cmedia.o |
17 | snd-hda-codec-analog-objs := patch_analog.o | 17 | snd-hda-codec-analog-objs := patch_analog.o |
@@ -27,40 +27,19 @@ snd-hda-codec-hdmi-objs := patch_hdmi.o hda_eld.o | |||
27 | # common driver | 27 | # common driver |
28 | obj-$(CONFIG_SND_HDA_INTEL) := snd-hda-codec.o | 28 | obj-$(CONFIG_SND_HDA_INTEL) := snd-hda-codec.o |
29 | 29 | ||
30 | # codec drivers (note: CONFIG_SND_HDA_CODEC_XXX are booleans) | 30 | # codec drivers |
31 | ifdef CONFIG_SND_HDA_CODEC_REALTEK | 31 | obj-$(CONFIG_SND_HDA_GENERIC) += snd-hda-codec-generic.o |
32 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-realtek.o | 32 | obj-$(CONFIG_SND_HDA_CODEC_REALTEK) += snd-hda-codec-realtek.o |
33 | endif | 33 | obj-$(CONFIG_SND_HDA_CODEC_CMEDIA) += snd-hda-codec-cmedia.o |
34 | ifdef CONFIG_SND_HDA_CODEC_CMEDIA | 34 | obj-$(CONFIG_SND_HDA_CODEC_ANALOG) += snd-hda-codec-analog.o |
35 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-cmedia.o | 35 | obj-$(CONFIG_SND_HDA_CODEC_SIGMATEL) += snd-hda-codec-idt.o |
36 | endif | 36 | obj-$(CONFIG_SND_HDA_CODEC_SI3054) += snd-hda-codec-si3054.o |
37 | ifdef CONFIG_SND_HDA_CODEC_ANALOG | 37 | obj-$(CONFIG_SND_HDA_CODEC_CIRRUS) += snd-hda-codec-cirrus.o |
38 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-analog.o | 38 | obj-$(CONFIG_SND_HDA_CODEC_CA0110) += snd-hda-codec-ca0110.o |
39 | endif | 39 | obj-$(CONFIG_SND_HDA_CODEC_CA0132) += snd-hda-codec-ca0132.o |
40 | ifdef CONFIG_SND_HDA_CODEC_SIGMATEL | 40 | obj-$(CONFIG_SND_HDA_CODEC_CONEXANT) += snd-hda-codec-conexant.o |
41 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-idt.o | 41 | obj-$(CONFIG_SND_HDA_CODEC_VIA) += snd-hda-codec-via.o |
42 | endif | 42 | obj-$(CONFIG_SND_HDA_CODEC_HDMI) += snd-hda-codec-hdmi.o |
43 | ifdef CONFIG_SND_HDA_CODEC_SI3054 | ||
44 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-si3054.o | ||
45 | endif | ||
46 | ifdef CONFIG_SND_HDA_CODEC_CIRRUS | ||
47 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-cirrus.o | ||
48 | endif | ||
49 | ifdef CONFIG_SND_HDA_CODEC_CA0110 | ||
50 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-ca0110.o | ||
51 | endif | ||
52 | ifdef CONFIG_SND_HDA_CODEC_CA0132 | ||
53 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-ca0132.o | ||
54 | endif | ||
55 | ifdef CONFIG_SND_HDA_CODEC_CONEXANT | ||
56 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-conexant.o | ||
57 | endif | ||
58 | ifdef CONFIG_SND_HDA_CODEC_VIA | ||
59 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-via.o | ||
60 | endif | ||
61 | ifdef CONFIG_SND_HDA_CODEC_HDMI | ||
62 | obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-hdmi.o | ||
63 | endif | ||
64 | 43 | ||
65 | # this must be the last entry after codec drivers; | 44 | # this must be the last entry after codec drivers; |
66 | # otherwise the codec patches won't be hooked before the PCI probe | 45 | # otherwise the codec patches won't be hooked before the PCI probe |
diff --git a/sound/pci/hda/hda_auto_parser.c b/sound/pci/hda/hda_auto_parser.c index 853c6a69e29e..47ad31c6aa70 100644 --- a/sound/pci/hda/hda_auto_parser.c +++ b/sound/pci/hda/hda_auto_parser.c | |||
@@ -414,7 +414,7 @@ int snd_hda_parse_pin_defcfg(struct hda_codec *codec, | |||
414 | 414 | ||
415 | return 0; | 415 | return 0; |
416 | } | 416 | } |
417 | EXPORT_SYMBOL_HDA(snd_hda_parse_pin_defcfg); | 417 | EXPORT_SYMBOL_GPL(snd_hda_parse_pin_defcfg); |
418 | 418 | ||
419 | int snd_hda_get_input_pin_attr(unsigned int def_conf) | 419 | int snd_hda_get_input_pin_attr(unsigned int def_conf) |
420 | { | 420 | { |
@@ -435,7 +435,7 @@ int snd_hda_get_input_pin_attr(unsigned int def_conf) | |||
435 | return INPUT_PIN_ATTR_FRONT; | 435 | return INPUT_PIN_ATTR_FRONT; |
436 | return INPUT_PIN_ATTR_NORMAL; | 436 | return INPUT_PIN_ATTR_NORMAL; |
437 | } | 437 | } |
438 | EXPORT_SYMBOL_HDA(snd_hda_get_input_pin_attr); | 438 | EXPORT_SYMBOL_GPL(snd_hda_get_input_pin_attr); |
439 | 439 | ||
440 | /** | 440 | /** |
441 | * hda_get_input_pin_label - Give a label for the given input pin | 441 | * hda_get_input_pin_label - Give a label for the given input pin |
@@ -547,7 +547,7 @@ const char *hda_get_autocfg_input_label(struct hda_codec *codec, | |||
547 | cfg->inputs[input].pin, | 547 | cfg->inputs[input].pin, |
548 | has_multiple_pins); | 548 | has_multiple_pins); |
549 | } | 549 | } |
550 | EXPORT_SYMBOL_HDA(hda_get_autocfg_input_label); | 550 | EXPORT_SYMBOL_GPL(hda_get_autocfg_input_label); |
551 | 551 | ||
552 | /* return the position of NID in the list, or -1 if not found */ | 552 | /* return the position of NID in the list, or -1 if not found */ |
553 | static int find_idx_in_nid_list(hda_nid_t nid, const hda_nid_t *list, int nums) | 553 | static int find_idx_in_nid_list(hda_nid_t nid, const hda_nid_t *list, int nums) |
@@ -721,7 +721,7 @@ int snd_hda_get_pin_label(struct hda_codec *codec, hda_nid_t nid, | |||
721 | strlcpy(label, name, maxlen); | 721 | strlcpy(label, name, maxlen); |
722 | return 1; | 722 | return 1; |
723 | } | 723 | } |
724 | EXPORT_SYMBOL_HDA(snd_hda_get_pin_label); | 724 | EXPORT_SYMBOL_GPL(snd_hda_get_pin_label); |
725 | 725 | ||
726 | int snd_hda_add_verbs(struct hda_codec *codec, | 726 | int snd_hda_add_verbs(struct hda_codec *codec, |
727 | const struct hda_verb *list) | 727 | const struct hda_verb *list) |
@@ -733,7 +733,7 @@ int snd_hda_add_verbs(struct hda_codec *codec, | |||
733 | *v = list; | 733 | *v = list; |
734 | return 0; | 734 | return 0; |
735 | } | 735 | } |
736 | EXPORT_SYMBOL_HDA(snd_hda_add_verbs); | 736 | EXPORT_SYMBOL_GPL(snd_hda_add_verbs); |
737 | 737 | ||
738 | void snd_hda_apply_verbs(struct hda_codec *codec) | 738 | void snd_hda_apply_verbs(struct hda_codec *codec) |
739 | { | 739 | { |
@@ -743,7 +743,7 @@ void snd_hda_apply_verbs(struct hda_codec *codec) | |||
743 | snd_hda_sequence_write(codec, *v); | 743 | snd_hda_sequence_write(codec, *v); |
744 | } | 744 | } |
745 | } | 745 | } |
746 | EXPORT_SYMBOL_HDA(snd_hda_apply_verbs); | 746 | EXPORT_SYMBOL_GPL(snd_hda_apply_verbs); |
747 | 747 | ||
748 | void snd_hda_apply_pincfgs(struct hda_codec *codec, | 748 | void snd_hda_apply_pincfgs(struct hda_codec *codec, |
749 | const struct hda_pintbl *cfg) | 749 | const struct hda_pintbl *cfg) |
@@ -751,7 +751,7 @@ void snd_hda_apply_pincfgs(struct hda_codec *codec, | |||
751 | for (; cfg->nid; cfg++) | 751 | for (; cfg->nid; cfg++) |
752 | snd_hda_codec_set_pincfg(codec, cfg->nid, cfg->val); | 752 | snd_hda_codec_set_pincfg(codec, cfg->nid, cfg->val); |
753 | } | 753 | } |
754 | EXPORT_SYMBOL_HDA(snd_hda_apply_pincfgs); | 754 | EXPORT_SYMBOL_GPL(snd_hda_apply_pincfgs); |
755 | 755 | ||
756 | static void set_pin_targets(struct hda_codec *codec, | 756 | static void set_pin_targets(struct hda_codec *codec, |
757 | const struct hda_pintbl *cfg) | 757 | const struct hda_pintbl *cfg) |
@@ -822,7 +822,7 @@ void snd_hda_apply_fixup(struct hda_codec *codec, int action) | |||
822 | if (codec->fixup_list) | 822 | if (codec->fixup_list) |
823 | apply_fixup(codec, codec->fixup_id, action, 0); | 823 | apply_fixup(codec, codec->fixup_id, action, 0); |
824 | } | 824 | } |
825 | EXPORT_SYMBOL_HDA(snd_hda_apply_fixup); | 825 | EXPORT_SYMBOL_GPL(snd_hda_apply_fixup); |
826 | 826 | ||
827 | void snd_hda_pick_fixup(struct hda_codec *codec, | 827 | void snd_hda_pick_fixup(struct hda_codec *codec, |
828 | const struct hda_model_fixup *models, | 828 | const struct hda_model_fixup *models, |
@@ -880,4 +880,4 @@ void snd_hda_pick_fixup(struct hda_codec *codec, | |||
880 | codec->fixup_name = name; | 880 | codec->fixup_name = name; |
881 | } | 881 | } |
882 | } | 882 | } |
883 | EXPORT_SYMBOL_HDA(snd_hda_pick_fixup); | 883 | EXPORT_SYMBOL_GPL(snd_hda_pick_fixup); |
diff --git a/sound/pci/hda/hda_beep.c b/sound/pci/hda/hda_beep.c index 98bce9830be0..0589b39cda6e 100644 --- a/sound/pci/hda/hda_beep.c +++ b/sound/pci/hda/hda_beep.c | |||
@@ -194,7 +194,7 @@ int snd_hda_enable_beep_device(struct hda_codec *codec, int enable) | |||
194 | } | 194 | } |
195 | return 0; | 195 | return 0; |
196 | } | 196 | } |
197 | EXPORT_SYMBOL_HDA(snd_hda_enable_beep_device); | 197 | EXPORT_SYMBOL_GPL(snd_hda_enable_beep_device); |
198 | 198 | ||
199 | int snd_hda_attach_beep_device(struct hda_codec *codec, int nid) | 199 | int snd_hda_attach_beep_device(struct hda_codec *codec, int nid) |
200 | { | 200 | { |
@@ -231,7 +231,7 @@ int snd_hda_attach_beep_device(struct hda_codec *codec, int nid) | |||
231 | 231 | ||
232 | return 0; | 232 | return 0; |
233 | } | 233 | } |
234 | EXPORT_SYMBOL_HDA(snd_hda_attach_beep_device); | 234 | EXPORT_SYMBOL_GPL(snd_hda_attach_beep_device); |
235 | 235 | ||
236 | void snd_hda_detach_beep_device(struct hda_codec *codec) | 236 | void snd_hda_detach_beep_device(struct hda_codec *codec) |
237 | { | 237 | { |
@@ -243,7 +243,7 @@ void snd_hda_detach_beep_device(struct hda_codec *codec) | |||
243 | kfree(beep); | 243 | kfree(beep); |
244 | } | 244 | } |
245 | } | 245 | } |
246 | EXPORT_SYMBOL_HDA(snd_hda_detach_beep_device); | 246 | EXPORT_SYMBOL_GPL(snd_hda_detach_beep_device); |
247 | 247 | ||
248 | static bool ctl_has_mute(struct snd_kcontrol *kcontrol) | 248 | static bool ctl_has_mute(struct snd_kcontrol *kcontrol) |
249 | { | 249 | { |
@@ -265,7 +265,7 @@ int snd_hda_mixer_amp_switch_get_beep(struct snd_kcontrol *kcontrol, | |||
265 | } | 265 | } |
266 | return snd_hda_mixer_amp_switch_get(kcontrol, ucontrol); | 266 | return snd_hda_mixer_amp_switch_get(kcontrol, ucontrol); |
267 | } | 267 | } |
268 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_switch_get_beep); | 268 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_switch_get_beep); |
269 | 269 | ||
270 | int snd_hda_mixer_amp_switch_put_beep(struct snd_kcontrol *kcontrol, | 270 | int snd_hda_mixer_amp_switch_put_beep(struct snd_kcontrol *kcontrol, |
271 | struct snd_ctl_elem_value *ucontrol) | 271 | struct snd_ctl_elem_value *ucontrol) |
@@ -288,4 +288,4 @@ int snd_hda_mixer_amp_switch_put_beep(struct snd_kcontrol *kcontrol, | |||
288 | return 0; | 288 | return 0; |
289 | return snd_hda_mixer_amp_switch_put(kcontrol, ucontrol); | 289 | return snd_hda_mixer_amp_switch_put(kcontrol, ucontrol); |
290 | } | 290 | } |
291 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_switch_put_beep); | 291 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_switch_put_beep); |
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 69178c4f4113..ec4536c8d8d4 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/pci.h> | 26 | #include <linux/pci.h> |
27 | #include <linux/mutex.h> | 27 | #include <linux/mutex.h> |
28 | #include <linux/module.h> | 28 | #include <linux/module.h> |
29 | #include <linux/async.h> | ||
29 | #include <sound/core.h> | 30 | #include <sound/core.h> |
30 | #include "hda_codec.h" | 31 | #include "hda_codec.h" |
31 | #include <sound/asoundef.h> | 32 | #include <sound/asoundef.h> |
@@ -83,7 +84,7 @@ int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset) | |||
83 | mutex_unlock(&preset_mutex); | 84 | mutex_unlock(&preset_mutex); |
84 | return 0; | 85 | return 0; |
85 | } | 86 | } |
86 | EXPORT_SYMBOL_HDA(snd_hda_add_codec_preset); | 87 | EXPORT_SYMBOL_GPL(snd_hda_add_codec_preset); |
87 | 88 | ||
88 | int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset) | 89 | int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset) |
89 | { | 90 | { |
@@ -92,23 +93,31 @@ int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset) | |||
92 | mutex_unlock(&preset_mutex); | 93 | mutex_unlock(&preset_mutex); |
93 | return 0; | 94 | return 0; |
94 | } | 95 | } |
95 | EXPORT_SYMBOL_HDA(snd_hda_delete_codec_preset); | 96 | EXPORT_SYMBOL_GPL(snd_hda_delete_codec_preset); |
96 | 97 | ||
97 | #ifdef CONFIG_PM | 98 | #ifdef CONFIG_PM |
98 | #define codec_in_pm(codec) ((codec)->in_pm) | 99 | #define codec_in_pm(codec) ((codec)->in_pm) |
99 | static void hda_power_work(struct work_struct *work); | 100 | static void hda_power_work(struct work_struct *work); |
100 | static void hda_keep_power_on(struct hda_codec *codec); | 101 | static void hda_keep_power_on(struct hda_codec *codec); |
101 | #define hda_codec_is_power_on(codec) ((codec)->power_on) | 102 | #define hda_codec_is_power_on(codec) ((codec)->power_on) |
102 | static inline void hda_call_pm_notify(struct hda_bus *bus, bool power_up) | 103 | |
104 | static void hda_call_pm_notify(struct hda_codec *codec, bool power_up) | ||
103 | { | 105 | { |
106 | struct hda_bus *bus = codec->bus; | ||
107 | |||
108 | if ((power_up && codec->pm_up_notified) || | ||
109 | (!power_up && !codec->pm_up_notified)) | ||
110 | return; | ||
104 | if (bus->ops.pm_notify) | 111 | if (bus->ops.pm_notify) |
105 | bus->ops.pm_notify(bus, power_up); | 112 | bus->ops.pm_notify(bus, power_up); |
113 | codec->pm_up_notified = power_up; | ||
106 | } | 114 | } |
115 | |||
107 | #else | 116 | #else |
108 | #define codec_in_pm(codec) 0 | 117 | #define codec_in_pm(codec) 0 |
109 | static inline void hda_keep_power_on(struct hda_codec *codec) {} | 118 | static inline void hda_keep_power_on(struct hda_codec *codec) {} |
110 | #define hda_codec_is_power_on(codec) 1 | 119 | #define hda_codec_is_power_on(codec) 1 |
111 | #define hda_call_pm_notify(bus, state) {} | 120 | #define hda_call_pm_notify(codec, state) {} |
112 | #endif | 121 | #endif |
113 | 122 | ||
114 | /** | 123 | /** |
@@ -143,7 +152,7 @@ const char *snd_hda_get_jack_location(u32 cfg) | |||
143 | } | 152 | } |
144 | return "UNKNOWN"; | 153 | return "UNKNOWN"; |
145 | } | 154 | } |
146 | EXPORT_SYMBOL_HDA(snd_hda_get_jack_location); | 155 | EXPORT_SYMBOL_GPL(snd_hda_get_jack_location); |
147 | 156 | ||
148 | /** | 157 | /** |
149 | * snd_hda_get_jack_connectivity - Give a connectivity string of the jack | 158 | * snd_hda_get_jack_connectivity - Give a connectivity string of the jack |
@@ -158,7 +167,7 @@ const char *snd_hda_get_jack_connectivity(u32 cfg) | |||
158 | 167 | ||
159 | return jack_locations[(cfg >> (AC_DEFCFG_LOCATION_SHIFT + 4)) & 3]; | 168 | return jack_locations[(cfg >> (AC_DEFCFG_LOCATION_SHIFT + 4)) & 3]; |
160 | } | 169 | } |
161 | EXPORT_SYMBOL_HDA(snd_hda_get_jack_connectivity); | 170 | EXPORT_SYMBOL_GPL(snd_hda_get_jack_connectivity); |
162 | 171 | ||
163 | /** | 172 | /** |
164 | * snd_hda_get_jack_type - Give a type string of the jack | 173 | * snd_hda_get_jack_type - Give a type string of the jack |
@@ -179,7 +188,7 @@ const char *snd_hda_get_jack_type(u32 cfg) | |||
179 | return jack_types[(cfg & AC_DEFCFG_DEVICE) | 188 | return jack_types[(cfg & AC_DEFCFG_DEVICE) |
180 | >> AC_DEFCFG_DEVICE_SHIFT]; | 189 | >> AC_DEFCFG_DEVICE_SHIFT]; |
181 | } | 190 | } |
182 | EXPORT_SYMBOL_HDA(snd_hda_get_jack_type); | 191 | EXPORT_SYMBOL_GPL(snd_hda_get_jack_type); |
183 | 192 | ||
184 | /* | 193 | /* |
185 | * Compose a 32bit command word to be sent to the HD-audio controller | 194 | * Compose a 32bit command word to be sent to the HD-audio controller |
@@ -275,7 +284,7 @@ unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid, | |||
275 | return -1; | 284 | return -1; |
276 | return res; | 285 | return res; |
277 | } | 286 | } |
278 | EXPORT_SYMBOL_HDA(snd_hda_codec_read); | 287 | EXPORT_SYMBOL_GPL(snd_hda_codec_read); |
279 | 288 | ||
280 | /** | 289 | /** |
281 | * snd_hda_codec_write - send a single command without waiting for response | 290 | * snd_hda_codec_write - send a single command without waiting for response |
@@ -297,7 +306,7 @@ int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int flags, | |||
297 | return codec_exec_verb(codec, cmd, flags, | 306 | return codec_exec_verb(codec, cmd, flags, |
298 | codec->bus->sync_write ? &res : NULL); | 307 | codec->bus->sync_write ? &res : NULL); |
299 | } | 308 | } |
300 | EXPORT_SYMBOL_HDA(snd_hda_codec_write); | 309 | EXPORT_SYMBOL_GPL(snd_hda_codec_write); |
301 | 310 | ||
302 | /** | 311 | /** |
303 | * snd_hda_sequence_write - sequence writes | 312 | * snd_hda_sequence_write - sequence writes |
@@ -312,7 +321,7 @@ void snd_hda_sequence_write(struct hda_codec *codec, const struct hda_verb *seq) | |||
312 | for (; seq->nid; seq++) | 321 | for (; seq->nid; seq++) |
313 | snd_hda_codec_write(codec, seq->nid, 0, seq->verb, seq->param); | 322 | snd_hda_codec_write(codec, seq->nid, 0, seq->verb, seq->param); |
314 | } | 323 | } |
315 | EXPORT_SYMBOL_HDA(snd_hda_sequence_write); | 324 | EXPORT_SYMBOL_GPL(snd_hda_sequence_write); |
316 | 325 | ||
317 | /** | 326 | /** |
318 | * snd_hda_get_sub_nodes - get the range of sub nodes | 327 | * snd_hda_get_sub_nodes - get the range of sub nodes |
@@ -334,7 +343,7 @@ int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid, | |||
334 | *start_id = (parm >> 16) & 0x7fff; | 343 | *start_id = (parm >> 16) & 0x7fff; |
335 | return (int)(parm & 0x7fff); | 344 | return (int)(parm & 0x7fff); |
336 | } | 345 | } |
337 | EXPORT_SYMBOL_HDA(snd_hda_get_sub_nodes); | 346 | EXPORT_SYMBOL_GPL(snd_hda_get_sub_nodes); |
338 | 347 | ||
339 | /* connection list element */ | 348 | /* connection list element */ |
340 | struct hda_conn_list { | 349 | struct hda_conn_list { |
@@ -444,7 +453,7 @@ int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid, | |||
444 | added = true; | 453 | added = true; |
445 | } | 454 | } |
446 | } | 455 | } |
447 | EXPORT_SYMBOL_HDA(snd_hda_get_conn_list); | 456 | EXPORT_SYMBOL_GPL(snd_hda_get_conn_list); |
448 | 457 | ||
449 | /** | 458 | /** |
450 | * snd_hda_get_connections - copy connection list | 459 | * snd_hda_get_connections - copy connection list |
@@ -476,7 +485,7 @@ int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid, | |||
476 | 485 | ||
477 | return len; | 486 | return len; |
478 | } | 487 | } |
479 | EXPORT_SYMBOL_HDA(snd_hda_get_connections); | 488 | EXPORT_SYMBOL_GPL(snd_hda_get_connections); |
480 | 489 | ||
481 | /* return CONNLIST_LEN parameter of the given widget */ | 490 | /* return CONNLIST_LEN parameter of the given widget */ |
482 | static unsigned int get_num_conns(struct hda_codec *codec, hda_nid_t nid) | 491 | static unsigned int get_num_conns(struct hda_codec *codec, hda_nid_t nid) |
@@ -625,7 +634,7 @@ int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int len, | |||
625 | 634 | ||
626 | return add_conn_list(codec, nid, len, list); | 635 | return add_conn_list(codec, nid, len, list); |
627 | } | 636 | } |
628 | EXPORT_SYMBOL_HDA(snd_hda_override_conn_list); | 637 | EXPORT_SYMBOL_GPL(snd_hda_override_conn_list); |
629 | 638 | ||
630 | /** | 639 | /** |
631 | * snd_hda_get_conn_index - get the connection index of the given NID | 640 | * snd_hda_get_conn_index - get the connection index of the given NID |
@@ -664,7 +673,7 @@ int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux, | |||
664 | } | 673 | } |
665 | return -1; | 674 | return -1; |
666 | } | 675 | } |
667 | EXPORT_SYMBOL_HDA(snd_hda_get_conn_index); | 676 | EXPORT_SYMBOL_GPL(snd_hda_get_conn_index); |
668 | 677 | ||
669 | 678 | ||
670 | /* return DEVLIST_LEN parameter of the given widget */ | 679 | /* return DEVLIST_LEN parameter of the given widget */ |
@@ -760,7 +769,7 @@ int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex) | |||
760 | 769 | ||
761 | return 0; | 770 | return 0; |
762 | } | 771 | } |
763 | EXPORT_SYMBOL_HDA(snd_hda_queue_unsol_event); | 772 | EXPORT_SYMBOL_GPL(snd_hda_queue_unsol_event); |
764 | 773 | ||
765 | /* | 774 | /* |
766 | * process queued unsolicited events | 775 | * process queued unsolicited events |
@@ -831,6 +840,7 @@ static int snd_hda_bus_free(struct hda_bus *bus) | |||
831 | bus->ops.private_free(bus); | 840 | bus->ops.private_free(bus); |
832 | if (bus->workq) | 841 | if (bus->workq) |
833 | destroy_workqueue(bus->workq); | 842 | destroy_workqueue(bus->workq); |
843 | |||
834 | kfree(bus); | 844 | kfree(bus); |
835 | return 0; | 845 | return 0; |
836 | } | 846 | } |
@@ -920,7 +930,7 @@ int snd_hda_bus_new(struct snd_card *card, | |||
920 | *busp = bus; | 930 | *busp = bus; |
921 | return 0; | 931 | return 0; |
922 | } | 932 | } |
923 | EXPORT_SYMBOL_HDA(snd_hda_bus_new); | 933 | EXPORT_SYMBOL_GPL(snd_hda_bus_new); |
924 | 934 | ||
925 | #ifdef CONFIG_SND_HDA_GENERIC | 935 | #ifdef CONFIG_SND_HDA_GENERIC |
926 | #define is_generic_config(codec) \ | 936 | #define is_generic_config(codec) \ |
@@ -945,9 +955,6 @@ find_codec_preset(struct hda_codec *codec) | |||
945 | const struct hda_codec_preset *preset; | 955 | const struct hda_codec_preset *preset; |
946 | unsigned int mod_requested = 0; | 956 | unsigned int mod_requested = 0; |
947 | 957 | ||
948 | if (is_generic_config(codec)) | ||
949 | return NULL; /* use the generic parser */ | ||
950 | |||
951 | again: | 958 | again: |
952 | mutex_lock(&preset_mutex); | 959 | mutex_lock(&preset_mutex); |
953 | list_for_each_entry(tbl, &hda_preset_tables, list) { | 960 | list_for_each_entry(tbl, &hda_preset_tables, list) { |
@@ -1163,7 +1170,7 @@ int snd_hda_codec_set_pincfg(struct hda_codec *codec, | |||
1163 | { | 1170 | { |
1164 | return snd_hda_add_pincfg(codec, &codec->driver_pins, nid, cfg); | 1171 | return snd_hda_add_pincfg(codec, &codec->driver_pins, nid, cfg); |
1165 | } | 1172 | } |
1166 | EXPORT_SYMBOL_HDA(snd_hda_codec_set_pincfg); | 1173 | EXPORT_SYMBOL_GPL(snd_hda_codec_set_pincfg); |
1167 | 1174 | ||
1168 | /** | 1175 | /** |
1169 | * snd_hda_codec_get_pincfg - Obtain a pin-default configuration | 1176 | * snd_hda_codec_get_pincfg - Obtain a pin-default configuration |
@@ -1198,7 +1205,7 @@ unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid) | |||
1198 | return pin->cfg; | 1205 | return pin->cfg; |
1199 | return 0; | 1206 | return 0; |
1200 | } | 1207 | } |
1201 | EXPORT_SYMBOL_HDA(snd_hda_codec_get_pincfg); | 1208 | EXPORT_SYMBOL_GPL(snd_hda_codec_get_pincfg); |
1202 | 1209 | ||
1203 | /* remember the current pinctl target value */ | 1210 | /* remember the current pinctl target value */ |
1204 | int snd_hda_codec_set_pin_target(struct hda_codec *codec, hda_nid_t nid, | 1211 | int snd_hda_codec_set_pin_target(struct hda_codec *codec, hda_nid_t nid, |
@@ -1212,7 +1219,7 @@ int snd_hda_codec_set_pin_target(struct hda_codec *codec, hda_nid_t nid, | |||
1212 | pin->target = val; | 1219 | pin->target = val; |
1213 | return 0; | 1220 | return 0; |
1214 | } | 1221 | } |
1215 | EXPORT_SYMBOL_HDA(snd_hda_codec_set_pin_target); | 1222 | EXPORT_SYMBOL_GPL(snd_hda_codec_set_pin_target); |
1216 | 1223 | ||
1217 | /* return the current pinctl target value */ | 1224 | /* return the current pinctl target value */ |
1218 | int snd_hda_codec_get_pin_target(struct hda_codec *codec, hda_nid_t nid) | 1225 | int snd_hda_codec_get_pin_target(struct hda_codec *codec, hda_nid_t nid) |
@@ -1224,7 +1231,7 @@ int snd_hda_codec_get_pin_target(struct hda_codec *codec, hda_nid_t nid) | |||
1224 | return 0; | 1231 | return 0; |
1225 | return pin->target; | 1232 | return pin->target; |
1226 | } | 1233 | } |
1227 | EXPORT_SYMBOL_HDA(snd_hda_codec_get_pin_target); | 1234 | EXPORT_SYMBOL_GPL(snd_hda_codec_get_pin_target); |
1228 | 1235 | ||
1229 | /** | 1236 | /** |
1230 | * snd_hda_shutup_pins - Shut up all pins | 1237 | * snd_hda_shutup_pins - Shut up all pins |
@@ -1249,7 +1256,7 @@ void snd_hda_shutup_pins(struct hda_codec *codec) | |||
1249 | } | 1256 | } |
1250 | codec->pins_shutup = 1; | 1257 | codec->pins_shutup = 1; |
1251 | } | 1258 | } |
1252 | EXPORT_SYMBOL_HDA(snd_hda_shutup_pins); | 1259 | EXPORT_SYMBOL_GPL(snd_hda_shutup_pins); |
1253 | 1260 | ||
1254 | #ifdef CONFIG_PM | 1261 | #ifdef CONFIG_PM |
1255 | /* Restore the pin controls cleared previously via snd_hda_shutup_pins() */ | 1262 | /* Restore the pin controls cleared previously via snd_hda_shutup_pins() */ |
@@ -1330,6 +1337,28 @@ get_hda_cvt_setup(struct hda_codec *codec, hda_nid_t nid) | |||
1330 | } | 1337 | } |
1331 | 1338 | ||
1332 | /* | 1339 | /* |
1340 | * Dynamic symbol binding for the codec parsers | ||
1341 | */ | ||
1342 | #ifdef MODULE | ||
1343 | #define load_parser_sym(sym) ((int (*)(struct hda_codec *))symbol_request(sym)) | ||
1344 | #define unload_parser_addr(addr) symbol_put_addr(addr) | ||
1345 | #else | ||
1346 | #define load_parser_sym(sym) (sym) | ||
1347 | #define unload_parser_addr(addr) do {} while (0) | ||
1348 | #endif | ||
1349 | |||
1350 | #define load_parser(codec, sym) \ | ||
1351 | ((codec)->parser = load_parser_sym(sym)) | ||
1352 | |||
1353 | static void unload_parser(struct hda_codec *codec) | ||
1354 | { | ||
1355 | if (codec->parser) { | ||
1356 | unload_parser_addr(codec->parser); | ||
1357 | codec->parser = NULL; | ||
1358 | } | ||
1359 | } | ||
1360 | |||
1361 | /* | ||
1333 | * codec destructor | 1362 | * codec destructor |
1334 | */ | 1363 | */ |
1335 | static void snd_hda_codec_free(struct hda_codec *codec) | 1364 | static void snd_hda_codec_free(struct hda_codec *codec) |
@@ -1352,10 +1381,8 @@ static void snd_hda_codec_free(struct hda_codec *codec) | |||
1352 | codec->bus->caddr_tbl[codec->addr] = NULL; | 1381 | codec->bus->caddr_tbl[codec->addr] = NULL; |
1353 | if (codec->patch_ops.free) | 1382 | if (codec->patch_ops.free) |
1354 | codec->patch_ops.free(codec); | 1383 | codec->patch_ops.free(codec); |
1355 | #ifdef CONFIG_PM | 1384 | hda_call_pm_notify(codec, false); /* cancel leftover refcounts */ |
1356 | if (!codec->pm_down_notified) /* cancel leftover refcounts */ | 1385 | unload_parser(codec); |
1357 | hda_call_pm_notify(codec->bus, false); | ||
1358 | #endif | ||
1359 | module_put(codec->owner); | 1386 | module_put(codec->owner); |
1360 | free_hda_cache(&codec->amp_cache); | 1387 | free_hda_cache(&codec->amp_cache); |
1361 | free_hda_cache(&codec->cmd_cache); | 1388 | free_hda_cache(&codec->cmd_cache); |
@@ -1363,6 +1390,7 @@ static void snd_hda_codec_free(struct hda_codec *codec) | |||
1363 | kfree(codec->chip_name); | 1390 | kfree(codec->chip_name); |
1364 | kfree(codec->modelname); | 1391 | kfree(codec->modelname); |
1365 | kfree(codec->wcaps); | 1392 | kfree(codec->wcaps); |
1393 | codec->bus->num_codecs--; | ||
1366 | kfree(codec); | 1394 | kfree(codec); |
1367 | } | 1395 | } |
1368 | 1396 | ||
@@ -1424,6 +1452,7 @@ int snd_hda_codec_new(struct hda_bus *bus, | |||
1424 | INIT_LIST_HEAD(&codec->conn_list); | 1452 | INIT_LIST_HEAD(&codec->conn_list); |
1425 | 1453 | ||
1426 | INIT_DELAYED_WORK(&codec->jackpoll_work, hda_jackpoll_work); | 1454 | INIT_DELAYED_WORK(&codec->jackpoll_work, hda_jackpoll_work); |
1455 | codec->depop_delay = -1; | ||
1427 | 1456 | ||
1428 | #ifdef CONFIG_PM | 1457 | #ifdef CONFIG_PM |
1429 | spin_lock_init(&codec->power_lock); | 1458 | spin_lock_init(&codec->power_lock); |
@@ -1433,7 +1462,6 @@ int snd_hda_codec_new(struct hda_bus *bus, | |||
1433 | * phase. | 1462 | * phase. |
1434 | */ | 1463 | */ |
1435 | hda_keep_power_on(codec); | 1464 | hda_keep_power_on(codec); |
1436 | hda_call_pm_notify(bus, true); | ||
1437 | #endif | 1465 | #endif |
1438 | 1466 | ||
1439 | if (codec->bus->modelname) { | 1467 | if (codec->bus->modelname) { |
@@ -1445,6 +1473,8 @@ int snd_hda_codec_new(struct hda_bus *bus, | |||
1445 | } | 1473 | } |
1446 | 1474 | ||
1447 | list_add_tail(&codec->list, &bus->codec_list); | 1475 | list_add_tail(&codec->list, &bus->codec_list); |
1476 | bus->num_codecs++; | ||
1477 | |||
1448 | bus->caddr_tbl[codec_addr] = codec; | 1478 | bus->caddr_tbl[codec_addr] = codec; |
1449 | 1479 | ||
1450 | codec->vendor_id = snd_hda_param_read(codec, AC_NODE_ROOT, | 1480 | codec->vendor_id = snd_hda_param_read(codec, AC_NODE_ROOT, |
@@ -1486,11 +1516,14 @@ int snd_hda_codec_new(struct hda_bus *bus, | |||
1486 | #ifdef CONFIG_PM | 1516 | #ifdef CONFIG_PM |
1487 | codec->d3_stop_clk = snd_hda_codec_get_supported_ps(codec, fg, | 1517 | codec->d3_stop_clk = snd_hda_codec_get_supported_ps(codec, fg, |
1488 | AC_PWRST_CLKSTOP); | 1518 | AC_PWRST_CLKSTOP); |
1489 | if (!codec->d3_stop_clk) | ||
1490 | bus->power_keep_link_on = 1; | ||
1491 | #endif | 1519 | #endif |
1492 | codec->epss = snd_hda_codec_get_supported_ps(codec, fg, | 1520 | codec->epss = snd_hda_codec_get_supported_ps(codec, fg, |
1493 | AC_PWRST_EPSS); | 1521 | AC_PWRST_EPSS); |
1522 | #ifdef CONFIG_PM | ||
1523 | if (!codec->d3_stop_clk || !codec->epss) | ||
1524 | bus->power_keep_link_on = 1; | ||
1525 | #endif | ||
1526 | |||
1494 | 1527 | ||
1495 | /* power-up all before initialization */ | 1528 | /* power-up all before initialization */ |
1496 | hda_set_power_state(codec, AC_PWRST_D0); | 1529 | hda_set_power_state(codec, AC_PWRST_D0); |
@@ -1511,7 +1544,7 @@ int snd_hda_codec_new(struct hda_bus *bus, | |||
1511 | snd_hda_codec_free(codec); | 1544 | snd_hda_codec_free(codec); |
1512 | return err; | 1545 | return err; |
1513 | } | 1546 | } |
1514 | EXPORT_SYMBOL_HDA(snd_hda_codec_new); | 1547 | EXPORT_SYMBOL_GPL(snd_hda_codec_new); |
1515 | 1548 | ||
1516 | int snd_hda_codec_update_widgets(struct hda_codec *codec) | 1549 | int snd_hda_codec_update_widgets(struct hda_codec *codec) |
1517 | { | 1550 | { |
@@ -1534,8 +1567,33 @@ int snd_hda_codec_update_widgets(struct hda_codec *codec) | |||
1534 | 1567 | ||
1535 | return err; | 1568 | return err; |
1536 | } | 1569 | } |
1537 | EXPORT_SYMBOL_HDA(snd_hda_codec_update_widgets); | 1570 | EXPORT_SYMBOL_GPL(snd_hda_codec_update_widgets); |
1571 | |||
1538 | 1572 | ||
1573 | #ifdef CONFIG_SND_HDA_CODEC_HDMI | ||
1574 | /* if all audio out widgets are digital, let's assume the codec as a HDMI/DP */ | ||
1575 | static bool is_likely_hdmi_codec(struct hda_codec *codec) | ||
1576 | { | ||
1577 | hda_nid_t nid = codec->start_nid; | ||
1578 | int i; | ||
1579 | |||
1580 | for (i = 0; i < codec->num_nodes; i++, nid++) { | ||
1581 | unsigned int wcaps = get_wcaps(codec, nid); | ||
1582 | switch (get_wcaps_type(wcaps)) { | ||
1583 | case AC_WID_AUD_IN: | ||
1584 | return false; /* HDMI parser supports only HDMI out */ | ||
1585 | case AC_WID_AUD_OUT: | ||
1586 | if (!(wcaps & AC_WCAP_DIGITAL)) | ||
1587 | return false; | ||
1588 | break; | ||
1589 | } | ||
1590 | } | ||
1591 | return true; | ||
1592 | } | ||
1593 | #else | ||
1594 | /* no HDMI codec parser support */ | ||
1595 | #define is_likely_hdmi_codec(codec) false | ||
1596 | #endif /* CONFIG_SND_HDA_CODEC_HDMI */ | ||
1539 | 1597 | ||
1540 | /** | 1598 | /** |
1541 | * snd_hda_codec_configure - (Re-)configure the HD-audio codec | 1599 | * snd_hda_codec_configure - (Re-)configure the HD-audio codec |
@@ -1548,6 +1606,7 @@ EXPORT_SYMBOL_HDA(snd_hda_codec_update_widgets); | |||
1548 | */ | 1606 | */ |
1549 | int snd_hda_codec_configure(struct hda_codec *codec) | 1607 | int snd_hda_codec_configure(struct hda_codec *codec) |
1550 | { | 1608 | { |
1609 | int (*patch)(struct hda_codec *) = NULL; | ||
1551 | int err; | 1610 | int err; |
1552 | 1611 | ||
1553 | codec->preset = find_codec_preset(codec); | 1612 | codec->preset = find_codec_preset(codec); |
@@ -1557,31 +1616,42 @@ int snd_hda_codec_configure(struct hda_codec *codec) | |||
1557 | return err; | 1616 | return err; |
1558 | } | 1617 | } |
1559 | 1618 | ||
1560 | if (is_generic_config(codec)) { | 1619 | if (!is_generic_config(codec) && codec->preset) |
1561 | err = snd_hda_parse_generic_codec(codec); | 1620 | patch = codec->preset->patch; |
1562 | goto patched; | 1621 | if (!patch) { |
1563 | } | 1622 | unload_parser(codec); /* to be sure */ |
1564 | if (codec->preset && codec->preset->patch) { | 1623 | if (is_likely_hdmi_codec(codec)) |
1565 | err = codec->preset->patch(codec); | 1624 | patch = load_parser(codec, snd_hda_parse_hdmi_codec); |
1566 | goto patched; | 1625 | #ifdef CONFIG_SND_HDA_GENERIC |
1626 | if (!patch) | ||
1627 | patch = load_parser(codec, snd_hda_parse_generic_codec); | ||
1628 | #endif | ||
1629 | if (!patch) { | ||
1630 | printk(KERN_ERR "hda-codec: No codec parser is available\n"); | ||
1631 | return -ENODEV; | ||
1632 | } | ||
1567 | } | 1633 | } |
1568 | 1634 | ||
1569 | /* call the default parser */ | 1635 | err = patch(codec); |
1570 | err = snd_hda_parse_generic_codec(codec); | 1636 | if (err < 0) { |
1571 | if (err < 0) | 1637 | unload_parser(codec); |
1572 | printk(KERN_ERR "hda-codec: No codec parser is available\n"); | 1638 | return err; |
1639 | } | ||
1573 | 1640 | ||
1574 | patched: | 1641 | if (codec->patch_ops.unsol_event) { |
1575 | if (!err && codec->patch_ops.unsol_event) | ||
1576 | err = init_unsol_queue(codec->bus); | 1642 | err = init_unsol_queue(codec->bus); |
1643 | if (err < 0) | ||
1644 | return err; | ||
1645 | } | ||
1646 | |||
1577 | /* audio codec should override the mixer name */ | 1647 | /* audio codec should override the mixer name */ |
1578 | if (!err && (codec->afg || !*codec->bus->card->mixername)) | 1648 | if (codec->afg || !*codec->bus->card->mixername) |
1579 | snprintf(codec->bus->card->mixername, | 1649 | snprintf(codec->bus->card->mixername, |
1580 | sizeof(codec->bus->card->mixername), | 1650 | sizeof(codec->bus->card->mixername), |
1581 | "%s %s", codec->vendor_name, codec->chip_name); | 1651 | "%s %s", codec->vendor_name, codec->chip_name); |
1582 | return err; | 1652 | return 0; |
1583 | } | 1653 | } |
1584 | EXPORT_SYMBOL_HDA(snd_hda_codec_configure); | 1654 | EXPORT_SYMBOL_GPL(snd_hda_codec_configure); |
1585 | 1655 | ||
1586 | /* update the stream-id if changed */ | 1656 | /* update the stream-id if changed */ |
1587 | static void update_pcm_stream_id(struct hda_codec *codec, | 1657 | static void update_pcm_stream_id(struct hda_codec *codec, |
@@ -1668,7 +1738,7 @@ void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid, | |||
1668 | } | 1738 | } |
1669 | } | 1739 | } |
1670 | } | 1740 | } |
1671 | EXPORT_SYMBOL_HDA(snd_hda_codec_setup_stream); | 1741 | EXPORT_SYMBOL_GPL(snd_hda_codec_setup_stream); |
1672 | 1742 | ||
1673 | static void really_cleanup_stream(struct hda_codec *codec, | 1743 | static void really_cleanup_stream(struct hda_codec *codec, |
1674 | struct hda_cvt_setup *q); | 1744 | struct hda_cvt_setup *q); |
@@ -1703,7 +1773,7 @@ void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid, | |||
1703 | p->active = 0; | 1773 | p->active = 0; |
1704 | } | 1774 | } |
1705 | } | 1775 | } |
1706 | EXPORT_SYMBOL_HDA(__snd_hda_codec_cleanup_stream); | 1776 | EXPORT_SYMBOL_GPL(__snd_hda_codec_cleanup_stream); |
1707 | 1777 | ||
1708 | static void really_cleanup_stream(struct hda_codec *codec, | 1778 | static void really_cleanup_stream(struct hda_codec *codec, |
1709 | struct hda_cvt_setup *q) | 1779 | struct hda_cvt_setup *q) |
@@ -1891,7 +1961,7 @@ u32 query_amp_caps(struct hda_codec *codec, hda_nid_t nid, int direction) | |||
1891 | HDA_HASH_KEY(nid, direction, 0), | 1961 | HDA_HASH_KEY(nid, direction, 0), |
1892 | read_amp_cap); | 1962 | read_amp_cap); |
1893 | } | 1963 | } |
1894 | EXPORT_SYMBOL_HDA(query_amp_caps); | 1964 | EXPORT_SYMBOL_GPL(query_amp_caps); |
1895 | 1965 | ||
1896 | /** | 1966 | /** |
1897 | * snd_hda_override_amp_caps - Override the AMP capabilities | 1967 | * snd_hda_override_amp_caps - Override the AMP capabilities |
@@ -1911,7 +1981,7 @@ int snd_hda_override_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir, | |||
1911 | { | 1981 | { |
1912 | return write_caps_hash(codec, HDA_HASH_KEY(nid, dir, 0), caps); | 1982 | return write_caps_hash(codec, HDA_HASH_KEY(nid, dir, 0), caps); |
1913 | } | 1983 | } |
1914 | EXPORT_SYMBOL_HDA(snd_hda_override_amp_caps); | 1984 | EXPORT_SYMBOL_GPL(snd_hda_override_amp_caps); |
1915 | 1985 | ||
1916 | static unsigned int read_pin_cap(struct hda_codec *codec, hda_nid_t nid, | 1986 | static unsigned int read_pin_cap(struct hda_codec *codec, hda_nid_t nid, |
1917 | int dir) | 1987 | int dir) |
@@ -1935,7 +2005,7 @@ u32 snd_hda_query_pin_caps(struct hda_codec *codec, hda_nid_t nid) | |||
1935 | return query_caps_hash(codec, nid, 0, HDA_HASH_PINCAP_KEY(nid), | 2005 | return query_caps_hash(codec, nid, 0, HDA_HASH_PINCAP_KEY(nid), |
1936 | read_pin_cap); | 2006 | read_pin_cap); |
1937 | } | 2007 | } |
1938 | EXPORT_SYMBOL_HDA(snd_hda_query_pin_caps); | 2008 | EXPORT_SYMBOL_GPL(snd_hda_query_pin_caps); |
1939 | 2009 | ||
1940 | /** | 2010 | /** |
1941 | * snd_hda_override_pin_caps - Override the pin capabilities | 2011 | * snd_hda_override_pin_caps - Override the pin capabilities |
@@ -1952,7 +2022,7 @@ int snd_hda_override_pin_caps(struct hda_codec *codec, hda_nid_t nid, | |||
1952 | { | 2022 | { |
1953 | return write_caps_hash(codec, HDA_HASH_PINCAP_KEY(nid), caps); | 2023 | return write_caps_hash(codec, HDA_HASH_PINCAP_KEY(nid), caps); |
1954 | } | 2024 | } |
1955 | EXPORT_SYMBOL_HDA(snd_hda_override_pin_caps); | 2025 | EXPORT_SYMBOL_GPL(snd_hda_override_pin_caps); |
1956 | 2026 | ||
1957 | /* read or sync the hash value with the current value; | 2027 | /* read or sync the hash value with the current value; |
1958 | * call within hash_mutex | 2028 | * call within hash_mutex |
@@ -2033,7 +2103,7 @@ int snd_hda_codec_amp_read(struct hda_codec *codec, hda_nid_t nid, int ch, | |||
2033 | mutex_unlock(&codec->hash_mutex); | 2103 | mutex_unlock(&codec->hash_mutex); |
2034 | return val; | 2104 | return val; |
2035 | } | 2105 | } |
2036 | EXPORT_SYMBOL_HDA(snd_hda_codec_amp_read); | 2106 | EXPORT_SYMBOL_GPL(snd_hda_codec_amp_read); |
2037 | 2107 | ||
2038 | static int codec_amp_update(struct hda_codec *codec, hda_nid_t nid, int ch, | 2108 | static int codec_amp_update(struct hda_codec *codec, hda_nid_t nid, int ch, |
2039 | int direction, int idx, int mask, int val, | 2109 | int direction, int idx, int mask, int val, |
@@ -2085,7 +2155,7 @@ int snd_hda_codec_amp_update(struct hda_codec *codec, hda_nid_t nid, int ch, | |||
2085 | { | 2155 | { |
2086 | return codec_amp_update(codec, nid, ch, direction, idx, mask, val, false); | 2156 | return codec_amp_update(codec, nid, ch, direction, idx, mask, val, false); |
2087 | } | 2157 | } |
2088 | EXPORT_SYMBOL_HDA(snd_hda_codec_amp_update); | 2158 | EXPORT_SYMBOL_GPL(snd_hda_codec_amp_update); |
2089 | 2159 | ||
2090 | /** | 2160 | /** |
2091 | * snd_hda_codec_amp_stereo - update the AMP stereo values | 2161 | * snd_hda_codec_amp_stereo - update the AMP stereo values |
@@ -2111,7 +2181,7 @@ int snd_hda_codec_amp_stereo(struct hda_codec *codec, hda_nid_t nid, | |||
2111 | idx, mask, val); | 2181 | idx, mask, val); |
2112 | return ret; | 2182 | return ret; |
2113 | } | 2183 | } |
2114 | EXPORT_SYMBOL_HDA(snd_hda_codec_amp_stereo); | 2184 | EXPORT_SYMBOL_GPL(snd_hda_codec_amp_stereo); |
2115 | 2185 | ||
2116 | /* Works like snd_hda_codec_amp_update() but it writes the value only at | 2186 | /* Works like snd_hda_codec_amp_update() but it writes the value only at |
2117 | * the first access. If the amp was already initialized / updated beforehand, | 2187 | * the first access. If the amp was already initialized / updated beforehand, |
@@ -2122,7 +2192,7 @@ int snd_hda_codec_amp_init(struct hda_codec *codec, hda_nid_t nid, int ch, | |||
2122 | { | 2192 | { |
2123 | return codec_amp_update(codec, nid, ch, dir, idx, mask, val, true); | 2193 | return codec_amp_update(codec, nid, ch, dir, idx, mask, val, true); |
2124 | } | 2194 | } |
2125 | EXPORT_SYMBOL_HDA(snd_hda_codec_amp_init); | 2195 | EXPORT_SYMBOL_GPL(snd_hda_codec_amp_init); |
2126 | 2196 | ||
2127 | int snd_hda_codec_amp_init_stereo(struct hda_codec *codec, hda_nid_t nid, | 2197 | int snd_hda_codec_amp_init_stereo(struct hda_codec *codec, hda_nid_t nid, |
2128 | int dir, int idx, int mask, int val) | 2198 | int dir, int idx, int mask, int val) |
@@ -2136,7 +2206,7 @@ int snd_hda_codec_amp_init_stereo(struct hda_codec *codec, hda_nid_t nid, | |||
2136 | idx, mask, val); | 2206 | idx, mask, val); |
2137 | return ret; | 2207 | return ret; |
2138 | } | 2208 | } |
2139 | EXPORT_SYMBOL_HDA(snd_hda_codec_amp_init_stereo); | 2209 | EXPORT_SYMBOL_GPL(snd_hda_codec_amp_init_stereo); |
2140 | 2210 | ||
2141 | /** | 2211 | /** |
2142 | * snd_hda_codec_resume_amp - Resume all AMP commands from the cache | 2212 | * snd_hda_codec_resume_amp - Resume all AMP commands from the cache |
@@ -2179,7 +2249,7 @@ void snd_hda_codec_resume_amp(struct hda_codec *codec) | |||
2179 | } | 2249 | } |
2180 | mutex_unlock(&codec->hash_mutex); | 2250 | mutex_unlock(&codec->hash_mutex); |
2181 | } | 2251 | } |
2182 | EXPORT_SYMBOL_HDA(snd_hda_codec_resume_amp); | 2252 | EXPORT_SYMBOL_GPL(snd_hda_codec_resume_amp); |
2183 | 2253 | ||
2184 | static u32 get_amp_max_value(struct hda_codec *codec, hda_nid_t nid, int dir, | 2254 | static u32 get_amp_max_value(struct hda_codec *codec, hda_nid_t nid, int dir, |
2185 | unsigned int ofs) | 2255 | unsigned int ofs) |
@@ -2219,7 +2289,7 @@ int snd_hda_mixer_amp_volume_info(struct snd_kcontrol *kcontrol, | |||
2219 | } | 2289 | } |
2220 | return 0; | 2290 | return 0; |
2221 | } | 2291 | } |
2222 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_volume_info); | 2292 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_volume_info); |
2223 | 2293 | ||
2224 | 2294 | ||
2225 | static inline unsigned int | 2295 | static inline unsigned int |
@@ -2276,7 +2346,7 @@ int snd_hda_mixer_amp_volume_get(struct snd_kcontrol *kcontrol, | |||
2276 | *valp = read_amp_value(codec, nid, 1, dir, idx, ofs); | 2346 | *valp = read_amp_value(codec, nid, 1, dir, idx, ofs); |
2277 | return 0; | 2347 | return 0; |
2278 | } | 2348 | } |
2279 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_volume_get); | 2349 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_volume_get); |
2280 | 2350 | ||
2281 | /** | 2351 | /** |
2282 | * snd_hda_mixer_amp_volume_put - Put callback for a standard AMP mixer volume | 2352 | * snd_hda_mixer_amp_volume_put - Put callback for a standard AMP mixer volume |
@@ -2306,7 +2376,7 @@ int snd_hda_mixer_amp_volume_put(struct snd_kcontrol *kcontrol, | |||
2306 | snd_hda_power_down(codec); | 2376 | snd_hda_power_down(codec); |
2307 | return change; | 2377 | return change; |
2308 | } | 2378 | } |
2309 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_volume_put); | 2379 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_volume_put); |
2310 | 2380 | ||
2311 | /** | 2381 | /** |
2312 | * snd_hda_mixer_amp_volume_put - TLV callback for a standard AMP mixer volume | 2382 | * snd_hda_mixer_amp_volume_put - TLV callback for a standard AMP mixer volume |
@@ -2344,7 +2414,7 @@ int snd_hda_mixer_amp_tlv(struct snd_kcontrol *kcontrol, int op_flag, | |||
2344 | return -EFAULT; | 2414 | return -EFAULT; |
2345 | return 0; | 2415 | return 0; |
2346 | } | 2416 | } |
2347 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_tlv); | 2417 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_tlv); |
2348 | 2418 | ||
2349 | /** | 2419 | /** |
2350 | * snd_hda_set_vmaster_tlv - Set TLV for a virtual master control | 2420 | * snd_hda_set_vmaster_tlv - Set TLV for a virtual master control |
@@ -2372,7 +2442,7 @@ void snd_hda_set_vmaster_tlv(struct hda_codec *codec, hda_nid_t nid, int dir, | |||
2372 | tlv[2] = -nums * step; | 2442 | tlv[2] = -nums * step; |
2373 | tlv[3] = step; | 2443 | tlv[3] = step; |
2374 | } | 2444 | } |
2375 | EXPORT_SYMBOL_HDA(snd_hda_set_vmaster_tlv); | 2445 | EXPORT_SYMBOL_GPL(snd_hda_set_vmaster_tlv); |
2376 | 2446 | ||
2377 | /* find a mixer control element with the given name */ | 2447 | /* find a mixer control element with the given name */ |
2378 | static struct snd_kcontrol * | 2448 | static struct snd_kcontrol * |
@@ -2401,7 +2471,7 @@ struct snd_kcontrol *snd_hda_find_mixer_ctl(struct hda_codec *codec, | |||
2401 | { | 2471 | { |
2402 | return find_mixer_ctl(codec, name, 0, 0); | 2472 | return find_mixer_ctl(codec, name, 0, 0); |
2403 | } | 2473 | } |
2404 | EXPORT_SYMBOL_HDA(snd_hda_find_mixer_ctl); | 2474 | EXPORT_SYMBOL_GPL(snd_hda_find_mixer_ctl); |
2405 | 2475 | ||
2406 | static int find_empty_mixer_ctl_idx(struct hda_codec *codec, const char *name, | 2476 | static int find_empty_mixer_ctl_idx(struct hda_codec *codec, const char *name, |
2407 | int start_idx) | 2477 | int start_idx) |
@@ -2461,7 +2531,7 @@ int snd_hda_ctl_add(struct hda_codec *codec, hda_nid_t nid, | |||
2461 | item->flags = flags; | 2531 | item->flags = flags; |
2462 | return 0; | 2532 | return 0; |
2463 | } | 2533 | } |
2464 | EXPORT_SYMBOL_HDA(snd_hda_ctl_add); | 2534 | EXPORT_SYMBOL_GPL(snd_hda_ctl_add); |
2465 | 2535 | ||
2466 | /** | 2536 | /** |
2467 | * snd_hda_add_nid - Assign a NID to a control element | 2537 | * snd_hda_add_nid - Assign a NID to a control element |
@@ -2492,7 +2562,7 @@ int snd_hda_add_nid(struct hda_codec *codec, struct snd_kcontrol *kctl, | |||
2492 | kctl->id.name, kctl->id.index, index); | 2562 | kctl->id.name, kctl->id.index, index); |
2493 | return -EINVAL; | 2563 | return -EINVAL; |
2494 | } | 2564 | } |
2495 | EXPORT_SYMBOL_HDA(snd_hda_add_nid); | 2565 | EXPORT_SYMBOL_GPL(snd_hda_add_nid); |
2496 | 2566 | ||
2497 | /** | 2567 | /** |
2498 | * snd_hda_ctls_clear - Clear all controls assigned to the given codec | 2568 | * snd_hda_ctls_clear - Clear all controls assigned to the given codec |
@@ -2543,7 +2613,7 @@ int snd_hda_lock_devices(struct hda_bus *bus) | |||
2543 | spin_unlock(&card->files_lock); | 2613 | spin_unlock(&card->files_lock); |
2544 | return -EINVAL; | 2614 | return -EINVAL; |
2545 | } | 2615 | } |
2546 | EXPORT_SYMBOL_HDA(snd_hda_lock_devices); | 2616 | EXPORT_SYMBOL_GPL(snd_hda_lock_devices); |
2547 | 2617 | ||
2548 | void snd_hda_unlock_devices(struct hda_bus *bus) | 2618 | void snd_hda_unlock_devices(struct hda_bus *bus) |
2549 | { | 2619 | { |
@@ -2554,7 +2624,7 @@ void snd_hda_unlock_devices(struct hda_bus *bus) | |||
2554 | card->shutdown = 0; | 2624 | card->shutdown = 0; |
2555 | spin_unlock(&card->files_lock); | 2625 | spin_unlock(&card->files_lock); |
2556 | } | 2626 | } |
2557 | EXPORT_SYMBOL_HDA(snd_hda_unlock_devices); | 2627 | EXPORT_SYMBOL_GPL(snd_hda_unlock_devices); |
2558 | 2628 | ||
2559 | /** | 2629 | /** |
2560 | * snd_hda_codec_reset - Clear all objects assigned to the codec | 2630 | * snd_hda_codec_reset - Clear all objects assigned to the codec |
@@ -2610,6 +2680,7 @@ int snd_hda_codec_reset(struct hda_codec *codec) | |||
2610 | codec->preset = NULL; | 2680 | codec->preset = NULL; |
2611 | codec->slave_dig_outs = NULL; | 2681 | codec->slave_dig_outs = NULL; |
2612 | codec->spdif_status_reset = 0; | 2682 | codec->spdif_status_reset = 0; |
2683 | unload_parser(codec); | ||
2613 | module_put(codec->owner); | 2684 | module_put(codec->owner); |
2614 | codec->owner = NULL; | 2685 | codec->owner = NULL; |
2615 | 2686 | ||
@@ -2777,7 +2848,7 @@ int __snd_hda_add_vmaster(struct hda_codec *codec, char *name, | |||
2777 | *ctl_ret = kctl; | 2848 | *ctl_ret = kctl; |
2778 | return 0; | 2849 | return 0; |
2779 | } | 2850 | } |
2780 | EXPORT_SYMBOL_HDA(__snd_hda_add_vmaster); | 2851 | EXPORT_SYMBOL_GPL(__snd_hda_add_vmaster); |
2781 | 2852 | ||
2782 | /* | 2853 | /* |
2783 | * mute-LED control using vmaster | 2854 | * mute-LED control using vmaster |
@@ -2854,7 +2925,7 @@ int snd_hda_add_vmaster_hook(struct hda_codec *codec, | |||
2854 | return -ENOMEM; | 2925 | return -ENOMEM; |
2855 | return snd_hda_ctl_add(codec, 0, kctl); | 2926 | return snd_hda_ctl_add(codec, 0, kctl); |
2856 | } | 2927 | } |
2857 | EXPORT_SYMBOL_HDA(snd_hda_add_vmaster_hook); | 2928 | EXPORT_SYMBOL_GPL(snd_hda_add_vmaster_hook); |
2858 | 2929 | ||
2859 | /* | 2930 | /* |
2860 | * Call the hook with the current value for synchronization | 2931 | * Call the hook with the current value for synchronization |
@@ -2878,7 +2949,7 @@ void snd_hda_sync_vmaster_hook(struct hda_vmaster_mute_hook *hook) | |||
2878 | break; | 2949 | break; |
2879 | } | 2950 | } |
2880 | } | 2951 | } |
2881 | EXPORT_SYMBOL_HDA(snd_hda_sync_vmaster_hook); | 2952 | EXPORT_SYMBOL_GPL(snd_hda_sync_vmaster_hook); |
2882 | 2953 | ||
2883 | 2954 | ||
2884 | /** | 2955 | /** |
@@ -2898,7 +2969,7 @@ int snd_hda_mixer_amp_switch_info(struct snd_kcontrol *kcontrol, | |||
2898 | uinfo->value.integer.max = 1; | 2969 | uinfo->value.integer.max = 1; |
2899 | return 0; | 2970 | return 0; |
2900 | } | 2971 | } |
2901 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_switch_info); | 2972 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_switch_info); |
2902 | 2973 | ||
2903 | /** | 2974 | /** |
2904 | * snd_hda_mixer_amp_switch_get - Get callback for a standard AMP mixer switch | 2975 | * snd_hda_mixer_amp_switch_get - Get callback for a standard AMP mixer switch |
@@ -2924,7 +2995,7 @@ int snd_hda_mixer_amp_switch_get(struct snd_kcontrol *kcontrol, | |||
2924 | HDA_AMP_MUTE) ? 0 : 1; | 2995 | HDA_AMP_MUTE) ? 0 : 1; |
2925 | return 0; | 2996 | return 0; |
2926 | } | 2997 | } |
2927 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_switch_get); | 2998 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_switch_get); |
2928 | 2999 | ||
2929 | /** | 3000 | /** |
2930 | * snd_hda_mixer_amp_switch_put - Put callback for a standard AMP mixer switch | 3001 | * snd_hda_mixer_amp_switch_put - Put callback for a standard AMP mixer switch |
@@ -2958,7 +3029,7 @@ int snd_hda_mixer_amp_switch_put(struct snd_kcontrol *kcontrol, | |||
2958 | snd_hda_power_down(codec); | 3029 | snd_hda_power_down(codec); |
2959 | return change; | 3030 | return change; |
2960 | } | 3031 | } |
2961 | EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_switch_put); | 3032 | EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_switch_put); |
2962 | 3033 | ||
2963 | /* | 3034 | /* |
2964 | * bound volume controls | 3035 | * bound volume controls |
@@ -2990,7 +3061,7 @@ int snd_hda_mixer_bind_switch_get(struct snd_kcontrol *kcontrol, | |||
2990 | mutex_unlock(&codec->control_mutex); | 3061 | mutex_unlock(&codec->control_mutex); |
2991 | return err; | 3062 | return err; |
2992 | } | 3063 | } |
2993 | EXPORT_SYMBOL_HDA(snd_hda_mixer_bind_switch_get); | 3064 | EXPORT_SYMBOL_GPL(snd_hda_mixer_bind_switch_get); |
2994 | 3065 | ||
2995 | /** | 3066 | /** |
2996 | * snd_hda_mixer_bind_switch_put - Put callback for a bound volume control | 3067 | * snd_hda_mixer_bind_switch_put - Put callback for a bound volume control |
@@ -3020,7 +3091,7 @@ int snd_hda_mixer_bind_switch_put(struct snd_kcontrol *kcontrol, | |||
3020 | mutex_unlock(&codec->control_mutex); | 3091 | mutex_unlock(&codec->control_mutex); |
3021 | return err < 0 ? err : change; | 3092 | return err < 0 ? err : change; |
3022 | } | 3093 | } |
3023 | EXPORT_SYMBOL_HDA(snd_hda_mixer_bind_switch_put); | 3094 | EXPORT_SYMBOL_GPL(snd_hda_mixer_bind_switch_put); |
3024 | 3095 | ||
3025 | /** | 3096 | /** |
3026 | * snd_hda_mixer_bind_ctls_info - Info callback for a generic bound control | 3097 | * snd_hda_mixer_bind_ctls_info - Info callback for a generic bound control |
@@ -3043,7 +3114,7 @@ int snd_hda_mixer_bind_ctls_info(struct snd_kcontrol *kcontrol, | |||
3043 | mutex_unlock(&codec->control_mutex); | 3114 | mutex_unlock(&codec->control_mutex); |
3044 | return err; | 3115 | return err; |
3045 | } | 3116 | } |
3046 | EXPORT_SYMBOL_HDA(snd_hda_mixer_bind_ctls_info); | 3117 | EXPORT_SYMBOL_GPL(snd_hda_mixer_bind_ctls_info); |
3047 | 3118 | ||
3048 | /** | 3119 | /** |
3049 | * snd_hda_mixer_bind_ctls_get - Get callback for a generic bound control | 3120 | * snd_hda_mixer_bind_ctls_get - Get callback for a generic bound control |
@@ -3066,7 +3137,7 @@ int snd_hda_mixer_bind_ctls_get(struct snd_kcontrol *kcontrol, | |||
3066 | mutex_unlock(&codec->control_mutex); | 3137 | mutex_unlock(&codec->control_mutex); |
3067 | return err; | 3138 | return err; |
3068 | } | 3139 | } |
3069 | EXPORT_SYMBOL_HDA(snd_hda_mixer_bind_ctls_get); | 3140 | EXPORT_SYMBOL_GPL(snd_hda_mixer_bind_ctls_get); |
3070 | 3141 | ||
3071 | /** | 3142 | /** |
3072 | * snd_hda_mixer_bind_ctls_put - Put callback for a generic bound control | 3143 | * snd_hda_mixer_bind_ctls_put - Put callback for a generic bound control |
@@ -3095,7 +3166,7 @@ int snd_hda_mixer_bind_ctls_put(struct snd_kcontrol *kcontrol, | |||
3095 | mutex_unlock(&codec->control_mutex); | 3166 | mutex_unlock(&codec->control_mutex); |
3096 | return err < 0 ? err : change; | 3167 | return err < 0 ? err : change; |
3097 | } | 3168 | } |
3098 | EXPORT_SYMBOL_HDA(snd_hda_mixer_bind_ctls_put); | 3169 | EXPORT_SYMBOL_GPL(snd_hda_mixer_bind_ctls_put); |
3099 | 3170 | ||
3100 | /** | 3171 | /** |
3101 | * snd_hda_mixer_bind_tlv - TLV callback for a generic bound control | 3172 | * snd_hda_mixer_bind_tlv - TLV callback for a generic bound control |
@@ -3118,7 +3189,7 @@ int snd_hda_mixer_bind_tlv(struct snd_kcontrol *kcontrol, int op_flag, | |||
3118 | mutex_unlock(&codec->control_mutex); | 3189 | mutex_unlock(&codec->control_mutex); |
3119 | return err; | 3190 | return err; |
3120 | } | 3191 | } |
3121 | EXPORT_SYMBOL_HDA(snd_hda_mixer_bind_tlv); | 3192 | EXPORT_SYMBOL_GPL(snd_hda_mixer_bind_tlv); |
3122 | 3193 | ||
3123 | struct hda_ctl_ops snd_hda_bind_vol = { | 3194 | struct hda_ctl_ops snd_hda_bind_vol = { |
3124 | .info = snd_hda_mixer_amp_volume_info, | 3195 | .info = snd_hda_mixer_amp_volume_info, |
@@ -3126,7 +3197,7 @@ struct hda_ctl_ops snd_hda_bind_vol = { | |||
3126 | .put = snd_hda_mixer_amp_volume_put, | 3197 | .put = snd_hda_mixer_amp_volume_put, |
3127 | .tlv = snd_hda_mixer_amp_tlv | 3198 | .tlv = snd_hda_mixer_amp_tlv |
3128 | }; | 3199 | }; |
3129 | EXPORT_SYMBOL_HDA(snd_hda_bind_vol); | 3200 | EXPORT_SYMBOL_GPL(snd_hda_bind_vol); |
3130 | 3201 | ||
3131 | struct hda_ctl_ops snd_hda_bind_sw = { | 3202 | struct hda_ctl_ops snd_hda_bind_sw = { |
3132 | .info = snd_hda_mixer_amp_switch_info, | 3203 | .info = snd_hda_mixer_amp_switch_info, |
@@ -3134,7 +3205,7 @@ struct hda_ctl_ops snd_hda_bind_sw = { | |||
3134 | .put = snd_hda_mixer_amp_switch_put, | 3205 | .put = snd_hda_mixer_amp_switch_put, |
3135 | .tlv = snd_hda_mixer_amp_tlv | 3206 | .tlv = snd_hda_mixer_amp_tlv |
3136 | }; | 3207 | }; |
3137 | EXPORT_SYMBOL_HDA(snd_hda_bind_sw); | 3208 | EXPORT_SYMBOL_GPL(snd_hda_bind_sw); |
3138 | 3209 | ||
3139 | /* | 3210 | /* |
3140 | * SPDIF out controls | 3211 | * SPDIF out controls |
@@ -3438,7 +3509,7 @@ int snd_hda_create_dig_out_ctls(struct hda_codec *codec, | |||
3438 | spdif->status = convert_to_spdif_status(spdif->ctls); | 3509 | spdif->status = convert_to_spdif_status(spdif->ctls); |
3439 | return 0; | 3510 | return 0; |
3440 | } | 3511 | } |
3441 | EXPORT_SYMBOL_HDA(snd_hda_create_dig_out_ctls); | 3512 | EXPORT_SYMBOL_GPL(snd_hda_create_dig_out_ctls); |
3442 | 3513 | ||
3443 | /* get the hda_spdif_out entry from the given NID | 3514 | /* get the hda_spdif_out entry from the given NID |
3444 | * call within spdif_mutex lock | 3515 | * call within spdif_mutex lock |
@@ -3455,7 +3526,7 @@ struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec, | |||
3455 | } | 3526 | } |
3456 | return NULL; | 3527 | return NULL; |
3457 | } | 3528 | } |
3458 | EXPORT_SYMBOL_HDA(snd_hda_spdif_out_of_nid); | 3529 | EXPORT_SYMBOL_GPL(snd_hda_spdif_out_of_nid); |
3459 | 3530 | ||
3460 | void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx) | 3531 | void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx) |
3461 | { | 3532 | { |
@@ -3466,7 +3537,7 @@ void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx) | |||
3466 | spdif->nid = (u16)-1; | 3537 | spdif->nid = (u16)-1; |
3467 | mutex_unlock(&codec->spdif_mutex); | 3538 | mutex_unlock(&codec->spdif_mutex); |
3468 | } | 3539 | } |
3469 | EXPORT_SYMBOL_HDA(snd_hda_spdif_ctls_unassign); | 3540 | EXPORT_SYMBOL_GPL(snd_hda_spdif_ctls_unassign); |
3470 | 3541 | ||
3471 | void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid) | 3542 | void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid) |
3472 | { | 3543 | { |
@@ -3482,7 +3553,7 @@ void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid) | |||
3482 | } | 3553 | } |
3483 | mutex_unlock(&codec->spdif_mutex); | 3554 | mutex_unlock(&codec->spdif_mutex); |
3484 | } | 3555 | } |
3485 | EXPORT_SYMBOL_HDA(snd_hda_spdif_ctls_assign); | 3556 | EXPORT_SYMBOL_GPL(snd_hda_spdif_ctls_assign); |
3486 | 3557 | ||
3487 | /* | 3558 | /* |
3488 | * SPDIF sharing with analog output | 3559 | * SPDIF sharing with analog output |
@@ -3530,7 +3601,7 @@ int snd_hda_create_spdif_share_sw(struct hda_codec *codec, | |||
3530 | /* ATTENTION: here mout is passed as private_data, instead of codec */ | 3601 | /* ATTENTION: here mout is passed as private_data, instead of codec */ |
3531 | return snd_hda_ctl_add(codec, mout->dig_out_nid, kctl); | 3602 | return snd_hda_ctl_add(codec, mout->dig_out_nid, kctl); |
3532 | } | 3603 | } |
3533 | EXPORT_SYMBOL_HDA(snd_hda_create_spdif_share_sw); | 3604 | EXPORT_SYMBOL_GPL(snd_hda_create_spdif_share_sw); |
3534 | 3605 | ||
3535 | /* | 3606 | /* |
3536 | * SPDIF input | 3607 | * SPDIF input |
@@ -3638,7 +3709,7 @@ int snd_hda_create_spdif_in_ctls(struct hda_codec *codec, hda_nid_t nid) | |||
3638 | AC_DIG1_ENABLE; | 3709 | AC_DIG1_ENABLE; |
3639 | return 0; | 3710 | return 0; |
3640 | } | 3711 | } |
3641 | EXPORT_SYMBOL_HDA(snd_hda_create_spdif_in_ctls); | 3712 | EXPORT_SYMBOL_GPL(snd_hda_create_spdif_in_ctls); |
3642 | 3713 | ||
3643 | /* | 3714 | /* |
3644 | * command cache | 3715 | * command cache |
@@ -3689,7 +3760,7 @@ int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid, | |||
3689 | mutex_unlock(&codec->bus->cmd_mutex); | 3760 | mutex_unlock(&codec->bus->cmd_mutex); |
3690 | return 0; | 3761 | return 0; |
3691 | } | 3762 | } |
3692 | EXPORT_SYMBOL_HDA(snd_hda_codec_write_cache); | 3763 | EXPORT_SYMBOL_GPL(snd_hda_codec_write_cache); |
3693 | 3764 | ||
3694 | /** | 3765 | /** |
3695 | * snd_hda_codec_update_cache - check cache and write the cmd only when needed | 3766 | * snd_hda_codec_update_cache - check cache and write the cmd only when needed |
@@ -3724,7 +3795,7 @@ int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid, | |||
3724 | mutex_unlock(&codec->bus->cmd_mutex); | 3795 | mutex_unlock(&codec->bus->cmd_mutex); |
3725 | return snd_hda_codec_write_cache(codec, nid, flags, verb, parm); | 3796 | return snd_hda_codec_write_cache(codec, nid, flags, verb, parm); |
3726 | } | 3797 | } |
3727 | EXPORT_SYMBOL_HDA(snd_hda_codec_update_cache); | 3798 | EXPORT_SYMBOL_GPL(snd_hda_codec_update_cache); |
3728 | 3799 | ||
3729 | /** | 3800 | /** |
3730 | * snd_hda_codec_resume_cache - Resume the all commands from the cache | 3801 | * snd_hda_codec_resume_cache - Resume the all commands from the cache |
@@ -3756,7 +3827,7 @@ void snd_hda_codec_resume_cache(struct hda_codec *codec) | |||
3756 | } | 3827 | } |
3757 | mutex_unlock(&codec->hash_mutex); | 3828 | mutex_unlock(&codec->hash_mutex); |
3758 | } | 3829 | } |
3759 | EXPORT_SYMBOL_HDA(snd_hda_codec_resume_cache); | 3830 | EXPORT_SYMBOL_GPL(snd_hda_codec_resume_cache); |
3760 | 3831 | ||
3761 | /** | 3832 | /** |
3762 | * snd_hda_sequence_write_cache - sequence writes with caching | 3833 | * snd_hda_sequence_write_cache - sequence writes with caching |
@@ -3774,7 +3845,7 @@ void snd_hda_sequence_write_cache(struct hda_codec *codec, | |||
3774 | snd_hda_codec_write_cache(codec, seq->nid, 0, seq->verb, | 3845 | snd_hda_codec_write_cache(codec, seq->nid, 0, seq->verb, |
3775 | seq->param); | 3846 | seq->param); |
3776 | } | 3847 | } |
3777 | EXPORT_SYMBOL_HDA(snd_hda_sequence_write_cache); | 3848 | EXPORT_SYMBOL_GPL(snd_hda_sequence_write_cache); |
3778 | 3849 | ||
3779 | /** | 3850 | /** |
3780 | * snd_hda_codec_flush_cache - Execute all pending (cached) amps / verbs | 3851 | * snd_hda_codec_flush_cache - Execute all pending (cached) amps / verbs |
@@ -3785,7 +3856,7 @@ void snd_hda_codec_flush_cache(struct hda_codec *codec) | |||
3785 | snd_hda_codec_resume_amp(codec); | 3856 | snd_hda_codec_resume_amp(codec); |
3786 | snd_hda_codec_resume_cache(codec); | 3857 | snd_hda_codec_resume_cache(codec); |
3787 | } | 3858 | } |
3788 | EXPORT_SYMBOL_HDA(snd_hda_codec_flush_cache); | 3859 | EXPORT_SYMBOL_GPL(snd_hda_codec_flush_cache); |
3789 | 3860 | ||
3790 | void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg, | 3861 | void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg, |
3791 | unsigned int power_state) | 3862 | unsigned int power_state) |
@@ -3807,7 +3878,7 @@ void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg, | |||
3807 | state); | 3878 | state); |
3808 | } | 3879 | } |
3809 | } | 3880 | } |
3810 | EXPORT_SYMBOL_HDA(snd_hda_codec_set_power_to_all); | 3881 | EXPORT_SYMBOL_GPL(snd_hda_codec_set_power_to_all); |
3811 | 3882 | ||
3812 | /* | 3883 | /* |
3813 | * supported power states check | 3884 | * supported power states check |
@@ -3856,6 +3927,8 @@ unsigned int snd_hda_codec_eapd_power_filter(struct hda_codec *codec, | |||
3856 | hda_nid_t nid, | 3927 | hda_nid_t nid, |
3857 | unsigned int power_state) | 3928 | unsigned int power_state) |
3858 | { | 3929 | { |
3930 | if (nid == codec->afg || nid == codec->mfg) | ||
3931 | return power_state; | ||
3859 | if (power_state == AC_PWRST_D3 && | 3932 | if (power_state == AC_PWRST_D3 && |
3860 | get_wcaps_type(get_wcaps(codec, nid)) == AC_WID_PIN && | 3933 | get_wcaps_type(get_wcaps(codec, nid)) == AC_WID_PIN && |
3861 | (snd_hda_query_pin_caps(codec, nid) & AC_PINCAP_EAPD)) { | 3934 | (snd_hda_query_pin_caps(codec, nid) & AC_PINCAP_EAPD)) { |
@@ -3866,7 +3939,7 @@ unsigned int snd_hda_codec_eapd_power_filter(struct hda_codec *codec, | |||
3866 | } | 3939 | } |
3867 | return power_state; | 3940 | return power_state; |
3868 | } | 3941 | } |
3869 | EXPORT_SYMBOL_HDA(snd_hda_codec_eapd_power_filter); | 3942 | EXPORT_SYMBOL_GPL(snd_hda_codec_eapd_power_filter); |
3870 | 3943 | ||
3871 | /* | 3944 | /* |
3872 | * set power state of the codec, and return the power state | 3945 | * set power state of the codec, and return the power state |
@@ -3881,8 +3954,10 @@ static unsigned int hda_set_power_state(struct hda_codec *codec, | |||
3881 | 3954 | ||
3882 | /* this delay seems necessary to avoid click noise at power-down */ | 3955 | /* this delay seems necessary to avoid click noise at power-down */ |
3883 | if (power_state == AC_PWRST_D3) { | 3956 | if (power_state == AC_PWRST_D3) { |
3884 | /* transition time less than 10ms for power down */ | 3957 | if (codec->depop_delay < 0) |
3885 | msleep(codec->epss ? 10 : 100); | 3958 | msleep(codec->epss ? 10 : 100); |
3959 | else if (codec->depop_delay > 0) | ||
3960 | msleep(codec->depop_delay); | ||
3886 | flags = HDA_RW_NO_RESPONSE_FALLBACK; | 3961 | flags = HDA_RW_NO_RESPONSE_FALLBACK; |
3887 | } | 3962 | } |
3888 | 3963 | ||
@@ -3892,9 +3967,13 @@ static unsigned int hda_set_power_state(struct hda_codec *codec, | |||
3892 | codec->patch_ops.set_power_state(codec, fg, | 3967 | codec->patch_ops.set_power_state(codec, fg, |
3893 | power_state); | 3968 | power_state); |
3894 | else { | 3969 | else { |
3895 | snd_hda_codec_read(codec, fg, flags, | 3970 | state = power_state; |
3896 | AC_VERB_SET_POWER_STATE, | 3971 | if (codec->power_filter) |
3897 | power_state); | 3972 | state = codec->power_filter(codec, fg, state); |
3973 | if (state == power_state || power_state != AC_PWRST_D3) | ||
3974 | snd_hda_codec_read(codec, fg, flags, | ||
3975 | AC_VERB_SET_POWER_STATE, | ||
3976 | state); | ||
3898 | snd_hda_codec_set_power_to_all(codec, fg, power_state); | 3977 | snd_hda_codec_set_power_to_all(codec, fg, power_state); |
3899 | } | 3978 | } |
3900 | state = hda_sync_power_state(codec, fg, power_state); | 3979 | state = hda_sync_power_state(codec, fg, power_state); |
@@ -4000,10 +4079,6 @@ static void hda_call_codec_resume(struct hda_codec *codec) | |||
4000 | * in the resume / power-save sequence | 4079 | * in the resume / power-save sequence |
4001 | */ | 4080 | */ |
4002 | hda_keep_power_on(codec); | 4081 | hda_keep_power_on(codec); |
4003 | if (codec->pm_down_notified) { | ||
4004 | codec->pm_down_notified = 0; | ||
4005 | hda_call_pm_notify(codec->bus, true); | ||
4006 | } | ||
4007 | hda_set_power_state(codec, AC_PWRST_D0); | 4082 | hda_set_power_state(codec, AC_PWRST_D0); |
4008 | restore_shutup_pins(codec); | 4083 | restore_shutup_pins(codec); |
4009 | hda_exec_init_verbs(codec); | 4084 | hda_exec_init_verbs(codec); |
@@ -4055,7 +4130,7 @@ int snd_hda_build_controls(struct hda_bus *bus) | |||
4055 | } | 4130 | } |
4056 | return 0; | 4131 | return 0; |
4057 | } | 4132 | } |
4058 | EXPORT_SYMBOL_HDA(snd_hda_build_controls); | 4133 | EXPORT_SYMBOL_GPL(snd_hda_build_controls); |
4059 | 4134 | ||
4060 | /* | 4135 | /* |
4061 | * add standard channel maps if not specified | 4136 | * add standard channel maps if not specified |
@@ -4228,7 +4303,7 @@ unsigned int snd_hda_calc_stream_format(unsigned int rate, | |||
4228 | 4303 | ||
4229 | return val; | 4304 | return val; |
4230 | } | 4305 | } |
4231 | EXPORT_SYMBOL_HDA(snd_hda_calc_stream_format); | 4306 | EXPORT_SYMBOL_GPL(snd_hda_calc_stream_format); |
4232 | 4307 | ||
4233 | static unsigned int get_pcm_param(struct hda_codec *codec, hda_nid_t nid, | 4308 | static unsigned int get_pcm_param(struct hda_codec *codec, hda_nid_t nid, |
4234 | int dir) | 4309 | int dir) |
@@ -4374,7 +4449,7 @@ int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid, | |||
4374 | 4449 | ||
4375 | return 0; | 4450 | return 0; |
4376 | } | 4451 | } |
4377 | EXPORT_SYMBOL_HDA(snd_hda_query_supported_pcm); | 4452 | EXPORT_SYMBOL_GPL(snd_hda_query_supported_pcm); |
4378 | 4453 | ||
4379 | /** | 4454 | /** |
4380 | * snd_hda_is_supported_format - Check the validity of the format | 4455 | * snd_hda_is_supported_format - Check the validity of the format |
@@ -4441,7 +4516,7 @@ int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid, | |||
4441 | 4516 | ||
4442 | return 1; | 4517 | return 1; |
4443 | } | 4518 | } |
4444 | EXPORT_SYMBOL_HDA(snd_hda_is_supported_format); | 4519 | EXPORT_SYMBOL_GPL(snd_hda_is_supported_format); |
4445 | 4520 | ||
4446 | /* | 4521 | /* |
4447 | * PCM stuff | 4522 | * PCM stuff |
@@ -4519,7 +4594,7 @@ int snd_hda_codec_prepare(struct hda_codec *codec, | |||
4519 | mutex_unlock(&codec->bus->prepare_mutex); | 4594 | mutex_unlock(&codec->bus->prepare_mutex); |
4520 | return ret; | 4595 | return ret; |
4521 | } | 4596 | } |
4522 | EXPORT_SYMBOL_HDA(snd_hda_codec_prepare); | 4597 | EXPORT_SYMBOL_GPL(snd_hda_codec_prepare); |
4523 | 4598 | ||
4524 | void snd_hda_codec_cleanup(struct hda_codec *codec, | 4599 | void snd_hda_codec_cleanup(struct hda_codec *codec, |
4525 | struct hda_pcm_stream *hinfo, | 4600 | struct hda_pcm_stream *hinfo, |
@@ -4529,7 +4604,7 @@ void snd_hda_codec_cleanup(struct hda_codec *codec, | |||
4529 | hinfo->ops.cleanup(hinfo, codec, substream); | 4604 | hinfo->ops.cleanup(hinfo, codec, substream); |
4530 | mutex_unlock(&codec->bus->prepare_mutex); | 4605 | mutex_unlock(&codec->bus->prepare_mutex); |
4531 | } | 4606 | } |
4532 | EXPORT_SYMBOL_HDA(snd_hda_codec_cleanup); | 4607 | EXPORT_SYMBOL_GPL(snd_hda_codec_cleanup); |
4533 | 4608 | ||
4534 | /* global */ | 4609 | /* global */ |
4535 | const char *snd_hda_pcm_type_name[HDA_PCM_NTYPES] = { | 4610 | const char *snd_hda_pcm_type_name[HDA_PCM_NTYPES] = { |
@@ -4687,7 +4762,7 @@ int snd_hda_build_pcms(struct hda_bus *bus) | |||
4687 | } | 4762 | } |
4688 | return 0; | 4763 | return 0; |
4689 | } | 4764 | } |
4690 | EXPORT_SYMBOL_HDA(snd_hda_build_pcms); | 4765 | EXPORT_SYMBOL_GPL(snd_hda_build_pcms); |
4691 | 4766 | ||
4692 | /** | 4767 | /** |
4693 | * snd_hda_check_board_config - compare the current codec with the config table | 4768 | * snd_hda_check_board_config - compare the current codec with the config table |
@@ -4743,7 +4818,7 @@ int snd_hda_check_board_config(struct hda_codec *codec, | |||
4743 | } | 4818 | } |
4744 | return -1; | 4819 | return -1; |
4745 | } | 4820 | } |
4746 | EXPORT_SYMBOL_HDA(snd_hda_check_board_config); | 4821 | EXPORT_SYMBOL_GPL(snd_hda_check_board_config); |
4747 | 4822 | ||
4748 | /** | 4823 | /** |
4749 | * snd_hda_check_board_codec_sid_config - compare the current codec | 4824 | * snd_hda_check_board_codec_sid_config - compare the current codec |
@@ -4804,7 +4879,7 @@ int snd_hda_check_board_codec_sid_config(struct hda_codec *codec, | |||
4804 | } | 4879 | } |
4805 | return -1; | 4880 | return -1; |
4806 | } | 4881 | } |
4807 | EXPORT_SYMBOL_HDA(snd_hda_check_board_codec_sid_config); | 4882 | EXPORT_SYMBOL_GPL(snd_hda_check_board_codec_sid_config); |
4808 | 4883 | ||
4809 | /** | 4884 | /** |
4810 | * snd_hda_add_new_ctls - create controls from the array | 4885 | * snd_hda_add_new_ctls - create controls from the array |
@@ -4854,7 +4929,7 @@ int snd_hda_add_new_ctls(struct hda_codec *codec, | |||
4854 | } | 4929 | } |
4855 | return 0; | 4930 | return 0; |
4856 | } | 4931 | } |
4857 | EXPORT_SYMBOL_HDA(snd_hda_add_new_ctls); | 4932 | EXPORT_SYMBOL_GPL(snd_hda_add_new_ctls); |
4858 | 4933 | ||
4859 | #ifdef CONFIG_PM | 4934 | #ifdef CONFIG_PM |
4860 | static void hda_power_work(struct work_struct *work) | 4935 | static void hda_power_work(struct work_struct *work) |
@@ -4877,11 +4952,8 @@ static void hda_power_work(struct work_struct *work) | |||
4877 | spin_unlock(&codec->power_lock); | 4952 | spin_unlock(&codec->power_lock); |
4878 | 4953 | ||
4879 | state = hda_call_codec_suspend(codec, true); | 4954 | state = hda_call_codec_suspend(codec, true); |
4880 | if (!codec->pm_down_notified && | 4955 | if (!bus->power_keep_link_on && (state & AC_PWRST_CLK_STOP_OK)) |
4881 | !bus->power_keep_link_on && (state & AC_PWRST_CLK_STOP_OK)) { | 4956 | hda_call_pm_notify(codec, false); |
4882 | codec->pm_down_notified = 1; | ||
4883 | hda_call_pm_notify(bus, false); | ||
4884 | } | ||
4885 | } | 4957 | } |
4886 | 4958 | ||
4887 | static void hda_keep_power_on(struct hda_codec *codec) | 4959 | static void hda_keep_power_on(struct hda_codec *codec) |
@@ -4891,6 +4963,7 @@ static void hda_keep_power_on(struct hda_codec *codec) | |||
4891 | codec->power_on = 1; | 4963 | codec->power_on = 1; |
4892 | codec->power_jiffies = jiffies; | 4964 | codec->power_jiffies = jiffies; |
4893 | spin_unlock(&codec->power_lock); | 4965 | spin_unlock(&codec->power_lock); |
4966 | hda_call_pm_notify(codec, true); | ||
4894 | } | 4967 | } |
4895 | 4968 | ||
4896 | /* update the power on/off account with the current jiffies */ | 4969 | /* update the power on/off account with the current jiffies */ |
@@ -4910,8 +4983,6 @@ void snd_hda_update_power_acct(struct hda_codec *codec) | |||
4910 | /* call this with codec->power_lock held! */ | 4983 | /* call this with codec->power_lock held! */ |
4911 | static void __snd_hda_power_up(struct hda_codec *codec, bool wait_power_down) | 4984 | static void __snd_hda_power_up(struct hda_codec *codec, bool wait_power_down) |
4912 | { | 4985 | { |
4913 | struct hda_bus *bus = codec->bus; | ||
4914 | |||
4915 | /* Return if power_on or transitioning to power_on, unless currently | 4986 | /* Return if power_on or transitioning to power_on, unless currently |
4916 | * powering down. */ | 4987 | * powering down. */ |
4917 | if ((codec->power_on || codec->power_transition > 0) && | 4988 | if ((codec->power_on || codec->power_transition > 0) && |
@@ -4938,11 +5009,6 @@ static void __snd_hda_power_up(struct hda_codec *codec, bool wait_power_down) | |||
4938 | codec->power_transition = 1; /* avoid reentrance */ | 5009 | codec->power_transition = 1; /* avoid reentrance */ |
4939 | spin_unlock(&codec->power_lock); | 5010 | spin_unlock(&codec->power_lock); |
4940 | 5011 | ||
4941 | if (codec->pm_down_notified) { | ||
4942 | codec->pm_down_notified = 0; | ||
4943 | hda_call_pm_notify(bus, true); | ||
4944 | } | ||
4945 | |||
4946 | hda_call_codec_resume(codec); | 5012 | hda_call_codec_resume(codec); |
4947 | 5013 | ||
4948 | spin_lock(&codec->power_lock); | 5014 | spin_lock(&codec->power_lock); |
@@ -4985,7 +5051,7 @@ void snd_hda_power_save(struct hda_codec *codec, int delta, bool d3wait) | |||
4985 | __snd_hda_power_down(codec); | 5051 | __snd_hda_power_down(codec); |
4986 | spin_unlock(&codec->power_lock); | 5052 | spin_unlock(&codec->power_lock); |
4987 | } | 5053 | } |
4988 | EXPORT_SYMBOL_HDA(snd_hda_power_save); | 5054 | EXPORT_SYMBOL_GPL(snd_hda_power_save); |
4989 | 5055 | ||
4990 | /** | 5056 | /** |
4991 | * snd_hda_check_amp_list_power - Check the amp list and update the power | 5057 | * snd_hda_check_amp_list_power - Check the amp list and update the power |
@@ -5035,7 +5101,7 @@ int snd_hda_check_amp_list_power(struct hda_codec *codec, | |||
5035 | } | 5101 | } |
5036 | return 0; | 5102 | return 0; |
5037 | } | 5103 | } |
5038 | EXPORT_SYMBOL_HDA(snd_hda_check_amp_list_power); | 5104 | EXPORT_SYMBOL_GPL(snd_hda_check_amp_list_power); |
5039 | #endif | 5105 | #endif |
5040 | 5106 | ||
5041 | /* | 5107 | /* |
@@ -5059,7 +5125,7 @@ int snd_hda_ch_mode_info(struct hda_codec *codec, | |||
5059 | chmode[uinfo->value.enumerated.item].channels); | 5125 | chmode[uinfo->value.enumerated.item].channels); |
5060 | return 0; | 5126 | return 0; |
5061 | } | 5127 | } |
5062 | EXPORT_SYMBOL_HDA(snd_hda_ch_mode_info); | 5128 | EXPORT_SYMBOL_GPL(snd_hda_ch_mode_info); |
5063 | 5129 | ||
5064 | /** | 5130 | /** |
5065 | * snd_hda_ch_mode_get - Get callback helper for the channel mode enum | 5131 | * snd_hda_ch_mode_get - Get callback helper for the channel mode enum |
@@ -5080,7 +5146,7 @@ int snd_hda_ch_mode_get(struct hda_codec *codec, | |||
5080 | } | 5146 | } |
5081 | return 0; | 5147 | return 0; |
5082 | } | 5148 | } |
5083 | EXPORT_SYMBOL_HDA(snd_hda_ch_mode_get); | 5149 | EXPORT_SYMBOL_GPL(snd_hda_ch_mode_get); |
5084 | 5150 | ||
5085 | /** | 5151 | /** |
5086 | * snd_hda_ch_mode_put - Put callback helper for the channel mode enum | 5152 | * snd_hda_ch_mode_put - Put callback helper for the channel mode enum |
@@ -5104,7 +5170,7 @@ int snd_hda_ch_mode_put(struct hda_codec *codec, | |||
5104 | snd_hda_sequence_write_cache(codec, chmode[mode].sequence); | 5170 | snd_hda_sequence_write_cache(codec, chmode[mode].sequence); |
5105 | return 1; | 5171 | return 1; |
5106 | } | 5172 | } |
5107 | EXPORT_SYMBOL_HDA(snd_hda_ch_mode_put); | 5173 | EXPORT_SYMBOL_GPL(snd_hda_ch_mode_put); |
5108 | 5174 | ||
5109 | /* | 5175 | /* |
5110 | * input MUX helper | 5176 | * input MUX helper |
@@ -5129,7 +5195,7 @@ int snd_hda_input_mux_info(const struct hda_input_mux *imux, | |||
5129 | strcpy(uinfo->value.enumerated.name, imux->items[index].label); | 5195 | strcpy(uinfo->value.enumerated.name, imux->items[index].label); |
5130 | return 0; | 5196 | return 0; |
5131 | } | 5197 | } |
5132 | EXPORT_SYMBOL_HDA(snd_hda_input_mux_info); | 5198 | EXPORT_SYMBOL_GPL(snd_hda_input_mux_info); |
5133 | 5199 | ||
5134 | /** | 5200 | /** |
5135 | * snd_hda_input_mux_info_put - Put callback helper for the input-mux enum | 5201 | * snd_hda_input_mux_info_put - Put callback helper for the input-mux enum |
@@ -5154,7 +5220,7 @@ int snd_hda_input_mux_put(struct hda_codec *codec, | |||
5154 | *cur_val = idx; | 5220 | *cur_val = idx; |
5155 | return 1; | 5221 | return 1; |
5156 | } | 5222 | } |
5157 | EXPORT_SYMBOL_HDA(snd_hda_input_mux_put); | 5223 | EXPORT_SYMBOL_GPL(snd_hda_input_mux_put); |
5158 | 5224 | ||
5159 | 5225 | ||
5160 | /* | 5226 | /* |
@@ -5183,7 +5249,7 @@ int snd_hda_enum_helper_info(struct snd_kcontrol *kcontrol, | |||
5183 | texts[uinfo->value.enumerated.item]); | 5249 | texts[uinfo->value.enumerated.item]); |
5184 | return 0; | 5250 | return 0; |
5185 | } | 5251 | } |
5186 | EXPORT_SYMBOL_HDA(snd_hda_enum_helper_info); | 5252 | EXPORT_SYMBOL_GPL(snd_hda_enum_helper_info); |
5187 | 5253 | ||
5188 | /* | 5254 | /* |
5189 | * Multi-channel / digital-out PCM helper functions | 5255 | * Multi-channel / digital-out PCM helper functions |
@@ -5249,7 +5315,7 @@ void snd_hda_bus_reboot_notify(struct hda_bus *bus) | |||
5249 | codec->patch_ops.reboot_notify(codec); | 5315 | codec->patch_ops.reboot_notify(codec); |
5250 | } | 5316 | } |
5251 | } | 5317 | } |
5252 | EXPORT_SYMBOL_HDA(snd_hda_bus_reboot_notify); | 5318 | EXPORT_SYMBOL_GPL(snd_hda_bus_reboot_notify); |
5253 | 5319 | ||
5254 | /** | 5320 | /** |
5255 | * snd_hda_multi_out_dig_open - open the digital out in the exclusive mode | 5321 | * snd_hda_multi_out_dig_open - open the digital out in the exclusive mode |
@@ -5265,7 +5331,7 @@ int snd_hda_multi_out_dig_open(struct hda_codec *codec, | |||
5265 | mutex_unlock(&codec->spdif_mutex); | 5331 | mutex_unlock(&codec->spdif_mutex); |
5266 | return 0; | 5332 | return 0; |
5267 | } | 5333 | } |
5268 | EXPORT_SYMBOL_HDA(snd_hda_multi_out_dig_open); | 5334 | EXPORT_SYMBOL_GPL(snd_hda_multi_out_dig_open); |
5269 | 5335 | ||
5270 | /** | 5336 | /** |
5271 | * snd_hda_multi_out_dig_prepare - prepare the digital out stream | 5337 | * snd_hda_multi_out_dig_prepare - prepare the digital out stream |
@@ -5281,7 +5347,7 @@ int snd_hda_multi_out_dig_prepare(struct hda_codec *codec, | |||
5281 | mutex_unlock(&codec->spdif_mutex); | 5347 | mutex_unlock(&codec->spdif_mutex); |
5282 | return 0; | 5348 | return 0; |
5283 | } | 5349 | } |
5284 | EXPORT_SYMBOL_HDA(snd_hda_multi_out_dig_prepare); | 5350 | EXPORT_SYMBOL_GPL(snd_hda_multi_out_dig_prepare); |
5285 | 5351 | ||
5286 | /** | 5352 | /** |
5287 | * snd_hda_multi_out_dig_cleanup - clean-up the digital out stream | 5353 | * snd_hda_multi_out_dig_cleanup - clean-up the digital out stream |
@@ -5294,7 +5360,7 @@ int snd_hda_multi_out_dig_cleanup(struct hda_codec *codec, | |||
5294 | mutex_unlock(&codec->spdif_mutex); | 5360 | mutex_unlock(&codec->spdif_mutex); |
5295 | return 0; | 5361 | return 0; |
5296 | } | 5362 | } |
5297 | EXPORT_SYMBOL_HDA(snd_hda_multi_out_dig_cleanup); | 5363 | EXPORT_SYMBOL_GPL(snd_hda_multi_out_dig_cleanup); |
5298 | 5364 | ||
5299 | /** | 5365 | /** |
5300 | * snd_hda_multi_out_dig_close - release the digital out stream | 5366 | * snd_hda_multi_out_dig_close - release the digital out stream |
@@ -5307,7 +5373,7 @@ int snd_hda_multi_out_dig_close(struct hda_codec *codec, | |||
5307 | mutex_unlock(&codec->spdif_mutex); | 5373 | mutex_unlock(&codec->spdif_mutex); |
5308 | return 0; | 5374 | return 0; |
5309 | } | 5375 | } |
5310 | EXPORT_SYMBOL_HDA(snd_hda_multi_out_dig_close); | 5376 | EXPORT_SYMBOL_GPL(snd_hda_multi_out_dig_close); |
5311 | 5377 | ||
5312 | /** | 5378 | /** |
5313 | * snd_hda_multi_out_analog_open - open analog outputs | 5379 | * snd_hda_multi_out_analog_open - open analog outputs |
@@ -5357,7 +5423,7 @@ int snd_hda_multi_out_analog_open(struct hda_codec *codec, | |||
5357 | return snd_pcm_hw_constraint_step(substream->runtime, 0, | 5423 | return snd_pcm_hw_constraint_step(substream->runtime, 0, |
5358 | SNDRV_PCM_HW_PARAM_CHANNELS, 2); | 5424 | SNDRV_PCM_HW_PARAM_CHANNELS, 2); |
5359 | } | 5425 | } |
5360 | EXPORT_SYMBOL_HDA(snd_hda_multi_out_analog_open); | 5426 | EXPORT_SYMBOL_GPL(snd_hda_multi_out_analog_open); |
5361 | 5427 | ||
5362 | /** | 5428 | /** |
5363 | * snd_hda_multi_out_analog_prepare - Preapre the analog outputs. | 5429 | * snd_hda_multi_out_analog_prepare - Preapre the analog outputs. |
@@ -5434,7 +5500,7 @@ int snd_hda_multi_out_analog_prepare(struct hda_codec *codec, | |||
5434 | 5500 | ||
5435 | return 0; | 5501 | return 0; |
5436 | } | 5502 | } |
5437 | EXPORT_SYMBOL_HDA(snd_hda_multi_out_analog_prepare); | 5503 | EXPORT_SYMBOL_GPL(snd_hda_multi_out_analog_prepare); |
5438 | 5504 | ||
5439 | /** | 5505 | /** |
5440 | * snd_hda_multi_out_analog_cleanup - clean up the setting for analog out | 5506 | * snd_hda_multi_out_analog_cleanup - clean up the setting for analog out |
@@ -5465,7 +5531,7 @@ int snd_hda_multi_out_analog_cleanup(struct hda_codec *codec, | |||
5465 | mutex_unlock(&codec->spdif_mutex); | 5531 | mutex_unlock(&codec->spdif_mutex); |
5466 | return 0; | 5532 | return 0; |
5467 | } | 5533 | } |
5468 | EXPORT_SYMBOL_HDA(snd_hda_multi_out_analog_cleanup); | 5534 | EXPORT_SYMBOL_GPL(snd_hda_multi_out_analog_cleanup); |
5469 | 5535 | ||
5470 | /** | 5536 | /** |
5471 | * snd_hda_get_default_vref - Get the default (mic) VREF pin bits | 5537 | * snd_hda_get_default_vref - Get the default (mic) VREF pin bits |
@@ -5492,7 +5558,7 @@ unsigned int snd_hda_get_default_vref(struct hda_codec *codec, hda_nid_t pin) | |||
5492 | return AC_PINCTL_VREF_GRD; | 5558 | return AC_PINCTL_VREF_GRD; |
5493 | return AC_PINCTL_VREF_HIZ; | 5559 | return AC_PINCTL_VREF_HIZ; |
5494 | } | 5560 | } |
5495 | EXPORT_SYMBOL_HDA(snd_hda_get_default_vref); | 5561 | EXPORT_SYMBOL_GPL(snd_hda_get_default_vref); |
5496 | 5562 | ||
5497 | /* correct the pin ctl value for matching with the pin cap */ | 5563 | /* correct the pin ctl value for matching with the pin cap */ |
5498 | unsigned int snd_hda_correct_pin_ctl(struct hda_codec *codec, | 5564 | unsigned int snd_hda_correct_pin_ctl(struct hda_codec *codec, |
@@ -5543,7 +5609,7 @@ unsigned int snd_hda_correct_pin_ctl(struct hda_codec *codec, | |||
5543 | 5609 | ||
5544 | return val; | 5610 | return val; |
5545 | } | 5611 | } |
5546 | EXPORT_SYMBOL_HDA(snd_hda_correct_pin_ctl); | 5612 | EXPORT_SYMBOL_GPL(snd_hda_correct_pin_ctl); |
5547 | 5613 | ||
5548 | int _snd_hda_set_pin_ctl(struct hda_codec *codec, hda_nid_t pin, | 5614 | int _snd_hda_set_pin_ctl(struct hda_codec *codec, hda_nid_t pin, |
5549 | unsigned int val, bool cached) | 5615 | unsigned int val, bool cached) |
@@ -5557,7 +5623,7 @@ int _snd_hda_set_pin_ctl(struct hda_codec *codec, hda_nid_t pin, | |||
5557 | return snd_hda_codec_write(codec, pin, 0, | 5623 | return snd_hda_codec_write(codec, pin, 0, |
5558 | AC_VERB_SET_PIN_WIDGET_CONTROL, val); | 5624 | AC_VERB_SET_PIN_WIDGET_CONTROL, val); |
5559 | } | 5625 | } |
5560 | EXPORT_SYMBOL_HDA(_snd_hda_set_pin_ctl); | 5626 | EXPORT_SYMBOL_GPL(_snd_hda_set_pin_ctl); |
5561 | 5627 | ||
5562 | /** | 5628 | /** |
5563 | * snd_hda_add_imux_item - Add an item to input_mux | 5629 | * snd_hda_add_imux_item - Add an item to input_mux |
@@ -5591,7 +5657,7 @@ int snd_hda_add_imux_item(struct hda_input_mux *imux, const char *label, | |||
5591 | imux->num_items++; | 5657 | imux->num_items++; |
5592 | return 0; | 5658 | return 0; |
5593 | } | 5659 | } |
5594 | EXPORT_SYMBOL_HDA(snd_hda_add_imux_item); | 5660 | EXPORT_SYMBOL_GPL(snd_hda_add_imux_item); |
5595 | 5661 | ||
5596 | 5662 | ||
5597 | #ifdef CONFIG_PM | 5663 | #ifdef CONFIG_PM |
@@ -5599,6 +5665,17 @@ EXPORT_SYMBOL_HDA(snd_hda_add_imux_item); | |||
5599 | * power management | 5665 | * power management |
5600 | */ | 5666 | */ |
5601 | 5667 | ||
5668 | |||
5669 | static void hda_async_suspend(void *data, async_cookie_t cookie) | ||
5670 | { | ||
5671 | hda_call_codec_suspend(data, false); | ||
5672 | } | ||
5673 | |||
5674 | static void hda_async_resume(void *data, async_cookie_t cookie) | ||
5675 | { | ||
5676 | hda_call_codec_resume(data); | ||
5677 | } | ||
5678 | |||
5602 | /** | 5679 | /** |
5603 | * snd_hda_suspend - suspend the codecs | 5680 | * snd_hda_suspend - suspend the codecs |
5604 | * @bus: the HDA bus | 5681 | * @bus: the HDA bus |
@@ -5608,15 +5685,25 @@ EXPORT_SYMBOL_HDA(snd_hda_add_imux_item); | |||
5608 | int snd_hda_suspend(struct hda_bus *bus) | 5685 | int snd_hda_suspend(struct hda_bus *bus) |
5609 | { | 5686 | { |
5610 | struct hda_codec *codec; | 5687 | struct hda_codec *codec; |
5688 | ASYNC_DOMAIN_EXCLUSIVE(domain); | ||
5611 | 5689 | ||
5612 | list_for_each_entry(codec, &bus->codec_list, list) { | 5690 | list_for_each_entry(codec, &bus->codec_list, list) { |
5613 | cancel_delayed_work_sync(&codec->jackpoll_work); | 5691 | cancel_delayed_work_sync(&codec->jackpoll_work); |
5614 | if (hda_codec_is_power_on(codec)) | 5692 | if (hda_codec_is_power_on(codec)) { |
5615 | hda_call_codec_suspend(codec, false); | 5693 | if (bus->num_codecs > 1) |
5694 | async_schedule_domain(hda_async_suspend, codec, | ||
5695 | &domain); | ||
5696 | else | ||
5697 | hda_call_codec_suspend(codec, false); | ||
5698 | } | ||
5616 | } | 5699 | } |
5700 | |||
5701 | if (bus->num_codecs > 1) | ||
5702 | async_synchronize_full_domain(&domain); | ||
5703 | |||
5617 | return 0; | 5704 | return 0; |
5618 | } | 5705 | } |
5619 | EXPORT_SYMBOL_HDA(snd_hda_suspend); | 5706 | EXPORT_SYMBOL_GPL(snd_hda_suspend); |
5620 | 5707 | ||
5621 | /** | 5708 | /** |
5622 | * snd_hda_resume - resume the codecs | 5709 | * snd_hda_resume - resume the codecs |
@@ -5627,13 +5714,21 @@ EXPORT_SYMBOL_HDA(snd_hda_suspend); | |||
5627 | int snd_hda_resume(struct hda_bus *bus) | 5714 | int snd_hda_resume(struct hda_bus *bus) |
5628 | { | 5715 | { |
5629 | struct hda_codec *codec; | 5716 | struct hda_codec *codec; |
5717 | ASYNC_DOMAIN_EXCLUSIVE(domain); | ||
5630 | 5718 | ||
5631 | list_for_each_entry(codec, &bus->codec_list, list) { | 5719 | list_for_each_entry(codec, &bus->codec_list, list) { |
5632 | hda_call_codec_resume(codec); | 5720 | if (bus->num_codecs > 1) |
5721 | async_schedule_domain(hda_async_resume, codec, &domain); | ||
5722 | else | ||
5723 | hda_call_codec_resume(codec); | ||
5633 | } | 5724 | } |
5725 | |||
5726 | if (bus->num_codecs > 1) | ||
5727 | async_synchronize_full_domain(&domain); | ||
5728 | |||
5634 | return 0; | 5729 | return 0; |
5635 | } | 5730 | } |
5636 | EXPORT_SYMBOL_HDA(snd_hda_resume); | 5731 | EXPORT_SYMBOL_GPL(snd_hda_resume); |
5637 | #endif /* CONFIG_PM */ | 5732 | #endif /* CONFIG_PM */ |
5638 | 5733 | ||
5639 | /* | 5734 | /* |
@@ -5667,7 +5762,7 @@ void *snd_array_new(struct snd_array *array) | |||
5667 | } | 5762 | } |
5668 | return snd_array_elem(array, array->used++); | 5763 | return snd_array_elem(array, array->used++); |
5669 | } | 5764 | } |
5670 | EXPORT_SYMBOL_HDA(snd_array_new); | 5765 | EXPORT_SYMBOL_GPL(snd_array_new); |
5671 | 5766 | ||
5672 | /** | 5767 | /** |
5673 | * snd_array_free - free the given array elements | 5768 | * snd_array_free - free the given array elements |
@@ -5680,7 +5775,7 @@ void snd_array_free(struct snd_array *array) | |||
5680 | array->alloced = 0; | 5775 | array->alloced = 0; |
5681 | array->list = NULL; | 5776 | array->list = NULL; |
5682 | } | 5777 | } |
5683 | EXPORT_SYMBOL_HDA(snd_array_free); | 5778 | EXPORT_SYMBOL_GPL(snd_array_free); |
5684 | 5779 | ||
5685 | /** | 5780 | /** |
5686 | * snd_print_pcm_bits - Print the supported PCM fmt bits to the string buffer | 5781 | * snd_print_pcm_bits - Print the supported PCM fmt bits to the string buffer |
@@ -5701,7 +5796,7 @@ void snd_print_pcm_bits(int pcm, char *buf, int buflen) | |||
5701 | 5796 | ||
5702 | buf[j] = '\0'; /* necessary when j == 0 */ | 5797 | buf[j] = '\0'; /* necessary when j == 0 */ |
5703 | } | 5798 | } |
5704 | EXPORT_SYMBOL_HDA(snd_print_pcm_bits); | 5799 | EXPORT_SYMBOL_GPL(snd_print_pcm_bits); |
5705 | 5800 | ||
5706 | MODULE_DESCRIPTION("HDA codec core"); | 5801 | MODULE_DESCRIPTION("HDA codec core"); |
5707 | MODULE_LICENSE("GPL"); | 5802 | MODULE_LICENSE("GPL"); |
diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h index 7aa9870040c1..2b5d19e48a27 100644 --- a/sound/pci/hda/hda_codec.h +++ b/sound/pci/hda/hda_codec.h | |||
@@ -25,552 +25,7 @@ | |||
25 | #include <sound/control.h> | 25 | #include <sound/control.h> |
26 | #include <sound/pcm.h> | 26 | #include <sound/pcm.h> |
27 | #include <sound/hwdep.h> | 27 | #include <sound/hwdep.h> |
28 | 28 | #include <sound/hda_verbs.h> | |
29 | /* | ||
30 | * nodes | ||
31 | */ | ||
32 | #define AC_NODE_ROOT 0x00 | ||
33 | |||
34 | /* | ||
35 | * function group types | ||
36 | */ | ||
37 | enum { | ||
38 | AC_GRP_AUDIO_FUNCTION = 0x01, | ||
39 | AC_GRP_MODEM_FUNCTION = 0x02, | ||
40 | }; | ||
41 | |||
42 | /* | ||
43 | * widget types | ||
44 | */ | ||
45 | enum { | ||
46 | AC_WID_AUD_OUT, /* Audio Out */ | ||
47 | AC_WID_AUD_IN, /* Audio In */ | ||
48 | AC_WID_AUD_MIX, /* Audio Mixer */ | ||
49 | AC_WID_AUD_SEL, /* Audio Selector */ | ||
50 | AC_WID_PIN, /* Pin Complex */ | ||
51 | AC_WID_POWER, /* Power */ | ||
52 | AC_WID_VOL_KNB, /* Volume Knob */ | ||
53 | AC_WID_BEEP, /* Beep Generator */ | ||
54 | AC_WID_VENDOR = 0x0f /* Vendor specific */ | ||
55 | }; | ||
56 | |||
57 | /* | ||
58 | * GET verbs | ||
59 | */ | ||
60 | #define AC_VERB_GET_STREAM_FORMAT 0x0a00 | ||
61 | #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00 | ||
62 | #define AC_VERB_GET_PROC_COEF 0x0c00 | ||
63 | #define AC_VERB_GET_COEF_INDEX 0x0d00 | ||
64 | #define AC_VERB_PARAMETERS 0x0f00 | ||
65 | #define AC_VERB_GET_CONNECT_SEL 0x0f01 | ||
66 | #define AC_VERB_GET_CONNECT_LIST 0x0f02 | ||
67 | #define AC_VERB_GET_PROC_STATE 0x0f03 | ||
68 | #define AC_VERB_GET_SDI_SELECT 0x0f04 | ||
69 | #define AC_VERB_GET_POWER_STATE 0x0f05 | ||
70 | #define AC_VERB_GET_CONV 0x0f06 | ||
71 | #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07 | ||
72 | #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08 | ||
73 | #define AC_VERB_GET_PIN_SENSE 0x0f09 | ||
74 | #define AC_VERB_GET_BEEP_CONTROL 0x0f0a | ||
75 | #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c | ||
76 | #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d | ||
77 | #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */ | ||
78 | #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f | ||
79 | /* f10-f1a: GPIO */ | ||
80 | #define AC_VERB_GET_GPIO_DATA 0x0f15 | ||
81 | #define AC_VERB_GET_GPIO_MASK 0x0f16 | ||
82 | #define AC_VERB_GET_GPIO_DIRECTION 0x0f17 | ||
83 | #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18 | ||
84 | #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19 | ||
85 | #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a | ||
86 | #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c | ||
87 | /* f20: AFG/MFG */ | ||
88 | #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 | ||
89 | #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d | ||
90 | #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e | ||
91 | #define AC_VERB_GET_HDMI_ELDD 0x0f2f | ||
92 | #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30 | ||
93 | #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31 | ||
94 | #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32 | ||
95 | #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33 | ||
96 | #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34 | ||
97 | #define AC_VERB_GET_DEVICE_SEL 0xf35 | ||
98 | #define AC_VERB_GET_DEVICE_LIST 0xf36 | ||
99 | |||
100 | /* | ||
101 | * SET verbs | ||
102 | */ | ||
103 | #define AC_VERB_SET_STREAM_FORMAT 0x200 | ||
104 | #define AC_VERB_SET_AMP_GAIN_MUTE 0x300 | ||
105 | #define AC_VERB_SET_PROC_COEF 0x400 | ||
106 | #define AC_VERB_SET_COEF_INDEX 0x500 | ||
107 | #define AC_VERB_SET_CONNECT_SEL 0x701 | ||
108 | #define AC_VERB_SET_PROC_STATE 0x703 | ||
109 | #define AC_VERB_SET_SDI_SELECT 0x704 | ||
110 | #define AC_VERB_SET_POWER_STATE 0x705 | ||
111 | #define AC_VERB_SET_CHANNEL_STREAMID 0x706 | ||
112 | #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707 | ||
113 | #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708 | ||
114 | #define AC_VERB_SET_PIN_SENSE 0x709 | ||
115 | #define AC_VERB_SET_BEEP_CONTROL 0x70a | ||
116 | #define AC_VERB_SET_EAPD_BTLENABLE 0x70c | ||
117 | #define AC_VERB_SET_DIGI_CONVERT_1 0x70d | ||
118 | #define AC_VERB_SET_DIGI_CONVERT_2 0x70e | ||
119 | #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f | ||
120 | #define AC_VERB_SET_GPIO_DATA 0x715 | ||
121 | #define AC_VERB_SET_GPIO_MASK 0x716 | ||
122 | #define AC_VERB_SET_GPIO_DIRECTION 0x717 | ||
123 | #define AC_VERB_SET_GPIO_WAKE_MASK 0x718 | ||
124 | #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719 | ||
125 | #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a | ||
126 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c | ||
127 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d | ||
128 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e | ||
129 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f | ||
130 | #define AC_VERB_SET_EAPD 0x788 | ||
131 | #define AC_VERB_SET_CODEC_RESET 0x7ff | ||
132 | #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d | ||
133 | #define AC_VERB_SET_HDMI_DIP_INDEX 0x730 | ||
134 | #define AC_VERB_SET_HDMI_DIP_DATA 0x731 | ||
135 | #define AC_VERB_SET_HDMI_DIP_XMIT 0x732 | ||
136 | #define AC_VERB_SET_HDMI_CP_CTRL 0x733 | ||
137 | #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734 | ||
138 | #define AC_VERB_SET_DEVICE_SEL 0x735 | ||
139 | |||
140 | /* | ||
141 | * Parameter IDs | ||
142 | */ | ||
143 | #define AC_PAR_VENDOR_ID 0x00 | ||
144 | #define AC_PAR_SUBSYSTEM_ID 0x01 | ||
145 | #define AC_PAR_REV_ID 0x02 | ||
146 | #define AC_PAR_NODE_COUNT 0x04 | ||
147 | #define AC_PAR_FUNCTION_TYPE 0x05 | ||
148 | #define AC_PAR_AUDIO_FG_CAP 0x08 | ||
149 | #define AC_PAR_AUDIO_WIDGET_CAP 0x09 | ||
150 | #define AC_PAR_PCM 0x0a | ||
151 | #define AC_PAR_STREAM 0x0b | ||
152 | #define AC_PAR_PIN_CAP 0x0c | ||
153 | #define AC_PAR_AMP_IN_CAP 0x0d | ||
154 | #define AC_PAR_CONNLIST_LEN 0x0e | ||
155 | #define AC_PAR_POWER_STATE 0x0f | ||
156 | #define AC_PAR_PROC_CAP 0x10 | ||
157 | #define AC_PAR_GPIO_CAP 0x11 | ||
158 | #define AC_PAR_AMP_OUT_CAP 0x12 | ||
159 | #define AC_PAR_VOL_KNB_CAP 0x13 | ||
160 | #define AC_PAR_DEVLIST_LEN 0x15 | ||
161 | #define AC_PAR_HDMI_LPCM_CAP 0x20 | ||
162 | |||
163 | /* | ||
164 | * AC_VERB_PARAMETERS results (32bit) | ||
165 | */ | ||
166 | |||
167 | /* Function Group Type */ | ||
168 | #define AC_FGT_TYPE (0xff<<0) | ||
169 | #define AC_FGT_TYPE_SHIFT 0 | ||
170 | #define AC_FGT_UNSOL_CAP (1<<8) | ||
171 | |||
172 | /* Audio Function Group Capabilities */ | ||
173 | #define AC_AFG_OUT_DELAY (0xf<<0) | ||
174 | #define AC_AFG_IN_DELAY (0xf<<8) | ||
175 | #define AC_AFG_BEEP_GEN (1<<16) | ||
176 | |||
177 | /* Audio Widget Capabilities */ | ||
178 | #define AC_WCAP_STEREO (1<<0) /* stereo I/O */ | ||
179 | #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */ | ||
180 | #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */ | ||
181 | #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */ | ||
182 | #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */ | ||
183 | #define AC_WCAP_STRIPE (1<<5) /* stripe */ | ||
184 | #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */ | ||
185 | #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */ | ||
186 | #define AC_WCAP_CONN_LIST (1<<8) /* connection list */ | ||
187 | #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */ | ||
188 | #define AC_WCAP_POWER (1<<10) /* power control */ | ||
189 | #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */ | ||
190 | #define AC_WCAP_CP_CAPS (1<<12) /* content protection */ | ||
191 | #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */ | ||
192 | #define AC_WCAP_DELAY (0xf<<16) | ||
193 | #define AC_WCAP_DELAY_SHIFT 16 | ||
194 | #define AC_WCAP_TYPE (0xf<<20) | ||
195 | #define AC_WCAP_TYPE_SHIFT 20 | ||
196 | |||
197 | /* supported PCM rates and bits */ | ||
198 | #define AC_SUPPCM_RATES (0xfff << 0) | ||
199 | #define AC_SUPPCM_BITS_8 (1<<16) | ||
200 | #define AC_SUPPCM_BITS_16 (1<<17) | ||
201 | #define AC_SUPPCM_BITS_20 (1<<18) | ||
202 | #define AC_SUPPCM_BITS_24 (1<<19) | ||
203 | #define AC_SUPPCM_BITS_32 (1<<20) | ||
204 | |||
205 | /* supported PCM stream format */ | ||
206 | #define AC_SUPFMT_PCM (1<<0) | ||
207 | #define AC_SUPFMT_FLOAT32 (1<<1) | ||
208 | #define AC_SUPFMT_AC3 (1<<2) | ||
209 | |||
210 | /* GP I/O count */ | ||
211 | #define AC_GPIO_IO_COUNT (0xff<<0) | ||
212 | #define AC_GPIO_O_COUNT (0xff<<8) | ||
213 | #define AC_GPIO_O_COUNT_SHIFT 8 | ||
214 | #define AC_GPIO_I_COUNT (0xff<<16) | ||
215 | #define AC_GPIO_I_COUNT_SHIFT 16 | ||
216 | #define AC_GPIO_UNSOLICITED (1<<30) | ||
217 | #define AC_GPIO_WAKE (1<<31) | ||
218 | |||
219 | /* Converter stream, channel */ | ||
220 | #define AC_CONV_CHANNEL (0xf<<0) | ||
221 | #define AC_CONV_STREAM (0xf<<4) | ||
222 | #define AC_CONV_STREAM_SHIFT 4 | ||
223 | |||
224 | /* Input converter SDI select */ | ||
225 | #define AC_SDI_SELECT (0xf<<0) | ||
226 | |||
227 | /* stream format id */ | ||
228 | #define AC_FMT_CHAN_SHIFT 0 | ||
229 | #define AC_FMT_CHAN_MASK (0x0f << 0) | ||
230 | #define AC_FMT_BITS_SHIFT 4 | ||
231 | #define AC_FMT_BITS_MASK (7 << 4) | ||
232 | #define AC_FMT_BITS_8 (0 << 4) | ||
233 | #define AC_FMT_BITS_16 (1 << 4) | ||
234 | #define AC_FMT_BITS_20 (2 << 4) | ||
235 | #define AC_FMT_BITS_24 (3 << 4) | ||
236 | #define AC_FMT_BITS_32 (4 << 4) | ||
237 | #define AC_FMT_DIV_SHIFT 8 | ||
238 | #define AC_FMT_DIV_MASK (7 << 8) | ||
239 | #define AC_FMT_MULT_SHIFT 11 | ||
240 | #define AC_FMT_MULT_MASK (7 << 11) | ||
241 | #define AC_FMT_BASE_SHIFT 14 | ||
242 | #define AC_FMT_BASE_48K (0 << 14) | ||
243 | #define AC_FMT_BASE_44K (1 << 14) | ||
244 | #define AC_FMT_TYPE_SHIFT 15 | ||
245 | #define AC_FMT_TYPE_PCM (0 << 15) | ||
246 | #define AC_FMT_TYPE_NON_PCM (1 << 15) | ||
247 | |||
248 | /* Unsolicited response control */ | ||
249 | #define AC_UNSOL_TAG (0x3f<<0) | ||
250 | #define AC_UNSOL_ENABLED (1<<7) | ||
251 | #define AC_USRSP_EN AC_UNSOL_ENABLED | ||
252 | |||
253 | /* Unsolicited responses */ | ||
254 | #define AC_UNSOL_RES_TAG (0x3f<<26) | ||
255 | #define AC_UNSOL_RES_TAG_SHIFT 26 | ||
256 | #define AC_UNSOL_RES_SUBTAG (0x1f<<21) | ||
257 | #define AC_UNSOL_RES_SUBTAG_SHIFT 21 | ||
258 | #define AC_UNSOL_RES_DE (0x3f<<15) /* Device Entry | ||
259 | * (for DP1.2 MST) | ||
260 | */ | ||
261 | #define AC_UNSOL_RES_DE_SHIFT 15 | ||
262 | #define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */ | ||
263 | #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */ | ||
264 | #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */ | ||
265 | #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */ | ||
266 | #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */ | ||
267 | |||
268 | /* Pin widget capabilies */ | ||
269 | #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ | ||
270 | #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ | ||
271 | #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */ | ||
272 | #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */ | ||
273 | #define AC_PINCAP_OUT (1<<4) /* output capable */ | ||
274 | #define AC_PINCAP_IN (1<<5) /* input capable */ | ||
275 | #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */ | ||
276 | /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification, | ||
277 | * but is marked reserved in the Intel HDA specification. | ||
278 | */ | ||
279 | #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */ | ||
280 | /* Note: The same bit as LR_SWAP is newly defined as HDMI capability | ||
281 | * in HD-audio specification | ||
282 | */ | ||
283 | #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */ | ||
284 | #define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can | ||
285 | * coexist with AC_PINCAP_HDMI | ||
286 | */ | ||
287 | #define AC_PINCAP_VREF (0x37<<8) | ||
288 | #define AC_PINCAP_VREF_SHIFT 8 | ||
289 | #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */ | ||
290 | #define AC_PINCAP_HBR (1<<27) /* High Bit Rate */ | ||
291 | /* Vref status (used in pin cap) */ | ||
292 | #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */ | ||
293 | #define AC_PINCAP_VREF_50 (1<<1) /* 50% */ | ||
294 | #define AC_PINCAP_VREF_GRD (1<<2) /* ground */ | ||
295 | #define AC_PINCAP_VREF_80 (1<<4) /* 80% */ | ||
296 | #define AC_PINCAP_VREF_100 (1<<5) /* 100% */ | ||
297 | |||
298 | /* Amplifier capabilities */ | ||
299 | #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */ | ||
300 | #define AC_AMPCAP_OFFSET_SHIFT 0 | ||
301 | #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */ | ||
302 | #define AC_AMPCAP_NUM_STEPS_SHIFT 8 | ||
303 | #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB | ||
304 | * in 0.25dB | ||
305 | */ | ||
306 | #define AC_AMPCAP_STEP_SIZE_SHIFT 16 | ||
307 | #define AC_AMPCAP_MUTE (1<<31) /* mute capable */ | ||
308 | #define AC_AMPCAP_MUTE_SHIFT 31 | ||
309 | |||
310 | /* driver-specific amp-caps: using bits 24-30 */ | ||
311 | #define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */ | ||
312 | |||
313 | /* Connection list */ | ||
314 | #define AC_CLIST_LENGTH (0x7f<<0) | ||
315 | #define AC_CLIST_LONG (1<<7) | ||
316 | |||
317 | /* Supported power status */ | ||
318 | #define AC_PWRST_D0SUP (1<<0) | ||
319 | #define AC_PWRST_D1SUP (1<<1) | ||
320 | #define AC_PWRST_D2SUP (1<<2) | ||
321 | #define AC_PWRST_D3SUP (1<<3) | ||
322 | #define AC_PWRST_D3COLDSUP (1<<4) | ||
323 | #define AC_PWRST_S3D3COLDSUP (1<<29) | ||
324 | #define AC_PWRST_CLKSTOP (1<<30) | ||
325 | #define AC_PWRST_EPSS (1U<<31) | ||
326 | |||
327 | /* Power state values */ | ||
328 | #define AC_PWRST_SETTING (0xf<<0) | ||
329 | #define AC_PWRST_ACTUAL (0xf<<4) | ||
330 | #define AC_PWRST_ACTUAL_SHIFT 4 | ||
331 | #define AC_PWRST_D0 0x00 | ||
332 | #define AC_PWRST_D1 0x01 | ||
333 | #define AC_PWRST_D2 0x02 | ||
334 | #define AC_PWRST_D3 0x03 | ||
335 | #define AC_PWRST_ERROR (1<<8) | ||
336 | #define AC_PWRST_CLK_STOP_OK (1<<9) | ||
337 | #define AC_PWRST_SETTING_RESET (1<<10) | ||
338 | |||
339 | /* Processing capabilies */ | ||
340 | #define AC_PCAP_BENIGN (1<<0) | ||
341 | #define AC_PCAP_NUM_COEF (0xff<<8) | ||
342 | #define AC_PCAP_NUM_COEF_SHIFT 8 | ||
343 | |||
344 | /* Volume knobs capabilities */ | ||
345 | #define AC_KNBCAP_NUM_STEPS (0x7f<<0) | ||
346 | #define AC_KNBCAP_DELTA (1<<7) | ||
347 | |||
348 | /* HDMI LPCM capabilities */ | ||
349 | #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */ | ||
350 | #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */ | ||
351 | #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */ | ||
352 | #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */ | ||
353 | #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */ | ||
354 | #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */ | ||
355 | #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */ | ||
356 | #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */ | ||
357 | #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */ | ||
358 | #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */ | ||
359 | #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */ | ||
360 | #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */ | ||
361 | #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */ | ||
362 | #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */ | ||
363 | |||
364 | /* Display pin's device list length */ | ||
365 | #define AC_DEV_LIST_LEN_MASK 0x3f | ||
366 | #define AC_MAX_DEV_LIST_LEN 64 | ||
367 | |||
368 | /* | ||
369 | * Control Parameters | ||
370 | */ | ||
371 | |||
372 | /* Amp gain/mute */ | ||
373 | #define AC_AMP_MUTE (1<<7) | ||
374 | #define AC_AMP_GAIN (0x7f) | ||
375 | #define AC_AMP_GET_INDEX (0xf<<0) | ||
376 | |||
377 | #define AC_AMP_GET_LEFT (1<<13) | ||
378 | #define AC_AMP_GET_RIGHT (0<<13) | ||
379 | #define AC_AMP_GET_OUTPUT (1<<15) | ||
380 | #define AC_AMP_GET_INPUT (0<<15) | ||
381 | |||
382 | #define AC_AMP_SET_INDEX (0xf<<8) | ||
383 | #define AC_AMP_SET_INDEX_SHIFT 8 | ||
384 | #define AC_AMP_SET_RIGHT (1<<12) | ||
385 | #define AC_AMP_SET_LEFT (1<<13) | ||
386 | #define AC_AMP_SET_INPUT (1<<14) | ||
387 | #define AC_AMP_SET_OUTPUT (1<<15) | ||
388 | |||
389 | /* DIGITAL1 bits */ | ||
390 | #define AC_DIG1_ENABLE (1<<0) | ||
391 | #define AC_DIG1_V (1<<1) | ||
392 | #define AC_DIG1_VCFG (1<<2) | ||
393 | #define AC_DIG1_EMPHASIS (1<<3) | ||
394 | #define AC_DIG1_COPYRIGHT (1<<4) | ||
395 | #define AC_DIG1_NONAUDIO (1<<5) | ||
396 | #define AC_DIG1_PROFESSIONAL (1<<6) | ||
397 | #define AC_DIG1_LEVEL (1<<7) | ||
398 | |||
399 | /* DIGITAL2 bits */ | ||
400 | #define AC_DIG2_CC (0x7f<<0) | ||
401 | |||
402 | /* DIGITAL3 bits */ | ||
403 | #define AC_DIG3_ICT (0xf<<0) | ||
404 | #define AC_DIG3_KAE (1<<7) | ||
405 | |||
406 | /* Pin widget control - 8bit */ | ||
407 | #define AC_PINCTL_EPT (0x3<<0) | ||
408 | #define AC_PINCTL_EPT_NATIVE 0 | ||
409 | #define AC_PINCTL_EPT_HBR 3 | ||
410 | #define AC_PINCTL_VREFEN (0x7<<0) | ||
411 | #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */ | ||
412 | #define AC_PINCTL_VREF_50 1 /* 50% */ | ||
413 | #define AC_PINCTL_VREF_GRD 2 /* ground */ | ||
414 | #define AC_PINCTL_VREF_80 4 /* 80% */ | ||
415 | #define AC_PINCTL_VREF_100 5 /* 100% */ | ||
416 | #define AC_PINCTL_IN_EN (1<<5) | ||
417 | #define AC_PINCTL_OUT_EN (1<<6) | ||
418 | #define AC_PINCTL_HP_EN (1<<7) | ||
419 | |||
420 | /* Pin sense - 32bit */ | ||
421 | #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) | ||
422 | #define AC_PINSENSE_PRESENCE (1<<31) | ||
423 | #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */ | ||
424 | |||
425 | /* EAPD/BTL enable - 32bit */ | ||
426 | #define AC_EAPDBTL_BALANCED (1<<0) | ||
427 | #define AC_EAPDBTL_EAPD (1<<1) | ||
428 | #define AC_EAPDBTL_LR_SWAP (1<<2) | ||
429 | |||
430 | /* HDMI ELD data */ | ||
431 | #define AC_ELDD_ELD_VALID (1<<31) | ||
432 | #define AC_ELDD_ELD_DATA 0xff | ||
433 | |||
434 | /* HDMI DIP size */ | ||
435 | #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */ | ||
436 | #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */ | ||
437 | |||
438 | /* HDMI DIP index */ | ||
439 | #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */ | ||
440 | #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */ | ||
441 | |||
442 | /* HDMI DIP xmit (transmit) control */ | ||
443 | #define AC_DIPXMIT_MASK (0x3<<6) | ||
444 | #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */ | ||
445 | #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */ | ||
446 | #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */ | ||
447 | |||
448 | /* HDMI content protection (CP) control */ | ||
449 | #define AC_CPCTRL_CES (1<<9) /* current encryption state */ | ||
450 | #define AC_CPCTRL_READY (1<<8) /* ready bit */ | ||
451 | #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */ | ||
452 | #define AC_CPCTRL_STATE (3<<0) /* current CP request state */ | ||
453 | |||
454 | /* Converter channel <-> HDMI slot mapping */ | ||
455 | #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */ | ||
456 | #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */ | ||
457 | |||
458 | /* configuration default - 32bit */ | ||
459 | #define AC_DEFCFG_SEQUENCE (0xf<<0) | ||
460 | #define AC_DEFCFG_DEF_ASSOC (0xf<<4) | ||
461 | #define AC_DEFCFG_ASSOC_SHIFT 4 | ||
462 | #define AC_DEFCFG_MISC (0xf<<8) | ||
463 | #define AC_DEFCFG_MISC_SHIFT 8 | ||
464 | #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0) | ||
465 | #define AC_DEFCFG_COLOR (0xf<<12) | ||
466 | #define AC_DEFCFG_COLOR_SHIFT 12 | ||
467 | #define AC_DEFCFG_CONN_TYPE (0xf<<16) | ||
468 | #define AC_DEFCFG_CONN_TYPE_SHIFT 16 | ||
469 | #define AC_DEFCFG_DEVICE (0xf<<20) | ||
470 | #define AC_DEFCFG_DEVICE_SHIFT 20 | ||
471 | #define AC_DEFCFG_LOCATION (0x3f<<24) | ||
472 | #define AC_DEFCFG_LOCATION_SHIFT 24 | ||
473 | #define AC_DEFCFG_PORT_CONN (0x3<<30) | ||
474 | #define AC_DEFCFG_PORT_CONN_SHIFT 30 | ||
475 | |||
476 | /* Display pin's device list entry */ | ||
477 | #define AC_DE_PD (1<<0) | ||
478 | #define AC_DE_ELDV (1<<1) | ||
479 | #define AC_DE_IA (1<<2) | ||
480 | |||
481 | /* device device types (0x0-0xf) */ | ||
482 | enum { | ||
483 | AC_JACK_LINE_OUT, | ||
484 | AC_JACK_SPEAKER, | ||
485 | AC_JACK_HP_OUT, | ||
486 | AC_JACK_CD, | ||
487 | AC_JACK_SPDIF_OUT, | ||
488 | AC_JACK_DIG_OTHER_OUT, | ||
489 | AC_JACK_MODEM_LINE_SIDE, | ||
490 | AC_JACK_MODEM_HAND_SIDE, | ||
491 | AC_JACK_LINE_IN, | ||
492 | AC_JACK_AUX, | ||
493 | AC_JACK_MIC_IN, | ||
494 | AC_JACK_TELEPHONY, | ||
495 | AC_JACK_SPDIF_IN, | ||
496 | AC_JACK_DIG_OTHER_IN, | ||
497 | AC_JACK_OTHER = 0xf, | ||
498 | }; | ||
499 | |||
500 | /* jack connection types (0x0-0xf) */ | ||
501 | enum { | ||
502 | AC_JACK_CONN_UNKNOWN, | ||
503 | AC_JACK_CONN_1_8, | ||
504 | AC_JACK_CONN_1_4, | ||
505 | AC_JACK_CONN_ATAPI, | ||
506 | AC_JACK_CONN_RCA, | ||
507 | AC_JACK_CONN_OPTICAL, | ||
508 | AC_JACK_CONN_OTHER_DIGITAL, | ||
509 | AC_JACK_CONN_OTHER_ANALOG, | ||
510 | AC_JACK_CONN_DIN, | ||
511 | AC_JACK_CONN_XLR, | ||
512 | AC_JACK_CONN_RJ11, | ||
513 | AC_JACK_CONN_COMB, | ||
514 | AC_JACK_CONN_OTHER = 0xf, | ||
515 | }; | ||
516 | |||
517 | /* jack colors (0x0-0xf) */ | ||
518 | enum { | ||
519 | AC_JACK_COLOR_UNKNOWN, | ||
520 | AC_JACK_COLOR_BLACK, | ||
521 | AC_JACK_COLOR_GREY, | ||
522 | AC_JACK_COLOR_BLUE, | ||
523 | AC_JACK_COLOR_GREEN, | ||
524 | AC_JACK_COLOR_RED, | ||
525 | AC_JACK_COLOR_ORANGE, | ||
526 | AC_JACK_COLOR_YELLOW, | ||
527 | AC_JACK_COLOR_PURPLE, | ||
528 | AC_JACK_COLOR_PINK, | ||
529 | AC_JACK_COLOR_WHITE = 0xe, | ||
530 | AC_JACK_COLOR_OTHER, | ||
531 | }; | ||
532 | |||
533 | /* Jack location (0x0-0x3f) */ | ||
534 | /* common case */ | ||
535 | enum { | ||
536 | AC_JACK_LOC_NONE, | ||
537 | AC_JACK_LOC_REAR, | ||
538 | AC_JACK_LOC_FRONT, | ||
539 | AC_JACK_LOC_LEFT, | ||
540 | AC_JACK_LOC_RIGHT, | ||
541 | AC_JACK_LOC_TOP, | ||
542 | AC_JACK_LOC_BOTTOM, | ||
543 | }; | ||
544 | /* bits 4-5 */ | ||
545 | enum { | ||
546 | AC_JACK_LOC_EXTERNAL = 0x00, | ||
547 | AC_JACK_LOC_INTERNAL = 0x10, | ||
548 | AC_JACK_LOC_SEPARATE = 0x20, | ||
549 | AC_JACK_LOC_OTHER = 0x30, | ||
550 | }; | ||
551 | enum { | ||
552 | /* external on primary chasis */ | ||
553 | AC_JACK_LOC_REAR_PANEL = 0x07, | ||
554 | AC_JACK_LOC_DRIVE_BAY, | ||
555 | /* internal */ | ||
556 | AC_JACK_LOC_RISER = 0x17, | ||
557 | AC_JACK_LOC_HDMI, | ||
558 | AC_JACK_LOC_ATAPI, | ||
559 | /* others */ | ||
560 | AC_JACK_LOC_MOBILE_IN = 0x37, | ||
561 | AC_JACK_LOC_MOBILE_OUT, | ||
562 | }; | ||
563 | |||
564 | /* Port connectivity (0-3) */ | ||
565 | enum { | ||
566 | AC_JACK_PORT_COMPLEX, | ||
567 | AC_JACK_PORT_NONE, | ||
568 | AC_JACK_PORT_FIXED, | ||
569 | AC_JACK_PORT_BOTH, | ||
570 | }; | ||
571 | |||
572 | /* max. codec address */ | ||
573 | #define HDA_MAX_CODEC_ADDRESS 0x0f | ||
574 | 29 | ||
575 | /* | 30 | /* |
576 | * generic arrays | 31 | * generic arrays |
@@ -673,6 +128,7 @@ struct hda_bus { | |||
673 | 128 | ||
674 | /* codec linked list */ | 129 | /* codec linked list */ |
675 | struct list_head codec_list; | 130 | struct list_head codec_list; |
131 | unsigned int num_codecs; | ||
676 | /* link caddr -> codec */ | 132 | /* link caddr -> codec */ |
677 | struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; | 133 | struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; |
678 | 134 | ||
@@ -834,6 +290,7 @@ struct hda_codec { | |||
834 | /* detected preset */ | 290 | /* detected preset */ |
835 | const struct hda_codec_preset *preset; | 291 | const struct hda_codec_preset *preset; |
836 | struct module *owner; | 292 | struct module *owner; |
293 | int (*parser)(struct hda_codec *codec); | ||
837 | const char *vendor_name; /* codec vendor name */ | 294 | const char *vendor_name; /* codec vendor name */ |
838 | const char *chip_name; /* codec chip name */ | 295 | const char *chip_name; /* codec chip name */ |
839 | const char *modelname; /* model name for preset */ | 296 | const char *modelname; /* model name for preset */ |
@@ -907,7 +364,7 @@ struct hda_codec { | |||
907 | #ifdef CONFIG_PM | 364 | #ifdef CONFIG_PM |
908 | unsigned int power_on :1; /* current (global) power-state */ | 365 | unsigned int power_on :1; /* current (global) power-state */ |
909 | unsigned int d3_stop_clk:1; /* support D3 operation without BCLK */ | 366 | unsigned int d3_stop_clk:1; /* support D3 operation without BCLK */ |
910 | unsigned int pm_down_notified:1; /* PM notified to controller */ | 367 | unsigned int pm_up_notified:1; /* PM notified to controller */ |
911 | unsigned int in_pm:1; /* suspend/resume being performed */ | 368 | unsigned int in_pm:1; /* suspend/resume being performed */ |
912 | int power_transition; /* power-state in transition */ | 369 | int power_transition; /* power-state in transition */ |
913 | int power_count; /* current (global) power refcount */ | 370 | int power_count; /* current (global) power refcount */ |
@@ -936,6 +393,8 @@ struct hda_codec { | |||
936 | struct snd_array jacks; | 393 | struct snd_array jacks; |
937 | #endif | 394 | #endif |
938 | 395 | ||
396 | int depop_delay; /* depop delay in ms, -1 for default delay time */ | ||
397 | |||
939 | /* fix-up list */ | 398 | /* fix-up list */ |
940 | int fixup_id; | 399 | int fixup_id; |
941 | const struct hda_fixup *fixup_list; | 400 | const struct hda_fixup *fixup_list; |
@@ -1222,19 +681,6 @@ snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec, | |||
1222 | struct snd_dma_buffer *dmab) {} | 681 | struct snd_dma_buffer *dmab) {} |
1223 | #endif | 682 | #endif |
1224 | 683 | ||
1225 | /* | ||
1226 | * Codec modularization | ||
1227 | */ | ||
1228 | |||
1229 | /* Export symbols only for communication with codec drivers; | ||
1230 | * When built in kernel, all HD-audio drivers are supposed to be statically | ||
1231 | * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be | ||
1232 | * exported unless it's built as a module. | ||
1233 | */ | ||
1234 | #ifdef MODULE | ||
1235 | #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym) | 684 | #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym) |
1236 | #else | ||
1237 | #define EXPORT_SYMBOL_HDA(sym) | ||
1238 | #endif | ||
1239 | 685 | ||
1240 | #endif /* __SOUND_HDA_CODEC_H */ | 686 | #endif /* __SOUND_HDA_CODEC_H */ |
diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c index c7f6d1cab606..8321a97d5c05 100644 --- a/sound/pci/hda/hda_generic.c +++ b/sound/pci/hda/hda_generic.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/ctype.h> | 28 | #include <linux/ctype.h> |
29 | #include <linux/string.h> | 29 | #include <linux/string.h> |
30 | #include <linux/bitops.h> | 30 | #include <linux/bitops.h> |
31 | #include <linux/module.h> | ||
31 | #include <sound/core.h> | 32 | #include <sound/core.h> |
32 | #include <sound/jack.h> | 33 | #include <sound/jack.h> |
33 | #include "hda_codec.h" | 34 | #include "hda_codec.h" |
@@ -47,7 +48,7 @@ int snd_hda_gen_spec_init(struct hda_gen_spec *spec) | |||
47 | mutex_init(&spec->pcm_mutex); | 48 | mutex_init(&spec->pcm_mutex); |
48 | return 0; | 49 | return 0; |
49 | } | 50 | } |
50 | EXPORT_SYMBOL_HDA(snd_hda_gen_spec_init); | 51 | EXPORT_SYMBOL_GPL(snd_hda_gen_spec_init); |
51 | 52 | ||
52 | struct snd_kcontrol_new * | 53 | struct snd_kcontrol_new * |
53 | snd_hda_gen_add_kctl(struct hda_gen_spec *spec, const char *name, | 54 | snd_hda_gen_add_kctl(struct hda_gen_spec *spec, const char *name, |
@@ -65,7 +66,7 @@ snd_hda_gen_add_kctl(struct hda_gen_spec *spec, const char *name, | |||
65 | return NULL; | 66 | return NULL; |
66 | return knew; | 67 | return knew; |
67 | } | 68 | } |
68 | EXPORT_SYMBOL_HDA(snd_hda_gen_add_kctl); | 69 | EXPORT_SYMBOL_GPL(snd_hda_gen_add_kctl); |
69 | 70 | ||
70 | static void free_kctls(struct hda_gen_spec *spec) | 71 | static void free_kctls(struct hda_gen_spec *spec) |
71 | { | 72 | { |
@@ -86,7 +87,7 @@ void snd_hda_gen_spec_free(struct hda_gen_spec *spec) | |||
86 | snd_array_free(&spec->paths); | 87 | snd_array_free(&spec->paths); |
87 | snd_array_free(&spec->loopback_list); | 88 | snd_array_free(&spec->loopback_list); |
88 | } | 89 | } |
89 | EXPORT_SYMBOL_HDA(snd_hda_gen_spec_free); | 90 | EXPORT_SYMBOL_GPL(snd_hda_gen_spec_free); |
90 | 91 | ||
91 | /* | 92 | /* |
92 | * store user hints | 93 | * store user hints |
@@ -266,7 +267,7 @@ struct nid_path *snd_hda_get_nid_path(struct hda_codec *codec, | |||
266 | { | 267 | { |
267 | return get_nid_path(codec, from_nid, to_nid, 0); | 268 | return get_nid_path(codec, from_nid, to_nid, 0); |
268 | } | 269 | } |
269 | EXPORT_SYMBOL_HDA(snd_hda_get_nid_path); | 270 | EXPORT_SYMBOL_GPL(snd_hda_get_nid_path); |
270 | 271 | ||
271 | /* get the index number corresponding to the path instance; | 272 | /* get the index number corresponding to the path instance; |
272 | * the index starts from 1, for easier checking the invalid value | 273 | * the index starts from 1, for easier checking the invalid value |
@@ -284,7 +285,7 @@ int snd_hda_get_path_idx(struct hda_codec *codec, struct nid_path *path) | |||
284 | return 0; | 285 | return 0; |
285 | return idx + 1; | 286 | return idx + 1; |
286 | } | 287 | } |
287 | EXPORT_SYMBOL_HDA(snd_hda_get_path_idx); | 288 | EXPORT_SYMBOL_GPL(snd_hda_get_path_idx); |
288 | 289 | ||
289 | /* get the path instance corresponding to the given index number */ | 290 | /* get the path instance corresponding to the given index number */ |
290 | struct nid_path *snd_hda_get_path_from_idx(struct hda_codec *codec, int idx) | 291 | struct nid_path *snd_hda_get_path_from_idx(struct hda_codec *codec, int idx) |
@@ -295,7 +296,7 @@ struct nid_path *snd_hda_get_path_from_idx(struct hda_codec *codec, int idx) | |||
295 | return NULL; | 296 | return NULL; |
296 | return snd_array_elem(&spec->paths, idx - 1); | 297 | return snd_array_elem(&spec->paths, idx - 1); |
297 | } | 298 | } |
298 | EXPORT_SYMBOL_HDA(snd_hda_get_path_from_idx); | 299 | EXPORT_SYMBOL_GPL(snd_hda_get_path_from_idx); |
299 | 300 | ||
300 | /* check whether the given DAC is already found in any existing paths */ | 301 | /* check whether the given DAC is already found in any existing paths */ |
301 | static bool is_dac_already_used(struct hda_codec *codec, hda_nid_t nid) | 302 | static bool is_dac_already_used(struct hda_codec *codec, hda_nid_t nid) |
@@ -432,7 +433,7 @@ bool snd_hda_parse_nid_path(struct hda_codec *codec, hda_nid_t from_nid, | |||
432 | } | 433 | } |
433 | return false; | 434 | return false; |
434 | } | 435 | } |
435 | EXPORT_SYMBOL_HDA(snd_hda_parse_nid_path); | 436 | EXPORT_SYMBOL_GPL(snd_hda_parse_nid_path); |
436 | 437 | ||
437 | /* | 438 | /* |
438 | * parse the path between the given NIDs and add to the path list. | 439 | * parse the path between the given NIDs and add to the path list. |
@@ -463,7 +464,7 @@ snd_hda_add_new_path(struct hda_codec *codec, hda_nid_t from_nid, | |||
463 | spec->paths.used--; | 464 | spec->paths.used--; |
464 | return NULL; | 465 | return NULL; |
465 | } | 466 | } |
466 | EXPORT_SYMBOL_HDA(snd_hda_add_new_path); | 467 | EXPORT_SYMBOL_GPL(snd_hda_add_new_path); |
467 | 468 | ||
468 | /* clear the given path as invalid so that it won't be picked up later */ | 469 | /* clear the given path as invalid so that it won't be picked up later */ |
469 | static void invalidate_nid_path(struct hda_codec *codec, int idx) | 470 | static void invalidate_nid_path(struct hda_codec *codec, int idx) |
@@ -773,7 +774,7 @@ void snd_hda_activate_path(struct hda_codec *codec, struct nid_path *path, | |||
773 | if (enable) | 774 | if (enable) |
774 | path->active = true; | 775 | path->active = true; |
775 | } | 776 | } |
776 | EXPORT_SYMBOL_HDA(snd_hda_activate_path); | 777 | EXPORT_SYMBOL_GPL(snd_hda_activate_path); |
777 | 778 | ||
778 | /* if the given path is inactive, put widgets into D3 (only if suitable) */ | 779 | /* if the given path is inactive, put widgets into D3 (only if suitable) */ |
779 | static void path_power_down_sync(struct hda_codec *codec, struct nid_path *path) | 780 | static void path_power_down_sync(struct hda_codec *codec, struct nid_path *path) |
@@ -1149,7 +1150,7 @@ const struct badness_table hda_main_out_badness = { | |||
1149 | .shared_clfe = BAD_SHARED_CLFE, | 1150 | .shared_clfe = BAD_SHARED_CLFE, |
1150 | .shared_surr_main = BAD_SHARED_SURROUND, | 1151 | .shared_surr_main = BAD_SHARED_SURROUND, |
1151 | }; | 1152 | }; |
1152 | EXPORT_SYMBOL_HDA(hda_main_out_badness); | 1153 | EXPORT_SYMBOL_GPL(hda_main_out_badness); |
1153 | 1154 | ||
1154 | const struct badness_table hda_extra_out_badness = { | 1155 | const struct badness_table hda_extra_out_badness = { |
1155 | .no_primary_dac = BAD_NO_DAC, | 1156 | .no_primary_dac = BAD_NO_DAC, |
@@ -1159,7 +1160,7 @@ const struct badness_table hda_extra_out_badness = { | |||
1159 | .shared_clfe = BAD_SHARED_EXTRA_SURROUND, | 1160 | .shared_clfe = BAD_SHARED_EXTRA_SURROUND, |
1160 | .shared_surr_main = BAD_NO_EXTRA_SURR_DAC, | 1161 | .shared_surr_main = BAD_NO_EXTRA_SURR_DAC, |
1161 | }; | 1162 | }; |
1162 | EXPORT_SYMBOL_HDA(hda_extra_out_badness); | 1163 | EXPORT_SYMBOL_GPL(hda_extra_out_badness); |
1163 | 1164 | ||
1164 | /* get the DAC of the primary output corresponding to the given array index */ | 1165 | /* get the DAC of the primary output corresponding to the given array index */ |
1165 | static hda_nid_t get_primary_out(struct hda_codec *codec, int idx) | 1166 | static hda_nid_t get_primary_out(struct hda_codec *codec, int idx) |
@@ -2857,9 +2858,11 @@ static bool look_for_mix_leaf_ctls(struct hda_codec *codec, hda_nid_t mix_nid, | |||
2857 | if (num_conns < idx) | 2858 | if (num_conns < idx) |
2858 | return false; | 2859 | return false; |
2859 | nid = list[idx]; | 2860 | nid = list[idx]; |
2860 | if (!*mix_val && nid_has_volume(codec, nid, HDA_OUTPUT)) | 2861 | if (!*mix_val && nid_has_volume(codec, nid, HDA_OUTPUT) && |
2862 | !is_ctl_associated(codec, nid, HDA_OUTPUT, 0, NID_PATH_VOL_CTL)) | ||
2861 | *mix_val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT); | 2863 | *mix_val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT); |
2862 | if (!*mute_val && nid_has_mute(codec, nid, HDA_OUTPUT)) | 2864 | if (!*mute_val && nid_has_mute(codec, nid, HDA_OUTPUT) && |
2865 | !is_ctl_associated(codec, nid, HDA_OUTPUT, 0, NID_PATH_MUTE_CTL)) | ||
2863 | *mute_val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT); | 2866 | *mute_val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT); |
2864 | 2867 | ||
2865 | return *mix_val || *mute_val; | 2868 | return *mix_val || *mute_val; |
@@ -3053,6 +3056,8 @@ static int parse_capture_source(struct hda_codec *codec, hda_nid_t pin, | |||
3053 | spec->imux_pins[imux->num_items] = pin; | 3056 | spec->imux_pins[imux->num_items] = pin; |
3054 | snd_hda_add_imux_item(imux, label, cfg_idx, NULL); | 3057 | snd_hda_add_imux_item(imux, label, cfg_idx, NULL); |
3055 | imux_added = true; | 3058 | imux_added = true; |
3059 | if (spec->dyn_adc_switch) | ||
3060 | spec->dyn_adc_idx[imux_idx] = c; | ||
3056 | } | 3061 | } |
3057 | } | 3062 | } |
3058 | 3063 | ||
@@ -3150,7 +3155,9 @@ static int create_input_ctls(struct hda_codec *codec) | |||
3150 | } | 3155 | } |
3151 | } | 3156 | } |
3152 | 3157 | ||
3153 | if (mixer && spec->add_stereo_mix_input) { | 3158 | /* add stereo mix when explicitly enabled via hint */ |
3159 | if (mixer && spec->add_stereo_mix_input && | ||
3160 | snd_hda_get_bool_hint(codec, "add_stereo_mix_input") > 0) { | ||
3154 | err = parse_capture_source(codec, mixer, CFG_IDX_MIX, num_adcs, | 3161 | err = parse_capture_source(codec, mixer, CFG_IDX_MIX, num_adcs, |
3155 | "Stereo Mix", 0); | 3162 | "Stereo Mix", 0); |
3156 | if (err < 0) | 3163 | if (err < 0) |
@@ -3916,7 +3923,7 @@ void snd_hda_gen_update_outputs(struct hda_codec *codec) | |||
3916 | do_automute(codec, ARRAY_SIZE(spec->autocfg.line_out_pins), | 3923 | do_automute(codec, ARRAY_SIZE(spec->autocfg.line_out_pins), |
3917 | spec->autocfg.line_out_pins, paths, on); | 3924 | spec->autocfg.line_out_pins, paths, on); |
3918 | } | 3925 | } |
3919 | EXPORT_SYMBOL_HDA(snd_hda_gen_update_outputs); | 3926 | EXPORT_SYMBOL_GPL(snd_hda_gen_update_outputs); |
3920 | 3927 | ||
3921 | static void call_update_outputs(struct hda_codec *codec) | 3928 | static void call_update_outputs(struct hda_codec *codec) |
3922 | { | 3929 | { |
@@ -3949,7 +3956,7 @@ void snd_hda_gen_hp_automute(struct hda_codec *codec, struct hda_jack_tbl *jack) | |||
3949 | return; | 3956 | return; |
3950 | call_update_outputs(codec); | 3957 | call_update_outputs(codec); |
3951 | } | 3958 | } |
3952 | EXPORT_SYMBOL_HDA(snd_hda_gen_hp_automute); | 3959 | EXPORT_SYMBOL_GPL(snd_hda_gen_hp_automute); |
3953 | 3960 | ||
3954 | /* standard line-out-automute helper */ | 3961 | /* standard line-out-automute helper */ |
3955 | void snd_hda_gen_line_automute(struct hda_codec *codec, struct hda_jack_tbl *jack) | 3962 | void snd_hda_gen_line_automute(struct hda_codec *codec, struct hda_jack_tbl *jack) |
@@ -3969,7 +3976,7 @@ void snd_hda_gen_line_automute(struct hda_codec *codec, struct hda_jack_tbl *jac | |||
3969 | return; | 3976 | return; |
3970 | call_update_outputs(codec); | 3977 | call_update_outputs(codec); |
3971 | } | 3978 | } |
3972 | EXPORT_SYMBOL_HDA(snd_hda_gen_line_automute); | 3979 | EXPORT_SYMBOL_GPL(snd_hda_gen_line_automute); |
3973 | 3980 | ||
3974 | /* standard mic auto-switch helper */ | 3981 | /* standard mic auto-switch helper */ |
3975 | void snd_hda_gen_mic_autoswitch(struct hda_codec *codec, struct hda_jack_tbl *jack) | 3982 | void snd_hda_gen_mic_autoswitch(struct hda_codec *codec, struct hda_jack_tbl *jack) |
@@ -3992,7 +3999,7 @@ void snd_hda_gen_mic_autoswitch(struct hda_codec *codec, struct hda_jack_tbl *ja | |||
3992 | } | 3999 | } |
3993 | mux_select(codec, 0, spec->am_entry[0].idx); | 4000 | mux_select(codec, 0, spec->am_entry[0].idx); |
3994 | } | 4001 | } |
3995 | EXPORT_SYMBOL_HDA(snd_hda_gen_mic_autoswitch); | 4002 | EXPORT_SYMBOL_GPL(snd_hda_gen_mic_autoswitch); |
3996 | 4003 | ||
3997 | /* call appropriate hooks */ | 4004 | /* call appropriate hooks */ |
3998 | static void call_hp_automute(struct hda_codec *codec, struct hda_jack_tbl *jack) | 4005 | static void call_hp_automute(struct hda_codec *codec, struct hda_jack_tbl *jack) |
@@ -4305,11 +4312,11 @@ static int check_auto_mic_availability(struct hda_codec *codec) | |||
4305 | } | 4312 | } |
4306 | 4313 | ||
4307 | /* power_filter hook; make inactive widgets into power down */ | 4314 | /* power_filter hook; make inactive widgets into power down */ |
4308 | static unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec, | 4315 | unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec, |
4309 | hda_nid_t nid, | 4316 | hda_nid_t nid, |
4310 | unsigned int power_state) | 4317 | unsigned int power_state) |
4311 | { | 4318 | { |
4312 | if (power_state != AC_PWRST_D0) | 4319 | if (power_state != AC_PWRST_D0 || nid == codec->afg) |
4313 | return power_state; | 4320 | return power_state; |
4314 | if (get_wcaps_type(get_wcaps(codec, nid)) >= AC_WID_POWER) | 4321 | if (get_wcaps_type(get_wcaps(codec, nid)) >= AC_WID_POWER) |
4315 | return power_state; | 4322 | return power_state; |
@@ -4317,6 +4324,7 @@ static unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec, | |||
4317 | return power_state; | 4324 | return power_state; |
4318 | return AC_PWRST_D3; | 4325 | return AC_PWRST_D3; |
4319 | } | 4326 | } |
4327 | EXPORT_SYMBOL_GPL(snd_hda_gen_path_power_filter); | ||
4320 | 4328 | ||
4321 | /* mute all aamix inputs initially; parse up to the first leaves */ | 4329 | /* mute all aamix inputs initially; parse up to the first leaves */ |
4322 | static void mute_all_mixer_nid(struct hda_codec *codec, hda_nid_t mix) | 4330 | static void mute_all_mixer_nid(struct hda_codec *codec, hda_nid_t mix) |
@@ -4374,7 +4382,8 @@ int snd_hda_gen_parse_auto_config(struct hda_codec *codec, | |||
4374 | spec->no_analog = 1; | 4382 | spec->no_analog = 1; |
4375 | goto dig_only; | 4383 | goto dig_only; |
4376 | } | 4384 | } |
4377 | return 0; /* can't find valid BIOS pin config */ | 4385 | if (!cfg->num_inputs && !cfg->dig_in_pin) |
4386 | return 0; /* can't find valid BIOS pin config */ | ||
4378 | } | 4387 | } |
4379 | 4388 | ||
4380 | if (!spec->no_primary_hp && | 4389 | if (!spec->no_primary_hp && |
@@ -4442,6 +4451,19 @@ int snd_hda_gen_parse_auto_config(struct hda_codec *codec, | |||
4442 | if (err < 0) | 4451 | if (err < 0) |
4443 | return err; | 4452 | return err; |
4444 | 4453 | ||
4454 | /* add stereo mix if available and not enabled yet */ | ||
4455 | if (!spec->auto_mic && spec->mixer_nid && | ||
4456 | spec->add_stereo_mix_input && | ||
4457 | spec->input_mux.num_items > 1 && | ||
4458 | snd_hda_get_bool_hint(codec, "add_stereo_mix_input") < 0) { | ||
4459 | err = parse_capture_source(codec, spec->mixer_nid, | ||
4460 | CFG_IDX_MIX, spec->num_all_adcs, | ||
4461 | "Stereo Mix", 0); | ||
4462 | if (err < 0) | ||
4463 | return err; | ||
4464 | } | ||
4465 | |||
4466 | |||
4445 | err = create_capture_mixers(codec); | 4467 | err = create_capture_mixers(codec); |
4446 | if (err < 0) | 4468 | if (err < 0) |
4447 | return err; | 4469 | return err; |
@@ -4494,7 +4516,7 @@ int snd_hda_gen_parse_auto_config(struct hda_codec *codec, | |||
4494 | 4516 | ||
4495 | return 1; | 4517 | return 1; |
4496 | } | 4518 | } |
4497 | EXPORT_SYMBOL_HDA(snd_hda_gen_parse_auto_config); | 4519 | EXPORT_SYMBOL_GPL(snd_hda_gen_parse_auto_config); |
4498 | 4520 | ||
4499 | 4521 | ||
4500 | /* | 4522 | /* |
@@ -4576,7 +4598,7 @@ int snd_hda_gen_build_controls(struct hda_codec *codec) | |||
4576 | 4598 | ||
4577 | return 0; | 4599 | return 0; |
4578 | } | 4600 | } |
4579 | EXPORT_SYMBOL_HDA(snd_hda_gen_build_controls); | 4601 | EXPORT_SYMBOL_GPL(snd_hda_gen_build_controls); |
4580 | 4602 | ||
4581 | 4603 | ||
4582 | /* | 4604 | /* |
@@ -5109,7 +5131,7 @@ int snd_hda_gen_build_pcms(struct hda_codec *codec) | |||
5109 | 5131 | ||
5110 | return 0; | 5132 | return 0; |
5111 | } | 5133 | } |
5112 | EXPORT_SYMBOL_HDA(snd_hda_gen_build_pcms); | 5134 | EXPORT_SYMBOL_GPL(snd_hda_gen_build_pcms); |
5113 | 5135 | ||
5114 | 5136 | ||
5115 | /* | 5137 | /* |
@@ -5183,6 +5205,23 @@ static void init_multi_io(struct hda_codec *codec) | |||
5183 | } | 5205 | } |
5184 | } | 5206 | } |
5185 | 5207 | ||
5208 | static void init_aamix_paths(struct hda_codec *codec) | ||
5209 | { | ||
5210 | struct hda_gen_spec *spec = codec->spec; | ||
5211 | |||
5212 | if (!spec->have_aamix_ctl) | ||
5213 | return; | ||
5214 | update_aamix_paths(codec, spec->aamix_mode, spec->out_paths[0], | ||
5215 | spec->aamix_out_paths[0], | ||
5216 | spec->autocfg.line_out_type); | ||
5217 | update_aamix_paths(codec, spec->aamix_mode, spec->hp_paths[0], | ||
5218 | spec->aamix_out_paths[1], | ||
5219 | AUTO_PIN_HP_OUT); | ||
5220 | update_aamix_paths(codec, spec->aamix_mode, spec->speaker_paths[0], | ||
5221 | spec->aamix_out_paths[2], | ||
5222 | AUTO_PIN_SPEAKER_OUT); | ||
5223 | } | ||
5224 | |||
5186 | /* set up input pins and loopback paths */ | 5225 | /* set up input pins and loopback paths */ |
5187 | static void init_analog_input(struct hda_codec *codec) | 5226 | static void init_analog_input(struct hda_codec *codec) |
5188 | { | 5227 | { |
@@ -5285,6 +5324,7 @@ int snd_hda_gen_init(struct hda_codec *codec) | |||
5285 | init_multi_out(codec); | 5324 | init_multi_out(codec); |
5286 | init_extra_out(codec); | 5325 | init_extra_out(codec); |
5287 | init_multi_io(codec); | 5326 | init_multi_io(codec); |
5327 | init_aamix_paths(codec); | ||
5288 | init_analog_input(codec); | 5328 | init_analog_input(codec); |
5289 | init_input_src(codec); | 5329 | init_input_src(codec); |
5290 | init_digital(codec); | 5330 | init_digital(codec); |
@@ -5302,7 +5342,7 @@ int snd_hda_gen_init(struct hda_codec *codec) | |||
5302 | hda_call_check_power_status(codec, 0x01); | 5342 | hda_call_check_power_status(codec, 0x01); |
5303 | return 0; | 5343 | return 0; |
5304 | } | 5344 | } |
5305 | EXPORT_SYMBOL_HDA(snd_hda_gen_init); | 5345 | EXPORT_SYMBOL_GPL(snd_hda_gen_init); |
5306 | 5346 | ||
5307 | /* | 5347 | /* |
5308 | * free the generic spec; | 5348 | * free the generic spec; |
@@ -5315,7 +5355,7 @@ void snd_hda_gen_free(struct hda_codec *codec) | |||
5315 | kfree(codec->spec); | 5355 | kfree(codec->spec); |
5316 | codec->spec = NULL; | 5356 | codec->spec = NULL; |
5317 | } | 5357 | } |
5318 | EXPORT_SYMBOL_HDA(snd_hda_gen_free); | 5358 | EXPORT_SYMBOL_GPL(snd_hda_gen_free); |
5319 | 5359 | ||
5320 | #ifdef CONFIG_PM | 5360 | #ifdef CONFIG_PM |
5321 | /* | 5361 | /* |
@@ -5327,7 +5367,7 @@ int snd_hda_gen_check_power_status(struct hda_codec *codec, hda_nid_t nid) | |||
5327 | struct hda_gen_spec *spec = codec->spec; | 5367 | struct hda_gen_spec *spec = codec->spec; |
5328 | return snd_hda_check_amp_list_power(codec, &spec->loopback, nid); | 5368 | return snd_hda_check_amp_list_power(codec, &spec->loopback, nid); |
5329 | } | 5369 | } |
5330 | EXPORT_SYMBOL_HDA(snd_hda_gen_check_power_status); | 5370 | EXPORT_SYMBOL_GPL(snd_hda_gen_check_power_status); |
5331 | #endif | 5371 | #endif |
5332 | 5372 | ||
5333 | 5373 | ||
@@ -5372,4 +5412,7 @@ error: | |||
5372 | snd_hda_gen_free(codec); | 5412 | snd_hda_gen_free(codec); |
5373 | return err; | 5413 | return err; |
5374 | } | 5414 | } |
5375 | EXPORT_SYMBOL_HDA(snd_hda_parse_generic_codec); | 5415 | EXPORT_SYMBOL_GPL(snd_hda_parse_generic_codec); |
5416 | |||
5417 | MODULE_LICENSE("GPL"); | ||
5418 | MODULE_DESCRIPTION("Generic HD-audio codec parser"); | ||
diff --git a/sound/pci/hda/hda_generic.h b/sound/pci/hda/hda_generic.h index 0929a06df812..07f767231c9f 100644 --- a/sound/pci/hda/hda_generic.h +++ b/sound/pci/hda/hda_generic.h | |||
@@ -335,5 +335,8 @@ void snd_hda_gen_update_outputs(struct hda_codec *codec); | |||
335 | #ifdef CONFIG_PM | 335 | #ifdef CONFIG_PM |
336 | int snd_hda_gen_check_power_status(struct hda_codec *codec, hda_nid_t nid); | 336 | int snd_hda_gen_check_power_status(struct hda_codec *codec, hda_nid_t nid); |
337 | #endif | 337 | #endif |
338 | unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec, | ||
339 | hda_nid_t nid, | ||
340 | unsigned int power_state); | ||
338 | 341 | ||
339 | #endif /* __SOUND_HDA_GENERIC_H */ | 342 | #endif /* __SOUND_HDA_GENERIC_H */ |
diff --git a/sound/pci/hda/hda_hwdep.c b/sound/pci/hda/hda_hwdep.c index fe0bda19de15..72d8389fb399 100644 --- a/sound/pci/hda/hda_hwdep.c +++ b/sound/pci/hda/hda_hwdep.c | |||
@@ -616,7 +616,7 @@ const char *snd_hda_get_hint(struct hda_codec *codec, const char *key) | |||
616 | struct hda_hint *hint = get_hint(codec, key); | 616 | struct hda_hint *hint = get_hint(codec, key); |
617 | return hint ? hint->val : NULL; | 617 | return hint ? hint->val : NULL; |
618 | } | 618 | } |
619 | EXPORT_SYMBOL_HDA(snd_hda_get_hint); | 619 | EXPORT_SYMBOL_GPL(snd_hda_get_hint); |
620 | 620 | ||
621 | int snd_hda_get_bool_hint(struct hda_codec *codec, const char *key) | 621 | int snd_hda_get_bool_hint(struct hda_codec *codec, const char *key) |
622 | { | 622 | { |
@@ -642,7 +642,7 @@ int snd_hda_get_bool_hint(struct hda_codec *codec, const char *key) | |||
642 | mutex_unlock(&codec->user_mutex); | 642 | mutex_unlock(&codec->user_mutex); |
643 | return ret; | 643 | return ret; |
644 | } | 644 | } |
645 | EXPORT_SYMBOL_HDA(snd_hda_get_bool_hint); | 645 | EXPORT_SYMBOL_GPL(snd_hda_get_bool_hint); |
646 | 646 | ||
647 | int snd_hda_get_int_hint(struct hda_codec *codec, const char *key, int *valp) | 647 | int snd_hda_get_int_hint(struct hda_codec *codec, const char *key, int *valp) |
648 | { | 648 | { |
@@ -663,7 +663,7 @@ int snd_hda_get_int_hint(struct hda_codec *codec, const char *key, int *valp) | |||
663 | mutex_unlock(&codec->user_mutex); | 663 | mutex_unlock(&codec->user_mutex); |
664 | return ret; | 664 | return ret; |
665 | } | 665 | } |
666 | EXPORT_SYMBOL_HDA(snd_hda_get_int_hint); | 666 | EXPORT_SYMBOL_GPL(snd_hda_get_int_hint); |
667 | #endif /* CONFIG_SND_HDA_RECONFIG */ | 667 | #endif /* CONFIG_SND_HDA_RECONFIG */ |
668 | 668 | ||
669 | #ifdef CONFIG_SND_HDA_PATCH_LOADER | 669 | #ifdef CONFIG_SND_HDA_PATCH_LOADER |
@@ -762,20 +762,50 @@ DEFINE_PARSE_ID_MODE(revision_id); | |||
762 | 762 | ||
763 | struct hda_patch_item { | 763 | struct hda_patch_item { |
764 | const char *tag; | 764 | const char *tag; |
765 | const char *alias; | ||
765 | void (*parser)(char *buf, struct hda_bus *bus, struct hda_codec **retc); | 766 | void (*parser)(char *buf, struct hda_bus *bus, struct hda_codec **retc); |
766 | int need_codec; | ||
767 | }; | 767 | }; |
768 | 768 | ||
769 | static struct hda_patch_item patch_items[NUM_LINE_MODES] = { | 769 | static struct hda_patch_item patch_items[NUM_LINE_MODES] = { |
770 | [LINE_MODE_CODEC] = { "[codec]", parse_codec_mode, 0 }, | 770 | [LINE_MODE_CODEC] = { |
771 | [LINE_MODE_MODEL] = { "[model]", parse_model_mode, 1 }, | 771 | .tag = "[codec]", |
772 | [LINE_MODE_VERB] = { "[verb]", parse_verb_mode, 1 }, | 772 | .parser = parse_codec_mode, |
773 | [LINE_MODE_PINCFG] = { "[pincfg]", parse_pincfg_mode, 1 }, | 773 | }, |
774 | [LINE_MODE_HINT] = { "[hint]", parse_hint_mode, 1 }, | 774 | [LINE_MODE_MODEL] = { |
775 | [LINE_MODE_VENDOR_ID] = { "[vendor_id]", parse_vendor_id_mode, 1 }, | 775 | .tag = "[model]", |
776 | [LINE_MODE_SUBSYSTEM_ID] = { "[subsystem_id]", parse_subsystem_id_mode, 1 }, | 776 | .parser = parse_model_mode, |
777 | [LINE_MODE_REVISION_ID] = { "[revision_id]", parse_revision_id_mode, 1 }, | 777 | }, |
778 | [LINE_MODE_CHIP_NAME] = { "[chip_name]", parse_chip_name_mode, 1 }, | 778 | [LINE_MODE_VERB] = { |
779 | .tag = "[verb]", | ||
780 | .alias = "[init_verbs]", | ||
781 | .parser = parse_verb_mode, | ||
782 | }, | ||
783 | [LINE_MODE_PINCFG] = { | ||
784 | .tag = "[pincfg]", | ||
785 | .alias = "[user_pin_configs]", | ||
786 | .parser = parse_pincfg_mode, | ||
787 | }, | ||
788 | [LINE_MODE_HINT] = { | ||
789 | .tag = "[hint]", | ||
790 | .alias = "[hints]", | ||
791 | .parser = parse_hint_mode | ||
792 | }, | ||
793 | [LINE_MODE_VENDOR_ID] = { | ||
794 | .tag = "[vendor_id]", | ||
795 | .parser = parse_vendor_id_mode, | ||
796 | }, | ||
797 | [LINE_MODE_SUBSYSTEM_ID] = { | ||
798 | .tag = "[subsystem_id]", | ||
799 | .parser = parse_subsystem_id_mode, | ||
800 | }, | ||
801 | [LINE_MODE_REVISION_ID] = { | ||
802 | .tag = "[revision_id]", | ||
803 | .parser = parse_revision_id_mode, | ||
804 | }, | ||
805 | [LINE_MODE_CHIP_NAME] = { | ||
806 | .tag = "[chip_name]", | ||
807 | .parser = parse_chip_name_mode, | ||
808 | }, | ||
779 | }; | 809 | }; |
780 | 810 | ||
781 | /* check the line starting with '[' -- change the parser mode accodingly */ | 811 | /* check the line starting with '[' -- change the parser mode accodingly */ |
@@ -787,6 +817,8 @@ static int parse_line_mode(char *buf, struct hda_bus *bus) | |||
787 | continue; | 817 | continue; |
788 | if (strmatch(buf, patch_items[i].tag)) | 818 | if (strmatch(buf, patch_items[i].tag)) |
789 | return i; | 819 | return i; |
820 | if (patch_items[i].alias && strmatch(buf, patch_items[i].alias)) | ||
821 | return i; | ||
790 | } | 822 | } |
791 | return LINE_MODE_NONE; | 823 | return LINE_MODE_NONE; |
792 | } | 824 | } |
@@ -846,10 +878,10 @@ int snd_hda_load_patch(struct hda_bus *bus, size_t fw_size, const void *fw_buf) | |||
846 | if (*buf == '[') | 878 | if (*buf == '[') |
847 | line_mode = parse_line_mode(buf, bus); | 879 | line_mode = parse_line_mode(buf, bus); |
848 | else if (patch_items[line_mode].parser && | 880 | else if (patch_items[line_mode].parser && |
849 | (codec || !patch_items[line_mode].need_codec)) | 881 | (codec || line_mode <= LINE_MODE_CODEC)) |
850 | patch_items[line_mode].parser(buf, bus, &codec); | 882 | patch_items[line_mode].parser(buf, bus, &codec); |
851 | } | 883 | } |
852 | return 0; | 884 | return 0; |
853 | } | 885 | } |
854 | EXPORT_SYMBOL_HDA(snd_hda_load_patch); | 886 | EXPORT_SYMBOL_GPL(snd_hda_load_patch); |
855 | #endif /* CONFIG_SND_HDA_PATCH_LOADER */ | 887 | #endif /* CONFIG_SND_HDA_PATCH_LOADER */ |
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 956871d8b3d2..fa2879a21a50 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -297,9 +297,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; | |||
297 | #define ULI_NUM_CAPTURE 5 | 297 | #define ULI_NUM_CAPTURE 5 |
298 | #define ULI_NUM_PLAYBACK 6 | 298 | #define ULI_NUM_PLAYBACK 6 |
299 | 299 | ||
300 | /* ATI HDMI has 1 playback and 0 capture */ | 300 | /* ATI HDMI may have up to 8 playbacks and 0 capture */ |
301 | #define ATIHDMI_NUM_CAPTURE 0 | 301 | #define ATIHDMI_NUM_CAPTURE 0 |
302 | #define ATIHDMI_NUM_PLAYBACK 1 | 302 | #define ATIHDMI_NUM_PLAYBACK 8 |
303 | 303 | ||
304 | /* TERA has 4 playback and 3 capture */ | 304 | /* TERA has 4 playback and 3 capture */ |
305 | #define TERA_NUM_CAPTURE 3 | 305 | #define TERA_NUM_CAPTURE 3 |
@@ -431,6 +431,8 @@ struct azx_dev { | |||
431 | struct timecounter azx_tc; | 431 | struct timecounter azx_tc; |
432 | struct cyclecounter azx_cc; | 432 | struct cyclecounter azx_cc; |
433 | 433 | ||
434 | int delay_negative_threshold; | ||
435 | |||
434 | #ifdef CONFIG_SND_HDA_DSP_LOADER | 436 | #ifdef CONFIG_SND_HDA_DSP_LOADER |
435 | struct mutex dsp_mutex; | 437 | struct mutex dsp_mutex; |
436 | #endif | 438 | #endif |
@@ -543,9 +545,7 @@ struct azx { | |||
543 | /* for pending irqs */ | 545 | /* for pending irqs */ |
544 | struct work_struct irq_pending_work; | 546 | struct work_struct irq_pending_work; |
545 | 547 | ||
546 | #ifdef CONFIG_SND_HDA_I915 | ||
547 | struct work_struct probe_work; | 548 | struct work_struct probe_work; |
548 | #endif | ||
549 | 549 | ||
550 | /* reboot notifier (for mysterious hangup problem at power-down) */ | 550 | /* reboot notifier (for mysterious hangup problem at power-down) */ |
551 | struct notifier_block reboot_notifier; | 551 | struct notifier_block reboot_notifier; |
@@ -2197,6 +2197,15 @@ static int azx_pcm_prepare(struct snd_pcm_substream *substream) | |||
2197 | goto unlock; | 2197 | goto unlock; |
2198 | } | 2198 | } |
2199 | 2199 | ||
2200 | /* when LPIB delay correction gives a small negative value, | ||
2201 | * we ignore it; currently set the threshold statically to | ||
2202 | * 64 frames | ||
2203 | */ | ||
2204 | if (runtime->period_size > 64) | ||
2205 | azx_dev->delay_negative_threshold = -frames_to_bytes(runtime, 64); | ||
2206 | else | ||
2207 | azx_dev->delay_negative_threshold = 0; | ||
2208 | |||
2200 | /* wallclk has 24Mhz clock source */ | 2209 | /* wallclk has 24Mhz clock source */ |
2201 | azx_dev->period_wallclk = (((runtime->period_size * 24000) / | 2210 | azx_dev->period_wallclk = (((runtime->period_size * 24000) / |
2202 | runtime->rate) * 1000); | 2211 | runtime->rate) * 1000); |
@@ -2449,8 +2458,12 @@ static unsigned int azx_get_position(struct azx *chip, | |||
2449 | delay = pos - lpib_pos; | 2458 | delay = pos - lpib_pos; |
2450 | else | 2459 | else |
2451 | delay = lpib_pos - pos; | 2460 | delay = lpib_pos - pos; |
2452 | if (delay < 0) | 2461 | if (delay < 0) { |
2453 | delay += azx_dev->bufsize; | 2462 | if (delay >= azx_dev->delay_negative_threshold) |
2463 | delay = 0; | ||
2464 | else | ||
2465 | delay += azx_dev->bufsize; | ||
2466 | } | ||
2454 | if (delay >= azx_dev->period_bytes) { | 2467 | if (delay >= azx_dev->period_bytes) { |
2455 | snd_printk(KERN_WARNING SFX | 2468 | snd_printk(KERN_WARNING SFX |
2456 | "%s: Unstable LPIB (%d >= %d); " | 2469 | "%s: Unstable LPIB (%d >= %d); " |
@@ -3504,12 +3517,10 @@ static void azx_check_snoop_available(struct azx *chip) | |||
3504 | } | 3517 | } |
3505 | } | 3518 | } |
3506 | 3519 | ||
3507 | #ifdef CONFIG_SND_HDA_I915 | ||
3508 | static void azx_probe_work(struct work_struct *work) | 3520 | static void azx_probe_work(struct work_struct *work) |
3509 | { | 3521 | { |
3510 | azx_probe_continue(container_of(work, struct azx, probe_work)); | 3522 | azx_probe_continue(container_of(work, struct azx, probe_work)); |
3511 | } | 3523 | } |
3512 | #endif | ||
3513 | 3524 | ||
3514 | /* | 3525 | /* |
3515 | * constructor | 3526 | * constructor |
@@ -3586,10 +3597,8 @@ static int azx_create(struct snd_card *card, struct pci_dev *pci, | |||
3586 | return err; | 3597 | return err; |
3587 | } | 3598 | } |
3588 | 3599 | ||
3589 | #ifdef CONFIG_SND_HDA_I915 | ||
3590 | /* continue probing in work context as may trigger request module */ | 3600 | /* continue probing in work context as may trigger request module */ |
3591 | INIT_WORK(&chip->probe_work, azx_probe_work); | 3601 | INIT_WORK(&chip->probe_work, azx_probe_work); |
3592 | #endif | ||
3593 | 3602 | ||
3594 | *rchip = chip; | 3603 | *rchip = chip; |
3595 | 3604 | ||
@@ -3809,7 +3818,7 @@ static int azx_probe(struct pci_dev *pci, | |||
3809 | static int dev; | 3818 | static int dev; |
3810 | struct snd_card *card; | 3819 | struct snd_card *card; |
3811 | struct azx *chip; | 3820 | struct azx *chip; |
3812 | bool probe_now; | 3821 | bool schedule_probe; |
3813 | int err; | 3822 | int err; |
3814 | 3823 | ||
3815 | if (dev >= SNDRV_CARDS) | 3824 | if (dev >= SNDRV_CARDS) |
@@ -3848,7 +3857,7 @@ static int azx_probe(struct pci_dev *pci, | |||
3848 | chip->disabled = true; | 3857 | chip->disabled = true; |
3849 | } | 3858 | } |
3850 | 3859 | ||
3851 | probe_now = !chip->disabled; | 3860 | schedule_probe = !chip->disabled; |
3852 | 3861 | ||
3853 | #ifdef CONFIG_SND_HDA_PATCH_LOADER | 3862 | #ifdef CONFIG_SND_HDA_PATCH_LOADER |
3854 | if (patch[dev] && *patch[dev]) { | 3863 | if (patch[dev] && *patch[dev]) { |
@@ -3859,25 +3868,17 @@ static int azx_probe(struct pci_dev *pci, | |||
3859 | azx_firmware_cb); | 3868 | azx_firmware_cb); |
3860 | if (err < 0) | 3869 | if (err < 0) |
3861 | goto out_free; | 3870 | goto out_free; |
3862 | probe_now = false; /* continued in azx_firmware_cb() */ | 3871 | schedule_probe = false; /* continued in azx_firmware_cb() */ |
3863 | } | 3872 | } |
3864 | #endif /* CONFIG_SND_HDA_PATCH_LOADER */ | 3873 | #endif /* CONFIG_SND_HDA_PATCH_LOADER */ |
3865 | 3874 | ||
3866 | /* continue probing in work context, avoid request_module deadlock */ | 3875 | #ifndef CONFIG_SND_HDA_I915 |
3867 | if (probe_now && (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)) { | 3876 | if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) |
3868 | #ifdef CONFIG_SND_HDA_I915 | ||
3869 | probe_now = false; | ||
3870 | schedule_work(&chip->probe_work); | ||
3871 | #else | ||
3872 | snd_printk(KERN_ERR SFX "Haswell must build in CONFIG_SND_HDA_I915\n"); | 3877 | snd_printk(KERN_ERR SFX "Haswell must build in CONFIG_SND_HDA_I915\n"); |
3873 | #endif | 3878 | #endif |
3874 | } | ||
3875 | 3879 | ||
3876 | if (probe_now) { | 3880 | if (schedule_probe) |
3877 | err = azx_probe_continue(chip); | 3881 | schedule_work(&chip->probe_work); |
3878 | if (err < 0) | ||
3879 | goto out_free; | ||
3880 | } | ||
3881 | 3882 | ||
3882 | dev++; | 3883 | dev++; |
3883 | if (chip->disabled) | 3884 | if (chip->disabled) |
@@ -3983,7 +3984,7 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { | |||
3983 | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM }, | 3984 | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM }, |
3984 | /* Panther Point */ | 3985 | /* Panther Point */ |
3985 | { PCI_DEVICE(0x8086, 0x1e20), | 3986 | { PCI_DEVICE(0x8086, 0x1e20), |
3986 | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM }, | 3987 | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, |
3987 | /* Lynx Point */ | 3988 | /* Lynx Point */ |
3988 | { PCI_DEVICE(0x8086, 0x8c20), | 3989 | { PCI_DEVICE(0x8086, 0x8c20), |
3989 | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, | 3990 | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, |
@@ -4008,6 +4009,9 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { | |||
4008 | .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL }, | 4009 | .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL }, |
4009 | { PCI_DEVICE(0x8086, 0x0d0c), | 4010 | { PCI_DEVICE(0x8086, 0x0d0c), |
4010 | .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL }, | 4011 | .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL }, |
4012 | /* Broadwell */ | ||
4013 | { PCI_DEVICE(0x8086, 0x160c), | ||
4014 | .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL }, | ||
4011 | /* 5 Series/3400 */ | 4015 | /* 5 Series/3400 */ |
4012 | { PCI_DEVICE(0x8086, 0x3b56), | 4016 | { PCI_DEVICE(0x8086, 0x3b56), |
4013 | .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM }, | 4017 | .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM }, |
diff --git a/sound/pci/hda/hda_jack.c b/sound/pci/hda/hda_jack.c index afe594411a56..9746d73cec52 100644 --- a/sound/pci/hda/hda_jack.c +++ b/sound/pci/hda/hda_jack.c | |||
@@ -34,7 +34,7 @@ bool is_jack_detectable(struct hda_codec *codec, hda_nid_t nid) | |||
34 | return false; | 34 | return false; |
35 | return true; | 35 | return true; |
36 | } | 36 | } |
37 | EXPORT_SYMBOL_HDA(is_jack_detectable); | 37 | EXPORT_SYMBOL_GPL(is_jack_detectable); |
38 | 38 | ||
39 | /* execute pin sense measurement */ | 39 | /* execute pin sense measurement */ |
40 | static u32 read_pin_sense(struct hda_codec *codec, hda_nid_t nid) | 40 | static u32 read_pin_sense(struct hda_codec *codec, hda_nid_t nid) |
@@ -71,7 +71,7 @@ snd_hda_jack_tbl_get(struct hda_codec *codec, hda_nid_t nid) | |||
71 | return jack; | 71 | return jack; |
72 | return NULL; | 72 | return NULL; |
73 | } | 73 | } |
74 | EXPORT_SYMBOL_HDA(snd_hda_jack_tbl_get); | 74 | EXPORT_SYMBOL_GPL(snd_hda_jack_tbl_get); |
75 | 75 | ||
76 | /** | 76 | /** |
77 | * snd_hda_jack_tbl_get_from_tag - query the jack-table entry for the given tag | 77 | * snd_hda_jack_tbl_get_from_tag - query the jack-table entry for the given tag |
@@ -89,7 +89,7 @@ snd_hda_jack_tbl_get_from_tag(struct hda_codec *codec, unsigned char tag) | |||
89 | return jack; | 89 | return jack; |
90 | return NULL; | 90 | return NULL; |
91 | } | 91 | } |
92 | EXPORT_SYMBOL_HDA(snd_hda_jack_tbl_get_from_tag); | 92 | EXPORT_SYMBOL_GPL(snd_hda_jack_tbl_get_from_tag); |
93 | 93 | ||
94 | /** | 94 | /** |
95 | * snd_hda_jack_tbl_new - create a jack-table entry for the given NID | 95 | * snd_hda_jack_tbl_new - create a jack-table entry for the given NID |
@@ -108,7 +108,7 @@ snd_hda_jack_tbl_new(struct hda_codec *codec, hda_nid_t nid) | |||
108 | jack->tag = codec->jacktbl.used; | 108 | jack->tag = codec->jacktbl.used; |
109 | return jack; | 109 | return jack; |
110 | } | 110 | } |
111 | EXPORT_SYMBOL_HDA(snd_hda_jack_tbl_new); | 111 | EXPORT_SYMBOL_GPL(snd_hda_jack_tbl_new); |
112 | 112 | ||
113 | void snd_hda_jack_tbl_clear(struct hda_codec *codec) | 113 | void snd_hda_jack_tbl_clear(struct hda_codec *codec) |
114 | { | 114 | { |
@@ -172,7 +172,7 @@ void snd_hda_jack_set_dirty_all(struct hda_codec *codec) | |||
172 | if (jack->nid) | 172 | if (jack->nid) |
173 | jack->jack_dirty = 1; | 173 | jack->jack_dirty = 1; |
174 | } | 174 | } |
175 | EXPORT_SYMBOL_HDA(snd_hda_jack_set_dirty_all); | 175 | EXPORT_SYMBOL_GPL(snd_hda_jack_set_dirty_all); |
176 | 176 | ||
177 | /** | 177 | /** |
178 | * snd_hda_pin_sense - execute pin sense measurement | 178 | * snd_hda_pin_sense - execute pin sense measurement |
@@ -191,7 +191,7 @@ u32 snd_hda_pin_sense(struct hda_codec *codec, hda_nid_t nid) | |||
191 | } | 191 | } |
192 | return read_pin_sense(codec, nid); | 192 | return read_pin_sense(codec, nid); |
193 | } | 193 | } |
194 | EXPORT_SYMBOL_HDA(snd_hda_pin_sense); | 194 | EXPORT_SYMBOL_GPL(snd_hda_pin_sense); |
195 | 195 | ||
196 | /** | 196 | /** |
197 | * snd_hda_jack_detect_state - query pin Presence Detect status | 197 | * snd_hda_jack_detect_state - query pin Presence Detect status |
@@ -211,7 +211,7 @@ int snd_hda_jack_detect_state(struct hda_codec *codec, hda_nid_t nid) | |||
211 | else | 211 | else |
212 | return HDA_JACK_NOT_PRESENT; | 212 | return HDA_JACK_NOT_PRESENT; |
213 | } | 213 | } |
214 | EXPORT_SYMBOL_HDA(snd_hda_jack_detect_state); | 214 | EXPORT_SYMBOL_GPL(snd_hda_jack_detect_state); |
215 | 215 | ||
216 | /** | 216 | /** |
217 | * snd_hda_jack_detect_enable - enable the jack-detection | 217 | * snd_hda_jack_detect_enable - enable the jack-detection |
@@ -236,14 +236,14 @@ int snd_hda_jack_detect_enable_callback(struct hda_codec *codec, hda_nid_t nid, | |||
236 | AC_VERB_SET_UNSOLICITED_ENABLE, | 236 | AC_VERB_SET_UNSOLICITED_ENABLE, |
237 | AC_USRSP_EN | jack->tag); | 237 | AC_USRSP_EN | jack->tag); |
238 | } | 238 | } |
239 | EXPORT_SYMBOL_HDA(snd_hda_jack_detect_enable_callback); | 239 | EXPORT_SYMBOL_GPL(snd_hda_jack_detect_enable_callback); |
240 | 240 | ||
241 | int snd_hda_jack_detect_enable(struct hda_codec *codec, hda_nid_t nid, | 241 | int snd_hda_jack_detect_enable(struct hda_codec *codec, hda_nid_t nid, |
242 | unsigned char action) | 242 | unsigned char action) |
243 | { | 243 | { |
244 | return snd_hda_jack_detect_enable_callback(codec, nid, action, NULL); | 244 | return snd_hda_jack_detect_enable_callback(codec, nid, action, NULL); |
245 | } | 245 | } |
246 | EXPORT_SYMBOL_HDA(snd_hda_jack_detect_enable); | 246 | EXPORT_SYMBOL_GPL(snd_hda_jack_detect_enable); |
247 | 247 | ||
248 | /** | 248 | /** |
249 | * snd_hda_jack_set_gating_jack - Set gating jack. | 249 | * snd_hda_jack_set_gating_jack - Set gating jack. |
@@ -264,7 +264,7 @@ int snd_hda_jack_set_gating_jack(struct hda_codec *codec, hda_nid_t gated_nid, | |||
264 | 264 | ||
265 | return 0; | 265 | return 0; |
266 | } | 266 | } |
267 | EXPORT_SYMBOL_HDA(snd_hda_jack_set_gating_jack); | 267 | EXPORT_SYMBOL_GPL(snd_hda_jack_set_gating_jack); |
268 | 268 | ||
269 | /** | 269 | /** |
270 | * snd_hda_jack_report_sync - sync the states of all jacks and report if changed | 270 | * snd_hda_jack_report_sync - sync the states of all jacks and report if changed |
@@ -297,7 +297,7 @@ void snd_hda_jack_report_sync(struct hda_codec *codec) | |||
297 | #endif | 297 | #endif |
298 | } | 298 | } |
299 | } | 299 | } |
300 | EXPORT_SYMBOL_HDA(snd_hda_jack_report_sync); | 300 | EXPORT_SYMBOL_GPL(snd_hda_jack_report_sync); |
301 | 301 | ||
302 | #ifdef CONFIG_SND_HDA_INPUT_JACK | 302 | #ifdef CONFIG_SND_HDA_INPUT_JACK |
303 | /* guess the jack type from the pin-config */ | 303 | /* guess the jack type from the pin-config */ |
@@ -377,7 +377,7 @@ int snd_hda_jack_add_kctl(struct hda_codec *codec, hda_nid_t nid, | |||
377 | { | 377 | { |
378 | return __snd_hda_jack_add_kctl(codec, nid, name, idx, false); | 378 | return __snd_hda_jack_add_kctl(codec, nid, name, idx, false); |
379 | } | 379 | } |
380 | EXPORT_SYMBOL_HDA(snd_hda_jack_add_kctl); | 380 | EXPORT_SYMBOL_GPL(snd_hda_jack_add_kctl); |
381 | 381 | ||
382 | /* get the unique index number for the given kctl name */ | 382 | /* get the unique index number for the given kctl name */ |
383 | static int get_unique_index(struct hda_codec *codec, const char *name, int idx) | 383 | static int get_unique_index(struct hda_codec *codec, const char *name, int idx) |
@@ -493,7 +493,7 @@ int snd_hda_jack_add_kctls(struct hda_codec *codec, | |||
493 | return err; | 493 | return err; |
494 | return 0; | 494 | return 0; |
495 | } | 495 | } |
496 | EXPORT_SYMBOL_HDA(snd_hda_jack_add_kctls); | 496 | EXPORT_SYMBOL_GPL(snd_hda_jack_add_kctls); |
497 | 497 | ||
498 | static void call_jack_callback(struct hda_codec *codec, | 498 | static void call_jack_callback(struct hda_codec *codec, |
499 | struct hda_jack_tbl *jack) | 499 | struct hda_jack_tbl *jack) |
@@ -521,7 +521,7 @@ void snd_hda_jack_unsol_event(struct hda_codec *codec, unsigned int res) | |||
521 | call_jack_callback(codec, event); | 521 | call_jack_callback(codec, event); |
522 | snd_hda_jack_report_sync(codec); | 522 | snd_hda_jack_report_sync(codec); |
523 | } | 523 | } |
524 | EXPORT_SYMBOL_HDA(snd_hda_jack_unsol_event); | 524 | EXPORT_SYMBOL_GPL(snd_hda_jack_unsol_event); |
525 | 525 | ||
526 | void snd_hda_jack_poll_all(struct hda_codec *codec) | 526 | void snd_hda_jack_poll_all(struct hda_codec *codec) |
527 | { | 527 | { |
@@ -542,5 +542,5 @@ void snd_hda_jack_poll_all(struct hda_codec *codec) | |||
542 | if (changes) | 542 | if (changes) |
543 | snd_hda_jack_report_sync(codec); | 543 | snd_hda_jack_report_sync(codec); |
544 | } | 544 | } |
545 | EXPORT_SYMBOL_HDA(snd_hda_jack_poll_all); | 545 | EXPORT_SYMBOL_GPL(snd_hda_jack_poll_all); |
546 | 546 | ||
diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h index d398b648bb5d..da80c5bd7fd4 100644 --- a/sound/pci/hda/hda_local.h +++ b/sound/pci/hda/hda_local.h | |||
@@ -352,14 +352,8 @@ int snd_hda_multi_out_analog_cleanup(struct hda_codec *codec, | |||
352 | /* | 352 | /* |
353 | * generic codec parser | 353 | * generic codec parser |
354 | */ | 354 | */ |
355 | #ifdef CONFIG_SND_HDA_GENERIC | ||
356 | int snd_hda_parse_generic_codec(struct hda_codec *codec); | 355 | int snd_hda_parse_generic_codec(struct hda_codec *codec); |
357 | #else | 356 | int snd_hda_parse_hdmi_codec(struct hda_codec *codec); |
358 | static inline int snd_hda_parse_generic_codec(struct hda_codec *codec) | ||
359 | { | ||
360 | return -ENODEV; | ||
361 | } | ||
362 | #endif | ||
363 | 357 | ||
364 | /* | 358 | /* |
365 | * generic proc interface | 359 | * generic proc interface |
diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c index 699262a3e07a..7a426ed491f2 100644 --- a/sound/pci/hda/patch_analog.c +++ b/sound/pci/hda/patch_analog.c | |||
@@ -185,7 +185,7 @@ static const struct hda_codec_ops ad198x_auto_patch_ops = { | |||
185 | }; | 185 | }; |
186 | 186 | ||
187 | 187 | ||
188 | static int ad198x_parse_auto_config(struct hda_codec *codec) | 188 | static int ad198x_parse_auto_config(struct hda_codec *codec, bool indep_hp) |
189 | { | 189 | { |
190 | struct ad198x_spec *spec = codec->spec; | 190 | struct ad198x_spec *spec = codec->spec; |
191 | struct auto_pin_cfg *cfg = &spec->gen.autocfg; | 191 | struct auto_pin_cfg *cfg = &spec->gen.autocfg; |
@@ -195,7 +195,8 @@ static int ad198x_parse_auto_config(struct hda_codec *codec) | |||
195 | codec->no_trigger_sense = 1; | 195 | codec->no_trigger_sense = 1; |
196 | codec->no_sticky_stream = 1; | 196 | codec->no_sticky_stream = 1; |
197 | 197 | ||
198 | spec->gen.indep_hp = 1; | 198 | spec->gen.indep_hp = indep_hp; |
199 | spec->gen.add_stereo_mix_input = 1; | ||
199 | 200 | ||
200 | err = snd_hda_parse_pin_defcfg(codec, cfg, NULL, 0); | 201 | err = snd_hda_parse_pin_defcfg(codec, cfg, NULL, 0); |
201 | if (err < 0) | 202 | if (err < 0) |
@@ -280,11 +281,11 @@ static const struct hda_fixup ad1986a_fixups[] = { | |||
280 | .v.pins = (const struct hda_pintbl[]) { | 281 | .v.pins = (const struct hda_pintbl[]) { |
281 | { 0x1a, 0x02214021 }, /* headphone */ | 282 | { 0x1a, 0x02214021 }, /* headphone */ |
282 | { 0x1b, 0x01014011 }, /* front */ | 283 | { 0x1b, 0x01014011 }, /* front */ |
283 | { 0x1c, 0x01013012 }, /* surround */ | 284 | { 0x1c, 0x01813030 }, /* line-in */ |
284 | { 0x1d, 0x01019015 }, /* clfe */ | 285 | { 0x1d, 0x01a19020 }, /* rear mic */ |
285 | { 0x1e, 0x411111f0 }, /* N/A */ | 286 | { 0x1e, 0x411111f0 }, /* N/A */ |
286 | { 0x1f, 0x02a190f0 }, /* mic */ | 287 | { 0x1f, 0x02a190f0 }, /* mic */ |
287 | { 0x20, 0x018130f0 }, /* line-in */ | 288 | { 0x20, 0x411111f0 }, /* N/A */ |
288 | {} | 289 | {} |
289 | }, | 290 | }, |
290 | }, | 291 | }, |
@@ -378,7 +379,7 @@ static int patch_ad1986a(struct hda_codec *codec) | |||
378 | ad1986a_fixups); | 379 | ad1986a_fixups); |
379 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | 380 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); |
380 | 381 | ||
381 | err = ad198x_parse_auto_config(codec); | 382 | err = ad198x_parse_auto_config(codec, false); |
382 | if (err < 0) { | 383 | if (err < 0) { |
383 | snd_hda_gen_free(codec); | 384 | snd_hda_gen_free(codec); |
384 | return err; | 385 | return err; |
@@ -480,7 +481,7 @@ static int patch_ad1983(struct hda_codec *codec) | |||
480 | 481 | ||
481 | spec->gen.beep_nid = 0x10; | 482 | spec->gen.beep_nid = 0x10; |
482 | set_beep_amp(spec, 0x10, 0, HDA_OUTPUT); | 483 | set_beep_amp(spec, 0x10, 0, HDA_OUTPUT); |
483 | err = ad198x_parse_auto_config(codec); | 484 | err = ad198x_parse_auto_config(codec, false); |
484 | if (err < 0) | 485 | if (err < 0) |
485 | goto error; | 486 | goto error; |
486 | err = ad1983_add_spdif_mux_ctl(codec); | 487 | err = ad1983_add_spdif_mux_ctl(codec); |
@@ -567,7 +568,7 @@ static int patch_ad1981(struct hda_codec *codec) | |||
567 | snd_hda_pick_fixup(codec, NULL, ad1981_fixup_tbl, ad1981_fixups); | 568 | snd_hda_pick_fixup(codec, NULL, ad1981_fixup_tbl, ad1981_fixups); |
568 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | 569 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); |
569 | 570 | ||
570 | err = ad198x_parse_auto_config(codec); | 571 | err = ad198x_parse_auto_config(codec, false); |
571 | if (err < 0) | 572 | if (err < 0) |
572 | goto error; | 573 | goto error; |
573 | err = ad1983_add_spdif_mux_ctl(codec); | 574 | err = ad1983_add_spdif_mux_ctl(codec); |
@@ -893,7 +894,7 @@ static int patch_ad1988(struct hda_codec *codec) | |||
893 | snd_hda_pick_fixup(codec, ad1988_fixup_models, NULL, ad1988_fixups); | 894 | snd_hda_pick_fixup(codec, ad1988_fixup_models, NULL, ad1988_fixups); |
894 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | 895 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); |
895 | 896 | ||
896 | err = ad198x_parse_auto_config(codec); | 897 | err = ad198x_parse_auto_config(codec, true); |
897 | if (err < 0) | 898 | if (err < 0) |
898 | goto error; | 899 | goto error; |
899 | err = ad1988_add_spdif_mux_ctl(codec); | 900 | err = ad1988_add_spdif_mux_ctl(codec); |
@@ -1070,7 +1071,7 @@ static int patch_ad1884(struct hda_codec *codec) | |||
1070 | snd_hda_pick_fixup(codec, NULL, ad1884_fixup_tbl, ad1884_fixups); | 1071 | snd_hda_pick_fixup(codec, NULL, ad1884_fixup_tbl, ad1884_fixups); |
1071 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); | 1072 | snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); |
1072 | 1073 | ||
1073 | err = ad198x_parse_auto_config(codec); | 1074 | err = ad198x_parse_auto_config(codec, true); |
1074 | if (err < 0) | 1075 | if (err < 0) |
1075 | goto error; | 1076 | goto error; |
1076 | err = ad1983_add_spdif_mux_ctl(codec); | 1077 | err = ad1983_add_spdif_mux_ctl(codec); |
@@ -1112,7 +1113,7 @@ static int patch_ad1882(struct hda_codec *codec) | |||
1112 | spec->gen.mixer_merge_nid = 0x21; | 1113 | spec->gen.mixer_merge_nid = 0x21; |
1113 | spec->gen.beep_nid = 0x10; | 1114 | spec->gen.beep_nid = 0x10; |
1114 | set_beep_amp(spec, 0x10, 0, HDA_OUTPUT); | 1115 | set_beep_amp(spec, 0x10, 0, HDA_OUTPUT); |
1115 | err = ad198x_parse_auto_config(codec); | 1116 | err = ad198x_parse_auto_config(codec, true); |
1116 | if (err < 0) | 1117 | if (err < 0) |
1117 | goto error; | 1118 | goto error; |
1118 | err = ad1988_add_spdif_mux_ctl(codec); | 1119 | err = ad1988_add_spdif_mux_ctl(codec); |
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c index 3fbf2883e06e..4e0ec146553d 100644 --- a/sound/pci/hda/patch_conexant.c +++ b/sound/pci/hda/patch_conexant.c | |||
@@ -3240,102 +3240,8 @@ enum { | |||
3240 | CXT_FIXUP_THINKPAD_ACPI, | 3240 | CXT_FIXUP_THINKPAD_ACPI, |
3241 | }; | 3241 | }; |
3242 | 3242 | ||
3243 | #if IS_ENABLED(CONFIG_THINKPAD_ACPI) | 3243 | /* for hda_fixup_thinkpad_acpi() */ |
3244 | 3244 | #include "thinkpad_helper.c" | |
3245 | #include <linux/thinkpad_acpi.h> | ||
3246 | #include <acpi/acpi.h> | ||
3247 | |||
3248 | static int (*led_set_func)(int, bool); | ||
3249 | |||
3250 | static acpi_status acpi_check_cb(acpi_handle handle, u32 lvl, void *context, | ||
3251 | void **rv) | ||
3252 | { | ||
3253 | bool *found = context; | ||
3254 | *found = true; | ||
3255 | return AE_OK; | ||
3256 | } | ||
3257 | |||
3258 | static bool is_thinkpad(struct hda_codec *codec) | ||
3259 | { | ||
3260 | bool found = false; | ||
3261 | if (codec->subsystem_id >> 16 != 0x17aa) | ||
3262 | return false; | ||
3263 | if (ACPI_SUCCESS(acpi_get_devices("LEN0068", acpi_check_cb, &found, NULL)) && found) | ||
3264 | return true; | ||
3265 | found = false; | ||
3266 | return ACPI_SUCCESS(acpi_get_devices("IBM0068", acpi_check_cb, &found, NULL)) && found; | ||
3267 | } | ||
3268 | |||
3269 | static void update_tpacpi_mute_led(void *private_data, int enabled) | ||
3270 | { | ||
3271 | struct hda_codec *codec = private_data; | ||
3272 | struct conexant_spec *spec = codec->spec; | ||
3273 | |||
3274 | if (spec->dynamic_eapd) | ||
3275 | cx_auto_vmaster_hook(private_data, enabled); | ||
3276 | |||
3277 | if (led_set_func) | ||
3278 | led_set_func(TPACPI_LED_MUTE, !enabled); | ||
3279 | } | ||
3280 | |||
3281 | static void update_tpacpi_micmute_led(struct hda_codec *codec, | ||
3282 | struct snd_ctl_elem_value *ucontrol) | ||
3283 | { | ||
3284 | if (!ucontrol || !led_set_func) | ||
3285 | return; | ||
3286 | if (strcmp("Capture Switch", ucontrol->id.name) == 0 && ucontrol->id.index == 0) { | ||
3287 | /* TODO: How do I verify if it's a mono or stereo here? */ | ||
3288 | bool val = ucontrol->value.integer.value[0] || ucontrol->value.integer.value[1]; | ||
3289 | led_set_func(TPACPI_LED_MICMUTE, !val); | ||
3290 | } | ||
3291 | } | ||
3292 | |||
3293 | static void cxt_fixup_thinkpad_acpi(struct hda_codec *codec, | ||
3294 | const struct hda_fixup *fix, int action) | ||
3295 | { | ||
3296 | struct conexant_spec *spec = codec->spec; | ||
3297 | |||
3298 | bool removefunc = false; | ||
3299 | |||
3300 | if (action == HDA_FIXUP_ACT_PROBE) { | ||
3301 | if (!is_thinkpad(codec)) | ||
3302 | return; | ||
3303 | if (!led_set_func) | ||
3304 | led_set_func = symbol_request(tpacpi_led_set); | ||
3305 | if (!led_set_func) { | ||
3306 | snd_printk(KERN_WARNING "Failed to find thinkpad-acpi symbol tpacpi_led_set\n"); | ||
3307 | return; | ||
3308 | } | ||
3309 | |||
3310 | removefunc = true; | ||
3311 | if (led_set_func(TPACPI_LED_MUTE, false) >= 0) { | ||
3312 | spec->gen.vmaster_mute.hook = update_tpacpi_mute_led; | ||
3313 | removefunc = false; | ||
3314 | } | ||
3315 | if (led_set_func(TPACPI_LED_MICMUTE, false) >= 0) { | ||
3316 | if (spec->gen.num_adc_nids > 1) | ||
3317 | snd_printdd("Skipping micmute LED control due to several ADCs"); | ||
3318 | else { | ||
3319 | spec->gen.cap_sync_hook = update_tpacpi_micmute_led; | ||
3320 | removefunc = false; | ||
3321 | } | ||
3322 | } | ||
3323 | } | ||
3324 | |||
3325 | if (led_set_func && (action == HDA_FIXUP_ACT_FREE || removefunc)) { | ||
3326 | symbol_put(tpacpi_led_set); | ||
3327 | led_set_func = NULL; | ||
3328 | } | ||
3329 | } | ||
3330 | |||
3331 | #else | ||
3332 | |||
3333 | static void cxt_fixup_thinkpad_acpi(struct hda_codec *codec, | ||
3334 | const struct hda_fixup *fix, int action) | ||
3335 | { | ||
3336 | } | ||
3337 | |||
3338 | #endif | ||
3339 | 3245 | ||
3340 | static void cxt_fixup_stereo_dmic(struct hda_codec *codec, | 3246 | static void cxt_fixup_stereo_dmic(struct hda_codec *codec, |
3341 | const struct hda_fixup *fix, int action) | 3247 | const struct hda_fixup *fix, int action) |
@@ -3492,7 +3398,7 @@ static const struct hda_fixup cxt_fixups[] = { | |||
3492 | }, | 3398 | }, |
3493 | [CXT_FIXUP_THINKPAD_ACPI] = { | 3399 | [CXT_FIXUP_THINKPAD_ACPI] = { |
3494 | .type = HDA_FIXUP_FUNC, | 3400 | .type = HDA_FIXUP_FUNC, |
3495 | .v.func = cxt_fixup_thinkpad_acpi, | 3401 | .v.func = hda_fixup_thinkpad_acpi, |
3496 | }, | 3402 | }, |
3497 | }; | 3403 | }; |
3498 | 3404 | ||
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index f281c8068557..64f0a5e73a25 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c | |||
@@ -46,6 +46,9 @@ module_param(static_hdmi_pcm, bool, 0644); | |||
46 | MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); | 46 | MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); |
47 | 47 | ||
48 | #define is_haswell(codec) ((codec)->vendor_id == 0x80862807) | 48 | #define is_haswell(codec) ((codec)->vendor_id == 0x80862807) |
49 | #define is_broadwell(codec) ((codec)->vendor_id == 0x80862808) | ||
50 | #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec)) | ||
51 | |||
49 | #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882) | 52 | #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882) |
50 | 53 | ||
51 | struct hdmi_spec_per_cvt { | 54 | struct hdmi_spec_per_cvt { |
@@ -1101,7 +1104,7 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, | |||
1101 | if (!channels) | 1104 | if (!channels) |
1102 | return; | 1105 | return; |
1103 | 1106 | ||
1104 | if (is_haswell(codec)) | 1107 | if (is_haswell_plus(codec)) |
1105 | snd_hda_codec_write(codec, pin_nid, 0, | 1108 | snd_hda_codec_write(codec, pin_nid, 0, |
1106 | AC_VERB_SET_AMP_GAIN_MUTE, | 1109 | AC_VERB_SET_AMP_GAIN_MUTE, |
1107 | AMP_OUT_UNMUTE); | 1110 | AMP_OUT_UNMUTE); |
@@ -1280,7 +1283,7 @@ static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, | |||
1280 | struct hdmi_spec *spec = codec->spec; | 1283 | struct hdmi_spec *spec = codec->spec; |
1281 | int err; | 1284 | int err; |
1282 | 1285 | ||
1283 | if (is_haswell(codec)) | 1286 | if (is_haswell_plus(codec)) |
1284 | haswell_verify_D0(codec, cvt_nid, pin_nid); | 1287 | haswell_verify_D0(codec, cvt_nid, pin_nid); |
1285 | 1288 | ||
1286 | err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format)); | 1289 | err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format)); |
@@ -1421,7 +1424,7 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, | |||
1421 | mux_idx); | 1424 | mux_idx); |
1422 | 1425 | ||
1423 | /* configure unused pins to choose other converters */ | 1426 | /* configure unused pins to choose other converters */ |
1424 | if (is_haswell(codec) || is_valleyview(codec)) | 1427 | if (is_haswell_plus(codec) || is_valleyview(codec)) |
1425 | intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx); | 1428 | intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx); |
1426 | 1429 | ||
1427 | snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); | 1430 | snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); |
@@ -1496,11 +1499,14 @@ static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) | |||
1496 | * specification worked this way. Hence, we just ignore the data in | 1499 | * specification worked this way. Hence, we just ignore the data in |
1497 | * the unsolicited response to avoid custom WARs. | 1500 | * the unsolicited response to avoid custom WARs. |
1498 | */ | 1501 | */ |
1499 | int present = snd_hda_pin_sense(codec, pin_nid); | 1502 | int present; |
1500 | bool update_eld = false; | 1503 | bool update_eld = false; |
1501 | bool eld_changed = false; | 1504 | bool eld_changed = false; |
1502 | bool ret; | 1505 | bool ret; |
1503 | 1506 | ||
1507 | snd_hda_power_up(codec); | ||
1508 | present = snd_hda_pin_sense(codec, pin_nid); | ||
1509 | |||
1504 | mutex_lock(&per_pin->lock); | 1510 | mutex_lock(&per_pin->lock); |
1505 | pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); | 1511 | pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); |
1506 | if (pin_eld->monitor_present) | 1512 | if (pin_eld->monitor_present) |
@@ -1573,6 +1579,7 @@ static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) | |||
1573 | jack->block_report = !ret; | 1579 | jack->block_report = !ret; |
1574 | 1580 | ||
1575 | mutex_unlock(&per_pin->lock); | 1581 | mutex_unlock(&per_pin->lock); |
1582 | snd_hda_power_down(codec); | ||
1576 | return ret; | 1583 | return ret; |
1577 | } | 1584 | } |
1578 | 1585 | ||
@@ -1607,7 +1614,7 @@ static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) | |||
1607 | if (get_defcfg_connect(config) == AC_JACK_PORT_NONE) | 1614 | if (get_defcfg_connect(config) == AC_JACK_PORT_NONE) |
1608 | return 0; | 1615 | return 0; |
1609 | 1616 | ||
1610 | if (is_haswell(codec)) | 1617 | if (is_haswell_plus(codec)) |
1611 | intel_haswell_fixup_connect_list(codec, pin_nid); | 1618 | intel_haswell_fixup_connect_list(codec, pin_nid); |
1612 | 1619 | ||
1613 | pin_idx = spec->num_pins; | 1620 | pin_idx = spec->num_pins; |
@@ -1694,21 +1701,6 @@ static int hdmi_parse_codec(struct hda_codec *codec) | |||
1694 | } | 1701 | } |
1695 | } | 1702 | } |
1696 | 1703 | ||
1697 | #ifdef CONFIG_PM | ||
1698 | /* We're seeing some problems with unsolicited hot plug events on | ||
1699 | * PantherPoint after S3, if this is not enabled */ | ||
1700 | if (codec->vendor_id == 0x80862806) | ||
1701 | codec->bus->power_keep_link_on = 1; | ||
1702 | /* | ||
1703 | * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event | ||
1704 | * can be lost and presence sense verb will become inaccurate if the | ||
1705 | * HDA link is powered off at hot plug or hw initialization time. | ||
1706 | */ | ||
1707 | else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) & | ||
1708 | AC_PWRST_EPSS)) | ||
1709 | codec->bus->power_keep_link_on = 1; | ||
1710 | #endif | ||
1711 | |||
1712 | return 0; | 1704 | return 0; |
1713 | } | 1705 | } |
1714 | 1706 | ||
@@ -2260,18 +2252,22 @@ static int patch_generic_hdmi(struct hda_codec *codec) | |||
2260 | codec->spec = spec; | 2252 | codec->spec = spec; |
2261 | hdmi_array_init(spec, 4); | 2253 | hdmi_array_init(spec, 4); |
2262 | 2254 | ||
2263 | if (is_haswell(codec)) { | 2255 | if (is_haswell_plus(codec)) { |
2264 | intel_haswell_enable_all_pins(codec, true); | 2256 | intel_haswell_enable_all_pins(codec, true); |
2265 | intel_haswell_fixup_enable_dp12(codec); | 2257 | intel_haswell_fixup_enable_dp12(codec); |
2266 | } | 2258 | } |
2267 | 2259 | ||
2260 | if (is_haswell(codec) || is_valleyview(codec)) { | ||
2261 | codec->depop_delay = 0; | ||
2262 | } | ||
2263 | |||
2268 | if (hdmi_parse_codec(codec) < 0) { | 2264 | if (hdmi_parse_codec(codec) < 0) { |
2269 | codec->spec = NULL; | 2265 | codec->spec = NULL; |
2270 | kfree(spec); | 2266 | kfree(spec); |
2271 | return -EINVAL; | 2267 | return -EINVAL; |
2272 | } | 2268 | } |
2273 | codec->patch_ops = generic_hdmi_patch_ops; | 2269 | codec->patch_ops = generic_hdmi_patch_ops; |
2274 | if (is_haswell(codec)) { | 2270 | if (is_haswell_plus(codec)) { |
2275 | codec->patch_ops.set_power_state = haswell_set_power_state; | 2271 | codec->patch_ops.set_power_state = haswell_set_power_state; |
2276 | codec->dp_mst = true; | 2272 | codec->dp_mst = true; |
2277 | } | 2273 | } |
@@ -3218,6 +3214,15 @@ static int patch_via_hdmi(struct hda_codec *codec) | |||
3218 | } | 3214 | } |
3219 | 3215 | ||
3220 | /* | 3216 | /* |
3217 | * called from hda_codec.c for generic HDMI support | ||
3218 | */ | ||
3219 | int snd_hda_parse_hdmi_codec(struct hda_codec *codec) | ||
3220 | { | ||
3221 | return patch_generic_hdmi(codec); | ||
3222 | } | ||
3223 | EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec); | ||
3224 | |||
3225 | /* | ||
3221 | * patch entries | 3226 | * patch entries |
3222 | */ | 3227 | */ |
3223 | static const struct hda_codec_preset snd_hda_preset_hdmi[] = { | 3228 | static const struct hda_codec_preset snd_hda_preset_hdmi[] = { |
@@ -3271,6 +3276,7 @@ static const struct hda_codec_preset snd_hda_preset_hdmi[] = { | |||
3271 | { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi }, | 3276 | { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi }, |
3272 | { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, | 3277 | { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, |
3273 | { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi }, | 3278 | { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi }, |
3279 | { .id = 0x80862808, .name = "Broadwell HDMI", .patch = patch_generic_hdmi }, | ||
3274 | { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi }, | 3280 | { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi }, |
3275 | { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi }, | 3281 | { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi }, |
3276 | { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, | 3282 | { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, |
@@ -3326,6 +3332,7 @@ MODULE_ALIAS("snd-hda-codec-id:80862804"); | |||
3326 | MODULE_ALIAS("snd-hda-codec-id:80862805"); | 3332 | MODULE_ALIAS("snd-hda-codec-id:80862805"); |
3327 | MODULE_ALIAS("snd-hda-codec-id:80862806"); | 3333 | MODULE_ALIAS("snd-hda-codec-id:80862806"); |
3328 | MODULE_ALIAS("snd-hda-codec-id:80862807"); | 3334 | MODULE_ALIAS("snd-hda-codec-id:80862807"); |
3335 | MODULE_ALIAS("snd-hda-codec-id:80862808"); | ||
3329 | MODULE_ALIAS("snd-hda-codec-id:80862880"); | 3336 | MODULE_ALIAS("snd-hda-codec-id:80862880"); |
3330 | MODULE_ALIAS("snd-hda-codec-id:80862882"); | 3337 | MODULE_ALIAS("snd-hda-codec-id:80862882"); |
3331 | MODULE_ALIAS("snd-hda-codec-id:808629fb"); | 3338 | MODULE_ALIAS("snd-hda-codec-id:808629fb"); |
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index c5646941539a..f9b22fb6dd0b 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c | |||
@@ -118,7 +118,8 @@ struct alc_spec { | |||
118 | 118 | ||
119 | int init_amp; | 119 | int init_amp; |
120 | int codec_variant; /* flag for other variants */ | 120 | int codec_variant; /* flag for other variants */ |
121 | bool has_alc5505_dsp; | 121 | unsigned int has_alc5505_dsp:1; |
122 | unsigned int no_depop_delay:1; | ||
122 | 123 | ||
123 | /* for PLL fix */ | 124 | /* for PLL fix */ |
124 | hda_nid_t pll_nid; | 125 | hda_nid_t pll_nid; |
@@ -280,8 +281,11 @@ static void alc_auto_setup_eapd(struct hda_codec *codec, bool on) | |||
280 | */ | 281 | */ |
281 | static void alc_eapd_shutup(struct hda_codec *codec) | 282 | static void alc_eapd_shutup(struct hda_codec *codec) |
282 | { | 283 | { |
284 | struct alc_spec *spec = codec->spec; | ||
285 | |||
283 | alc_auto_setup_eapd(codec, false); | 286 | alc_auto_setup_eapd(codec, false); |
284 | msleep(200); | 287 | if (!spec->no_depop_delay) |
288 | msleep(200); | ||
285 | snd_hda_shutup_pins(codec); | 289 | snd_hda_shutup_pins(codec); |
286 | } | 290 | } |
287 | 291 | ||
@@ -365,6 +369,17 @@ static void alc_fixup_sku_ignore(struct hda_codec *codec, | |||
365 | } | 369 | } |
366 | } | 370 | } |
367 | 371 | ||
372 | static void alc_fixup_no_depop_delay(struct hda_codec *codec, | ||
373 | const struct hda_fixup *fix, int action) | ||
374 | { | ||
375 | struct alc_spec *spec = codec->spec; | ||
376 | |||
377 | if (action == HDA_FIXUP_ACT_PROBE) { | ||
378 | spec->no_depop_delay = 1; | ||
379 | codec->depop_delay = 0; | ||
380 | } | ||
381 | } | ||
382 | |||
368 | static int alc_auto_parse_customize_define(struct hda_codec *codec) | 383 | static int alc_auto_parse_customize_define(struct hda_codec *codec) |
369 | { | 384 | { |
370 | unsigned int ass, tmp, i; | 385 | unsigned int ass, tmp, i; |
@@ -454,9 +469,7 @@ static bool found_in_nid_list(hda_nid_t nid, const hda_nid_t *list, int nums) | |||
454 | * 7 ~ 0 : Assembly ID | 469 | * 7 ~ 0 : Assembly ID |
455 | * port-A --> pin 39/41, port-E --> pin 14/15, port-D --> pin 35/36 | 470 | * port-A --> pin 39/41, port-E --> pin 14/15, port-D --> pin 35/36 |
456 | */ | 471 | */ |
457 | static int alc_subsystem_id(struct hda_codec *codec, | 472 | static int alc_subsystem_id(struct hda_codec *codec, const hda_nid_t *ports) |
458 | hda_nid_t porta, hda_nid_t porte, | ||
459 | hda_nid_t portd, hda_nid_t porti) | ||
460 | { | 473 | { |
461 | unsigned int ass, tmp, i; | 474 | unsigned int ass, tmp, i; |
462 | unsigned nid; | 475 | unsigned nid; |
@@ -546,14 +559,7 @@ do_sku: | |||
546 | spec->gen.autocfg.line_out_type == AUTO_PIN_HP_OUT)) { | 559 | spec->gen.autocfg.line_out_type == AUTO_PIN_HP_OUT)) { |
547 | hda_nid_t nid; | 560 | hda_nid_t nid; |
548 | tmp = (ass >> 11) & 0x3; /* HP to chassis */ | 561 | tmp = (ass >> 11) & 0x3; /* HP to chassis */ |
549 | if (tmp == 0) | 562 | nid = ports[tmp]; |
550 | nid = porta; | ||
551 | else if (tmp == 1) | ||
552 | nid = porte; | ||
553 | else if (tmp == 2) | ||
554 | nid = portd; | ||
555 | else if (tmp == 3) | ||
556 | nid = porti; | ||
557 | if (found_in_nid_list(nid, spec->gen.autocfg.line_out_pins, | 563 | if (found_in_nid_list(nid, spec->gen.autocfg.line_out_pins, |
558 | spec->gen.autocfg.line_outs)) | 564 | spec->gen.autocfg.line_outs)) |
559 | return 1; | 565 | return 1; |
@@ -566,7 +572,7 @@ do_sku: | |||
566 | * ports contains an array of 4 pin NIDs for port-A, E, D and I */ | 572 | * ports contains an array of 4 pin NIDs for port-A, E, D and I */ |
567 | static void alc_ssid_check(struct hda_codec *codec, const hda_nid_t *ports) | 573 | static void alc_ssid_check(struct hda_codec *codec, const hda_nid_t *ports) |
568 | { | 574 | { |
569 | if (!alc_subsystem_id(codec, ports[0], ports[1], ports[2], ports[3])) { | 575 | if (!alc_subsystem_id(codec, ports)) { |
570 | struct alc_spec *spec = codec->spec; | 576 | struct alc_spec *spec = codec->spec; |
571 | snd_printd("realtek: " | 577 | snd_printd("realtek: " |
572 | "Enable default setup for auto mode as fallback\n"); | 578 | "Enable default setup for auto mode as fallback\n"); |
@@ -863,7 +869,10 @@ static int alc_suspend(struct hda_codec *codec) | |||
863 | #ifdef CONFIG_PM | 869 | #ifdef CONFIG_PM |
864 | static int alc_resume(struct hda_codec *codec) | 870 | static int alc_resume(struct hda_codec *codec) |
865 | { | 871 | { |
866 | msleep(150); /* to avoid pop noise */ | 872 | struct alc_spec *spec = codec->spec; |
873 | |||
874 | if (!spec->no_depop_delay) | ||
875 | msleep(150); /* to avoid pop noise */ | ||
867 | codec->patch_ops.init(codec); | 876 | codec->patch_ops.init(codec); |
868 | snd_hda_codec_resume_amp(codec); | 877 | snd_hda_codec_resume_amp(codec); |
869 | snd_hda_codec_resume_cache(codec); | 878 | snd_hda_codec_resume_cache(codec); |
@@ -903,7 +912,7 @@ static int alc_codec_rename(struct hda_codec *codec, const char *name) | |||
903 | } | 912 | } |
904 | 913 | ||
905 | /* | 914 | /* |
906 | * Rename codecs appropriately from COEF value | 915 | * Rename codecs appropriately from COEF value or subvendor id |
907 | */ | 916 | */ |
908 | struct alc_codec_rename_table { | 917 | struct alc_codec_rename_table { |
909 | unsigned int vendor_id; | 918 | unsigned int vendor_id; |
@@ -912,6 +921,13 @@ struct alc_codec_rename_table { | |||
912 | const char *name; | 921 | const char *name; |
913 | }; | 922 | }; |
914 | 923 | ||
924 | struct alc_codec_rename_pci_table { | ||
925 | unsigned int codec_vendor_id; | ||
926 | unsigned short pci_subvendor; | ||
927 | unsigned short pci_subdevice; | ||
928 | const char *name; | ||
929 | }; | ||
930 | |||
915 | static struct alc_codec_rename_table rename_tbl[] = { | 931 | static struct alc_codec_rename_table rename_tbl[] = { |
916 | { 0x10ec0269, 0xfff0, 0x3010, "ALC277" }, | 932 | { 0x10ec0269, 0xfff0, 0x3010, "ALC277" }, |
917 | { 0x10ec0269, 0xf0f0, 0x2010, "ALC259" }, | 933 | { 0x10ec0269, 0xf0f0, 0x2010, "ALC259" }, |
@@ -931,9 +947,20 @@ static struct alc_codec_rename_table rename_tbl[] = { | |||
931 | { } /* terminator */ | 947 | { } /* terminator */ |
932 | }; | 948 | }; |
933 | 949 | ||
950 | static struct alc_codec_rename_pci_table rename_pci_tbl[] = { | ||
951 | { 0x10ec0280, 0x1028, 0, "ALC3220" }, | ||
952 | { 0x10ec0282, 0x1028, 0, "ALC3221" }, | ||
953 | { 0x10ec0283, 0x1028, 0, "ALC3223" }, | ||
954 | { 0x10ec0292, 0x1028, 0, "ALC3226" }, | ||
955 | { 0x10ec0255, 0x1028, 0, "ALC3234" }, | ||
956 | { 0x10ec0668, 0x1028, 0, "ALC3661" }, | ||
957 | { } /* terminator */ | ||
958 | }; | ||
959 | |||
934 | static int alc_codec_rename_from_preset(struct hda_codec *codec) | 960 | static int alc_codec_rename_from_preset(struct hda_codec *codec) |
935 | { | 961 | { |
936 | const struct alc_codec_rename_table *p; | 962 | const struct alc_codec_rename_table *p; |
963 | const struct alc_codec_rename_pci_table *q; | ||
937 | 964 | ||
938 | for (p = rename_tbl; p->vendor_id; p++) { | 965 | for (p = rename_tbl; p->vendor_id; p++) { |
939 | if (p->vendor_id != codec->vendor_id) | 966 | if (p->vendor_id != codec->vendor_id) |
@@ -941,6 +968,17 @@ static int alc_codec_rename_from_preset(struct hda_codec *codec) | |||
941 | if ((alc_get_coef0(codec) & p->coef_mask) == p->coef_bits) | 968 | if ((alc_get_coef0(codec) & p->coef_mask) == p->coef_bits) |
942 | return alc_codec_rename(codec, p->name); | 969 | return alc_codec_rename(codec, p->name); |
943 | } | 970 | } |
971 | |||
972 | for (q = rename_pci_tbl; q->codec_vendor_id; q++) { | ||
973 | if (q->codec_vendor_id != codec->vendor_id) | ||
974 | continue; | ||
975 | if (q->pci_subvendor != codec->bus->pci->subsystem_vendor) | ||
976 | continue; | ||
977 | if (!q->pci_subdevice || | ||
978 | q->pci_subdevice == codec->bus->pci->subsystem_device) | ||
979 | return alc_codec_rename(codec, q->name); | ||
980 | } | ||
981 | |||
944 | return 0; | 982 | return 0; |
945 | } | 983 | } |
946 | 984 | ||
@@ -1763,6 +1801,7 @@ enum { | |||
1763 | ALC882_FIXUP_ACER_ASPIRE_7736, | 1801 | ALC882_FIXUP_ACER_ASPIRE_7736, |
1764 | ALC882_FIXUP_ASUS_W90V, | 1802 | ALC882_FIXUP_ASUS_W90V, |
1765 | ALC889_FIXUP_CD, | 1803 | ALC889_FIXUP_CD, |
1804 | ALC889_FIXUP_FRONT_HP_NO_PRESENCE, | ||
1766 | ALC889_FIXUP_VAIO_TT, | 1805 | ALC889_FIXUP_VAIO_TT, |
1767 | ALC888_FIXUP_EEE1601, | 1806 | ALC888_FIXUP_EEE1601, |
1768 | ALC882_FIXUP_EAPD, | 1807 | ALC882_FIXUP_EAPD, |
@@ -1980,6 +2019,15 @@ static const struct hda_fixup alc882_fixups[] = { | |||
1980 | { } | 2019 | { } |
1981 | } | 2020 | } |
1982 | }, | 2021 | }, |
2022 | [ALC889_FIXUP_FRONT_HP_NO_PRESENCE] = { | ||
2023 | .type = HDA_FIXUP_PINS, | ||
2024 | .v.pins = (const struct hda_pintbl[]) { | ||
2025 | { 0x1b, 0x02214120 }, /* Front HP jack is flaky, disable jack detect */ | ||
2026 | { } | ||
2027 | }, | ||
2028 | .chained = true, | ||
2029 | .chain_id = ALC889_FIXUP_CD, | ||
2030 | }, | ||
1983 | [ALC889_FIXUP_VAIO_TT] = { | 2031 | [ALC889_FIXUP_VAIO_TT] = { |
1984 | .type = HDA_FIXUP_PINS, | 2032 | .type = HDA_FIXUP_PINS, |
1985 | .v.pins = (const struct hda_pintbl[]) { | 2033 | .v.pins = (const struct hda_pintbl[]) { |
@@ -2211,7 +2259,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { | |||
2211 | SND_PCI_QUIRK(0x1071, 0x8258, "Evesham Voyaeger", ALC882_FIXUP_EAPD), | 2259 | SND_PCI_QUIRK(0x1071, 0x8258, "Evesham Voyaeger", ALC882_FIXUP_EAPD), |
2212 | SND_PCI_QUIRK(0x1462, 0x7350, "MSI-7350", ALC889_FIXUP_CD), | 2260 | SND_PCI_QUIRK(0x1462, 0x7350, "MSI-7350", ALC889_FIXUP_CD), |
2213 | SND_PCI_QUIRK_VENDOR(0x1462, "MSI", ALC882_FIXUP_GPIO3), | 2261 | SND_PCI_QUIRK_VENDOR(0x1462, "MSI", ALC882_FIXUP_GPIO3), |
2214 | SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3", ALC889_FIXUP_CD), | 2262 | SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3/Z87X-UD3H", ALC889_FIXUP_FRONT_HP_NO_PRESENCE), |
2215 | SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", ALC882_FIXUP_ABIT_AW9D_MAX), | 2263 | SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", ALC882_FIXUP_ABIT_AW9D_MAX), |
2216 | SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC882_FIXUP_EAPD), | 2264 | SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC882_FIXUP_EAPD), |
2217 | SND_PCI_QUIRK(0x161f, 0x2054, "Medion laptop", ALC883_FIXUP_EAPD), | 2265 | SND_PCI_QUIRK(0x161f, 0x2054, "Medion laptop", ALC883_FIXUP_EAPD), |
@@ -2314,6 +2362,7 @@ enum { | |||
2314 | ALC262_FIXUP_BENQ, | 2362 | ALC262_FIXUP_BENQ, |
2315 | ALC262_FIXUP_BENQ_T31, | 2363 | ALC262_FIXUP_BENQ_T31, |
2316 | ALC262_FIXUP_INV_DMIC, | 2364 | ALC262_FIXUP_INV_DMIC, |
2365 | ALC262_FIXUP_INTEL_BAYLEYBAY, | ||
2317 | }; | 2366 | }; |
2318 | 2367 | ||
2319 | static const struct hda_fixup alc262_fixups[] = { | 2368 | static const struct hda_fixup alc262_fixups[] = { |
@@ -2378,6 +2427,10 @@ static const struct hda_fixup alc262_fixups[] = { | |||
2378 | .type = HDA_FIXUP_FUNC, | 2427 | .type = HDA_FIXUP_FUNC, |
2379 | .v.func = alc_fixup_inv_dmic_0x12, | 2428 | .v.func = alc_fixup_inv_dmic_0x12, |
2380 | }, | 2429 | }, |
2430 | [ALC262_FIXUP_INTEL_BAYLEYBAY] = { | ||
2431 | .type = HDA_FIXUP_FUNC, | ||
2432 | .v.func = alc_fixup_no_depop_delay, | ||
2433 | }, | ||
2381 | }; | 2434 | }; |
2382 | 2435 | ||
2383 | static const struct snd_pci_quirk alc262_fixup_tbl[] = { | 2436 | static const struct snd_pci_quirk alc262_fixup_tbl[] = { |
@@ -2389,6 +2442,7 @@ static const struct snd_pci_quirk alc262_fixup_tbl[] = { | |||
2389 | SND_PCI_QUIRK(0x17aa, 0x384e, "Lenovo 3000", ALC262_FIXUP_LENOVO_3000), | 2442 | SND_PCI_QUIRK(0x17aa, 0x384e, "Lenovo 3000", ALC262_FIXUP_LENOVO_3000), |
2390 | SND_PCI_QUIRK(0x17ff, 0x0560, "Benq ED8", ALC262_FIXUP_BENQ), | 2443 | SND_PCI_QUIRK(0x17ff, 0x0560, "Benq ED8", ALC262_FIXUP_BENQ), |
2391 | SND_PCI_QUIRK(0x17ff, 0x058d, "Benq T31-16", ALC262_FIXUP_BENQ_T31), | 2444 | SND_PCI_QUIRK(0x17ff, 0x058d, "Benq T31-16", ALC262_FIXUP_BENQ_T31), |
2445 | SND_PCI_QUIRK(0x8086, 0x7270, "BayleyBay", ALC262_FIXUP_INTEL_BAYLEYBAY), | ||
2392 | {} | 2446 | {} |
2393 | }; | 2447 | }; |
2394 | 2448 | ||
@@ -3526,6 +3580,15 @@ static void alc_fixup_headset_mode_alc255(struct hda_codec *codec, | |||
3526 | alc_fixup_headset_mode(codec, fix, action); | 3580 | alc_fixup_headset_mode(codec, fix, action); |
3527 | } | 3581 | } |
3528 | 3582 | ||
3583 | static void alc_fixup_auto_mute_via_amp(struct hda_codec *codec, | ||
3584 | const struct hda_fixup *fix, int action) | ||
3585 | { | ||
3586 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { | ||
3587 | struct alc_spec *spec = codec->spec; | ||
3588 | spec->gen.auto_mute_via_amp = 1; | ||
3589 | } | ||
3590 | } | ||
3591 | |||
3529 | static void alc_fixup_headset_mode_alc668(struct hda_codec *codec, | 3592 | static void alc_fixup_headset_mode_alc668(struct hda_codec *codec, |
3530 | const struct hda_fixup *fix, int action) | 3593 | const struct hda_fixup *fix, int action) |
3531 | { | 3594 | { |
@@ -3717,101 +3780,18 @@ static void alc282_fixup_asus_tx300(struct hda_codec *codec, | |||
3717 | static void alc290_fixup_mono_speakers(struct hda_codec *codec, | 3780 | static void alc290_fixup_mono_speakers(struct hda_codec *codec, |
3718 | const struct hda_fixup *fix, int action) | 3781 | const struct hda_fixup *fix, int action) |
3719 | { | 3782 | { |
3720 | if (action == HDA_FIXUP_ACT_PRE_PROBE) | 3783 | if (action == HDA_FIXUP_ACT_PRE_PROBE) { |
3721 | /* Remove DAC node 0x03, as it seems to be | 3784 | /* DAC node 0x03 is giving mono output. We therefore want to |
3722 | giving mono output */ | 3785 | make sure 0x14 (front speaker) and 0x15 (headphones) use the |
3723 | snd_hda_override_wcaps(codec, 0x03, 0); | 3786 | stereo DAC, while leaving 0x17 (bass speaker) for node 0x03. */ |
3724 | } | 3787 | hda_nid_t conn1[2] = { 0x0c }; |
3725 | 3788 | snd_hda_override_conn_list(codec, 0x14, 1, conn1); | |
3726 | #if IS_ENABLED(CONFIG_THINKPAD_ACPI) | 3789 | snd_hda_override_conn_list(codec, 0x15, 1, conn1); |
3727 | |||
3728 | #include <linux/thinkpad_acpi.h> | ||
3729 | #include <acpi/acpi.h> | ||
3730 | |||
3731 | static int (*led_set_func)(int, bool); | ||
3732 | |||
3733 | static acpi_status acpi_check_cb(acpi_handle handle, u32 lvl, void *context, | ||
3734 | void **rv) | ||
3735 | { | ||
3736 | bool *found = context; | ||
3737 | *found = true; | ||
3738 | return AE_OK; | ||
3739 | } | ||
3740 | |||
3741 | static bool is_thinkpad(struct hda_codec *codec) | ||
3742 | { | ||
3743 | bool found = false; | ||
3744 | if (codec->subsystem_id >> 16 != 0x17aa) | ||
3745 | return false; | ||
3746 | if (ACPI_SUCCESS(acpi_get_devices("LEN0068", acpi_check_cb, &found, NULL)) && found) | ||
3747 | return true; | ||
3748 | found = false; | ||
3749 | return ACPI_SUCCESS(acpi_get_devices("IBM0068", acpi_check_cb, &found, NULL)) && found; | ||
3750 | } | ||
3751 | |||
3752 | static void update_tpacpi_mute_led(void *private_data, int enabled) | ||
3753 | { | ||
3754 | if (led_set_func) | ||
3755 | led_set_func(TPACPI_LED_MUTE, !enabled); | ||
3756 | } | ||
3757 | |||
3758 | static void update_tpacpi_micmute_led(struct hda_codec *codec, | ||
3759 | struct snd_ctl_elem_value *ucontrol) | ||
3760 | { | ||
3761 | if (!ucontrol || !led_set_func) | ||
3762 | return; | ||
3763 | if (strcmp("Capture Switch", ucontrol->id.name) == 0 && ucontrol->id.index == 0) { | ||
3764 | /* TODO: How do I verify if it's a mono or stereo here? */ | ||
3765 | bool val = ucontrol->value.integer.value[0] || ucontrol->value.integer.value[1]; | ||
3766 | led_set_func(TPACPI_LED_MICMUTE, !val); | ||
3767 | } | ||
3768 | } | ||
3769 | |||
3770 | static void alc_fixup_thinkpad_acpi(struct hda_codec *codec, | ||
3771 | const struct hda_fixup *fix, int action) | ||
3772 | { | ||
3773 | struct alc_spec *spec = codec->spec; | ||
3774 | bool removefunc = false; | ||
3775 | |||
3776 | if (action == HDA_FIXUP_ACT_PROBE) { | ||
3777 | if (!is_thinkpad(codec)) | ||
3778 | return; | ||
3779 | if (!led_set_func) | ||
3780 | led_set_func = symbol_request(tpacpi_led_set); | ||
3781 | if (!led_set_func) { | ||
3782 | snd_printk(KERN_WARNING "Failed to find thinkpad-acpi symbol tpacpi_led_set\n"); | ||
3783 | return; | ||
3784 | } | ||
3785 | |||
3786 | removefunc = true; | ||
3787 | if (led_set_func(TPACPI_LED_MUTE, false) >= 0) { | ||
3788 | spec->gen.vmaster_mute.hook = update_tpacpi_mute_led; | ||
3789 | removefunc = false; | ||
3790 | } | ||
3791 | if (led_set_func(TPACPI_LED_MICMUTE, false) >= 0) { | ||
3792 | if (spec->gen.num_adc_nids > 1) | ||
3793 | snd_printdd("Skipping micmute LED control due to several ADCs"); | ||
3794 | else { | ||
3795 | spec->gen.cap_sync_hook = update_tpacpi_micmute_led; | ||
3796 | removefunc = false; | ||
3797 | } | ||
3798 | } | ||
3799 | } | ||
3800 | |||
3801 | if (led_set_func && (action == HDA_FIXUP_ACT_FREE || removefunc)) { | ||
3802 | symbol_put(tpacpi_led_set); | ||
3803 | led_set_func = NULL; | ||
3804 | } | 3790 | } |
3805 | } | 3791 | } |
3806 | 3792 | ||
3807 | #else | 3793 | /* for hda_fixup_thinkpad_acpi() */ |
3808 | 3794 | #include "thinkpad_helper.c" | |
3809 | static void alc_fixup_thinkpad_acpi(struct hda_codec *codec, | ||
3810 | const struct hda_fixup *fix, int action) | ||
3811 | { | ||
3812 | } | ||
3813 | |||
3814 | #endif | ||
3815 | 3795 | ||
3816 | enum { | 3796 | enum { |
3817 | ALC269_FIXUP_SONY_VAIO, | 3797 | ALC269_FIXUP_SONY_VAIO, |
@@ -3860,6 +3840,9 @@ enum { | |||
3860 | ALC282_FIXUP_ASUS_TX300, | 3840 | ALC282_FIXUP_ASUS_TX300, |
3861 | ALC283_FIXUP_INT_MIC, | 3841 | ALC283_FIXUP_INT_MIC, |
3862 | ALC290_FIXUP_MONO_SPEAKERS, | 3842 | ALC290_FIXUP_MONO_SPEAKERS, |
3843 | ALC290_FIXUP_MONO_SPEAKERS_HSJACK, | ||
3844 | ALC290_FIXUP_SUBWOOFER, | ||
3845 | ALC290_FIXUP_SUBWOOFER_HSJACK, | ||
3863 | ALC269_FIXUP_THINKPAD_ACPI, | 3846 | ALC269_FIXUP_THINKPAD_ACPI, |
3864 | ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, | 3847 | ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, |
3865 | ALC255_FIXUP_HEADSET_MODE, | 3848 | ALC255_FIXUP_HEADSET_MODE, |
@@ -4182,15 +4165,37 @@ static const struct hda_fixup alc269_fixups[] = { | |||
4182 | .chained = true, | 4165 | .chained = true, |
4183 | .chain_id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST | 4166 | .chain_id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST |
4184 | }, | 4167 | }, |
4168 | [ALC290_FIXUP_SUBWOOFER_HSJACK] = { | ||
4169 | .type = HDA_FIXUP_PINS, | ||
4170 | .v.pins = (const struct hda_pintbl[]) { | ||
4171 | { 0x17, 0x90170112 }, /* subwoofer */ | ||
4172 | { } | ||
4173 | }, | ||
4174 | .chained = true, | ||
4175 | .chain_id = ALC290_FIXUP_MONO_SPEAKERS_HSJACK, | ||
4176 | }, | ||
4177 | [ALC290_FIXUP_SUBWOOFER] = { | ||
4178 | .type = HDA_FIXUP_PINS, | ||
4179 | .v.pins = (const struct hda_pintbl[]) { | ||
4180 | { 0x17, 0x90170112 }, /* subwoofer */ | ||
4181 | { } | ||
4182 | }, | ||
4183 | .chained = true, | ||
4184 | .chain_id = ALC290_FIXUP_MONO_SPEAKERS, | ||
4185 | }, | ||
4185 | [ALC290_FIXUP_MONO_SPEAKERS] = { | 4186 | [ALC290_FIXUP_MONO_SPEAKERS] = { |
4186 | .type = HDA_FIXUP_FUNC, | 4187 | .type = HDA_FIXUP_FUNC, |
4187 | .v.func = alc290_fixup_mono_speakers, | 4188 | .v.func = alc290_fixup_mono_speakers, |
4189 | }, | ||
4190 | [ALC290_FIXUP_MONO_SPEAKERS_HSJACK] = { | ||
4191 | .type = HDA_FIXUP_FUNC, | ||
4192 | .v.func = alc290_fixup_mono_speakers, | ||
4188 | .chained = true, | 4193 | .chained = true, |
4189 | .chain_id = ALC269_FIXUP_DELL3_MIC_NO_PRESENCE, | 4194 | .chain_id = ALC269_FIXUP_DELL3_MIC_NO_PRESENCE, |
4190 | }, | 4195 | }, |
4191 | [ALC269_FIXUP_THINKPAD_ACPI] = { | 4196 | [ALC269_FIXUP_THINKPAD_ACPI] = { |
4192 | .type = HDA_FIXUP_FUNC, | 4197 | .type = HDA_FIXUP_FUNC, |
4193 | .v.func = alc_fixup_thinkpad_acpi, | 4198 | .v.func = hda_fixup_thinkpad_acpi, |
4194 | }, | 4199 | }, |
4195 | [ALC255_FIXUP_DELL1_MIC_NO_PRESENCE] = { | 4200 | [ALC255_FIXUP_DELL1_MIC_NO_PRESENCE] = { |
4196 | .type = HDA_FIXUP_PINS, | 4201 | .type = HDA_FIXUP_PINS, |
@@ -4229,6 +4234,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { | |||
4229 | SND_PCI_QUIRK(0x1028, 0x05cb, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), | 4234 | SND_PCI_QUIRK(0x1028, 0x05cb, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
4230 | SND_PCI_QUIRK(0x1028, 0x05cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), | 4235 | SND_PCI_QUIRK(0x1028, 0x05cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
4231 | SND_PCI_QUIRK(0x1028, 0x05cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), | 4236 | SND_PCI_QUIRK(0x1028, 0x05cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
4237 | SND_PCI_QUIRK(0x1028, 0x05da, "Dell Vostro 5460", ALC290_FIXUP_SUBWOOFER), | ||
4232 | SND_PCI_QUIRK(0x1028, 0x05de, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), | 4238 | SND_PCI_QUIRK(0x1028, 0x05de, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
4233 | SND_PCI_QUIRK(0x1028, 0x05e0, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), | 4239 | SND_PCI_QUIRK(0x1028, 0x05e0, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
4234 | SND_PCI_QUIRK(0x1028, 0x05e9, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4240 | SND_PCI_QUIRK(0x1028, 0x05e9, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
@@ -4247,16 +4253,23 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { | |||
4247 | SND_PCI_QUIRK(0x1028, 0x0606, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4253 | SND_PCI_QUIRK(0x1028, 0x0606, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
4248 | SND_PCI_QUIRK(0x1028, 0x0608, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4254 | SND_PCI_QUIRK(0x1028, 0x0608, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
4249 | SND_PCI_QUIRK(0x1028, 0x0609, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4255 | SND_PCI_QUIRK(0x1028, 0x0609, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
4250 | SND_PCI_QUIRK(0x1028, 0x0610, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4256 | SND_PCI_QUIRK(0x1028, 0x060f, "Dell", ALC269_FIXUP_DELL3_MIC_NO_PRESENCE), |
4257 | SND_PCI_QUIRK(0x1028, 0x0610, "Dell", ALC269_FIXUP_DELL3_MIC_NO_PRESENCE), | ||
4251 | SND_PCI_QUIRK(0x1028, 0x0613, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4258 | SND_PCI_QUIRK(0x1028, 0x0613, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
4252 | SND_PCI_QUIRK(0x1028, 0x0614, "Dell Inspiron 3135", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4259 | SND_PCI_QUIRK(0x1028, 0x0614, "Dell Inspiron 3135", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
4253 | SND_PCI_QUIRK(0x1028, 0x0616, "Dell Vostro 5470", ALC290_FIXUP_MONO_SPEAKERS), | 4260 | SND_PCI_QUIRK(0x1028, 0x0615, "Dell Vostro 5470", ALC290_FIXUP_SUBWOOFER_HSJACK), |
4261 | SND_PCI_QUIRK(0x1028, 0x0616, "Dell Vostro 5470", ALC290_FIXUP_SUBWOOFER_HSJACK), | ||
4254 | SND_PCI_QUIRK(0x1028, 0x061f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | 4262 | SND_PCI_QUIRK(0x1028, 0x061f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), |
4255 | SND_PCI_QUIRK(0x1028, 0x0629, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4263 | SND_PCI_QUIRK(0x1028, 0x0629, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
4256 | SND_PCI_QUIRK(0x1028, 0x0638, "Dell Inspiron 5439", ALC290_FIXUP_MONO_SPEAKERS), | 4264 | SND_PCI_QUIRK(0x1028, 0x0638, "Dell Inspiron 5439", ALC290_FIXUP_MONO_SPEAKERS_HSJACK), |
4257 | SND_PCI_QUIRK(0x1028, 0x063e, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | 4265 | SND_PCI_QUIRK(0x1028, 0x063e, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
4258 | SND_PCI_QUIRK(0x1028, 0x063f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | 4266 | SND_PCI_QUIRK(0x1028, 0x063f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), |
4259 | SND_PCI_QUIRK(0x1028, 0x0640, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | 4267 | SND_PCI_QUIRK(0x1028, 0x0640, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), |
4268 | SND_PCI_QUIRK(0x1028, 0x0651, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | ||
4269 | SND_PCI_QUIRK(0x1028, 0x0652, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | ||
4270 | SND_PCI_QUIRK(0x1028, 0x0653, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | ||
4271 | SND_PCI_QUIRK(0x1028, 0x0658, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), | ||
4272 | SND_PCI_QUIRK(0x1028, 0x0662, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | ||
4260 | SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), | 4273 | SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
4261 | SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), | 4274 | SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
4262 | SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), | 4275 | SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), |
@@ -4502,7 +4515,7 @@ static int patch_alc269(struct hda_codec *codec) | |||
4502 | } | 4515 | } |
4503 | 4516 | ||
4504 | if (snd_hda_codec_read(codec, 0x51, 0, AC_VERB_PARAMETERS, 0) == 0x10ec5505) { | 4517 | if (snd_hda_codec_read(codec, 0x51, 0, AC_VERB_PARAMETERS, 0) == 0x10ec5505) { |
4505 | spec->has_alc5505_dsp = true; | 4518 | spec->has_alc5505_dsp = 1; |
4506 | spec->init_hook = alc5505_dsp_init; | 4519 | spec->init_hook = alc5505_dsp_init; |
4507 | } | 4520 | } |
4508 | 4521 | ||
@@ -4841,6 +4854,7 @@ enum { | |||
4841 | ALC662_FIXUP_BASS_CHMAP, | 4854 | ALC662_FIXUP_BASS_CHMAP, |
4842 | ALC662_FIXUP_BASS_1A, | 4855 | ALC662_FIXUP_BASS_1A, |
4843 | ALC662_FIXUP_BASS_1A_CHMAP, | 4856 | ALC662_FIXUP_BASS_1A_CHMAP, |
4857 | ALC668_FIXUP_AUTO_MUTE, | ||
4844 | }; | 4858 | }; |
4845 | 4859 | ||
4846 | static const struct hda_fixup alc662_fixups[] = { | 4860 | static const struct hda_fixup alc662_fixups[] = { |
@@ -5001,6 +5015,12 @@ static const struct hda_fixup alc662_fixups[] = { | |||
5001 | .type = HDA_FIXUP_FUNC, | 5015 | .type = HDA_FIXUP_FUNC, |
5002 | .v.func = alc_fixup_inv_dmic_0x12, | 5016 | .v.func = alc_fixup_inv_dmic_0x12, |
5003 | }, | 5017 | }, |
5018 | [ALC668_FIXUP_AUTO_MUTE] = { | ||
5019 | .type = HDA_FIXUP_FUNC, | ||
5020 | .v.func = alc_fixup_auto_mute_via_amp, | ||
5021 | .chained = true, | ||
5022 | .chain_id = ALC668_FIXUP_DELL_MIC_NO_PRESENCE | ||
5023 | }, | ||
5004 | [ALC668_FIXUP_DELL_MIC_NO_PRESENCE] = { | 5024 | [ALC668_FIXUP_DELL_MIC_NO_PRESENCE] = { |
5005 | .type = HDA_FIXUP_PINS, | 5025 | .type = HDA_FIXUP_PINS, |
5006 | .v.pins = (const struct hda_pintbl[]) { | 5026 | .v.pins = (const struct hda_pintbl[]) { |
@@ -5046,11 +5066,12 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { | |||
5046 | SND_PCI_QUIRK(0x1025, 0x038b, "Acer Aspire 8943G", ALC662_FIXUP_ASPIRE), | 5066 | SND_PCI_QUIRK(0x1025, 0x038b, "Acer Aspire 8943G", ALC662_FIXUP_ASPIRE), |
5047 | SND_PCI_QUIRK(0x1028, 0x05d8, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | 5067 | SND_PCI_QUIRK(0x1028, 0x05d8, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), |
5048 | SND_PCI_QUIRK(0x1028, 0x05db, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | 5068 | SND_PCI_QUIRK(0x1028, 0x05db, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), |
5049 | SND_PCI_QUIRK(0x1028, 0x0623, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | 5069 | SND_PCI_QUIRK(0x1028, 0x0623, "Dell", ALC668_FIXUP_AUTO_MUTE), |
5050 | SND_PCI_QUIRK(0x1028, 0x0624, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | 5070 | SND_PCI_QUIRK(0x1028, 0x0624, "Dell", ALC668_FIXUP_AUTO_MUTE), |
5051 | SND_PCI_QUIRK(0x1028, 0x0625, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | 5071 | SND_PCI_QUIRK(0x1028, 0x0625, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), |
5052 | SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | 5072 | SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), |
5053 | SND_PCI_QUIRK(0x1028, 0x0628, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | 5073 | SND_PCI_QUIRK(0x1028, 0x0628, "Dell", ALC668_FIXUP_AUTO_MUTE), |
5074 | SND_PCI_QUIRK(0x1028, 0x064e, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | ||
5054 | SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), | 5075 | SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), |
5055 | SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_BASS_1A_CHMAP), | 5076 | SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_BASS_1A_CHMAP), |
5056 | SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_CHMAP), | 5077 | SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_CHMAP), |
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 088a5afbd1b9..6998cf29b9bc 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c | |||
@@ -368,6 +368,17 @@ static int stac_vrefout_set(struct hda_codec *codec, | |||
368 | return 1; | 368 | return 1; |
369 | } | 369 | } |
370 | 370 | ||
371 | /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */ | ||
372 | /* this hook is set in stac_setup_gpio() */ | ||
373 | static unsigned int stac_vref_led_power_filter(struct hda_codec *codec, | ||
374 | hda_nid_t nid, | ||
375 | unsigned int power_state) | ||
376 | { | ||
377 | if (nid == codec->afg && power_state == AC_PWRST_D3) | ||
378 | return AC_PWRST_D1; | ||
379 | return snd_hda_gen_path_power_filter(codec, nid, power_state); | ||
380 | } | ||
381 | |||
371 | /* update mute-LED accoring to the master switch */ | 382 | /* update mute-LED accoring to the master switch */ |
372 | static void stac_update_led_status(struct hda_codec *codec, int enabled) | 383 | static void stac_update_led_status(struct hda_codec *codec, int enabled) |
373 | { | 384 | { |
@@ -4260,30 +4271,8 @@ static int stac_suspend(struct hda_codec *codec) | |||
4260 | stac_shutup(codec); | 4271 | stac_shutup(codec); |
4261 | return 0; | 4272 | return 0; |
4262 | } | 4273 | } |
4263 | |||
4264 | static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg, | ||
4265 | unsigned int power_state) | ||
4266 | { | ||
4267 | unsigned int afg_power_state = power_state; | ||
4268 | struct sigmatel_spec *spec = codec->spec; | ||
4269 | |||
4270 | if (power_state == AC_PWRST_D3) { | ||
4271 | if (spec->vref_mute_led_nid) { | ||
4272 | /* with vref-out pin used for mute led control | ||
4273 | * codec AFG is prevented from D3 state | ||
4274 | */ | ||
4275 | afg_power_state = AC_PWRST_D1; | ||
4276 | } | ||
4277 | /* this delay seems necessary to avoid click noise at power-down */ | ||
4278 | msleep(100); | ||
4279 | } | ||
4280 | snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, | ||
4281 | afg_power_state); | ||
4282 | snd_hda_codec_set_power_to_all(codec, fg, power_state); | ||
4283 | } | ||
4284 | #else | 4274 | #else |
4285 | #define stac_suspend NULL | 4275 | #define stac_suspend NULL |
4286 | #define stac_set_power_state NULL | ||
4287 | #endif /* CONFIG_PM */ | 4276 | #endif /* CONFIG_PM */ |
4288 | 4277 | ||
4289 | static const struct hda_codec_ops stac_patch_ops = { | 4278 | static const struct hda_codec_ops stac_patch_ops = { |
@@ -4466,8 +4455,7 @@ static void stac_setup_gpio(struct hda_codec *codec) | |||
4466 | spec->gpio_dir |= spec->gpio_led; | 4455 | spec->gpio_dir |= spec->gpio_led; |
4467 | spec->gpio_data |= spec->gpio_led; | 4456 | spec->gpio_data |= spec->gpio_led; |
4468 | } else { | 4457 | } else { |
4469 | codec->patch_ops.set_power_state = | 4458 | codec->power_filter = stac_vref_led_power_filter; |
4470 | stac_set_power_state; | ||
4471 | } | 4459 | } |
4472 | } | 4460 | } |
4473 | 4461 | ||
diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c index 0bc20ef5687a..f84195f3ea31 100644 --- a/sound/pci/hda/patch_via.c +++ b/sound/pci/hda/patch_via.c | |||
@@ -138,6 +138,7 @@ static struct via_spec *via_new_spec(struct hda_codec *codec) | |||
138 | spec->gen.indep_hp = 1; | 138 | spec->gen.indep_hp = 1; |
139 | spec->gen.keep_eapd_on = 1; | 139 | spec->gen.keep_eapd_on = 1; |
140 | spec->gen.pcm_playback_hook = via_playback_pcm_hook; | 140 | spec->gen.pcm_playback_hook = via_playback_pcm_hook; |
141 | spec->gen.add_stereo_mix_input = 1; | ||
141 | return spec; | 142 | return spec; |
142 | } | 143 | } |
143 | 144 | ||
diff --git a/sound/pci/hda/thinkpad_helper.c b/sound/pci/hda/thinkpad_helper.c new file mode 100644 index 000000000000..5799fbc24c28 --- /dev/null +++ b/sound/pci/hda/thinkpad_helper.c | |||
@@ -0,0 +1,99 @@ | |||
1 | /* Helper functions for Thinkpad LED control; | ||
2 | * to be included from codec driver | ||
3 | */ | ||
4 | |||
5 | #if IS_ENABLED(CONFIG_THINKPAD_ACPI) | ||
6 | |||
7 | #include <linux/acpi.h> | ||
8 | #include <linux/thinkpad_acpi.h> | ||
9 | |||
10 | static int (*led_set_func)(int, bool); | ||
11 | static void (*old_vmaster_hook)(void *, int); | ||
12 | |||
13 | static acpi_status acpi_check_cb(acpi_handle handle, u32 lvl, void *context, | ||
14 | void **rv) | ||
15 | { | ||
16 | bool *found = context; | ||
17 | *found = true; | ||
18 | return AE_OK; | ||
19 | } | ||
20 | |||
21 | static bool is_thinkpad(struct hda_codec *codec) | ||
22 | { | ||
23 | bool found = false; | ||
24 | if (codec->subsystem_id >> 16 != 0x17aa) | ||
25 | return false; | ||
26 | if (ACPI_SUCCESS(acpi_get_devices("LEN0068", acpi_check_cb, &found, NULL)) && found) | ||
27 | return true; | ||
28 | found = false; | ||
29 | return ACPI_SUCCESS(acpi_get_devices("IBM0068", acpi_check_cb, &found, NULL)) && found; | ||
30 | } | ||
31 | |||
32 | static void update_tpacpi_mute_led(void *private_data, int enabled) | ||
33 | { | ||
34 | if (old_vmaster_hook) | ||
35 | old_vmaster_hook(private_data, enabled); | ||
36 | |||
37 | if (led_set_func) | ||
38 | led_set_func(TPACPI_LED_MUTE, !enabled); | ||
39 | } | ||
40 | |||
41 | static void update_tpacpi_micmute_led(struct hda_codec *codec, | ||
42 | struct snd_ctl_elem_value *ucontrol) | ||
43 | { | ||
44 | if (!ucontrol || !led_set_func) | ||
45 | return; | ||
46 | if (strcmp("Capture Switch", ucontrol->id.name) == 0 && ucontrol->id.index == 0) { | ||
47 | /* TODO: How do I verify if it's a mono or stereo here? */ | ||
48 | bool val = ucontrol->value.integer.value[0] || ucontrol->value.integer.value[1]; | ||
49 | led_set_func(TPACPI_LED_MICMUTE, !val); | ||
50 | } | ||
51 | } | ||
52 | |||
53 | static void hda_fixup_thinkpad_acpi(struct hda_codec *codec, | ||
54 | const struct hda_fixup *fix, int action) | ||
55 | { | ||
56 | struct hda_gen_spec *spec = codec->spec; | ||
57 | bool removefunc = false; | ||
58 | |||
59 | if (action == HDA_FIXUP_ACT_PROBE) { | ||
60 | if (!is_thinkpad(codec)) | ||
61 | return; | ||
62 | if (!led_set_func) | ||
63 | led_set_func = symbol_request(tpacpi_led_set); | ||
64 | if (!led_set_func) { | ||
65 | snd_printk(KERN_WARNING "Failed to find thinkpad-acpi symbol tpacpi_led_set\n"); | ||
66 | return; | ||
67 | } | ||
68 | |||
69 | removefunc = true; | ||
70 | if (led_set_func(TPACPI_LED_MUTE, false) >= 0) { | ||
71 | old_vmaster_hook = spec->vmaster_mute.hook; | ||
72 | spec->vmaster_mute.hook = update_tpacpi_mute_led; | ||
73 | removefunc = false; | ||
74 | } | ||
75 | if (led_set_func(TPACPI_LED_MICMUTE, false) >= 0) { | ||
76 | if (spec->num_adc_nids > 1) | ||
77 | snd_printdd("Skipping micmute LED control due to several ADCs"); | ||
78 | else { | ||
79 | spec->cap_sync_hook = update_tpacpi_micmute_led; | ||
80 | removefunc = false; | ||
81 | } | ||
82 | } | ||
83 | } | ||
84 | |||
85 | if (led_set_func && (action == HDA_FIXUP_ACT_FREE || removefunc)) { | ||
86 | symbol_put(tpacpi_led_set); | ||
87 | led_set_func = NULL; | ||
88 | old_vmaster_hook = NULL; | ||
89 | } | ||
90 | } | ||
91 | |||
92 | #else /* CONFIG_THINKPAD_ACPI */ | ||
93 | |||
94 | static void hda_fixup_thinkpad_acpi(struct hda_codec *codec, | ||
95 | const struct hda_fixup *fix, int action) | ||
96 | { | ||
97 | } | ||
98 | |||
99 | #endif /* CONFIG_THINKPAD_ACPI */ | ||
diff --git a/sound/pci/rme9652/hdsp.c b/sound/pci/rme9652/hdsp.c index f59a321a6d6a..bd90c80bb494 100644 --- a/sound/pci/rme9652/hdsp.c +++ b/sound/pci/rme9652/hdsp.c | |||
@@ -584,10 +584,6 @@ static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer | |||
584 | { | 584 | { |
585 | dmab->dev.type = SNDRV_DMA_TYPE_DEV; | 585 | dmab->dev.type = SNDRV_DMA_TYPE_DEV; |
586 | dmab->dev.dev = snd_dma_pci_data(pci); | 586 | dmab->dev.dev = snd_dma_pci_data(pci); |
587 | if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) { | ||
588 | if (dmab->bytes >= size) | ||
589 | return 0; | ||
590 | } | ||
591 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | 587 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), |
592 | size, dmab) < 0) | 588 | size, dmab) < 0) |
593 | return -ENOMEM; | 589 | return -ENOMEM; |
@@ -596,10 +592,8 @@ static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer | |||
596 | 592 | ||
597 | static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) | 593 | static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) |
598 | { | 594 | { |
599 | if (dmab->area) { | 595 | if (dmab->area) |
600 | dmab->dev.dev = NULL; /* make it anonymous */ | 596 | snd_dma_free_pages(dmab); |
601 | snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci)); | ||
602 | } | ||
603 | } | 597 | } |
604 | 598 | ||
605 | 599 | ||
diff --git a/sound/pci/rme9652/rme9652.c b/sound/pci/rme9652/rme9652.c index b96d9e1adf6d..1503ee3585fd 100644 --- a/sound/pci/rme9652/rme9652.c +++ b/sound/pci/rme9652/rme9652.c | |||
@@ -285,7 +285,7 @@ static char channel_map_9636_ds[26] = { | |||
285 | /* ADAT channels are remapped */ | 285 | /* ADAT channels are remapped */ |
286 | 1, 3, 5, 7, 9, 11, 13, 15, | 286 | 1, 3, 5, 7, 9, 11, 13, 15, |
287 | /* channels 8 and 9 are S/PDIF */ | 287 | /* channels 8 and 9 are S/PDIF */ |
288 | 24, 25 | 288 | 24, 25, |
289 | /* others don't exist */ | 289 | /* others don't exist */ |
290 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 | 290 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 |
291 | }; | 291 | }; |
@@ -294,10 +294,6 @@ static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer | |||
294 | { | 294 | { |
295 | dmab->dev.type = SNDRV_DMA_TYPE_DEV; | 295 | dmab->dev.type = SNDRV_DMA_TYPE_DEV; |
296 | dmab->dev.dev = snd_dma_pci_data(pci); | 296 | dmab->dev.dev = snd_dma_pci_data(pci); |
297 | if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) { | ||
298 | if (dmab->bytes >= size) | ||
299 | return 0; | ||
300 | } | ||
301 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | 297 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), |
302 | size, dmab) < 0) | 298 | size, dmab) < 0) |
303 | return -ENOMEM; | 299 | return -ENOMEM; |
@@ -306,10 +302,8 @@ static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer | |||
306 | 302 | ||
307 | static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) | 303 | static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) |
308 | { | 304 | { |
309 | if (dmab->area) { | 305 | if (dmab->area) |
310 | dmab->dev.dev = NULL; /* make it anonymous */ | 306 | snd_dma_free_pages(dmab); |
311 | snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci)); | ||
312 | } | ||
313 | } | 307 | } |
314 | 308 | ||
315 | 309 | ||
diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 5138b8493051..d62ce483a443 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig | |||
@@ -31,8 +31,10 @@ config SND_SOC_GENERIC_DMAENGINE_PCM | |||
31 | select SND_DMAENGINE_PCM | 31 | select SND_DMAENGINE_PCM |
32 | 32 | ||
33 | # All the supported SoCs | 33 | # All the supported SoCs |
34 | source "sound/soc/adi/Kconfig" | ||
34 | source "sound/soc/atmel/Kconfig" | 35 | source "sound/soc/atmel/Kconfig" |
35 | source "sound/soc/au1x/Kconfig" | 36 | source "sound/soc/au1x/Kconfig" |
37 | source "sound/soc/bcm/Kconfig" | ||
36 | source "sound/soc/blackfin/Kconfig" | 38 | source "sound/soc/blackfin/Kconfig" |
37 | source "sound/soc/cirrus/Kconfig" | 39 | source "sound/soc/cirrus/Kconfig" |
38 | source "sound/soc/davinci/Kconfig" | 40 | source "sound/soc/davinci/Kconfig" |
@@ -42,7 +44,7 @@ source "sound/soc/jz4740/Kconfig" | |||
42 | source "sound/soc/nuc900/Kconfig" | 44 | source "sound/soc/nuc900/Kconfig" |
43 | source "sound/soc/omap/Kconfig" | 45 | source "sound/soc/omap/Kconfig" |
44 | source "sound/soc/kirkwood/Kconfig" | 46 | source "sound/soc/kirkwood/Kconfig" |
45 | source "sound/soc/mid-x86/Kconfig" | 47 | source "sound/soc/intel/Kconfig" |
46 | source "sound/soc/mxs/Kconfig" | 48 | source "sound/soc/mxs/Kconfig" |
47 | source "sound/soc/pxa/Kconfig" | 49 | source "sound/soc/pxa/Kconfig" |
48 | source "sound/soc/samsung/Kconfig" | 50 | source "sound/soc/samsung/Kconfig" |
diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 8b9e70105dd2..62a1822e77bf 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile | |||
@@ -8,15 +8,17 @@ endif | |||
8 | obj-$(CONFIG_SND_SOC) += snd-soc-core.o | 8 | obj-$(CONFIG_SND_SOC) += snd-soc-core.o |
9 | obj-$(CONFIG_SND_SOC) += codecs/ | 9 | obj-$(CONFIG_SND_SOC) += codecs/ |
10 | obj-$(CONFIG_SND_SOC) += generic/ | 10 | obj-$(CONFIG_SND_SOC) += generic/ |
11 | obj-$(CONFIG_SND_SOC) += adi/ | ||
11 | obj-$(CONFIG_SND_SOC) += atmel/ | 12 | obj-$(CONFIG_SND_SOC) += atmel/ |
12 | obj-$(CONFIG_SND_SOC) += au1x/ | 13 | obj-$(CONFIG_SND_SOC) += au1x/ |
14 | obj-$(CONFIG_SND_SOC) += bcm/ | ||
13 | obj-$(CONFIG_SND_SOC) += blackfin/ | 15 | obj-$(CONFIG_SND_SOC) += blackfin/ |
14 | obj-$(CONFIG_SND_SOC) += cirrus/ | 16 | obj-$(CONFIG_SND_SOC) += cirrus/ |
15 | obj-$(CONFIG_SND_SOC) += davinci/ | 17 | obj-$(CONFIG_SND_SOC) += davinci/ |
16 | obj-$(CONFIG_SND_SOC) += dwc/ | 18 | obj-$(CONFIG_SND_SOC) += dwc/ |
17 | obj-$(CONFIG_SND_SOC) += fsl/ | 19 | obj-$(CONFIG_SND_SOC) += fsl/ |
18 | obj-$(CONFIG_SND_SOC) += jz4740/ | 20 | obj-$(CONFIG_SND_SOC) += jz4740/ |
19 | obj-$(CONFIG_SND_SOC) += mid-x86/ | 21 | obj-$(CONFIG_SND_SOC) += intel/ |
20 | obj-$(CONFIG_SND_SOC) += mxs/ | 22 | obj-$(CONFIG_SND_SOC) += mxs/ |
21 | obj-$(CONFIG_SND_SOC) += nuc900/ | 23 | obj-$(CONFIG_SND_SOC) += nuc900/ |
22 | obj-$(CONFIG_SND_SOC) += omap/ | 24 | obj-$(CONFIG_SND_SOC) += omap/ |
diff --git a/sound/soc/adi/Kconfig b/sound/soc/adi/Kconfig new file mode 100644 index 000000000000..dd763f55edac --- /dev/null +++ b/sound/soc/adi/Kconfig | |||
@@ -0,0 +1,21 @@ | |||
1 | config SND_SOC_ADI | ||
2 | tristate "Audio support for Analog Devices reference designs" | ||
3 | depends on MICROBLAZE || ARCH_ZYNQ || COMPILE_TEST | ||
4 | help | ||
5 | Audio support for various reference designs by Analog Devices. | ||
6 | |||
7 | config SND_SOC_ADI_AXI_I2S | ||
8 | tristate "AXI-I2S support" | ||
9 | depends on SND_SOC_ADI | ||
10 | select SND_SOC_GENERIC_DMAENGINE_PCM | ||
11 | select REGMAP_MMIO | ||
12 | help | ||
13 | ASoC driver for the Analog Devices AXI-I2S softcore peripheral. | ||
14 | |||
15 | config SND_SOC_ADI_AXI_SPDIF | ||
16 | tristate "AXI-SPDIF support" | ||
17 | depends on SND_SOC_ADI | ||
18 | select SND_SOC_GENERIC_DMAENGINE_PCM | ||
19 | select REGMAP_MMIO | ||
20 | help | ||
21 | ASoC driver for the Analog Devices AXI-SPDIF softcore peripheral. | ||
diff --git a/sound/soc/adi/Makefile b/sound/soc/adi/Makefile new file mode 100644 index 000000000000..64456c1e5347 --- /dev/null +++ b/sound/soc/adi/Makefile | |||
@@ -0,0 +1,5 @@ | |||
1 | snd-soc-adi-axi-i2s-objs := axi-i2s.o | ||
2 | snd-soc-adi-axi-spdif-objs := axi-spdif.o | ||
3 | |||
4 | obj-$(CONFIG_SND_SOC_ADI_AXI_I2S) += snd-soc-adi-axi-i2s.o | ||
5 | obj-$(CONFIG_SND_SOC_ADI_AXI_SPDIF) += snd-soc-adi-axi-spdif.o | ||
diff --git a/sound/soc/adi/axi-i2s.c b/sound/soc/adi/axi-i2s.c new file mode 100644 index 000000000000..6058c1fd5070 --- /dev/null +++ b/sound/soc/adi/axi-i2s.c | |||
@@ -0,0 +1,276 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012-2013, Analog Devices Inc. | ||
3 | * Author: Lars-Peter Clausen <lars@metafoo.de> | ||
4 | * | ||
5 | * Licensed under the GPL-2. | ||
6 | */ | ||
7 | |||
8 | #include <linux/clk.h> | ||
9 | #include <linux/init.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/of.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/regmap.h> | ||
15 | #include <linux/slab.h> | ||
16 | |||
17 | #include <sound/core.h> | ||
18 | #include <sound/pcm.h> | ||
19 | #include <sound/pcm_params.h> | ||
20 | #include <sound/soc.h> | ||
21 | #include <sound/dmaengine_pcm.h> | ||
22 | |||
23 | #define AXI_I2S_REG_RESET 0x00 | ||
24 | #define AXI_I2S_REG_CTRL 0x04 | ||
25 | #define AXI_I2S_REG_CLK_CTRL 0x08 | ||
26 | #define AXI_I2S_REG_STATUS 0x10 | ||
27 | |||
28 | #define AXI_I2S_REG_RX_FIFO 0x28 | ||
29 | #define AXI_I2S_REG_TX_FIFO 0x2C | ||
30 | |||
31 | #define AXI_I2S_RESET_GLOBAL BIT(0) | ||
32 | #define AXI_I2S_RESET_TX_FIFO BIT(1) | ||
33 | #define AXI_I2S_RESET_RX_FIFO BIT(2) | ||
34 | |||
35 | #define AXI_I2S_CTRL_TX_EN BIT(0) | ||
36 | #define AXI_I2S_CTRL_RX_EN BIT(1) | ||
37 | |||
38 | /* The frame size is configurable, but for now we always set it 64 bit */ | ||
39 | #define AXI_I2S_BITS_PER_FRAME 64 | ||
40 | |||
41 | struct axi_i2s { | ||
42 | struct regmap *regmap; | ||
43 | struct clk *clk; | ||
44 | struct clk *clk_ref; | ||
45 | |||
46 | struct snd_soc_dai_driver dai_driver; | ||
47 | |||
48 | struct snd_dmaengine_dai_dma_data capture_dma_data; | ||
49 | struct snd_dmaengine_dai_dma_data playback_dma_data; | ||
50 | |||
51 | struct snd_ratnum ratnum; | ||
52 | struct snd_pcm_hw_constraint_ratnums rate_constraints; | ||
53 | }; | ||
54 | |||
55 | static int axi_i2s_trigger(struct snd_pcm_substream *substream, int cmd, | ||
56 | struct snd_soc_dai *dai) | ||
57 | { | ||
58 | struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); | ||
59 | unsigned int mask, val; | ||
60 | |||
61 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | ||
62 | mask = AXI_I2S_CTRL_RX_EN; | ||
63 | else | ||
64 | mask = AXI_I2S_CTRL_TX_EN; | ||
65 | |||
66 | switch (cmd) { | ||
67 | case SNDRV_PCM_TRIGGER_START: | ||
68 | case SNDRV_PCM_TRIGGER_RESUME: | ||
69 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
70 | val = mask; | ||
71 | break; | ||
72 | case SNDRV_PCM_TRIGGER_STOP: | ||
73 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
74 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
75 | val = 0; | ||
76 | break; | ||
77 | default: | ||
78 | return -EINVAL; | ||
79 | } | ||
80 | |||
81 | regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val); | ||
82 | |||
83 | return 0; | ||
84 | } | ||
85 | |||
86 | static int axi_i2s_hw_params(struct snd_pcm_substream *substream, | ||
87 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | ||
88 | { | ||
89 | struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); | ||
90 | unsigned int bclk_div, word_size; | ||
91 | unsigned int bclk_rate; | ||
92 | |||
93 | bclk_rate = params_rate(params) * AXI_I2S_BITS_PER_FRAME; | ||
94 | |||
95 | word_size = AXI_I2S_BITS_PER_FRAME / 2 - 1; | ||
96 | bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1; | ||
97 | |||
98 | regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) | | ||
99 | bclk_div); | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
104 | static int axi_i2s_startup(struct snd_pcm_substream *substream, | ||
105 | struct snd_soc_dai *dai) | ||
106 | { | ||
107 | struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); | ||
108 | uint32_t mask; | ||
109 | int ret; | ||
110 | |||
111 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | ||
112 | mask = AXI_I2S_RESET_RX_FIFO; | ||
113 | else | ||
114 | mask = AXI_I2S_RESET_TX_FIFO; | ||
115 | |||
116 | regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask); | ||
117 | |||
118 | ret = snd_pcm_hw_constraint_ratnums(substream->runtime, 0, | ||
119 | SNDRV_PCM_HW_PARAM_RATE, | ||
120 | &i2s->rate_constraints); | ||
121 | if (ret) | ||
122 | return ret; | ||
123 | |||
124 | return clk_prepare_enable(i2s->clk_ref); | ||
125 | } | ||
126 | |||
127 | static void axi_i2s_shutdown(struct snd_pcm_substream *substream, | ||
128 | struct snd_soc_dai *dai) | ||
129 | { | ||
130 | struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); | ||
131 | |||
132 | clk_disable_unprepare(i2s->clk_ref); | ||
133 | } | ||
134 | |||
135 | static int axi_i2s_dai_probe(struct snd_soc_dai *dai) | ||
136 | { | ||
137 | struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); | ||
138 | |||
139 | snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data, | ||
140 | &i2s->capture_dma_data); | ||
141 | |||
142 | return 0; | ||
143 | } | ||
144 | |||
145 | static const struct snd_soc_dai_ops axi_i2s_dai_ops = { | ||
146 | .startup = axi_i2s_startup, | ||
147 | .shutdown = axi_i2s_shutdown, | ||
148 | .trigger = axi_i2s_trigger, | ||
149 | .hw_params = axi_i2s_hw_params, | ||
150 | }; | ||
151 | |||
152 | static struct snd_soc_dai_driver axi_i2s_dai = { | ||
153 | .probe = axi_i2s_dai_probe, | ||
154 | .playback = { | ||
155 | .channels_min = 2, | ||
156 | .channels_max = 2, | ||
157 | .rates = SNDRV_PCM_RATE_KNOT, | ||
158 | .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE, | ||
159 | }, | ||
160 | .capture = { | ||
161 | .channels_min = 2, | ||
162 | .channels_max = 2, | ||
163 | .rates = SNDRV_PCM_RATE_KNOT, | ||
164 | .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE, | ||
165 | }, | ||
166 | .ops = &axi_i2s_dai_ops, | ||
167 | .symmetric_rates = 1, | ||
168 | }; | ||
169 | |||
170 | static const struct snd_soc_component_driver axi_i2s_component = { | ||
171 | .name = "axi-i2s", | ||
172 | }; | ||
173 | |||
174 | static const struct regmap_config axi_i2s_regmap_config = { | ||
175 | .reg_bits = 32, | ||
176 | .reg_stride = 4, | ||
177 | .val_bits = 32, | ||
178 | .max_register = AXI_I2S_REG_STATUS, | ||
179 | }; | ||
180 | |||
181 | static int axi_i2s_probe(struct platform_device *pdev) | ||
182 | { | ||
183 | struct resource *res; | ||
184 | struct axi_i2s *i2s; | ||
185 | void __iomem *base; | ||
186 | int ret; | ||
187 | |||
188 | i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); | ||
189 | if (!i2s) | ||
190 | return -ENOMEM; | ||
191 | |||
192 | platform_set_drvdata(pdev, i2s); | ||
193 | |||
194 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
195 | base = devm_ioremap_resource(&pdev->dev, res); | ||
196 | if (IS_ERR(base)) | ||
197 | return PTR_ERR(base); | ||
198 | |||
199 | i2s->regmap = devm_regmap_init_mmio(&pdev->dev, base, | ||
200 | &axi_i2s_regmap_config); | ||
201 | if (IS_ERR(i2s->regmap)) | ||
202 | return PTR_ERR(i2s->regmap); | ||
203 | |||
204 | i2s->clk = devm_clk_get(&pdev->dev, "axi"); | ||
205 | if (IS_ERR(i2s->clk)) | ||
206 | return PTR_ERR(i2s->clk); | ||
207 | |||
208 | i2s->clk_ref = devm_clk_get(&pdev->dev, "ref"); | ||
209 | if (IS_ERR(i2s->clk_ref)) | ||
210 | return PTR_ERR(i2s->clk_ref); | ||
211 | |||
212 | ret = clk_prepare_enable(i2s->clk); | ||
213 | if (ret) | ||
214 | return ret; | ||
215 | |||
216 | i2s->playback_dma_data.addr = res->start + AXI_I2S_REG_TX_FIFO; | ||
217 | i2s->playback_dma_data.addr_width = 4; | ||
218 | i2s->playback_dma_data.maxburst = 1; | ||
219 | |||
220 | i2s->capture_dma_data.addr = res->start + AXI_I2S_REG_RX_FIFO; | ||
221 | i2s->capture_dma_data.addr_width = 4; | ||
222 | i2s->capture_dma_data.maxburst = 1; | ||
223 | |||
224 | i2s->ratnum.num = clk_get_rate(i2s->clk_ref) / 2 / AXI_I2S_BITS_PER_FRAME; | ||
225 | i2s->ratnum.den_step = 1; | ||
226 | i2s->ratnum.den_min = 1; | ||
227 | i2s->ratnum.den_max = 64; | ||
228 | |||
229 | i2s->rate_constraints.rats = &i2s->ratnum; | ||
230 | i2s->rate_constraints.nrats = 1; | ||
231 | |||
232 | regmap_write(i2s->regmap, AXI_I2S_REG_RESET, AXI_I2S_RESET_GLOBAL); | ||
233 | |||
234 | ret = devm_snd_soc_register_component(&pdev->dev, &axi_i2s_component, | ||
235 | &axi_i2s_dai, 1); | ||
236 | if (ret) | ||
237 | goto err_clk_disable; | ||
238 | |||
239 | ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); | ||
240 | if (ret) | ||
241 | goto err_clk_disable; | ||
242 | |||
243 | err_clk_disable: | ||
244 | clk_disable_unprepare(i2s->clk); | ||
245 | return ret; | ||
246 | } | ||
247 | |||
248 | static int axi_i2s_dev_remove(struct platform_device *pdev) | ||
249 | { | ||
250 | struct axi_i2s *i2s = platform_get_drvdata(pdev); | ||
251 | |||
252 | clk_disable_unprepare(i2s->clk); | ||
253 | |||
254 | return 0; | ||
255 | } | ||
256 | |||
257 | static const struct of_device_id axi_i2s_of_match[] = { | ||
258 | { .compatible = "adi,axi-i2s-1.00.a", }, | ||
259 | {}, | ||
260 | }; | ||
261 | MODULE_DEVICE_TABLE(of, axi_i2s_of_match); | ||
262 | |||
263 | static struct platform_driver axi_i2s_driver = { | ||
264 | .driver = { | ||
265 | .name = "axi-i2s", | ||
266 | .owner = THIS_MODULE, | ||
267 | .of_match_table = axi_i2s_of_match, | ||
268 | }, | ||
269 | .probe = axi_i2s_probe, | ||
270 | .remove = axi_i2s_dev_remove, | ||
271 | }; | ||
272 | module_platform_driver(axi_i2s_driver); | ||
273 | |||
274 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); | ||
275 | MODULE_DESCRIPTION("AXI I2S driver"); | ||
276 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/adi/axi-spdif.c b/sound/soc/adi/axi-spdif.c new file mode 100644 index 000000000000..198e3a4640f6 --- /dev/null +++ b/sound/soc/adi/axi-spdif.c | |||
@@ -0,0 +1,271 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012-2013, Analog Devices Inc. | ||
3 | * Author: Lars-Peter Clausen <lars@metafoo.de> | ||
4 | * | ||
5 | * Licensed under the GPL-2. | ||
6 | */ | ||
7 | |||
8 | #include <linux/init.h> | ||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/slab.h> | ||
13 | #include <linux/of.h> | ||
14 | #include <linux/clk.h> | ||
15 | #include <linux/regmap.h> | ||
16 | |||
17 | #include <sound/core.h> | ||
18 | #include <sound/pcm.h> | ||
19 | #include <sound/pcm_params.h> | ||
20 | #include <sound/soc.h> | ||
21 | #include <sound/initval.h> | ||
22 | #include <sound/dmaengine_pcm.h> | ||
23 | |||
24 | #define AXI_SPDIF_REG_CTRL 0x0 | ||
25 | #define AXI_SPDIF_REG_STAT 0x4 | ||
26 | #define AXI_SPDIF_REG_TX_FIFO 0xc | ||
27 | |||
28 | #define AXI_SPDIF_CTRL_TXDATA BIT(1) | ||
29 | #define AXI_SPDIF_CTRL_TXEN BIT(0) | ||
30 | #define AXI_SPDIF_CTRL_CLKDIV_OFFSET 8 | ||
31 | #define AXI_SPDIF_CTRL_CLKDIV_MASK (0xff << 8) | ||
32 | |||
33 | #define AXI_SPDIF_FREQ_44100 (0x0 << 6) | ||
34 | #define AXI_SPDIF_FREQ_48000 (0x1 << 6) | ||
35 | #define AXI_SPDIF_FREQ_32000 (0x2 << 6) | ||
36 | #define AXI_SPDIF_FREQ_NA (0x3 << 6) | ||
37 | |||
38 | struct axi_spdif { | ||
39 | struct regmap *regmap; | ||
40 | struct clk *clk; | ||
41 | struct clk *clk_ref; | ||
42 | |||
43 | struct snd_dmaengine_dai_dma_data dma_data; | ||
44 | |||
45 | struct snd_ratnum ratnum; | ||
46 | struct snd_pcm_hw_constraint_ratnums rate_constraints; | ||
47 | }; | ||
48 | |||
49 | static int axi_spdif_trigger(struct snd_pcm_substream *substream, int cmd, | ||
50 | struct snd_soc_dai *dai) | ||
51 | { | ||
52 | struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai); | ||
53 | unsigned int val; | ||
54 | |||
55 | switch (cmd) { | ||
56 | case SNDRV_PCM_TRIGGER_START: | ||
57 | case SNDRV_PCM_TRIGGER_RESUME: | ||
58 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
59 | val = AXI_SPDIF_CTRL_TXDATA; | ||
60 | break; | ||
61 | case SNDRV_PCM_TRIGGER_STOP: | ||
62 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
63 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
64 | val = 0; | ||
65 | break; | ||
66 | default: | ||
67 | return -EINVAL; | ||
68 | } | ||
69 | |||
70 | regmap_update_bits(spdif->regmap, AXI_SPDIF_REG_CTRL, | ||
71 | AXI_SPDIF_CTRL_TXDATA, val); | ||
72 | |||
73 | return 0; | ||
74 | } | ||
75 | |||
76 | static int axi_spdif_hw_params(struct snd_pcm_substream *substream, | ||
77 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | ||
78 | { | ||
79 | struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai); | ||
80 | unsigned int rate = params_rate(params); | ||
81 | unsigned int clkdiv, stat; | ||
82 | |||
83 | switch (params_rate(params)) { | ||
84 | case 32000: | ||
85 | stat = AXI_SPDIF_FREQ_32000; | ||
86 | break; | ||
87 | case 44100: | ||
88 | stat = AXI_SPDIF_FREQ_44100; | ||
89 | break; | ||
90 | case 48000: | ||
91 | stat = AXI_SPDIF_FREQ_48000; | ||
92 | break; | ||
93 | default: | ||
94 | stat = AXI_SPDIF_FREQ_NA; | ||
95 | break; | ||
96 | } | ||
97 | |||
98 | clkdiv = DIV_ROUND_CLOSEST(clk_get_rate(spdif->clk_ref), | ||
99 | rate * 64 * 2) - 1; | ||
100 | clkdiv <<= AXI_SPDIF_CTRL_CLKDIV_OFFSET; | ||
101 | |||
102 | regmap_write(spdif->regmap, AXI_SPDIF_REG_STAT, stat); | ||
103 | regmap_update_bits(spdif->regmap, AXI_SPDIF_REG_CTRL, | ||
104 | AXI_SPDIF_CTRL_CLKDIV_MASK, clkdiv); | ||
105 | |||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | static int axi_spdif_dai_probe(struct snd_soc_dai *dai) | ||
110 | { | ||
111 | struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai); | ||
112 | |||
113 | snd_soc_dai_init_dma_data(dai, &spdif->dma_data, NULL); | ||
114 | |||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | static int axi_spdif_startup(struct snd_pcm_substream *substream, | ||
119 | struct snd_soc_dai *dai) | ||
120 | { | ||
121 | struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai); | ||
122 | int ret; | ||
123 | |||
124 | ret = snd_pcm_hw_constraint_ratnums(substream->runtime, 0, | ||
125 | SNDRV_PCM_HW_PARAM_RATE, | ||
126 | &spdif->rate_constraints); | ||
127 | if (ret) | ||
128 | return ret; | ||
129 | |||
130 | ret = clk_prepare_enable(spdif->clk_ref); | ||
131 | if (ret) | ||
132 | return ret; | ||
133 | |||
134 | regmap_update_bits(spdif->regmap, AXI_SPDIF_REG_CTRL, | ||
135 | AXI_SPDIF_CTRL_TXEN, AXI_SPDIF_CTRL_TXEN); | ||
136 | |||
137 | return 0; | ||
138 | } | ||
139 | |||
140 | static void axi_spdif_shutdown(struct snd_pcm_substream *substream, | ||
141 | struct snd_soc_dai *dai) | ||
142 | { | ||
143 | struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai); | ||
144 | |||
145 | regmap_update_bits(spdif->regmap, AXI_SPDIF_REG_CTRL, | ||
146 | AXI_SPDIF_CTRL_TXEN, 0); | ||
147 | |||
148 | clk_disable_unprepare(spdif->clk_ref); | ||
149 | } | ||
150 | |||
151 | static const struct snd_soc_dai_ops axi_spdif_dai_ops = { | ||
152 | .startup = axi_spdif_startup, | ||
153 | .shutdown = axi_spdif_shutdown, | ||
154 | .trigger = axi_spdif_trigger, | ||
155 | .hw_params = axi_spdif_hw_params, | ||
156 | }; | ||
157 | |||
158 | static struct snd_soc_dai_driver axi_spdif_dai = { | ||
159 | .probe = axi_spdif_dai_probe, | ||
160 | .playback = { | ||
161 | .channels_min = 2, | ||
162 | .channels_max = 2, | ||
163 | .rates = SNDRV_PCM_RATE_KNOT, | ||
164 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
165 | }, | ||
166 | .ops = &axi_spdif_dai_ops, | ||
167 | }; | ||
168 | |||
169 | static const struct snd_soc_component_driver axi_spdif_component = { | ||
170 | .name = "axi-spdif", | ||
171 | }; | ||
172 | |||
173 | static const struct regmap_config axi_spdif_regmap_config = { | ||
174 | .reg_bits = 32, | ||
175 | .reg_stride = 4, | ||
176 | .val_bits = 32, | ||
177 | .max_register = AXI_SPDIF_REG_STAT, | ||
178 | }; | ||
179 | |||
180 | static int axi_spdif_probe(struct platform_device *pdev) | ||
181 | { | ||
182 | struct axi_spdif *spdif; | ||
183 | struct resource *res; | ||
184 | void __iomem *base; | ||
185 | int ret; | ||
186 | |||
187 | spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL); | ||
188 | if (!spdif) | ||
189 | return -ENOMEM; | ||
190 | |||
191 | platform_set_drvdata(pdev, spdif); | ||
192 | |||
193 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
194 | base = devm_ioremap_resource(&pdev->dev, res); | ||
195 | if (IS_ERR(base)) | ||
196 | return PTR_ERR(base); | ||
197 | |||
198 | spdif->regmap = devm_regmap_init_mmio(&pdev->dev, base, | ||
199 | &axi_spdif_regmap_config); | ||
200 | if (IS_ERR(spdif->regmap)) | ||
201 | return PTR_ERR(spdif->regmap); | ||
202 | |||
203 | spdif->clk = devm_clk_get(&pdev->dev, "axi"); | ||
204 | if (IS_ERR(spdif->clk)) | ||
205 | return PTR_ERR(spdif->clk); | ||
206 | |||
207 | spdif->clk_ref = devm_clk_get(&pdev->dev, "ref"); | ||
208 | if (IS_ERR(spdif->clk_ref)) | ||
209 | return PTR_ERR(spdif->clk_ref); | ||
210 | |||
211 | ret = clk_prepare_enable(spdif->clk); | ||
212 | if (ret) | ||
213 | return ret; | ||
214 | |||
215 | spdif->dma_data.addr = res->start + AXI_SPDIF_REG_TX_FIFO; | ||
216 | spdif->dma_data.addr_width = 4; | ||
217 | spdif->dma_data.maxburst = 1; | ||
218 | |||
219 | spdif->ratnum.num = clk_get_rate(spdif->clk_ref) / 128; | ||
220 | spdif->ratnum.den_step = 1; | ||
221 | spdif->ratnum.den_min = 1; | ||
222 | spdif->ratnum.den_max = 64; | ||
223 | |||
224 | spdif->rate_constraints.rats = &spdif->ratnum; | ||
225 | spdif->rate_constraints.nrats = 1; | ||
226 | |||
227 | ret = devm_snd_soc_register_component(&pdev->dev, &axi_spdif_component, | ||
228 | &axi_spdif_dai, 1); | ||
229 | if (ret) | ||
230 | goto err_clk_disable; | ||
231 | |||
232 | ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); | ||
233 | if (ret) | ||
234 | goto err_clk_disable; | ||
235 | |||
236 | return 0; | ||
237 | |||
238 | err_clk_disable: | ||
239 | clk_disable_unprepare(spdif->clk); | ||
240 | return ret; | ||
241 | } | ||
242 | |||
243 | static int axi_spdif_dev_remove(struct platform_device *pdev) | ||
244 | { | ||
245 | struct axi_spdif *spdif = platform_get_drvdata(pdev); | ||
246 | |||
247 | clk_disable_unprepare(spdif->clk); | ||
248 | |||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | static const struct of_device_id axi_spdif_of_match[] = { | ||
253 | { .compatible = "adi,axi-spdif-tx-1.00.a", }, | ||
254 | {}, | ||
255 | }; | ||
256 | MODULE_DEVICE_TABLE(of, axi_spdif_of_match); | ||
257 | |||
258 | static struct platform_driver axi_spdif_driver = { | ||
259 | .driver = { | ||
260 | .name = "axi-spdif", | ||
261 | .owner = THIS_MODULE, | ||
262 | .of_match_table = axi_spdif_of_match, | ||
263 | }, | ||
264 | .probe = axi_spdif_probe, | ||
265 | .remove = axi_spdif_dev_remove, | ||
266 | }; | ||
267 | module_platform_driver(axi_spdif_driver); | ||
268 | |||
269 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); | ||
270 | MODULE_DESCRIPTION("AXI SPDIF driver"); | ||
271 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/atmel/atmel-pcm-dma.c b/sound/soc/atmel/atmel-pcm-dma.c index 06082e5e5dcb..b79a2a864513 100644 --- a/sound/soc/atmel/atmel-pcm-dma.c +++ b/sound/soc/atmel/atmel-pcm-dma.c | |||
@@ -50,7 +50,6 @@ static const struct snd_pcm_hardware atmel_pcm_dma_hardware = { | |||
50 | SNDRV_PCM_INFO_INTERLEAVED | | 50 | SNDRV_PCM_INFO_INTERLEAVED | |
51 | SNDRV_PCM_INFO_RESUME | | 51 | SNDRV_PCM_INFO_RESUME | |
52 | SNDRV_PCM_INFO_PAUSE, | 52 | SNDRV_PCM_INFO_PAUSE, |
53 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
54 | .period_bytes_min = 256, /* lighting DMA overhead */ | 53 | .period_bytes_min = 256, /* lighting DMA overhead */ |
55 | .period_bytes_max = 2 * 0xffff, /* if 2 bytes format */ | 54 | .period_bytes_max = 2 * 0xffff, /* if 2 bytes format */ |
56 | .periods_min = 8, | 55 | .periods_min = 8, |
diff --git a/sound/soc/atmel/atmel-pcm-pdc.c b/sound/soc/atmel/atmel-pcm-pdc.c index 054ea4d9326a..33ec592ecd75 100644 --- a/sound/soc/atmel/atmel-pcm-pdc.c +++ b/sound/soc/atmel/atmel-pcm-pdc.c | |||
@@ -58,7 +58,6 @@ static const struct snd_pcm_hardware atmel_pcm_hardware = { | |||
58 | SNDRV_PCM_INFO_MMAP_VALID | | 58 | SNDRV_PCM_INFO_MMAP_VALID | |
59 | SNDRV_PCM_INFO_INTERLEAVED | | 59 | SNDRV_PCM_INFO_INTERLEAVED | |
60 | SNDRV_PCM_INFO_PAUSE, | 60 | SNDRV_PCM_INFO_PAUSE, |
61 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
62 | .period_bytes_min = 32, | 61 | .period_bytes_min = 32, |
63 | .period_bytes_max = 8192, | 62 | .period_bytes_max = 8192, |
64 | .periods_min = 2, | 63 | .periods_min = 2, |
diff --git a/sound/soc/atmel/sam9x5_wm8731.c b/sound/soc/atmel/sam9x5_wm8731.c index 7d6a9055874b..3188036a18f0 100644 --- a/sound/soc/atmel/sam9x5_wm8731.c +++ b/sound/soc/atmel/sam9x5_wm8731.c | |||
@@ -155,8 +155,6 @@ static int sam9x5_wm8731_driver_probe(struct platform_device *pdev) | |||
155 | of_node_put(codec_np); | 155 | of_node_put(codec_np); |
156 | of_node_put(cpu_np); | 156 | of_node_put(cpu_np); |
157 | 157 | ||
158 | platform_set_drvdata(pdev, card); | ||
159 | |||
160 | ret = snd_soc_register_card(card); | 158 | ret = snd_soc_register_card(card); |
161 | if (ret) { | 159 | if (ret) { |
162 | dev_err(&pdev->dev, | 160 | dev_err(&pdev->dev, |
diff --git a/sound/soc/au1x/dbdma2.c b/sound/soc/au1x/dbdma2.c index 3b4eafaf30d3..17a24d804734 100644 --- a/sound/soc/au1x/dbdma2.c +++ b/sound/soc/au1x/dbdma2.c | |||
@@ -65,19 +65,10 @@ struct au1xpsc_audio_dmadata { | |||
65 | #define AU1XPSC_PERIOD_MIN_BYTES 1024 | 65 | #define AU1XPSC_PERIOD_MIN_BYTES 1024 |
66 | #define AU1XPSC_BUFFER_MIN_BYTES 65536 | 66 | #define AU1XPSC_BUFFER_MIN_BYTES 65536 |
67 | 67 | ||
68 | #define AU1XPSC_PCM_FMTS \ | ||
69 | (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \ | ||
70 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \ | ||
71 | SNDRV_PCM_FMTBIT_U16_LE | SNDRV_PCM_FMTBIT_U16_BE | \ | ||
72 | SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE | \ | ||
73 | SNDRV_PCM_FMTBIT_U32_LE | SNDRV_PCM_FMTBIT_U32_BE | \ | ||
74 | 0) | ||
75 | |||
76 | /* PCM hardware DMA capabilities - platform specific */ | 68 | /* PCM hardware DMA capabilities - platform specific */ |
77 | static const struct snd_pcm_hardware au1xpsc_pcm_hardware = { | 69 | static const struct snd_pcm_hardware au1xpsc_pcm_hardware = { |
78 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | 70 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | |
79 | SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH, | 71 | SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH, |
80 | .formats = AU1XPSC_PCM_FMTS, | ||
81 | .period_bytes_min = AU1XPSC_PERIOD_MIN_BYTES, | 72 | .period_bytes_min = AU1XPSC_PERIOD_MIN_BYTES, |
82 | .period_bytes_max = 4096 * 1024 - 1, | 73 | .period_bytes_max = 4096 * 1024 - 1, |
83 | .periods_min = 2, | 74 | .periods_min = 2, |
diff --git a/sound/soc/au1x/dma.c b/sound/soc/au1x/dma.c index befd1074f9bd..e920b60bf6c2 100644 --- a/sound/soc/au1x/dma.c +++ b/sound/soc/au1x/dma.c | |||
@@ -21,14 +21,6 @@ | |||
21 | 21 | ||
22 | #include "psc.h" | 22 | #include "psc.h" |
23 | 23 | ||
24 | #define ALCHEMY_PCM_FMTS \ | ||
25 | (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \ | ||
26 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \ | ||
27 | SNDRV_PCM_FMTBIT_U16_LE | SNDRV_PCM_FMTBIT_U16_BE | \ | ||
28 | SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE | \ | ||
29 | SNDRV_PCM_FMTBIT_U32_LE | SNDRV_PCM_FMTBIT_U32_BE | \ | ||
30 | 0) | ||
31 | |||
32 | struct pcm_period { | 24 | struct pcm_period { |
33 | u32 start; | 25 | u32 start; |
34 | u32 relative_end; /* relative to start of buffer */ | 26 | u32 relative_end; /* relative to start of buffer */ |
@@ -171,12 +163,6 @@ static irqreturn_t au1000_dma_interrupt(int irq, void *ptr) | |||
171 | static const struct snd_pcm_hardware alchemy_pcm_hardware = { | 163 | static const struct snd_pcm_hardware alchemy_pcm_hardware = { |
172 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | 164 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | |
173 | SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH, | 165 | SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH, |
174 | .formats = ALCHEMY_PCM_FMTS, | ||
175 | .rates = SNDRV_PCM_RATE_8000_192000, | ||
176 | .rate_min = SNDRV_PCM_RATE_8000, | ||
177 | .rate_max = SNDRV_PCM_RATE_192000, | ||
178 | .channels_min = 2, | ||
179 | .channels_max = 2, | ||
180 | .period_bytes_min = 1024, | 166 | .period_bytes_min = 1024, |
181 | .period_bytes_max = 16 * 1024 - 1, | 167 | .period_bytes_max = 16 * 1024 - 1, |
182 | .periods_min = 4, | 168 | .periods_min = 4, |
diff --git a/sound/soc/bcm/Kconfig b/sound/soc/bcm/Kconfig new file mode 100644 index 000000000000..6a834e109f1d --- /dev/null +++ b/sound/soc/bcm/Kconfig | |||
@@ -0,0 +1,9 @@ | |||
1 | config SND_BCM2835_SOC_I2S | ||
2 | tristate "SoC Audio support for the Broadcom BCM2835 I2S module" | ||
3 | depends on ARCH_BCM2835 || COMPILE_TEST | ||
4 | select SND_SOC_GENERIC_DMAENGINE_PCM | ||
5 | select REGMAP_MMIO | ||
6 | help | ||
7 | Say Y or M if you want to add support for codecs attached to | ||
8 | the BCM2835 I2S interface. You will also need | ||
9 | to select the audio interfaces to support below. | ||
diff --git a/sound/soc/bcm/Makefile b/sound/soc/bcm/Makefile new file mode 100644 index 000000000000..bc816b71e5a4 --- /dev/null +++ b/sound/soc/bcm/Makefile | |||
@@ -0,0 +1,5 @@ | |||
1 | # BCM2835 Platform Support | ||
2 | snd-soc-bcm2835-i2s-objs := bcm2835-i2s.o | ||
3 | |||
4 | obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o | ||
5 | |||
diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c new file mode 100644 index 000000000000..2685fe4f8427 --- /dev/null +++ b/sound/soc/bcm/bcm2835-i2s.c | |||
@@ -0,0 +1,879 @@ | |||
1 | /* | ||
2 | * ALSA SoC I2S Audio Layer for Broadcom BCM2835 SoC | ||
3 | * | ||
4 | * Author: Florian Meier <florian.meier@koalo.de> | ||
5 | * Copyright 2013 | ||
6 | * | ||
7 | * Based on | ||
8 | * Raspberry Pi PCM I2S ALSA Driver | ||
9 | * Copyright (c) by Phil Poole 2013 | ||
10 | * | ||
11 | * ALSA SoC I2S (McBSP) Audio Layer for TI DAVINCI processor | ||
12 | * Vladimir Barinov, <vbarinov@embeddedalley.com> | ||
13 | * Copyright (C) 2007 MontaVista Software, Inc., <source@mvista.com> | ||
14 | * | ||
15 | * OMAP ALSA SoC DAI driver using McBSP port | ||
16 | * Copyright (C) 2008 Nokia Corporation | ||
17 | * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com> | ||
18 | * Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
19 | * | ||
20 | * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver | ||
21 | * Author: Timur Tabi <timur@freescale.com> | ||
22 | * Copyright 2007-2010 Freescale Semiconductor, Inc. | ||
23 | * | ||
24 | * This program is free software; you can redistribute it and/or | ||
25 | * modify it under the terms of the GNU General Public License | ||
26 | * version 2 as published by the Free Software Foundation. | ||
27 | * | ||
28 | * This program is distributed in the hope that it will be useful, but | ||
29 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
30 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
31 | * General Public License for more details. | ||
32 | */ | ||
33 | |||
34 | #include <linux/init.h> | ||
35 | #include <linux/module.h> | ||
36 | #include <linux/device.h> | ||
37 | #include <linux/slab.h> | ||
38 | #include <linux/delay.h> | ||
39 | #include <linux/io.h> | ||
40 | #include <linux/clk.h> | ||
41 | |||
42 | #include <sound/core.h> | ||
43 | #include <sound/pcm.h> | ||
44 | #include <sound/pcm_params.h> | ||
45 | #include <sound/initval.h> | ||
46 | #include <sound/soc.h> | ||
47 | #include <sound/dmaengine_pcm.h> | ||
48 | |||
49 | /* Clock registers */ | ||
50 | #define BCM2835_CLK_PCMCTL_REG 0x00 | ||
51 | #define BCM2835_CLK_PCMDIV_REG 0x04 | ||
52 | |||
53 | /* Clock register settings */ | ||
54 | #define BCM2835_CLK_PASSWD (0x5a000000) | ||
55 | #define BCM2835_CLK_PASSWD_MASK (0xff000000) | ||
56 | #define BCM2835_CLK_MASH(v) ((v) << 9) | ||
57 | #define BCM2835_CLK_FLIP BIT(8) | ||
58 | #define BCM2835_CLK_BUSY BIT(7) | ||
59 | #define BCM2835_CLK_KILL BIT(5) | ||
60 | #define BCM2835_CLK_ENAB BIT(4) | ||
61 | #define BCM2835_CLK_SRC(v) (v) | ||
62 | |||
63 | #define BCM2835_CLK_SHIFT (12) | ||
64 | #define BCM2835_CLK_DIVI(v) ((v) << BCM2835_CLK_SHIFT) | ||
65 | #define BCM2835_CLK_DIVF(v) (v) | ||
66 | #define BCM2835_CLK_DIVF_MASK (0xFFF) | ||
67 | |||
68 | enum { | ||
69 | BCM2835_CLK_MASH_0 = 0, | ||
70 | BCM2835_CLK_MASH_1, | ||
71 | BCM2835_CLK_MASH_2, | ||
72 | BCM2835_CLK_MASH_3, | ||
73 | }; | ||
74 | |||
75 | enum { | ||
76 | BCM2835_CLK_SRC_GND = 0, | ||
77 | BCM2835_CLK_SRC_OSC, | ||
78 | BCM2835_CLK_SRC_DBG0, | ||
79 | BCM2835_CLK_SRC_DBG1, | ||
80 | BCM2835_CLK_SRC_PLLA, | ||
81 | BCM2835_CLK_SRC_PLLC, | ||
82 | BCM2835_CLK_SRC_PLLD, | ||
83 | BCM2835_CLK_SRC_HDMI, | ||
84 | }; | ||
85 | |||
86 | /* Most clocks are not useable (freq = 0) */ | ||
87 | static const unsigned int bcm2835_clk_freq[BCM2835_CLK_SRC_HDMI+1] = { | ||
88 | [BCM2835_CLK_SRC_GND] = 0, | ||
89 | [BCM2835_CLK_SRC_OSC] = 19200000, | ||
90 | [BCM2835_CLK_SRC_DBG0] = 0, | ||
91 | [BCM2835_CLK_SRC_DBG1] = 0, | ||
92 | [BCM2835_CLK_SRC_PLLA] = 0, | ||
93 | [BCM2835_CLK_SRC_PLLC] = 0, | ||
94 | [BCM2835_CLK_SRC_PLLD] = 500000000, | ||
95 | [BCM2835_CLK_SRC_HDMI] = 0, | ||
96 | }; | ||
97 | |||
98 | /* I2S registers */ | ||
99 | #define BCM2835_I2S_CS_A_REG 0x00 | ||
100 | #define BCM2835_I2S_FIFO_A_REG 0x04 | ||
101 | #define BCM2835_I2S_MODE_A_REG 0x08 | ||
102 | #define BCM2835_I2S_RXC_A_REG 0x0c | ||
103 | #define BCM2835_I2S_TXC_A_REG 0x10 | ||
104 | #define BCM2835_I2S_DREQ_A_REG 0x14 | ||
105 | #define BCM2835_I2S_INTEN_A_REG 0x18 | ||
106 | #define BCM2835_I2S_INTSTC_A_REG 0x1c | ||
107 | #define BCM2835_I2S_GRAY_REG 0x20 | ||
108 | |||
109 | /* I2S register settings */ | ||
110 | #define BCM2835_I2S_STBY BIT(25) | ||
111 | #define BCM2835_I2S_SYNC BIT(24) | ||
112 | #define BCM2835_I2S_RXSEX BIT(23) | ||
113 | #define BCM2835_I2S_RXF BIT(22) | ||
114 | #define BCM2835_I2S_TXE BIT(21) | ||
115 | #define BCM2835_I2S_RXD BIT(20) | ||
116 | #define BCM2835_I2S_TXD BIT(19) | ||
117 | #define BCM2835_I2S_RXR BIT(18) | ||
118 | #define BCM2835_I2S_TXW BIT(17) | ||
119 | #define BCM2835_I2S_CS_RXERR BIT(16) | ||
120 | #define BCM2835_I2S_CS_TXERR BIT(15) | ||
121 | #define BCM2835_I2S_RXSYNC BIT(14) | ||
122 | #define BCM2835_I2S_TXSYNC BIT(13) | ||
123 | #define BCM2835_I2S_DMAEN BIT(9) | ||
124 | #define BCM2835_I2S_RXTHR(v) ((v) << 7) | ||
125 | #define BCM2835_I2S_TXTHR(v) ((v) << 5) | ||
126 | #define BCM2835_I2S_RXCLR BIT(4) | ||
127 | #define BCM2835_I2S_TXCLR BIT(3) | ||
128 | #define BCM2835_I2S_TXON BIT(2) | ||
129 | #define BCM2835_I2S_RXON BIT(1) | ||
130 | #define BCM2835_I2S_EN (1) | ||
131 | |||
132 | #define BCM2835_I2S_CLKDIS BIT(28) | ||
133 | #define BCM2835_I2S_PDMN BIT(27) | ||
134 | #define BCM2835_I2S_PDME BIT(26) | ||
135 | #define BCM2835_I2S_FRXP BIT(25) | ||
136 | #define BCM2835_I2S_FTXP BIT(24) | ||
137 | #define BCM2835_I2S_CLKM BIT(23) | ||
138 | #define BCM2835_I2S_CLKI BIT(22) | ||
139 | #define BCM2835_I2S_FSM BIT(21) | ||
140 | #define BCM2835_I2S_FSI BIT(20) | ||
141 | #define BCM2835_I2S_FLEN(v) ((v) << 10) | ||
142 | #define BCM2835_I2S_FSLEN(v) (v) | ||
143 | |||
144 | #define BCM2835_I2S_CHWEX BIT(15) | ||
145 | #define BCM2835_I2S_CHEN BIT(14) | ||
146 | #define BCM2835_I2S_CHPOS(v) ((v) << 4) | ||
147 | #define BCM2835_I2S_CHWID(v) (v) | ||
148 | #define BCM2835_I2S_CH1(v) ((v) << 16) | ||
149 | #define BCM2835_I2S_CH2(v) (v) | ||
150 | |||
151 | #define BCM2835_I2S_TX_PANIC(v) ((v) << 24) | ||
152 | #define BCM2835_I2S_RX_PANIC(v) ((v) << 16) | ||
153 | #define BCM2835_I2S_TX(v) ((v) << 8) | ||
154 | #define BCM2835_I2S_RX(v) (v) | ||
155 | |||
156 | #define BCM2835_I2S_INT_RXERR BIT(3) | ||
157 | #define BCM2835_I2S_INT_TXERR BIT(2) | ||
158 | #define BCM2835_I2S_INT_RXR BIT(1) | ||
159 | #define BCM2835_I2S_INT_TXW BIT(0) | ||
160 | |||
161 | /* I2S DMA interface */ | ||
162 | /* FIXME: Needs IOMMU support */ | ||
163 | #define BCM2835_VCMMU_SHIFT (0x7E000000 - 0x20000000) | ||
164 | |||
165 | /* General device struct */ | ||
166 | struct bcm2835_i2s_dev { | ||
167 | struct device *dev; | ||
168 | struct snd_dmaengine_dai_dma_data dma_data[2]; | ||
169 | unsigned int fmt; | ||
170 | unsigned int bclk_ratio; | ||
171 | |||
172 | struct regmap *i2s_regmap; | ||
173 | struct regmap *clk_regmap; | ||
174 | }; | ||
175 | |||
176 | static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) | ||
177 | { | ||
178 | /* Start the clock if in master mode */ | ||
179 | unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; | ||
180 | |||
181 | switch (master) { | ||
182 | case SND_SOC_DAIFMT_CBS_CFS: | ||
183 | case SND_SOC_DAIFMT_CBS_CFM: | ||
184 | regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, | ||
185 | BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, | ||
186 | BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); | ||
187 | break; | ||
188 | default: | ||
189 | break; | ||
190 | } | ||
191 | } | ||
192 | |||
193 | static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev) | ||
194 | { | ||
195 | uint32_t clkreg; | ||
196 | int timeout = 1000; | ||
197 | |||
198 | /* Stop clock */ | ||
199 | regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, | ||
200 | BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, | ||
201 | BCM2835_CLK_PASSWD); | ||
202 | |||
203 | /* Wait for the BUSY flag going down */ | ||
204 | while (--timeout) { | ||
205 | regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); | ||
206 | if (!(clkreg & BCM2835_CLK_BUSY)) | ||
207 | break; | ||
208 | } | ||
209 | |||
210 | if (!timeout) { | ||
211 | /* KILL the clock */ | ||
212 | dev_err(dev->dev, "I2S clock didn't stop. Kill the clock!\n"); | ||
213 | regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, | ||
214 | BCM2835_CLK_KILL | BCM2835_CLK_PASSWD_MASK, | ||
215 | BCM2835_CLK_KILL | BCM2835_CLK_PASSWD); | ||
216 | } | ||
217 | } | ||
218 | |||
219 | static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, | ||
220 | bool tx, bool rx) | ||
221 | { | ||
222 | int timeout = 1000; | ||
223 | uint32_t syncval; | ||
224 | uint32_t csreg; | ||
225 | uint32_t i2s_active_state; | ||
226 | uint32_t clkreg; | ||
227 | uint32_t clk_active_state; | ||
228 | uint32_t off; | ||
229 | uint32_t clr; | ||
230 | |||
231 | off = tx ? BCM2835_I2S_TXON : 0; | ||
232 | off |= rx ? BCM2835_I2S_RXON : 0; | ||
233 | |||
234 | clr = tx ? BCM2835_I2S_TXCLR : 0; | ||
235 | clr |= rx ? BCM2835_I2S_RXCLR : 0; | ||
236 | |||
237 | /* Backup the current state */ | ||
238 | regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); | ||
239 | i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON); | ||
240 | |||
241 | regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); | ||
242 | clk_active_state = clkreg & BCM2835_CLK_ENAB; | ||
243 | |||
244 | /* Start clock if not running */ | ||
245 | if (!clk_active_state) { | ||
246 | regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, | ||
247 | BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, | ||
248 | BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); | ||
249 | } | ||
250 | |||
251 | /* Stop I2S module */ | ||
252 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, off, 0); | ||
253 | |||
254 | /* | ||
255 | * Clear the FIFOs | ||
256 | * Requires at least 2 PCM clock cycles to take effect | ||
257 | */ | ||
258 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, clr, clr); | ||
259 | |||
260 | /* Wait for 2 PCM clock cycles */ | ||
261 | |||
262 | /* | ||
263 | * Toggle the SYNC flag. After 2 PCM clock cycles it can be read back | ||
264 | * FIXME: This does not seem to work for slave mode! | ||
265 | */ | ||
266 | regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &syncval); | ||
267 | syncval &= BCM2835_I2S_SYNC; | ||
268 | |||
269 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, | ||
270 | BCM2835_I2S_SYNC, ~syncval); | ||
271 | |||
272 | /* Wait for the SYNC flag changing it's state */ | ||
273 | while (--timeout) { | ||
274 | regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); | ||
275 | if ((csreg & BCM2835_I2S_SYNC) != syncval) | ||
276 | break; | ||
277 | } | ||
278 | |||
279 | if (!timeout) | ||
280 | dev_err(dev->dev, "I2S SYNC error!\n"); | ||
281 | |||
282 | /* Stop clock if it was not running before */ | ||
283 | if (!clk_active_state) | ||
284 | bcm2835_i2s_stop_clock(dev); | ||
285 | |||
286 | /* Restore I2S state */ | ||
287 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, | ||
288 | BCM2835_I2S_RXON | BCM2835_I2S_TXON, i2s_active_state); | ||
289 | } | ||
290 | |||
291 | static int bcm2835_i2s_set_dai_fmt(struct snd_soc_dai *dai, | ||
292 | unsigned int fmt) | ||
293 | { | ||
294 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | ||
295 | dev->fmt = fmt; | ||
296 | return 0; | ||
297 | } | ||
298 | |||
299 | static int bcm2835_i2s_set_dai_bclk_ratio(struct snd_soc_dai *dai, | ||
300 | unsigned int ratio) | ||
301 | { | ||
302 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | ||
303 | dev->bclk_ratio = ratio; | ||
304 | return 0; | ||
305 | } | ||
306 | |||
307 | static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, | ||
308 | struct snd_pcm_hw_params *params, | ||
309 | struct snd_soc_dai *dai) | ||
310 | { | ||
311 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | ||
312 | |||
313 | unsigned int sampling_rate = params_rate(params); | ||
314 | unsigned int data_length, data_delay, bclk_ratio; | ||
315 | unsigned int ch1pos, ch2pos, mode, format; | ||
316 | unsigned int mash = BCM2835_CLK_MASH_1; | ||
317 | unsigned int divi, divf, target_frequency; | ||
318 | int clk_src = -1; | ||
319 | unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; | ||
320 | bool bit_master = (master == SND_SOC_DAIFMT_CBS_CFS | ||
321 | || master == SND_SOC_DAIFMT_CBS_CFM); | ||
322 | |||
323 | bool frame_master = (master == SND_SOC_DAIFMT_CBS_CFS | ||
324 | || master == SND_SOC_DAIFMT_CBM_CFS); | ||
325 | uint32_t csreg; | ||
326 | |||
327 | /* | ||
328 | * If a stream is already enabled, | ||
329 | * the registers are already set properly. | ||
330 | */ | ||
331 | regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); | ||
332 | |||
333 | if (csreg & (BCM2835_I2S_TXON | BCM2835_I2S_RXON)) | ||
334 | return 0; | ||
335 | |||
336 | /* | ||
337 | * Adjust the data length according to the format. | ||
338 | * We prefill the half frame length with an integer | ||
339 | * divider of 2400 as explained at the clock settings. | ||
340 | * Maybe it is overwritten there, if the Integer mode | ||
341 | * does not apply. | ||
342 | */ | ||
343 | switch (params_format(params)) { | ||
344 | case SNDRV_PCM_FORMAT_S16_LE: | ||
345 | data_length = 16; | ||
346 | bclk_ratio = 40; | ||
347 | break; | ||
348 | case SNDRV_PCM_FORMAT_S32_LE: | ||
349 | data_length = 32; | ||
350 | bclk_ratio = 80; | ||
351 | break; | ||
352 | default: | ||
353 | return -EINVAL; | ||
354 | } | ||
355 | |||
356 | /* If bclk_ratio already set, use that one. */ | ||
357 | if (dev->bclk_ratio) | ||
358 | bclk_ratio = dev->bclk_ratio; | ||
359 | |||
360 | /* | ||
361 | * Clock Settings | ||
362 | * | ||
363 | * The target frequency of the bit clock is | ||
364 | * sampling rate * frame length | ||
365 | * | ||
366 | * Integer mode: | ||
367 | * Sampling rates that are multiples of 8000 kHz | ||
368 | * can be driven by the oscillator of 19.2 MHz | ||
369 | * with an integer divider as long as the frame length | ||
370 | * is an integer divider of 19200000/8000=2400 as set up above. | ||
371 | * This is no longer possible if the sampling rate | ||
372 | * is too high (e.g. 192 kHz), because the oscillator is too slow. | ||
373 | * | ||
374 | * MASH mode: | ||
375 | * For all other sampling rates, it is not possible to | ||
376 | * have an integer divider. Approximate the clock | ||
377 | * with the MASH module that induces a slight frequency | ||
378 | * variance. To minimize that it is best to have the fastest | ||
379 | * clock here. That is PLLD with 500 MHz. | ||
380 | */ | ||
381 | target_frequency = sampling_rate * bclk_ratio; | ||
382 | clk_src = BCM2835_CLK_SRC_OSC; | ||
383 | mash = BCM2835_CLK_MASH_0; | ||
384 | |||
385 | if (bcm2835_clk_freq[clk_src] % target_frequency == 0 | ||
386 | && bit_master && frame_master) { | ||
387 | divi = bcm2835_clk_freq[clk_src] / target_frequency; | ||
388 | divf = 0; | ||
389 | } else { | ||
390 | uint64_t dividend; | ||
391 | |||
392 | if (!dev->bclk_ratio) { | ||
393 | /* | ||
394 | * Overwrite bclk_ratio, because the | ||
395 | * above trick is not needed or can | ||
396 | * not be used. | ||
397 | */ | ||
398 | bclk_ratio = 2 * data_length; | ||
399 | } | ||
400 | |||
401 | target_frequency = sampling_rate * bclk_ratio; | ||
402 | |||
403 | clk_src = BCM2835_CLK_SRC_PLLD; | ||
404 | mash = BCM2835_CLK_MASH_1; | ||
405 | |||
406 | dividend = bcm2835_clk_freq[clk_src]; | ||
407 | dividend <<= BCM2835_CLK_SHIFT; | ||
408 | do_div(dividend, target_frequency); | ||
409 | divi = dividend >> BCM2835_CLK_SHIFT; | ||
410 | divf = dividend & BCM2835_CLK_DIVF_MASK; | ||
411 | } | ||
412 | |||
413 | /* Set clock divider */ | ||
414 | regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD | ||
415 | | BCM2835_CLK_DIVI(divi) | ||
416 | | BCM2835_CLK_DIVF(divf)); | ||
417 | |||
418 | /* Setup clock, but don't start it yet */ | ||
419 | regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD | ||
420 | | BCM2835_CLK_MASH(mash) | ||
421 | | BCM2835_CLK_SRC(clk_src)); | ||
422 | |||
423 | /* Setup the frame format */ | ||
424 | format = BCM2835_I2S_CHEN; | ||
425 | |||
426 | if (data_length > 24) | ||
427 | format |= BCM2835_I2S_CHWEX; | ||
428 | |||
429 | format |= BCM2835_I2S_CHWID((data_length-8)&0xf); | ||
430 | |||
431 | switch (dev->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | ||
432 | case SND_SOC_DAIFMT_I2S: | ||
433 | data_delay = 1; | ||
434 | break; | ||
435 | default: | ||
436 | /* | ||
437 | * TODO | ||
438 | * Others are possible but are not implemented at the moment. | ||
439 | */ | ||
440 | dev_err(dev->dev, "%s:bad format\n", __func__); | ||
441 | return -EINVAL; | ||
442 | } | ||
443 | |||
444 | ch1pos = data_delay; | ||
445 | ch2pos = bclk_ratio / 2 + data_delay; | ||
446 | |||
447 | switch (params_channels(params)) { | ||
448 | case 2: | ||
449 | format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); | ||
450 | format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); | ||
451 | format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); | ||
452 | break; | ||
453 | default: | ||
454 | return -EINVAL; | ||
455 | } | ||
456 | |||
457 | /* | ||
458 | * Set format for both streams. | ||
459 | * We cannot set another frame length | ||
460 | * (and therefore word length) anyway, | ||
461 | * so the format will be the same. | ||
462 | */ | ||
463 | regmap_write(dev->i2s_regmap, BCM2835_I2S_RXC_A_REG, format); | ||
464 | regmap_write(dev->i2s_regmap, BCM2835_I2S_TXC_A_REG, format); | ||
465 | |||
466 | /* Setup the I2S mode */ | ||
467 | mode = 0; | ||
468 | |||
469 | if (data_length <= 16) { | ||
470 | /* | ||
471 | * Use frame packed mode (2 channels per 32 bit word) | ||
472 | * We cannot set another frame length in the second stream | ||
473 | * (and therefore word length) anyway, | ||
474 | * so the format will be the same. | ||
475 | */ | ||
476 | mode |= BCM2835_I2S_FTXP | BCM2835_I2S_FRXP; | ||
477 | } | ||
478 | |||
479 | mode |= BCM2835_I2S_FLEN(bclk_ratio - 1); | ||
480 | mode |= BCM2835_I2S_FSLEN(bclk_ratio / 2); | ||
481 | |||
482 | /* Master or slave? */ | ||
483 | switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) { | ||
484 | case SND_SOC_DAIFMT_CBS_CFS: | ||
485 | /* CPU is master */ | ||
486 | break; | ||
487 | case SND_SOC_DAIFMT_CBM_CFS: | ||
488 | /* | ||
489 | * CODEC is bit clock master | ||
490 | * CPU is frame master | ||
491 | */ | ||
492 | mode |= BCM2835_I2S_CLKM; | ||
493 | break; | ||
494 | case SND_SOC_DAIFMT_CBS_CFM: | ||
495 | /* | ||
496 | * CODEC is frame master | ||
497 | * CPU is bit clock master | ||
498 | */ | ||
499 | mode |= BCM2835_I2S_FSM; | ||
500 | break; | ||
501 | case SND_SOC_DAIFMT_CBM_CFM: | ||
502 | /* CODEC is master */ | ||
503 | mode |= BCM2835_I2S_CLKM; | ||
504 | mode |= BCM2835_I2S_FSM; | ||
505 | break; | ||
506 | default: | ||
507 | dev_err(dev->dev, "%s:bad master\n", __func__); | ||
508 | return -EINVAL; | ||
509 | } | ||
510 | |||
511 | /* | ||
512 | * Invert clocks? | ||
513 | * | ||
514 | * The BCM approach seems to be inverted to the classical I2S approach. | ||
515 | */ | ||
516 | switch (dev->fmt & SND_SOC_DAIFMT_INV_MASK) { | ||
517 | case SND_SOC_DAIFMT_NB_NF: | ||
518 | /* None. Therefore, both for BCM */ | ||
519 | mode |= BCM2835_I2S_CLKI; | ||
520 | mode |= BCM2835_I2S_FSI; | ||
521 | break; | ||
522 | case SND_SOC_DAIFMT_IB_IF: | ||
523 | /* Both. Therefore, none for BCM */ | ||
524 | break; | ||
525 | case SND_SOC_DAIFMT_NB_IF: | ||
526 | /* | ||
527 | * Invert only frame sync. Therefore, | ||
528 | * invert only bit clock for BCM | ||
529 | */ | ||
530 | mode |= BCM2835_I2S_CLKI; | ||
531 | break; | ||
532 | case SND_SOC_DAIFMT_IB_NF: | ||
533 | /* | ||
534 | * Invert only bit clock. Therefore, | ||
535 | * invert only frame sync for BCM | ||
536 | */ | ||
537 | mode |= BCM2835_I2S_FSI; | ||
538 | break; | ||
539 | default: | ||
540 | return -EINVAL; | ||
541 | } | ||
542 | |||
543 | regmap_write(dev->i2s_regmap, BCM2835_I2S_MODE_A_REG, mode); | ||
544 | |||
545 | /* Setup the DMA parameters */ | ||
546 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, | ||
547 | BCM2835_I2S_RXTHR(1) | ||
548 | | BCM2835_I2S_TXTHR(1) | ||
549 | | BCM2835_I2S_DMAEN, 0xffffffff); | ||
550 | |||
551 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_DREQ_A_REG, | ||
552 | BCM2835_I2S_TX_PANIC(0x10) | ||
553 | | BCM2835_I2S_RX_PANIC(0x30) | ||
554 | | BCM2835_I2S_TX(0x30) | ||
555 | | BCM2835_I2S_RX(0x20), 0xffffffff); | ||
556 | |||
557 | /* Clear FIFOs */ | ||
558 | bcm2835_i2s_clear_fifos(dev, true, true); | ||
559 | |||
560 | return 0; | ||
561 | } | ||
562 | |||
563 | static int bcm2835_i2s_prepare(struct snd_pcm_substream *substream, | ||
564 | struct snd_soc_dai *dai) | ||
565 | { | ||
566 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | ||
567 | uint32_t cs_reg; | ||
568 | |||
569 | bcm2835_i2s_start_clock(dev); | ||
570 | |||
571 | /* | ||
572 | * Clear both FIFOs if the one that should be started | ||
573 | * is not empty at the moment. This should only happen | ||
574 | * after overrun. Otherwise, hw_params would have cleared | ||
575 | * the FIFO. | ||
576 | */ | ||
577 | regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &cs_reg); | ||
578 | |||
579 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK | ||
580 | && !(cs_reg & BCM2835_I2S_TXE)) | ||
581 | bcm2835_i2s_clear_fifos(dev, true, false); | ||
582 | else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE | ||
583 | && (cs_reg & BCM2835_I2S_RXD)) | ||
584 | bcm2835_i2s_clear_fifos(dev, false, true); | ||
585 | |||
586 | return 0; | ||
587 | } | ||
588 | |||
589 | static void bcm2835_i2s_stop(struct bcm2835_i2s_dev *dev, | ||
590 | struct snd_pcm_substream *substream, | ||
591 | struct snd_soc_dai *dai) | ||
592 | { | ||
593 | uint32_t mask; | ||
594 | |||
595 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | ||
596 | mask = BCM2835_I2S_RXON; | ||
597 | else | ||
598 | mask = BCM2835_I2S_TXON; | ||
599 | |||
600 | regmap_update_bits(dev->i2s_regmap, | ||
601 | BCM2835_I2S_CS_A_REG, mask, 0); | ||
602 | |||
603 | /* Stop also the clock when not SND_SOC_DAIFMT_CONT */ | ||
604 | if (!dai->active && !(dev->fmt & SND_SOC_DAIFMT_CONT)) | ||
605 | bcm2835_i2s_stop_clock(dev); | ||
606 | } | ||
607 | |||
608 | static int bcm2835_i2s_trigger(struct snd_pcm_substream *substream, int cmd, | ||
609 | struct snd_soc_dai *dai) | ||
610 | { | ||
611 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | ||
612 | uint32_t mask; | ||
613 | |||
614 | switch (cmd) { | ||
615 | case SNDRV_PCM_TRIGGER_START: | ||
616 | case SNDRV_PCM_TRIGGER_RESUME: | ||
617 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
618 | bcm2835_i2s_start_clock(dev); | ||
619 | |||
620 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | ||
621 | mask = BCM2835_I2S_RXON; | ||
622 | else | ||
623 | mask = BCM2835_I2S_TXON; | ||
624 | |||
625 | regmap_update_bits(dev->i2s_regmap, | ||
626 | BCM2835_I2S_CS_A_REG, mask, mask); | ||
627 | break; | ||
628 | |||
629 | case SNDRV_PCM_TRIGGER_STOP: | ||
630 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
631 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
632 | bcm2835_i2s_stop(dev, substream, dai); | ||
633 | break; | ||
634 | default: | ||
635 | return -EINVAL; | ||
636 | } | ||
637 | |||
638 | return 0; | ||
639 | } | ||
640 | |||
641 | static int bcm2835_i2s_startup(struct snd_pcm_substream *substream, | ||
642 | struct snd_soc_dai *dai) | ||
643 | { | ||
644 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | ||
645 | |||
646 | if (dai->active) | ||
647 | return 0; | ||
648 | |||
649 | /* Should this still be running stop it */ | ||
650 | bcm2835_i2s_stop_clock(dev); | ||
651 | |||
652 | /* Enable PCM block */ | ||
653 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, | ||
654 | BCM2835_I2S_EN, BCM2835_I2S_EN); | ||
655 | |||
656 | /* | ||
657 | * Disable STBY. | ||
658 | * Requires at least 4 PCM clock cycles to take effect. | ||
659 | */ | ||
660 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, | ||
661 | BCM2835_I2S_STBY, BCM2835_I2S_STBY); | ||
662 | |||
663 | return 0; | ||
664 | } | ||
665 | |||
666 | static void bcm2835_i2s_shutdown(struct snd_pcm_substream *substream, | ||
667 | struct snd_soc_dai *dai) | ||
668 | { | ||
669 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | ||
670 | |||
671 | bcm2835_i2s_stop(dev, substream, dai); | ||
672 | |||
673 | /* If both streams are stopped, disable module and clock */ | ||
674 | if (dai->active) | ||
675 | return; | ||
676 | |||
677 | /* Disable the module */ | ||
678 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, | ||
679 | BCM2835_I2S_EN, 0); | ||
680 | |||
681 | /* | ||
682 | * Stopping clock is necessary, because stop does | ||
683 | * not stop the clock when SND_SOC_DAIFMT_CONT | ||
684 | */ | ||
685 | bcm2835_i2s_stop_clock(dev); | ||
686 | } | ||
687 | |||
688 | static const struct snd_soc_dai_ops bcm2835_i2s_dai_ops = { | ||
689 | .startup = bcm2835_i2s_startup, | ||
690 | .shutdown = bcm2835_i2s_shutdown, | ||
691 | .prepare = bcm2835_i2s_prepare, | ||
692 | .trigger = bcm2835_i2s_trigger, | ||
693 | .hw_params = bcm2835_i2s_hw_params, | ||
694 | .set_fmt = bcm2835_i2s_set_dai_fmt, | ||
695 | .set_bclk_ratio = bcm2835_i2s_set_dai_bclk_ratio | ||
696 | }; | ||
697 | |||
698 | static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai) | ||
699 | { | ||
700 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | ||
701 | |||
702 | snd_soc_dai_init_dma_data(dai, | ||
703 | &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK], | ||
704 | &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE]); | ||
705 | |||
706 | return 0; | ||
707 | } | ||
708 | |||
709 | static struct snd_soc_dai_driver bcm2835_i2s_dai = { | ||
710 | .name = "bcm2835-i2s", | ||
711 | .probe = bcm2835_i2s_dai_probe, | ||
712 | .playback = { | ||
713 | .channels_min = 2, | ||
714 | .channels_max = 2, | ||
715 | .rates = SNDRV_PCM_RATE_8000_192000, | ||
716 | .formats = SNDRV_PCM_FMTBIT_S16_LE | ||
717 | | SNDRV_PCM_FMTBIT_S32_LE | ||
718 | }, | ||
719 | .capture = { | ||
720 | .channels_min = 2, | ||
721 | .channels_max = 2, | ||
722 | .rates = SNDRV_PCM_RATE_8000_192000, | ||
723 | .formats = SNDRV_PCM_FMTBIT_S16_LE | ||
724 | | SNDRV_PCM_FMTBIT_S32_LE | ||
725 | }, | ||
726 | .ops = &bcm2835_i2s_dai_ops, | ||
727 | .symmetric_rates = 1 | ||
728 | }; | ||
729 | |||
730 | static bool bcm2835_i2s_volatile_reg(struct device *dev, unsigned int reg) | ||
731 | { | ||
732 | switch (reg) { | ||
733 | case BCM2835_I2S_CS_A_REG: | ||
734 | case BCM2835_I2S_FIFO_A_REG: | ||
735 | case BCM2835_I2S_INTSTC_A_REG: | ||
736 | case BCM2835_I2S_GRAY_REG: | ||
737 | return true; | ||
738 | default: | ||
739 | return false; | ||
740 | }; | ||
741 | } | ||
742 | |||
743 | static bool bcm2835_i2s_precious_reg(struct device *dev, unsigned int reg) | ||
744 | { | ||
745 | switch (reg) { | ||
746 | case BCM2835_I2S_FIFO_A_REG: | ||
747 | return true; | ||
748 | default: | ||
749 | return false; | ||
750 | }; | ||
751 | } | ||
752 | |||
753 | static bool bcm2835_clk_volatile_reg(struct device *dev, unsigned int reg) | ||
754 | { | ||
755 | switch (reg) { | ||
756 | case BCM2835_CLK_PCMCTL_REG: | ||
757 | return true; | ||
758 | default: | ||
759 | return false; | ||
760 | }; | ||
761 | } | ||
762 | |||
763 | static const struct regmap_config bcm2835_regmap_config[] = { | ||
764 | { | ||
765 | .reg_bits = 32, | ||
766 | .reg_stride = 4, | ||
767 | .val_bits = 32, | ||
768 | .max_register = BCM2835_I2S_GRAY_REG, | ||
769 | .precious_reg = bcm2835_i2s_precious_reg, | ||
770 | .volatile_reg = bcm2835_i2s_volatile_reg, | ||
771 | .cache_type = REGCACHE_RBTREE, | ||
772 | }, | ||
773 | { | ||
774 | .reg_bits = 32, | ||
775 | .reg_stride = 4, | ||
776 | .val_bits = 32, | ||
777 | .max_register = BCM2835_CLK_PCMDIV_REG, | ||
778 | .volatile_reg = bcm2835_clk_volatile_reg, | ||
779 | .cache_type = REGCACHE_RBTREE, | ||
780 | }, | ||
781 | }; | ||
782 | |||
783 | static const struct snd_soc_component_driver bcm2835_i2s_component = { | ||
784 | .name = "bcm2835-i2s-comp", | ||
785 | }; | ||
786 | |||
787 | static int bcm2835_i2s_probe(struct platform_device *pdev) | ||
788 | { | ||
789 | struct bcm2835_i2s_dev *dev; | ||
790 | int i; | ||
791 | int ret; | ||
792 | struct regmap *regmap[2]; | ||
793 | struct resource *mem[2]; | ||
794 | |||
795 | /* Request both ioareas */ | ||
796 | for (i = 0; i <= 1; i++) { | ||
797 | void __iomem *base; | ||
798 | |||
799 | mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i); | ||
800 | base = devm_ioremap_resource(&pdev->dev, mem[i]); | ||
801 | if (IS_ERR(base)) | ||
802 | return PTR_ERR(base); | ||
803 | |||
804 | regmap[i] = devm_regmap_init_mmio(&pdev->dev, base, | ||
805 | &bcm2835_regmap_config[i]); | ||
806 | if (IS_ERR(regmap[i])) | ||
807 | return PTR_ERR(regmap[i]); | ||
808 | } | ||
809 | |||
810 | dev = devm_kzalloc(&pdev->dev, sizeof(*dev), | ||
811 | GFP_KERNEL); | ||
812 | if (!dev) | ||
813 | return -ENOMEM; | ||
814 | |||
815 | dev->i2s_regmap = regmap[0]; | ||
816 | dev->clk_regmap = regmap[1]; | ||
817 | |||
818 | /* Set the DMA address */ | ||
819 | dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = | ||
820 | (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG | ||
821 | + BCM2835_VCMMU_SHIFT; | ||
822 | |||
823 | dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = | ||
824 | (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG | ||
825 | + BCM2835_VCMMU_SHIFT; | ||
826 | |||
827 | /* Set the bus width */ | ||
828 | dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr_width = | ||
829 | DMA_SLAVE_BUSWIDTH_4_BYTES; | ||
830 | dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr_width = | ||
831 | DMA_SLAVE_BUSWIDTH_4_BYTES; | ||
832 | |||
833 | /* Set burst */ | ||
834 | dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].maxburst = 2; | ||
835 | dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].maxburst = 2; | ||
836 | |||
837 | /* BCLK ratio - use default */ | ||
838 | dev->bclk_ratio = 0; | ||
839 | |||
840 | /* Store the pdev */ | ||
841 | dev->dev = &pdev->dev; | ||
842 | dev_set_drvdata(&pdev->dev, dev); | ||
843 | |||
844 | ret = devm_snd_soc_register_component(&pdev->dev, | ||
845 | &bcm2835_i2s_component, &bcm2835_i2s_dai, 1); | ||
846 | if (ret) { | ||
847 | dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); | ||
848 | return ret; | ||
849 | } | ||
850 | |||
851 | ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); | ||
852 | if (ret) { | ||
853 | dev_err(&pdev->dev, "Could not register PCM: %d\n", ret); | ||
854 | return ret; | ||
855 | } | ||
856 | |||
857 | return 0; | ||
858 | } | ||
859 | |||
860 | static const struct of_device_id bcm2835_i2s_of_match[] = { | ||
861 | { .compatible = "brcm,bcm2835-i2s", }, | ||
862 | {}, | ||
863 | }; | ||
864 | |||
865 | static struct platform_driver bcm2835_i2s_driver = { | ||
866 | .probe = bcm2835_i2s_probe, | ||
867 | .driver = { | ||
868 | .name = "bcm2835-i2s", | ||
869 | .owner = THIS_MODULE, | ||
870 | .of_match_table = bcm2835_i2s_of_match, | ||
871 | }, | ||
872 | }; | ||
873 | |||
874 | module_platform_driver(bcm2835_i2s_driver); | ||
875 | |||
876 | MODULE_ALIAS("platform:bcm2835-i2s"); | ||
877 | MODULE_DESCRIPTION("BCM2835 I2S interface"); | ||
878 | MODULE_AUTHOR("Florian Meier <florian.meier@koalo.de>"); | ||
879 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/sound/soc/blackfin/bf5xx-ac97-pcm.c b/sound/soc/blackfin/bf5xx-ac97-pcm.c index 1d4c676eb6cc..cdb8ee75ded9 100644 --- a/sound/soc/blackfin/bf5xx-ac97-pcm.c +++ b/sound/soc/blackfin/bf5xx-ac97-pcm.c | |||
@@ -107,7 +107,6 @@ static const struct snd_pcm_hardware bf5xx_pcm_hardware = { | |||
107 | #endif | 107 | #endif |
108 | SNDRV_PCM_INFO_BLOCK_TRANSFER, | 108 | SNDRV_PCM_INFO_BLOCK_TRANSFER, |
109 | 109 | ||
110 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
111 | .period_bytes_min = 32, | 110 | .period_bytes_min = 32, |
112 | .period_bytes_max = 0x10000, | 111 | .period_bytes_max = 0x10000, |
113 | .periods_min = 1, | 112 | .periods_min = 1, |
diff --git a/sound/soc/blackfin/bf5xx-i2s-pcm.c b/sound/soc/blackfin/bf5xx-i2s-pcm.c index 2a5b43417fd5..a3881c4381c9 100644 --- a/sound/soc/blackfin/bf5xx-i2s-pcm.c +++ b/sound/soc/blackfin/bf5xx-i2s-pcm.c | |||
@@ -52,9 +52,6 @@ static const struct snd_pcm_hardware bf5xx_pcm_hardware = { | |||
52 | .info = SNDRV_PCM_INFO_INTERLEAVED | | 52 | .info = SNDRV_PCM_INFO_INTERLEAVED | |
53 | SNDRV_PCM_INFO_MMAP_VALID | | 53 | SNDRV_PCM_INFO_MMAP_VALID | |
54 | SNDRV_PCM_INFO_BLOCK_TRANSFER, | 54 | SNDRV_PCM_INFO_BLOCK_TRANSFER, |
55 | .formats = SNDRV_PCM_FMTBIT_S16_LE | | ||
56 | SNDRV_PCM_FMTBIT_S24_LE | | ||
57 | SNDRV_PCM_FMTBIT_S32_LE, | ||
58 | .period_bytes_min = 32, | 55 | .period_bytes_min = 32, |
59 | .period_bytes_max = 0x10000, | 56 | .period_bytes_max = 0x10000, |
60 | .periods_min = 1, | 57 | .periods_min = 1, |
diff --git a/sound/soc/cirrus/edb93xx.c b/sound/soc/cirrus/edb93xx.c index c43fb214558a..4f900efc437c 100644 --- a/sound/soc/cirrus/edb93xx.c +++ b/sound/soc/cirrus/edb93xx.c | |||
@@ -63,7 +63,7 @@ static struct snd_soc_ops edb93xx_ops = { | |||
63 | static struct snd_soc_dai_link edb93xx_dai = { | 63 | static struct snd_soc_dai_link edb93xx_dai = { |
64 | .name = "CS4271", | 64 | .name = "CS4271", |
65 | .stream_name = "CS4271 HiFi", | 65 | .stream_name = "CS4271 HiFi", |
66 | .platform_name = "ep93xx-pcm-audio", | 66 | .platform_name = "ep93xx-i2s", |
67 | .cpu_dai_name = "ep93xx-i2s", | 67 | .cpu_dai_name = "ep93xx-i2s", |
68 | .codec_name = "spi0.0", | 68 | .codec_name = "spi0.0", |
69 | .codec_dai_name = "cs4271-hifi", | 69 | .codec_dai_name = "cs4271-hifi", |
diff --git a/sound/soc/cirrus/ep93xx-ac97.c b/sound/soc/cirrus/ep93xx-ac97.c index efa75b5086a4..f30dadf85b99 100644 --- a/sound/soc/cirrus/ep93xx-ac97.c +++ b/sound/soc/cirrus/ep93xx-ac97.c | |||
@@ -19,11 +19,14 @@ | |||
19 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
20 | 20 | ||
21 | #include <sound/core.h> | 21 | #include <sound/core.h> |
22 | #include <sound/dmaengine_pcm.h> | ||
22 | #include <sound/ac97_codec.h> | 23 | #include <sound/ac97_codec.h> |
23 | #include <sound/soc.h> | 24 | #include <sound/soc.h> |
24 | 25 | ||
25 | #include <linux/platform_data/dma-ep93xx.h> | 26 | #include <linux/platform_data/dma-ep93xx.h> |
26 | 27 | ||
28 | #include "ep93xx-pcm.h" | ||
29 | |||
27 | /* | 30 | /* |
28 | * Per channel (1-4) registers. | 31 | * Per channel (1-4) registers. |
29 | */ | 32 | */ |
@@ -95,6 +98,8 @@ struct ep93xx_ac97_info { | |||
95 | struct device *dev; | 98 | struct device *dev; |
96 | void __iomem *regs; | 99 | void __iomem *regs; |
97 | struct completion done; | 100 | struct completion done; |
101 | struct snd_dmaengine_dai_dma_data dma_params_rx; | ||
102 | struct snd_dmaengine_dai_dma_data dma_params_tx; | ||
98 | }; | 103 | }; |
99 | 104 | ||
100 | /* currently ALSA only supports a single AC97 device */ | 105 | /* currently ALSA only supports a single AC97 device */ |
@@ -315,8 +320,13 @@ static int ep93xx_ac97_trigger(struct snd_pcm_substream *substream, | |||
315 | 320 | ||
316 | static int ep93xx_ac97_dai_probe(struct snd_soc_dai *dai) | 321 | static int ep93xx_ac97_dai_probe(struct snd_soc_dai *dai) |
317 | { | 322 | { |
318 | dai->playback_dma_data = &ep93xx_ac97_pcm_out; | 323 | struct ep93xx_ac97_info *info = snd_soc_dai_get_drvdata(dai); |
319 | dai->capture_dma_data = &ep93xx_ac97_pcm_in; | 324 | |
325 | info->dma_params_tx.filter_data = &ep93xx_ac97_pcm_out; | ||
326 | info->dma_params_rx.filter_data = &ep93xx_ac97_pcm_in; | ||
327 | |||
328 | dai->playback_dma_data = &info->dma_params_tx; | ||
329 | dai->capture_dma_data = &info->dma_params_rx; | ||
320 | 330 | ||
321 | return 0; | 331 | return 0; |
322 | } | 332 | } |
@@ -394,8 +404,14 @@ static int ep93xx_ac97_probe(struct platform_device *pdev) | |||
394 | if (ret) | 404 | if (ret) |
395 | goto fail; | 405 | goto fail; |
396 | 406 | ||
407 | ret = devm_ep93xx_pcm_platform_register(&pdev->dev); | ||
408 | if (ret) | ||
409 | goto fail_unregister; | ||
410 | |||
397 | return 0; | 411 | return 0; |
398 | 412 | ||
413 | fail_unregister: | ||
414 | snd_soc_unregister_component(&pdev->dev); | ||
399 | fail: | 415 | fail: |
400 | ep93xx_ac97_info = NULL; | 416 | ep93xx_ac97_info = NULL; |
401 | snd_soc_set_ac97_ops(NULL); | 417 | snd_soc_set_ac97_ops(NULL); |
diff --git a/sound/soc/cirrus/ep93xx-i2s.c b/sound/soc/cirrus/ep93xx-i2s.c index a57643d6402f..943145f9d1b6 100644 --- a/sound/soc/cirrus/ep93xx-i2s.c +++ b/sound/soc/cirrus/ep93xx-i2s.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | 22 | ||
23 | #include <sound/core.h> | 23 | #include <sound/core.h> |
24 | #include <sound/dmaengine_pcm.h> | ||
24 | #include <sound/pcm.h> | 25 | #include <sound/pcm.h> |
25 | #include <sound/pcm_params.h> | 26 | #include <sound/pcm_params.h> |
26 | #include <sound/initval.h> | 27 | #include <sound/initval.h> |
@@ -30,6 +31,8 @@ | |||
30 | #include <mach/ep93xx-regs.h> | 31 | #include <mach/ep93xx-regs.h> |
31 | #include <linux/platform_data/dma-ep93xx.h> | 32 | #include <linux/platform_data/dma-ep93xx.h> |
32 | 33 | ||
34 | #include "ep93xx-pcm.h" | ||
35 | |||
33 | #define EP93XX_I2S_TXCLKCFG 0x00 | 36 | #define EP93XX_I2S_TXCLKCFG 0x00 |
34 | #define EP93XX_I2S_RXCLKCFG 0x04 | 37 | #define EP93XX_I2S_RXCLKCFG 0x04 |
35 | #define EP93XX_I2S_GLCTRL 0x0C | 38 | #define EP93XX_I2S_GLCTRL 0x0C |
@@ -61,6 +64,8 @@ struct ep93xx_i2s_info { | |||
61 | struct clk *sclk; | 64 | struct clk *sclk; |
62 | struct clk *lrclk; | 65 | struct clk *lrclk; |
63 | void __iomem *regs; | 66 | void __iomem *regs; |
67 | struct snd_dmaengine_dai_dma_data dma_params_rx; | ||
68 | struct snd_dmaengine_dai_dma_data dma_params_tx; | ||
64 | }; | 69 | }; |
65 | 70 | ||
66 | static struct ep93xx_dma_data ep93xx_i2s_dma_data[] = { | 71 | static struct ep93xx_dma_data ep93xx_i2s_dma_data[] = { |
@@ -140,8 +145,15 @@ static void ep93xx_i2s_disable(struct ep93xx_i2s_info *info, int stream) | |||
140 | 145 | ||
141 | static int ep93xx_i2s_dai_probe(struct snd_soc_dai *dai) | 146 | static int ep93xx_i2s_dai_probe(struct snd_soc_dai *dai) |
142 | { | 147 | { |
143 | dai->playback_dma_data = &ep93xx_i2s_dma_data[SNDRV_PCM_STREAM_PLAYBACK]; | 148 | struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai); |
144 | dai->capture_dma_data = &ep93xx_i2s_dma_data[SNDRV_PCM_STREAM_CAPTURE]; | 149 | |
150 | info->dma_params_tx.filter_data = | ||
151 | &ep93xx_i2s_dma_data[SNDRV_PCM_STREAM_PLAYBACK]; | ||
152 | info->dma_params_rx.filter_data = | ||
153 | &ep93xx_i2s_dma_data[SNDRV_PCM_STREAM_CAPTURE]; | ||
154 | |||
155 | dai->playback_dma_data = &info->dma_params_tx; | ||
156 | dai->capture_dma_data = &info->dma_params_rx; | ||
145 | 157 | ||
146 | return 0; | 158 | return 0; |
147 | } | 159 | } |
@@ -405,8 +417,14 @@ static int ep93xx_i2s_probe(struct platform_device *pdev) | |||
405 | if (err) | 417 | if (err) |
406 | goto fail_put_lrclk; | 418 | goto fail_put_lrclk; |
407 | 419 | ||
420 | err = devm_ep93xx_pcm_platform_register(&pdev->dev); | ||
421 | if (err) | ||
422 | goto fail_unregister; | ||
423 | |||
408 | return 0; | 424 | return 0; |
409 | 425 | ||
426 | fail_unregister: | ||
427 | snd_soc_unregister_component(&pdev->dev); | ||
410 | fail_put_lrclk: | 428 | fail_put_lrclk: |
411 | clk_put(info->lrclk); | 429 | clk_put(info->lrclk); |
412 | fail_put_sclk: | 430 | fail_put_sclk: |
diff --git a/sound/soc/cirrus/ep93xx-pcm.c b/sound/soc/cirrus/ep93xx-pcm.c index cfe517e68009..5f664471d99e 100644 --- a/sound/soc/cirrus/ep93xx-pcm.c +++ b/sound/soc/cirrus/ep93xx-pcm.c | |||
@@ -23,20 +23,13 @@ | |||
23 | 23 | ||
24 | #include <linux/platform_data/dma-ep93xx.h> | 24 | #include <linux/platform_data/dma-ep93xx.h> |
25 | 25 | ||
26 | #include "ep93xx-pcm.h" | ||
27 | |||
26 | static const struct snd_pcm_hardware ep93xx_pcm_hardware = { | 28 | static const struct snd_pcm_hardware ep93xx_pcm_hardware = { |
27 | .info = (SNDRV_PCM_INFO_MMAP | | 29 | .info = (SNDRV_PCM_INFO_MMAP | |
28 | SNDRV_PCM_INFO_MMAP_VALID | | 30 | SNDRV_PCM_INFO_MMAP_VALID | |
29 | SNDRV_PCM_INFO_INTERLEAVED | | 31 | SNDRV_PCM_INFO_INTERLEAVED | |
30 | SNDRV_PCM_INFO_BLOCK_TRANSFER), | 32 | SNDRV_PCM_INFO_BLOCK_TRANSFER), |
31 | |||
32 | .rates = SNDRV_PCM_RATE_8000_192000, | ||
33 | .rate_min = SNDRV_PCM_RATE_8000, | ||
34 | .rate_max = SNDRV_PCM_RATE_192000, | ||
35 | |||
36 | .formats = (SNDRV_PCM_FMTBIT_S16_LE | | ||
37 | SNDRV_PCM_FMTBIT_S24_LE | | ||
38 | SNDRV_PCM_FMTBIT_S32_LE), | ||
39 | |||
40 | .buffer_bytes_max = 131072, | 33 | .buffer_bytes_max = 131072, |
41 | .period_bytes_min = 32, | 34 | .period_bytes_min = 32, |
42 | .period_bytes_max = 32768, | 35 | .period_bytes_max = 32768, |
@@ -57,53 +50,22 @@ static bool ep93xx_pcm_dma_filter(struct dma_chan *chan, void *filter_param) | |||
57 | return false; | 50 | return false; |
58 | } | 51 | } |
59 | 52 | ||
60 | static struct dma_chan *ep93xx_compat_request_channel( | ||
61 | struct snd_soc_pcm_runtime *rtd, | ||
62 | struct snd_pcm_substream *substream) | ||
63 | { | ||
64 | struct snd_dmaengine_dai_dma_data *dma_data; | ||
65 | |||
66 | dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | ||
67 | |||
68 | return snd_dmaengine_pcm_request_channel(ep93xx_pcm_dma_filter, | ||
69 | dma_data); | ||
70 | } | ||
71 | |||
72 | static const struct snd_dmaengine_pcm_config ep93xx_dmaengine_pcm_config = { | 53 | static const struct snd_dmaengine_pcm_config ep93xx_dmaengine_pcm_config = { |
73 | .pcm_hardware = &ep93xx_pcm_hardware, | 54 | .pcm_hardware = &ep93xx_pcm_hardware, |
74 | .compat_filter_fn = ep93xx_pcm_dma_filter, | 55 | .compat_filter_fn = ep93xx_pcm_dma_filter, |
75 | .compat_request_channel = ep93xx_compat_request_channel, | ||
76 | .prealloc_buffer_size = 131072, | 56 | .prealloc_buffer_size = 131072, |
77 | }; | 57 | }; |
78 | 58 | ||
79 | static int ep93xx_soc_platform_probe(struct platform_device *pdev) | 59 | int devm_ep93xx_pcm_platform_register(struct device *dev) |
80 | { | 60 | { |
81 | return snd_dmaengine_pcm_register(&pdev->dev, | 61 | return devm_snd_dmaengine_pcm_register(dev, |
82 | &ep93xx_dmaengine_pcm_config, | 62 | &ep93xx_dmaengine_pcm_config, |
83 | SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | | 63 | SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | |
84 | SND_DMAENGINE_PCM_FLAG_NO_DT | | 64 | SND_DMAENGINE_PCM_FLAG_NO_DT | |
85 | SND_DMAENGINE_PCM_FLAG_COMPAT); | 65 | SND_DMAENGINE_PCM_FLAG_COMPAT); |
86 | } | 66 | } |
87 | 67 | EXPORT_SYMBOL_GPL(devm_ep93xx_pcm_platform_register); | |
88 | static int ep93xx_soc_platform_remove(struct platform_device *pdev) | ||
89 | { | ||
90 | snd_dmaengine_pcm_unregister(&pdev->dev); | ||
91 | return 0; | ||
92 | } | ||
93 | |||
94 | static struct platform_driver ep93xx_pcm_driver = { | ||
95 | .driver = { | ||
96 | .name = "ep93xx-pcm-audio", | ||
97 | .owner = THIS_MODULE, | ||
98 | }, | ||
99 | |||
100 | .probe = ep93xx_soc_platform_probe, | ||
101 | .remove = ep93xx_soc_platform_remove, | ||
102 | }; | ||
103 | |||
104 | module_platform_driver(ep93xx_pcm_driver); | ||
105 | 68 | ||
106 | MODULE_AUTHOR("Ryan Mallon"); | 69 | MODULE_AUTHOR("Ryan Mallon"); |
107 | MODULE_DESCRIPTION("EP93xx ALSA PCM interface"); | 70 | MODULE_DESCRIPTION("EP93xx ALSA PCM interface"); |
108 | MODULE_LICENSE("GPL"); | 71 | MODULE_LICENSE("GPL"); |
109 | MODULE_ALIAS("platform:ep93xx-pcm-audio"); | ||
diff --git a/sound/soc/cirrus/ep93xx-pcm.h b/sound/soc/cirrus/ep93xx-pcm.h new file mode 100644 index 000000000000..b7a12a2fae9c --- /dev/null +++ b/sound/soc/cirrus/ep93xx-pcm.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #ifndef __EP93XX_PCM_H__ | ||
18 | #define __EP93XX_PCM_H__ | ||
19 | |||
20 | int devm_ep93xx_pcm_platform_register(struct device *dev); | ||
21 | |||
22 | #endif | ||
diff --git a/sound/soc/cirrus/simone.c b/sound/soc/cirrus/simone.c index 4d094d00c34a..822a19a89e74 100644 --- a/sound/soc/cirrus/simone.c +++ b/sound/soc/cirrus/simone.c | |||
@@ -27,7 +27,7 @@ static struct snd_soc_dai_link simone_dai = { | |||
27 | .cpu_dai_name = "ep93xx-ac97", | 27 | .cpu_dai_name = "ep93xx-ac97", |
28 | .codec_dai_name = "ac97-hifi", | 28 | .codec_dai_name = "ac97-hifi", |
29 | .codec_name = "ac97-codec", | 29 | .codec_name = "ac97-codec", |
30 | .platform_name = "ep93xx-pcm-audio", | 30 | .platform_name = "ep93xx-ac97", |
31 | }; | 31 | }; |
32 | 32 | ||
33 | static struct snd_soc_card snd_soc_simone = { | 33 | static struct snd_soc_card snd_soc_simone = { |
diff --git a/sound/soc/cirrus/snappercl15.c b/sound/soc/cirrus/snappercl15.c index 69041074f2c1..29238a7476dd 100644 --- a/sound/soc/cirrus/snappercl15.c +++ b/sound/soc/cirrus/snappercl15.c | |||
@@ -83,7 +83,7 @@ static struct snd_soc_dai_link snappercl15_dai = { | |||
83 | .cpu_dai_name = "ep93xx-i2s", | 83 | .cpu_dai_name = "ep93xx-i2s", |
84 | .codec_dai_name = "tlv320aic23-hifi", | 84 | .codec_dai_name = "tlv320aic23-hifi", |
85 | .codec_name = "tlv320aic23-codec.0-001a", | 85 | .codec_name = "tlv320aic23-codec.0-001a", |
86 | .platform_name = "ep93xx-pcm-audio", | 86 | .platform_name = "ep93xx-i2s", |
87 | .init = snappercl15_tlv320aic23_init, | 87 | .init = snappercl15_tlv320aic23_init, |
88 | .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | | 88 | .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | |
89 | SND_SOC_DAIFMT_CBS_CFS, | 89 | SND_SOC_DAIFMT_CBS_CFS, |
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index b33b45dfceec..983d087aa92a 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig | |||
@@ -163,8 +163,10 @@ config SND_SOC_WM_HUBS | |||
163 | config SND_SOC_WM_ADSP | 163 | config SND_SOC_WM_ADSP |
164 | tristate | 164 | tristate |
165 | default y if SND_SOC_WM5102=y | 165 | default y if SND_SOC_WM5102=y |
166 | default y if SND_SOC_WM5110=y | ||
166 | default y if SND_SOC_WM2200=y | 167 | default y if SND_SOC_WM2200=y |
167 | default m if SND_SOC_WM5102=m | 168 | default m if SND_SOC_WM5102=m |
169 | default m if SND_SOC_WM5110=m | ||
168 | default m if SND_SOC_WM2200=m | 170 | default m if SND_SOC_WM2200=m |
169 | 171 | ||
170 | config SND_SOC_AB8500_CODEC | 172 | config SND_SOC_AB8500_CODEC |
diff --git a/sound/soc/codecs/ad1836.c b/sound/soc/codecs/ad1836.c index 9a92b7962f41..77f459868579 100644 --- a/sound/soc/codecs/ad1836.c +++ b/sound/soc/codecs/ad1836.c | |||
@@ -168,17 +168,19 @@ static int ad1836_hw_params(struct snd_pcm_substream *substream, | |||
168 | int word_len = 0; | 168 | int word_len = 0; |
169 | 169 | ||
170 | /* bit size */ | 170 | /* bit size */ |
171 | switch (params_format(params)) { | 171 | switch (params_width(params)) { |
172 | case SNDRV_PCM_FORMAT_S16_LE: | 172 | case 16: |
173 | word_len = AD1836_WORD_LEN_16; | 173 | word_len = AD1836_WORD_LEN_16; |
174 | break; | 174 | break; |
175 | case SNDRV_PCM_FORMAT_S20_3LE: | 175 | case 20: |
176 | word_len = AD1836_WORD_LEN_20; | 176 | word_len = AD1836_WORD_LEN_20; |
177 | break; | 177 | break; |
178 | case SNDRV_PCM_FORMAT_S24_LE: | 178 | case 24: |
179 | case SNDRV_PCM_FORMAT_S32_LE: | 179 | case 32: |
180 | word_len = AD1836_WORD_LEN_24; | 180 | word_len = AD1836_WORD_LEN_24; |
181 | break; | 181 | break; |
182 | default: | ||
183 | return -EINVAL; | ||
182 | } | 184 | } |
183 | 185 | ||
184 | regmap_update_bits(ad1836->regmap, AD1836_DAC_CTRL1, | 186 | regmap_update_bits(ad1836->regmap, AD1836_DAC_CTRL1, |
diff --git a/sound/soc/codecs/ad193x.c b/sound/soc/codecs/ad193x.c index aea7e52cf714..5a42dca535b7 100644 --- a/sound/soc/codecs/ad193x.c +++ b/sound/soc/codecs/ad193x.c | |||
@@ -249,15 +249,15 @@ static int ad193x_hw_params(struct snd_pcm_substream *substream, | |||
249 | struct ad193x_priv *ad193x = snd_soc_codec_get_drvdata(codec); | 249 | struct ad193x_priv *ad193x = snd_soc_codec_get_drvdata(codec); |
250 | 250 | ||
251 | /* bit size */ | 251 | /* bit size */ |
252 | switch (params_format(params)) { | 252 | switch (params_width(params)) { |
253 | case SNDRV_PCM_FORMAT_S16_LE: | 253 | case 16: |
254 | word_len = 3; | 254 | word_len = 3; |
255 | break; | 255 | break; |
256 | case SNDRV_PCM_FORMAT_S20_3LE: | 256 | case 20: |
257 | word_len = 1; | 257 | word_len = 1; |
258 | break; | 258 | break; |
259 | case SNDRV_PCM_FORMAT_S24_LE: | 259 | case 24: |
260 | case SNDRV_PCM_FORMAT_S32_LE: | 260 | case 32: |
261 | word_len = 0; | 261 | word_len = 0; |
262 | break; | 262 | break; |
263 | } | 263 | } |
@@ -413,7 +413,7 @@ static struct spi_driver ad193x_spi_driver = { | |||
413 | }; | 413 | }; |
414 | #endif | 414 | #endif |
415 | 415 | ||
416 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 416 | #if IS_ENABLED(CONFIG_I2C) |
417 | 417 | ||
418 | static const struct regmap_config ad193x_i2c_regmap_config = { | 418 | static const struct regmap_config ad193x_i2c_regmap_config = { |
419 | .val_bits = 8, | 419 | .val_bits = 8, |
@@ -470,7 +470,7 @@ static int __init ad193x_modinit(void) | |||
470 | { | 470 | { |
471 | int ret; | 471 | int ret; |
472 | 472 | ||
473 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 473 | #if IS_ENABLED(CONFIG_I2C) |
474 | ret = i2c_add_driver(&ad193x_i2c_driver); | 474 | ret = i2c_add_driver(&ad193x_i2c_driver); |
475 | if (ret != 0) { | 475 | if (ret != 0) { |
476 | printk(KERN_ERR "Failed to register AD193X I2C driver: %d\n", | 476 | printk(KERN_ERR "Failed to register AD193X I2C driver: %d\n", |
@@ -495,7 +495,7 @@ static void __exit ad193x_modexit(void) | |||
495 | spi_unregister_driver(&ad193x_spi_driver); | 495 | spi_unregister_driver(&ad193x_spi_driver); |
496 | #endif | 496 | #endif |
497 | 497 | ||
498 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 498 | #if IS_ENABLED(CONFIG_I2C) |
499 | i2c_del_driver(&ad193x_i2c_driver); | 499 | i2c_del_driver(&ad193x_i2c_driver); |
500 | #endif | 500 | #endif |
501 | } | 501 | } |
diff --git a/sound/soc/codecs/adau1373.c b/sound/soc/codecs/adau1373.c index 59654b1e7f3f..eb836ed5271f 100644 --- a/sound/soc/codecs/adau1373.c +++ b/sound/soc/codecs/adau1373.c | |||
@@ -1078,17 +1078,17 @@ static int adau1373_hw_params(struct snd_pcm_substream *substream, | |||
1078 | ADAU1373_BCLKDIV_SR_MASK | ADAU1373_BCLKDIV_BCLK_MASK, | 1078 | ADAU1373_BCLKDIV_SR_MASK | ADAU1373_BCLKDIV_BCLK_MASK, |
1079 | (div << 2) | ADAU1373_BCLKDIV_64); | 1079 | (div << 2) | ADAU1373_BCLKDIV_64); |
1080 | 1080 | ||
1081 | switch (params_format(params)) { | 1081 | switch (params_width(params)) { |
1082 | case SNDRV_PCM_FORMAT_S16_LE: | 1082 | case 16: |
1083 | ctrl = ADAU1373_DAI_WLEN_16; | 1083 | ctrl = ADAU1373_DAI_WLEN_16; |
1084 | break; | 1084 | break; |
1085 | case SNDRV_PCM_FORMAT_S20_3LE: | 1085 | case 20: |
1086 | ctrl = ADAU1373_DAI_WLEN_20; | 1086 | ctrl = ADAU1373_DAI_WLEN_20; |
1087 | break; | 1087 | break; |
1088 | case SNDRV_PCM_FORMAT_S24_LE: | 1088 | case 24: |
1089 | ctrl = ADAU1373_DAI_WLEN_24; | 1089 | ctrl = ADAU1373_DAI_WLEN_24; |
1090 | break; | 1090 | break; |
1091 | case SNDRV_PCM_FORMAT_S32_LE: | 1091 | case 32: |
1092 | ctrl = ADAU1373_DAI_WLEN_32; | 1092 | ctrl = ADAU1373_DAI_WLEN_32; |
1093 | break; | 1093 | break; |
1094 | default: | 1094 | default: |
diff --git a/sound/soc/codecs/adau1701.c b/sound/soc/codecs/adau1701.c index ebff1128be59..d71c59cf7bdd 100644 --- a/sound/soc/codecs/adau1701.c +++ b/sound/soc/codecs/adau1701.c | |||
@@ -71,7 +71,7 @@ | |||
71 | 71 | ||
72 | #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000 | 72 | #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000 |
73 | #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001 | 73 | #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001 |
74 | #define ADAU1701_SEROCTL_WORD_LEN_16 0x0010 | 74 | #define ADAU1701_SEROCTL_WORD_LEN_16 0x0002 |
75 | #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003 | 75 | #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003 |
76 | 76 | ||
77 | #define ADAU1701_AUXNPOW_VBPD 0x40 | 77 | #define ADAU1701_AUXNPOW_VBPD 0x40 |
@@ -299,20 +299,20 @@ static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv) | |||
299 | } | 299 | } |
300 | 300 | ||
301 | static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, | 301 | static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, |
302 | snd_pcm_format_t format) | 302 | struct snd_pcm_hw_params *params) |
303 | { | 303 | { |
304 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); | 304 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
305 | unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK; | 305 | unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK; |
306 | unsigned int val; | 306 | unsigned int val; |
307 | 307 | ||
308 | switch (format) { | 308 | switch (params_width(params)) { |
309 | case SNDRV_PCM_FORMAT_S16_LE: | 309 | case 16: |
310 | val = ADAU1701_SEROCTL_WORD_LEN_16; | 310 | val = ADAU1701_SEROCTL_WORD_LEN_16; |
311 | break; | 311 | break; |
312 | case SNDRV_PCM_FORMAT_S20_3LE: | 312 | case 20: |
313 | val = ADAU1701_SEROCTL_WORD_LEN_20; | 313 | val = ADAU1701_SEROCTL_WORD_LEN_20; |
314 | break; | 314 | break; |
315 | case SNDRV_PCM_FORMAT_S24_LE: | 315 | case 24: |
316 | val = ADAU1701_SEROCTL_WORD_LEN_24; | 316 | val = ADAU1701_SEROCTL_WORD_LEN_24; |
317 | break; | 317 | break; |
318 | default: | 318 | default: |
@@ -320,14 +320,14 @@ static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, | |||
320 | } | 320 | } |
321 | 321 | ||
322 | if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) { | 322 | if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) { |
323 | switch (format) { | 323 | switch (params_width(params)) { |
324 | case SNDRV_PCM_FORMAT_S16_LE: | 324 | case 16: |
325 | val |= ADAU1701_SEROCTL_MSB_DEALY16; | 325 | val |= ADAU1701_SEROCTL_MSB_DEALY16; |
326 | break; | 326 | break; |
327 | case SNDRV_PCM_FORMAT_S20_3LE: | 327 | case 20: |
328 | val |= ADAU1701_SEROCTL_MSB_DEALY12; | 328 | val |= ADAU1701_SEROCTL_MSB_DEALY12; |
329 | break; | 329 | break; |
330 | case SNDRV_PCM_FORMAT_S24_LE: | 330 | case 24: |
331 | val |= ADAU1701_SEROCTL_MSB_DEALY8; | 331 | val |= ADAU1701_SEROCTL_MSB_DEALY8; |
332 | break; | 332 | break; |
333 | } | 333 | } |
@@ -340,7 +340,7 @@ static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, | |||
340 | } | 340 | } |
341 | 341 | ||
342 | static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec, | 342 | static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec, |
343 | snd_pcm_format_t format) | 343 | struct snd_pcm_hw_params *params) |
344 | { | 344 | { |
345 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); | 345 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
346 | unsigned int val; | 346 | unsigned int val; |
@@ -348,14 +348,14 @@ static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec, | |||
348 | if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J) | 348 | if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J) |
349 | return 0; | 349 | return 0; |
350 | 350 | ||
351 | switch (format) { | 351 | switch (params_width(params)) { |
352 | case SNDRV_PCM_FORMAT_S16_LE: | 352 | case 16: |
353 | val = ADAU1701_SERICTL_RIGHTJ_16; | 353 | val = ADAU1701_SERICTL_RIGHTJ_16; |
354 | break; | 354 | break; |
355 | case SNDRV_PCM_FORMAT_S20_3LE: | 355 | case 20: |
356 | val = ADAU1701_SERICTL_RIGHTJ_20; | 356 | val = ADAU1701_SERICTL_RIGHTJ_20; |
357 | break; | 357 | break; |
358 | case SNDRV_PCM_FORMAT_S24_LE: | 358 | case 24: |
359 | val = ADAU1701_SERICTL_RIGHTJ_24; | 359 | val = ADAU1701_SERICTL_RIGHTJ_24; |
360 | break; | 360 | break; |
361 | default: | 361 | default: |
@@ -374,7 +374,6 @@ static int adau1701_hw_params(struct snd_pcm_substream *substream, | |||
374 | struct snd_soc_codec *codec = dai->codec; | 374 | struct snd_soc_codec *codec = dai->codec; |
375 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); | 375 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
376 | unsigned int clkdiv = adau1701->sysclk / params_rate(params); | 376 | unsigned int clkdiv = adau1701->sysclk / params_rate(params); |
377 | snd_pcm_format_t format; | ||
378 | unsigned int val; | 377 | unsigned int val; |
379 | int ret; | 378 | int ret; |
380 | 379 | ||
@@ -406,11 +405,10 @@ static int adau1701_hw_params(struct snd_pcm_substream *substream, | |||
406 | regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, | 405 | regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, |
407 | ADAU1701_DSPCTRL_SR_MASK, val); | 406 | ADAU1701_DSPCTRL_SR_MASK, val); |
408 | 407 | ||
409 | format = params_format(params); | ||
410 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 408 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
411 | return adau1701_set_playback_pcm_format(codec, format); | 409 | return adau1701_set_playback_pcm_format(codec, params); |
412 | else | 410 | else |
413 | return adau1701_set_capture_pcm_format(codec, format); | 411 | return adau1701_set_capture_pcm_format(codec, params); |
414 | } | 412 | } |
415 | 413 | ||
416 | static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai, | 414 | static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai, |
diff --git a/sound/soc/codecs/adav80x.c b/sound/soc/codecs/adav80x.c index 14a7c169d004..f78b27a7c461 100644 --- a/sound/soc/codecs/adav80x.c +++ b/sound/soc/codecs/adav80x.c | |||
@@ -453,22 +453,22 @@ static int adav80x_set_dac_clock(struct snd_soc_codec *codec, | |||
453 | } | 453 | } |
454 | 454 | ||
455 | static int adav80x_set_capture_pcm_format(struct snd_soc_codec *codec, | 455 | static int adav80x_set_capture_pcm_format(struct snd_soc_codec *codec, |
456 | struct snd_soc_dai *dai, snd_pcm_format_t format) | 456 | struct snd_soc_dai *dai, struct snd_pcm_hw_params *params) |
457 | { | 457 | { |
458 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | 458 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); |
459 | unsigned int val; | 459 | unsigned int val; |
460 | 460 | ||
461 | switch (format) { | 461 | switch (params_width(params)) { |
462 | case SNDRV_PCM_FORMAT_S16_LE: | 462 | case 16: |
463 | val = ADAV80X_CAPTURE_WORD_LEN16; | 463 | val = ADAV80X_CAPTURE_WORD_LEN16; |
464 | break; | 464 | break; |
465 | case SNDRV_PCM_FORMAT_S18_3LE: | 465 | case 18: |
466 | val = ADAV80X_CAPTRUE_WORD_LEN18; | 466 | val = ADAV80X_CAPTRUE_WORD_LEN18; |
467 | break; | 467 | break; |
468 | case SNDRV_PCM_FORMAT_S20_3LE: | 468 | case 20: |
469 | val = ADAV80X_CAPTURE_WORD_LEN20; | 469 | val = ADAV80X_CAPTURE_WORD_LEN20; |
470 | break; | 470 | break; |
471 | case SNDRV_PCM_FORMAT_S24_LE: | 471 | case 24: |
472 | val = ADAV80X_CAPTURE_WORD_LEN24; | 472 | val = ADAV80X_CAPTURE_WORD_LEN24; |
473 | break; | 473 | break; |
474 | default: | 474 | default: |
@@ -482,7 +482,7 @@ static int adav80x_set_capture_pcm_format(struct snd_soc_codec *codec, | |||
482 | } | 482 | } |
483 | 483 | ||
484 | static int adav80x_set_playback_pcm_format(struct snd_soc_codec *codec, | 484 | static int adav80x_set_playback_pcm_format(struct snd_soc_codec *codec, |
485 | struct snd_soc_dai *dai, snd_pcm_format_t format) | 485 | struct snd_soc_dai *dai, struct snd_pcm_hw_params *params) |
486 | { | 486 | { |
487 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | 487 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); |
488 | unsigned int val; | 488 | unsigned int val; |
@@ -490,17 +490,17 @@ static int adav80x_set_playback_pcm_format(struct snd_soc_codec *codec, | |||
490 | if (adav80x->dai_fmt[dai->id] != SND_SOC_DAIFMT_RIGHT_J) | 490 | if (adav80x->dai_fmt[dai->id] != SND_SOC_DAIFMT_RIGHT_J) |
491 | return 0; | 491 | return 0; |
492 | 492 | ||
493 | switch (format) { | 493 | switch (params_width(params)) { |
494 | case SNDRV_PCM_FORMAT_S16_LE: | 494 | case 16: |
495 | val = ADAV80X_PLAYBACK_MODE_RIGHT_J_16; | 495 | val = ADAV80X_PLAYBACK_MODE_RIGHT_J_16; |
496 | break; | 496 | break; |
497 | case SNDRV_PCM_FORMAT_S18_3LE: | 497 | case 18: |
498 | val = ADAV80X_PLAYBACK_MODE_RIGHT_J_18; | 498 | val = ADAV80X_PLAYBACK_MODE_RIGHT_J_18; |
499 | break; | 499 | break; |
500 | case SNDRV_PCM_FORMAT_S20_3LE: | 500 | case 20: |
501 | val = ADAV80X_PLAYBACK_MODE_RIGHT_J_20; | 501 | val = ADAV80X_PLAYBACK_MODE_RIGHT_J_20; |
502 | break; | 502 | break; |
503 | case SNDRV_PCM_FORMAT_S24_LE: | 503 | case 24: |
504 | val = ADAV80X_PLAYBACK_MODE_RIGHT_J_24; | 504 | val = ADAV80X_PLAYBACK_MODE_RIGHT_J_24; |
505 | break; | 505 | break; |
506 | default: | 506 | default: |
@@ -524,12 +524,10 @@ static int adav80x_hw_params(struct snd_pcm_substream *substream, | |||
524 | return -EINVAL; | 524 | return -EINVAL; |
525 | 525 | ||
526 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | 526 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
527 | adav80x_set_playback_pcm_format(codec, dai, | 527 | adav80x_set_playback_pcm_format(codec, dai, params); |
528 | params_format(params)); | ||
529 | adav80x_set_dac_clock(codec, rate); | 528 | adav80x_set_dac_clock(codec, rate); |
530 | } else { | 529 | } else { |
531 | adav80x_set_capture_pcm_format(codec, dai, | 530 | adav80x_set_capture_pcm_format(codec, dai, params); |
532 | params_format(params)); | ||
533 | adav80x_set_adc_clock(codec, rate); | 531 | adav80x_set_adc_clock(codec, rate); |
534 | } | 532 | } |
535 | adav80x->rate = rate; | 533 | adav80x->rate = rate; |
@@ -939,7 +937,7 @@ static struct spi_driver adav80x_spi_driver = { | |||
939 | }; | 937 | }; |
940 | #endif | 938 | #endif |
941 | 939 | ||
942 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 940 | #if IS_ENABLED(CONFIG_I2C) |
943 | static const struct regmap_config adav80x_i2c_regmap_config = { | 941 | static const struct regmap_config adav80x_i2c_regmap_config = { |
944 | .val_bits = 8, | 942 | .val_bits = 8, |
945 | .pad_bits = 1, | 943 | .pad_bits = 1, |
@@ -985,7 +983,7 @@ static int __init adav80x_init(void) | |||
985 | { | 983 | { |
986 | int ret = 0; | 984 | int ret = 0; |
987 | 985 | ||
988 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 986 | #if IS_ENABLED(CONFIG_I2C) |
989 | ret = i2c_add_driver(&adav80x_i2c_driver); | 987 | ret = i2c_add_driver(&adav80x_i2c_driver); |
990 | if (ret) | 988 | if (ret) |
991 | return ret; | 989 | return ret; |
@@ -1001,7 +999,7 @@ module_init(adav80x_init); | |||
1001 | 999 | ||
1002 | static void __exit adav80x_exit(void) | 1000 | static void __exit adav80x_exit(void) |
1003 | { | 1001 | { |
1004 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1002 | #if IS_ENABLED(CONFIG_I2C) |
1005 | i2c_del_driver(&adav80x_i2c_driver); | 1003 | i2c_del_driver(&adav80x_i2c_driver); |
1006 | #endif | 1004 | #endif |
1007 | #if defined(CONFIG_SPI_MASTER) | 1005 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/ak4641.c b/sound/soc/codecs/ak4641.c index 49cc5f6d6dba..94cbe508dd37 100644 --- a/sound/soc/codecs/ak4641.c +++ b/sound/soc/codecs/ak4641.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/pm.h> | 18 | #include <linux/pm.h> |
19 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
20 | #include <linux/regmap.h> | ||
20 | #include <linux/slab.h> | 21 | #include <linux/slab.h> |
21 | #include <sound/core.h> | 22 | #include <sound/core.h> |
22 | #include <sound/pcm.h> | 23 | #include <sound/pcm.h> |
@@ -30,6 +31,7 @@ | |||
30 | 31 | ||
31 | /* codec private data */ | 32 | /* codec private data */ |
32 | struct ak4641_priv { | 33 | struct ak4641_priv { |
34 | struct regmap *regmap; | ||
33 | unsigned int sysclk; | 35 | unsigned int sysclk; |
34 | int deemph; | 36 | int deemph; |
35 | int playback_fs; | 37 | int playback_fs; |
@@ -38,12 +40,12 @@ struct ak4641_priv { | |||
38 | /* | 40 | /* |
39 | * ak4641 register cache | 41 | * ak4641 register cache |
40 | */ | 42 | */ |
41 | static const u8 ak4641_reg[AK4641_CACHEREGNUM] = { | 43 | static const struct reg_default ak4641_reg_defaults[] = { |
42 | 0x00, 0x80, 0x00, 0x80, | 44 | { 0, 0x00 }, { 1, 0x80 }, { 2, 0x00 }, { 3, 0x80 }, |
43 | 0x02, 0x00, 0x11, 0x05, | 45 | { 4, 0x02 }, { 5, 0x00 }, { 6, 0x11 }, { 7, 0x05 }, |
44 | 0x00, 0x00, 0x36, 0x10, | 46 | { 8, 0x00 }, { 9, 0x00 }, { 10, 0x36 }, { 11, 0x10 }, |
45 | 0x00, 0x00, 0x57, 0x00, | 47 | { 12, 0x00 }, { 13, 0x00 }, { 14, 0x57 }, { 15, 0x00 }, |
46 | 0x88, 0x88, 0x08, 0x08 | 48 | { 16, 0x88 }, { 17, 0x88 }, { 18, 0x08 }, { 19, 0x08 } |
47 | }; | 49 | }; |
48 | 50 | ||
49 | static const int deemph_settings[] = {44100, 0, 48000, 32000}; | 51 | static const int deemph_settings[] = {44100, 0, 48000, 32000}; |
@@ -396,6 +398,7 @@ static int ak4641_mute(struct snd_soc_dai *dai, int mute) | |||
396 | static int ak4641_set_bias_level(struct snd_soc_codec *codec, | 398 | static int ak4641_set_bias_level(struct snd_soc_codec *codec, |
397 | enum snd_soc_bias_level level) | 399 | enum snd_soc_bias_level level) |
398 | { | 400 | { |
401 | struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec); | ||
399 | struct ak4641_platform_data *pdata = codec->dev->platform_data; | 402 | struct ak4641_platform_data *pdata = codec->dev->platform_data; |
400 | int ret; | 403 | int ret; |
401 | 404 | ||
@@ -417,7 +420,7 @@ static int ak4641_set_bias_level(struct snd_soc_codec *codec, | |||
417 | gpio_set_value(pdata->gpio_npdn, 1); | 420 | gpio_set_value(pdata->gpio_npdn, 1); |
418 | mdelay(1); | 421 | mdelay(1); |
419 | 422 | ||
420 | ret = snd_soc_cache_sync(codec); | 423 | ret = regcache_sync(ak4641->regmap); |
421 | if (ret) { | 424 | if (ret) { |
422 | dev_err(codec->dev, | 425 | dev_err(codec->dev, |
423 | "Failed to sync cache: %d\n", ret); | 426 | "Failed to sync cache: %d\n", ret); |
@@ -433,7 +436,7 @@ static int ak4641_set_bias_level(struct snd_soc_codec *codec, | |||
433 | gpio_set_value(pdata->gpio_npdn, 0); | 436 | gpio_set_value(pdata->gpio_npdn, 0); |
434 | if (pdata && gpio_is_valid(pdata->gpio_power)) | 437 | if (pdata && gpio_is_valid(pdata->gpio_power)) |
435 | gpio_set_value(pdata->gpio_power, 0); | 438 | gpio_set_value(pdata->gpio_power, 0); |
436 | codec->cache_sync = 1; | 439 | regcache_mark_dirty(ak4641->regmap); |
437 | break; | 440 | break; |
438 | } | 441 | } |
439 | codec->dapm.bias_level = level; | 442 | codec->dapm.bias_level = level; |
@@ -518,7 +521,7 @@ static int ak4641_probe(struct snd_soc_codec *codec) | |||
518 | { | 521 | { |
519 | int ret; | 522 | int ret; |
520 | 523 | ||
521 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); | 524 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); |
522 | if (ret != 0) { | 525 | if (ret != 0) { |
523 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | 526 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
524 | return ret; | 527 | return ret; |
@@ -550,12 +553,17 @@ static struct snd_soc_codec_driver soc_codec_dev_ak4641 = { | |||
550 | .dapm_routes = ak4641_audio_map, | 553 | .dapm_routes = ak4641_audio_map, |
551 | .num_dapm_routes = ARRAY_SIZE(ak4641_audio_map), | 554 | .num_dapm_routes = ARRAY_SIZE(ak4641_audio_map), |
552 | .set_bias_level = ak4641_set_bias_level, | 555 | .set_bias_level = ak4641_set_bias_level, |
553 | .reg_cache_size = ARRAY_SIZE(ak4641_reg), | ||
554 | .reg_word_size = sizeof(u8), | ||
555 | .reg_cache_default = ak4641_reg, | ||
556 | .reg_cache_step = 1, | ||
557 | }; | 556 | }; |
558 | 557 | ||
558 | static const struct regmap_config ak4641_regmap = { | ||
559 | .reg_bits = 8, | ||
560 | .val_bits = 8, | ||
561 | |||
562 | .max_register = AK4641_BTIF, | ||
563 | .reg_defaults = ak4641_reg_defaults, | ||
564 | .num_reg_defaults = ARRAY_SIZE(ak4641_reg_defaults), | ||
565 | .cache_type = REGCACHE_RBTREE, | ||
566 | }; | ||
559 | 567 | ||
560 | static int ak4641_i2c_probe(struct i2c_client *i2c, | 568 | static int ak4641_i2c_probe(struct i2c_client *i2c, |
561 | const struct i2c_device_id *id) | 569 | const struct i2c_device_id *id) |
@@ -569,6 +577,10 @@ static int ak4641_i2c_probe(struct i2c_client *i2c, | |||
569 | if (!ak4641) | 577 | if (!ak4641) |
570 | return -ENOMEM; | 578 | return -ENOMEM; |
571 | 579 | ||
580 | ak4641->regmap = devm_regmap_init_i2c(i2c, &ak4641_regmap); | ||
581 | if (IS_ERR(ak4641->regmap)) | ||
582 | return PTR_ERR(ak4641->regmap); | ||
583 | |||
572 | if (pdata) { | 584 | if (pdata) { |
573 | if (gpio_is_valid(pdata->gpio_power)) { | 585 | if (gpio_is_valid(pdata->gpio_power)) { |
574 | ret = gpio_request_one(pdata->gpio_power, | 586 | ret = gpio_request_one(pdata->gpio_power, |
diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c index 090d499bb7eb..1f646c6e90c6 100644 --- a/sound/soc/codecs/ak4642.c +++ b/sound/soc/codecs/ak4642.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
29 | #include <linux/of_device.h> | 29 | #include <linux/of_device.h> |
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/regmap.h> | ||
31 | #include <sound/soc.h> | 32 | #include <sound/soc.h> |
32 | #include <sound/initval.h> | 33 | #include <sound/initval.h> |
33 | #include <sound/tlv.h> | 34 | #include <sound/tlv.h> |
@@ -198,30 +199,30 @@ static const struct snd_soc_dapm_route ak4642_intercon[] = { | |||
198 | /* | 199 | /* |
199 | * ak4642 register cache | 200 | * ak4642 register cache |
200 | */ | 201 | */ |
201 | static const u8 ak4642_reg[] = { | 202 | static const struct reg_default ak4642_reg[] = { |
202 | 0x00, 0x00, 0x01, 0x00, | 203 | { 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 }, |
203 | 0x02, 0x00, 0x00, 0x00, | 204 | { 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 }, |
204 | 0xe1, 0xe1, 0x18, 0x00, | 205 | { 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 }, |
205 | 0xe1, 0x18, 0x11, 0x08, | 206 | { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0x08 }, |
206 | 0x00, 0x00, 0x00, 0x00, | 207 | { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 }, |
207 | 0x00, 0x00, 0x00, 0x00, | 208 | { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 }, |
208 | 0x00, 0x00, 0x00, 0x00, | 209 | { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 }, |
209 | 0x00, 0x00, 0x00, 0x00, | 210 | { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 }, |
210 | 0x00, 0x00, 0x00, 0x00, | 211 | { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 }, |
211 | 0x00, | 212 | { 36, 0x00 }, |
212 | }; | 213 | }; |
213 | 214 | ||
214 | static const u8 ak4648_reg[] = { | 215 | static const struct reg_default ak4648_reg[] = { |
215 | 0x00, 0x00, 0x01, 0x00, | 216 | { 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 }, |
216 | 0x02, 0x00, 0x00, 0x00, | 217 | { 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 }, |
217 | 0xe1, 0xe1, 0x18, 0x00, | 218 | { 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 }, |
218 | 0xe1, 0x18, 0x11, 0xb8, | 219 | { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0xb8 }, |
219 | 0x00, 0x00, 0x00, 0x00, | 220 | { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 }, |
220 | 0x00, 0x00, 0x00, 0x00, | 221 | { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 }, |
221 | 0x00, 0x00, 0x00, 0x00, | 222 | { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 }, |
222 | 0x00, 0x00, 0x00, 0x00, | 223 | { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 }, |
223 | 0x00, 0x00, 0x00, 0x00, | 224 | { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 }, |
224 | 0x00, 0x88, 0x88, 0x08, | 225 | { 36, 0x00 }, { 37, 0x88 }, { 38, 0x88 }, { 39, 0x08 }, |
225 | }; | 226 | }; |
226 | 227 | ||
227 | static int ak4642_dai_startup(struct snd_pcm_substream *substream, | 228 | static int ak4642_dai_startup(struct snd_pcm_substream *substream, |
@@ -454,7 +455,10 @@ static struct snd_soc_dai_driver ak4642_dai = { | |||
454 | 455 | ||
455 | static int ak4642_resume(struct snd_soc_codec *codec) | 456 | static int ak4642_resume(struct snd_soc_codec *codec) |
456 | { | 457 | { |
457 | snd_soc_cache_sync(codec); | 458 | struct regmap *regmap = dev_get_regmap(codec->dev, NULL); |
459 | |||
460 | regcache_mark_dirty(regmap); | ||
461 | regcache_sync(regmap); | ||
458 | return 0; | 462 | return 0; |
459 | } | 463 | } |
460 | 464 | ||
@@ -463,15 +467,12 @@ static int ak4642_probe(struct snd_soc_codec *codec) | |||
463 | { | 467 | { |
464 | int ret; | 468 | int ret; |
465 | 469 | ||
466 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); | 470 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); |
467 | if (ret < 0) { | 471 | if (ret < 0) { |
468 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | 472 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
469 | return ret; | 473 | return ret; |
470 | } | 474 | } |
471 | 475 | ||
472 | snd_soc_add_codec_controls(codec, ak4642_snd_controls, | ||
473 | ARRAY_SIZE(ak4642_snd_controls)); | ||
474 | |||
475 | ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 476 | ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
476 | 477 | ||
477 | return 0; | 478 | return 0; |
@@ -488,55 +489,59 @@ static struct snd_soc_codec_driver soc_codec_dev_ak4642 = { | |||
488 | .remove = ak4642_remove, | 489 | .remove = ak4642_remove, |
489 | .resume = ak4642_resume, | 490 | .resume = ak4642_resume, |
490 | .set_bias_level = ak4642_set_bias_level, | 491 | .set_bias_level = ak4642_set_bias_level, |
491 | .reg_cache_default = ak4642_reg, /* ak4642 reg */ | 492 | .controls = ak4642_snd_controls, |
492 | .reg_cache_size = ARRAY_SIZE(ak4642_reg), /* ak4642 reg */ | 493 | .num_controls = ARRAY_SIZE(ak4642_snd_controls), |
493 | .reg_word_size = sizeof(u8), | ||
494 | .dapm_widgets = ak4642_dapm_widgets, | 494 | .dapm_widgets = ak4642_dapm_widgets, |
495 | .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets), | 495 | .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets), |
496 | .dapm_routes = ak4642_intercon, | 496 | .dapm_routes = ak4642_intercon, |
497 | .num_dapm_routes = ARRAY_SIZE(ak4642_intercon), | 497 | .num_dapm_routes = ARRAY_SIZE(ak4642_intercon), |
498 | }; | 498 | }; |
499 | 499 | ||
500 | static struct snd_soc_codec_driver soc_codec_dev_ak4648 = { | 500 | static const struct regmap_config ak4642_regmap = { |
501 | .probe = ak4642_probe, | 501 | .reg_bits = 8, |
502 | .remove = ak4642_remove, | 502 | .val_bits = 8, |
503 | .resume = ak4642_resume, | 503 | .max_register = ARRAY_SIZE(ak4642_reg) + 1, |
504 | .set_bias_level = ak4642_set_bias_level, | 504 | .reg_defaults = ak4642_reg, |
505 | .reg_cache_default = ak4648_reg, /* ak4648 reg */ | 505 | .num_reg_defaults = ARRAY_SIZE(ak4642_reg), |
506 | .reg_cache_size = ARRAY_SIZE(ak4648_reg), /* ak4648 reg */ | 506 | }; |
507 | .reg_word_size = sizeof(u8), | 507 | |
508 | .dapm_widgets = ak4642_dapm_widgets, | 508 | static const struct regmap_config ak4648_regmap = { |
509 | .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets), | 509 | .reg_bits = 8, |
510 | .dapm_routes = ak4642_intercon, | 510 | .val_bits = 8, |
511 | .num_dapm_routes = ARRAY_SIZE(ak4642_intercon), | 511 | .max_register = ARRAY_SIZE(ak4648_reg) + 1, |
512 | .reg_defaults = ak4648_reg, | ||
513 | .num_reg_defaults = ARRAY_SIZE(ak4648_reg), | ||
512 | }; | 514 | }; |
513 | 515 | ||
514 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | ||
515 | static struct of_device_id ak4642_of_match[]; | 516 | static struct of_device_id ak4642_of_match[]; |
516 | static int ak4642_i2c_probe(struct i2c_client *i2c, | 517 | static int ak4642_i2c_probe(struct i2c_client *i2c, |
517 | const struct i2c_device_id *id) | 518 | const struct i2c_device_id *id) |
518 | { | 519 | { |
519 | struct device_node *np = i2c->dev.of_node; | 520 | struct device_node *np = i2c->dev.of_node; |
520 | const struct snd_soc_codec_driver *driver; | 521 | const struct regmap_config *regmap_config = NULL; |
522 | struct regmap *regmap; | ||
521 | 523 | ||
522 | driver = NULL; | ||
523 | if (np) { | 524 | if (np) { |
524 | const struct of_device_id *of_id; | 525 | const struct of_device_id *of_id; |
525 | 526 | ||
526 | of_id = of_match_device(ak4642_of_match, &i2c->dev); | 527 | of_id = of_match_device(ak4642_of_match, &i2c->dev); |
527 | if (of_id) | 528 | if (of_id) |
528 | driver = of_id->data; | 529 | regmap_config = of_id->data; |
529 | } else { | 530 | } else { |
530 | driver = (struct snd_soc_codec_driver *)id->driver_data; | 531 | regmap_config = (const struct regmap_config *)id->driver_data; |
531 | } | 532 | } |
532 | 533 | ||
533 | if (!driver) { | 534 | if (!regmap_config) { |
534 | dev_err(&i2c->dev, "no driver\n"); | 535 | dev_err(&i2c->dev, "Unknown device type\n"); |
535 | return -EINVAL; | 536 | return -EINVAL; |
536 | } | 537 | } |
537 | 538 | ||
539 | regmap = devm_regmap_init_i2c(i2c, regmap_config); | ||
540 | if (IS_ERR(regmap)) | ||
541 | return PTR_ERR(regmap); | ||
542 | |||
538 | return snd_soc_register_codec(&i2c->dev, | 543 | return snd_soc_register_codec(&i2c->dev, |
539 | driver, &ak4642_dai, 1); | 544 | &soc_codec_dev_ak4642, &ak4642_dai, 1); |
540 | } | 545 | } |
541 | 546 | ||
542 | static int ak4642_i2c_remove(struct i2c_client *client) | 547 | static int ak4642_i2c_remove(struct i2c_client *client) |
@@ -546,17 +551,17 @@ static int ak4642_i2c_remove(struct i2c_client *client) | |||
546 | } | 551 | } |
547 | 552 | ||
548 | static struct of_device_id ak4642_of_match[] = { | 553 | static struct of_device_id ak4642_of_match[] = { |
549 | { .compatible = "asahi-kasei,ak4642", .data = &soc_codec_dev_ak4642}, | 554 | { .compatible = "asahi-kasei,ak4642", .data = &ak4642_regmap}, |
550 | { .compatible = "asahi-kasei,ak4643", .data = &soc_codec_dev_ak4642}, | 555 | { .compatible = "asahi-kasei,ak4643", .data = &ak4642_regmap}, |
551 | { .compatible = "asahi-kasei,ak4648", .data = &soc_codec_dev_ak4648}, | 556 | { .compatible = "asahi-kasei,ak4648", .data = &ak4648_regmap}, |
552 | {}, | 557 | {}, |
553 | }; | 558 | }; |
554 | MODULE_DEVICE_TABLE(of, ak4642_of_match); | 559 | MODULE_DEVICE_TABLE(of, ak4642_of_match); |
555 | 560 | ||
556 | static const struct i2c_device_id ak4642_i2c_id[] = { | 561 | static const struct i2c_device_id ak4642_i2c_id[] = { |
557 | { "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 }, | 562 | { "ak4642", (kernel_ulong_t)&ak4642_regmap }, |
558 | { "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 }, | 563 | { "ak4643", (kernel_ulong_t)&ak4642_regmap }, |
559 | { "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 }, | 564 | { "ak4648", (kernel_ulong_t)&ak4648_regmap }, |
560 | { } | 565 | { } |
561 | }; | 566 | }; |
562 | MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id); | 567 | MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id); |
@@ -571,27 +576,8 @@ static struct i2c_driver ak4642_i2c_driver = { | |||
571 | .remove = ak4642_i2c_remove, | 576 | .remove = ak4642_i2c_remove, |
572 | .id_table = ak4642_i2c_id, | 577 | .id_table = ak4642_i2c_id, |
573 | }; | 578 | }; |
574 | #endif | ||
575 | |||
576 | static int __init ak4642_modinit(void) | ||
577 | { | ||
578 | int ret = 0; | ||
579 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | ||
580 | ret = i2c_add_driver(&ak4642_i2c_driver); | ||
581 | #endif | ||
582 | return ret; | ||
583 | 579 | ||
584 | } | 580 | module_i2c_driver(ak4642_i2c_driver); |
585 | module_init(ak4642_modinit); | ||
586 | |||
587 | static void __exit ak4642_exit(void) | ||
588 | { | ||
589 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | ||
590 | i2c_del_driver(&ak4642_i2c_driver); | ||
591 | #endif | ||
592 | |||
593 | } | ||
594 | module_exit(ak4642_exit); | ||
595 | 581 | ||
596 | MODULE_DESCRIPTION("Soc AK4642 driver"); | 582 | MODULE_DESCRIPTION("Soc AK4642 driver"); |
597 | MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>"); | 583 | MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>"); |
diff --git a/sound/soc/codecs/alc5623.c b/sound/soc/codecs/alc5623.c index 256c364193a5..d3036283482a 100644 --- a/sound/soc/codecs/alc5623.c +++ b/sound/soc/codecs/alc5623.c | |||
@@ -714,17 +714,17 @@ static int alc5623_pcm_hw_params(struct snd_pcm_substream *substream, | |||
714 | iface &= ~ALC5623_DAI_I2S_DL_MASK; | 714 | iface &= ~ALC5623_DAI_I2S_DL_MASK; |
715 | 715 | ||
716 | /* bit size */ | 716 | /* bit size */ |
717 | switch (params_format(params)) { | 717 | switch (params_width(params)) { |
718 | case SNDRV_PCM_FORMAT_S16_LE: | 718 | case 16: |
719 | iface |= ALC5623_DAI_I2S_DL_16; | 719 | iface |= ALC5623_DAI_I2S_DL_16; |
720 | break; | 720 | break; |
721 | case SNDRV_PCM_FORMAT_S20_3LE: | 721 | case 20: |
722 | iface |= ALC5623_DAI_I2S_DL_20; | 722 | iface |= ALC5623_DAI_I2S_DL_20; |
723 | break; | 723 | break; |
724 | case SNDRV_PCM_FORMAT_S24_LE: | 724 | case 24: |
725 | iface |= ALC5623_DAI_I2S_DL_24; | 725 | iface |= ALC5623_DAI_I2S_DL_24; |
726 | break; | 726 | break; |
727 | case SNDRV_PCM_FORMAT_S32_LE: | 727 | case 32: |
728 | iface |= ALC5623_DAI_I2S_DL_32; | 728 | iface |= ALC5623_DAI_I2S_DL_32; |
729 | break; | 729 | break; |
730 | default: | 730 | default: |
diff --git a/sound/soc/codecs/alc5632.c b/sound/soc/codecs/alc5632.c index 19e9f222d09c..fb001c56cf8d 100644 --- a/sound/soc/codecs/alc5632.c +++ b/sound/soc/codecs/alc5632.c | |||
@@ -869,14 +869,14 @@ static int alc5632_pcm_hw_params(struct snd_pcm_substream *substream, | |||
869 | iface &= ~ALC5632_DAI_I2S_DL_MASK; | 869 | iface &= ~ALC5632_DAI_I2S_DL_MASK; |
870 | 870 | ||
871 | /* bit size */ | 871 | /* bit size */ |
872 | switch (params_format(params)) { | 872 | switch (params_width(params)) { |
873 | case SNDRV_PCM_FORMAT_S16_LE: | 873 | case 16: |
874 | iface |= ALC5632_DAI_I2S_DL_16; | 874 | iface |= ALC5632_DAI_I2S_DL_16; |
875 | break; | 875 | break; |
876 | case SNDRV_PCM_FORMAT_S20_3LE: | 876 | case 20: |
877 | iface |= ALC5632_DAI_I2S_DL_20; | 877 | iface |= ALC5632_DAI_I2S_DL_20; |
878 | break; | 878 | break; |
879 | case SNDRV_PCM_FORMAT_S24_LE: | 879 | case 24: |
880 | iface |= ALC5632_DAI_I2S_DL_24; | 880 | iface |= ALC5632_DAI_I2S_DL_24; |
881 | break; | 881 | break; |
882 | default: | 882 | default: |
diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fea991031be1..e4295fee8f13 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c | |||
@@ -93,7 +93,7 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, | |||
93 | switch (event) { | 93 | switch (event) { |
94 | case SND_SOC_DAPM_PRE_PMU: | 94 | case SND_SOC_DAPM_PRE_PMU: |
95 | if (!priv->spk_ena && manual_ena) { | 95 | if (!priv->spk_ena && manual_ena) { |
96 | snd_soc_write(codec, 0x4f5, 0x25a); | 96 | regmap_write_async(arizona->regmap, 0x4f5, 0x25a); |
97 | priv->spk_ena_pending = true; | 97 | priv->spk_ena_pending = true; |
98 | } | 98 | } |
99 | break; | 99 | break; |
@@ -105,12 +105,13 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, | |||
105 | return -EBUSY; | 105 | return -EBUSY; |
106 | } | 106 | } |
107 | 107 | ||
108 | snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, | 108 | regmap_update_bits_async(arizona->regmap, |
109 | 1 << w->shift, 1 << w->shift); | 109 | ARIZONA_OUTPUT_ENABLES_1, |
110 | 1 << w->shift, 1 << w->shift); | ||
110 | 111 | ||
111 | if (priv->spk_ena_pending) { | 112 | if (priv->spk_ena_pending) { |
112 | msleep(75); | 113 | msleep(75); |
113 | snd_soc_write(codec, 0x4f5, 0xda); | 114 | regmap_write_async(arizona->regmap, 0x4f5, 0xda); |
114 | priv->spk_ena_pending = false; | 115 | priv->spk_ena_pending = false; |
115 | priv->spk_ena++; | 116 | priv->spk_ena++; |
116 | } | 117 | } |
@@ -119,16 +120,19 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w, | |||
119 | if (manual_ena) { | 120 | if (manual_ena) { |
120 | priv->spk_ena--; | 121 | priv->spk_ena--; |
121 | if (!priv->spk_ena) | 122 | if (!priv->spk_ena) |
122 | snd_soc_write(codec, 0x4f5, 0x25a); | 123 | regmap_write_async(arizona->regmap, |
124 | 0x4f5, 0x25a); | ||
123 | } | 125 | } |
124 | 126 | ||
125 | snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, | 127 | regmap_update_bits_async(arizona->regmap, |
126 | 1 << w->shift, 0); | 128 | ARIZONA_OUTPUT_ENABLES_1, |
129 | 1 << w->shift, 0); | ||
127 | break; | 130 | break; |
128 | case SND_SOC_DAPM_POST_PMD: | 131 | case SND_SOC_DAPM_POST_PMD: |
129 | if (manual_ena) { | 132 | if (manual_ena) { |
130 | if (!priv->spk_ena) | 133 | if (!priv->spk_ena) |
131 | snd_soc_write(codec, 0x4f5, 0x0da); | 134 | regmap_write_async(arizona->regmap, |
135 | 0x4f5, 0x0da); | ||
132 | } | 136 | } |
133 | break; | 137 | break; |
134 | } | 138 | } |
@@ -292,6 +296,10 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { | |||
292 | "AIF1RX8", | 296 | "AIF1RX8", |
293 | "AIF2RX1", | 297 | "AIF2RX1", |
294 | "AIF2RX2", | 298 | "AIF2RX2", |
299 | "AIF2RX3", | ||
300 | "AIF2RX4", | ||
301 | "AIF2RX5", | ||
302 | "AIF2RX6", | ||
295 | "AIF3RX1", | 303 | "AIF3RX1", |
296 | "AIF3RX2", | 304 | "AIF3RX2", |
297 | "SLIMRX1", | 305 | "SLIMRX1", |
@@ -395,6 +403,10 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { | |||
395 | 0x27, | 403 | 0x27, |
396 | 0x28, /* AIF2RX1 */ | 404 | 0x28, /* AIF2RX1 */ |
397 | 0x29, | 405 | 0x29, |
406 | 0x2a, | ||
407 | 0x2b, | ||
408 | 0x2c, | ||
409 | 0x2d, | ||
398 | 0x30, /* AIF3RX1 */ | 410 | 0x30, /* AIF3RX1 */ |
399 | 0x31, | 411 | 0x31, |
400 | 0x38, /* SLIMRX1 */ | 412 | 0x38, /* SLIMRX1 */ |
@@ -486,6 +498,22 @@ const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = { | |||
486 | EXPORT_SYMBOL_GPL(arizona_rate_val); | 498 | EXPORT_SYMBOL_GPL(arizona_rate_val); |
487 | 499 | ||
488 | 500 | ||
501 | const struct soc_enum arizona_isrc_fsh[] = { | ||
502 | SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1, | ||
503 | ARIZONA_ISRC1_FSH_SHIFT, 0xf, | ||
504 | ARIZONA_RATE_ENUM_SIZE, | ||
505 | arizona_rate_text, arizona_rate_val), | ||
506 | SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_1, | ||
507 | ARIZONA_ISRC2_FSH_SHIFT, 0xf, | ||
508 | ARIZONA_RATE_ENUM_SIZE, | ||
509 | arizona_rate_text, arizona_rate_val), | ||
510 | SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_1, | ||
511 | ARIZONA_ISRC3_FSH_SHIFT, 0xf, | ||
512 | ARIZONA_RATE_ENUM_SIZE, | ||
513 | arizona_rate_text, arizona_rate_val), | ||
514 | }; | ||
515 | EXPORT_SYMBOL_GPL(arizona_isrc_fsh); | ||
516 | |||
489 | const struct soc_enum arizona_isrc_fsl[] = { | 517 | const struct soc_enum arizona_isrc_fsl[] = { |
490 | SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2, | 518 | SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2, |
491 | ARIZONA_ISRC1_FSL_SHIFT, 0xf, | 519 | ARIZONA_ISRC1_FSL_SHIFT, 0xf, |
@@ -502,6 +530,13 @@ const struct soc_enum arizona_isrc_fsl[] = { | |||
502 | }; | 530 | }; |
503 | EXPORT_SYMBOL_GPL(arizona_isrc_fsl); | 531 | EXPORT_SYMBOL_GPL(arizona_isrc_fsl); |
504 | 532 | ||
533 | const struct soc_enum arizona_asrc_rate1 = | ||
534 | SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE1, | ||
535 | ARIZONA_ASRC_RATE1_SHIFT, 0xf, | ||
536 | ARIZONA_RATE_ENUM_SIZE - 1, | ||
537 | arizona_rate_text, arizona_rate_val); | ||
538 | EXPORT_SYMBOL_GPL(arizona_asrc_rate1); | ||
539 | |||
505 | static const char *arizona_vol_ramp_text[] = { | 540 | static const char *arizona_vol_ramp_text[] = { |
506 | "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", | 541 | "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", |
507 | "15ms/6dB", "30ms/6dB", | 542 | "15ms/6dB", "30ms/6dB", |
@@ -560,6 +595,16 @@ const struct soc_enum arizona_ng_hold = | |||
560 | 4, arizona_ng_hold_text); | 595 | 4, arizona_ng_hold_text); |
561 | EXPORT_SYMBOL_GPL(arizona_ng_hold); | 596 | EXPORT_SYMBOL_GPL(arizona_ng_hold); |
562 | 597 | ||
598 | static const char * const arizona_in_hpf_cut_text[] = { | ||
599 | "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz" | ||
600 | }; | ||
601 | |||
602 | const struct soc_enum arizona_in_hpf_cut_enum = | ||
603 | SOC_ENUM_SINGLE(ARIZONA_HPF_CONTROL, ARIZONA_IN_HPF_CUT_SHIFT, | ||
604 | ARRAY_SIZE(arizona_in_hpf_cut_text), | ||
605 | arizona_in_hpf_cut_text); | ||
606 | EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum); | ||
607 | |||
563 | static const char * const arizona_in_dmic_osr_text[] = { | 608 | static const char * const arizona_in_dmic_osr_text[] = { |
564 | "1.536MHz", "3.072MHz", "6.144MHz", | 609 | "1.536MHz", "3.072MHz", "6.144MHz", |
565 | }; | 610 | }; |
@@ -669,6 +714,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, | |||
669 | int event) | 714 | int event) |
670 | { | 715 | { |
671 | struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); | 716 | struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); |
717 | struct arizona *arizona = priv->arizona; | ||
672 | unsigned int mask = 1 << w->shift; | 718 | unsigned int mask = 1 << w->shift; |
673 | unsigned int val; | 719 | unsigned int val; |
674 | 720 | ||
@@ -691,7 +737,8 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w, | |||
691 | if (priv->arizona->hpdet_magic) | 737 | if (priv->arizona->hpdet_magic) |
692 | val = 0; | 738 | val = 0; |
693 | 739 | ||
694 | snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val); | 740 | regmap_update_bits_async(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1, |
741 | mask, val); | ||
695 | 742 | ||
696 | return arizona_out_ev(w, kcontrol, event); | 743 | return arizona_out_ev(w, kcontrol, event); |
697 | } | 744 | } |
@@ -846,6 +893,8 @@ EXPORT_SYMBOL_GPL(arizona_set_sysclk); | |||
846 | static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) | 893 | static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
847 | { | 894 | { |
848 | struct snd_soc_codec *codec = dai->codec; | 895 | struct snd_soc_codec *codec = dai->codec; |
896 | struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); | ||
897 | struct arizona *arizona = priv->arizona; | ||
849 | int lrclk, bclk, mode, base; | 898 | int lrclk, bclk, mode, base; |
850 | 899 | ||
851 | base = dai->driver->base; | 900 | base = dai->driver->base; |
@@ -902,17 +951,19 @@ static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
902 | return -EINVAL; | 951 | return -EINVAL; |
903 | } | 952 | } |
904 | 953 | ||
905 | snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL, | 954 | regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_BCLK_CTRL, |
906 | ARIZONA_AIF1_BCLK_INV | ARIZONA_AIF1_BCLK_MSTR, | 955 | ARIZONA_AIF1_BCLK_INV | |
907 | bclk); | 956 | ARIZONA_AIF1_BCLK_MSTR, |
908 | snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_PIN_CTRL, | 957 | bclk); |
909 | ARIZONA_AIF1TX_LRCLK_INV | | 958 | regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_TX_PIN_CTRL, |
910 | ARIZONA_AIF1TX_LRCLK_MSTR, lrclk); | 959 | ARIZONA_AIF1TX_LRCLK_INV | |
911 | snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_PIN_CTRL, | 960 | ARIZONA_AIF1TX_LRCLK_MSTR, lrclk); |
912 | ARIZONA_AIF1RX_LRCLK_INV | | 961 | regmap_update_bits_async(arizona->regmap, |
913 | ARIZONA_AIF1RX_LRCLK_MSTR, lrclk); | 962 | base + ARIZONA_AIF_RX_PIN_CTRL, |
914 | snd_soc_update_bits(codec, base + ARIZONA_AIF_FORMAT, | 963 | ARIZONA_AIF1RX_LRCLK_INV | |
915 | ARIZONA_AIF1_FMT_MASK, mode); | 964 | ARIZONA_AIF1RX_LRCLK_MSTR, lrclk); |
965 | regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FORMAT, | ||
966 | ARIZONA_AIF1_FMT_MASK, mode); | ||
916 | 967 | ||
917 | return 0; | 968 | return 0; |
918 | } | 969 | } |
@@ -1164,18 +1215,22 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, | |||
1164 | if (ret != 0) | 1215 | if (ret != 0) |
1165 | return ret; | 1216 | return ret; |
1166 | 1217 | ||
1167 | snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL, | 1218 | regmap_update_bits_async(arizona->regmap, |
1168 | ARIZONA_AIF1_BCLK_FREQ_MASK, bclk); | 1219 | base + ARIZONA_AIF_BCLK_CTRL, |
1169 | snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE, | 1220 | ARIZONA_AIF1_BCLK_FREQ_MASK, bclk); |
1170 | ARIZONA_AIF1TX_BCPF_MASK, lrclk); | 1221 | regmap_update_bits_async(arizona->regmap, |
1171 | snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE, | 1222 | base + ARIZONA_AIF_TX_BCLK_RATE, |
1172 | ARIZONA_AIF1RX_BCPF_MASK, lrclk); | 1223 | ARIZONA_AIF1TX_BCPF_MASK, lrclk); |
1173 | snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1, | 1224 | regmap_update_bits_async(arizona->regmap, |
1174 | ARIZONA_AIF1TX_WL_MASK | | 1225 | base + ARIZONA_AIF_RX_BCLK_RATE, |
1175 | ARIZONA_AIF1TX_SLOT_LEN_MASK, frame); | 1226 | ARIZONA_AIF1RX_BCPF_MASK, lrclk); |
1176 | snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2, | 1227 | regmap_update_bits_async(arizona->regmap, |
1177 | ARIZONA_AIF1RX_WL_MASK | | 1228 | base + ARIZONA_AIF_FRAME_CTRL_1, |
1178 | ARIZONA_AIF1RX_SLOT_LEN_MASK, frame); | 1229 | ARIZONA_AIF1TX_WL_MASK | |
1230 | ARIZONA_AIF1TX_SLOT_LEN_MASK, frame); | ||
1231 | regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FRAME_CTRL_2, | ||
1232 | ARIZONA_AIF1RX_WL_MASK | | ||
1233 | ARIZONA_AIF1RX_SLOT_LEN_MASK, frame); | ||
1179 | 1234 | ||
1180 | return 0; | 1235 | return 0; |
1181 | } | 1236 | } |
@@ -1428,31 +1483,31 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base, | |||
1428 | struct arizona_fll_cfg *cfg, int source, | 1483 | struct arizona_fll_cfg *cfg, int source, |
1429 | bool sync) | 1484 | bool sync) |
1430 | { | 1485 | { |
1431 | regmap_update_bits(arizona->regmap, base + 3, | 1486 | regmap_update_bits_async(arizona->regmap, base + 3, |
1432 | ARIZONA_FLL1_THETA_MASK, cfg->theta); | 1487 | ARIZONA_FLL1_THETA_MASK, cfg->theta); |
1433 | regmap_update_bits(arizona->regmap, base + 4, | 1488 | regmap_update_bits_async(arizona->regmap, base + 4, |
1434 | ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda); | 1489 | ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda); |
1435 | regmap_update_bits(arizona->regmap, base + 5, | 1490 | regmap_update_bits_async(arizona->regmap, base + 5, |
1436 | ARIZONA_FLL1_FRATIO_MASK, | 1491 | ARIZONA_FLL1_FRATIO_MASK, |
1437 | cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT); | 1492 | cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT); |
1438 | regmap_update_bits(arizona->regmap, base + 6, | 1493 | regmap_update_bits_async(arizona->regmap, base + 6, |
1439 | ARIZONA_FLL1_CLK_REF_DIV_MASK | | 1494 | ARIZONA_FLL1_CLK_REF_DIV_MASK | |
1440 | ARIZONA_FLL1_CLK_REF_SRC_MASK, | 1495 | ARIZONA_FLL1_CLK_REF_SRC_MASK, |
1441 | cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | | 1496 | cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | |
1442 | source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); | 1497 | source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); |
1443 | 1498 | ||
1444 | if (sync) | 1499 | if (sync) |
1445 | regmap_update_bits(arizona->regmap, base + 0x7, | 1500 | regmap_update_bits_async(arizona->regmap, base + 0x7, |
1446 | ARIZONA_FLL1_GAIN_MASK, | 1501 | ARIZONA_FLL1_GAIN_MASK, |
1447 | cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); | 1502 | cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); |
1448 | else | 1503 | else |
1449 | regmap_update_bits(arizona->regmap, base + 0x9, | 1504 | regmap_update_bits_async(arizona->regmap, base + 0x9, |
1450 | ARIZONA_FLL1_GAIN_MASK, | 1505 | ARIZONA_FLL1_GAIN_MASK, |
1451 | cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); | 1506 | cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); |
1452 | 1507 | ||
1453 | regmap_update_bits(arizona->regmap, base + 2, | 1508 | regmap_update_bits_async(arizona->regmap, base + 2, |
1454 | ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK, | 1509 | ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK, |
1455 | ARIZONA_FLL1_CTRL_UPD | cfg->n); | 1510 | ARIZONA_FLL1_CTRL_UPD | cfg->n); |
1456 | } | 1511 | } |
1457 | 1512 | ||
1458 | static bool arizona_is_enabled_fll(struct arizona_fll *fll) | 1513 | static bool arizona_is_enabled_fll(struct arizona_fll *fll) |
@@ -1485,9 +1540,9 @@ static void arizona_enable_fll(struct arizona_fll *fll, | |||
1485 | */ | 1540 | */ |
1486 | if (fll->ref_src >= 0 && fll->ref_freq && | 1541 | if (fll->ref_src >= 0 && fll->ref_freq && |
1487 | fll->ref_src != fll->sync_src) { | 1542 | fll->ref_src != fll->sync_src) { |
1488 | regmap_update_bits(arizona->regmap, fll->base + 5, | 1543 | regmap_update_bits_async(arizona->regmap, fll->base + 5, |
1489 | ARIZONA_FLL1_OUTDIV_MASK, | 1544 | ARIZONA_FLL1_OUTDIV_MASK, |
1490 | ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); | 1545 | ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); |
1491 | 1546 | ||
1492 | arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, | 1547 | arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, |
1493 | false); | 1548 | false); |
@@ -1497,15 +1552,15 @@ static void arizona_enable_fll(struct arizona_fll *fll, | |||
1497 | use_sync = true; | 1552 | use_sync = true; |
1498 | } | 1553 | } |
1499 | } else if (fll->sync_src >= 0) { | 1554 | } else if (fll->sync_src >= 0) { |
1500 | regmap_update_bits(arizona->regmap, fll->base + 5, | 1555 | regmap_update_bits_async(arizona->regmap, fll->base + 5, |
1501 | ARIZONA_FLL1_OUTDIV_MASK, | 1556 | ARIZONA_FLL1_OUTDIV_MASK, |
1502 | sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); | 1557 | sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); |
1503 | 1558 | ||
1504 | arizona_apply_fll(arizona, fll->base, sync, | 1559 | arizona_apply_fll(arizona, fll->base, sync, |
1505 | fll->sync_src, false); | 1560 | fll->sync_src, false); |
1506 | 1561 | ||
1507 | regmap_update_bits(arizona->regmap, fll->base + 0x11, | 1562 | regmap_update_bits_async(arizona->regmap, fll->base + 0x11, |
1508 | ARIZONA_FLL1_SYNC_ENA, 0); | 1563 | ARIZONA_FLL1_SYNC_ENA, 0); |
1509 | } else { | 1564 | } else { |
1510 | arizona_fll_err(fll, "No clocks provided\n"); | 1565 | arizona_fll_err(fll, "No clocks provided\n"); |
1511 | return; | 1566 | return; |
@@ -1516,11 +1571,12 @@ static void arizona_enable_fll(struct arizona_fll *fll, | |||
1516 | * sync source. | 1571 | * sync source. |
1517 | */ | 1572 | */ |
1518 | if (use_sync && fll->sync_freq > 100000) | 1573 | if (use_sync && fll->sync_freq > 100000) |
1519 | regmap_update_bits(arizona->regmap, fll->base + 0x17, | 1574 | regmap_update_bits_async(arizona->regmap, fll->base + 0x17, |
1520 | ARIZONA_FLL1_SYNC_BW, 0); | 1575 | ARIZONA_FLL1_SYNC_BW, 0); |
1521 | else | 1576 | else |
1522 | regmap_update_bits(arizona->regmap, fll->base + 0x17, | 1577 | regmap_update_bits_async(arizona->regmap, fll->base + 0x17, |
1523 | ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW); | 1578 | ARIZONA_FLL1_SYNC_BW, |
1579 | ARIZONA_FLL1_SYNC_BW); | ||
1524 | 1580 | ||
1525 | if (!arizona_is_enabled_fll(fll)) | 1581 | if (!arizona_is_enabled_fll(fll)) |
1526 | pm_runtime_get(arizona->dev); | 1582 | pm_runtime_get(arizona->dev); |
@@ -1528,14 +1584,14 @@ static void arizona_enable_fll(struct arizona_fll *fll, | |||
1528 | /* Clear any pending completions */ | 1584 | /* Clear any pending completions */ |
1529 | try_wait_for_completion(&fll->ok); | 1585 | try_wait_for_completion(&fll->ok); |
1530 | 1586 | ||
1531 | regmap_update_bits(arizona->regmap, fll->base + 1, | 1587 | regmap_update_bits_async(arizona->regmap, fll->base + 1, |
1532 | ARIZONA_FLL1_FREERUN, 0); | 1588 | ARIZONA_FLL1_FREERUN, 0); |
1533 | regmap_update_bits(arizona->regmap, fll->base + 1, | 1589 | regmap_update_bits_async(arizona->regmap, fll->base + 1, |
1534 | ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); | 1590 | ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); |
1535 | if (use_sync) | 1591 | if (use_sync) |
1536 | regmap_update_bits(arizona->regmap, fll->base + 0x11, | 1592 | regmap_update_bits_async(arizona->regmap, fll->base + 0x11, |
1537 | ARIZONA_FLL1_SYNC_ENA, | 1593 | ARIZONA_FLL1_SYNC_ENA, |
1538 | ARIZONA_FLL1_SYNC_ENA); | 1594 | ARIZONA_FLL1_SYNC_ENA); |
1539 | 1595 | ||
1540 | ret = wait_for_completion_timeout(&fll->ok, | 1596 | ret = wait_for_completion_timeout(&fll->ok, |
1541 | msecs_to_jiffies(250)); | 1597 | msecs_to_jiffies(250)); |
@@ -1548,8 +1604,8 @@ static void arizona_disable_fll(struct arizona_fll *fll) | |||
1548 | struct arizona *arizona = fll->arizona; | 1604 | struct arizona *arizona = fll->arizona; |
1549 | bool change; | 1605 | bool change; |
1550 | 1606 | ||
1551 | regmap_update_bits(arizona->regmap, fll->base + 1, | 1607 | regmap_update_bits_async(arizona->regmap, fll->base + 1, |
1552 | ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); | 1608 | ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); |
1553 | regmap_update_bits_check(arizona->regmap, fll->base + 1, | 1609 | regmap_update_bits_check(arizona->regmap, fll->base + 1, |
1554 | ARIZONA_FLL1_ENA, 0, &change); | 1610 | ARIZONA_FLL1_ENA, 0, &change); |
1555 | regmap_update_bits(arizona->regmap, fll->base + 0x11, | 1611 | regmap_update_bits(arizona->regmap, fll->base + 0x11, |
diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 9e81b6392692..16df0f913353 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h | |||
@@ -81,7 +81,7 @@ struct arizona_priv { | |||
81 | unsigned int spk_ena_pending:1; | 81 | unsigned int spk_ena_pending:1; |
82 | }; | 82 | }; |
83 | 83 | ||
84 | #define ARIZONA_NUM_MIXER_INPUTS 99 | 84 | #define ARIZONA_NUM_MIXER_INPUTS 103 |
85 | 85 | ||
86 | extern const unsigned int arizona_mixer_tlv[]; | 86 | extern const unsigned int arizona_mixer_tlv[]; |
87 | extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; | 87 | extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; |
@@ -166,26 +166,29 @@ extern int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS]; | |||
166 | ARIZONA_MIXER_INPUT_ROUTES(name " Input 4") | 166 | ARIZONA_MIXER_INPUT_ROUTES(name " Input 4") |
167 | 167 | ||
168 | #define ARIZONA_DSP_ROUTES(name) \ | 168 | #define ARIZONA_DSP_ROUTES(name) \ |
169 | { name, NULL, name " Aux 1" }, \ | 169 | { name, NULL, name " Preloader"}, \ |
170 | { name, NULL, name " Aux 2" }, \ | 170 | { name " Preloader", NULL, name " Aux 1" }, \ |
171 | { name, NULL, name " Aux 3" }, \ | 171 | { name " Preloader", NULL, name " Aux 2" }, \ |
172 | { name, NULL, name " Aux 4" }, \ | 172 | { name " Preloader", NULL, name " Aux 3" }, \ |
173 | { name, NULL, name " Aux 5" }, \ | 173 | { name " Preloader", NULL, name " Aux 4" }, \ |
174 | { name, NULL, name " Aux 6" }, \ | 174 | { name " Preloader", NULL, name " Aux 5" }, \ |
175 | { name " Preloader", NULL, name " Aux 6" }, \ | ||
175 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 1"), \ | 176 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 1"), \ |
176 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 2"), \ | 177 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 2"), \ |
177 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 3"), \ | 178 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 3"), \ |
178 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 4"), \ | 179 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 4"), \ |
179 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 5"), \ | 180 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 5"), \ |
180 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 6"), \ | 181 | ARIZONA_MIXER_INPUT_ROUTES(name " Aux 6"), \ |
181 | ARIZONA_MIXER_ROUTES(name, name "L"), \ | 182 | ARIZONA_MIXER_ROUTES(name " Preloader", name "L"), \ |
182 | ARIZONA_MIXER_ROUTES(name, name "R") | 183 | ARIZONA_MIXER_ROUTES(name " Preloader", name "R") |
183 | 184 | ||
184 | #define ARIZONA_RATE_ENUM_SIZE 4 | 185 | #define ARIZONA_RATE_ENUM_SIZE 4 |
185 | extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; | 186 | extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE]; |
186 | extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; | 187 | extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; |
187 | 188 | ||
188 | extern const struct soc_enum arizona_isrc_fsl[]; | 189 | extern const struct soc_enum arizona_isrc_fsl[]; |
190 | extern const struct soc_enum arizona_isrc_fsh[]; | ||
191 | extern const struct soc_enum arizona_asrc_rate1; | ||
189 | 192 | ||
190 | extern const struct soc_enum arizona_in_vi_ramp; | 193 | extern const struct soc_enum arizona_in_vi_ramp; |
191 | extern const struct soc_enum arizona_in_vd_ramp; | 194 | extern const struct soc_enum arizona_in_vd_ramp; |
@@ -199,6 +202,7 @@ extern const struct soc_enum arizona_lhpf3_mode; | |||
199 | extern const struct soc_enum arizona_lhpf4_mode; | 202 | extern const struct soc_enum arizona_lhpf4_mode; |
200 | 203 | ||
201 | extern const struct soc_enum arizona_ng_hold; | 204 | extern const struct soc_enum arizona_ng_hold; |
205 | extern const struct soc_enum arizona_in_hpf_cut_enum; | ||
202 | extern const struct soc_enum arizona_in_dmic_osr[]; | 206 | extern const struct soc_enum arizona_in_dmic_osr[]; |
203 | 207 | ||
204 | extern int arizona_in_ev(struct snd_soc_dapm_widget *w, | 208 | extern int arizona_in_ev(struct snd_soc_dapm_widget *w, |
diff --git a/sound/soc/codecs/cs4271.c b/sound/soc/codecs/cs4271.c index f6e953454bc0..ce05fd93dc74 100644 --- a/sound/soc/codecs/cs4271.c +++ b/sound/soc/codecs/cs4271.c | |||
@@ -675,7 +675,7 @@ static struct spi_driver cs4271_spi_driver = { | |||
675 | }; | 675 | }; |
676 | #endif /* defined(CONFIG_SPI_MASTER) */ | 676 | #endif /* defined(CONFIG_SPI_MASTER) */ |
677 | 677 | ||
678 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 678 | #if IS_ENABLED(CONFIG_I2C) |
679 | static const struct i2c_device_id cs4271_i2c_id[] = { | 679 | static const struct i2c_device_id cs4271_i2c_id[] = { |
680 | {"cs4271", 0}, | 680 | {"cs4271", 0}, |
681 | {} | 681 | {} |
@@ -728,7 +728,7 @@ static struct i2c_driver cs4271_i2c_driver = { | |||
728 | .probe = cs4271_i2c_probe, | 728 | .probe = cs4271_i2c_probe, |
729 | .remove = cs4271_i2c_remove, | 729 | .remove = cs4271_i2c_remove, |
730 | }; | 730 | }; |
731 | #endif /* defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) */ | 731 | #endif /* IS_ENABLED(CONFIG_I2C) */ |
732 | 732 | ||
733 | /* | 733 | /* |
734 | * We only register our serial bus driver here without | 734 | * We only register our serial bus driver here without |
@@ -741,7 +741,7 @@ static int __init cs4271_modinit(void) | |||
741 | { | 741 | { |
742 | int ret; | 742 | int ret; |
743 | 743 | ||
744 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 744 | #if IS_ENABLED(CONFIG_I2C) |
745 | ret = i2c_add_driver(&cs4271_i2c_driver); | 745 | ret = i2c_add_driver(&cs4271_i2c_driver); |
746 | if (ret) { | 746 | if (ret) { |
747 | pr_err("Failed to register CS4271 I2C driver: %d\n", ret); | 747 | pr_err("Failed to register CS4271 I2C driver: %d\n", ret); |
@@ -767,7 +767,7 @@ static void __exit cs4271_modexit(void) | |||
767 | spi_unregister_driver(&cs4271_spi_driver); | 767 | spi_unregister_driver(&cs4271_spi_driver); |
768 | #endif | 768 | #endif |
769 | 769 | ||
770 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 770 | #if IS_ENABLED(CONFIG_I2C) |
771 | i2c_del_driver(&cs4271_i2c_driver); | 771 | i2c_del_driver(&cs4271_i2c_driver); |
772 | #endif | 772 | #endif |
773 | } | 773 | } |
diff --git a/sound/soc/codecs/cs42l51.c b/sound/soc/codecs/cs42l51.c index 1e0fa3b5f79a..6e9ea8379a91 100644 --- a/sound/soc/codecs/cs42l51.c +++ b/sound/soc/codecs/cs42l51.c | |||
@@ -423,21 +423,17 @@ static int cs42l51_hw_params(struct snd_pcm_substream *substream, | |||
423 | intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_LJ24); | 423 | intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_LJ24); |
424 | break; | 424 | break; |
425 | case SND_SOC_DAIFMT_RIGHT_J: | 425 | case SND_SOC_DAIFMT_RIGHT_J: |
426 | switch (params_format(params)) { | 426 | switch (params_width(params)) { |
427 | case SNDRV_PCM_FORMAT_S16_LE: | 427 | case 16: |
428 | case SNDRV_PCM_FORMAT_S16_BE: | ||
429 | fmt = CS42L51_DAC_DIF_RJ16; | 428 | fmt = CS42L51_DAC_DIF_RJ16; |
430 | break; | 429 | break; |
431 | case SNDRV_PCM_FORMAT_S18_3LE: | 430 | case 18: |
432 | case SNDRV_PCM_FORMAT_S18_3BE: | ||
433 | fmt = CS42L51_DAC_DIF_RJ18; | 431 | fmt = CS42L51_DAC_DIF_RJ18; |
434 | break; | 432 | break; |
435 | case SNDRV_PCM_FORMAT_S20_3LE: | 433 | case 20: |
436 | case SNDRV_PCM_FORMAT_S20_3BE: | ||
437 | fmt = CS42L51_DAC_DIF_RJ20; | 434 | fmt = CS42L51_DAC_DIF_RJ20; |
438 | break; | 435 | break; |
439 | case SNDRV_PCM_FORMAT_S24_LE: | 436 | case 24: |
440 | case SNDRV_PCM_FORMAT_S24_BE: | ||
441 | fmt = CS42L51_DAC_DIF_RJ24; | 437 | fmt = CS42L51_DAC_DIF_RJ24; |
442 | break; | 438 | break; |
443 | default: | 439 | default: |
diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 8b427c977083..0bac6d5a4ac8 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c | |||
@@ -17,7 +17,7 @@ | |||
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
20 | #include <linux/gpio.h> | 20 | #include <linux/of_gpio.h> |
21 | #include <linux/pm.h> | 21 | #include <linux/pm.h> |
22 | #include <linux/i2c.h> | 22 | #include <linux/i2c.h> |
23 | #include <linux/input.h> | 23 | #include <linux/input.h> |
@@ -50,7 +50,7 @@ struct cs42l52_private { | |||
50 | u8 mclksel; | 50 | u8 mclksel; |
51 | u32 mclk; | 51 | u32 mclk; |
52 | u8 flags; | 52 | u8 flags; |
53 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) | 53 | #if IS_ENABLED(CONFIG_INPUT) |
54 | struct input_dev *beep; | 54 | struct input_dev *beep; |
55 | struct work_struct beep_work; | 55 | struct work_struct beep_work; |
56 | int beep_rate; | 56 | int beep_rate; |
@@ -233,7 +233,7 @@ static const struct soc_enum mic_bias_level_enum = | |||
233 | SOC_ENUM_SINGLE(CS42L52_IFACE_CTL2, 0, | 233 | SOC_ENUM_SINGLE(CS42L52_IFACE_CTL2, 0, |
234 | ARRAY_SIZE(mic_bias_level_text), mic_bias_level_text); | 234 | ARRAY_SIZE(mic_bias_level_text), mic_bias_level_text); |
235 | 235 | ||
236 | static const char * const cs42l52_mic_text[] = { "Single", "Differential" }; | 236 | static const char * const cs42l52_mic_text[] = { "MIC1", "MIC2" }; |
237 | 237 | ||
238 | static const struct soc_enum mica_enum = | 238 | static const struct soc_enum mica_enum = |
239 | SOC_ENUM_SINGLE(CS42L52_MICA_CTL, 5, | 239 | SOC_ENUM_SINGLE(CS42L52_MICA_CTL, 5, |
@@ -243,12 +243,6 @@ static const struct soc_enum micb_enum = | |||
243 | SOC_ENUM_SINGLE(CS42L52_MICB_CTL, 5, | 243 | SOC_ENUM_SINGLE(CS42L52_MICB_CTL, 5, |
244 | ARRAY_SIZE(cs42l52_mic_text), cs42l52_mic_text); | 244 | ARRAY_SIZE(cs42l52_mic_text), cs42l52_mic_text); |
245 | 245 | ||
246 | static const struct snd_kcontrol_new mica_mux = | ||
247 | SOC_DAPM_ENUM("Left Mic Input Capture Mux", mica_enum); | ||
248 | |||
249 | static const struct snd_kcontrol_new micb_mux = | ||
250 | SOC_DAPM_ENUM("Right Mic Input Capture Mux", micb_enum); | ||
251 | |||
252 | static const char * const digital_output_mux_text[] = {"ADC", "DSP"}; | 246 | static const char * const digital_output_mux_text[] = {"ADC", "DSP"}; |
253 | 247 | ||
254 | static const struct soc_enum digital_output_mux_enum = | 248 | static const struct soc_enum digital_output_mux_enum = |
@@ -531,6 +525,30 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { | |||
531 | 525 | ||
532 | }; | 526 | }; |
533 | 527 | ||
528 | static const struct snd_kcontrol_new cs42l52_mica_controls[] = { | ||
529 | SOC_ENUM("MICA Select", mica_enum), | ||
530 | }; | ||
531 | |||
532 | static const struct snd_kcontrol_new cs42l52_micb_controls[] = { | ||
533 | SOC_ENUM("MICB Select", micb_enum), | ||
534 | }; | ||
535 | |||
536 | static int cs42l52_add_mic_controls(struct snd_soc_codec *codec) | ||
537 | { | ||
538 | struct cs42l52_private *cs42l52 = snd_soc_codec_get_drvdata(codec); | ||
539 | struct cs42l52_platform_data *pdata = &cs42l52->pdata; | ||
540 | |||
541 | if (!pdata->mica_diff_cfg) | ||
542 | snd_soc_add_codec_controls(codec, cs42l52_mica_controls, | ||
543 | ARRAY_SIZE(cs42l52_mica_controls)); | ||
544 | |||
545 | if (!pdata->micb_diff_cfg) | ||
546 | snd_soc_add_codec_controls(codec, cs42l52_micb_controls, | ||
547 | ARRAY_SIZE(cs42l52_micb_controls)); | ||
548 | |||
549 | return 0; | ||
550 | } | ||
551 | |||
534 | static const struct snd_soc_dapm_widget cs42l52_dapm_widgets[] = { | 552 | static const struct snd_soc_dapm_widget cs42l52_dapm_widgets[] = { |
535 | 553 | ||
536 | SND_SOC_DAPM_INPUT("AIN1L"), | 554 | SND_SOC_DAPM_INPUT("AIN1L"), |
@@ -550,9 +568,6 @@ static const struct snd_soc_dapm_widget cs42l52_dapm_widgets[] = { | |||
550 | SND_SOC_DAPM_AIF_OUT("AIFOUTR", NULL, 0, | 568 | SND_SOC_DAPM_AIF_OUT("AIFOUTR", NULL, 0, |
551 | SND_SOC_NOPM, 0, 0), | 569 | SND_SOC_NOPM, 0, 0), |
552 | 570 | ||
553 | SND_SOC_DAPM_MUX("MICA Mux", SND_SOC_NOPM, 0, 0, &mica_mux), | ||
554 | SND_SOC_DAPM_MUX("MICB Mux", SND_SOC_NOPM, 0, 0, &micb_mux), | ||
555 | |||
556 | SND_SOC_DAPM_ADC("ADC Left", NULL, CS42L52_PWRCTL1, 1, 1), | 571 | SND_SOC_DAPM_ADC("ADC Left", NULL, CS42L52_PWRCTL1, 1, 1), |
557 | SND_SOC_DAPM_ADC("ADC Right", NULL, CS42L52_PWRCTL1, 2, 1), | 572 | SND_SOC_DAPM_ADC("ADC Right", NULL, CS42L52_PWRCTL1, 2, 1), |
558 | SND_SOC_DAPM_PGA("PGA Left", CS42L52_PWRCTL1, 3, 1, NULL, 0), | 573 | SND_SOC_DAPM_PGA("PGA Left", CS42L52_PWRCTL1, 3, 1, NULL, 0), |
@@ -953,7 +968,7 @@ static int cs42l52_resume(struct snd_soc_codec *codec) | |||
953 | return 0; | 968 | return 0; |
954 | } | 969 | } |
955 | 970 | ||
956 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) | 971 | #if IS_ENABLED(CONFIG_INPUT) |
957 | static int beep_rates[] = { | 972 | static int beep_rates[] = { |
958 | 261, 522, 585, 667, 706, 774, 889, 1000, | 973 | 261, 522, 585, 667, 706, 774, 889, 1000, |
959 | 1043, 1200, 1333, 1412, 1600, 1714, 2000, 2182 | 974 | 1043, 1200, 1333, 1412, 1600, 1714, 2000, 2182 |
@@ -1110,6 +1125,8 @@ static int cs42l52_probe(struct snd_soc_codec *codec) | |||
1110 | } | 1125 | } |
1111 | regcache_cache_only(cs42l52->regmap, true); | 1126 | regcache_cache_only(cs42l52->regmap, true); |
1112 | 1127 | ||
1128 | cs42l52_add_mic_controls(codec); | ||
1129 | |||
1113 | cs42l52_init_beep(codec); | 1130 | cs42l52_init_beep(codec); |
1114 | 1131 | ||
1115 | cs42l52_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 1132 | cs42l52_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
@@ -1176,6 +1193,7 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, | |||
1176 | int ret; | 1193 | int ret; |
1177 | unsigned int devid = 0; | 1194 | unsigned int devid = 0; |
1178 | unsigned int reg; | 1195 | unsigned int reg; |
1196 | u32 val32; | ||
1179 | 1197 | ||
1180 | cs42l52 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l52_private), | 1198 | cs42l52 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l52_private), |
1181 | GFP_KERNEL); | 1199 | GFP_KERNEL); |
@@ -1189,9 +1207,39 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, | |||
1189 | dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); | 1207 | dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); |
1190 | return ret; | 1208 | return ret; |
1191 | } | 1209 | } |
1192 | 1210 | if (pdata) { | |
1193 | if (pdata) | 1211 | cs42l52->pdata = *pdata; |
1212 | } else { | ||
1213 | pdata = devm_kzalloc(&i2c_client->dev, | ||
1214 | sizeof(struct cs42l52_platform_data), | ||
1215 | GFP_KERNEL); | ||
1216 | if (!pdata) { | ||
1217 | dev_err(&i2c_client->dev, "could not allocate pdata\n"); | ||
1218 | return -ENOMEM; | ||
1219 | } | ||
1220 | if (i2c_client->dev.of_node) { | ||
1221 | if (of_property_read_bool(i2c_client->dev.of_node, | ||
1222 | "cirrus,mica-differential-cfg")) | ||
1223 | pdata->mica_diff_cfg = true; | ||
1224 | |||
1225 | if (of_property_read_bool(i2c_client->dev.of_node, | ||
1226 | "cirrus,micb-differential-cfg")) | ||
1227 | pdata->micb_diff_cfg = true; | ||
1228 | |||
1229 | if (of_property_read_u32(i2c_client->dev.of_node, | ||
1230 | "cirrus,micbias-lvl", &val32) >= 0) | ||
1231 | pdata->micbias_lvl = val32; | ||
1232 | |||
1233 | if (of_property_read_u32(i2c_client->dev.of_node, | ||
1234 | "cirrus,chgfreq-divisor", &val32) >= 0) | ||
1235 | pdata->chgfreq = val32; | ||
1236 | |||
1237 | pdata->reset_gpio = | ||
1238 | of_get_named_gpio(i2c_client->dev.of_node, | ||
1239 | "cirrus,reset-gpio", 0); | ||
1240 | } | ||
1194 | cs42l52->pdata = *pdata; | 1241 | cs42l52->pdata = *pdata; |
1242 | } | ||
1195 | 1243 | ||
1196 | if (cs42l52->pdata.reset_gpio) { | 1244 | if (cs42l52->pdata.reset_gpio) { |
1197 | ret = gpio_request_one(cs42l52->pdata.reset_gpio, | 1245 | ret = gpio_request_one(cs42l52->pdata.reset_gpio, |
@@ -1227,29 +1275,18 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, | |||
1227 | reg & 0xFF); | 1275 | reg & 0xFF); |
1228 | 1276 | ||
1229 | /* Set Platform Data */ | 1277 | /* Set Platform Data */ |
1230 | if (cs42l52->pdata.mica_cfg) | 1278 | if (cs42l52->pdata.mica_diff_cfg) |
1231 | regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, | 1279 | regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, |
1232 | CS42L52_MIC_CTL_TYPE_MASK, | 1280 | CS42L52_MIC_CTL_TYPE_MASK, |
1233 | cs42l52->pdata.mica_cfg << | 1281 | cs42l52->pdata.mica_diff_cfg << |
1234 | CS42L52_MIC_CTL_TYPE_SHIFT); | 1282 | CS42L52_MIC_CTL_TYPE_SHIFT); |
1235 | 1283 | ||
1236 | if (cs42l52->pdata.micb_cfg) | 1284 | if (cs42l52->pdata.micb_diff_cfg) |
1237 | regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, | 1285 | regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, |
1238 | CS42L52_MIC_CTL_TYPE_MASK, | 1286 | CS42L52_MIC_CTL_TYPE_MASK, |
1239 | cs42l52->pdata.micb_cfg << | 1287 | cs42l52->pdata.micb_diff_cfg << |
1240 | CS42L52_MIC_CTL_TYPE_SHIFT); | 1288 | CS42L52_MIC_CTL_TYPE_SHIFT); |
1241 | 1289 | ||
1242 | if (cs42l52->pdata.mica_sel) | ||
1243 | regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, | ||
1244 | CS42L52_MIC_CTL_MIC_SEL_MASK, | ||
1245 | cs42l52->pdata.mica_sel << | ||
1246 | CS42L52_MIC_CTL_MIC_SEL_SHIFT); | ||
1247 | if (cs42l52->pdata.micb_sel) | ||
1248 | regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, | ||
1249 | CS42L52_MIC_CTL_MIC_SEL_MASK, | ||
1250 | cs42l52->pdata.micb_sel << | ||
1251 | CS42L52_MIC_CTL_MIC_SEL_SHIFT); | ||
1252 | |||
1253 | if (cs42l52->pdata.chgfreq) | 1290 | if (cs42l52->pdata.chgfreq) |
1254 | regmap_update_bits(cs42l52->regmap, CS42L52_CHARGE_PUMP, | 1291 | regmap_update_bits(cs42l52->regmap, CS42L52_CHARGE_PUMP, |
1255 | CS42L52_CHARGE_PUMP_MASK, | 1292 | CS42L52_CHARGE_PUMP_MASK, |
@@ -1274,6 +1311,13 @@ static int cs42l52_i2c_remove(struct i2c_client *client) | |||
1274 | return 0; | 1311 | return 0; |
1275 | } | 1312 | } |
1276 | 1313 | ||
1314 | static const struct of_device_id cs42l52_of_match[] = { | ||
1315 | { .compatible = "cirrus,cs42l52", }, | ||
1316 | {}, | ||
1317 | }; | ||
1318 | MODULE_DEVICE_TABLE(of, cs42l52_of_match); | ||
1319 | |||
1320 | |||
1277 | static const struct i2c_device_id cs42l52_id[] = { | 1321 | static const struct i2c_device_id cs42l52_id[] = { |
1278 | { "cs42l52", 0 }, | 1322 | { "cs42l52", 0 }, |
1279 | { } | 1323 | { } |
@@ -1284,6 +1328,7 @@ static struct i2c_driver cs42l52_i2c_driver = { | |||
1284 | .driver = { | 1328 | .driver = { |
1285 | .name = "cs42l52", | 1329 | .name = "cs42l52", |
1286 | .owner = THIS_MODULE, | 1330 | .owner = THIS_MODULE, |
1331 | .of_match_table = cs42l52_of_match, | ||
1287 | }, | 1332 | }, |
1288 | .id_table = cs42l52_id, | 1333 | .id_table = cs42l52_id, |
1289 | .probe = cs42l52_i2c_probe, | 1334 | .probe = cs42l52_i2c_probe, |
diff --git a/sound/soc/codecs/da7210.c b/sound/soc/codecs/da7210.c index 9c1231456502..e62e294a8033 100644 --- a/sound/soc/codecs/da7210.c +++ b/sound/soc/codecs/da7210.c | |||
@@ -778,17 +778,17 @@ static int da7210_hw_params(struct snd_pcm_substream *substream, | |||
778 | 778 | ||
779 | dai_cfg1 = 0xFC & snd_soc_read(codec, DA7210_DAI_CFG1); | 779 | dai_cfg1 = 0xFC & snd_soc_read(codec, DA7210_DAI_CFG1); |
780 | 780 | ||
781 | switch (params_format(params)) { | 781 | switch (params_width(params)) { |
782 | case SNDRV_PCM_FORMAT_S16_LE: | 782 | case 16: |
783 | dai_cfg1 |= DA7210_DAI_WORD_S16_LE; | 783 | dai_cfg1 |= DA7210_DAI_WORD_S16_LE; |
784 | break; | 784 | break; |
785 | case SNDRV_PCM_FORMAT_S20_3LE: | 785 | case 20: |
786 | dai_cfg1 |= DA7210_DAI_WORD_S20_3LE; | 786 | dai_cfg1 |= DA7210_DAI_WORD_S20_3LE; |
787 | break; | 787 | break; |
788 | case SNDRV_PCM_FORMAT_S24_LE: | 788 | case 24: |
789 | dai_cfg1 |= DA7210_DAI_WORD_S24_LE; | 789 | dai_cfg1 |= DA7210_DAI_WORD_S24_LE; |
790 | break; | 790 | break; |
791 | case SNDRV_PCM_FORMAT_S32_LE: | 791 | case 32: |
792 | dai_cfg1 |= DA7210_DAI_WORD_S32_LE; | 792 | dai_cfg1 |= DA7210_DAI_WORD_S32_LE; |
793 | break; | 793 | break; |
794 | default: | 794 | default: |
@@ -1188,7 +1188,7 @@ static struct snd_soc_codec_driver soc_codec_dev_da7210 = { | |||
1188 | .num_dapm_routes = ARRAY_SIZE(da7210_audio_map), | 1188 | .num_dapm_routes = ARRAY_SIZE(da7210_audio_map), |
1189 | }; | 1189 | }; |
1190 | 1190 | ||
1191 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1191 | #if IS_ENABLED(CONFIG_I2C) |
1192 | 1192 | ||
1193 | static struct reg_default da7210_regmap_i2c_patch[] = { | 1193 | static struct reg_default da7210_regmap_i2c_patch[] = { |
1194 | 1194 | ||
@@ -1362,7 +1362,7 @@ static struct spi_driver da7210_spi_driver = { | |||
1362 | static int __init da7210_modinit(void) | 1362 | static int __init da7210_modinit(void) |
1363 | { | 1363 | { |
1364 | int ret = 0; | 1364 | int ret = 0; |
1365 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1365 | #if IS_ENABLED(CONFIG_I2C) |
1366 | ret = i2c_add_driver(&da7210_i2c_driver); | 1366 | ret = i2c_add_driver(&da7210_i2c_driver); |
1367 | #endif | 1367 | #endif |
1368 | #if defined(CONFIG_SPI_MASTER) | 1368 | #if defined(CONFIG_SPI_MASTER) |
@@ -1378,7 +1378,7 @@ module_init(da7210_modinit); | |||
1378 | 1378 | ||
1379 | static void __exit da7210_exit(void) | 1379 | static void __exit da7210_exit(void) |
1380 | { | 1380 | { |
1381 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1381 | #if IS_ENABLED(CONFIG_I2C) |
1382 | i2c_del_driver(&da7210_i2c_driver); | 1382 | i2c_del_driver(&da7210_i2c_driver); |
1383 | #endif | 1383 | #endif |
1384 | #if defined(CONFIG_SPI_MASTER) | 1384 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/da7213.c b/sound/soc/codecs/da7213.c index 4a6f1daf911f..0c77e7ad7423 100644 --- a/sound/soc/codecs/da7213.c +++ b/sound/soc/codecs/da7213.c | |||
@@ -1067,17 +1067,17 @@ static int da7213_hw_params(struct snd_pcm_substream *substream, | |||
1067 | u8 fs; | 1067 | u8 fs; |
1068 | 1068 | ||
1069 | /* Set DAI format */ | 1069 | /* Set DAI format */ |
1070 | switch (params_format(params)) { | 1070 | switch (params_width(params)) { |
1071 | case SNDRV_PCM_FORMAT_S16_LE: | 1071 | case 16: |
1072 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE; | 1072 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE; |
1073 | break; | 1073 | break; |
1074 | case SNDRV_PCM_FORMAT_S20_3LE: | 1074 | case 20: |
1075 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE; | 1075 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE; |
1076 | break; | 1076 | break; |
1077 | case SNDRV_PCM_FORMAT_S24_LE: | 1077 | case 24: |
1078 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE; | 1078 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE; |
1079 | break; | 1079 | break; |
1080 | case SNDRV_PCM_FORMAT_S32_LE: | 1080 | case 32: |
1081 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE; | 1081 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE; |
1082 | break; | 1082 | break; |
1083 | default: | 1083 | default: |
diff --git a/sound/soc/codecs/da732x.c b/sound/soc/codecs/da732x.c index dc0284dc9e6f..f295b6569910 100644 --- a/sound/soc/codecs/da732x.c +++ b/sound/soc/codecs/da732x.c | |||
@@ -973,17 +973,17 @@ static int da732x_hw_params(struct snd_pcm_substream *substream, | |||
973 | 973 | ||
974 | reg_aif = dai->driver->base; | 974 | reg_aif = dai->driver->base; |
975 | 975 | ||
976 | switch (params_format(params)) { | 976 | switch (params_width(params)) { |
977 | case SNDRV_PCM_FORMAT_S16_LE: | 977 | case 16: |
978 | aif |= DA732X_AIF_WORD_16; | 978 | aif |= DA732X_AIF_WORD_16; |
979 | break; | 979 | break; |
980 | case SNDRV_PCM_FORMAT_S20_3LE: | 980 | case 20: |
981 | aif |= DA732X_AIF_WORD_20; | 981 | aif |= DA732X_AIF_WORD_20; |
982 | break; | 982 | break; |
983 | case SNDRV_PCM_FORMAT_S24_LE: | 983 | case 24: |
984 | aif |= DA732X_AIF_WORD_24; | 984 | aif |= DA732X_AIF_WORD_24; |
985 | break; | 985 | break; |
986 | case SNDRV_PCM_FORMAT_S32_LE: | 986 | case 32: |
987 | aif |= DA732X_AIF_WORD_32; | 987 | aif |= DA732X_AIF_WORD_32; |
988 | break; | 988 | break; |
989 | default: | 989 | default: |
diff --git a/sound/soc/codecs/da9055.c b/sound/soc/codecs/da9055.c index fc9802d1281d..52b79a487ac7 100644 --- a/sound/soc/codecs/da9055.c +++ b/sound/soc/codecs/da9055.c | |||
@@ -1058,17 +1058,17 @@ static int da9055_hw_params(struct snd_pcm_substream *substream, | |||
1058 | u8 aif_ctrl, fs; | 1058 | u8 aif_ctrl, fs; |
1059 | u32 sysclk; | 1059 | u32 sysclk; |
1060 | 1060 | ||
1061 | switch (params_format(params)) { | 1061 | switch (params_width(params)) { |
1062 | case SNDRV_PCM_FORMAT_S16_LE: | 1062 | case 16: |
1063 | aif_ctrl = DA9055_AIF_WORD_S16_LE; | 1063 | aif_ctrl = DA9055_AIF_WORD_S16_LE; |
1064 | break; | 1064 | break; |
1065 | case SNDRV_PCM_FORMAT_S20_3LE: | 1065 | case 20: |
1066 | aif_ctrl = DA9055_AIF_WORD_S20_3LE; | 1066 | aif_ctrl = DA9055_AIF_WORD_S20_3LE; |
1067 | break; | 1067 | break; |
1068 | case SNDRV_PCM_FORMAT_S24_LE: | 1068 | case 24: |
1069 | aif_ctrl = DA9055_AIF_WORD_S24_LE; | 1069 | aif_ctrl = DA9055_AIF_WORD_S24_LE; |
1070 | break; | 1070 | break; |
1071 | case SNDRV_PCM_FORMAT_S32_LE: | 1071 | case 32: |
1072 | aif_ctrl = DA9055_AIF_WORD_S32_LE; | 1072 | aif_ctrl = DA9055_AIF_WORD_S32_LE; |
1073 | break; | 1073 | break; |
1074 | default: | 1074 | default: |
diff --git a/sound/soc/codecs/hdmi.c b/sound/soc/codecs/hdmi.c index 68342b121c96..9cb1c7d3e1dc 100644 --- a/sound/soc/codecs/hdmi.c +++ b/sound/soc/codecs/hdmi.c | |||
@@ -20,6 +20,7 @@ | |||
20 | */ | 20 | */ |
21 | #include <linux/module.h> | 21 | #include <linux/module.h> |
22 | #include <sound/soc.h> | 22 | #include <sound/soc.h> |
23 | #include <linux/of_device.h> | ||
23 | 24 | ||
24 | #define DRV_NAME "hdmi-audio-codec" | 25 | #define DRV_NAME "hdmi-audio-codec" |
25 | 26 | ||
@@ -44,7 +45,7 @@ static struct snd_soc_dai_driver hdmi_codec_dai = { | |||
44 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | | 45 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | |
45 | SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000, | 46 | SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000, |
46 | .formats = SNDRV_PCM_FMTBIT_S16_LE | | 47 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
47 | SNDRV_PCM_FMTBIT_S24_LE, | 48 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE, |
48 | }, | 49 | }, |
49 | .capture = { | 50 | .capture = { |
50 | .stream_name = "Capture", | 51 | .stream_name = "Capture", |
@@ -60,6 +61,14 @@ static struct snd_soc_dai_driver hdmi_codec_dai = { | |||
60 | 61 | ||
61 | }; | 62 | }; |
62 | 63 | ||
64 | #ifdef CONFIG_OF | ||
65 | static const struct of_device_id hdmi_audio_codec_ids[] = { | ||
66 | { .compatible = "linux,hdmi-audio", }, | ||
67 | { } | ||
68 | }; | ||
69 | MODULE_DEVICE_TABLE(of, hdmi_audio_codec_ids); | ||
70 | #endif | ||
71 | |||
63 | static struct snd_soc_codec_driver hdmi_codec = { | 72 | static struct snd_soc_codec_driver hdmi_codec = { |
64 | .dapm_widgets = hdmi_widgets, | 73 | .dapm_widgets = hdmi_widgets, |
65 | .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets), | 74 | .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets), |
@@ -83,6 +92,7 @@ static struct platform_driver hdmi_codec_driver = { | |||
83 | .driver = { | 92 | .driver = { |
84 | .name = DRV_NAME, | 93 | .name = DRV_NAME, |
85 | .owner = THIS_MODULE, | 94 | .owner = THIS_MODULE, |
95 | .of_match_table = of_match_ptr(hdmi_audio_codec_ids), | ||
86 | }, | 96 | }, |
87 | 97 | ||
88 | .probe = hdmi_codec_probe, | 98 | .probe = hdmi_codec_probe, |
diff --git a/sound/soc/codecs/isabelle.c b/sound/soc/codecs/isabelle.c index 53b455b8c07a..5839048ec467 100644 --- a/sound/soc/codecs/isabelle.c +++ b/sound/soc/codecs/isabelle.c | |||
@@ -951,11 +951,11 @@ static int isabelle_hw_params(struct snd_pcm_substream *substream, | |||
951 | ISABELLE_FS_RATE_MASK, fs_val); | 951 | ISABELLE_FS_RATE_MASK, fs_val); |
952 | 952 | ||
953 | /* bit size */ | 953 | /* bit size */ |
954 | switch (params_format(params)) { | 954 | switch (params_width(params)) { |
955 | case SNDRV_PCM_FORMAT_S20_3LE: | 955 | case 20: |
956 | aif |= ISABELLE_AIF_LENGTH_20; | 956 | aif |= ISABELLE_AIF_LENGTH_20; |
957 | break; | 957 | break; |
958 | case SNDRV_PCM_FORMAT_S32_LE: | 958 | case 32: |
959 | aif |= ISABELLE_AIF_LENGTH_32; | 959 | aif |= ISABELLE_AIF_LENGTH_32; |
960 | break; | 960 | break; |
961 | default: | 961 | default: |
diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c index 53d7dab4e054..ee660e2d3df3 100644 --- a/sound/soc/codecs/max98088.c +++ b/sound/soc/codecs/max98088.c | |||
@@ -1233,12 +1233,12 @@ static int max98088_dai1_hw_params(struct snd_pcm_substream *substream, | |||
1233 | 1233 | ||
1234 | rate = params_rate(params); | 1234 | rate = params_rate(params); |
1235 | 1235 | ||
1236 | switch (params_format(params)) { | 1236 | switch (params_width(params)) { |
1237 | case SNDRV_PCM_FORMAT_S16_LE: | 1237 | case 16: |
1238 | snd_soc_update_bits(codec, M98088_REG_14_DAI1_FORMAT, | 1238 | snd_soc_update_bits(codec, M98088_REG_14_DAI1_FORMAT, |
1239 | M98088_DAI_WS, 0); | 1239 | M98088_DAI_WS, 0); |
1240 | break; | 1240 | break; |
1241 | case SNDRV_PCM_FORMAT_S24_LE: | 1241 | case 24: |
1242 | snd_soc_update_bits(codec, M98088_REG_14_DAI1_FORMAT, | 1242 | snd_soc_update_bits(codec, M98088_REG_14_DAI1_FORMAT, |
1243 | M98088_DAI_WS, M98088_DAI_WS); | 1243 | M98088_DAI_WS, M98088_DAI_WS); |
1244 | break; | 1244 | break; |
diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c index 0569a4c3ae00..51f9b3d16b41 100644 --- a/sound/soc/codecs/max98090.c +++ b/sound/soc/codecs/max98090.c | |||
@@ -1840,8 +1840,8 @@ static int max98090_dai_hw_params(struct snd_pcm_substream *substream, | |||
1840 | 1840 | ||
1841 | max98090->lrclk = params_rate(params); | 1841 | max98090->lrclk = params_rate(params); |
1842 | 1842 | ||
1843 | switch (params_format(params)) { | 1843 | switch (params_width(params)) { |
1844 | case SNDRV_PCM_FORMAT_S16_LE: | 1844 | case 16: |
1845 | snd_soc_update_bits(codec, M98090_REG_INTERFACE_FORMAT, | 1845 | snd_soc_update_bits(codec, M98090_REG_INTERFACE_FORMAT, |
1846 | M98090_WS_MASK, 0); | 1846 | M98090_WS_MASK, 0); |
1847 | break; | 1847 | break; |
diff --git a/sound/soc/codecs/max98095.c b/sound/soc/codecs/max98095.c index 67244315c721..3ba1170ebb53 100644 --- a/sound/soc/codecs/max98095.c +++ b/sound/soc/codecs/max98095.c | |||
@@ -1213,12 +1213,12 @@ static int max98095_dai1_hw_params(struct snd_pcm_substream *substream, | |||
1213 | 1213 | ||
1214 | rate = params_rate(params); | 1214 | rate = params_rate(params); |
1215 | 1215 | ||
1216 | switch (params_format(params)) { | 1216 | switch (params_width(params)) { |
1217 | case SNDRV_PCM_FORMAT_S16_LE: | 1217 | case 16: |
1218 | snd_soc_update_bits(codec, M98095_02A_DAI1_FORMAT, | 1218 | snd_soc_update_bits(codec, M98095_02A_DAI1_FORMAT, |
1219 | M98095_DAI_WS, 0); | 1219 | M98095_DAI_WS, 0); |
1220 | break; | 1220 | break; |
1221 | case SNDRV_PCM_FORMAT_S24_LE: | 1221 | case 24: |
1222 | snd_soc_update_bits(codec, M98095_02A_DAI1_FORMAT, | 1222 | snd_soc_update_bits(codec, M98095_02A_DAI1_FORMAT, |
1223 | M98095_DAI_WS, M98095_DAI_WS); | 1223 | M98095_DAI_WS, M98095_DAI_WS); |
1224 | break; | 1224 | break; |
diff --git a/sound/soc/codecs/max9850.c b/sound/soc/codecs/max9850.c index c5dd61785f8d..82757ebf0301 100644 --- a/sound/soc/codecs/max9850.c +++ b/sound/soc/codecs/max9850.c | |||
@@ -149,14 +149,14 @@ static int max9850_hw_params(struct snd_pcm_substream *substream, | |||
149 | snd_soc_write(codec, MAX9850_LRCLK_MSB, (lrclk_div >> 8) & 0x7f); | 149 | snd_soc_write(codec, MAX9850_LRCLK_MSB, (lrclk_div >> 8) & 0x7f); |
150 | snd_soc_write(codec, MAX9850_LRCLK_LSB, lrclk_div & 0xff); | 150 | snd_soc_write(codec, MAX9850_LRCLK_LSB, lrclk_div & 0xff); |
151 | 151 | ||
152 | switch (params_format(params)) { | 152 | switch (params_width(params)) { |
153 | case SNDRV_PCM_FORMAT_S16_LE: | 153 | case 16: |
154 | da = 0; | 154 | da = 0; |
155 | break; | 155 | break; |
156 | case SNDRV_PCM_FORMAT_S20_3LE: | 156 | case 20: |
157 | da = 0x2; | 157 | da = 0x2; |
158 | break; | 158 | break; |
159 | case SNDRV_PCM_FORMAT_S24_LE: | 159 | case 24: |
160 | da = 0x3; | 160 | da = 0x3; |
161 | break; | 161 | break; |
162 | default: | 162 | default: |
diff --git a/sound/soc/codecs/mc13783.c b/sound/soc/codecs/mc13783.c index bae60164c7b7..582c2bbd42cb 100644 --- a/sound/soc/codecs/mc13783.c +++ b/sound/soc/codecs/mc13783.c | |||
@@ -750,30 +750,26 @@ static struct snd_soc_codec_driver soc_codec_dev_mc13783 = { | |||
750 | .num_dapm_routes = ARRAY_SIZE(mc13783_routes), | 750 | .num_dapm_routes = ARRAY_SIZE(mc13783_routes), |
751 | }; | 751 | }; |
752 | 752 | ||
753 | static int mc13783_codec_probe(struct platform_device *pdev) | 753 | static int __init mc13783_codec_probe(struct platform_device *pdev) |
754 | { | 754 | { |
755 | struct mc13xxx *mc13xxx; | ||
756 | struct mc13783_priv *priv; | 755 | struct mc13783_priv *priv; |
757 | struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data; | 756 | struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data; |
758 | int ret; | 757 | int ret; |
759 | 758 | ||
760 | mc13xxx = dev_get_drvdata(pdev->dev.parent); | ||
761 | |||
762 | |||
763 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); | 759 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); |
764 | if (priv == NULL) | 760 | if (!priv) |
765 | return -ENOMEM; | 761 | return -ENOMEM; |
766 | 762 | ||
767 | dev_set_drvdata(&pdev->dev, priv); | ||
768 | priv->mc13xxx = mc13xxx; | ||
769 | if (pdata) { | 763 | if (pdata) { |
770 | priv->adc_ssi_port = pdata->adc_ssi_port; | 764 | priv->adc_ssi_port = pdata->adc_ssi_port; |
771 | priv->dac_ssi_port = pdata->dac_ssi_port; | 765 | priv->dac_ssi_port = pdata->dac_ssi_port; |
772 | } else { | 766 | } else { |
773 | priv->adc_ssi_port = MC13783_SSI1_PORT; | 767 | return -ENOSYS; |
774 | priv->dac_ssi_port = MC13783_SSI2_PORT; | ||
775 | } | 768 | } |
776 | 769 | ||
770 | dev_set_drvdata(&pdev->dev, priv); | ||
771 | priv->mc13xxx = dev_get_drvdata(pdev->dev.parent); | ||
772 | |||
777 | if (priv->adc_ssi_port == priv->dac_ssi_port) | 773 | if (priv->adc_ssi_port == priv->dac_ssi_port) |
778 | ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783, | 774 | ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783, |
779 | mc13783_dai_sync, ARRAY_SIZE(mc13783_dai_sync)); | 775 | mc13783_dai_sync, ARRAY_SIZE(mc13783_dai_sync)); |
@@ -781,14 +777,6 @@ static int mc13783_codec_probe(struct platform_device *pdev) | |||
781 | ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783, | 777 | ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783, |
782 | mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async)); | 778 | mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async)); |
783 | 779 | ||
784 | if (ret) | ||
785 | goto err_register_codec; | ||
786 | |||
787 | return 0; | ||
788 | |||
789 | err_register_codec: | ||
790 | dev_err(&pdev->dev, "register codec failed with %d\n", ret); | ||
791 | |||
792 | return ret; | 780 | return ret; |
793 | } | 781 | } |
794 | 782 | ||
@@ -801,14 +789,12 @@ static int mc13783_codec_remove(struct platform_device *pdev) | |||
801 | 789 | ||
802 | static struct platform_driver mc13783_codec_driver = { | 790 | static struct platform_driver mc13783_codec_driver = { |
803 | .driver = { | 791 | .driver = { |
804 | .name = "mc13783-codec", | 792 | .name = "mc13783-codec", |
805 | .owner = THIS_MODULE, | 793 | .owner = THIS_MODULE, |
806 | }, | 794 | }, |
807 | .probe = mc13783_codec_probe, | ||
808 | .remove = mc13783_codec_remove, | 795 | .remove = mc13783_codec_remove, |
809 | }; | 796 | }; |
810 | 797 | module_platform_driver_probe(mc13783_codec_driver, mc13783_codec_probe); | |
811 | module_platform_driver(mc13783_codec_driver); | ||
812 | 798 | ||
813 | MODULE_DESCRIPTION("ASoC MC13783 driver"); | 799 | MODULE_DESCRIPTION("ASoC MC13783 driver"); |
814 | MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>"); | 800 | MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>"); |
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index 1f4093f3f3a1..0fcbe90f3ef2 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c | |||
@@ -115,6 +115,7 @@ struct sgtl5000_priv { | |||
115 | struct ldo_regulator *ldo; | 115 | struct ldo_regulator *ldo; |
116 | struct regmap *regmap; | 116 | struct regmap *regmap; |
117 | struct clk *mclk; | 117 | struct clk *mclk; |
118 | int revision; | ||
118 | }; | 119 | }; |
119 | 120 | ||
120 | /* | 121 | /* |
@@ -1285,41 +1286,45 @@ static int sgtl5000_replace_vddd_with_ldo(struct snd_soc_codec *codec) | |||
1285 | 1286 | ||
1286 | sgtl5000->supplies[VDDD].supply = LDO_CONSUMER_NAME; | 1287 | sgtl5000->supplies[VDDD].supply = LDO_CONSUMER_NAME; |
1287 | 1288 | ||
1288 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies), | ||
1289 | sgtl5000->supplies); | ||
1290 | |||
1291 | if (ret) { | ||
1292 | ldo_regulator_remove(codec); | ||
1293 | dev_err(codec->dev, "Failed to request supplies: %d\n", ret); | ||
1294 | return ret; | ||
1295 | } | ||
1296 | |||
1297 | dev_info(codec->dev, "Using internal LDO instead of VDDD\n"); | 1289 | dev_info(codec->dev, "Using internal LDO instead of VDDD\n"); |
1298 | return 0; | 1290 | return 0; |
1299 | } | 1291 | } |
1300 | 1292 | ||
1301 | static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) | 1293 | static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) |
1302 | { | 1294 | { |
1303 | int reg; | ||
1304 | int ret; | 1295 | int ret; |
1305 | int rev; | ||
1306 | int i; | 1296 | int i; |
1307 | int external_vddd = 0; | 1297 | int external_vddd = 0; |
1308 | struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec); | 1298 | struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec); |
1299 | struct regulator *vddd; | ||
1309 | 1300 | ||
1310 | for (i = 0; i < ARRAY_SIZE(sgtl5000->supplies); i++) | 1301 | for (i = 0; i < ARRAY_SIZE(sgtl5000->supplies); i++) |
1311 | sgtl5000->supplies[i].supply = supply_names[i]; | 1302 | sgtl5000->supplies[i].supply = supply_names[i]; |
1312 | 1303 | ||
1313 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies), | 1304 | /* External VDDD only works before revision 0x11 */ |
1314 | sgtl5000->supplies); | 1305 | if (sgtl5000->revision < 0x11) { |
1315 | if (!ret) | 1306 | vddd = regulator_get_optional(codec->dev, "VDDD"); |
1316 | external_vddd = 1; | 1307 | if (IS_ERR(vddd)) { |
1317 | else { | 1308 | /* See if it's just not registered yet */ |
1309 | if (PTR_ERR(vddd) == -EPROBE_DEFER) | ||
1310 | return -EPROBE_DEFER; | ||
1311 | } else { | ||
1312 | external_vddd = 1; | ||
1313 | regulator_put(vddd); | ||
1314 | } | ||
1315 | } | ||
1316 | |||
1317 | if (!external_vddd) { | ||
1318 | ret = sgtl5000_replace_vddd_with_ldo(codec); | 1318 | ret = sgtl5000_replace_vddd_with_ldo(codec); |
1319 | if (ret) | 1319 | if (ret) |
1320 | return ret; | 1320 | return ret; |
1321 | } | 1321 | } |
1322 | 1322 | ||
1323 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies), | ||
1324 | sgtl5000->supplies); | ||
1325 | if (ret) | ||
1326 | goto err_ldo_remove; | ||
1327 | |||
1323 | ret = regulator_bulk_enable(ARRAY_SIZE(sgtl5000->supplies), | 1328 | ret = regulator_bulk_enable(ARRAY_SIZE(sgtl5000->supplies), |
1324 | sgtl5000->supplies); | 1329 | sgtl5000->supplies); |
1325 | if (ret) | 1330 | if (ret) |
@@ -1328,47 +1333,13 @@ static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) | |||
1328 | /* wait for all power rails bring up */ | 1333 | /* wait for all power rails bring up */ |
1329 | udelay(10); | 1334 | udelay(10); |
1330 | 1335 | ||
1331 | /* | ||
1332 | * workaround for revision 0x11 and later, | ||
1333 | * roll back to use internal LDO | ||
1334 | */ | ||
1335 | |||
1336 | ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ID, ®); | ||
1337 | if (ret) | ||
1338 | goto err_regulator_disable; | ||
1339 | |||
1340 | rev = (reg & SGTL5000_REVID_MASK) >> SGTL5000_REVID_SHIFT; | ||
1341 | |||
1342 | if (external_vddd && rev >= 0x11) { | ||
1343 | /* disable all regulator first */ | ||
1344 | regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies), | ||
1345 | sgtl5000->supplies); | ||
1346 | /* free VDDD regulator */ | ||
1347 | regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies), | ||
1348 | sgtl5000->supplies); | ||
1349 | |||
1350 | ret = sgtl5000_replace_vddd_with_ldo(codec); | ||
1351 | if (ret) | ||
1352 | return ret; | ||
1353 | |||
1354 | ret = regulator_bulk_enable(ARRAY_SIZE(sgtl5000->supplies), | ||
1355 | sgtl5000->supplies); | ||
1356 | if (ret) | ||
1357 | goto err_regulator_free; | ||
1358 | |||
1359 | /* wait for all power rails bring up */ | ||
1360 | udelay(10); | ||
1361 | } | ||
1362 | |||
1363 | return 0; | 1336 | return 0; |
1364 | 1337 | ||
1365 | err_regulator_disable: | ||
1366 | regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies), | ||
1367 | sgtl5000->supplies); | ||
1368 | err_regulator_free: | 1338 | err_regulator_free: |
1369 | regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies), | 1339 | regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies), |
1370 | sgtl5000->supplies); | 1340 | sgtl5000->supplies); |
1371 | if (external_vddd) | 1341 | err_ldo_remove: |
1342 | if (!external_vddd) | ||
1372 | ldo_regulator_remove(codec); | 1343 | ldo_regulator_remove(codec); |
1373 | return ret; | 1344 | return ret; |
1374 | 1345 | ||
@@ -1566,6 +1537,7 @@ static int sgtl5000_i2c_probe(struct i2c_client *client, | |||
1566 | 1537 | ||
1567 | rev = (reg & SGTL5000_REVID_MASK) >> SGTL5000_REVID_SHIFT; | 1538 | rev = (reg & SGTL5000_REVID_MASK) >> SGTL5000_REVID_SHIFT; |
1568 | dev_info(&client->dev, "sgtl5000 revision 0x%x\n", rev); | 1539 | dev_info(&client->dev, "sgtl5000 revision 0x%x\n", rev); |
1540 | sgtl5000->revision = rev; | ||
1569 | 1541 | ||
1570 | i2c_set_clientdata(client, sgtl5000); | 1542 | i2c_set_clientdata(client, sgtl5000); |
1571 | 1543 | ||
diff --git a/sound/soc/codecs/ssm2518.c b/sound/soc/codecs/ssm2518.c index 95aed552139a..cc8debce752f 100644 --- a/sound/soc/codecs/ssm2518.c +++ b/sound/soc/codecs/ssm2518.c | |||
@@ -549,13 +549,13 @@ static int ssm2518_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, | |||
549 | right_slot = 0; | 549 | right_slot = 0; |
550 | } else { | 550 | } else { |
551 | /* We assume the left channel < right channel */ | 551 | /* We assume the left channel < right channel */ |
552 | left_slot = ffs(tx_mask); | 552 | left_slot = __ffs(tx_mask); |
553 | tx_mask &= ~(1 << tx_mask); | 553 | tx_mask &= ~(1 << left_slot); |
554 | if (tx_mask == 0) { | 554 | if (tx_mask == 0) { |
555 | right_slot = left_slot; | 555 | right_slot = left_slot; |
556 | } else { | 556 | } else { |
557 | right_slot = ffs(tx_mask); | 557 | right_slot = __ffs(tx_mask); |
558 | tx_mask &= ~(1 << tx_mask); | 558 | tx_mask &= ~(1 << right_slot); |
559 | } | 559 | } |
560 | } | 560 | } |
561 | 561 | ||
diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c index 492644e67ace..af76bbd1b24f 100644 --- a/sound/soc/codecs/ssm2602.c +++ b/sound/soc/codecs/ssm2602.c | |||
@@ -53,8 +53,6 @@ enum ssm2602_type { | |||
53 | struct ssm2602_priv { | 53 | struct ssm2602_priv { |
54 | unsigned int sysclk; | 54 | unsigned int sysclk; |
55 | struct snd_pcm_hw_constraint_list *sysclk_constraints; | 55 | struct snd_pcm_hw_constraint_list *sysclk_constraints; |
56 | struct snd_pcm_substream *master_substream; | ||
57 | struct snd_pcm_substream *slave_substream; | ||
58 | 56 | ||
59 | struct regmap *regmap; | 57 | struct regmap *regmap; |
60 | 58 | ||
@@ -196,7 +194,7 @@ static const struct snd_soc_dapm_route ssm2604_routes[] = { | |||
196 | }; | 194 | }; |
197 | 195 | ||
198 | static const unsigned int ssm2602_rates_12288000[] = { | 196 | static const unsigned int ssm2602_rates_12288000[] = { |
199 | 8000, 32000, 48000, 96000, | 197 | 8000, 16000, 32000, 48000, 96000, |
200 | }; | 198 | }; |
201 | 199 | ||
202 | static struct snd_pcm_hw_constraint_list ssm2602_constraints_12288000 = { | 200 | static struct snd_pcm_hw_constraint_list ssm2602_constraints_12288000 = { |
@@ -233,6 +231,11 @@ static const struct ssm2602_coeff ssm2602_coeff_table[] = { | |||
233 | {18432000, 32000, SSM2602_COEFF_SRATE(0x6, 0x1, 0x0)}, | 231 | {18432000, 32000, SSM2602_COEFF_SRATE(0x6, 0x1, 0x0)}, |
234 | {12000000, 32000, SSM2602_COEFF_SRATE(0x6, 0x0, 0x1)}, | 232 | {12000000, 32000, SSM2602_COEFF_SRATE(0x6, 0x0, 0x1)}, |
235 | 233 | ||
234 | /* 16k */ | ||
235 | {12288000, 16000, SSM2602_COEFF_SRATE(0x5, 0x0, 0x0)}, | ||
236 | {18432000, 16000, SSM2602_COEFF_SRATE(0x5, 0x1, 0x0)}, | ||
237 | {12000000, 16000, SSM2602_COEFF_SRATE(0xa, 0x0, 0x1)}, | ||
238 | |||
236 | /* 8k */ | 239 | /* 8k */ |
237 | {12288000, 8000, SSM2602_COEFF_SRATE(0x3, 0x0, 0x0)}, | 240 | {12288000, 8000, SSM2602_COEFF_SRATE(0x3, 0x0, 0x0)}, |
238 | {18432000, 8000, SSM2602_COEFF_SRATE(0x3, 0x1, 0x0)}, | 241 | {18432000, 8000, SSM2602_COEFF_SRATE(0x3, 0x1, 0x0)}, |
@@ -277,11 +280,6 @@ static int ssm2602_hw_params(struct snd_pcm_substream *substream, | |||
277 | int srate = ssm2602_get_coeff(ssm2602->sysclk, params_rate(params)); | 280 | int srate = ssm2602_get_coeff(ssm2602->sysclk, params_rate(params)); |
278 | unsigned int iface; | 281 | unsigned int iface; |
279 | 282 | ||
280 | if (substream == ssm2602->slave_substream) { | ||
281 | dev_dbg(codec->dev, "Ignoring hw_params for slave substream\n"); | ||
282 | return 0; | ||
283 | } | ||
284 | |||
285 | if (srate < 0) | 283 | if (srate < 0) |
286 | return srate; | 284 | return srate; |
287 | 285 | ||
@@ -314,33 +312,6 @@ static int ssm2602_startup(struct snd_pcm_substream *substream, | |||
314 | { | 312 | { |
315 | struct snd_soc_codec *codec = dai->codec; | 313 | struct snd_soc_codec *codec = dai->codec; |
316 | struct ssm2602_priv *ssm2602 = snd_soc_codec_get_drvdata(codec); | 314 | struct ssm2602_priv *ssm2602 = snd_soc_codec_get_drvdata(codec); |
317 | struct snd_pcm_runtime *master_runtime; | ||
318 | |||
319 | /* The DAI has shared clocks so if we already have a playback or | ||
320 | * capture going then constrain this substream to match it. | ||
321 | * TODO: the ssm2602 allows pairs of non-matching PB/REC rates | ||
322 | */ | ||
323 | if (ssm2602->master_substream) { | ||
324 | master_runtime = ssm2602->master_substream->runtime; | ||
325 | dev_dbg(codec->dev, "Constraining to %d bits at %dHz\n", | ||
326 | master_runtime->sample_bits, | ||
327 | master_runtime->rate); | ||
328 | |||
329 | if (master_runtime->rate != 0) | ||
330 | snd_pcm_hw_constraint_minmax(substream->runtime, | ||
331 | SNDRV_PCM_HW_PARAM_RATE, | ||
332 | master_runtime->rate, | ||
333 | master_runtime->rate); | ||
334 | |||
335 | if (master_runtime->sample_bits != 0) | ||
336 | snd_pcm_hw_constraint_minmax(substream->runtime, | ||
337 | SNDRV_PCM_HW_PARAM_SAMPLE_BITS, | ||
338 | master_runtime->sample_bits, | ||
339 | master_runtime->sample_bits); | ||
340 | |||
341 | ssm2602->slave_substream = substream; | ||
342 | } else | ||
343 | ssm2602->master_substream = substream; | ||
344 | 315 | ||
345 | if (ssm2602->sysclk_constraints) { | 316 | if (ssm2602->sysclk_constraints) { |
346 | snd_pcm_hw_constraint_list(substream->runtime, 0, | 317 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
@@ -351,19 +322,6 @@ static int ssm2602_startup(struct snd_pcm_substream *substream, | |||
351 | return 0; | 322 | return 0; |
352 | } | 323 | } |
353 | 324 | ||
354 | static void ssm2602_shutdown(struct snd_pcm_substream *substream, | ||
355 | struct snd_soc_dai *dai) | ||
356 | { | ||
357 | struct snd_soc_codec *codec = dai->codec; | ||
358 | struct ssm2602_priv *ssm2602 = snd_soc_codec_get_drvdata(codec); | ||
359 | |||
360 | if (ssm2602->master_substream == substream) | ||
361 | ssm2602->master_substream = ssm2602->slave_substream; | ||
362 | |||
363 | ssm2602->slave_substream = NULL; | ||
364 | } | ||
365 | |||
366 | |||
367 | static int ssm2602_mute(struct snd_soc_dai *dai, int mute) | 325 | static int ssm2602_mute(struct snd_soc_dai *dai, int mute) |
368 | { | 326 | { |
369 | struct ssm2602_priv *ssm2602 = snd_soc_codec_get_drvdata(dai->codec); | 327 | struct ssm2602_priv *ssm2602 = snd_soc_codec_get_drvdata(dai->codec); |
@@ -520,9 +478,10 @@ static int ssm2602_set_bias_level(struct snd_soc_codec *codec, | |||
520 | return 0; | 478 | return 0; |
521 | } | 479 | } |
522 | 480 | ||
523 | #define SSM2602_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_32000 |\ | 481 | #define SSM2602_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ |
524 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ | 482 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ |
525 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | 483 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\ |
484 | SNDRV_PCM_RATE_96000) | ||
526 | 485 | ||
527 | #define SSM2602_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | 486 | #define SSM2602_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
528 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | 487 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
@@ -530,7 +489,6 @@ static int ssm2602_set_bias_level(struct snd_soc_codec *codec, | |||
530 | static const struct snd_soc_dai_ops ssm2602_dai_ops = { | 489 | static const struct snd_soc_dai_ops ssm2602_dai_ops = { |
531 | .startup = ssm2602_startup, | 490 | .startup = ssm2602_startup, |
532 | .hw_params = ssm2602_hw_params, | 491 | .hw_params = ssm2602_hw_params, |
533 | .shutdown = ssm2602_shutdown, | ||
534 | .digital_mute = ssm2602_mute, | 492 | .digital_mute = ssm2602_mute, |
535 | .set_sysclk = ssm2602_set_dai_sysclk, | 493 | .set_sysclk = ssm2602_set_dai_sysclk, |
536 | .set_fmt = ssm2602_set_dai_fmt, | 494 | .set_fmt = ssm2602_set_dai_fmt, |
@@ -551,6 +509,8 @@ static struct snd_soc_dai_driver ssm2602_dai = { | |||
551 | .rates = SSM2602_RATES, | 509 | .rates = SSM2602_RATES, |
552 | .formats = SSM2602_FORMATS,}, | 510 | .formats = SSM2602_FORMATS,}, |
553 | .ops = &ssm2602_dai_ops, | 511 | .ops = &ssm2602_dai_ops, |
512 | .symmetric_rates = 1, | ||
513 | .symmetric_samplebits = 1, | ||
554 | }; | 514 | }; |
555 | 515 | ||
556 | static int ssm2602_suspend(struct snd_soc_codec *codec) | 516 | static int ssm2602_suspend(struct snd_soc_codec *codec) |
@@ -730,7 +690,7 @@ static struct spi_driver ssm2602_spi_driver = { | |||
730 | }; | 690 | }; |
731 | #endif | 691 | #endif |
732 | 692 | ||
733 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 693 | #if IS_ENABLED(CONFIG_I2C) |
734 | /* | 694 | /* |
735 | * ssm2602 2 wire address is determined by GPIO5 | 695 | * ssm2602 2 wire address is determined by GPIO5 |
736 | * state during powerup. | 696 | * state during powerup. |
@@ -797,7 +757,7 @@ static int __init ssm2602_modinit(void) | |||
797 | return ret; | 757 | return ret; |
798 | #endif | 758 | #endif |
799 | 759 | ||
800 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 760 | #if IS_ENABLED(CONFIG_I2C) |
801 | ret = i2c_add_driver(&ssm2602_i2c_driver); | 761 | ret = i2c_add_driver(&ssm2602_i2c_driver); |
802 | if (ret) | 762 | if (ret) |
803 | return ret; | 763 | return ret; |
@@ -813,7 +773,7 @@ static void __exit ssm2602_exit(void) | |||
813 | spi_unregister_driver(&ssm2602_spi_driver); | 773 | spi_unregister_driver(&ssm2602_spi_driver); |
814 | #endif | 774 | #endif |
815 | 775 | ||
816 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 776 | #if IS_ENABLED(CONFIG_I2C) |
817 | i2c_del_driver(&ssm2602_i2c_driver); | 777 | i2c_del_driver(&ssm2602_i2c_driver); |
818 | #endif | 778 | #endif |
819 | } | 779 | } |
diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 18cdcca9014c..385dec16eb8a 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c | |||
@@ -267,8 +267,8 @@ static const struct regmap_range_cfg aic32x4_regmap_pages[] = { | |||
267 | .selector_mask = 0xff, | 267 | .selector_mask = 0xff, |
268 | .window_start = 0, | 268 | .window_start = 0, |
269 | .window_len = 128, | 269 | .window_len = 128, |
270 | .range_min = AIC32X4_PAGE1, | 270 | .range_min = 0, |
271 | .range_max = AIC32X4_PAGE1 + 127, | 271 | .range_max = AIC32X4_RMICPGAVOL, |
272 | }, | 272 | }, |
273 | }; | 273 | }; |
274 | 274 | ||
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index 546d16b7d38f..470fbfb4b386 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c | |||
@@ -350,16 +350,6 @@ static const struct snd_kcontrol_new aic3x_snd_controls[] = { | |||
350 | DACL1_2_LLOPM_VOL, DACR1_2_RLOPM_VOL, | 350 | DACL1_2_LLOPM_VOL, DACR1_2_RLOPM_VOL, |
351 | 0, 118, 1, output_stage_tlv), | 351 | 0, 118, 1, output_stage_tlv), |
352 | 352 | ||
353 | SOC_DOUBLE_R_TLV("Mono Line2 Bypass Volume", | ||
354 | LINE2L_2_MONOLOPM_VOL, LINE2R_2_MONOLOPM_VOL, | ||
355 | 0, 118, 1, output_stage_tlv), | ||
356 | SOC_DOUBLE_R_TLV("Mono PGA Bypass Volume", | ||
357 | PGAL_2_MONOLOPM_VOL, PGAR_2_MONOLOPM_VOL, | ||
358 | 0, 118, 1, output_stage_tlv), | ||
359 | SOC_DOUBLE_R_TLV("Mono DAC Playback Volume", | ||
360 | DACL1_2_MONOLOPM_VOL, DACR1_2_MONOLOPM_VOL, | ||
361 | 0, 118, 1, output_stage_tlv), | ||
362 | |||
363 | SOC_DOUBLE_R_TLV("HP Line2 Bypass Volume", | 353 | SOC_DOUBLE_R_TLV("HP Line2 Bypass Volume", |
364 | LINE2L_2_HPLOUT_VOL, LINE2R_2_HPROUT_VOL, | 354 | LINE2L_2_HPLOUT_VOL, LINE2R_2_HPROUT_VOL, |
365 | 0, 118, 1, output_stage_tlv), | 355 | 0, 118, 1, output_stage_tlv), |
@@ -383,7 +373,6 @@ static const struct snd_kcontrol_new aic3x_snd_controls[] = { | |||
383 | /* Output pin mute controls */ | 373 | /* Output pin mute controls */ |
384 | SOC_DOUBLE_R("Line Playback Switch", LLOPM_CTRL, RLOPM_CTRL, 3, | 374 | SOC_DOUBLE_R("Line Playback Switch", LLOPM_CTRL, RLOPM_CTRL, 3, |
385 | 0x01, 0), | 375 | 0x01, 0), |
386 | SOC_SINGLE("Mono Playback Switch", MONOLOPM_CTRL, 3, 0x01, 0), | ||
387 | SOC_DOUBLE_R("HP Playback Switch", HPLOUT_CTRL, HPROUT_CTRL, 3, | 376 | SOC_DOUBLE_R("HP Playback Switch", HPLOUT_CTRL, HPROUT_CTRL, 3, |
388 | 0x01, 0), | 377 | 0x01, 0), |
389 | SOC_DOUBLE_R("HPCOM Playback Switch", HPLCOM_CTRL, HPRCOM_CTRL, 3, | 378 | SOC_DOUBLE_R("HPCOM Playback Switch", HPLCOM_CTRL, HPRCOM_CTRL, 3, |
@@ -412,6 +401,20 @@ static const struct snd_kcontrol_new aic3x_snd_controls[] = { | |||
412 | SOC_ENUM("ADC HPF Cut-off", aic3x_enum[ADC_HPF_ENUM]), | 401 | SOC_ENUM("ADC HPF Cut-off", aic3x_enum[ADC_HPF_ENUM]), |
413 | }; | 402 | }; |
414 | 403 | ||
404 | static const struct snd_kcontrol_new aic3x_mono_controls[] = { | ||
405 | SOC_DOUBLE_R_TLV("Mono Line2 Bypass Volume", | ||
406 | LINE2L_2_MONOLOPM_VOL, LINE2R_2_MONOLOPM_VOL, | ||
407 | 0, 118, 1, output_stage_tlv), | ||
408 | SOC_DOUBLE_R_TLV("Mono PGA Bypass Volume", | ||
409 | PGAL_2_MONOLOPM_VOL, PGAR_2_MONOLOPM_VOL, | ||
410 | 0, 118, 1, output_stage_tlv), | ||
411 | SOC_DOUBLE_R_TLV("Mono DAC Playback Volume", | ||
412 | DACL1_2_MONOLOPM_VOL, DACR1_2_MONOLOPM_VOL, | ||
413 | 0, 118, 1, output_stage_tlv), | ||
414 | |||
415 | SOC_SINGLE("Mono Playback Switch", MONOLOPM_CTRL, 3, 0x01, 0), | ||
416 | }; | ||
417 | |||
415 | /* | 418 | /* |
416 | * Class-D amplifier gain. From 0 to 18 dB in 6 dB steps | 419 | * Class-D amplifier gain. From 0 to 18 dB in 6 dB steps |
417 | */ | 420 | */ |
@@ -565,9 +568,6 @@ static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { | |||
565 | SND_SOC_DAPM_PGA("Right HP Out", HPROUT_CTRL, 0, 0, NULL, 0), | 568 | SND_SOC_DAPM_PGA("Right HP Out", HPROUT_CTRL, 0, 0, NULL, 0), |
566 | SND_SOC_DAPM_PGA("Right HP Com", HPRCOM_CTRL, 0, 0, NULL, 0), | 569 | SND_SOC_DAPM_PGA("Right HP Com", HPRCOM_CTRL, 0, 0, NULL, 0), |
567 | 570 | ||
568 | /* Mono Output */ | ||
569 | SND_SOC_DAPM_PGA("Mono Out", MONOLOPM_CTRL, 0, 0, NULL, 0), | ||
570 | |||
571 | /* Inputs to Left ADC */ | 571 | /* Inputs to Left ADC */ |
572 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", LINE1L_2_LADC_CTRL, 2, 0), | 572 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", LINE1L_2_LADC_CTRL, 2, 0), |
573 | SND_SOC_DAPM_MIXER("Left PGA Mixer", SND_SOC_NOPM, 0, 0, | 573 | SND_SOC_DAPM_MIXER("Left PGA Mixer", SND_SOC_NOPM, 0, 0, |
@@ -626,9 +626,6 @@ static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { | |||
626 | SND_SOC_DAPM_MIXER("Right Line Mixer", SND_SOC_NOPM, 0, 0, | 626 | SND_SOC_DAPM_MIXER("Right Line Mixer", SND_SOC_NOPM, 0, 0, |
627 | &aic3x_right_line_mixer_controls[0], | 627 | &aic3x_right_line_mixer_controls[0], |
628 | ARRAY_SIZE(aic3x_right_line_mixer_controls)), | 628 | ARRAY_SIZE(aic3x_right_line_mixer_controls)), |
629 | SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0, | ||
630 | &aic3x_mono_mixer_controls[0], | ||
631 | ARRAY_SIZE(aic3x_mono_mixer_controls)), | ||
632 | SND_SOC_DAPM_MIXER("Left HP Mixer", SND_SOC_NOPM, 0, 0, | 629 | SND_SOC_DAPM_MIXER("Left HP Mixer", SND_SOC_NOPM, 0, 0, |
633 | &aic3x_left_hp_mixer_controls[0], | 630 | &aic3x_left_hp_mixer_controls[0], |
634 | ARRAY_SIZE(aic3x_left_hp_mixer_controls)), | 631 | ARRAY_SIZE(aic3x_left_hp_mixer_controls)), |
@@ -644,7 +641,6 @@ static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { | |||
644 | 641 | ||
645 | SND_SOC_DAPM_OUTPUT("LLOUT"), | 642 | SND_SOC_DAPM_OUTPUT("LLOUT"), |
646 | SND_SOC_DAPM_OUTPUT("RLOUT"), | 643 | SND_SOC_DAPM_OUTPUT("RLOUT"), |
647 | SND_SOC_DAPM_OUTPUT("MONO_LOUT"), | ||
648 | SND_SOC_DAPM_OUTPUT("HPLOUT"), | 644 | SND_SOC_DAPM_OUTPUT("HPLOUT"), |
649 | SND_SOC_DAPM_OUTPUT("HPROUT"), | 645 | SND_SOC_DAPM_OUTPUT("HPROUT"), |
650 | SND_SOC_DAPM_OUTPUT("HPLCOM"), | 646 | SND_SOC_DAPM_OUTPUT("HPLCOM"), |
@@ -666,6 +662,17 @@ static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { | |||
666 | SND_SOC_DAPM_OUTPUT("Detection"), | 662 | SND_SOC_DAPM_OUTPUT("Detection"), |
667 | }; | 663 | }; |
668 | 664 | ||
665 | static const struct snd_soc_dapm_widget aic3x_dapm_mono_widgets[] = { | ||
666 | /* Mono Output */ | ||
667 | SND_SOC_DAPM_PGA("Mono Out", MONOLOPM_CTRL, 0, 0, NULL, 0), | ||
668 | |||
669 | SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0, | ||
670 | &aic3x_mono_mixer_controls[0], | ||
671 | ARRAY_SIZE(aic3x_mono_mixer_controls)), | ||
672 | |||
673 | SND_SOC_DAPM_OUTPUT("MONO_LOUT"), | ||
674 | }; | ||
675 | |||
669 | static const struct snd_soc_dapm_widget aic3007_dapm_widgets[] = { | 676 | static const struct snd_soc_dapm_widget aic3007_dapm_widgets[] = { |
670 | /* Class-D outputs */ | 677 | /* Class-D outputs */ |
671 | SND_SOC_DAPM_PGA("Left Class-D Out", CLASSD_CTRL, 3, 0, NULL, 0), | 678 | SND_SOC_DAPM_PGA("Left Class-D Out", CLASSD_CTRL, 3, 0, NULL, 0), |
@@ -754,17 +761,6 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
754 | {"Right Line Out", NULL, "Right DAC Mux"}, | 761 | {"Right Line Out", NULL, "Right DAC Mux"}, |
755 | {"RLOUT", NULL, "Right Line Out"}, | 762 | {"RLOUT", NULL, "Right Line Out"}, |
756 | 763 | ||
757 | /* Mono Output */ | ||
758 | {"Mono Mixer", "Line2L Bypass Switch", "Left Line2L Mux"}, | ||
759 | {"Mono Mixer", "PGAL Bypass Switch", "Left PGA Mixer"}, | ||
760 | {"Mono Mixer", "DACL1 Switch", "Left DAC Mux"}, | ||
761 | {"Mono Mixer", "Line2R Bypass Switch", "Right Line2R Mux"}, | ||
762 | {"Mono Mixer", "PGAR Bypass Switch", "Right PGA Mixer"}, | ||
763 | {"Mono Mixer", "DACR1 Switch", "Right DAC Mux"}, | ||
764 | |||
765 | {"Mono Out", NULL, "Mono Mixer"}, | ||
766 | {"MONO_LOUT", NULL, "Mono Out"}, | ||
767 | |||
768 | /* Left HP Output */ | 764 | /* Left HP Output */ |
769 | {"Left HP Mixer", "Line2L Bypass Switch", "Left Line2L Mux"}, | 765 | {"Left HP Mixer", "Line2L Bypass Switch", "Left Line2L Mux"}, |
770 | {"Left HP Mixer", "PGAL Bypass Switch", "Left PGA Mixer"}, | 766 | {"Left HP Mixer", "PGAL Bypass Switch", "Left PGA Mixer"}, |
@@ -820,6 +816,18 @@ static const struct snd_soc_dapm_route intercon[] = { | |||
820 | {"HPRCOM", NULL, "Right HP Com"}, | 816 | {"HPRCOM", NULL, "Right HP Com"}, |
821 | }; | 817 | }; |
822 | 818 | ||
819 | static const struct snd_soc_dapm_route intercon_mono[] = { | ||
820 | /* Mono Output */ | ||
821 | {"Mono Mixer", "Line2L Bypass Switch", "Left Line2L Mux"}, | ||
822 | {"Mono Mixer", "PGAL Bypass Switch", "Left PGA Mixer"}, | ||
823 | {"Mono Mixer", "DACL1 Switch", "Left DAC Mux"}, | ||
824 | {"Mono Mixer", "Line2R Bypass Switch", "Right Line2R Mux"}, | ||
825 | {"Mono Mixer", "PGAR Bypass Switch", "Right PGA Mixer"}, | ||
826 | {"Mono Mixer", "DACR1 Switch", "Right DAC Mux"}, | ||
827 | {"Mono Out", NULL, "Mono Mixer"}, | ||
828 | {"MONO_LOUT", NULL, "Mono Out"}, | ||
829 | }; | ||
830 | |||
823 | static const struct snd_soc_dapm_route intercon_3007[] = { | 831 | static const struct snd_soc_dapm_route intercon_3007[] = { |
824 | /* Class-D outputs */ | 832 | /* Class-D outputs */ |
825 | {"Left Class-D Out", NULL, "Left Line Out"}, | 833 | {"Left Class-D Out", NULL, "Left Line Out"}, |
@@ -833,11 +841,20 @@ static int aic3x_add_widgets(struct snd_soc_codec *codec) | |||
833 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); | 841 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); |
834 | struct snd_soc_dapm_context *dapm = &codec->dapm; | 842 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
835 | 843 | ||
836 | if (aic3x->model == AIC3X_MODEL_3007) { | 844 | switch (aic3x->model) { |
845 | case AIC3X_MODEL_3X: | ||
846 | case AIC3X_MODEL_33: | ||
847 | snd_soc_dapm_new_controls(dapm, aic3x_dapm_mono_widgets, | ||
848 | ARRAY_SIZE(aic3x_dapm_mono_widgets)); | ||
849 | snd_soc_dapm_add_routes(dapm, intercon_mono, | ||
850 | ARRAY_SIZE(intercon_mono)); | ||
851 | break; | ||
852 | case AIC3X_MODEL_3007: | ||
837 | snd_soc_dapm_new_controls(dapm, aic3007_dapm_widgets, | 853 | snd_soc_dapm_new_controls(dapm, aic3007_dapm_widgets, |
838 | ARRAY_SIZE(aic3007_dapm_widgets)); | 854 | ARRAY_SIZE(aic3007_dapm_widgets)); |
839 | snd_soc_dapm_add_routes(dapm, intercon_3007, | 855 | snd_soc_dapm_add_routes(dapm, intercon_3007, |
840 | ARRAY_SIZE(intercon_3007)); | 856 | ARRAY_SIZE(intercon_3007)); |
857 | break; | ||
841 | } | 858 | } |
842 | 859 | ||
843 | return 0; | 860 | return 0; |
@@ -1218,6 +1235,24 @@ static int aic3x_resume(struct snd_soc_codec *codec) | |||
1218 | return 0; | 1235 | return 0; |
1219 | } | 1236 | } |
1220 | 1237 | ||
1238 | static void aic3x_mono_init(struct snd_soc_codec *codec) | ||
1239 | { | ||
1240 | /* DAC to Mono Line Out default volume and route to Output mixer */ | ||
1241 | snd_soc_write(codec, DACL1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | ||
1242 | snd_soc_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | ||
1243 | |||
1244 | /* unmute all outputs */ | ||
1245 | snd_soc_update_bits(codec, MONOLOPM_CTRL, UNMUTE, UNMUTE); | ||
1246 | |||
1247 | /* PGA to Mono Line Out default volume, disconnect from Output Mixer */ | ||
1248 | snd_soc_write(codec, PGAL_2_MONOLOPM_VOL, DEFAULT_VOL); | ||
1249 | snd_soc_write(codec, PGAR_2_MONOLOPM_VOL, DEFAULT_VOL); | ||
1250 | |||
1251 | /* Line2 to Mono Out default volume, disconnect from Output Mixer */ | ||
1252 | snd_soc_write(codec, LINE2L_2_MONOLOPM_VOL, DEFAULT_VOL); | ||
1253 | snd_soc_write(codec, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL); | ||
1254 | } | ||
1255 | |||
1221 | /* | 1256 | /* |
1222 | * initialise the AIC3X driver | 1257 | * initialise the AIC3X driver |
1223 | * register the mixer and dsp interfaces with the kernel | 1258 | * register the mixer and dsp interfaces with the kernel |
@@ -1241,14 +1276,10 @@ static int aic3x_init(struct snd_soc_codec *codec) | |||
1241 | /* DAC to Line Out default volume and route to Output mixer */ | 1276 | /* DAC to Line Out default volume and route to Output mixer */ |
1242 | snd_soc_write(codec, DACL1_2_LLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | 1277 | snd_soc_write(codec, DACL1_2_LLOPM_VOL, DEFAULT_VOL | ROUTE_ON); |
1243 | snd_soc_write(codec, DACR1_2_RLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | 1278 | snd_soc_write(codec, DACR1_2_RLOPM_VOL, DEFAULT_VOL | ROUTE_ON); |
1244 | /* DAC to Mono Line Out default volume and route to Output mixer */ | ||
1245 | snd_soc_write(codec, DACL1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | ||
1246 | snd_soc_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | ||
1247 | 1279 | ||
1248 | /* unmute all outputs */ | 1280 | /* unmute all outputs */ |
1249 | snd_soc_update_bits(codec, LLOPM_CTRL, UNMUTE, UNMUTE); | 1281 | snd_soc_update_bits(codec, LLOPM_CTRL, UNMUTE, UNMUTE); |
1250 | snd_soc_update_bits(codec, RLOPM_CTRL, UNMUTE, UNMUTE); | 1282 | snd_soc_update_bits(codec, RLOPM_CTRL, UNMUTE, UNMUTE); |
1251 | snd_soc_update_bits(codec, MONOLOPM_CTRL, UNMUTE, UNMUTE); | ||
1252 | snd_soc_update_bits(codec, HPLOUT_CTRL, UNMUTE, UNMUTE); | 1283 | snd_soc_update_bits(codec, HPLOUT_CTRL, UNMUTE, UNMUTE); |
1253 | snd_soc_update_bits(codec, HPROUT_CTRL, UNMUTE, UNMUTE); | 1284 | snd_soc_update_bits(codec, HPROUT_CTRL, UNMUTE, UNMUTE); |
1254 | snd_soc_update_bits(codec, HPLCOM_CTRL, UNMUTE, UNMUTE); | 1285 | snd_soc_update_bits(codec, HPLCOM_CTRL, UNMUTE, UNMUTE); |
@@ -1269,9 +1300,6 @@ static int aic3x_init(struct snd_soc_codec *codec) | |||
1269 | /* PGA to Line Out default volume, disconnect from Output Mixer */ | 1300 | /* PGA to Line Out default volume, disconnect from Output Mixer */ |
1270 | snd_soc_write(codec, PGAL_2_LLOPM_VOL, DEFAULT_VOL); | 1301 | snd_soc_write(codec, PGAL_2_LLOPM_VOL, DEFAULT_VOL); |
1271 | snd_soc_write(codec, PGAR_2_RLOPM_VOL, DEFAULT_VOL); | 1302 | snd_soc_write(codec, PGAR_2_RLOPM_VOL, DEFAULT_VOL); |
1272 | /* PGA to Mono Line Out default volume, disconnect from Output Mixer */ | ||
1273 | snd_soc_write(codec, PGAL_2_MONOLOPM_VOL, DEFAULT_VOL); | ||
1274 | snd_soc_write(codec, PGAR_2_MONOLOPM_VOL, DEFAULT_VOL); | ||
1275 | 1303 | ||
1276 | /* Line2 to HP Bypass default volume, disconnect from Output Mixer */ | 1304 | /* Line2 to HP Bypass default volume, disconnect from Output Mixer */ |
1277 | snd_soc_write(codec, LINE2L_2_HPLOUT_VOL, DEFAULT_VOL); | 1305 | snd_soc_write(codec, LINE2L_2_HPLOUT_VOL, DEFAULT_VOL); |
@@ -1281,12 +1309,15 @@ static int aic3x_init(struct snd_soc_codec *codec) | |||
1281 | /* Line2 Line Out default volume, disconnect from Output Mixer */ | 1309 | /* Line2 Line Out default volume, disconnect from Output Mixer */ |
1282 | snd_soc_write(codec, LINE2L_2_LLOPM_VOL, DEFAULT_VOL); | 1310 | snd_soc_write(codec, LINE2L_2_LLOPM_VOL, DEFAULT_VOL); |
1283 | snd_soc_write(codec, LINE2R_2_RLOPM_VOL, DEFAULT_VOL); | 1311 | snd_soc_write(codec, LINE2R_2_RLOPM_VOL, DEFAULT_VOL); |
1284 | /* Line2 to Mono Out default volume, disconnect from Output Mixer */ | ||
1285 | snd_soc_write(codec, LINE2L_2_MONOLOPM_VOL, DEFAULT_VOL); | ||
1286 | snd_soc_write(codec, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL); | ||
1287 | 1312 | ||
1288 | if (aic3x->model == AIC3X_MODEL_3007) { | 1313 | switch (aic3x->model) { |
1314 | case AIC3X_MODEL_3X: | ||
1315 | case AIC3X_MODEL_33: | ||
1316 | aic3x_mono_init(codec); | ||
1317 | break; | ||
1318 | case AIC3X_MODEL_3007: | ||
1289 | snd_soc_write(codec, CLASSD_CTRL, 0); | 1319 | snd_soc_write(codec, CLASSD_CTRL, 0); |
1320 | break; | ||
1290 | } | 1321 | } |
1291 | 1322 | ||
1292 | return 0; | 1323 | return 0; |
@@ -1343,8 +1374,17 @@ static int aic3x_probe(struct snd_soc_codec *codec) | |||
1343 | (aic3x->setup->gpio_func[1] & 0xf) << 4); | 1374 | (aic3x->setup->gpio_func[1] & 0xf) << 4); |
1344 | } | 1375 | } |
1345 | 1376 | ||
1346 | if (aic3x->model == AIC3X_MODEL_3007) | 1377 | switch (aic3x->model) { |
1347 | snd_soc_add_codec_controls(codec, &aic3x_classd_amp_gain_ctrl, 1); | 1378 | case AIC3X_MODEL_3X: |
1379 | case AIC3X_MODEL_33: | ||
1380 | snd_soc_add_codec_controls(codec, aic3x_mono_controls, | ||
1381 | ARRAY_SIZE(aic3x_mono_controls)); | ||
1382 | break; | ||
1383 | case AIC3X_MODEL_3007: | ||
1384 | snd_soc_add_codec_controls(codec, | ||
1385 | &aic3x_classd_amp_gain_ctrl, 1); | ||
1386 | break; | ||
1387 | } | ||
1348 | 1388 | ||
1349 | /* set mic bias voltage */ | 1389 | /* set mic bias voltage */ |
1350 | switch (aic3x->micbias_vg) { | 1390 | switch (aic3x->micbias_vg) { |
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index dfc51bb425da..00665ada23e2 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c | |||
@@ -48,86 +48,6 @@ | |||
48 | 48 | ||
49 | #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1) | 49 | #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1) |
50 | 50 | ||
51 | /* | ||
52 | * twl4030 register cache & default register settings | ||
53 | */ | ||
54 | static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { | ||
55 | 0x00, /* this register not used */ | ||
56 | 0x00, /* REG_CODEC_MODE (0x1) */ | ||
57 | 0x00, /* REG_OPTION (0x2) */ | ||
58 | 0x00, /* REG_UNKNOWN (0x3) */ | ||
59 | 0x00, /* REG_MICBIAS_CTL (0x4) */ | ||
60 | 0x00, /* REG_ANAMICL (0x5) */ | ||
61 | 0x00, /* REG_ANAMICR (0x6) */ | ||
62 | 0x00, /* REG_AVADC_CTL (0x7) */ | ||
63 | 0x00, /* REG_ADCMICSEL (0x8) */ | ||
64 | 0x00, /* REG_DIGMIXING (0x9) */ | ||
65 | 0x0f, /* REG_ATXL1PGA (0xA) */ | ||
66 | 0x0f, /* REG_ATXR1PGA (0xB) */ | ||
67 | 0x0f, /* REG_AVTXL2PGA (0xC) */ | ||
68 | 0x0f, /* REG_AVTXR2PGA (0xD) */ | ||
69 | 0x00, /* REG_AUDIO_IF (0xE) */ | ||
70 | 0x00, /* REG_VOICE_IF (0xF) */ | ||
71 | 0x3f, /* REG_ARXR1PGA (0x10) */ | ||
72 | 0x3f, /* REG_ARXL1PGA (0x11) */ | ||
73 | 0x3f, /* REG_ARXR2PGA (0x12) */ | ||
74 | 0x3f, /* REG_ARXL2PGA (0x13) */ | ||
75 | 0x25, /* REG_VRXPGA (0x14) */ | ||
76 | 0x00, /* REG_VSTPGA (0x15) */ | ||
77 | 0x00, /* REG_VRX2ARXPGA (0x16) */ | ||
78 | 0x00, /* REG_AVDAC_CTL (0x17) */ | ||
79 | 0x00, /* REG_ARX2VTXPGA (0x18) */ | ||
80 | 0x32, /* REG_ARXL1_APGA_CTL (0x19) */ | ||
81 | 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */ | ||
82 | 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */ | ||
83 | 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */ | ||
84 | 0x00, /* REG_ATX2ARXPGA (0x1D) */ | ||
85 | 0x00, /* REG_BT_IF (0x1E) */ | ||
86 | 0x55, /* REG_BTPGA (0x1F) */ | ||
87 | 0x00, /* REG_BTSTPGA (0x20) */ | ||
88 | 0x00, /* REG_EAR_CTL (0x21) */ | ||
89 | 0x00, /* REG_HS_SEL (0x22) */ | ||
90 | 0x00, /* REG_HS_GAIN_SET (0x23) */ | ||
91 | 0x00, /* REG_HS_POPN_SET (0x24) */ | ||
92 | 0x00, /* REG_PREDL_CTL (0x25) */ | ||
93 | 0x00, /* REG_PREDR_CTL (0x26) */ | ||
94 | 0x00, /* REG_PRECKL_CTL (0x27) */ | ||
95 | 0x00, /* REG_PRECKR_CTL (0x28) */ | ||
96 | 0x00, /* REG_HFL_CTL (0x29) */ | ||
97 | 0x00, /* REG_HFR_CTL (0x2A) */ | ||
98 | 0x05, /* REG_ALC_CTL (0x2B) */ | ||
99 | 0x00, /* REG_ALC_SET1 (0x2C) */ | ||
100 | 0x00, /* REG_ALC_SET2 (0x2D) */ | ||
101 | 0x00, /* REG_BOOST_CTL (0x2E) */ | ||
102 | 0x00, /* REG_SOFTVOL_CTL (0x2F) */ | ||
103 | 0x13, /* REG_DTMF_FREQSEL (0x30) */ | ||
104 | 0x00, /* REG_DTMF_TONEXT1H (0x31) */ | ||
105 | 0x00, /* REG_DTMF_TONEXT1L (0x32) */ | ||
106 | 0x00, /* REG_DTMF_TONEXT2H (0x33) */ | ||
107 | 0x00, /* REG_DTMF_TONEXT2L (0x34) */ | ||
108 | 0x79, /* REG_DTMF_TONOFF (0x35) */ | ||
109 | 0x11, /* REG_DTMF_WANONOFF (0x36) */ | ||
110 | 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */ | ||
111 | 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */ | ||
112 | 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */ | ||
113 | 0x06, /* REG_APLL_CTL (0x3A) */ | ||
114 | 0x00, /* REG_DTMF_CTL (0x3B) */ | ||
115 | 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */ | ||
116 | 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */ | ||
117 | 0x00, /* REG_MISC_SET_1 (0x3E) */ | ||
118 | 0x00, /* REG_PCMBTMUX (0x3F) */ | ||
119 | 0x00, /* not used (0x40) */ | ||
120 | 0x00, /* not used (0x41) */ | ||
121 | 0x00, /* not used (0x42) */ | ||
122 | 0x00, /* REG_RX_PATH_SEL (0x43) */ | ||
123 | 0x32, /* REG_VDL_APGA_CTL (0x44) */ | ||
124 | 0x00, /* REG_VIBRA_CTL (0x45) */ | ||
125 | 0x00, /* REG_VIBRA_SET (0x46) */ | ||
126 | 0x00, /* REG_VIBRA_PWM_SET (0x47) */ | ||
127 | 0x00, /* REG_ANAMIC_GAIN (0x48) */ | ||
128 | 0x00, /* REG_MISC_SET_2 (0x49) */ | ||
129 | }; | ||
130 | |||
131 | /* codec private data */ | 51 | /* codec private data */ |
132 | struct twl4030_priv { | 52 | struct twl4030_priv { |
133 | unsigned int codec_powered; | 53 | unsigned int codec_powered; |
@@ -150,81 +70,108 @@ struct twl4030_priv { | |||
150 | u8 earpiece_enabled; | 70 | u8 earpiece_enabled; |
151 | u8 predrivel_enabled, predriver_enabled; | 71 | u8 predrivel_enabled, predriver_enabled; |
152 | u8 carkitl_enabled, carkitr_enabled; | 72 | u8 carkitl_enabled, carkitr_enabled; |
73 | u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1]; | ||
153 | 74 | ||
154 | struct twl4030_codec_data *pdata; | 75 | struct twl4030_codec_data *pdata; |
155 | }; | 76 | }; |
156 | 77 | ||
157 | /* | 78 | static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030) |
158 | * read twl4030 register cache | ||
159 | */ | ||
160 | static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec, | ||
161 | unsigned int reg) | ||
162 | { | 79 | { |
163 | u8 *cache = codec->reg_cache; | 80 | int i; |
164 | 81 | u8 byte; | |
165 | if (reg >= TWL4030_CACHEREGNUM) | ||
166 | return -EIO; | ||
167 | 82 | ||
168 | return cache[reg]; | 83 | for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) { |
84 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i); | ||
85 | twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte; | ||
86 | } | ||
169 | } | 87 | } |
170 | 88 | ||
171 | /* | 89 | static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg) |
172 | * write twl4030 register cache | ||
173 | */ | ||
174 | static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec, | ||
175 | u8 reg, u8 value) | ||
176 | { | 90 | { |
177 | u8 *cache = codec->reg_cache; | 91 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
92 | u8 value = 0; | ||
178 | 93 | ||
179 | if (reg >= TWL4030_CACHEREGNUM) | 94 | if (reg >= TWL4030_CACHEREGNUM) |
180 | return; | 95 | return -EIO; |
181 | cache[reg] = value; | 96 | |
97 | switch (reg) { | ||
98 | case TWL4030_REG_EAR_CTL: | ||
99 | case TWL4030_REG_PREDL_CTL: | ||
100 | case TWL4030_REG_PREDR_CTL: | ||
101 | case TWL4030_REG_PRECKL_CTL: | ||
102 | case TWL4030_REG_PRECKR_CTL: | ||
103 | case TWL4030_REG_HS_GAIN_SET: | ||
104 | value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL]; | ||
105 | break; | ||
106 | default: | ||
107 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg); | ||
108 | break; | ||
109 | } | ||
110 | |||
111 | return value; | ||
182 | } | 112 | } |
183 | 113 | ||
184 | /* | 114 | static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030, |
185 | * write to the twl4030 register space | 115 | unsigned int reg) |
186 | */ | ||
187 | static int twl4030_write(struct snd_soc_codec *codec, | ||
188 | unsigned int reg, unsigned int value) | ||
189 | { | 116 | { |
190 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 117 | bool write_to_reg = false; |
191 | int write_to_reg = 0; | ||
192 | 118 | ||
193 | twl4030_write_reg_cache(codec, reg, value); | ||
194 | /* Decide if the given register can be written */ | 119 | /* Decide if the given register can be written */ |
195 | switch (reg) { | 120 | switch (reg) { |
196 | case TWL4030_REG_EAR_CTL: | 121 | case TWL4030_REG_EAR_CTL: |
197 | if (twl4030->earpiece_enabled) | 122 | if (twl4030->earpiece_enabled) |
198 | write_to_reg = 1; | 123 | write_to_reg = true; |
199 | break; | 124 | break; |
200 | case TWL4030_REG_PREDL_CTL: | 125 | case TWL4030_REG_PREDL_CTL: |
201 | if (twl4030->predrivel_enabled) | 126 | if (twl4030->predrivel_enabled) |
202 | write_to_reg = 1; | 127 | write_to_reg = true; |
203 | break; | 128 | break; |
204 | case TWL4030_REG_PREDR_CTL: | 129 | case TWL4030_REG_PREDR_CTL: |
205 | if (twl4030->predriver_enabled) | 130 | if (twl4030->predriver_enabled) |
206 | write_to_reg = 1; | 131 | write_to_reg = true; |
207 | break; | 132 | break; |
208 | case TWL4030_REG_PRECKL_CTL: | 133 | case TWL4030_REG_PRECKL_CTL: |
209 | if (twl4030->carkitl_enabled) | 134 | if (twl4030->carkitl_enabled) |
210 | write_to_reg = 1; | 135 | write_to_reg = true; |
211 | break; | 136 | break; |
212 | case TWL4030_REG_PRECKR_CTL: | 137 | case TWL4030_REG_PRECKR_CTL: |
213 | if (twl4030->carkitr_enabled) | 138 | if (twl4030->carkitr_enabled) |
214 | write_to_reg = 1; | 139 | write_to_reg = true; |
215 | break; | 140 | break; |
216 | case TWL4030_REG_HS_GAIN_SET: | 141 | case TWL4030_REG_HS_GAIN_SET: |
217 | if (twl4030->hsl_enabled || twl4030->hsr_enabled) | 142 | if (twl4030->hsl_enabled || twl4030->hsr_enabled) |
218 | write_to_reg = 1; | 143 | write_to_reg = true; |
219 | break; | 144 | break; |
220 | default: | 145 | default: |
221 | /* All other register can be written */ | 146 | /* All other register can be written */ |
222 | write_to_reg = 1; | 147 | write_to_reg = true; |
148 | break; | ||
149 | } | ||
150 | |||
151 | return write_to_reg; | ||
152 | } | ||
153 | |||
154 | static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg, | ||
155 | unsigned int value) | ||
156 | { | ||
157 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | ||
158 | |||
159 | /* Update the ctl cache */ | ||
160 | switch (reg) { | ||
161 | case TWL4030_REG_EAR_CTL: | ||
162 | case TWL4030_REG_PREDL_CTL: | ||
163 | case TWL4030_REG_PREDR_CTL: | ||
164 | case TWL4030_REG_PRECKL_CTL: | ||
165 | case TWL4030_REG_PRECKR_CTL: | ||
166 | case TWL4030_REG_HS_GAIN_SET: | ||
167 | twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value; | ||
168 | break; | ||
169 | default: | ||
223 | break; | 170 | break; |
224 | } | 171 | } |
225 | if (write_to_reg) | 172 | |
226 | return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, | 173 | if (twl4030_can_write_to_chip(twl4030, reg)) |
227 | value, reg); | 174 | return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg); |
228 | 175 | ||
229 | return 0; | 176 | return 0; |
230 | } | 177 | } |
@@ -252,46 +199,14 @@ static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable) | |||
252 | else | 199 | else |
253 | mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER); | 200 | mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER); |
254 | 201 | ||
255 | if (mode >= 0) { | 202 | if (mode >= 0) |
256 | twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode); | ||
257 | twl4030->codec_powered = enable; | 203 | twl4030->codec_powered = enable; |
258 | } | ||
259 | 204 | ||
260 | /* REVISIT: this delay is present in TI sample drivers */ | 205 | /* REVISIT: this delay is present in TI sample drivers */ |
261 | /* but there seems to be no TRM requirement for it */ | 206 | /* but there seems to be no TRM requirement for it */ |
262 | udelay(10); | 207 | udelay(10); |
263 | } | 208 | } |
264 | 209 | ||
265 | static inline void twl4030_check_defaults(struct snd_soc_codec *codec) | ||
266 | { | ||
267 | int i, difference = 0; | ||
268 | u8 val; | ||
269 | |||
270 | dev_dbg(codec->dev, "Checking TWL audio default configuration\n"); | ||
271 | for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) { | ||
272 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i); | ||
273 | if (val != twl4030_reg[i]) { | ||
274 | difference++; | ||
275 | dev_dbg(codec->dev, | ||
276 | "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n", | ||
277 | i, val, twl4030_reg[i]); | ||
278 | } | ||
279 | } | ||
280 | dev_dbg(codec->dev, "Found %d non-matching registers. %s\n", | ||
281 | difference, difference ? "Not OK" : "OK"); | ||
282 | } | ||
283 | |||
284 | static inline void twl4030_reset_registers(struct snd_soc_codec *codec) | ||
285 | { | ||
286 | int i; | ||
287 | |||
288 | /* set all audio section registers to reasonable defaults */ | ||
289 | for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++) | ||
290 | if (i != TWL4030_REG_APLL_CTL) | ||
291 | twl4030_write(codec, i, twl4030_reg[i]); | ||
292 | |||
293 | } | ||
294 | |||
295 | static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata, | 210 | static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata, |
296 | struct device_node *node) | 211 | struct device_node *node) |
297 | { | 212 | { |
@@ -372,27 +287,17 @@ static void twl4030_init_chip(struct snd_soc_codec *codec) | |||
372 | } | 287 | } |
373 | } | 288 | } |
374 | 289 | ||
375 | /* Check defaults, if instructed before anything else */ | 290 | /* Initialize the local ctl register cache */ |
376 | if (pdata && pdata->check_defaults) | 291 | tw4030_init_ctl_cache(twl4030); |
377 | twl4030_check_defaults(codec); | ||
378 | |||
379 | /* Reset registers, if no setup data or if instructed to do so */ | ||
380 | if (!pdata || (pdata && pdata->reset_registers)) | ||
381 | twl4030_reset_registers(codec); | ||
382 | |||
383 | /* Refresh APLL_CTL register from HW */ | ||
384 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, | ||
385 | TWL4030_REG_APLL_CTL); | ||
386 | twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte); | ||
387 | 292 | ||
388 | /* anti-pop when changing analog gain */ | 293 | /* anti-pop when changing analog gain */ |
389 | reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1); | 294 | reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1); |
390 | twl4030_write(codec, TWL4030_REG_MISC_SET_1, | 295 | twl4030_write(codec, TWL4030_REG_MISC_SET_1, |
391 | reg | TWL4030_SMOOTH_ANAVOL_EN); | 296 | reg | TWL4030_SMOOTH_ANAVOL_EN); |
392 | 297 | ||
393 | twl4030_write(codec, TWL4030_REG_OPTION, | 298 | twl4030_write(codec, TWL4030_REG_OPTION, |
394 | TWL4030_ATXL1_EN | TWL4030_ATXR1_EN | | 299 | TWL4030_ATXL1_EN | TWL4030_ATXR1_EN | |
395 | TWL4030_ARXL2_EN | TWL4030_ARXR2_EN); | 300 | TWL4030_ARXL2_EN | TWL4030_ARXR2_EN); |
396 | 301 | ||
397 | /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */ | 302 | /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */ |
398 | twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32); | 303 | twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32); |
@@ -403,19 +308,19 @@ static void twl4030_init_chip(struct snd_soc_codec *codec) | |||
403 | 308 | ||
404 | twl4030->pdata = pdata; | 309 | twl4030->pdata = pdata; |
405 | 310 | ||
406 | reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET); | 311 | reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET); |
407 | reg &= ~TWL4030_RAMP_DELAY; | 312 | reg &= ~TWL4030_RAMP_DELAY; |
408 | reg |= (pdata->ramp_delay_value << 2); | 313 | reg |= (pdata->ramp_delay_value << 2); |
409 | twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg); | 314 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg); |
410 | 315 | ||
411 | /* initiate offset cancellation */ | 316 | /* initiate offset cancellation */ |
412 | twl4030_codec_enable(codec, 1); | 317 | twl4030_codec_enable(codec, 1); |
413 | 318 | ||
414 | reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL); | 319 | reg = twl4030_read(codec, TWL4030_REG_ANAMICL); |
415 | reg &= ~TWL4030_OFFSET_CNCL_SEL; | 320 | reg &= ~TWL4030_OFFSET_CNCL_SEL; |
416 | reg |= pdata->offset_cncl_path; | 321 | reg |= pdata->offset_cncl_path; |
417 | twl4030_write(codec, TWL4030_REG_ANAMICL, | 322 | twl4030_write(codec, TWL4030_REG_ANAMICL, |
418 | reg | TWL4030_CNCL_OFFSET_START); | 323 | reg | TWL4030_CNCL_OFFSET_START); |
419 | 324 | ||
420 | /* | 325 | /* |
421 | * Wait for offset cancellation to complete. | 326 | * Wait for offset cancellation to complete. |
@@ -425,15 +330,14 @@ static void twl4030_init_chip(struct snd_soc_codec *codec) | |||
425 | msleep(20); | 330 | msleep(20); |
426 | do { | 331 | do { |
427 | usleep_range(1000, 2000); | 332 | usleep_range(1000, 2000); |
333 | twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true); | ||
428 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, | 334 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, |
429 | TWL4030_REG_ANAMICL); | 335 | TWL4030_REG_ANAMICL); |
336 | twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false); | ||
430 | } while ((i++ < 100) && | 337 | } while ((i++ < 100) && |
431 | ((byte & TWL4030_CNCL_OFFSET_START) == | 338 | ((byte & TWL4030_CNCL_OFFSET_START) == |
432 | TWL4030_CNCL_OFFSET_START)); | 339 | TWL4030_CNCL_OFFSET_START)); |
433 | 340 | ||
434 | /* Make sure that the reg_cache has the same value as the HW */ | ||
435 | twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte); | ||
436 | |||
437 | twl4030_codec_enable(codec, 0); | 341 | twl4030_codec_enable(codec, 0); |
438 | } | 342 | } |
439 | 343 | ||
@@ -453,9 +357,6 @@ static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable) | |||
453 | status = twl4030_audio_disable_resource( | 357 | status = twl4030_audio_disable_resource( |
454 | TWL4030_AUDIO_RES_APLL); | 358 | TWL4030_AUDIO_RES_APLL); |
455 | } | 359 | } |
456 | |||
457 | if (status >= 0) | ||
458 | twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status); | ||
459 | } | 360 | } |
460 | 361 | ||
461 | /* Earpiece */ | 362 | /* Earpiece */ |
@@ -671,20 +572,18 @@ static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control = | |||
671 | */ | 572 | */ |
672 | #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \ | 573 | #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \ |
673 | static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \ | 574 | static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \ |
674 | struct snd_kcontrol *kcontrol, int event) \ | 575 | struct snd_kcontrol *kcontrol, int event) \ |
675 | { \ | 576 | { \ |
676 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \ | 577 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \ |
677 | \ | 578 | \ |
678 | switch (event) { \ | 579 | switch (event) { \ |
679 | case SND_SOC_DAPM_POST_PMU: \ | 580 | case SND_SOC_DAPM_POST_PMU: \ |
680 | twl4030->pin_name##_enabled = 1; \ | 581 | twl4030->pin_name##_enabled = 1; \ |
681 | twl4030_write(w->codec, reg, \ | 582 | twl4030_write(w->codec, reg, twl4030_read(w->codec, reg)); \ |
682 | twl4030_read_reg_cache(w->codec, reg)); \ | ||
683 | break; \ | 583 | break; \ |
684 | case SND_SOC_DAPM_POST_PMD: \ | 584 | case SND_SOC_DAPM_POST_PMD: \ |
685 | twl4030->pin_name##_enabled = 0; \ | 585 | twl4030->pin_name##_enabled = 0; \ |
686 | twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \ | 586 | twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \ |
687 | 0, reg); \ | ||
688 | break; \ | 587 | break; \ |
689 | } \ | 588 | } \ |
690 | return 0; \ | 589 | return 0; \ |
@@ -700,7 +599,7 @@ static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp) | |||
700 | { | 599 | { |
701 | unsigned char hs_ctl; | 600 | unsigned char hs_ctl; |
702 | 601 | ||
703 | hs_ctl = twl4030_read_reg_cache(codec, reg); | 602 | hs_ctl = twl4030_read(codec, reg); |
704 | 603 | ||
705 | if (ramp) { | 604 | if (ramp) { |
706 | /* HF ramp-up */ | 605 | /* HF ramp-up */ |
@@ -727,7 +626,7 @@ static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp) | |||
727 | } | 626 | } |
728 | 627 | ||
729 | static int handsfreelpga_event(struct snd_soc_dapm_widget *w, | 628 | static int handsfreelpga_event(struct snd_soc_dapm_widget *w, |
730 | struct snd_kcontrol *kcontrol, int event) | 629 | struct snd_kcontrol *kcontrol, int event) |
731 | { | 630 | { |
732 | switch (event) { | 631 | switch (event) { |
733 | case SND_SOC_DAPM_POST_PMU: | 632 | case SND_SOC_DAPM_POST_PMU: |
@@ -741,7 +640,7 @@ static int handsfreelpga_event(struct snd_soc_dapm_widget *w, | |||
741 | } | 640 | } |
742 | 641 | ||
743 | static int handsfreerpga_event(struct snd_soc_dapm_widget *w, | 642 | static int handsfreerpga_event(struct snd_soc_dapm_widget *w, |
744 | struct snd_kcontrol *kcontrol, int event) | 643 | struct snd_kcontrol *kcontrol, int event) |
745 | { | 644 | { |
746 | switch (event) { | 645 | switch (event) { |
747 | case SND_SOC_DAPM_POST_PMU: | 646 | case SND_SOC_DAPM_POST_PMU: |
@@ -755,14 +654,14 @@ static int handsfreerpga_event(struct snd_soc_dapm_widget *w, | |||
755 | } | 654 | } |
756 | 655 | ||
757 | static int vibramux_event(struct snd_soc_dapm_widget *w, | 656 | static int vibramux_event(struct snd_soc_dapm_widget *w, |
758 | struct snd_kcontrol *kcontrol, int event) | 657 | struct snd_kcontrol *kcontrol, int event) |
759 | { | 658 | { |
760 | twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff); | 659 | twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff); |
761 | return 0; | 660 | return 0; |
762 | } | 661 | } |
763 | 662 | ||
764 | static int apll_event(struct snd_soc_dapm_widget *w, | 663 | static int apll_event(struct snd_soc_dapm_widget *w, |
765 | struct snd_kcontrol *kcontrol, int event) | 664 | struct snd_kcontrol *kcontrol, int event) |
766 | { | 665 | { |
767 | switch (event) { | 666 | switch (event) { |
768 | case SND_SOC_DAPM_PRE_PMU: | 667 | case SND_SOC_DAPM_PRE_PMU: |
@@ -776,11 +675,11 @@ static int apll_event(struct snd_soc_dapm_widget *w, | |||
776 | } | 675 | } |
777 | 676 | ||
778 | static int aif_event(struct snd_soc_dapm_widget *w, | 677 | static int aif_event(struct snd_soc_dapm_widget *w, |
779 | struct snd_kcontrol *kcontrol, int event) | 678 | struct snd_kcontrol *kcontrol, int event) |
780 | { | 679 | { |
781 | u8 audio_if; | 680 | u8 audio_if; |
782 | 681 | ||
783 | audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF); | 682 | audio_if = twl4030_read(w->codec, TWL4030_REG_AUDIO_IF); |
784 | switch (event) { | 683 | switch (event) { |
785 | case SND_SOC_DAPM_PRE_PMU: | 684 | case SND_SOC_DAPM_PRE_PMU: |
786 | /* Enable AIF */ | 685 | /* Enable AIF */ |
@@ -788,12 +687,12 @@ static int aif_event(struct snd_soc_dapm_widget *w, | |||
788 | twl4030_apll_enable(w->codec, 1); | 687 | twl4030_apll_enable(w->codec, 1); |
789 | 688 | ||
790 | twl4030_write(w->codec, TWL4030_REG_AUDIO_IF, | 689 | twl4030_write(w->codec, TWL4030_REG_AUDIO_IF, |
791 | audio_if | TWL4030_AIF_EN); | 690 | audio_if | TWL4030_AIF_EN); |
792 | break; | 691 | break; |
793 | case SND_SOC_DAPM_POST_PMD: | 692 | case SND_SOC_DAPM_POST_PMD: |
794 | /* disable the DAI before we stop it's source PLL */ | 693 | /* disable the DAI before we stop it's source PLL */ |
795 | twl4030_write(w->codec, TWL4030_REG_AUDIO_IF, | 694 | twl4030_write(w->codec, TWL4030_REG_AUDIO_IF, |
796 | audio_if & ~TWL4030_AIF_EN); | 695 | audio_if & ~TWL4030_AIF_EN); |
797 | twl4030_apll_enable(w->codec, 0); | 696 | twl4030_apll_enable(w->codec, 0); |
798 | break; | 697 | break; |
799 | } | 698 | } |
@@ -810,8 +709,8 @@ static void headset_ramp(struct snd_soc_codec *codec, int ramp) | |||
810 | 8388608, 16777216, 33554432, 67108864}; | 709 | 8388608, 16777216, 33554432, 67108864}; |
811 | unsigned int delay; | 710 | unsigned int delay; |
812 | 711 | ||
813 | hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET); | 712 | hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET); |
814 | hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET); | 713 | hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET); |
815 | delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] / | 714 | delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] / |
816 | twl4030->sysclk) + 1; | 715 | twl4030->sysclk) + 1; |
817 | 716 | ||
@@ -831,9 +730,8 @@ static void headset_ramp(struct snd_soc_codec *codec, int ramp) | |||
831 | hs_pop |= TWL4030_VMID_EN; | 730 | hs_pop |= TWL4030_VMID_EN; |
832 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); | 731 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); |
833 | /* Actually write to the register */ | 732 | /* Actually write to the register */ |
834 | twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, | 733 | twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain, |
835 | hs_gain, | 734 | TWL4030_REG_HS_GAIN_SET); |
836 | TWL4030_REG_HS_GAIN_SET); | ||
837 | hs_pop |= TWL4030_RAMP_EN; | 735 | hs_pop |= TWL4030_RAMP_EN; |
838 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); | 736 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); |
839 | /* Wait ramp delay time + 1, so the VMID can settle */ | 737 | /* Wait ramp delay time + 1, so the VMID can settle */ |
@@ -846,9 +744,8 @@ static void headset_ramp(struct snd_soc_codec *codec, int ramp) | |||
846 | /* Wait ramp delay time + 1, so the VMID can settle */ | 744 | /* Wait ramp delay time + 1, so the VMID can settle */ |
847 | twl4030_wait_ms(delay); | 745 | twl4030_wait_ms(delay); |
848 | /* Bypass the reg_cache to mute the headset */ | 746 | /* Bypass the reg_cache to mute the headset */ |
849 | twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, | 747 | twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f), |
850 | hs_gain & (~0x0f), | 748 | TWL4030_REG_HS_GAIN_SET); |
851 | TWL4030_REG_HS_GAIN_SET); | ||
852 | 749 | ||
853 | hs_pop &= ~TWL4030_VMID_EN; | 750 | hs_pop &= ~TWL4030_VMID_EN; |
854 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); | 751 | twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); |
@@ -866,7 +763,7 @@ static void headset_ramp(struct snd_soc_codec *codec, int ramp) | |||
866 | } | 763 | } |
867 | 764 | ||
868 | static int headsetlpga_event(struct snd_soc_dapm_widget *w, | 765 | static int headsetlpga_event(struct snd_soc_dapm_widget *w, |
869 | struct snd_kcontrol *kcontrol, int event) | 766 | struct snd_kcontrol *kcontrol, int event) |
870 | { | 767 | { |
871 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); | 768 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); |
872 | 769 | ||
@@ -890,7 +787,7 @@ static int headsetlpga_event(struct snd_soc_dapm_widget *w, | |||
890 | } | 787 | } |
891 | 788 | ||
892 | static int headsetrpga_event(struct snd_soc_dapm_widget *w, | 789 | static int headsetrpga_event(struct snd_soc_dapm_widget *w, |
893 | struct snd_kcontrol *kcontrol, int event) | 790 | struct snd_kcontrol *kcontrol, int event) |
894 | { | 791 | { |
895 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); | 792 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); |
896 | 793 | ||
@@ -914,7 +811,7 @@ static int headsetrpga_event(struct snd_soc_dapm_widget *w, | |||
914 | } | 811 | } |
915 | 812 | ||
916 | static int digimic_event(struct snd_soc_dapm_widget *w, | 813 | static int digimic_event(struct snd_soc_dapm_widget *w, |
917 | struct snd_kcontrol *kcontrol, int event) | 814 | struct snd_kcontrol *kcontrol, int event) |
918 | { | 815 | { |
919 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); | 816 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); |
920 | struct twl4030_codec_data *pdata = twl4030->pdata; | 817 | struct twl4030_codec_data *pdata = twl4030->pdata; |
@@ -935,7 +832,7 @@ static int digimic_event(struct snd_soc_dapm_widget *w, | |||
935 | * Custom volsw and volsw_2r get/put functions to handle these gain bits. | 832 | * Custom volsw and volsw_2r get/put functions to handle these gain bits. |
936 | */ | 833 | */ |
937 | static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol, | 834 | static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol, |
938 | struct snd_ctl_elem_value *ucontrol) | 835 | struct snd_ctl_elem_value *ucontrol) |
939 | { | 836 | { |
940 | struct soc_mixer_control *mc = | 837 | struct soc_mixer_control *mc = |
941 | (struct soc_mixer_control *)kcontrol->private_value; | 838 | (struct soc_mixer_control *)kcontrol->private_value; |
@@ -964,7 +861,7 @@ static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol, | |||
964 | } | 861 | } |
965 | 862 | ||
966 | static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol, | 863 | static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol, |
967 | struct snd_ctl_elem_value *ucontrol) | 864 | struct snd_ctl_elem_value *ucontrol) |
968 | { | 865 | { |
969 | struct soc_mixer_control *mc = | 866 | struct soc_mixer_control *mc = |
970 | (struct soc_mixer_control *)kcontrol->private_value; | 867 | (struct soc_mixer_control *)kcontrol->private_value; |
@@ -993,7 +890,7 @@ static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol, | |||
993 | } | 890 | } |
994 | 891 | ||
995 | static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, | 892 | static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, |
996 | struct snd_ctl_elem_value *ucontrol) | 893 | struct snd_ctl_elem_value *ucontrol) |
997 | { | 894 | { |
998 | struct soc_mixer_control *mc = | 895 | struct soc_mixer_control *mc = |
999 | (struct soc_mixer_control *)kcontrol->private_value; | 896 | (struct soc_mixer_control *)kcontrol->private_value; |
@@ -1020,7 +917,7 @@ static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, | |||
1020 | } | 917 | } |
1021 | 918 | ||
1022 | static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, | 919 | static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, |
1023 | struct snd_ctl_elem_value *ucontrol) | 920 | struct snd_ctl_elem_value *ucontrol) |
1024 | { | 921 | { |
1025 | struct soc_mixer_control *mc = | 922 | struct soc_mixer_control *mc = |
1026 | (struct soc_mixer_control *)kcontrol->private_value; | 923 | (struct soc_mixer_control *)kcontrol->private_value; |
@@ -1751,11 +1648,11 @@ static void twl4030_constraints(struct twl4030_priv *twl4030, | |||
1751 | /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for | 1648 | /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for |
1752 | * capture has to be enabled/disabled. */ | 1649 | * capture has to be enabled/disabled. */ |
1753 | static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction, | 1650 | static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction, |
1754 | int enable) | 1651 | int enable) |
1755 | { | 1652 | { |
1756 | u8 reg, mask; | 1653 | u8 reg, mask; |
1757 | 1654 | ||
1758 | reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION); | 1655 | reg = twl4030_read(codec, TWL4030_REG_OPTION); |
1759 | 1656 | ||
1760 | if (direction == SNDRV_PCM_STREAM_PLAYBACK) | 1657 | if (direction == SNDRV_PCM_STREAM_PLAYBACK) |
1761 | mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN; | 1658 | mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN; |
@@ -1784,14 +1681,14 @@ static int twl4030_startup(struct snd_pcm_substream *substream, | |||
1784 | if (twl4030->configured) | 1681 | if (twl4030->configured) |
1785 | twl4030_constraints(twl4030, twl4030->master_substream); | 1682 | twl4030_constraints(twl4030, twl4030->master_substream); |
1786 | } else { | 1683 | } else { |
1787 | if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) & | 1684 | if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) & |
1788 | TWL4030_OPTION_1)) { | 1685 | TWL4030_OPTION_1)) { |
1789 | /* In option2 4 channel is not supported, set the | 1686 | /* In option2 4 channel is not supported, set the |
1790 | * constraint for the first stream for channels, the | 1687 | * constraint for the first stream for channels, the |
1791 | * second stream will 'inherit' this cosntraint */ | 1688 | * second stream will 'inherit' this cosntraint */ |
1792 | snd_pcm_hw_constraint_minmax(substream->runtime, | 1689 | snd_pcm_hw_constraint_minmax(substream->runtime, |
1793 | SNDRV_PCM_HW_PARAM_CHANNELS, | 1690 | SNDRV_PCM_HW_PARAM_CHANNELS, |
1794 | 2, 2); | 1691 | 2, 2); |
1795 | } | 1692 | } |
1796 | twl4030->master_substream = substream; | 1693 | twl4030->master_substream = substream; |
1797 | } | 1694 | } |
@@ -1823,8 +1720,8 @@ static void twl4030_shutdown(struct snd_pcm_substream *substream, | |||
1823 | } | 1720 | } |
1824 | 1721 | ||
1825 | static int twl4030_hw_params(struct snd_pcm_substream *substream, | 1722 | static int twl4030_hw_params(struct snd_pcm_substream *substream, |
1826 | struct snd_pcm_hw_params *params, | 1723 | struct snd_pcm_hw_params *params, |
1827 | struct snd_soc_dai *dai) | 1724 | struct snd_soc_dai *dai) |
1828 | { | 1725 | { |
1829 | struct snd_soc_codec *codec = dai->codec; | 1726 | struct snd_soc_codec *codec = dai->codec; |
1830 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 1727 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
@@ -1832,8 +1729,8 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, | |||
1832 | 1729 | ||
1833 | /* If the substream has 4 channel, do the necessary setup */ | 1730 | /* If the substream has 4 channel, do the necessary setup */ |
1834 | if (params_channels(params) == 4) { | 1731 | if (params_channels(params) == 4) { |
1835 | format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); | 1732 | format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); |
1836 | mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE); | 1733 | mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE); |
1837 | 1734 | ||
1838 | /* Safety check: are we in the correct operating mode and | 1735 | /* Safety check: are we in the correct operating mode and |
1839 | * the interface is in TDM mode? */ | 1736 | * the interface is in TDM mode? */ |
@@ -1849,8 +1746,8 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, | |||
1849 | return 0; | 1746 | return 0; |
1850 | 1747 | ||
1851 | /* bit rate */ | 1748 | /* bit rate */ |
1852 | old_mode = twl4030_read_reg_cache(codec, | 1749 | old_mode = twl4030_read(codec, |
1853 | TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; | 1750 | TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; |
1854 | mode = old_mode & ~TWL4030_APLL_RATE; | 1751 | mode = old_mode & ~TWL4030_APLL_RATE; |
1855 | 1752 | ||
1856 | switch (params_rate(params)) { | 1753 | switch (params_rate(params)) { |
@@ -1891,7 +1788,7 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, | |||
1891 | } | 1788 | } |
1892 | 1789 | ||
1893 | /* sample size */ | 1790 | /* sample size */ |
1894 | old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); | 1791 | old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); |
1895 | format = old_format; | 1792 | format = old_format; |
1896 | format &= ~TWL4030_DATA_WIDTH; | 1793 | format &= ~TWL4030_DATA_WIDTH; |
1897 | switch (params_format(params)) { | 1794 | switch (params_format(params)) { |
@@ -1940,8 +1837,8 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, | |||
1940 | return 0; | 1837 | return 0; |
1941 | } | 1838 | } |
1942 | 1839 | ||
1943 | static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, | 1840 | static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id, |
1944 | int clk_id, unsigned int freq, int dir) | 1841 | unsigned int freq, int dir) |
1945 | { | 1842 | { |
1946 | struct snd_soc_codec *codec = codec_dai->codec; | 1843 | struct snd_soc_codec *codec = codec_dai->codec; |
1947 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 1844 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
@@ -1966,15 +1863,14 @@ static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |||
1966 | return 0; | 1863 | return 0; |
1967 | } | 1864 | } |
1968 | 1865 | ||
1969 | static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, | 1866 | static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) |
1970 | unsigned int fmt) | ||
1971 | { | 1867 | { |
1972 | struct snd_soc_codec *codec = codec_dai->codec; | 1868 | struct snd_soc_codec *codec = codec_dai->codec; |
1973 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 1869 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
1974 | u8 old_format, format; | 1870 | u8 old_format, format; |
1975 | 1871 | ||
1976 | /* get format */ | 1872 | /* get format */ |
1977 | old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); | 1873 | old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); |
1978 | format = old_format; | 1874 | format = old_format; |
1979 | 1875 | ||
1980 | /* set master/slave audio interface */ | 1876 | /* set master/slave audio interface */ |
@@ -2024,7 +1920,7 @@ static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
2024 | static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate) | 1920 | static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate) |
2025 | { | 1921 | { |
2026 | struct snd_soc_codec *codec = dai->codec; | 1922 | struct snd_soc_codec *codec = dai->codec; |
2027 | u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); | 1923 | u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF); |
2028 | 1924 | ||
2029 | if (tristate) | 1925 | if (tristate) |
2030 | reg |= TWL4030_AIF_TRI_EN; | 1926 | reg |= TWL4030_AIF_TRI_EN; |
@@ -2037,11 +1933,11 @@ static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate) | |||
2037 | /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R | 1933 | /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R |
2038 | * (VTXL, VTXR) for uplink has to be enabled/disabled. */ | 1934 | * (VTXL, VTXR) for uplink has to be enabled/disabled. */ |
2039 | static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction, | 1935 | static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction, |
2040 | int enable) | 1936 | int enable) |
2041 | { | 1937 | { |
2042 | u8 reg, mask; | 1938 | u8 reg, mask; |
2043 | 1939 | ||
2044 | reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION); | 1940 | reg = twl4030_read(codec, TWL4030_REG_OPTION); |
2045 | 1941 | ||
2046 | if (direction == SNDRV_PCM_STREAM_PLAYBACK) | 1942 | if (direction == SNDRV_PCM_STREAM_PLAYBACK) |
2047 | mask = TWL4030_ARXL1_VRX_EN; | 1943 | mask = TWL4030_ARXL1_VRX_EN; |
@@ -2057,7 +1953,7 @@ static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction, | |||
2057 | } | 1953 | } |
2058 | 1954 | ||
2059 | static int twl4030_voice_startup(struct snd_pcm_substream *substream, | 1955 | static int twl4030_voice_startup(struct snd_pcm_substream *substream, |
2060 | struct snd_soc_dai *dai) | 1956 | struct snd_soc_dai *dai) |
2061 | { | 1957 | { |
2062 | struct snd_soc_codec *codec = dai->codec; | 1958 | struct snd_soc_codec *codec = dai->codec; |
2063 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 1959 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
@@ -2076,7 +1972,7 @@ static int twl4030_voice_startup(struct snd_pcm_substream *substream, | |||
2076 | /* If the codec mode is not option2, the voice PCM interface is not | 1972 | /* If the codec mode is not option2, the voice PCM interface is not |
2077 | * available. | 1973 | * available. |
2078 | */ | 1974 | */ |
2079 | mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) | 1975 | mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE) |
2080 | & TWL4030_OPT_MODE; | 1976 | & TWL4030_OPT_MODE; |
2081 | 1977 | ||
2082 | if (mode != TWL4030_OPTION_2) { | 1978 | if (mode != TWL4030_OPTION_2) { |
@@ -2089,7 +1985,7 @@ static int twl4030_voice_startup(struct snd_pcm_substream *substream, | |||
2089 | } | 1985 | } |
2090 | 1986 | ||
2091 | static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, | 1987 | static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, |
2092 | struct snd_soc_dai *dai) | 1988 | struct snd_soc_dai *dai) |
2093 | { | 1989 | { |
2094 | struct snd_soc_codec *codec = dai->codec; | 1990 | struct snd_soc_codec *codec = dai->codec; |
2095 | 1991 | ||
@@ -2098,7 +1994,8 @@ static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, | |||
2098 | } | 1994 | } |
2099 | 1995 | ||
2100 | static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, | 1996 | static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, |
2101 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | 1997 | struct snd_pcm_hw_params *params, |
1998 | struct snd_soc_dai *dai) | ||
2102 | { | 1999 | { |
2103 | struct snd_soc_codec *codec = dai->codec; | 2000 | struct snd_soc_codec *codec = dai->codec; |
2104 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 2001 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
@@ -2108,8 +2005,8 @@ static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, | |||
2108 | twl4030_voice_enable(codec, substream->stream, 1); | 2005 | twl4030_voice_enable(codec, substream->stream, 1); |
2109 | 2006 | ||
2110 | /* bit rate */ | 2007 | /* bit rate */ |
2111 | old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) | 2008 | old_mode = twl4030_read(codec, |
2112 | & ~(TWL4030_CODECPDZ); | 2009 | TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; |
2113 | mode = old_mode; | 2010 | mode = old_mode; |
2114 | 2011 | ||
2115 | switch (params_rate(params)) { | 2012 | switch (params_rate(params)) { |
@@ -2143,7 +2040,7 @@ static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, | |||
2143 | } | 2040 | } |
2144 | 2041 | ||
2145 | static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai, | 2042 | static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
2146 | int clk_id, unsigned int freq, int dir) | 2043 | int clk_id, unsigned int freq, int dir) |
2147 | { | 2044 | { |
2148 | struct snd_soc_codec *codec = codec_dai->codec; | 2045 | struct snd_soc_codec *codec = codec_dai->codec; |
2149 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 2046 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
@@ -2164,14 +2061,14 @@ static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |||
2164 | } | 2061 | } |
2165 | 2062 | ||
2166 | static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, | 2063 | static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, |
2167 | unsigned int fmt) | 2064 | unsigned int fmt) |
2168 | { | 2065 | { |
2169 | struct snd_soc_codec *codec = codec_dai->codec; | 2066 | struct snd_soc_codec *codec = codec_dai->codec; |
2170 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 2067 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
2171 | u8 old_format, format; | 2068 | u8 old_format, format; |
2172 | 2069 | ||
2173 | /* get format */ | 2070 | /* get format */ |
2174 | old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF); | 2071 | old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF); |
2175 | format = old_format; | 2072 | format = old_format; |
2176 | 2073 | ||
2177 | /* set master/slave audio interface */ | 2074 | /* set master/slave audio interface */ |
@@ -2218,7 +2115,7 @@ static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
2218 | static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate) | 2115 | static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate) |
2219 | { | 2116 | { |
2220 | struct snd_soc_codec *codec = dai->codec; | 2117 | struct snd_soc_codec *codec = dai->codec; |
2221 | u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF); | 2118 | u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF); |
2222 | 2119 | ||
2223 | if (tristate) | 2120 | if (tristate) |
2224 | reg |= TWL4030_VIF_TRI_EN; | 2121 | reg |= TWL4030_VIF_TRI_EN; |
@@ -2310,8 +2207,6 @@ static int twl4030_soc_remove(struct snd_soc_codec *codec) | |||
2310 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); | 2207 | struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); |
2311 | struct twl4030_codec_data *pdata = twl4030->pdata; | 2208 | struct twl4030_codec_data *pdata = twl4030->pdata; |
2312 | 2209 | ||
2313 | /* Reset registers to their chip default before leaving */ | ||
2314 | twl4030_reset_registers(codec); | ||
2315 | twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF); | 2210 | twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF); |
2316 | 2211 | ||
2317 | if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio)) | 2212 | if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio)) |
@@ -2323,13 +2218,10 @@ static int twl4030_soc_remove(struct snd_soc_codec *codec) | |||
2323 | static struct snd_soc_codec_driver soc_codec_dev_twl4030 = { | 2218 | static struct snd_soc_codec_driver soc_codec_dev_twl4030 = { |
2324 | .probe = twl4030_soc_probe, | 2219 | .probe = twl4030_soc_probe, |
2325 | .remove = twl4030_soc_remove, | 2220 | .remove = twl4030_soc_remove, |
2326 | .read = twl4030_read_reg_cache, | 2221 | .read = twl4030_read, |
2327 | .write = twl4030_write, | 2222 | .write = twl4030_write, |
2328 | .set_bias_level = twl4030_set_bias_level, | 2223 | .set_bias_level = twl4030_set_bias_level, |
2329 | .idle_bias_off = true, | 2224 | .idle_bias_off = true, |
2330 | .reg_cache_size = sizeof(twl4030_reg), | ||
2331 | .reg_word_size = sizeof(u8), | ||
2332 | .reg_cache_default = twl4030_reg, | ||
2333 | 2225 | ||
2334 | .controls = twl4030_snd_controls, | 2226 | .controls = twl4030_snd_controls, |
2335 | .num_controls = ARRAY_SIZE(twl4030_snd_controls), | 2227 | .num_controls = ARRAY_SIZE(twl4030_snd_controls), |
@@ -2342,7 +2234,7 @@ static struct snd_soc_codec_driver soc_codec_dev_twl4030 = { | |||
2342 | static int twl4030_codec_probe(struct platform_device *pdev) | 2234 | static int twl4030_codec_probe(struct platform_device *pdev) |
2343 | { | 2235 | { |
2344 | return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030, | 2236 | return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030, |
2345 | twl4030_dai, ARRAY_SIZE(twl4030_dai)); | 2237 | twl4030_dai, ARRAY_SIZE(twl4030_dai)); |
2346 | } | 2238 | } |
2347 | 2239 | ||
2348 | static int twl4030_codec_remove(struct platform_device *pdev) | 2240 | static int twl4030_codec_remove(struct platform_device *pdev) |
diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index f2f4bcb2ff71..0afe8bef6765 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c | |||
@@ -72,6 +72,7 @@ struct twl6040_data { | |||
72 | int hs_power_mode_locked; | 72 | int hs_power_mode_locked; |
73 | bool dl1_unmuted; | 73 | bool dl1_unmuted; |
74 | bool dl2_unmuted; | 74 | bool dl2_unmuted; |
75 | u8 dl12_cache[TWL6040_REG_HFRCTL - TWL6040_REG_HSLCTL + 1]; | ||
75 | unsigned int clk_in; | 76 | unsigned int clk_in; |
76 | unsigned int sysclk; | 77 | unsigned int sysclk; |
77 | struct twl6040_jack_data hs_jack; | 78 | struct twl6040_jack_data hs_jack; |
@@ -79,75 +80,6 @@ struct twl6040_data { | |||
79 | struct mutex mutex; | 80 | struct mutex mutex; |
80 | }; | 81 | }; |
81 | 82 | ||
82 | /* | ||
83 | * twl6040 register cache & default register settings | ||
84 | */ | ||
85 | static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = { | ||
86 | 0x00, /* not used 0x00 */ | ||
87 | 0x4B, /* REG_ASICID 0x01 (ro) */ | ||
88 | 0x00, /* REG_ASICREV 0x02 (ro) */ | ||
89 | 0x00, /* REG_INTID 0x03 */ | ||
90 | 0x00, /* REG_INTMR 0x04 */ | ||
91 | 0x00, /* REG_NCPCTRL 0x05 */ | ||
92 | 0x00, /* REG_LDOCTL 0x06 */ | ||
93 | 0x60, /* REG_HPPLLCTL 0x07 */ | ||
94 | 0x00, /* REG_LPPLLCTL 0x08 */ | ||
95 | 0x4A, /* REG_LPPLLDIV 0x09 */ | ||
96 | 0x00, /* REG_AMICBCTL 0x0A */ | ||
97 | 0x00, /* REG_DMICBCTL 0x0B */ | ||
98 | 0x00, /* REG_MICLCTL 0x0C */ | ||
99 | 0x00, /* REG_MICRCTL 0x0D */ | ||
100 | 0x00, /* REG_MICGAIN 0x0E */ | ||
101 | 0x1B, /* REG_LINEGAIN 0x0F */ | ||
102 | 0x00, /* REG_HSLCTL 0x10 */ | ||
103 | 0x00, /* REG_HSRCTL 0x11 */ | ||
104 | 0x00, /* REG_HSGAIN 0x12 */ | ||
105 | 0x00, /* REG_EARCTL 0x13 */ | ||
106 | 0x00, /* REG_HFLCTL 0x14 */ | ||
107 | 0x00, /* REG_HFLGAIN 0x15 */ | ||
108 | 0x00, /* REG_HFRCTL 0x16 */ | ||
109 | 0x00, /* REG_HFRGAIN 0x17 */ | ||
110 | 0x00, /* REG_VIBCTLL 0x18 */ | ||
111 | 0x00, /* REG_VIBDATL 0x19 */ | ||
112 | 0x00, /* REG_VIBCTLR 0x1A */ | ||
113 | 0x00, /* REG_VIBDATR 0x1B */ | ||
114 | 0x00, /* REG_HKCTL1 0x1C */ | ||
115 | 0x00, /* REG_HKCTL2 0x1D */ | ||
116 | 0x00, /* REG_GPOCTL 0x1E */ | ||
117 | 0x00, /* REG_ALB 0x1F */ | ||
118 | 0x00, /* REG_DLB 0x20 */ | ||
119 | 0x00, /* not used 0x21 */ | ||
120 | 0x00, /* not used 0x22 */ | ||
121 | 0x00, /* not used 0x23 */ | ||
122 | 0x00, /* not used 0x24 */ | ||
123 | 0x00, /* not used 0x25 */ | ||
124 | 0x00, /* not used 0x26 */ | ||
125 | 0x00, /* not used 0x27 */ | ||
126 | 0x00, /* REG_TRIM1 0x28 */ | ||
127 | 0x00, /* REG_TRIM2 0x29 */ | ||
128 | 0x00, /* REG_TRIM3 0x2A */ | ||
129 | 0x00, /* REG_HSOTRIM 0x2B */ | ||
130 | 0x00, /* REG_HFOTRIM 0x2C */ | ||
131 | 0x09, /* REG_ACCCTL 0x2D */ | ||
132 | 0x00, /* REG_STATUS 0x2E (ro) */ | ||
133 | }; | ||
134 | |||
135 | /* List of registers to be restored after power up */ | ||
136 | static const int twl6040_restore_list[] = { | ||
137 | TWL6040_REG_MICLCTL, | ||
138 | TWL6040_REG_MICRCTL, | ||
139 | TWL6040_REG_MICGAIN, | ||
140 | TWL6040_REG_LINEGAIN, | ||
141 | TWL6040_REG_HSLCTL, | ||
142 | TWL6040_REG_HSRCTL, | ||
143 | TWL6040_REG_HSGAIN, | ||
144 | TWL6040_REG_EARCTL, | ||
145 | TWL6040_REG_HFLCTL, | ||
146 | TWL6040_REG_HFLGAIN, | ||
147 | TWL6040_REG_HFRCTL, | ||
148 | TWL6040_REG_HFRGAIN, | ||
149 | }; | ||
150 | |||
151 | /* set of rates for each pll: low-power and high-performance */ | 83 | /* set of rates for each pll: low-power and high-performance */ |
152 | static unsigned int lp_rates[] = { | 84 | static unsigned int lp_rates[] = { |
153 | 8000, | 85 | 8000, |
@@ -174,53 +106,33 @@ static struct snd_pcm_hw_constraint_list sysclk_constraints[] = { | |||
174 | { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, }, | 106 | { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, }, |
175 | }; | 107 | }; |
176 | 108 | ||
177 | /* | 109 | static unsigned int twl6040_read(struct snd_soc_codec *codec, unsigned int reg) |
178 | * read twl6040 register cache | ||
179 | */ | ||
180 | static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec, | ||
181 | unsigned int reg) | ||
182 | { | ||
183 | u8 *cache = codec->reg_cache; | ||
184 | |||
185 | if (reg >= TWL6040_CACHEREGNUM) | ||
186 | return -EIO; | ||
187 | |||
188 | return cache[reg]; | ||
189 | } | ||
190 | |||
191 | /* | ||
192 | * write twl6040 register cache | ||
193 | */ | ||
194 | static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec, | ||
195 | u8 reg, u8 value) | ||
196 | { | ||
197 | u8 *cache = codec->reg_cache; | ||
198 | |||
199 | if (reg >= TWL6040_CACHEREGNUM) | ||
200 | return; | ||
201 | cache[reg] = value; | ||
202 | } | ||
203 | |||
204 | /* | ||
205 | * read from twl6040 hardware register | ||
206 | */ | ||
207 | static int twl6040_read_reg_volatile(struct snd_soc_codec *codec, | ||
208 | unsigned int reg) | ||
209 | { | 110 | { |
111 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | ||
210 | struct twl6040 *twl6040 = codec->control_data; | 112 | struct twl6040 *twl6040 = codec->control_data; |
211 | u8 value; | 113 | u8 value; |
212 | 114 | ||
213 | if (reg >= TWL6040_CACHEREGNUM) | 115 | if (reg >= TWL6040_CACHEREGNUM) |
214 | return -EIO; | 116 | return -EIO; |
215 | 117 | ||
216 | value = twl6040_reg_read(twl6040, reg); | 118 | switch (reg) { |
217 | twl6040_write_reg_cache(codec, reg, value); | 119 | case TWL6040_REG_HSLCTL: |
120 | case TWL6040_REG_HSRCTL: | ||
121 | case TWL6040_REG_EARCTL: | ||
122 | case TWL6040_REG_HFLCTL: | ||
123 | case TWL6040_REG_HFRCTL: | ||
124 | value = priv->dl12_cache[reg - TWL6040_REG_HSLCTL]; | ||
125 | break; | ||
126 | default: | ||
127 | value = twl6040_reg_read(twl6040, reg); | ||
128 | break; | ||
129 | } | ||
218 | 130 | ||
219 | return value; | 131 | return value; |
220 | } | 132 | } |
221 | 133 | ||
222 | static bool twl6040_is_path_unmuted(struct snd_soc_codec *codec, | 134 | static bool twl6040_can_write_to_chip(struct snd_soc_codec *codec, |
223 | unsigned int reg) | 135 | unsigned int reg) |
224 | { | 136 | { |
225 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | 137 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); |
226 | 138 | ||
@@ -238,9 +150,24 @@ static bool twl6040_is_path_unmuted(struct snd_soc_codec *codec, | |||
238 | } | 150 | } |
239 | } | 151 | } |
240 | 152 | ||
241 | /* | 153 | static inline void twl6040_update_dl12_cache(struct snd_soc_codec *codec, |
242 | * write to the twl6040 register space | 154 | u8 reg, u8 value) |
243 | */ | 155 | { |
156 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | ||
157 | |||
158 | switch (reg) { | ||
159 | case TWL6040_REG_HSLCTL: | ||
160 | case TWL6040_REG_HSRCTL: | ||
161 | case TWL6040_REG_EARCTL: | ||
162 | case TWL6040_REG_HFLCTL: | ||
163 | case TWL6040_REG_HFRCTL: | ||
164 | priv->dl12_cache[reg - TWL6040_REG_HSLCTL] = value; | ||
165 | break; | ||
166 | default: | ||
167 | break; | ||
168 | } | ||
169 | } | ||
170 | |||
244 | static int twl6040_write(struct snd_soc_codec *codec, | 171 | static int twl6040_write(struct snd_soc_codec *codec, |
245 | unsigned int reg, unsigned int value) | 172 | unsigned int reg, unsigned int value) |
246 | { | 173 | { |
@@ -249,8 +176,8 @@ static int twl6040_write(struct snd_soc_codec *codec, | |||
249 | if (reg >= TWL6040_CACHEREGNUM) | 176 | if (reg >= TWL6040_CACHEREGNUM) |
250 | return -EIO; | 177 | return -EIO; |
251 | 178 | ||
252 | twl6040_write_reg_cache(codec, reg, value); | 179 | twl6040_update_dl12_cache(codec, reg, value); |
253 | if (twl6040_is_path_unmuted(codec, reg)) | 180 | if (twl6040_can_write_to_chip(codec, reg)) |
254 | return twl6040_reg_write(twl6040, reg, value); | 181 | return twl6040_reg_write(twl6040, reg, value); |
255 | else | 182 | else |
256 | return 0; | 183 | return 0; |
@@ -258,45 +185,27 @@ static int twl6040_write(struct snd_soc_codec *codec, | |||
258 | 185 | ||
259 | static void twl6040_init_chip(struct snd_soc_codec *codec) | 186 | static void twl6040_init_chip(struct snd_soc_codec *codec) |
260 | { | 187 | { |
261 | struct twl6040 *twl6040 = codec->control_data; | 188 | twl6040_read(codec, TWL6040_REG_TRIM1); |
262 | u8 val; | 189 | twl6040_read(codec, TWL6040_REG_TRIM2); |
263 | 190 | twl6040_read(codec, TWL6040_REG_TRIM3); | |
264 | /* Update reg_cache: ASICREV, and TRIM values */ | 191 | twl6040_read(codec, TWL6040_REG_HSOTRIM); |
265 | val = twl6040_get_revid(twl6040); | 192 | twl6040_read(codec, TWL6040_REG_HFOTRIM); |
266 | twl6040_write_reg_cache(codec, TWL6040_REG_ASICREV, val); | ||
267 | |||
268 | twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM1); | ||
269 | twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM2); | ||
270 | twl6040_read_reg_volatile(codec, TWL6040_REG_TRIM3); | ||
271 | twl6040_read_reg_volatile(codec, TWL6040_REG_HSOTRIM); | ||
272 | twl6040_read_reg_volatile(codec, TWL6040_REG_HFOTRIM); | ||
273 | 193 | ||
274 | /* Change chip defaults */ | 194 | /* Change chip defaults */ |
275 | /* No imput selected for microphone amplifiers */ | 195 | /* No imput selected for microphone amplifiers */ |
276 | twl6040_write_reg_cache(codec, TWL6040_REG_MICLCTL, 0x18); | 196 | twl6040_write(codec, TWL6040_REG_MICLCTL, 0x18); |
277 | twl6040_write_reg_cache(codec, TWL6040_REG_MICRCTL, 0x18); | 197 | twl6040_write(codec, TWL6040_REG_MICRCTL, 0x18); |
278 | 198 | ||
279 | /* | 199 | /* |
280 | * We need to lower the default gain values, so the ramp code | 200 | * We need to lower the default gain values, so the ramp code |
281 | * can work correctly for the first playback. | 201 | * can work correctly for the first playback. |
282 | * This reduces the pop noise heard at the first playback. | 202 | * This reduces the pop noise heard at the first playback. |
283 | */ | 203 | */ |
284 | twl6040_write_reg_cache(codec, TWL6040_REG_HSGAIN, 0xff); | 204 | twl6040_write(codec, TWL6040_REG_HSGAIN, 0xff); |
285 | twl6040_write_reg_cache(codec, TWL6040_REG_EARCTL, 0x1e); | 205 | twl6040_write(codec, TWL6040_REG_EARCTL, 0x1e); |
286 | twl6040_write_reg_cache(codec, TWL6040_REG_HFLGAIN, 0x1d); | 206 | twl6040_write(codec, TWL6040_REG_HFLGAIN, 0x1d); |
287 | twl6040_write_reg_cache(codec, TWL6040_REG_HFRGAIN, 0x1d); | 207 | twl6040_write(codec, TWL6040_REG_HFRGAIN, 0x1d); |
288 | twl6040_write_reg_cache(codec, TWL6040_REG_LINEGAIN, 0); | 208 | twl6040_write(codec, TWL6040_REG_LINEGAIN, 0); |
289 | } | ||
290 | |||
291 | static void twl6040_restore_regs(struct snd_soc_codec *codec) | ||
292 | { | ||
293 | u8 *cache = codec->reg_cache; | ||
294 | int reg, i; | ||
295 | |||
296 | for (i = 0; i < ARRAY_SIZE(twl6040_restore_list); i++) { | ||
297 | reg = twl6040_restore_list[i]; | ||
298 | twl6040_write(codec, reg, cache[reg]); | ||
299 | } | ||
300 | } | 209 | } |
301 | 210 | ||
302 | /* set headset dac and driver power mode */ | 211 | /* set headset dac and driver power mode */ |
@@ -305,8 +214,8 @@ static int headset_power_mode(struct snd_soc_codec *codec, int high_perf) | |||
305 | int hslctl, hsrctl; | 214 | int hslctl, hsrctl; |
306 | int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE; | 215 | int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE; |
307 | 216 | ||
308 | hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); | 217 | hslctl = twl6040_read(codec, TWL6040_REG_HSLCTL); |
309 | hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); | 218 | hsrctl = twl6040_read(codec, TWL6040_REG_HSRCTL); |
310 | 219 | ||
311 | if (high_perf) { | 220 | if (high_perf) { |
312 | hslctl &= ~mask; | 221 | hslctl &= ~mask; |
@@ -333,8 +242,8 @@ static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w, | |||
333 | * Both HS DAC need to be turned on (before the HS driver) and off at | 242 | * Both HS DAC need to be turned on (before the HS driver) and off at |
334 | * the same time. | 243 | * the same time. |
335 | */ | 244 | */ |
336 | hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); | 245 | hslctl = twl6040_read(codec, TWL6040_REG_HSLCTL); |
337 | hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); | 246 | hsrctl = twl6040_read(codec, TWL6040_REG_HSRCTL); |
338 | if (SND_SOC_DAPM_EVENT_ON(event)) { | 247 | if (SND_SOC_DAPM_EVENT_ON(event)) { |
339 | hslctl |= TWL6040_HSDACENA; | 248 | hslctl |= TWL6040_HSDACENA; |
340 | hsrctl |= TWL6040_HSDACENA; | 249 | hsrctl |= TWL6040_HSDACENA; |
@@ -379,7 +288,7 @@ static void twl6040_hs_jack_report(struct snd_soc_codec *codec, | |||
379 | mutex_lock(&priv->mutex); | 288 | mutex_lock(&priv->mutex); |
380 | 289 | ||
381 | /* Sync status */ | 290 | /* Sync status */ |
382 | status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS); | 291 | status = twl6040_read(codec, TWL6040_REG_STATUS); |
383 | if (status & TWL6040_PLUGCOMP) | 292 | if (status & TWL6040_PLUGCOMP) |
384 | snd_soc_jack_report(jack, report, report); | 293 | snd_soc_jack_report(jack, report, report); |
385 | else | 294 | else |
@@ -431,7 +340,7 @@ static int twl6040_soc_dapm_put_vibra_enum(struct snd_kcontrol *kcontrol, | |||
431 | unsigned int val; | 340 | unsigned int val; |
432 | 341 | ||
433 | /* Do not allow changes while Input/FF efect is running */ | 342 | /* Do not allow changes while Input/FF efect is running */ |
434 | val = twl6040_read_reg_volatile(codec, e->reg); | 343 | val = twl6040_read(codec, e->reg); |
435 | if (val & TWL6040_VIBENA && !(val & TWL6040_VIBSEL)) | 344 | if (val & TWL6040_VIBENA && !(val & TWL6040_VIBSEL)) |
436 | return -EBUSY; | 345 | return -EBUSY; |
437 | 346 | ||
@@ -656,7 +565,7 @@ int twl6040_get_trim_value(struct snd_soc_codec *codec, enum twl6040_trim trim) | |||
656 | if (unlikely(trim >= TWL6040_TRIM_INVAL)) | 565 | if (unlikely(trim >= TWL6040_TRIM_INVAL)) |
657 | return -EINVAL; | 566 | return -EINVAL; |
658 | 567 | ||
659 | return twl6040_read_reg_cache(codec, TWL6040_REG_TRIM1 + trim); | 568 | return twl6040_read(codec, TWL6040_REG_TRIM1 + trim); |
660 | } | 569 | } |
661 | EXPORT_SYMBOL_GPL(twl6040_get_trim_value); | 570 | EXPORT_SYMBOL_GPL(twl6040_get_trim_value); |
662 | 571 | ||
@@ -931,8 +840,6 @@ static int twl6040_set_bias_level(struct snd_soc_codec *codec, | |||
931 | 840 | ||
932 | priv->codec_powered = 1; | 841 | priv->codec_powered = 1; |
933 | 842 | ||
934 | twl6040_restore_regs(codec); | ||
935 | |||
936 | /* Set external boost GPO */ | 843 | /* Set external boost GPO */ |
937 | twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02); | 844 | twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02); |
938 | break; | 845 | break; |
@@ -1053,9 +960,9 @@ static void twl6040_mute_path(struct snd_soc_codec *codec, enum twl6040_dai_id i | |||
1053 | 960 | ||
1054 | switch (id) { | 961 | switch (id) { |
1055 | case TWL6040_DAI_DL1: | 962 | case TWL6040_DAI_DL1: |
1056 | hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); | 963 | hslctl = twl6040_read(codec, TWL6040_REG_HSLCTL); |
1057 | hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); | 964 | hsrctl = twl6040_read(codec, TWL6040_REG_HSRCTL); |
1058 | earctl = twl6040_read_reg_cache(codec, TWL6040_REG_EARCTL); | 965 | earctl = twl6040_read(codec, TWL6040_REG_EARCTL); |
1059 | 966 | ||
1060 | if (mute) { | 967 | if (mute) { |
1061 | /* Power down drivers and DACs */ | 968 | /* Power down drivers and DACs */ |
@@ -1071,8 +978,8 @@ static void twl6040_mute_path(struct snd_soc_codec *codec, enum twl6040_dai_id i | |||
1071 | priv->dl1_unmuted = !mute; | 978 | priv->dl1_unmuted = !mute; |
1072 | break; | 979 | break; |
1073 | case TWL6040_DAI_DL2: | 980 | case TWL6040_DAI_DL2: |
1074 | hflctl = twl6040_read_reg_cache(codec, TWL6040_REG_HFLCTL); | 981 | hflctl = twl6040_read(codec, TWL6040_REG_HFLCTL); |
1075 | hfrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HFRCTL); | 982 | hfrctl = twl6040_read(codec, TWL6040_REG_HFRCTL); |
1076 | 983 | ||
1077 | if (mute) { | 984 | if (mute) { |
1078 | /* Power down drivers and DACs */ | 985 | /* Power down drivers and DACs */ |
@@ -1209,6 +1116,7 @@ static int twl6040_resume(struct snd_soc_codec *codec) | |||
1209 | static int twl6040_probe(struct snd_soc_codec *codec) | 1116 | static int twl6040_probe(struct snd_soc_codec *codec) |
1210 | { | 1117 | { |
1211 | struct twl6040_data *priv; | 1118 | struct twl6040_data *priv; |
1119 | struct twl6040 *twl6040 = dev_get_drvdata(codec->dev->parent); | ||
1212 | struct platform_device *pdev = container_of(codec->dev, | 1120 | struct platform_device *pdev = container_of(codec->dev, |
1213 | struct platform_device, dev); | 1121 | struct platform_device, dev); |
1214 | int ret = 0; | 1122 | int ret = 0; |
@@ -1220,7 +1128,7 @@ static int twl6040_probe(struct snd_soc_codec *codec) | |||
1220 | snd_soc_codec_set_drvdata(codec, priv); | 1128 | snd_soc_codec_set_drvdata(codec, priv); |
1221 | 1129 | ||
1222 | priv->codec = codec; | 1130 | priv->codec = codec; |
1223 | codec->control_data = dev_get_drvdata(codec->dev->parent); | 1131 | codec->control_data = twl6040; |
1224 | 1132 | ||
1225 | priv->plug_irq = platform_get_irq(pdev, 0); | 1133 | priv->plug_irq = platform_get_irq(pdev, 0); |
1226 | if (priv->plug_irq < 0) { | 1134 | if (priv->plug_irq < 0) { |
@@ -1240,10 +1148,10 @@ static int twl6040_probe(struct snd_soc_codec *codec) | |||
1240 | return ret; | 1148 | return ret; |
1241 | } | 1149 | } |
1242 | 1150 | ||
1151 | twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | ||
1243 | twl6040_init_chip(codec); | 1152 | twl6040_init_chip(codec); |
1244 | 1153 | ||
1245 | /* power on device */ | 1154 | return 0; |
1246 | return twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | ||
1247 | } | 1155 | } |
1248 | 1156 | ||
1249 | static int twl6040_remove(struct snd_soc_codec *codec) | 1157 | static int twl6040_remove(struct snd_soc_codec *codec) |
@@ -1261,12 +1169,9 @@ static struct snd_soc_codec_driver soc_codec_dev_twl6040 = { | |||
1261 | .remove = twl6040_remove, | 1169 | .remove = twl6040_remove, |
1262 | .suspend = twl6040_suspend, | 1170 | .suspend = twl6040_suspend, |
1263 | .resume = twl6040_resume, | 1171 | .resume = twl6040_resume, |
1264 | .read = twl6040_read_reg_cache, | 1172 | .read = twl6040_read, |
1265 | .write = twl6040_write, | 1173 | .write = twl6040_write, |
1266 | .set_bias_level = twl6040_set_bias_level, | 1174 | .set_bias_level = twl6040_set_bias_level, |
1267 | .reg_cache_size = ARRAY_SIZE(twl6040_reg), | ||
1268 | .reg_word_size = sizeof(u8), | ||
1269 | .reg_cache_default = twl6040_reg, | ||
1270 | .ignore_pmdown_time = true, | 1175 | .ignore_pmdown_time = true, |
1271 | 1176 | ||
1272 | .controls = twl6040_snd_controls, | 1177 | .controls = twl6040_snd_controls, |
diff --git a/sound/soc/codecs/uda1380.c b/sound/soc/codecs/uda1380.c index fd0a314bc209..726df6d43c2b 100644 --- a/sound/soc/codecs/uda1380.c +++ b/sound/soc/codecs/uda1380.c | |||
@@ -794,7 +794,7 @@ static struct snd_soc_codec_driver soc_codec_dev_uda1380 = { | |||
794 | .num_dapm_routes = ARRAY_SIZE(uda1380_dapm_routes), | 794 | .num_dapm_routes = ARRAY_SIZE(uda1380_dapm_routes), |
795 | }; | 795 | }; |
796 | 796 | ||
797 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 797 | #if IS_ENABLED(CONFIG_I2C) |
798 | static int uda1380_i2c_probe(struct i2c_client *i2c, | 798 | static int uda1380_i2c_probe(struct i2c_client *i2c, |
799 | const struct i2c_device_id *id) | 799 | const struct i2c_device_id *id) |
800 | { | 800 | { |
@@ -840,7 +840,7 @@ static struct i2c_driver uda1380_i2c_driver = { | |||
840 | static int __init uda1380_modinit(void) | 840 | static int __init uda1380_modinit(void) |
841 | { | 841 | { |
842 | int ret = 0; | 842 | int ret = 0; |
843 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 843 | #if IS_ENABLED(CONFIG_I2C) |
844 | ret = i2c_add_driver(&uda1380_i2c_driver); | 844 | ret = i2c_add_driver(&uda1380_i2c_driver); |
845 | if (ret != 0) | 845 | if (ret != 0) |
846 | pr_err("Failed to register UDA1380 I2C driver: %d\n", ret); | 846 | pr_err("Failed to register UDA1380 I2C driver: %d\n", ret); |
@@ -851,7 +851,7 @@ module_init(uda1380_modinit); | |||
851 | 851 | ||
852 | static void __exit uda1380_exit(void) | 852 | static void __exit uda1380_exit(void) |
853 | { | 853 | { |
854 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 854 | #if IS_ENABLED(CONFIG_I2C) |
855 | i2c_del_driver(&uda1380_i2c_driver); | 855 | i2c_del_driver(&uda1380_i2c_driver); |
856 | #endif | 856 | #endif |
857 | } | 857 | } |
diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index a08e8bf6d07c..ce9c8e14d4bd 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c | |||
@@ -601,8 +601,8 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w, | |||
601 | case SND_SOC_DAPM_POST_PMU: | 601 | case SND_SOC_DAPM_POST_PMU: |
602 | if (patch) | 602 | if (patch) |
603 | for (i = 0; i < patch_size; i++) | 603 | for (i = 0; i < patch_size; i++) |
604 | regmap_write(regmap, patch[i].reg, | 604 | regmap_write_async(regmap, patch[i].reg, |
605 | patch[i].def); | 605 | patch[i].def); |
606 | break; | 606 | break; |
607 | 607 | ||
608 | default: | 608 | default: |
diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 0ab2dc296474..d862f76b59f9 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c | |||
@@ -30,13 +30,51 @@ | |||
30 | #include <linux/mfd/arizona/registers.h> | 30 | #include <linux/mfd/arizona/registers.h> |
31 | 31 | ||
32 | #include "arizona.h" | 32 | #include "arizona.h" |
33 | #include "wm_adsp.h" | ||
33 | #include "wm5110.h" | 34 | #include "wm5110.h" |
34 | 35 | ||
36 | #define WM5110_NUM_ADSP 4 | ||
37 | |||
35 | struct wm5110_priv { | 38 | struct wm5110_priv { |
36 | struct arizona_priv core; | 39 | struct arizona_priv core; |
37 | struct arizona_fll fll[2]; | 40 | struct arizona_fll fll[2]; |
38 | }; | 41 | }; |
39 | 42 | ||
43 | static const struct wm_adsp_region wm5110_dsp1_regions[] = { | ||
44 | { .type = WMFW_ADSP2_PM, .base = 0x100000 }, | ||
45 | { .type = WMFW_ADSP2_ZM, .base = 0x180000 }, | ||
46 | { .type = WMFW_ADSP2_XM, .base = 0x190000 }, | ||
47 | { .type = WMFW_ADSP2_YM, .base = 0x1a8000 }, | ||
48 | }; | ||
49 | |||
50 | static const struct wm_adsp_region wm5110_dsp2_regions[] = { | ||
51 | { .type = WMFW_ADSP2_PM, .base = 0x200000 }, | ||
52 | { .type = WMFW_ADSP2_ZM, .base = 0x280000 }, | ||
53 | { .type = WMFW_ADSP2_XM, .base = 0x290000 }, | ||
54 | { .type = WMFW_ADSP2_YM, .base = 0x2a8000 }, | ||
55 | }; | ||
56 | |||
57 | static const struct wm_adsp_region wm5110_dsp3_regions[] = { | ||
58 | { .type = WMFW_ADSP2_PM, .base = 0x300000 }, | ||
59 | { .type = WMFW_ADSP2_ZM, .base = 0x380000 }, | ||
60 | { .type = WMFW_ADSP2_XM, .base = 0x390000 }, | ||
61 | { .type = WMFW_ADSP2_YM, .base = 0x3a8000 }, | ||
62 | }; | ||
63 | |||
64 | static const struct wm_adsp_region wm5110_dsp4_regions[] = { | ||
65 | { .type = WMFW_ADSP2_PM, .base = 0x400000 }, | ||
66 | { .type = WMFW_ADSP2_ZM, .base = 0x480000 }, | ||
67 | { .type = WMFW_ADSP2_XM, .base = 0x490000 }, | ||
68 | { .type = WMFW_ADSP2_YM, .base = 0x4a8000 }, | ||
69 | }; | ||
70 | |||
71 | static const struct wm_adsp_region *wm5110_dsp_regions[] = { | ||
72 | wm5110_dsp1_regions, | ||
73 | wm5110_dsp2_regions, | ||
74 | wm5110_dsp3_regions, | ||
75 | wm5110_dsp4_regions, | ||
76 | }; | ||
77 | |||
40 | static const struct reg_default wm5110_sysclk_revd_patch[] = { | 78 | static const struct reg_default wm5110_sysclk_revd_patch[] = { |
41 | { 0x3093, 0x1001 }, | 79 | { 0x3093, 0x1001 }, |
42 | { 0x30E3, 0x1301 }, | 80 | { 0x30E3, 0x1301 }, |
@@ -67,8 +105,8 @@ static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w, | |||
67 | case SND_SOC_DAPM_POST_PMU: | 105 | case SND_SOC_DAPM_POST_PMU: |
68 | if (patch) | 106 | if (patch) |
69 | for (i = 0; i < patch_size; i++) | 107 | for (i = 0; i < patch_size; i++) |
70 | regmap_write(regmap, patch[i].reg, | 108 | regmap_write_async(regmap, patch[i].reg, |
71 | patch[i].def); | 109 | patch[i].def); |
72 | break; | 110 | break; |
73 | 111 | ||
74 | default: | 112 | default: |
@@ -117,6 +155,25 @@ SOC_SINGLE_RANGE_TLV("IN3L Volume", ARIZONA_IN3L_CONTROL, | |||
117 | SOC_SINGLE_RANGE_TLV("IN3R Volume", ARIZONA_IN3R_CONTROL, | 155 | SOC_SINGLE_RANGE_TLV("IN3R Volume", ARIZONA_IN3R_CONTROL, |
118 | ARIZONA_IN3R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), | 156 | ARIZONA_IN3R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), |
119 | 157 | ||
158 | SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum), | ||
159 | |||
160 | SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL, | ||
161 | ARIZONA_IN1L_HPF_SHIFT, 1, 0), | ||
162 | SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL, | ||
163 | ARIZONA_IN1R_HPF_SHIFT, 1, 0), | ||
164 | SOC_SINGLE("IN2L HPF Switch", ARIZONA_IN2L_CONTROL, | ||
165 | ARIZONA_IN2L_HPF_SHIFT, 1, 0), | ||
166 | SOC_SINGLE("IN2R HPF Switch", ARIZONA_IN2R_CONTROL, | ||
167 | ARIZONA_IN2R_HPF_SHIFT, 1, 0), | ||
168 | SOC_SINGLE("IN3L HPF Switch", ARIZONA_IN3L_CONTROL, | ||
169 | ARIZONA_IN3L_HPF_SHIFT, 1, 0), | ||
170 | SOC_SINGLE("IN3R HPF Switch", ARIZONA_IN3R_CONTROL, | ||
171 | ARIZONA_IN3R_HPF_SHIFT, 1, 0), | ||
172 | SOC_SINGLE("IN4L HPF Switch", ARIZONA_IN4L_CONTROL, | ||
173 | ARIZONA_IN4L_HPF_SHIFT, 1, 0), | ||
174 | SOC_SINGLE("IN4R HPF Switch", ARIZONA_IN4R_CONTROL, | ||
175 | ARIZONA_IN4R_HPF_SHIFT, 1, 0), | ||
176 | |||
120 | SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, | 177 | SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, |
121 | ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), | 178 | ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), |
122 | SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, | 179 | SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, |
@@ -220,6 +277,14 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode), | |||
220 | SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), | 277 | SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), |
221 | SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), | 278 | SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), |
222 | 279 | ||
280 | SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]), | ||
281 | SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]), | ||
282 | SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]), | ||
283 | SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]), | ||
284 | SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]), | ||
285 | SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]), | ||
286 | SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1), | ||
287 | |||
223 | ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), | 288 | ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), |
224 | ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), | 289 | ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), |
225 | ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), | 290 | ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), |
@@ -248,6 +313,13 @@ ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), | |||
248 | ARIZONA_MIXER_CONTROLS("SPKDAT2L", ARIZONA_OUT6LMIX_INPUT_1_SOURCE), | 313 | ARIZONA_MIXER_CONTROLS("SPKDAT2L", ARIZONA_OUT6LMIX_INPUT_1_SOURCE), |
249 | ARIZONA_MIXER_CONTROLS("SPKDAT2R", ARIZONA_OUT6RMIX_INPUT_1_SOURCE), | 314 | ARIZONA_MIXER_CONTROLS("SPKDAT2R", ARIZONA_OUT6RMIX_INPUT_1_SOURCE), |
250 | 315 | ||
316 | SOC_SINGLE("HPOUT1 SC Protect Switch", ARIZONA_HP1_SHORT_CIRCUIT_CTRL, | ||
317 | ARIZONA_HP1_SC_ENA_SHIFT, 1, 0), | ||
318 | SOC_SINGLE("HPOUT2 SC Protect Switch", ARIZONA_HP2_SHORT_CIRCUIT_CTRL, | ||
319 | ARIZONA_HP2_SC_ENA_SHIFT, 1, 0), | ||
320 | SOC_SINGLE("HPOUT3 SC Protect Switch", ARIZONA_HP3_SHORT_CIRCUIT_CTRL, | ||
321 | ARIZONA_HP3_SC_ENA_SHIFT, 1, 0), | ||
322 | |||
251 | SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, | 323 | SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, |
252 | ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), | 324 | ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), |
253 | SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, | 325 | SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, |
@@ -285,6 +357,13 @@ SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, | |||
285 | SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, | 357 | SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, |
286 | ARIZONA_SPK2R_MUTE_SHIFT, 1, 1), | 358 | ARIZONA_SPK2R_MUTE_SHIFT, 1, 1), |
287 | 359 | ||
360 | SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE, | ||
361 | ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0), | ||
362 | SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE, | ||
363 | ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0), | ||
364 | SOC_DOUBLE("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE, | ||
365 | ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0), | ||
366 | |||
288 | SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), | 367 | SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), |
289 | SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), | 368 | SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), |
290 | 369 | ||
@@ -318,6 +397,10 @@ ARIZONA_MIXER_CONTROLS("AIF1TX8", ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE), | |||
318 | 397 | ||
319 | ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), | 398 | ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), |
320 | ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), | 399 | ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), |
400 | ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE), | ||
401 | ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE), | ||
402 | ARIZONA_MIXER_CONTROLS("AIF2TX5", ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE), | ||
403 | ARIZONA_MIXER_CONTROLS("AIF2TX6", ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE), | ||
321 | 404 | ||
322 | ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), | 405 | ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), |
323 | ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), | 406 | ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), |
@@ -347,6 +430,22 @@ ARIZONA_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE); | |||
347 | ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); | 430 | ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); |
348 | ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); | 431 | ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); |
349 | 432 | ||
433 | ARIZONA_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE); | ||
434 | ARIZONA_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE); | ||
435 | ARIZONA_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE); | ||
436 | |||
437 | ARIZONA_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE); | ||
438 | ARIZONA_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE); | ||
439 | ARIZONA_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE); | ||
440 | |||
441 | ARIZONA_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE); | ||
442 | ARIZONA_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE); | ||
443 | ARIZONA_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE); | ||
444 | |||
445 | ARIZONA_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE); | ||
446 | ARIZONA_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE); | ||
447 | ARIZONA_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE); | ||
448 | |||
350 | ARIZONA_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); | 449 | ARIZONA_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); |
351 | ARIZONA_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); | 450 | ARIZONA_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); |
352 | 451 | ||
@@ -377,6 +476,10 @@ ARIZONA_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); | |||
377 | 476 | ||
378 | ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); | 477 | ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); |
379 | ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); | 478 | ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); |
479 | ARIZONA_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); | ||
480 | ARIZONA_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); | ||
481 | ARIZONA_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); | ||
482 | ARIZONA_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); | ||
380 | 483 | ||
381 | ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); | 484 | ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); |
382 | ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); | 485 | ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); |
@@ -395,6 +498,36 @@ ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE); | |||
395 | ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); | 498 | ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); |
396 | ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE); | 499 | ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE); |
397 | 500 | ||
501 | ARIZONA_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE); | ||
502 | ARIZONA_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE); | ||
503 | ARIZONA_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE); | ||
504 | ARIZONA_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE); | ||
505 | |||
506 | ARIZONA_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE); | ||
507 | ARIZONA_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE); | ||
508 | ARIZONA_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE); | ||
509 | ARIZONA_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE); | ||
510 | |||
511 | ARIZONA_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE); | ||
512 | ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE); | ||
513 | ARIZONA_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE); | ||
514 | ARIZONA_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE); | ||
515 | |||
516 | ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE); | ||
517 | ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE); | ||
518 | ARIZONA_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE); | ||
519 | ARIZONA_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE); | ||
520 | |||
521 | ARIZONA_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE); | ||
522 | ARIZONA_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE); | ||
523 | ARIZONA_MUX_ENUMS(ISRC3INT3, ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE); | ||
524 | ARIZONA_MUX_ENUMS(ISRC3INT4, ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE); | ||
525 | |||
526 | ARIZONA_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE); | ||
527 | ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE); | ||
528 | ARIZONA_MUX_ENUMS(ISRC3DEC3, ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE); | ||
529 | ARIZONA_MUX_ENUMS(ISRC3DEC4, ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE); | ||
530 | |||
398 | static const char *wm5110_aec_loopback_texts[] = { | 531 | static const char *wm5110_aec_loopback_texts[] = { |
399 | "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", | 532 | "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", |
400 | "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", | 533 | "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", |
@@ -535,6 +668,65 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, | |||
535 | SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, | 668 | SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, |
536 | NULL, 0), | 669 | NULL, 0), |
537 | 670 | ||
671 | WM_ADSP2("DSP1", 0), | ||
672 | WM_ADSP2("DSP2", 1), | ||
673 | WM_ADSP2("DSP3", 2), | ||
674 | WM_ADSP2("DSP4", 3), | ||
675 | |||
676 | SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, | ||
677 | ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), | ||
678 | SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3, | ||
679 | ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), | ||
680 | SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3, | ||
681 | ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), | ||
682 | SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3, | ||
683 | ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), | ||
684 | |||
685 | SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3, | ||
686 | ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0), | ||
687 | SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3, | ||
688 | ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), | ||
689 | SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3, | ||
690 | ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), | ||
691 | SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3, | ||
692 | ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), | ||
693 | |||
694 | SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3, | ||
695 | ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0), | ||
696 | SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3, | ||
697 | ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), | ||
698 | SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3, | ||
699 | ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), | ||
700 | SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3, | ||
701 | ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), | ||
702 | |||
703 | SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3, | ||
704 | ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0), | ||
705 | SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3, | ||
706 | ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), | ||
707 | SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3, | ||
708 | ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), | ||
709 | SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3, | ||
710 | ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), | ||
711 | |||
712 | SND_SOC_DAPM_PGA("ISRC3INT1", ARIZONA_ISRC_3_CTRL_3, | ||
713 | ARIZONA_ISRC3_INT0_ENA_SHIFT, 0, NULL, 0), | ||
714 | SND_SOC_DAPM_PGA("ISRC3INT2", ARIZONA_ISRC_3_CTRL_3, | ||
715 | ARIZONA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0), | ||
716 | SND_SOC_DAPM_PGA("ISRC3INT3", ARIZONA_ISRC_3_CTRL_3, | ||
717 | ARIZONA_ISRC3_INT2_ENA_SHIFT, 0, NULL, 0), | ||
718 | SND_SOC_DAPM_PGA("ISRC3INT4", ARIZONA_ISRC_3_CTRL_3, | ||
719 | ARIZONA_ISRC3_INT3_ENA_SHIFT, 0, NULL, 0), | ||
720 | |||
721 | SND_SOC_DAPM_PGA("ISRC3DEC1", ARIZONA_ISRC_3_CTRL_3, | ||
722 | ARIZONA_ISRC3_DEC0_ENA_SHIFT, 0, NULL, 0), | ||
723 | SND_SOC_DAPM_PGA("ISRC3DEC2", ARIZONA_ISRC_3_CTRL_3, | ||
724 | ARIZONA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0), | ||
725 | SND_SOC_DAPM_PGA("ISRC3DEC3", ARIZONA_ISRC_3_CTRL_3, | ||
726 | ARIZONA_ISRC3_DEC2_ENA_SHIFT, 0, NULL, 0), | ||
727 | SND_SOC_DAPM_PGA("ISRC3DEC4", ARIZONA_ISRC_3_CTRL_3, | ||
728 | ARIZONA_ISRC3_DEC3_ENA_SHIFT, 0, NULL, 0), | ||
729 | |||
538 | SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, | 730 | SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, |
539 | ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, | 731 | ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, |
540 | &wm5110_aec_loopback_mux), | 732 | &wm5110_aec_loopback_mux), |
@@ -577,11 +769,27 @@ SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, | |||
577 | ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), | 769 | ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), |
578 | SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, | 770 | SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, |
579 | ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), | 771 | ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), |
772 | SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, | ||
773 | ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0), | ||
774 | SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, | ||
775 | ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0), | ||
776 | SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0, | ||
777 | ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX5_ENA_SHIFT, 0), | ||
778 | SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0, | ||
779 | ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX6_ENA_SHIFT, 0), | ||
580 | 780 | ||
581 | SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, | 781 | SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, |
582 | ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), | 782 | ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), |
583 | SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, | 783 | SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, |
584 | ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), | 784 | ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), |
785 | SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, | ||
786 | ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), | ||
787 | SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, | ||
788 | ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), | ||
789 | SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, | ||
790 | ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), | ||
791 | SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, | ||
792 | ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), | ||
585 | 793 | ||
586 | SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, | 794 | SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, |
587 | ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, | 795 | ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, |
@@ -719,6 +927,10 @@ ARIZONA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"), | |||
719 | 927 | ||
720 | ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), | 928 | ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), |
721 | ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), | 929 | ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), |
930 | ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), | ||
931 | ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), | ||
932 | ARIZONA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"), | ||
933 | ARIZONA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"), | ||
722 | 934 | ||
723 | ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), | 935 | ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), |
724 | ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), | 936 | ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), |
@@ -737,6 +949,41 @@ ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"), | |||
737 | ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), | 949 | ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), |
738 | ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"), | 950 | ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"), |
739 | 951 | ||
952 | ARIZONA_DSP_WIDGETS(DSP1, "DSP1"), | ||
953 | ARIZONA_DSP_WIDGETS(DSP2, "DSP2"), | ||
954 | ARIZONA_DSP_WIDGETS(DSP3, "DSP3"), | ||
955 | ARIZONA_DSP_WIDGETS(DSP4, "DSP4"), | ||
956 | |||
957 | ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), | ||
958 | ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), | ||
959 | ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), | ||
960 | ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), | ||
961 | |||
962 | ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), | ||
963 | ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), | ||
964 | ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), | ||
965 | ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), | ||
966 | |||
967 | ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), | ||
968 | ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), | ||
969 | ARIZONA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), | ||
970 | ARIZONA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), | ||
971 | |||
972 | ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), | ||
973 | ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), | ||
974 | ARIZONA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), | ||
975 | ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), | ||
976 | |||
977 | ARIZONA_MUX_WIDGETS(ISRC3DEC1, "ISRC3DEC1"), | ||
978 | ARIZONA_MUX_WIDGETS(ISRC3DEC2, "ISRC3DEC2"), | ||
979 | ARIZONA_MUX_WIDGETS(ISRC3DEC3, "ISRC3DEC3"), | ||
980 | ARIZONA_MUX_WIDGETS(ISRC3DEC4, "ISRC3DEC4"), | ||
981 | |||
982 | ARIZONA_MUX_WIDGETS(ISRC3INT1, "ISRC3INT1"), | ||
983 | ARIZONA_MUX_WIDGETS(ISRC3INT2, "ISRC3INT2"), | ||
984 | ARIZONA_MUX_WIDGETS(ISRC3INT3, "ISRC3INT3"), | ||
985 | ARIZONA_MUX_WIDGETS(ISRC3INT4, "ISRC3INT4"), | ||
986 | |||
740 | SND_SOC_DAPM_OUTPUT("HPOUT1L"), | 987 | SND_SOC_DAPM_OUTPUT("HPOUT1L"), |
741 | SND_SOC_DAPM_OUTPUT("HPOUT1R"), | 988 | SND_SOC_DAPM_OUTPUT("HPOUT1R"), |
742 | SND_SOC_DAPM_OUTPUT("HPOUT2L"), | 989 | SND_SOC_DAPM_OUTPUT("HPOUT2L"), |
@@ -780,6 +1027,10 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), | |||
780 | { name, "AIF1RX8", "AIF1RX8" }, \ | 1027 | { name, "AIF1RX8", "AIF1RX8" }, \ |
781 | { name, "AIF2RX1", "AIF2RX1" }, \ | 1028 | { name, "AIF2RX1", "AIF2RX1" }, \ |
782 | { name, "AIF2RX2", "AIF2RX2" }, \ | 1029 | { name, "AIF2RX2", "AIF2RX2" }, \ |
1030 | { name, "AIF2RX3", "AIF2RX3" }, \ | ||
1031 | { name, "AIF2RX4", "AIF2RX4" }, \ | ||
1032 | { name, "AIF2RX5", "AIF2RX5" }, \ | ||
1033 | { name, "AIF2RX6", "AIF2RX6" }, \ | ||
783 | { name, "AIF3RX1", "AIF3RX1" }, \ | 1034 | { name, "AIF3RX1", "AIF3RX1" }, \ |
784 | { name, "AIF3RX2", "AIF3RX2" }, \ | 1035 | { name, "AIF3RX2", "AIF3RX2" }, \ |
785 | { name, "SLIMRX1", "SLIMRX1" }, \ | 1036 | { name, "SLIMRX1", "SLIMRX1" }, \ |
@@ -805,7 +1056,55 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), | |||
805 | { name, "ASRC1L", "ASRC1L" }, \ | 1056 | { name, "ASRC1L", "ASRC1L" }, \ |
806 | { name, "ASRC1R", "ASRC1R" }, \ | 1057 | { name, "ASRC1R", "ASRC1R" }, \ |
807 | { name, "ASRC2L", "ASRC2L" }, \ | 1058 | { name, "ASRC2L", "ASRC2L" }, \ |
808 | { name, "ASRC2R", "ASRC2R" } | 1059 | { name, "ASRC2R", "ASRC2R" }, \ |
1060 | { name, "ISRC1DEC1", "ISRC1DEC1" }, \ | ||
1061 | { name, "ISRC1DEC2", "ISRC1DEC2" }, \ | ||
1062 | { name, "ISRC1DEC3", "ISRC1DEC3" }, \ | ||
1063 | { name, "ISRC1DEC4", "ISRC1DEC4" }, \ | ||
1064 | { name, "ISRC1INT1", "ISRC1INT1" }, \ | ||
1065 | { name, "ISRC1INT2", "ISRC1INT2" }, \ | ||
1066 | { name, "ISRC1INT3", "ISRC1INT3" }, \ | ||
1067 | { name, "ISRC1INT4", "ISRC1INT4" }, \ | ||
1068 | { name, "ISRC2DEC1", "ISRC2DEC1" }, \ | ||
1069 | { name, "ISRC2DEC2", "ISRC2DEC2" }, \ | ||
1070 | { name, "ISRC2DEC3", "ISRC2DEC3" }, \ | ||
1071 | { name, "ISRC2DEC4", "ISRC2DEC4" }, \ | ||
1072 | { name, "ISRC2INT1", "ISRC2INT1" }, \ | ||
1073 | { name, "ISRC2INT2", "ISRC2INT2" }, \ | ||
1074 | { name, "ISRC2INT3", "ISRC2INT3" }, \ | ||
1075 | { name, "ISRC2INT4", "ISRC2INT4" }, \ | ||
1076 | { name, "ISRC3DEC1", "ISRC3DEC1" }, \ | ||
1077 | { name, "ISRC3DEC2", "ISRC3DEC2" }, \ | ||
1078 | { name, "ISRC3DEC3", "ISRC3DEC3" }, \ | ||
1079 | { name, "ISRC3DEC4", "ISRC3DEC4" }, \ | ||
1080 | { name, "ISRC3INT1", "ISRC3INT1" }, \ | ||
1081 | { name, "ISRC3INT2", "ISRC3INT2" }, \ | ||
1082 | { name, "ISRC3INT3", "ISRC3INT3" }, \ | ||
1083 | { name, "ISRC3INT4", "ISRC3INT4" }, \ | ||
1084 | { name, "DSP1.1", "DSP1" }, \ | ||
1085 | { name, "DSP1.2", "DSP1" }, \ | ||
1086 | { name, "DSP1.3", "DSP1" }, \ | ||
1087 | { name, "DSP1.4", "DSP1" }, \ | ||
1088 | { name, "DSP1.5", "DSP1" }, \ | ||
1089 | { name, "DSP1.6", "DSP1" }, \ | ||
1090 | { name, "DSP2.1", "DSP2" }, \ | ||
1091 | { name, "DSP2.2", "DSP2" }, \ | ||
1092 | { name, "DSP2.3", "DSP2" }, \ | ||
1093 | { name, "DSP2.4", "DSP2" }, \ | ||
1094 | { name, "DSP2.5", "DSP2" }, \ | ||
1095 | { name, "DSP2.6", "DSP2" }, \ | ||
1096 | { name, "DSP3.1", "DSP3" }, \ | ||
1097 | { name, "DSP3.2", "DSP3" }, \ | ||
1098 | { name, "DSP3.3", "DSP3" }, \ | ||
1099 | { name, "DSP3.4", "DSP3" }, \ | ||
1100 | { name, "DSP3.5", "DSP3" }, \ | ||
1101 | { name, "DSP3.6", "DSP3" }, \ | ||
1102 | { name, "DSP4.1", "DSP4" }, \ | ||
1103 | { name, "DSP4.2", "DSP4" }, \ | ||
1104 | { name, "DSP4.3", "DSP4" }, \ | ||
1105 | { name, "DSP4.4", "DSP4" }, \ | ||
1106 | { name, "DSP4.5", "DSP4" }, \ | ||
1107 | { name, "DSP4.6", "DSP4" } | ||
809 | 1108 | ||
810 | static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { | 1109 | static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { |
811 | { "AIF2 Capture", NULL, "DBVDD2" }, | 1110 | { "AIF2 Capture", NULL, "DBVDD2" }, |
@@ -877,9 +1176,17 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { | |||
877 | 1176 | ||
878 | { "AIF2 Capture", NULL, "AIF2TX1" }, | 1177 | { "AIF2 Capture", NULL, "AIF2TX1" }, |
879 | { "AIF2 Capture", NULL, "AIF2TX2" }, | 1178 | { "AIF2 Capture", NULL, "AIF2TX2" }, |
1179 | { "AIF2 Capture", NULL, "AIF2TX3" }, | ||
1180 | { "AIF2 Capture", NULL, "AIF2TX4" }, | ||
1181 | { "AIF2 Capture", NULL, "AIF2TX5" }, | ||
1182 | { "AIF2 Capture", NULL, "AIF2TX6" }, | ||
880 | 1183 | ||
881 | { "AIF2RX1", NULL, "AIF2 Playback" }, | 1184 | { "AIF2RX1", NULL, "AIF2 Playback" }, |
882 | { "AIF2RX2", NULL, "AIF2 Playback" }, | 1185 | { "AIF2RX2", NULL, "AIF2 Playback" }, |
1186 | { "AIF2RX3", NULL, "AIF2 Playback" }, | ||
1187 | { "AIF2RX4", NULL, "AIF2 Playback" }, | ||
1188 | { "AIF2RX5", NULL, "AIF2 Playback" }, | ||
1189 | { "AIF2RX6", NULL, "AIF2 Playback" }, | ||
883 | 1190 | ||
884 | { "AIF3 Capture", NULL, "AIF3TX1" }, | 1191 | { "AIF3 Capture", NULL, "AIF3TX1" }, |
885 | { "AIF3 Capture", NULL, "AIF3TX2" }, | 1192 | { "AIF3 Capture", NULL, "AIF3TX2" }, |
@@ -963,6 +1270,10 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { | |||
963 | 1270 | ||
964 | ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), | 1271 | ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), |
965 | ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), | 1272 | ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), |
1273 | ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), | ||
1274 | ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), | ||
1275 | ARIZONA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"), | ||
1276 | ARIZONA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"), | ||
966 | 1277 | ||
967 | ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), | 1278 | ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), |
968 | ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), | 1279 | ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), |
@@ -999,6 +1310,41 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { | |||
999 | ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), | 1310 | ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), |
1000 | ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), | 1311 | ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), |
1001 | 1312 | ||
1313 | ARIZONA_DSP_ROUTES("DSP1"), | ||
1314 | ARIZONA_DSP_ROUTES("DSP2"), | ||
1315 | ARIZONA_DSP_ROUTES("DSP3"), | ||
1316 | ARIZONA_DSP_ROUTES("DSP4"), | ||
1317 | |||
1318 | ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), | ||
1319 | ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), | ||
1320 | ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), | ||
1321 | ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), | ||
1322 | |||
1323 | ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), | ||
1324 | ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), | ||
1325 | ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), | ||
1326 | ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), | ||
1327 | |||
1328 | ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), | ||
1329 | ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), | ||
1330 | ARIZONA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), | ||
1331 | ARIZONA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), | ||
1332 | |||
1333 | ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), | ||
1334 | ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), | ||
1335 | ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), | ||
1336 | ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), | ||
1337 | |||
1338 | ARIZONA_MUX_ROUTES("ISRC3INT1", "ISRC3INT1"), | ||
1339 | ARIZONA_MUX_ROUTES("ISRC3INT2", "ISRC3INT2"), | ||
1340 | ARIZONA_MUX_ROUTES("ISRC3INT3", "ISRC3INT3"), | ||
1341 | ARIZONA_MUX_ROUTES("ISRC3INT4", "ISRC3INT4"), | ||
1342 | |||
1343 | ARIZONA_MUX_ROUTES("ISRC3DEC1", "ISRC3DEC1"), | ||
1344 | ARIZONA_MUX_ROUTES("ISRC3DEC2", "ISRC3DEC2"), | ||
1345 | ARIZONA_MUX_ROUTES("ISRC3DEC3", "ISRC3DEC3"), | ||
1346 | ARIZONA_MUX_ROUTES("ISRC3DEC4", "ISRC3DEC4"), | ||
1347 | |||
1002 | { "AEC Loopback", "HPOUT1L", "OUT1L" }, | 1348 | { "AEC Loopback", "HPOUT1L", "OUT1L" }, |
1003 | { "AEC Loopback", "HPOUT1R", "OUT1R" }, | 1349 | { "AEC Loopback", "HPOUT1R", "OUT1R" }, |
1004 | { "HPOUT1L", NULL, "OUT1L" }, | 1350 | { "HPOUT1L", NULL, "OUT1L" }, |
@@ -1095,14 +1441,14 @@ static struct snd_soc_dai_driver wm5110_dai[] = { | |||
1095 | .playback = { | 1441 | .playback = { |
1096 | .stream_name = "AIF2 Playback", | 1442 | .stream_name = "AIF2 Playback", |
1097 | .channels_min = 1, | 1443 | .channels_min = 1, |
1098 | .channels_max = 2, | 1444 | .channels_max = 6, |
1099 | .rates = WM5110_RATES, | 1445 | .rates = WM5110_RATES, |
1100 | .formats = WM5110_FORMATS, | 1446 | .formats = WM5110_FORMATS, |
1101 | }, | 1447 | }, |
1102 | .capture = { | 1448 | .capture = { |
1103 | .stream_name = "AIF2 Capture", | 1449 | .stream_name = "AIF2 Capture", |
1104 | .channels_min = 1, | 1450 | .channels_min = 1, |
1105 | .channels_max = 2, | 1451 | .channels_max = 6, |
1106 | .rates = WM5110_RATES, | 1452 | .rates = WM5110_RATES, |
1107 | .formats = WM5110_FORMATS, | 1453 | .formats = WM5110_FORMATS, |
1108 | }, | 1454 | }, |
@@ -1204,6 +1550,10 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) | |||
1204 | arizona_init_spk(codec); | 1550 | arizona_init_spk(codec); |
1205 | arizona_init_gpio(codec); | 1551 | arizona_init_gpio(codec); |
1206 | 1552 | ||
1553 | ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 8); | ||
1554 | if (ret != 0) | ||
1555 | return ret; | ||
1556 | |||
1207 | snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); | 1557 | snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); |
1208 | 1558 | ||
1209 | priv->core.arizona->dapm = &codec->dapm; | 1559 | priv->core.arizona->dapm = &codec->dapm; |
@@ -1258,7 +1608,7 @@ static int wm5110_probe(struct platform_device *pdev) | |||
1258 | { | 1608 | { |
1259 | struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); | 1609 | struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); |
1260 | struct wm5110_priv *wm5110; | 1610 | struct wm5110_priv *wm5110; |
1261 | int i; | 1611 | int i, ret; |
1262 | 1612 | ||
1263 | wm5110 = devm_kzalloc(&pdev->dev, sizeof(struct wm5110_priv), | 1613 | wm5110 = devm_kzalloc(&pdev->dev, sizeof(struct wm5110_priv), |
1264 | GFP_KERNEL); | 1614 | GFP_KERNEL); |
@@ -1269,6 +1619,24 @@ static int wm5110_probe(struct platform_device *pdev) | |||
1269 | wm5110->core.arizona = arizona; | 1619 | wm5110->core.arizona = arizona; |
1270 | wm5110->core.num_inputs = 8; | 1620 | wm5110->core.num_inputs = 8; |
1271 | 1621 | ||
1622 | for (i = 0; i < WM5110_NUM_ADSP; i++) { | ||
1623 | wm5110->core.adsp[i].part = "wm5110"; | ||
1624 | wm5110->core.adsp[i].num = i + 1; | ||
1625 | wm5110->core.adsp[i].type = WMFW_ADSP2; | ||
1626 | wm5110->core.adsp[i].dev = arizona->dev; | ||
1627 | wm5110->core.adsp[i].regmap = arizona->regmap; | ||
1628 | |||
1629 | wm5110->core.adsp[i].base = ARIZONA_DSP1_CONTROL_1 | ||
1630 | + (0x100 * i); | ||
1631 | wm5110->core.adsp[i].mem = wm5110_dsp_regions[i]; | ||
1632 | wm5110->core.adsp[i].num_mems | ||
1633 | = ARRAY_SIZE(wm5110_dsp1_regions); | ||
1634 | |||
1635 | ret = wm_adsp2_init(&wm5110->core.adsp[i], false); | ||
1636 | if (ret != 0) | ||
1637 | return ret; | ||
1638 | } | ||
1639 | |||
1272 | for (i = 0; i < ARRAY_SIZE(wm5110->fll); i++) | 1640 | for (i = 0; i < ARRAY_SIZE(wm5110->fll); i++) |
1273 | wm5110->fll[i].vco_mult = 3; | 1641 | wm5110->fll[i].vco_mult = 3; |
1274 | 1642 | ||
@@ -1279,6 +1647,12 @@ static int wm5110_probe(struct platform_device *pdev) | |||
1279 | ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, | 1647 | ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, |
1280 | &wm5110->fll[1]); | 1648 | &wm5110->fll[1]); |
1281 | 1649 | ||
1650 | /* SR2 fixed at 8kHz, SR3 fixed at 16kHz */ | ||
1651 | regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_2, | ||
1652 | ARIZONA_SAMPLE_RATE_2_MASK, 0x11); | ||
1653 | regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_3, | ||
1654 | ARIZONA_SAMPLE_RATE_3_MASK, 0x12); | ||
1655 | |||
1282 | for (i = 0; i < ARRAY_SIZE(wm5110_dai); i++) | 1656 | for (i = 0; i < ARRAY_SIZE(wm5110_dai); i++) |
1283 | arizona_init_dai(&wm5110->core, i); | 1657 | arizona_init_dai(&wm5110->core, i); |
1284 | 1658 | ||
diff --git a/sound/soc/codecs/wm8510.c b/sound/soc/codecs/wm8510.c index 6ed5433943ea..7df7d4572755 100644 --- a/sound/soc/codecs/wm8510.c +++ b/sound/soc/codecs/wm8510.c | |||
@@ -684,7 +684,7 @@ static struct spi_driver wm8510_spi_driver = { | |||
684 | }; | 684 | }; |
685 | #endif /* CONFIG_SPI_MASTER */ | 685 | #endif /* CONFIG_SPI_MASTER */ |
686 | 686 | ||
687 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 687 | #if IS_ENABLED(CONFIG_I2C) |
688 | static int wm8510_i2c_probe(struct i2c_client *i2c, | 688 | static int wm8510_i2c_probe(struct i2c_client *i2c, |
689 | const struct i2c_device_id *id) | 689 | const struct i2c_device_id *id) |
690 | { | 690 | { |
@@ -735,7 +735,7 @@ static struct i2c_driver wm8510_i2c_driver = { | |||
735 | static int __init wm8510_modinit(void) | 735 | static int __init wm8510_modinit(void) |
736 | { | 736 | { |
737 | int ret = 0; | 737 | int ret = 0; |
738 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 738 | #if IS_ENABLED(CONFIG_I2C) |
739 | ret = i2c_add_driver(&wm8510_i2c_driver); | 739 | ret = i2c_add_driver(&wm8510_i2c_driver); |
740 | if (ret != 0) { | 740 | if (ret != 0) { |
741 | printk(KERN_ERR "Failed to register WM8510 I2C driver: %d\n", | 741 | printk(KERN_ERR "Failed to register WM8510 I2C driver: %d\n", |
@@ -755,7 +755,7 @@ module_init(wm8510_modinit); | |||
755 | 755 | ||
756 | static void __exit wm8510_exit(void) | 756 | static void __exit wm8510_exit(void) |
757 | { | 757 | { |
758 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 758 | #if IS_ENABLED(CONFIG_I2C) |
759 | i2c_del_driver(&wm8510_i2c_driver); | 759 | i2c_del_driver(&wm8510_i2c_driver); |
760 | #endif | 760 | #endif |
761 | #if defined(CONFIG_SPI_MASTER) | 761 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8523.c b/sound/soc/codecs/wm8523.c index 139bf9ac9407..74d106dc7667 100644 --- a/sound/soc/codecs/wm8523.c +++ b/sound/soc/codecs/wm8523.c | |||
@@ -452,7 +452,7 @@ static const struct regmap_config wm8523_regmap = { | |||
452 | .volatile_reg = wm8523_volatile_register, | 452 | .volatile_reg = wm8523_volatile_register, |
453 | }; | 453 | }; |
454 | 454 | ||
455 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 455 | #if IS_ENABLED(CONFIG_I2C) |
456 | static int wm8523_i2c_probe(struct i2c_client *i2c, | 456 | static int wm8523_i2c_probe(struct i2c_client *i2c, |
457 | const struct i2c_device_id *id) | 457 | const struct i2c_device_id *id) |
458 | { | 458 | { |
@@ -555,7 +555,7 @@ static struct i2c_driver wm8523_i2c_driver = { | |||
555 | static int __init wm8523_modinit(void) | 555 | static int __init wm8523_modinit(void) |
556 | { | 556 | { |
557 | int ret; | 557 | int ret; |
558 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 558 | #if IS_ENABLED(CONFIG_I2C) |
559 | ret = i2c_add_driver(&wm8523_i2c_driver); | 559 | ret = i2c_add_driver(&wm8523_i2c_driver); |
560 | if (ret != 0) { | 560 | if (ret != 0) { |
561 | printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n", | 561 | printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n", |
@@ -568,7 +568,7 @@ module_init(wm8523_modinit); | |||
568 | 568 | ||
569 | static void __exit wm8523_exit(void) | 569 | static void __exit wm8523_exit(void) |
570 | { | 570 | { |
571 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 571 | #if IS_ENABLED(CONFIG_I2C) |
572 | i2c_del_driver(&wm8523_i2c_driver); | 572 | i2c_del_driver(&wm8523_i2c_driver); |
573 | #endif | 573 | #endif |
574 | } | 574 | } |
diff --git a/sound/soc/codecs/wm8580.c b/sound/soc/codecs/wm8580.c index 08a414b57b1e..318989acbbe5 100644 --- a/sound/soc/codecs/wm8580.c +++ b/sound/soc/codecs/wm8580.c | |||
@@ -941,7 +941,7 @@ static const struct regmap_config wm8580_regmap = { | |||
941 | .volatile_reg = wm8580_volatile, | 941 | .volatile_reg = wm8580_volatile, |
942 | }; | 942 | }; |
943 | 943 | ||
944 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 944 | #if IS_ENABLED(CONFIG_I2C) |
945 | static int wm8580_i2c_probe(struct i2c_client *i2c, | 945 | static int wm8580_i2c_probe(struct i2c_client *i2c, |
946 | const struct i2c_device_id *id) | 946 | const struct i2c_device_id *id) |
947 | { | 947 | { |
@@ -1003,7 +1003,7 @@ static int __init wm8580_modinit(void) | |||
1003 | { | 1003 | { |
1004 | int ret = 0; | 1004 | int ret = 0; |
1005 | 1005 | ||
1006 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1006 | #if IS_ENABLED(CONFIG_I2C) |
1007 | ret = i2c_add_driver(&wm8580_i2c_driver); | 1007 | ret = i2c_add_driver(&wm8580_i2c_driver); |
1008 | if (ret != 0) { | 1008 | if (ret != 0) { |
1009 | pr_err("Failed to register WM8580 I2C driver: %d\n", ret); | 1009 | pr_err("Failed to register WM8580 I2C driver: %d\n", ret); |
@@ -1016,7 +1016,7 @@ module_init(wm8580_modinit); | |||
1016 | 1016 | ||
1017 | static void __exit wm8580_exit(void) | 1017 | static void __exit wm8580_exit(void) |
1018 | { | 1018 | { |
1019 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1019 | #if IS_ENABLED(CONFIG_I2C) |
1020 | i2c_del_driver(&wm8580_i2c_driver); | 1020 | i2c_del_driver(&wm8580_i2c_driver); |
1021 | #endif | 1021 | #endif |
1022 | } | 1022 | } |
diff --git a/sound/soc/codecs/wm8711.c b/sound/soc/codecs/wm8711.c index 5b428b060d41..d99f948c513c 100644 --- a/sound/soc/codecs/wm8711.c +++ b/sound/soc/codecs/wm8711.c | |||
@@ -469,7 +469,7 @@ static struct spi_driver wm8711_spi_driver = { | |||
469 | }; | 469 | }; |
470 | #endif /* CONFIG_SPI_MASTER */ | 470 | #endif /* CONFIG_SPI_MASTER */ |
471 | 471 | ||
472 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 472 | #if IS_ENABLED(CONFIG_I2C) |
473 | static int wm8711_i2c_probe(struct i2c_client *client, | 473 | static int wm8711_i2c_probe(struct i2c_client *client, |
474 | const struct i2c_device_id *id) | 474 | const struct i2c_device_id *id) |
475 | { | 475 | { |
@@ -520,7 +520,7 @@ static struct i2c_driver wm8711_i2c_driver = { | |||
520 | static int __init wm8711_modinit(void) | 520 | static int __init wm8711_modinit(void) |
521 | { | 521 | { |
522 | int ret; | 522 | int ret; |
523 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 523 | #if IS_ENABLED(CONFIG_I2C) |
524 | ret = i2c_add_driver(&wm8711_i2c_driver); | 524 | ret = i2c_add_driver(&wm8711_i2c_driver); |
525 | if (ret != 0) { | 525 | if (ret != 0) { |
526 | printk(KERN_ERR "Failed to register WM8711 I2C driver: %d\n", | 526 | printk(KERN_ERR "Failed to register WM8711 I2C driver: %d\n", |
@@ -540,7 +540,7 @@ module_init(wm8711_modinit); | |||
540 | 540 | ||
541 | static void __exit wm8711_exit(void) | 541 | static void __exit wm8711_exit(void) |
542 | { | 542 | { |
543 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 543 | #if IS_ENABLED(CONFIG_I2C) |
544 | i2c_del_driver(&wm8711_i2c_driver); | 544 | i2c_del_driver(&wm8711_i2c_driver); |
545 | #endif | 545 | #endif |
546 | #if defined(CONFIG_SPI_MASTER) | 546 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8728.c b/sound/soc/codecs/wm8728.c index c6a292dcded0..cd89033e84c0 100644 --- a/sound/soc/codecs/wm8728.c +++ b/sound/soc/codecs/wm8728.c | |||
@@ -320,7 +320,7 @@ static struct spi_driver wm8728_spi_driver = { | |||
320 | }; | 320 | }; |
321 | #endif /* CONFIG_SPI_MASTER */ | 321 | #endif /* CONFIG_SPI_MASTER */ |
322 | 322 | ||
323 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 323 | #if IS_ENABLED(CONFIG_I2C) |
324 | static int wm8728_i2c_probe(struct i2c_client *i2c, | 324 | static int wm8728_i2c_probe(struct i2c_client *i2c, |
325 | const struct i2c_device_id *id) | 325 | const struct i2c_device_id *id) |
326 | { | 326 | { |
@@ -371,7 +371,7 @@ static struct i2c_driver wm8728_i2c_driver = { | |||
371 | static int __init wm8728_modinit(void) | 371 | static int __init wm8728_modinit(void) |
372 | { | 372 | { |
373 | int ret = 0; | 373 | int ret = 0; |
374 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 374 | #if IS_ENABLED(CONFIG_I2C) |
375 | ret = i2c_add_driver(&wm8728_i2c_driver); | 375 | ret = i2c_add_driver(&wm8728_i2c_driver); |
376 | if (ret != 0) { | 376 | if (ret != 0) { |
377 | printk(KERN_ERR "Failed to register wm8728 I2C driver: %d\n", | 377 | printk(KERN_ERR "Failed to register wm8728 I2C driver: %d\n", |
@@ -391,7 +391,7 @@ module_init(wm8728_modinit); | |||
391 | 391 | ||
392 | static void __exit wm8728_exit(void) | 392 | static void __exit wm8728_exit(void) |
393 | { | 393 | { |
394 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 394 | #if IS_ENABLED(CONFIG_I2C) |
395 | i2c_del_driver(&wm8728_i2c_driver); | 395 | i2c_del_driver(&wm8728_i2c_driver); |
396 | #endif | 396 | #endif |
397 | #if defined(CONFIG_SPI_MASTER) | 397 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c index bc7472c968e3..029720366ff8 100644 --- a/sound/soc/codecs/wm8731.c +++ b/sound/soc/codecs/wm8731.c | |||
@@ -732,7 +732,7 @@ static struct spi_driver wm8731_spi_driver = { | |||
732 | }; | 732 | }; |
733 | #endif /* CONFIG_SPI_MASTER */ | 733 | #endif /* CONFIG_SPI_MASTER */ |
734 | 734 | ||
735 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 735 | #if IS_ENABLED(CONFIG_I2C) |
736 | static int wm8731_i2c_probe(struct i2c_client *i2c, | 736 | static int wm8731_i2c_probe(struct i2c_client *i2c, |
737 | const struct i2c_device_id *id) | 737 | const struct i2c_device_id *id) |
738 | { | 738 | { |
@@ -791,7 +791,7 @@ static struct i2c_driver wm8731_i2c_driver = { | |||
791 | static int __init wm8731_modinit(void) | 791 | static int __init wm8731_modinit(void) |
792 | { | 792 | { |
793 | int ret = 0; | 793 | int ret = 0; |
794 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 794 | #if IS_ENABLED(CONFIG_I2C) |
795 | ret = i2c_add_driver(&wm8731_i2c_driver); | 795 | ret = i2c_add_driver(&wm8731_i2c_driver); |
796 | if (ret != 0) { | 796 | if (ret != 0) { |
797 | printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n", | 797 | printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n", |
@@ -811,7 +811,7 @@ module_init(wm8731_modinit); | |||
811 | 811 | ||
812 | static void __exit wm8731_exit(void) | 812 | static void __exit wm8731_exit(void) |
813 | { | 813 | { |
814 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 814 | #if IS_ENABLED(CONFIG_I2C) |
815 | i2c_del_driver(&wm8731_i2c_driver); | 815 | i2c_del_driver(&wm8731_i2c_driver); |
816 | #endif | 816 | #endif |
817 | #if defined(CONFIG_SPI_MASTER) | 817 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8741.c b/sound/soc/codecs/wm8741.c index b18813cc7ba9..2895c8d3b5e4 100644 --- a/sound/soc/codecs/wm8741.c +++ b/sound/soc/codecs/wm8741.c | |||
@@ -500,7 +500,7 @@ static const struct regmap_config wm8741_regmap = { | |||
500 | .readable_reg = wm8741_readable, | 500 | .readable_reg = wm8741_readable, |
501 | }; | 501 | }; |
502 | 502 | ||
503 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 503 | #if IS_ENABLED(CONFIG_I2C) |
504 | static int wm8741_i2c_probe(struct i2c_client *i2c, | 504 | static int wm8741_i2c_probe(struct i2c_client *i2c, |
505 | const struct i2c_device_id *id) | 505 | const struct i2c_device_id *id) |
506 | { | 506 | { |
@@ -617,7 +617,7 @@ static int __init wm8741_modinit(void) | |||
617 | { | 617 | { |
618 | int ret = 0; | 618 | int ret = 0; |
619 | 619 | ||
620 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 620 | #if IS_ENABLED(CONFIG_I2C) |
621 | ret = i2c_add_driver(&wm8741_i2c_driver); | 621 | ret = i2c_add_driver(&wm8741_i2c_driver); |
622 | if (ret != 0) | 622 | if (ret != 0) |
623 | pr_err("Failed to register WM8741 I2C driver: %d\n", ret); | 623 | pr_err("Failed to register WM8741 I2C driver: %d\n", ret); |
@@ -639,7 +639,7 @@ static void __exit wm8741_exit(void) | |||
639 | #if defined(CONFIG_SPI_MASTER) | 639 | #if defined(CONFIG_SPI_MASTER) |
640 | spi_unregister_driver(&wm8741_spi_driver); | 640 | spi_unregister_driver(&wm8741_spi_driver); |
641 | #endif | 641 | #endif |
642 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 642 | #if IS_ENABLED(CONFIG_I2C) |
643 | i2c_del_driver(&wm8741_i2c_driver); | 643 | i2c_del_driver(&wm8741_i2c_driver); |
644 | #endif | 644 | #endif |
645 | } | 645 | } |
diff --git a/sound/soc/codecs/wm8750.c b/sound/soc/codecs/wm8750.c index 50d5ff616232..78616a638a55 100644 --- a/sound/soc/codecs/wm8750.c +++ b/sound/soc/codecs/wm8750.c | |||
@@ -816,7 +816,7 @@ static struct spi_driver wm8750_spi_driver = { | |||
816 | }; | 816 | }; |
817 | #endif /* CONFIG_SPI_MASTER */ | 817 | #endif /* CONFIG_SPI_MASTER */ |
818 | 818 | ||
819 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 819 | #if IS_ENABLED(CONFIG_I2C) |
820 | static int wm8750_i2c_probe(struct i2c_client *i2c, | 820 | static int wm8750_i2c_probe(struct i2c_client *i2c, |
821 | const struct i2c_device_id *id) | 821 | const struct i2c_device_id *id) |
822 | { | 822 | { |
@@ -868,7 +868,7 @@ static struct i2c_driver wm8750_i2c_driver = { | |||
868 | static int __init wm8750_modinit(void) | 868 | static int __init wm8750_modinit(void) |
869 | { | 869 | { |
870 | int ret = 0; | 870 | int ret = 0; |
871 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 871 | #if IS_ENABLED(CONFIG_I2C) |
872 | ret = i2c_add_driver(&wm8750_i2c_driver); | 872 | ret = i2c_add_driver(&wm8750_i2c_driver); |
873 | if (ret != 0) { | 873 | if (ret != 0) { |
874 | printk(KERN_ERR "Failed to register wm8750 I2C driver: %d\n", | 874 | printk(KERN_ERR "Failed to register wm8750 I2C driver: %d\n", |
@@ -888,7 +888,7 @@ module_init(wm8750_modinit); | |||
888 | 888 | ||
889 | static void __exit wm8750_exit(void) | 889 | static void __exit wm8750_exit(void) |
890 | { | 890 | { |
891 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 891 | #if IS_ENABLED(CONFIG_I2C) |
892 | i2c_del_driver(&wm8750_i2c_driver); | 892 | i2c_del_driver(&wm8750_i2c_driver); |
893 | #endif | 893 | #endif |
894 | #if defined(CONFIG_SPI_MASTER) | 894 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c index d96ebf52d953..be85da93a268 100644 --- a/sound/soc/codecs/wm8753.c +++ b/sound/soc/codecs/wm8753.c | |||
@@ -1596,7 +1596,7 @@ static struct spi_driver wm8753_spi_driver = { | |||
1596 | }; | 1596 | }; |
1597 | #endif /* CONFIG_SPI_MASTER */ | 1597 | #endif /* CONFIG_SPI_MASTER */ |
1598 | 1598 | ||
1599 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1599 | #if IS_ENABLED(CONFIG_I2C) |
1600 | static int wm8753_i2c_probe(struct i2c_client *i2c, | 1600 | static int wm8753_i2c_probe(struct i2c_client *i2c, |
1601 | const struct i2c_device_id *id) | 1601 | const struct i2c_device_id *id) |
1602 | { | 1602 | { |
@@ -1653,7 +1653,7 @@ static struct i2c_driver wm8753_i2c_driver = { | |||
1653 | static int __init wm8753_modinit(void) | 1653 | static int __init wm8753_modinit(void) |
1654 | { | 1654 | { |
1655 | int ret = 0; | 1655 | int ret = 0; |
1656 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1656 | #if IS_ENABLED(CONFIG_I2C) |
1657 | ret = i2c_add_driver(&wm8753_i2c_driver); | 1657 | ret = i2c_add_driver(&wm8753_i2c_driver); |
1658 | if (ret != 0) { | 1658 | if (ret != 0) { |
1659 | printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n", | 1659 | printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n", |
@@ -1673,7 +1673,7 @@ module_init(wm8753_modinit); | |||
1673 | 1673 | ||
1674 | static void __exit wm8753_exit(void) | 1674 | static void __exit wm8753_exit(void) |
1675 | { | 1675 | { |
1676 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1676 | #if IS_ENABLED(CONFIG_I2C) |
1677 | i2c_del_driver(&wm8753_i2c_driver); | 1677 | i2c_del_driver(&wm8753_i2c_driver); |
1678 | #endif | 1678 | #endif |
1679 | #if defined(CONFIG_SPI_MASTER) | 1679 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8776.c b/sound/soc/codecs/wm8776.c index 942d58e455f3..ef8246725232 100644 --- a/sound/soc/codecs/wm8776.c +++ b/sound/soc/codecs/wm8776.c | |||
@@ -532,7 +532,7 @@ static struct spi_driver wm8776_spi_driver = { | |||
532 | }; | 532 | }; |
533 | #endif /* CONFIG_SPI_MASTER */ | 533 | #endif /* CONFIG_SPI_MASTER */ |
534 | 534 | ||
535 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 535 | #if IS_ENABLED(CONFIG_I2C) |
536 | static int wm8776_i2c_probe(struct i2c_client *i2c, | 536 | static int wm8776_i2c_probe(struct i2c_client *i2c, |
537 | const struct i2c_device_id *id) | 537 | const struct i2c_device_id *id) |
538 | { | 538 | { |
@@ -584,7 +584,7 @@ static struct i2c_driver wm8776_i2c_driver = { | |||
584 | static int __init wm8776_modinit(void) | 584 | static int __init wm8776_modinit(void) |
585 | { | 585 | { |
586 | int ret = 0; | 586 | int ret = 0; |
587 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 587 | #if IS_ENABLED(CONFIG_I2C) |
588 | ret = i2c_add_driver(&wm8776_i2c_driver); | 588 | ret = i2c_add_driver(&wm8776_i2c_driver); |
589 | if (ret != 0) { | 589 | if (ret != 0) { |
590 | printk(KERN_ERR "Failed to register wm8776 I2C driver: %d\n", | 590 | printk(KERN_ERR "Failed to register wm8776 I2C driver: %d\n", |
@@ -604,7 +604,7 @@ module_init(wm8776_modinit); | |||
604 | 604 | ||
605 | static void __exit wm8776_exit(void) | 605 | static void __exit wm8776_exit(void) |
606 | { | 606 | { |
607 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 607 | #if IS_ENABLED(CONFIG_I2C) |
608 | i2c_del_driver(&wm8776_i2c_driver); | 608 | i2c_del_driver(&wm8776_i2c_driver); |
609 | #endif | 609 | #endif |
610 | #if defined(CONFIG_SPI_MASTER) | 610 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8804.c b/sound/soc/codecs/wm8804.c index 1704b1e119cb..9bc8206a6807 100644 --- a/sound/soc/codecs/wm8804.c +++ b/sound/soc/codecs/wm8804.c | |||
@@ -739,7 +739,7 @@ static struct spi_driver wm8804_spi_driver = { | |||
739 | }; | 739 | }; |
740 | #endif | 740 | #endif |
741 | 741 | ||
742 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 742 | #if IS_ENABLED(CONFIG_I2C) |
743 | static int wm8804_i2c_probe(struct i2c_client *i2c, | 743 | static int wm8804_i2c_probe(struct i2c_client *i2c, |
744 | const struct i2c_device_id *id) | 744 | const struct i2c_device_id *id) |
745 | { | 745 | { |
@@ -791,7 +791,7 @@ static int __init wm8804_modinit(void) | |||
791 | { | 791 | { |
792 | int ret = 0; | 792 | int ret = 0; |
793 | 793 | ||
794 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 794 | #if IS_ENABLED(CONFIG_I2C) |
795 | ret = i2c_add_driver(&wm8804_i2c_driver); | 795 | ret = i2c_add_driver(&wm8804_i2c_driver); |
796 | if (ret) { | 796 | if (ret) { |
797 | printk(KERN_ERR "Failed to register wm8804 I2C driver: %d\n", | 797 | printk(KERN_ERR "Failed to register wm8804 I2C driver: %d\n", |
@@ -811,7 +811,7 @@ module_init(wm8804_modinit); | |||
811 | 811 | ||
812 | static void __exit wm8804_exit(void) | 812 | static void __exit wm8804_exit(void) |
813 | { | 813 | { |
814 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 814 | #if IS_ENABLED(CONFIG_I2C) |
815 | i2c_del_driver(&wm8804_i2c_driver); | 815 | i2c_del_driver(&wm8804_i2c_driver); |
816 | #endif | 816 | #endif |
817 | #if defined(CONFIG_SPI_MASTER) | 817 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8900.c b/sound/soc/codecs/wm8900.c index 734209e252c3..e98bc7038a08 100644 --- a/sound/soc/codecs/wm8900.c +++ b/sound/soc/codecs/wm8900.c | |||
@@ -1288,7 +1288,7 @@ static struct spi_driver wm8900_spi_driver = { | |||
1288 | }; | 1288 | }; |
1289 | #endif /* CONFIG_SPI_MASTER */ | 1289 | #endif /* CONFIG_SPI_MASTER */ |
1290 | 1290 | ||
1291 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1291 | #if IS_ENABLED(CONFIG_I2C) |
1292 | static int wm8900_i2c_probe(struct i2c_client *i2c, | 1292 | static int wm8900_i2c_probe(struct i2c_client *i2c, |
1293 | const struct i2c_device_id *id) | 1293 | const struct i2c_device_id *id) |
1294 | { | 1294 | { |
@@ -1338,7 +1338,7 @@ static struct i2c_driver wm8900_i2c_driver = { | |||
1338 | static int __init wm8900_modinit(void) | 1338 | static int __init wm8900_modinit(void) |
1339 | { | 1339 | { |
1340 | int ret = 0; | 1340 | int ret = 0; |
1341 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1341 | #if IS_ENABLED(CONFIG_I2C) |
1342 | ret = i2c_add_driver(&wm8900_i2c_driver); | 1342 | ret = i2c_add_driver(&wm8900_i2c_driver); |
1343 | if (ret != 0) { | 1343 | if (ret != 0) { |
1344 | printk(KERN_ERR "Failed to register wm8900 I2C driver: %d\n", | 1344 | printk(KERN_ERR "Failed to register wm8900 I2C driver: %d\n", |
@@ -1358,7 +1358,7 @@ module_init(wm8900_modinit); | |||
1358 | 1358 | ||
1359 | static void __exit wm8900_exit(void) | 1359 | static void __exit wm8900_exit(void) |
1360 | { | 1360 | { |
1361 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1361 | #if IS_ENABLED(CONFIG_I2C) |
1362 | i2c_del_driver(&wm8900_i2c_driver); | 1362 | i2c_del_driver(&wm8900_i2c_driver); |
1363 | #endif | 1363 | #endif |
1364 | #if defined(CONFIG_SPI_MASTER) | 1364 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c index b1591c61c254..b404c26c1753 100644 --- a/sound/soc/codecs/wm8940.c +++ b/sound/soc/codecs/wm8940.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <linux/delay.h> | 28 | #include <linux/delay.h> |
29 | #include <linux/pm.h> | 29 | #include <linux/pm.h> |
30 | #include <linux/i2c.h> | 30 | #include <linux/i2c.h> |
31 | #include <linux/spi/spi.h> | 31 | #include <linux/regmap.h> |
32 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
33 | #include <sound/core.h> | 33 | #include <sound/core.h> |
34 | #include <sound/pcm.h> | 34 | #include <sound/pcm.h> |
@@ -41,78 +41,116 @@ | |||
41 | 41 | ||
42 | struct wm8940_priv { | 42 | struct wm8940_priv { |
43 | unsigned int sysclk; | 43 | unsigned int sysclk; |
44 | enum snd_soc_control_type control_type; | 44 | struct regmap *regmap; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | static int wm8940_volatile_register(struct snd_soc_codec *codec, | 47 | static bool wm8940_volatile_register(struct device *dev, unsigned int reg) |
48 | unsigned int reg) | ||
49 | { | 48 | { |
50 | switch (reg) { | 49 | switch (reg) { |
51 | case WM8940_SOFTRESET: | 50 | case WM8940_SOFTRESET: |
52 | return 1; | 51 | return true; |
53 | default: | 52 | default: |
54 | return 0; | 53 | return false; |
54 | } | ||
55 | } | ||
56 | |||
57 | static bool wm8940_readable_register(struct device *dev, unsigned int reg) | ||
58 | { | ||
59 | switch (reg) { | ||
60 | case WM8940_SOFTRESET: | ||
61 | case WM8940_POWER1: | ||
62 | case WM8940_POWER2: | ||
63 | case WM8940_POWER3: | ||
64 | case WM8940_IFACE: | ||
65 | case WM8940_COMPANDINGCTL: | ||
66 | case WM8940_CLOCK: | ||
67 | case WM8940_ADDCNTRL: | ||
68 | case WM8940_GPIO: | ||
69 | case WM8940_CTLINT: | ||
70 | case WM8940_DAC: | ||
71 | case WM8940_DACVOL: | ||
72 | case WM8940_ADC: | ||
73 | case WM8940_ADCVOL: | ||
74 | case WM8940_NOTCH1: | ||
75 | case WM8940_NOTCH2: | ||
76 | case WM8940_NOTCH3: | ||
77 | case WM8940_NOTCH4: | ||
78 | case WM8940_NOTCH5: | ||
79 | case WM8940_NOTCH6: | ||
80 | case WM8940_NOTCH7: | ||
81 | case WM8940_NOTCH8: | ||
82 | case WM8940_DACLIM1: | ||
83 | case WM8940_DACLIM2: | ||
84 | case WM8940_ALC1: | ||
85 | case WM8940_ALC2: | ||
86 | case WM8940_ALC3: | ||
87 | case WM8940_NOISEGATE: | ||
88 | case WM8940_PLLN: | ||
89 | case WM8940_PLLK1: | ||
90 | case WM8940_PLLK2: | ||
91 | case WM8940_PLLK3: | ||
92 | case WM8940_ALC4: | ||
93 | case WM8940_INPUTCTL: | ||
94 | case WM8940_PGAGAIN: | ||
95 | case WM8940_ADCBOOST: | ||
96 | case WM8940_OUTPUTCTL: | ||
97 | case WM8940_SPKMIX: | ||
98 | case WM8940_SPKVOL: | ||
99 | case WM8940_MONOMIX: | ||
100 | return true; | ||
101 | default: | ||
102 | return false; | ||
55 | } | 103 | } |
56 | } | 104 | } |
57 | 105 | ||
58 | static u16 wm8940_reg_defaults[] = { | 106 | static const struct reg_default wm8940_reg_defaults[] = { |
59 | 0x8940, /* Soft Reset */ | 107 | { 0x1, 0x0000 }, /* Power 1 */ |
60 | 0x0000, /* Power 1 */ | 108 | { 0x2, 0x0000 }, /* Power 2 */ |
61 | 0x0000, /* Power 2 */ | 109 | { 0x3, 0x0000 }, /* Power 3 */ |
62 | 0x0000, /* Power 3 */ | 110 | { 0x4, 0x0010 }, /* Interface Control */ |
63 | 0x0010, /* Interface Control */ | 111 | { 0x5, 0x0000 }, /* Companding Control */ |
64 | 0x0000, /* Companding Control */ | 112 | { 0x6, 0x0140 }, /* Clock Control */ |
65 | 0x0140, /* Clock Control */ | 113 | { 0x7, 0x0000 }, /* Additional Controls */ |
66 | 0x0000, /* Additional Controls */ | 114 | { 0x8, 0x0000 }, /* GPIO Control */ |
67 | 0x0000, /* GPIO Control */ | 115 | { 0x9, 0x0002 }, /* Auto Increment Control */ |
68 | 0x0002, /* Auto Increment Control */ | 116 | { 0xa, 0x0000 }, /* DAC Control */ |
69 | 0x0000, /* DAC Control */ | 117 | { 0xb, 0x00FF }, /* DAC Volume */ |
70 | 0x00FF, /* DAC Volume */ | 118 | |
71 | 0, | 119 | { 0xe, 0x0100 }, /* ADC Control */ |
72 | 0, | 120 | { 0xf, 0x00FF }, /* ADC Volume */ |
73 | 0x0100, /* ADC Control */ | 121 | { 0x10, 0x0000 }, /* Notch Filter 1 Control 1 */ |
74 | 0x00FF, /* ADC Volume */ | 122 | { 0x11, 0x0000 }, /* Notch Filter 1 Control 2 */ |
75 | 0x0000, /* Notch Filter 1 Control 1 */ | 123 | { 0x12, 0x0000 }, /* Notch Filter 2 Control 1 */ |
76 | 0x0000, /* Notch Filter 1 Control 2 */ | 124 | { 0x13, 0x0000 }, /* Notch Filter 2 Control 2 */ |
77 | 0x0000, /* Notch Filter 2 Control 1 */ | 125 | { 0x14, 0x0000 }, /* Notch Filter 3 Control 1 */ |
78 | 0x0000, /* Notch Filter 2 Control 2 */ | 126 | { 0x15, 0x0000 }, /* Notch Filter 3 Control 2 */ |
79 | 0x0000, /* Notch Filter 3 Control 1 */ | 127 | { 0x16, 0x0000 }, /* Notch Filter 4 Control 1 */ |
80 | 0x0000, /* Notch Filter 3 Control 2 */ | 128 | { 0x17, 0x0000 }, /* Notch Filter 4 Control 2 */ |
81 | 0x0000, /* Notch Filter 4 Control 1 */ | 129 | { 0x18, 0x0032 }, /* DAC Limit Control 1 */ |
82 | 0x0000, /* Notch Filter 4 Control 2 */ | 130 | { 0x19, 0x0000 }, /* DAC Limit Control 2 */ |
83 | 0x0032, /* DAC Limit Control 1 */ | 131 | |
84 | 0x0000, /* DAC Limit Control 2 */ | 132 | { 0x20, 0x0038 }, /* ALC Control 1 */ |
85 | 0, | 133 | { 0x21, 0x000B }, /* ALC Control 2 */ |
86 | 0, | 134 | { 0x22, 0x0032 }, /* ALC Control 3 */ |
87 | 0, | 135 | { 0x23, 0x0000 }, /* Noise Gate */ |
88 | 0, | 136 | { 0x24, 0x0041 }, /* PLLN */ |
89 | 0, | 137 | { 0x25, 0x000C }, /* PLLK1 */ |
90 | 0, | 138 | { 0x26, 0x0093 }, /* PLLK2 */ |
91 | 0x0038, /* ALC Control 1 */ | 139 | { 0x27, 0x00E9 }, /* PLLK3 */ |
92 | 0x000B, /* ALC Control 2 */ | 140 | |
93 | 0x0032, /* ALC Control 3 */ | 141 | { 0x2a, 0x0030 }, /* ALC Control 4 */ |
94 | 0x0000, /* Noise Gate */ | 142 | |
95 | 0x0041, /* PLLN */ | 143 | { 0x2c, 0x0002 }, /* Input Control */ |
96 | 0x000C, /* PLLK1 */ | 144 | { 0x2d, 0x0050 }, /* PGA Gain */ |
97 | 0x0093, /* PLLK2 */ | 145 | |
98 | 0x00E9, /* PLLK3 */ | 146 | { 0x2f, 0x0002 }, /* ADC Boost Control */ |
99 | 0, | 147 | |
100 | 0, | 148 | { 0x31, 0x0002 }, /* Output Control */ |
101 | 0x0030, /* ALC Control 4 */ | 149 | { 0x32, 0x0000 }, /* Speaker Mixer Control */ |
102 | 0, | 150 | |
103 | 0x0002, /* Input Control */ | 151 | { 0x36, 0x0079 }, /* Speaker Volume */ |
104 | 0x0050, /* PGA Gain */ | 152 | |
105 | 0, | 153 | { 0x38, 0x0000 }, /* Mono Mixer Control */ |
106 | 0x0002, /* ADC Boost Control */ | ||
107 | 0, | ||
108 | 0x0002, /* Output Control */ | ||
109 | 0x0000, /* Speaker Mixer Control */ | ||
110 | 0, | ||
111 | 0, | ||
112 | 0, | ||
113 | 0x0079, /* Speaker Volume */ | ||
114 | 0, | ||
115 | 0x0000, /* Mono Mixer Control */ | ||
116 | }; | 154 | }; |
117 | 155 | ||
118 | static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" }; | 156 | static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" }; |
@@ -264,7 +302,7 @@ static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = { | |||
264 | SND_SOC_DAPM_INPUT("AUX"), | 302 | SND_SOC_DAPM_INPUT("AUX"), |
265 | }; | 303 | }; |
266 | 304 | ||
267 | static const struct snd_soc_dapm_route audio_map[] = { | 305 | static const struct snd_soc_dapm_route wm8940_dapm_routes[] = { |
268 | /* Mono output mixer */ | 306 | /* Mono output mixer */ |
269 | {"Mono Mixer", "PCM Playback Switch", "DAC"}, | 307 | {"Mono Mixer", "PCM Playback Switch", "DAC"}, |
270 | {"Mono Mixer", "Aux Playback Switch", "Aux Input"}, | 308 | {"Mono Mixer", "Aux Playback Switch", "Aux Input"}, |
@@ -296,21 +334,6 @@ static const struct snd_soc_dapm_route audio_map[] = { | |||
296 | {"ADC", NULL, "Boost Mixer"}, | 334 | {"ADC", NULL, "Boost Mixer"}, |
297 | }; | 335 | }; |
298 | 336 | ||
299 | static int wm8940_add_widgets(struct snd_soc_codec *codec) | ||
300 | { | ||
301 | struct snd_soc_dapm_context *dapm = &codec->dapm; | ||
302 | int ret; | ||
303 | |||
304 | ret = snd_soc_dapm_new_controls(dapm, wm8940_dapm_widgets, | ||
305 | ARRAY_SIZE(wm8940_dapm_widgets)); | ||
306 | if (ret) | ||
307 | goto error_ret; | ||
308 | ret = snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); | ||
309 | |||
310 | error_ret: | ||
311 | return ret; | ||
312 | } | ||
313 | |||
314 | #define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0); | 337 | #define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0); |
315 | 338 | ||
316 | static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai, | 339 | static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai, |
@@ -446,6 +469,7 @@ static int wm8940_mute(struct snd_soc_dai *dai, int mute) | |||
446 | static int wm8940_set_bias_level(struct snd_soc_codec *codec, | 469 | static int wm8940_set_bias_level(struct snd_soc_codec *codec, |
447 | enum snd_soc_bias_level level) | 470 | enum snd_soc_bias_level level) |
448 | { | 471 | { |
472 | struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec); | ||
449 | u16 val; | 473 | u16 val; |
450 | u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0; | 474 | u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0; |
451 | int ret = 0; | 475 | int ret = 0; |
@@ -469,7 +493,7 @@ static int wm8940_set_bias_level(struct snd_soc_codec *codec, | |||
469 | break; | 493 | break; |
470 | case SND_SOC_BIAS_STANDBY: | 494 | case SND_SOC_BIAS_STANDBY: |
471 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { | 495 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
472 | ret = snd_soc_cache_sync(codec); | 496 | ret = regcache_sync(wm8940->regmap); |
473 | if (ret < 0) { | 497 | if (ret < 0) { |
474 | dev_err(codec->dev, "Failed to sync cache: %d\n", ret); | 498 | dev_err(codec->dev, "Failed to sync cache: %d\n", ret); |
475 | return ret; | 499 | return ret; |
@@ -684,12 +708,11 @@ static int wm8940_resume(struct snd_soc_codec *codec) | |||
684 | 708 | ||
685 | static int wm8940_probe(struct snd_soc_codec *codec) | 709 | static int wm8940_probe(struct snd_soc_codec *codec) |
686 | { | 710 | { |
687 | struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec); | ||
688 | struct wm8940_setup_data *pdata = codec->dev->platform_data; | 711 | struct wm8940_setup_data *pdata = codec->dev->platform_data; |
689 | int ret; | 712 | int ret; |
690 | u16 reg; | 713 | u16 reg; |
691 | 714 | ||
692 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8940->control_type); | 715 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); |
693 | if (ret < 0) { | 716 | if (ret < 0) { |
694 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | 717 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
695 | return ret; | 718 | return ret; |
@@ -716,11 +739,6 @@ static int wm8940_probe(struct snd_soc_codec *codec) | |||
716 | return ret; | 739 | return ret; |
717 | } | 740 | } |
718 | 741 | ||
719 | ret = snd_soc_add_codec_controls(codec, wm8940_snd_controls, | ||
720 | ARRAY_SIZE(wm8940_snd_controls)); | ||
721 | if (ret) | ||
722 | return ret; | ||
723 | ret = wm8940_add_widgets(codec); | ||
724 | return ret; | 742 | return ret; |
725 | } | 743 | } |
726 | 744 | ||
@@ -736,10 +754,24 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8940 = { | |||
736 | .suspend = wm8940_suspend, | 754 | .suspend = wm8940_suspend, |
737 | .resume = wm8940_resume, | 755 | .resume = wm8940_resume, |
738 | .set_bias_level = wm8940_set_bias_level, | 756 | .set_bias_level = wm8940_set_bias_level, |
739 | .reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults), | 757 | .controls = wm8940_snd_controls, |
740 | .reg_word_size = sizeof(u16), | 758 | .num_controls = ARRAY_SIZE(wm8940_snd_controls), |
741 | .reg_cache_default = wm8940_reg_defaults, | 759 | .dapm_widgets = wm8940_dapm_widgets, |
742 | .volatile_register = wm8940_volatile_register, | 760 | .num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets), |
761 | .dapm_routes = wm8940_dapm_routes, | ||
762 | .num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes), | ||
763 | }; | ||
764 | |||
765 | static const struct regmap_config wm8940_regmap = { | ||
766 | .reg_bits = 8, | ||
767 | .val_bits = 16, | ||
768 | |||
769 | .max_register = WM8940_MONOMIX, | ||
770 | .reg_defaults = wm8940_reg_defaults, | ||
771 | .num_reg_defaults = ARRAY_SIZE(wm8940_reg_defaults), | ||
772 | |||
773 | .readable_reg = wm8940_readable_register, | ||
774 | .volatile_reg = wm8940_volatile_register, | ||
743 | }; | 775 | }; |
744 | 776 | ||
745 | static int wm8940_i2c_probe(struct i2c_client *i2c, | 777 | static int wm8940_i2c_probe(struct i2c_client *i2c, |
@@ -753,8 +785,11 @@ static int wm8940_i2c_probe(struct i2c_client *i2c, | |||
753 | if (wm8940 == NULL) | 785 | if (wm8940 == NULL) |
754 | return -ENOMEM; | 786 | return -ENOMEM; |
755 | 787 | ||
788 | wm8940->regmap = devm_regmap_init_i2c(i2c, &wm8940_regmap); | ||
789 | if (IS_ERR(wm8940->regmap)) | ||
790 | return PTR_ERR(wm8940->regmap); | ||
791 | |||
756 | i2c_set_clientdata(i2c, wm8940); | 792 | i2c_set_clientdata(i2c, wm8940); |
757 | wm8940->control_type = SND_SOC_I2C; | ||
758 | 793 | ||
759 | ret = snd_soc_register_codec(&i2c->dev, | 794 | ret = snd_soc_register_codec(&i2c->dev, |
760 | &soc_codec_dev_wm8940, &wm8940_dai, 1); | 795 | &soc_codec_dev_wm8940, &wm8940_dai, 1); |
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 0f17ed3e29f4..97db3b45b411 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c | |||
@@ -74,7 +74,7 @@ struct wm8962_priv { | |||
74 | struct regulator_bulk_data supplies[WM8962_NUM_SUPPLIES]; | 74 | struct regulator_bulk_data supplies[WM8962_NUM_SUPPLIES]; |
75 | struct notifier_block disable_nb[WM8962_NUM_SUPPLIES]; | 75 | struct notifier_block disable_nb[WM8962_NUM_SUPPLIES]; |
76 | 76 | ||
77 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) | 77 | #if IS_ENABLED(CONFIG_INPUT) |
78 | struct input_dev *beep; | 78 | struct input_dev *beep; |
79 | struct work_struct beep_work; | 79 | struct work_struct beep_work; |
80 | int beep_rate; | 80 | int beep_rate; |
@@ -3121,7 +3121,7 @@ int wm8962_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack) | |||
3121 | } | 3121 | } |
3122 | EXPORT_SYMBOL_GPL(wm8962_mic_detect); | 3122 | EXPORT_SYMBOL_GPL(wm8962_mic_detect); |
3123 | 3123 | ||
3124 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) | 3124 | #if IS_ENABLED(CONFIG_INPUT) |
3125 | static int beep_rates[] = { | 3125 | static int beep_rates[] = { |
3126 | 500, 1000, 2000, 4000, | 3126 | 500, 1000, 2000, 4000, |
3127 | }; | 3127 | }; |
diff --git a/sound/soc/codecs/wm8974.c b/sound/soc/codecs/wm8974.c index a2d01d10a5dd..15f45c7bd833 100644 --- a/sound/soc/codecs/wm8974.c +++ b/sound/soc/codecs/wm8974.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/pm.h> | 18 | #include <linux/pm.h> |
19 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
20 | #include <linux/regmap.h> | ||
20 | #include <linux/slab.h> | 21 | #include <linux/slab.h> |
21 | #include <sound/core.h> | 22 | #include <sound/core.h> |
22 | #include <sound/pcm.h> | 23 | #include <sound/pcm.h> |
@@ -27,22 +28,22 @@ | |||
27 | 28 | ||
28 | #include "wm8974.h" | 29 | #include "wm8974.h" |
29 | 30 | ||
30 | static const u16 wm8974_reg[WM8974_CACHEREGNUM] = { | 31 | static const struct reg_default wm8974_reg_defaults[] = { |
31 | 0x0000, 0x0000, 0x0000, 0x0000, | 32 | { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 }, |
32 | 0x0050, 0x0000, 0x0140, 0x0000, | 33 | { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 }, |
33 | 0x0000, 0x0000, 0x0000, 0x00ff, | 34 | { 8, 0x0000 }, { 9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff }, |
34 | 0x0000, 0x0000, 0x0100, 0x00ff, | 35 | { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff }, |
35 | 0x0000, 0x0000, 0x012c, 0x002c, | 36 | { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c }, |
36 | 0x002c, 0x002c, 0x002c, 0x0000, | 37 | { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 }, |
37 | 0x0032, 0x0000, 0x0000, 0x0000, | 38 | { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 }, |
38 | 0x0000, 0x0000, 0x0000, 0x0000, | 39 | { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 }, |
39 | 0x0038, 0x000b, 0x0032, 0x0000, | 40 | { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 }, |
40 | 0x0008, 0x000c, 0x0093, 0x00e9, | 41 | { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 }, |
41 | 0x0000, 0x0000, 0x0000, 0x0000, | 42 | { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 }, |
42 | 0x0003, 0x0010, 0x0000, 0x0000, | 43 | { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 }, |
43 | 0x0000, 0x0002, 0x0000, 0x0000, | 44 | { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 }, |
44 | 0x0000, 0x0000, 0x0039, 0x0000, | 45 | { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 }, |
45 | 0x0000, | 46 | { 56, 0x0000 }, |
46 | }; | 47 | }; |
47 | 48 | ||
48 | #define WM8974_POWER1_BIASEN 0x08 | 49 | #define WM8974_POWER1_BIASEN 0x08 |
@@ -514,7 +515,7 @@ static int wm8974_set_bias_level(struct snd_soc_codec *codec, | |||
514 | power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN; | 515 | power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN; |
515 | 516 | ||
516 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { | 517 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
517 | snd_soc_cache_sync(codec); | 518 | regcache_sync(dev_get_regmap(codec->dev, NULL)); |
518 | 519 | ||
519 | /* Initial cap charge at VMID 5k */ | 520 | /* Initial cap charge at VMID 5k */ |
520 | snd_soc_write(codec, WM8974_POWER1, power1 | 0x3); | 521 | snd_soc_write(codec, WM8974_POWER1, power1 | 0x3); |
@@ -579,11 +580,20 @@ static int wm8974_resume(struct snd_soc_codec *codec) | |||
579 | return 0; | 580 | return 0; |
580 | } | 581 | } |
581 | 582 | ||
583 | static const struct regmap_config wm8974_regmap = { | ||
584 | .reg_bits = 7, | ||
585 | .val_bits = 9, | ||
586 | |||
587 | .max_register = WM8974_MONOMIX, | ||
588 | .reg_defaults = wm8974_reg_defaults, | ||
589 | .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults), | ||
590 | }; | ||
591 | |||
582 | static int wm8974_probe(struct snd_soc_codec *codec) | 592 | static int wm8974_probe(struct snd_soc_codec *codec) |
583 | { | 593 | { |
584 | int ret = 0; | 594 | int ret = 0; |
585 | 595 | ||
586 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_I2C); | 596 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP); |
587 | if (ret < 0) { | 597 | if (ret < 0) { |
588 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | 598 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
589 | return ret; | 599 | return ret; |
@@ -613,9 +623,6 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8974 = { | |||
613 | .suspend = wm8974_suspend, | 623 | .suspend = wm8974_suspend, |
614 | .resume = wm8974_resume, | 624 | .resume = wm8974_resume, |
615 | .set_bias_level = wm8974_set_bias_level, | 625 | .set_bias_level = wm8974_set_bias_level, |
616 | .reg_cache_size = ARRAY_SIZE(wm8974_reg), | ||
617 | .reg_word_size = sizeof(u16), | ||
618 | .reg_cache_default = wm8974_reg, | ||
619 | 626 | ||
620 | .controls = wm8974_snd_controls, | 627 | .controls = wm8974_snd_controls, |
621 | .num_controls = ARRAY_SIZE(wm8974_snd_controls), | 628 | .num_controls = ARRAY_SIZE(wm8974_snd_controls), |
@@ -628,8 +635,13 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8974 = { | |||
628 | static int wm8974_i2c_probe(struct i2c_client *i2c, | 635 | static int wm8974_i2c_probe(struct i2c_client *i2c, |
629 | const struct i2c_device_id *id) | 636 | const struct i2c_device_id *id) |
630 | { | 637 | { |
638 | struct regmap *regmap; | ||
631 | int ret; | 639 | int ret; |
632 | 640 | ||
641 | regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap); | ||
642 | if (IS_ERR(regmap)) | ||
643 | return PTR_ERR(regmap); | ||
644 | |||
633 | ret = snd_soc_register_codec(&i2c->dev, | 645 | ret = snd_soc_register_codec(&i2c->dev, |
634 | &soc_codec_dev_wm8974, &wm8974_dai, 1); | 646 | &soc_codec_dev_wm8974, &wm8974_dai, 1); |
635 | 647 | ||
diff --git a/sound/soc/codecs/wm8985.c b/sound/soc/codecs/wm8985.c index 18f2babe1090..271b517911a4 100644 --- a/sound/soc/codecs/wm8985.c +++ b/sound/soc/codecs/wm8985.c | |||
@@ -1148,7 +1148,7 @@ static struct spi_driver wm8985_spi_driver = { | |||
1148 | }; | 1148 | }; |
1149 | #endif | 1149 | #endif |
1150 | 1150 | ||
1151 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1151 | #if IS_ENABLED(CONFIG_I2C) |
1152 | static int wm8985_i2c_probe(struct i2c_client *i2c, | 1152 | static int wm8985_i2c_probe(struct i2c_client *i2c, |
1153 | const struct i2c_device_id *id) | 1153 | const struct i2c_device_id *id) |
1154 | { | 1154 | { |
@@ -1201,7 +1201,7 @@ static int __init wm8985_modinit(void) | |||
1201 | { | 1201 | { |
1202 | int ret = 0; | 1202 | int ret = 0; |
1203 | 1203 | ||
1204 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1204 | #if IS_ENABLED(CONFIG_I2C) |
1205 | ret = i2c_add_driver(&wm8985_i2c_driver); | 1205 | ret = i2c_add_driver(&wm8985_i2c_driver); |
1206 | if (ret) { | 1206 | if (ret) { |
1207 | printk(KERN_ERR "Failed to register wm8985 I2C driver: %d\n", | 1207 | printk(KERN_ERR "Failed to register wm8985 I2C driver: %d\n", |
@@ -1221,7 +1221,7 @@ module_init(wm8985_modinit); | |||
1221 | 1221 | ||
1222 | static void __exit wm8985_exit(void) | 1222 | static void __exit wm8985_exit(void) |
1223 | { | 1223 | { |
1224 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1224 | #if IS_ENABLED(CONFIG_I2C) |
1225 | i2c_del_driver(&wm8985_i2c_driver); | 1225 | i2c_del_driver(&wm8985_i2c_driver); |
1226 | #endif | 1226 | #endif |
1227 | #if defined(CONFIG_SPI_MASTER) | 1227 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8988.c b/sound/soc/codecs/wm8988.c index 39b9acceb595..a55e1c2c382e 100644 --- a/sound/soc/codecs/wm8988.c +++ b/sound/soc/codecs/wm8988.c | |||
@@ -912,7 +912,7 @@ static struct spi_driver wm8988_spi_driver = { | |||
912 | }; | 912 | }; |
913 | #endif /* CONFIG_SPI_MASTER */ | 913 | #endif /* CONFIG_SPI_MASTER */ |
914 | 914 | ||
915 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 915 | #if IS_ENABLED(CONFIG_I2C) |
916 | static int wm8988_i2c_probe(struct i2c_client *i2c, | 916 | static int wm8988_i2c_probe(struct i2c_client *i2c, |
917 | const struct i2c_device_id *id) | 917 | const struct i2c_device_id *id) |
918 | { | 918 | { |
@@ -964,7 +964,7 @@ static struct i2c_driver wm8988_i2c_driver = { | |||
964 | static int __init wm8988_modinit(void) | 964 | static int __init wm8988_modinit(void) |
965 | { | 965 | { |
966 | int ret = 0; | 966 | int ret = 0; |
967 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 967 | #if IS_ENABLED(CONFIG_I2C) |
968 | ret = i2c_add_driver(&wm8988_i2c_driver); | 968 | ret = i2c_add_driver(&wm8988_i2c_driver); |
969 | if (ret != 0) { | 969 | if (ret != 0) { |
970 | printk(KERN_ERR "Failed to register WM8988 I2C driver: %d\n", | 970 | printk(KERN_ERR "Failed to register WM8988 I2C driver: %d\n", |
@@ -984,7 +984,7 @@ module_init(wm8988_modinit); | |||
984 | 984 | ||
985 | static void __exit wm8988_exit(void) | 985 | static void __exit wm8988_exit(void) |
986 | { | 986 | { |
987 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 987 | #if IS_ENABLED(CONFIG_I2C) |
988 | i2c_del_driver(&wm8988_i2c_driver); | 988 | i2c_del_driver(&wm8988_i2c_driver); |
989 | #endif | 989 | #endif |
990 | #if defined(CONFIG_SPI_MASTER) | 990 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index 4f05fb88bddf..0ccd4d8d043b 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/pm.h> | 18 | #include <linux/pm.h> |
19 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
20 | #include <linux/regmap.h> | ||
20 | #include <linux/slab.h> | 21 | #include <linux/slab.h> |
21 | #include <sound/core.h> | 22 | #include <sound/core.h> |
22 | #include <sound/pcm.h> | 23 | #include <sound/pcm.h> |
@@ -30,13 +31,12 @@ | |||
30 | 31 | ||
31 | /* codec private data */ | 32 | /* codec private data */ |
32 | struct wm8990_priv { | 33 | struct wm8990_priv { |
33 | enum snd_soc_control_type control_type; | 34 | struct regmap *regmap; |
34 | unsigned int sysclk; | 35 | unsigned int sysclk; |
35 | unsigned int pcmclk; | 36 | unsigned int pcmclk; |
36 | }; | 37 | }; |
37 | 38 | ||
38 | static int wm8990_volatile_register(struct snd_soc_codec *codec, | 39 | static bool wm8990_volatile_register(struct device *dev, unsigned int reg) |
39 | unsigned int reg) | ||
40 | { | 40 | { |
41 | switch (reg) { | 41 | switch (reg) { |
42 | case WM8990_RESET: | 42 | case WM8990_RESET: |
@@ -46,71 +46,69 @@ static int wm8990_volatile_register(struct snd_soc_codec *codec, | |||
46 | } | 46 | } |
47 | } | 47 | } |
48 | 48 | ||
49 | static const u16 wm8990_reg[] = { | 49 | static const struct reg_default wm8990_reg_defaults[] = { |
50 | 0x8990, /* R0 - Reset */ | 50 | { 1, 0x0000 }, /* R1 - Power Management (1) */ |
51 | 0x0000, /* R1 - Power Management (1) */ | 51 | { 2, 0x6000 }, /* R2 - Power Management (2) */ |
52 | 0x6000, /* R2 - Power Management (2) */ | 52 | { 3, 0x0000 }, /* R3 - Power Management (3) */ |
53 | 0x0000, /* R3 - Power Management (3) */ | 53 | { 4, 0x4050 }, /* R4 - Audio Interface (1) */ |
54 | 0x4050, /* R4 - Audio Interface (1) */ | 54 | { 5, 0x4000 }, /* R5 - Audio Interface (2) */ |
55 | 0x4000, /* R5 - Audio Interface (2) */ | 55 | { 6, 0x01C8 }, /* R6 - Clocking (1) */ |
56 | 0x01C8, /* R6 - Clocking (1) */ | 56 | { 7, 0x0000 }, /* R7 - Clocking (2) */ |
57 | 0x0000, /* R7 - Clocking (2) */ | 57 | { 8, 0x0040 }, /* R8 - Audio Interface (3) */ |
58 | 0x0040, /* R8 - Audio Interface (3) */ | 58 | { 9, 0x0040 }, /* R9 - Audio Interface (4) */ |
59 | 0x0040, /* R9 - Audio Interface (4) */ | 59 | { 10, 0x0004 }, /* R10 - DAC CTRL */ |
60 | 0x0004, /* R10 - DAC CTRL */ | 60 | { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */ |
61 | 0x00C0, /* R11 - Left DAC Digital Volume */ | 61 | { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */ |
62 | 0x00C0, /* R12 - Right DAC Digital Volume */ | 62 | { 13, 0x0000 }, /* R13 - Digital Side Tone */ |
63 | 0x0000, /* R13 - Digital Side Tone */ | 63 | { 14, 0x0100 }, /* R14 - ADC CTRL */ |
64 | 0x0100, /* R14 - ADC CTRL */ | 64 | { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */ |
65 | 0x00C0, /* R15 - Left ADC Digital Volume */ | 65 | { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */ |
66 | 0x00C0, /* R16 - Right ADC Digital Volume */ | 66 | |
67 | 0x0000, /* R17 */ | 67 | { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */ |
68 | 0x0000, /* R18 - GPIO CTRL 1 */ | 68 | { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */ |
69 | 0x1000, /* R19 - GPIO1 & GPIO2 */ | 69 | { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */ |
70 | 0x1010, /* R20 - GPIO3 & GPIO4 */ | 70 | { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */ |
71 | 0x1010, /* R21 - GPIO5 & GPIO6 */ | 71 | { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */ |
72 | 0x8000, /* R22 - GPIOCTRL 2 */ | 72 | { 23, 0x0800 }, /* R23 - GPIO_POL */ |
73 | 0x0800, /* R23 - GPIO_POL */ | 73 | { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */ |
74 | 0x008B, /* R24 - Left Line Input 1&2 Volume */ | 74 | { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */ |
75 | 0x008B, /* R25 - Left Line Input 3&4 Volume */ | 75 | { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */ |
76 | 0x008B, /* R26 - Right Line Input 1&2 Volume */ | 76 | { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */ |
77 | 0x008B, /* R27 - Right Line Input 3&4 Volume */ | 77 | { 28, 0x0000 }, /* R28 - Left Output Volume */ |
78 | 0x0000, /* R28 - Left Output Volume */ | 78 | { 29, 0x0000 }, /* R29 - Right Output Volume */ |
79 | 0x0000, /* R29 - Right Output Volume */ | 79 | { 30, 0x0066 }, /* R30 - Line Outputs Volume */ |
80 | 0x0066, /* R30 - Line Outputs Volume */ | 80 | { 31, 0x0022 }, /* R31 - Out3/4 Volume */ |
81 | 0x0022, /* R31 - Out3/4 Volume */ | 81 | { 32, 0x0079 }, /* R32 - Left OPGA Volume */ |
82 | 0x0079, /* R32 - Left OPGA Volume */ | 82 | { 33, 0x0079 }, /* R33 - Right OPGA Volume */ |
83 | 0x0079, /* R33 - Right OPGA Volume */ | 83 | { 34, 0x0003 }, /* R34 - Speaker Volume */ |
84 | 0x0003, /* R34 - Speaker Volume */ | 84 | { 35, 0x0003 }, /* R35 - ClassD1 */ |
85 | 0x0003, /* R35 - ClassD1 */ | 85 | |
86 | 0x0000, /* R36 */ | 86 | { 37, 0x0100 }, /* R37 - ClassD3 */ |
87 | 0x0100, /* R37 - ClassD3 */ | 87 | { 38, 0x0079 }, /* R38 - ClassD4 */ |
88 | 0x0079, /* R38 - ClassD4 */ | 88 | { 39, 0x0000 }, /* R39 - Input Mixer1 */ |
89 | 0x0000, /* R39 - Input Mixer1 */ | 89 | { 40, 0x0000 }, /* R40 - Input Mixer2 */ |
90 | 0x0000, /* R40 - Input Mixer2 */ | 90 | { 41, 0x0000 }, /* R41 - Input Mixer3 */ |
91 | 0x0000, /* R41 - Input Mixer3 */ | 91 | { 42, 0x0000 }, /* R42 - Input Mixer4 */ |
92 | 0x0000, /* R42 - Input Mixer4 */ | 92 | { 43, 0x0000 }, /* R43 - Input Mixer5 */ |
93 | 0x0000, /* R43 - Input Mixer5 */ | 93 | { 44, 0x0000 }, /* R44 - Input Mixer6 */ |
94 | 0x0000, /* R44 - Input Mixer6 */ | 94 | { 45, 0x0000 }, /* R45 - Output Mixer1 */ |
95 | 0x0000, /* R45 - Output Mixer1 */ | 95 | { 46, 0x0000 }, /* R46 - Output Mixer2 */ |
96 | 0x0000, /* R46 - Output Mixer2 */ | 96 | { 47, 0x0000 }, /* R47 - Output Mixer3 */ |
97 | 0x0000, /* R47 - Output Mixer3 */ | 97 | { 48, 0x0000 }, /* R48 - Output Mixer4 */ |
98 | 0x0000, /* R48 - Output Mixer4 */ | 98 | { 49, 0x0000 }, /* R49 - Output Mixer5 */ |
99 | 0x0000, /* R49 - Output Mixer5 */ | 99 | { 50, 0x0000 }, /* R50 - Output Mixer6 */ |
100 | 0x0000, /* R50 - Output Mixer6 */ | 100 | { 51, 0x0180 }, /* R51 - Out3/4 Mixer */ |
101 | 0x0180, /* R51 - Out3/4 Mixer */ | 101 | { 52, 0x0000 }, /* R52 - Line Mixer1 */ |
102 | 0x0000, /* R52 - Line Mixer1 */ | 102 | { 53, 0x0000 }, /* R53 - Line Mixer2 */ |
103 | 0x0000, /* R53 - Line Mixer2 */ | 103 | { 54, 0x0000 }, /* R54 - Speaker Mixer */ |
104 | 0x0000, /* R54 - Speaker Mixer */ | 104 | { 55, 0x0000 }, /* R55 - Additional Control */ |
105 | 0x0000, /* R55 - Additional Control */ | 105 | { 56, 0x0000 }, /* R56 - AntiPOP1 */ |
106 | 0x0000, /* R56 - AntiPOP1 */ | 106 | { 57, 0x0000 }, /* R57 - AntiPOP2 */ |
107 | 0x0000, /* R57 - AntiPOP2 */ | 107 | { 58, 0x0000 }, /* R58 - MICBIAS */ |
108 | 0x0000, /* R58 - MICBIAS */ | 108 | |
109 | 0x0000, /* R59 */ | 109 | { 60, 0x0008 }, /* R60 - PLL1 */ |
110 | 0x0008, /* R60 - PLL1 */ | 110 | { 61, 0x0031 }, /* R61 - PLL2 */ |
111 | 0x0031, /* R61 - PLL2 */ | 111 | { 62, 0x0026 }, /* R62 - PLL3 */ |
112 | 0x0026, /* R62 - PLL3 */ | ||
113 | 0x0000, /* R63 - Driver internal */ | ||
114 | }; | 112 | }; |
115 | 113 | ||
116 | #define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0) | 114 | #define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0) |
@@ -376,32 +374,6 @@ SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME, | |||
376 | * _DAPM_ Controls | 374 | * _DAPM_ Controls |
377 | */ | 375 | */ |
378 | 376 | ||
379 | static int inmixer_event(struct snd_soc_dapm_widget *w, | ||
380 | struct snd_kcontrol *kcontrol, int event) | ||
381 | { | ||
382 | u16 reg, fakepower; | ||
383 | |||
384 | reg = snd_soc_read(w->codec, WM8990_POWER_MANAGEMENT_2); | ||
385 | fakepower = snd_soc_read(w->codec, WM8990_INTDRIVBITS); | ||
386 | |||
387 | if (fakepower & ((1 << WM8990_INMIXL_PWR_BIT) | | ||
388 | (1 << WM8990_AINLMUX_PWR_BIT))) { | ||
389 | reg |= WM8990_AINL_ENA; | ||
390 | } else { | ||
391 | reg &= ~WM8990_AINL_ENA; | ||
392 | } | ||
393 | |||
394 | if (fakepower & ((1 << WM8990_INMIXR_PWR_BIT) | | ||
395 | (1 << WM8990_AINRMUX_PWR_BIT))) { | ||
396 | reg |= WM8990_AINR_ENA; | ||
397 | } else { | ||
398 | reg &= ~WM8990_AINR_ENA; | ||
399 | } | ||
400 | snd_soc_write(w->codec, WM8990_POWER_MANAGEMENT_2, reg); | ||
401 | |||
402 | return 0; | ||
403 | } | ||
404 | |||
405 | static int outmixer_event(struct snd_soc_dapm_widget *w, | 377 | static int outmixer_event(struct snd_soc_dapm_widget *w, |
406 | struct snd_kcontrol *kcontrol, int event) | 378 | struct snd_kcontrol *kcontrol, int event) |
407 | { | 379 | { |
@@ -656,6 +628,11 @@ SND_SOC_DAPM_INPUT("RIN1"), | |||
656 | SND_SOC_DAPM_INPUT("RIN2"), | 628 | SND_SOC_DAPM_INPUT("RIN2"), |
657 | SND_SOC_DAPM_INPUT("Internal ADC Source"), | 629 | SND_SOC_DAPM_INPUT("Internal ADC Source"), |
658 | 630 | ||
631 | SND_SOC_DAPM_SUPPLY("INL", WM8990_POWER_MANAGEMENT_2, WM8990_AINL_ENA_BIT, 0, | ||
632 | NULL, 0), | ||
633 | SND_SOC_DAPM_SUPPLY("INR", WM8990_POWER_MANAGEMENT_2, WM8990_AINR_ENA_BIT, 0, | ||
634 | NULL, 0), | ||
635 | |||
659 | /* DACs */ | 636 | /* DACs */ |
660 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, | 637 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2, |
661 | WM8990_ADCL_ENA_BIT, 0), | 638 | WM8990_ADCL_ENA_BIT, 0), |
@@ -677,26 +654,20 @@ SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT, | |||
677 | ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), | 654 | ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)), |
678 | 655 | ||
679 | /* INMIXL */ | 656 | /* INMIXL */ |
680 | SND_SOC_DAPM_MIXER_E("INMIXL", WM8990_INTDRIVBITS, WM8990_INMIXL_PWR_BIT, 0, | 657 | SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0, |
681 | &wm8990_dapm_inmixl_controls[0], | 658 | &wm8990_dapm_inmixl_controls[0], |
682 | ARRAY_SIZE(wm8990_dapm_inmixl_controls), | 659 | ARRAY_SIZE(wm8990_dapm_inmixl_controls)), |
683 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
684 | 660 | ||
685 | /* AINLMUX */ | 661 | /* AINLMUX */ |
686 | SND_SOC_DAPM_MUX_E("AINLMUX", WM8990_INTDRIVBITS, WM8990_AINLMUX_PWR_BIT, 0, | 662 | SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainlmux_controls), |
687 | &wm8990_dapm_ainlmux_controls, inmixer_event, | ||
688 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
689 | 663 | ||
690 | /* INMIXR */ | 664 | /* INMIXR */ |
691 | SND_SOC_DAPM_MIXER_E("INMIXR", WM8990_INTDRIVBITS, WM8990_INMIXR_PWR_BIT, 0, | 665 | SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0, |
692 | &wm8990_dapm_inmixr_controls[0], | 666 | &wm8990_dapm_inmixr_controls[0], |
693 | ARRAY_SIZE(wm8990_dapm_inmixr_controls), | 667 | ARRAY_SIZE(wm8990_dapm_inmixr_controls)), |
694 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
695 | 668 | ||
696 | /* AINRMUX */ | 669 | /* AINRMUX */ |
697 | SND_SOC_DAPM_MUX_E("AINRMUX", WM8990_INTDRIVBITS, WM8990_AINRMUX_PWR_BIT, 0, | 670 | SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainrmux_controls), |
698 | &wm8990_dapm_ainrmux_controls, inmixer_event, | ||
699 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
700 | 671 | ||
701 | /* Output Side */ | 672 | /* Output Side */ |
702 | /* DACs */ | 673 | /* DACs */ |
@@ -787,7 +758,7 @@ SND_SOC_DAPM_OUTPUT("RON"), | |||
787 | SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), | 758 | SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), |
788 | }; | 759 | }; |
789 | 760 | ||
790 | static const struct snd_soc_dapm_route audio_map[] = { | 761 | static const struct snd_soc_dapm_route wm8990_dapm_routes[] = { |
791 | /* Make DACs turn on when playing even if not mixed into any outputs */ | 762 | /* Make DACs turn on when playing even if not mixed into any outputs */ |
792 | {"Internal DAC Sink", NULL, "Left DAC"}, | 763 | {"Internal DAC Sink", NULL, "Left DAC"}, |
793 | {"Internal DAC Sink", NULL, "Right DAC"}, | 764 | {"Internal DAC Sink", NULL, "Right DAC"}, |
@@ -796,6 +767,11 @@ static const struct snd_soc_dapm_route audio_map[] = { | |||
796 | {"Left ADC", NULL, "Internal ADC Source"}, | 767 | {"Left ADC", NULL, "Internal ADC Source"}, |
797 | {"Right ADC", NULL, "Internal ADC Source"}, | 768 | {"Right ADC", NULL, "Internal ADC Source"}, |
798 | 769 | ||
770 | {"AINLMUX", NULL, "INL"}, | ||
771 | {"INMIXL", NULL, "INL"}, | ||
772 | {"AINRMUX", NULL, "INR"}, | ||
773 | {"INMIXR", NULL, "INR"}, | ||
774 | |||
799 | /* Input Side */ | 775 | /* Input Side */ |
800 | /* LIN12 PGA */ | 776 | /* LIN12 PGA */ |
801 | {"LIN12 PGA", "LIN1 Switch", "LIN1"}, | 777 | {"LIN12 PGA", "LIN1 Switch", "LIN1"}, |
@@ -912,18 +888,6 @@ static const struct snd_soc_dapm_route audio_map[] = { | |||
912 | {"RON", NULL, "RONMIX"}, | 888 | {"RON", NULL, "RONMIX"}, |
913 | }; | 889 | }; |
914 | 890 | ||
915 | static int wm8990_add_widgets(struct snd_soc_codec *codec) | ||
916 | { | ||
917 | struct snd_soc_dapm_context *dapm = &codec->dapm; | ||
918 | |||
919 | snd_soc_dapm_new_controls(dapm, wm8990_dapm_widgets, | ||
920 | ARRAY_SIZE(wm8990_dapm_widgets)); | ||
921 | /* set up the WM8990 audio map */ | ||
922 | snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); | ||
923 | |||
924 | return 0; | ||
925 | } | ||
926 | |||
927 | /* PLL divisors */ | 891 | /* PLL divisors */ |
928 | struct _pll_div { | 892 | struct _pll_div { |
929 | u32 div2; | 893 | u32 div2; |
@@ -1148,6 +1112,7 @@ static int wm8990_mute(struct snd_soc_dai *dai, int mute) | |||
1148 | static int wm8990_set_bias_level(struct snd_soc_codec *codec, | 1112 | static int wm8990_set_bias_level(struct snd_soc_codec *codec, |
1149 | enum snd_soc_bias_level level) | 1113 | enum snd_soc_bias_level level) |
1150 | { | 1114 | { |
1115 | struct wm8990_priv *wm8990 = snd_soc_codec_get_drvdata(codec); | ||
1151 | int ret; | 1116 | int ret; |
1152 | 1117 | ||
1153 | switch (level) { | 1118 | switch (level) { |
@@ -1162,7 +1127,7 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, | |||
1162 | 1127 | ||
1163 | case SND_SOC_BIAS_STANDBY: | 1128 | case SND_SOC_BIAS_STANDBY: |
1164 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { | 1129 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
1165 | ret = snd_soc_cache_sync(codec); | 1130 | ret = regcache_sync(wm8990->regmap); |
1166 | if (ret < 0) { | 1131 | if (ret < 0) { |
1167 | dev_err(codec->dev, "Failed to sync cache: %d\n", ret); | 1132 | dev_err(codec->dev, "Failed to sync cache: %d\n", ret); |
1168 | return ret; | 1133 | return ret; |
@@ -1260,7 +1225,7 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, | |||
1260 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ | 1225 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ |
1261 | snd_soc_write(codec, WM8990_ANTIPOP2, 0x0); | 1226 | snd_soc_write(codec, WM8990_ANTIPOP2, 0x0); |
1262 | 1227 | ||
1263 | codec->cache_sync = 1; | 1228 | regcache_mark_dirty(wm8990->regmap); |
1264 | break; | 1229 | break; |
1265 | } | 1230 | } |
1266 | 1231 | ||
@@ -1329,7 +1294,7 @@ static int wm8990_probe(struct snd_soc_codec *codec) | |||
1329 | { | 1294 | { |
1330 | int ret; | 1295 | int ret; |
1331 | 1296 | ||
1332 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); | 1297 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); |
1333 | if (ret < 0) { | 1298 | if (ret < 0) { |
1334 | printk(KERN_ERR "wm8990: failed to set cache I/O: %d\n", ret); | 1299 | printk(KERN_ERR "wm8990: failed to set cache I/O: %d\n", ret); |
1335 | return ret; | 1300 | return ret; |
@@ -1352,10 +1317,6 @@ static int wm8990_probe(struct snd_soc_codec *codec) | |||
1352 | snd_soc_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); | 1317 | snd_soc_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); |
1353 | snd_soc_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); | 1318 | snd_soc_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); |
1354 | 1319 | ||
1355 | snd_soc_add_codec_controls(codec, wm8990_snd_controls, | ||
1356 | ARRAY_SIZE(wm8990_snd_controls)); | ||
1357 | wm8990_add_widgets(codec); | ||
1358 | |||
1359 | return 0; | 1320 | return 0; |
1360 | } | 1321 | } |
1361 | 1322 | ||
@@ -1372,13 +1333,25 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8990 = { | |||
1372 | .suspend = wm8990_suspend, | 1333 | .suspend = wm8990_suspend, |
1373 | .resume = wm8990_resume, | 1334 | .resume = wm8990_resume, |
1374 | .set_bias_level = wm8990_set_bias_level, | 1335 | .set_bias_level = wm8990_set_bias_level, |
1375 | .reg_cache_size = ARRAY_SIZE(wm8990_reg), | 1336 | .controls = wm8990_snd_controls, |
1376 | .reg_word_size = sizeof(u16), | 1337 | .num_controls = ARRAY_SIZE(wm8990_snd_controls), |
1377 | .reg_cache_default = wm8990_reg, | 1338 | .dapm_widgets = wm8990_dapm_widgets, |
1378 | .volatile_register = wm8990_volatile_register, | 1339 | .num_dapm_widgets = ARRAY_SIZE(wm8990_dapm_widgets), |
1340 | .dapm_routes = wm8990_dapm_routes, | ||
1341 | .num_dapm_routes = ARRAY_SIZE(wm8990_dapm_routes), | ||
1342 | }; | ||
1343 | |||
1344 | static const struct regmap_config wm8990_regmap = { | ||
1345 | .reg_bits = 8, | ||
1346 | .val_bits = 16, | ||
1347 | |||
1348 | .max_register = WM8990_PLL3, | ||
1349 | .volatile_reg = wm8990_volatile_register, | ||
1350 | .reg_defaults = wm8990_reg_defaults, | ||
1351 | .num_reg_defaults = ARRAY_SIZE(wm8990_reg_defaults), | ||
1352 | .cache_type = REGCACHE_RBTREE, | ||
1379 | }; | 1353 | }; |
1380 | 1354 | ||
1381 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | ||
1382 | static int wm8990_i2c_probe(struct i2c_client *i2c, | 1355 | static int wm8990_i2c_probe(struct i2c_client *i2c, |
1383 | const struct i2c_device_id *id) | 1356 | const struct i2c_device_id *id) |
1384 | { | 1357 | { |
@@ -1420,29 +1393,8 @@ static struct i2c_driver wm8990_i2c_driver = { | |||
1420 | .remove = wm8990_i2c_remove, | 1393 | .remove = wm8990_i2c_remove, |
1421 | .id_table = wm8990_i2c_id, | 1394 | .id_table = wm8990_i2c_id, |
1422 | }; | 1395 | }; |
1423 | #endif | ||
1424 | 1396 | ||
1425 | static int __init wm8990_modinit(void) | 1397 | module_i2c_driver(wm8990_i2c_driver); |
1426 | { | ||
1427 | int ret = 0; | ||
1428 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | ||
1429 | ret = i2c_add_driver(&wm8990_i2c_driver); | ||
1430 | if (ret != 0) { | ||
1431 | printk(KERN_ERR "Failed to register wm8990 I2C driver: %d\n", | ||
1432 | ret); | ||
1433 | } | ||
1434 | #endif | ||
1435 | return ret; | ||
1436 | } | ||
1437 | module_init(wm8990_modinit); | ||
1438 | |||
1439 | static void __exit wm8990_exit(void) | ||
1440 | { | ||
1441 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | ||
1442 | i2c_del_driver(&wm8990_i2c_driver); | ||
1443 | #endif | ||
1444 | } | ||
1445 | module_exit(wm8990_exit); | ||
1446 | 1398 | ||
1447 | MODULE_DESCRIPTION("ASoC WM8990 driver"); | 1399 | MODULE_DESCRIPTION("ASoC WM8990 driver"); |
1448 | MODULE_AUTHOR("Liam Girdwood"); | 1400 | MODULE_AUTHOR("Liam Girdwood"); |
diff --git a/sound/soc/codecs/wm8990.h b/sound/soc/codecs/wm8990.h index 77c98a4bfe9c..0e9c78040c4c 100644 --- a/sound/soc/codecs/wm8990.h +++ b/sound/soc/codecs/wm8990.h | |||
@@ -78,7 +78,6 @@ | |||
78 | #define WM8990_PLL1 0x3C | 78 | #define WM8990_PLL1 0x3C |
79 | #define WM8990_PLL2 0x3D | 79 | #define WM8990_PLL2 0x3D |
80 | #define WM8990_PLL3 0x3E | 80 | #define WM8990_PLL3 0x3E |
81 | #define WM8990_INTDRIVBITS 0x3F | ||
82 | 81 | ||
83 | #define WM8990_EXT_ACCESS_ENA 0x75 | 82 | #define WM8990_EXT_ACCESS_ENA 0x75 |
84 | #define WM8990_EXT_CTL1 0x7a | 83 | #define WM8990_EXT_CTL1 0x7a |
@@ -818,14 +817,6 @@ | |||
818 | */ | 817 | */ |
819 | #define WM8990_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ | 818 | #define WM8990_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ |
820 | 819 | ||
821 | /* | ||
822 | * R63 (0x3F) - Internal Driver Bits | ||
823 | */ | ||
824 | #define WM8990_INMIXL_PWR_BIT 0 | ||
825 | #define WM8990_AINLMUX_PWR_BIT 1 | ||
826 | #define WM8990_INMIXR_PWR_BIT 2 | ||
827 | #define WM8990_AINRMUX_PWR_BIT 3 | ||
828 | |||
829 | #define WM8990_MCLK_DIV 0 | 820 | #define WM8990_MCLK_DIV 0 |
830 | #define WM8990_DACCLK_DIV 1 | 821 | #define WM8990_DACCLK_DIV 1 |
831 | #define WM8990_ADCCLK_DIV 2 | 822 | #define WM8990_ADCCLK_DIV 2 |
diff --git a/sound/soc/codecs/wm8991.c b/sound/soc/codecs/wm8991.c index 3a39df7a3829..dba0306c42a5 100644 --- a/sound/soc/codecs/wm8991.c +++ b/sound/soc/codecs/wm8991.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/delay.h> | 18 | #include <linux/delay.h> |
19 | #include <linux/pm.h> | 19 | #include <linux/pm.h> |
20 | #include <linux/i2c.h> | 20 | #include <linux/i2c.h> |
21 | #include <linux/regmap.h> | ||
21 | #include <linux/slab.h> | 22 | #include <linux/slab.h> |
22 | #include <sound/core.h> | 23 | #include <sound/core.h> |
23 | #include <sound/pcm.h> | 24 | #include <sound/pcm.h> |
@@ -31,77 +32,84 @@ | |||
31 | #include "wm8991.h" | 32 | #include "wm8991.h" |
32 | 33 | ||
33 | struct wm8991_priv { | 34 | struct wm8991_priv { |
34 | enum snd_soc_control_type control_type; | 35 | struct regmap *regmap; |
35 | unsigned int pcmclk; | 36 | unsigned int pcmclk; |
36 | }; | 37 | }; |
37 | 38 | ||
38 | static const u16 wm8991_reg_defs[] = { | 39 | static const struct reg_default wm8991_reg_defaults[] = { |
39 | 0x8991, /* R0 - Reset */ | 40 | { 1, 0x0000 }, /* R1 - Power Management (1) */ |
40 | 0x0000, /* R1 - Power Management (1) */ | 41 | { 2, 0x6000 }, /* R2 - Power Management (2) */ |
41 | 0x6000, /* R2 - Power Management (2) */ | 42 | { 3, 0x0000 }, /* R3 - Power Management (3) */ |
42 | 0x0000, /* R3 - Power Management (3) */ | 43 | { 4, 0x4050 }, /* R4 - Audio Interface (1) */ |
43 | 0x4050, /* R4 - Audio Interface (1) */ | 44 | { 5, 0x4000 }, /* R5 - Audio Interface (2) */ |
44 | 0x4000, /* R5 - Audio Interface (2) */ | 45 | { 6, 0x01C8 }, /* R6 - Clocking (1) */ |
45 | 0x01C8, /* R6 - Clocking (1) */ | 46 | { 7, 0x0000 }, /* R7 - Clocking (2) */ |
46 | 0x0000, /* R7 - Clocking (2) */ | 47 | { 8, 0x0040 }, /* R8 - Audio Interface (3) */ |
47 | 0x0040, /* R8 - Audio Interface (3) */ | 48 | { 9, 0x0040 }, /* R9 - Audio Interface (4) */ |
48 | 0x0040, /* R9 - Audio Interface (4) */ | 49 | { 10, 0x0004 }, /* R10 - DAC CTRL */ |
49 | 0x0004, /* R10 - DAC CTRL */ | 50 | { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */ |
50 | 0x00C0, /* R11 - Left DAC Digital Volume */ | 51 | { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */ |
51 | 0x00C0, /* R12 - Right DAC Digital Volume */ | 52 | { 13, 0x0000 }, /* R13 - Digital Side Tone */ |
52 | 0x0000, /* R13 - Digital Side Tone */ | 53 | { 14, 0x0100 }, /* R14 - ADC CTRL */ |
53 | 0x0100, /* R14 - ADC CTRL */ | 54 | { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */ |
54 | 0x00C0, /* R15 - Left ADC Digital Volume */ | 55 | { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */ |
55 | 0x00C0, /* R16 - Right ADC Digital Volume */ | 56 | |
56 | 0x0000, /* R17 */ | 57 | { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */ |
57 | 0x0000, /* R18 - GPIO CTRL 1 */ | 58 | { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */ |
58 | 0x1000, /* R19 - GPIO1 & GPIO2 */ | 59 | { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */ |
59 | 0x1010, /* R20 - GPIO3 & GPIO4 */ | 60 | { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */ |
60 | 0x1010, /* R21 - GPIO5 & GPIO6 */ | 61 | { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */ |
61 | 0x8000, /* R22 - GPIOCTRL 2 */ | 62 | { 23, 0x0800 }, /* R23 - GPIO_POL */ |
62 | 0x0800, /* R23 - GPIO_POL */ | 63 | { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */ |
63 | 0x008B, /* R24 - Left Line Input 1&2 Volume */ | 64 | { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */ |
64 | 0x008B, /* R25 - Left Line Input 3&4 Volume */ | 65 | { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */ |
65 | 0x008B, /* R26 - Right Line Input 1&2 Volume */ | 66 | { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */ |
66 | 0x008B, /* R27 - Right Line Input 3&4 Volume */ | 67 | { 28, 0x0000 }, /* R28 - Left Output Volume */ |
67 | 0x0000, /* R28 - Left Output Volume */ | 68 | { 29, 0x0000 }, /* R29 - Right Output Volume */ |
68 | 0x0000, /* R29 - Right Output Volume */ | 69 | { 30, 0x0066 }, /* R30 - Line Outputs Volume */ |
69 | 0x0066, /* R30 - Line Outputs Volume */ | 70 | { 31, 0x0022 }, /* R31 - Out3/4 Volume */ |
70 | 0x0022, /* R31 - Out3/4 Volume */ | 71 | { 32, 0x0079 }, /* R32 - Left OPGA Volume */ |
71 | 0x0079, /* R32 - Left OPGA Volume */ | 72 | { 33, 0x0079 }, /* R33 - Right OPGA Volume */ |
72 | 0x0079, /* R33 - Right OPGA Volume */ | 73 | { 34, 0x0003 }, /* R34 - Speaker Volume */ |
73 | 0x0003, /* R34 - Speaker Volume */ | 74 | { 35, 0x0003 }, /* R35 - ClassD1 */ |
74 | 0x0003, /* R35 - ClassD1 */ | 75 | |
75 | 0x0000, /* R36 */ | 76 | { 37, 0x0100 }, /* R37 - ClassD3 */ |
76 | 0x0100, /* R37 - ClassD3 */ | 77 | |
77 | 0x0000, /* R38 */ | 78 | { 39, 0x0000 }, /* R39 - Input Mixer1 */ |
78 | 0x0000, /* R39 - Input Mixer1 */ | 79 | { 40, 0x0000 }, /* R40 - Input Mixer2 */ |
79 | 0x0000, /* R40 - Input Mixer2 */ | 80 | { 41, 0x0000 }, /* R41 - Input Mixer3 */ |
80 | 0x0000, /* R41 - Input Mixer3 */ | 81 | { 42, 0x0000 }, /* R42 - Input Mixer4 */ |
81 | 0x0000, /* R42 - Input Mixer4 */ | 82 | { 43, 0x0000 }, /* R43 - Input Mixer5 */ |
82 | 0x0000, /* R43 - Input Mixer5 */ | 83 | { 44, 0x0000 }, /* R44 - Input Mixer6 */ |
83 | 0x0000, /* R44 - Input Mixer6 */ | 84 | { 45, 0x0000 }, /* R45 - Output Mixer1 */ |
84 | 0x0000, /* R45 - Output Mixer1 */ | 85 | { 46, 0x0000 }, /* R46 - Output Mixer2 */ |
85 | 0x0000, /* R46 - Output Mixer2 */ | 86 | { 47, 0x0000 }, /* R47 - Output Mixer3 */ |
86 | 0x0000, /* R47 - Output Mixer3 */ | 87 | { 48, 0x0000 }, /* R48 - Output Mixer4 */ |
87 | 0x0000, /* R48 - Output Mixer4 */ | 88 | { 49, 0x0000 }, /* R49 - Output Mixer5 */ |
88 | 0x0000, /* R49 - Output Mixer5 */ | 89 | { 50, 0x0000 }, /* R50 - Output Mixer6 */ |
89 | 0x0000, /* R50 - Output Mixer6 */ | 90 | { 51, 0x0180 }, /* R51 - Out3/4 Mixer */ |
90 | 0x0180, /* R51 - Out3/4 Mixer */ | 91 | { 52, 0x0000 }, /* R52 - Line Mixer1 */ |
91 | 0x0000, /* R52 - Line Mixer1 */ | 92 | { 53, 0x0000 }, /* R53 - Line Mixer2 */ |
92 | 0x0000, /* R53 - Line Mixer2 */ | 93 | { 54, 0x0000 }, /* R54 - Speaker Mixer */ |
93 | 0x0000, /* R54 - Speaker Mixer */ | 94 | { 55, 0x0000 }, /* R55 - Additional Control */ |
94 | 0x0000, /* R55 - Additional Control */ | 95 | { 56, 0x0000 }, /* R56 - AntiPOP1 */ |
95 | 0x0000, /* R56 - AntiPOP1 */ | 96 | { 57, 0x0000 }, /* R57 - AntiPOP2 */ |
96 | 0x0000, /* R57 - AntiPOP2 */ | 97 | { 58, 0x0000 }, /* R58 - MICBIAS */ |
97 | 0x0000, /* R58 - MICBIAS */ | 98 | |
98 | 0x0000, /* R59 */ | 99 | { 60, 0x0008 }, /* R60 - PLL1 */ |
99 | 0x0008, /* R60 - PLL1 */ | 100 | { 61, 0x0031 }, /* R61 - PLL2 */ |
100 | 0x0031, /* R61 - PLL2 */ | 101 | { 62, 0x0026 }, /* R62 - PLL3 */ |
101 | 0x0026, /* R62 - PLL3 */ | ||
102 | }; | 102 | }; |
103 | 103 | ||
104 | #define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0) | 104 | static bool wm8991_volatile(struct device *dev, unsigned int reg) |
105 | { | ||
106 | switch (reg) { | ||
107 | case WM8991_RESET: | ||
108 | return true; | ||
109 | default: | ||
110 | return false; | ||
111 | } | ||
112 | } | ||
105 | 113 | ||
106 | static const unsigned int rec_mix_tlv[] = { | 114 | static const unsigned int rec_mix_tlv[] = { |
107 | TLV_DB_RANGE_HEAD(1), | 115 | TLV_DB_RANGE_HEAD(1), |
@@ -374,30 +382,6 @@ static const struct snd_kcontrol_new wm8991_snd_controls[] = { | |||
374 | /* | 382 | /* |
375 | * _DAPM_ Controls | 383 | * _DAPM_ Controls |
376 | */ | 384 | */ |
377 | static int inmixer_event(struct snd_soc_dapm_widget *w, | ||
378 | struct snd_kcontrol *kcontrol, int event) | ||
379 | { | ||
380 | u16 reg, fakepower; | ||
381 | |||
382 | reg = snd_soc_read(w->codec, WM8991_POWER_MANAGEMENT_2); | ||
383 | fakepower = snd_soc_read(w->codec, WM8991_INTDRIVBITS); | ||
384 | |||
385 | if (fakepower & ((1 << WM8991_INMIXL_PWR_BIT) | | ||
386 | (1 << WM8991_AINLMUX_PWR_BIT))) | ||
387 | reg |= WM8991_AINL_ENA; | ||
388 | else | ||
389 | reg &= ~WM8991_AINL_ENA; | ||
390 | |||
391 | if (fakepower & ((1 << WM8991_INMIXR_PWR_BIT) | | ||
392 | (1 << WM8991_AINRMUX_PWR_BIT))) | ||
393 | reg |= WM8991_AINR_ENA; | ||
394 | else | ||
395 | reg &= ~WM8991_AINR_ENA; | ||
396 | |||
397 | snd_soc_write(w->codec, WM8991_POWER_MANAGEMENT_2, reg); | ||
398 | return 0; | ||
399 | } | ||
400 | |||
401 | static int outmixer_event(struct snd_soc_dapm_widget *w, | 385 | static int outmixer_event(struct snd_soc_dapm_widget *w, |
402 | struct snd_kcontrol *kcontrol, int event) | 386 | struct snd_kcontrol *kcontrol, int event) |
403 | { | 387 | { |
@@ -655,6 +639,11 @@ static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = { | |||
655 | SND_SOC_DAPM_INPUT("RIN2"), | 639 | SND_SOC_DAPM_INPUT("RIN2"), |
656 | SND_SOC_DAPM_INPUT("Internal ADC Source"), | 640 | SND_SOC_DAPM_INPUT("Internal ADC Source"), |
657 | 641 | ||
642 | SND_SOC_DAPM_SUPPLY("INL", WM8991_POWER_MANAGEMENT_2, | ||
643 | WM8991_AINL_ENA_BIT, 0, NULL, 0), | ||
644 | SND_SOC_DAPM_SUPPLY("INR", WM8991_POWER_MANAGEMENT_2, | ||
645 | WM8991_AINR_ENA_BIT, 0, NULL, 0), | ||
646 | |||
658 | /* DACs */ | 647 | /* DACs */ |
659 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2, | 648 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2, |
660 | WM8991_ADCL_ENA_BIT, 0), | 649 | WM8991_ADCL_ENA_BIT, 0), |
@@ -676,26 +665,22 @@ static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = { | |||
676 | ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)), | 665 | ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)), |
677 | 666 | ||
678 | /* INMIXL */ | 667 | /* INMIXL */ |
679 | SND_SOC_DAPM_MIXER_E("INMIXL", WM8991_INTDRIVBITS, WM8991_INMIXL_PWR_BIT, 0, | 668 | SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0, |
680 | &wm8991_dapm_inmixl_controls[0], | 669 | &wm8991_dapm_inmixl_controls[0], |
681 | ARRAY_SIZE(wm8991_dapm_inmixl_controls), | 670 | ARRAY_SIZE(wm8991_dapm_inmixl_controls)), |
682 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
683 | 671 | ||
684 | /* AINLMUX */ | 672 | /* AINLMUX */ |
685 | SND_SOC_DAPM_MUX_E("AINLMUX", WM8991_INTDRIVBITS, WM8991_AINLMUX_PWR_BIT, 0, | 673 | SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0, |
686 | &wm8991_dapm_ainlmux_controls, inmixer_event, | 674 | &wm8991_dapm_ainlmux_controls), |
687 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
688 | 675 | ||
689 | /* INMIXR */ | 676 | /* INMIXR */ |
690 | SND_SOC_DAPM_MIXER_E("INMIXR", WM8991_INTDRIVBITS, WM8991_INMIXR_PWR_BIT, 0, | 677 | SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0, |
691 | &wm8991_dapm_inmixr_controls[0], | 678 | &wm8991_dapm_inmixr_controls[0], |
692 | ARRAY_SIZE(wm8991_dapm_inmixr_controls), | 679 | ARRAY_SIZE(wm8991_dapm_inmixr_controls)), |
693 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
694 | 680 | ||
695 | /* AINRMUX */ | 681 | /* AINRMUX */ |
696 | SND_SOC_DAPM_MUX_E("AINRMUX", WM8991_INTDRIVBITS, WM8991_AINRMUX_PWR_BIT, 0, | 682 | SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0, |
697 | &wm8991_dapm_ainrmux_controls, inmixer_event, | 683 | &wm8991_dapm_ainrmux_controls), |
698 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
699 | 684 | ||
700 | /* Output Side */ | 685 | /* Output Side */ |
701 | /* DACs */ | 686 | /* DACs */ |
@@ -787,7 +772,7 @@ static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = { | |||
787 | SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), | 772 | SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), |
788 | }; | 773 | }; |
789 | 774 | ||
790 | static const struct snd_soc_dapm_route audio_map[] = { | 775 | static const struct snd_soc_dapm_route wm8991_dapm_routes[] = { |
791 | /* Make DACs turn on when playing even if not mixed into any outputs */ | 776 | /* Make DACs turn on when playing even if not mixed into any outputs */ |
792 | {"Internal DAC Sink", NULL, "Left DAC"}, | 777 | {"Internal DAC Sink", NULL, "Left DAC"}, |
793 | {"Internal DAC Sink", NULL, "Right DAC"}, | 778 | {"Internal DAC Sink", NULL, "Right DAC"}, |
@@ -797,6 +782,10 @@ static const struct snd_soc_dapm_route audio_map[] = { | |||
797 | {"Right ADC", NULL, "Internal ADC Source"}, | 782 | {"Right ADC", NULL, "Internal ADC Source"}, |
798 | 783 | ||
799 | /* Input Side */ | 784 | /* Input Side */ |
785 | {"INMIXL", NULL, "INL"}, | ||
786 | {"AINLMUX", NULL, "INL"}, | ||
787 | {"INMIXR", NULL, "INR"}, | ||
788 | {"AINRMUX", NULL, "INR"}, | ||
800 | /* LIN12 PGA */ | 789 | /* LIN12 PGA */ |
801 | {"LIN12 PGA", "LIN1 Switch", "LIN1"}, | 790 | {"LIN12 PGA", "LIN1 Switch", "LIN1"}, |
802 | {"LIN12 PGA", "LIN2 Switch", "LIN2"}, | 791 | {"LIN12 PGA", "LIN2 Switch", "LIN2"}, |
@@ -1129,6 +1118,7 @@ static int wm8991_mute(struct snd_soc_dai *dai, int mute) | |||
1129 | static int wm8991_set_bias_level(struct snd_soc_codec *codec, | 1118 | static int wm8991_set_bias_level(struct snd_soc_codec *codec, |
1130 | enum snd_soc_bias_level level) | 1119 | enum snd_soc_bias_level level) |
1131 | { | 1120 | { |
1121 | struct wm8991_priv *wm8991 = snd_soc_codec_get_drvdata(codec); | ||
1132 | u16 val; | 1122 | u16 val; |
1133 | 1123 | ||
1134 | switch (level) { | 1124 | switch (level) { |
@@ -1144,7 +1134,7 @@ static int wm8991_set_bias_level(struct snd_soc_codec *codec, | |||
1144 | 1134 | ||
1145 | case SND_SOC_BIAS_STANDBY: | 1135 | case SND_SOC_BIAS_STANDBY: |
1146 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { | 1136 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
1147 | snd_soc_cache_sync(codec); | 1137 | regcache_sync(wm8991->regmap); |
1148 | /* Enable all output discharge bits */ | 1138 | /* Enable all output discharge bits */ |
1149 | snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE | | 1139 | snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE | |
1150 | WM8991_DIS_RLINE | WM8991_DIS_OUT3 | | 1140 | WM8991_DIS_RLINE | WM8991_DIS_OUT3 | |
@@ -1232,7 +1222,7 @@ static int wm8991_set_bias_level(struct snd_soc_codec *codec, | |||
1232 | 1222 | ||
1233 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ | 1223 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ |
1234 | snd_soc_write(codec, WM8991_ANTIPOP2, 0x0); | 1224 | snd_soc_write(codec, WM8991_ANTIPOP2, 0x0); |
1235 | codec->cache_sync = 1; | 1225 | regcache_mark_dirty(wm8991->regmap); |
1236 | break; | 1226 | break; |
1237 | } | 1227 | } |
1238 | 1228 | ||
@@ -1266,44 +1256,14 @@ static int wm8991_probe(struct snd_soc_codec *codec) | |||
1266 | 1256 | ||
1267 | wm8991 = snd_soc_codec_get_drvdata(codec); | 1257 | wm8991 = snd_soc_codec_get_drvdata(codec); |
1268 | 1258 | ||
1269 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8991->control_type); | 1259 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); |
1270 | if (ret < 0) { | 1260 | if (ret < 0) { |
1271 | dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret); | 1261 | dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret); |
1272 | return ret; | 1262 | return ret; |
1273 | } | 1263 | } |
1274 | 1264 | ||
1275 | ret = wm8991_reset(codec); | ||
1276 | if (ret < 0) { | ||
1277 | dev_err(codec->dev, "Failed to issue reset\n"); | ||
1278 | return ret; | ||
1279 | } | ||
1280 | |||
1281 | wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 1265 | wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1282 | 1266 | ||
1283 | snd_soc_update_bits(codec, WM8991_AUDIO_INTERFACE_4, | ||
1284 | WM8991_ALRCGPIO1, WM8991_ALRCGPIO1); | ||
1285 | |||
1286 | snd_soc_update_bits(codec, WM8991_GPIO1_GPIO2, | ||
1287 | WM8991_GPIO1_SEL_MASK, 1); | ||
1288 | |||
1289 | snd_soc_update_bits(codec, WM8991_POWER_MANAGEMENT_1, | ||
1290 | WM8991_VREF_ENA | WM8991_VMID_MODE_MASK, | ||
1291 | WM8991_VREF_ENA | WM8991_VMID_MODE_MASK); | ||
1292 | |||
1293 | snd_soc_update_bits(codec, WM8991_POWER_MANAGEMENT_2, | ||
1294 | WM8991_OPCLK_ENA, WM8991_OPCLK_ENA); | ||
1295 | |||
1296 | snd_soc_write(codec, WM8991_DAC_CTRL, 0); | ||
1297 | snd_soc_write(codec, WM8991_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); | ||
1298 | snd_soc_write(codec, WM8991_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); | ||
1299 | |||
1300 | snd_soc_add_codec_controls(codec, wm8991_snd_controls, | ||
1301 | ARRAY_SIZE(wm8991_snd_controls)); | ||
1302 | |||
1303 | snd_soc_dapm_new_controls(&codec->dapm, wm8991_dapm_widgets, | ||
1304 | ARRAY_SIZE(wm8991_dapm_widgets)); | ||
1305 | snd_soc_dapm_add_routes(&codec->dapm, audio_map, | ||
1306 | ARRAY_SIZE(audio_map)); | ||
1307 | return 0; | 1267 | return 0; |
1308 | } | 1268 | } |
1309 | 1269 | ||
@@ -1352,24 +1312,77 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8991 = { | |||
1352 | .suspend = wm8991_suspend, | 1312 | .suspend = wm8991_suspend, |
1353 | .resume = wm8991_resume, | 1313 | .resume = wm8991_resume, |
1354 | .set_bias_level = wm8991_set_bias_level, | 1314 | .set_bias_level = wm8991_set_bias_level, |
1355 | .reg_cache_size = WM8991_MAX_REGISTER + 1, | 1315 | .controls = wm8991_snd_controls, |
1356 | .reg_word_size = sizeof(u16), | 1316 | .num_controls = ARRAY_SIZE(wm8991_snd_controls), |
1357 | .reg_cache_default = wm8991_reg_defs | 1317 | .dapm_widgets = wm8991_dapm_widgets, |
1318 | .num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets), | ||
1319 | .dapm_routes = wm8991_dapm_routes, | ||
1320 | .num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes), | ||
1321 | }; | ||
1322 | |||
1323 | static const struct regmap_config wm8991_regmap = { | ||
1324 | .reg_bits = 8, | ||
1325 | .val_bits = 16, | ||
1326 | |||
1327 | .max_register = WM8991_PLL3, | ||
1328 | .volatile_reg = wm8991_volatile, | ||
1329 | .reg_defaults = wm8991_reg_defaults, | ||
1330 | .num_reg_defaults = ARRAY_SIZE(wm8991_reg_defaults), | ||
1331 | .cache_type = REGCACHE_RBTREE, | ||
1358 | }; | 1332 | }; |
1359 | 1333 | ||
1360 | static int wm8991_i2c_probe(struct i2c_client *i2c, | 1334 | static int wm8991_i2c_probe(struct i2c_client *i2c, |
1361 | const struct i2c_device_id *id) | 1335 | const struct i2c_device_id *id) |
1362 | { | 1336 | { |
1363 | struct wm8991_priv *wm8991; | 1337 | struct wm8991_priv *wm8991; |
1338 | unsigned int val; | ||
1364 | int ret; | 1339 | int ret; |
1365 | 1340 | ||
1366 | wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL); | 1341 | wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL); |
1367 | if (!wm8991) | 1342 | if (!wm8991) |
1368 | return -ENOMEM; | 1343 | return -ENOMEM; |
1369 | 1344 | ||
1370 | wm8991->control_type = SND_SOC_I2C; | 1345 | wm8991->regmap = devm_regmap_init_i2c(i2c, &wm8991_regmap); |
1346 | if (IS_ERR(wm8991->regmap)) | ||
1347 | return PTR_ERR(wm8991->regmap); | ||
1348 | |||
1371 | i2c_set_clientdata(i2c, wm8991); | 1349 | i2c_set_clientdata(i2c, wm8991); |
1372 | 1350 | ||
1351 | ret = regmap_read(wm8991->regmap, WM8991_RESET, &val); | ||
1352 | if (ret != 0) { | ||
1353 | dev_err(&i2c->dev, "Failed to read device ID: %d\n", ret); | ||
1354 | return ret; | ||
1355 | } | ||
1356 | if (val != 0x8991) { | ||
1357 | dev_err(&i2c->dev, "Device with ID %x is not a WM8991\n", val); | ||
1358 | return -EINVAL; | ||
1359 | } | ||
1360 | |||
1361 | ret = regmap_write(wm8991->regmap, WM8991_RESET, 0); | ||
1362 | if (ret < 0) { | ||
1363 | dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret); | ||
1364 | return ret; | ||
1365 | } | ||
1366 | |||
1367 | regmap_update_bits(wm8991->regmap, WM8991_AUDIO_INTERFACE_4, | ||
1368 | WM8991_ALRCGPIO1, WM8991_ALRCGPIO1); | ||
1369 | |||
1370 | regmap_update_bits(wm8991->regmap, WM8991_GPIO1_GPIO2, | ||
1371 | WM8991_GPIO1_SEL_MASK, 1); | ||
1372 | |||
1373 | regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_1, | ||
1374 | WM8991_VREF_ENA | WM8991_VMID_MODE_MASK, | ||
1375 | WM8991_VREF_ENA | WM8991_VMID_MODE_MASK); | ||
1376 | |||
1377 | regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_2, | ||
1378 | WM8991_OPCLK_ENA, WM8991_OPCLK_ENA); | ||
1379 | |||
1380 | regmap_write(wm8991->regmap, WM8991_DAC_CTRL, 0); | ||
1381 | regmap_write(wm8991->regmap, WM8991_LEFT_OUTPUT_VOLUME, | ||
1382 | 0x50 | (1<<8)); | ||
1383 | regmap_write(wm8991->regmap, WM8991_RIGHT_OUTPUT_VOLUME, | ||
1384 | 0x50 | (1<<8)); | ||
1385 | |||
1373 | ret = snd_soc_register_codec(&i2c->dev, | 1386 | ret = snd_soc_register_codec(&i2c->dev, |
1374 | &soc_codec_dev_wm8991, &wm8991_dai, 1); | 1387 | &soc_codec_dev_wm8991, &wm8991_dai, 1); |
1375 | 1388 | ||
diff --git a/sound/soc/codecs/wm8991.h b/sound/soc/codecs/wm8991.h index 07707d8d7e20..08ed383303c0 100644 --- a/sound/soc/codecs/wm8991.h +++ b/sound/soc/codecs/wm8991.h | |||
@@ -76,7 +76,6 @@ | |||
76 | #define WM8991_PLL1 0x3C | 76 | #define WM8991_PLL1 0x3C |
77 | #define WM8991_PLL2 0x3D | 77 | #define WM8991_PLL2 0x3D |
78 | #define WM8991_PLL3 0x3E | 78 | #define WM8991_PLL3 0x3E |
79 | #define WM8991_INTDRIVBITS 0x3F | ||
80 | 79 | ||
81 | #define WM8991_REGISTER_COUNT 60 | 80 | #define WM8991_REGISTER_COUNT 60 |
82 | #define WM8991_MAX_REGISTER 0x3F | 81 | #define WM8991_MAX_REGISTER 0x3F |
@@ -807,14 +806,6 @@ | |||
807 | */ | 806 | */ |
808 | #define WM8991_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ | 807 | #define WM8991_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ |
809 | 808 | ||
810 | /* | ||
811 | * R63 (0x3F) - Internal Driver Bits | ||
812 | */ | ||
813 | #define WM8991_INMIXL_PWR_BIT 0 | ||
814 | #define WM8991_AINLMUX_PWR_BIT 1 | ||
815 | #define WM8991_INMIXR_PWR_BIT 2 | ||
816 | #define WM8991_AINRMUX_PWR_BIT 3 | ||
817 | |||
818 | #define WM8991_MCLK_DIV 0 | 809 | #define WM8991_MCLK_DIV 0 |
819 | #define WM8991_DACCLK_DIV 1 | 810 | #define WM8991_DACCLK_DIV 1 |
820 | #define WM8991_ADCCLK_DIV 2 | 811 | #define WM8991_ADCCLK_DIV 2 |
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 86426a117b07..b9be9cbc4603 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c | |||
@@ -4077,12 +4077,6 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) | |||
4077 | wm8994_request_irq(wm8994->wm8994, WM8994_IRQ_TEMP_SHUT, | 4077 | wm8994_request_irq(wm8994->wm8994, WM8994_IRQ_TEMP_SHUT, |
4078 | wm8994_temp_shut, "Thermal shutdown", codec); | 4078 | wm8994_temp_shut, "Thermal shutdown", codec); |
4079 | 4079 | ||
4080 | ret = wm8994_request_irq(wm8994->wm8994, WM8994_IRQ_DCS_DONE, | ||
4081 | wm_hubs_dcs_done, "DC servo done", | ||
4082 | &wm8994->hubs); | ||
4083 | if (ret == 0) | ||
4084 | wm8994->hubs.dcs_done_irq = true; | ||
4085 | |||
4086 | switch (control->type) { | 4080 | switch (control->type) { |
4087 | case WM8994: | 4081 | case WM8994: |
4088 | if (wm8994->micdet_irq) { | 4082 | if (wm8994->micdet_irq) { |
@@ -4313,6 +4307,11 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) | |||
4313 | } | 4307 | } |
4314 | 4308 | ||
4315 | wm_hubs_add_analogue_routes(codec, 0, 0); | 4309 | wm_hubs_add_analogue_routes(codec, 0, 0); |
4310 | ret = wm8994_request_irq(wm8994->wm8994, WM8994_IRQ_DCS_DONE, | ||
4311 | wm_hubs_dcs_done, "DC servo done", | ||
4312 | &wm8994->hubs); | ||
4313 | if (ret == 0) | ||
4314 | wm8994->hubs.dcs_done_irq = true; | ||
4316 | snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); | 4315 | snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); |
4317 | 4316 | ||
4318 | switch (control->type) { | 4317 | switch (control->type) { |
diff --git a/sound/soc/codecs/wm8995.c b/sound/soc/codecs/wm8995.c index da2899e6c401..4300caff1783 100644 --- a/sound/soc/codecs/wm8995.c +++ b/sound/soc/codecs/wm8995.c | |||
@@ -2293,7 +2293,7 @@ static struct spi_driver wm8995_spi_driver = { | |||
2293 | }; | 2293 | }; |
2294 | #endif | 2294 | #endif |
2295 | 2295 | ||
2296 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 2296 | #if IS_ENABLED(CONFIG_I2C) |
2297 | static int wm8995_i2c_probe(struct i2c_client *i2c, | 2297 | static int wm8995_i2c_probe(struct i2c_client *i2c, |
2298 | const struct i2c_device_id *id) | 2298 | const struct i2c_device_id *id) |
2299 | { | 2299 | { |
@@ -2350,7 +2350,7 @@ static int __init wm8995_modinit(void) | |||
2350 | { | 2350 | { |
2351 | int ret = 0; | 2351 | int ret = 0; |
2352 | 2352 | ||
2353 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 2353 | #if IS_ENABLED(CONFIG_I2C) |
2354 | ret = i2c_add_driver(&wm8995_i2c_driver); | 2354 | ret = i2c_add_driver(&wm8995_i2c_driver); |
2355 | if (ret) { | 2355 | if (ret) { |
2356 | printk(KERN_ERR "Failed to register wm8995 I2C driver: %d\n", | 2356 | printk(KERN_ERR "Failed to register wm8995 I2C driver: %d\n", |
@@ -2371,7 +2371,7 @@ module_init(wm8995_modinit); | |||
2371 | 2371 | ||
2372 | static void __exit wm8995_exit(void) | 2372 | static void __exit wm8995_exit(void) |
2373 | { | 2373 | { |
2374 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 2374 | #if IS_ENABLED(CONFIG_I2C) |
2375 | i2c_del_driver(&wm8995_i2c_driver); | 2375 | i2c_del_driver(&wm8995_i2c_driver); |
2376 | #endif | 2376 | #endif |
2377 | #if defined(CONFIG_SPI_MASTER) | 2377 | #if defined(CONFIG_SPI_MASTER) |
diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 1392bb3c9254..555115ee2159 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c | |||
@@ -103,8 +103,8 @@ static int wm8997_sysclk_ev(struct snd_soc_dapm_widget *w, | |||
103 | case SND_SOC_DAPM_POST_PMU: | 103 | case SND_SOC_DAPM_POST_PMU: |
104 | if (patch) | 104 | if (patch) |
105 | for (i = 0; i < patch_size; i++) | 105 | for (i = 0; i < patch_size; i++) |
106 | regmap_write(regmap, patch[i].reg, | 106 | regmap_write_async(regmap, patch[i].reg, |
107 | patch[i].def); | 107 | patch[i].def); |
108 | break; | 108 | break; |
109 | default: | 109 | default: |
110 | break; | 110 | break; |
diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c index 630b3d776ec2..0982c1d38ec4 100644 --- a/sound/soc/codecs/wm9081.c +++ b/sound/soc/codecs/wm9081.c | |||
@@ -1326,7 +1326,7 @@ static const struct regmap_config wm9081_regmap = { | |||
1326 | .cache_type = REGCACHE_RBTREE, | 1326 | .cache_type = REGCACHE_RBTREE, |
1327 | }; | 1327 | }; |
1328 | 1328 | ||
1329 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 1329 | #if IS_ENABLED(CONFIG_I2C) |
1330 | static int wm9081_i2c_probe(struct i2c_client *i2c, | 1330 | static int wm9081_i2c_probe(struct i2c_client *i2c, |
1331 | const struct i2c_device_id *id) | 1331 | const struct i2c_device_id *id) |
1332 | { | 1332 | { |
diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 4fbcab63e61f..444626fcab40 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c | |||
@@ -1286,6 +1286,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) | |||
1286 | reg = wm_adsp_region_to_reg(mem, | 1286 | reg = wm_adsp_region_to_reg(mem, |
1287 | reg); | 1287 | reg); |
1288 | reg += offset; | 1288 | reg += offset; |
1289 | break; | ||
1289 | } | 1290 | } |
1290 | } | 1291 | } |
1291 | 1292 | ||
@@ -1468,8 +1469,8 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) | |||
1468 | unsigned int val; | 1469 | unsigned int val; |
1469 | int ret, count; | 1470 | int ret, count; |
1470 | 1471 | ||
1471 | ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, | 1472 | ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL, |
1472 | ADSP2_SYS_ENA, ADSP2_SYS_ENA); | 1473 | ADSP2_SYS_ENA, ADSP2_SYS_ENA); |
1473 | if (ret != 0) | 1474 | if (ret != 0) |
1474 | return ret; | 1475 | return ret; |
1475 | 1476 | ||
@@ -1492,112 +1493,153 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) | |||
1492 | } | 1493 | } |
1493 | 1494 | ||
1494 | adsp_dbg(dsp, "RAM ready after %d polls\n", count); | 1495 | adsp_dbg(dsp, "RAM ready after %d polls\n", count); |
1495 | adsp_info(dsp, "RAM ready after %d polls\n", count); | ||
1496 | 1496 | ||
1497 | return 0; | 1497 | return 0; |
1498 | } | 1498 | } |
1499 | 1499 | ||
1500 | int wm_adsp2_event(struct snd_soc_dapm_widget *w, | 1500 | static void wm_adsp2_boot_work(struct work_struct *work) |
1501 | struct snd_kcontrol *kcontrol, int event) | ||
1502 | { | 1501 | { |
1503 | struct snd_soc_codec *codec = w->codec; | 1502 | struct wm_adsp *dsp = container_of(work, |
1504 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); | 1503 | struct wm_adsp, |
1505 | struct wm_adsp *dsp = &dsps[w->shift]; | 1504 | boot_work); |
1506 | struct wm_adsp_alg_region *alg_region; | ||
1507 | struct wm_coeff_ctl *ctl; | ||
1508 | unsigned int val; | ||
1509 | int ret; | 1505 | int ret; |
1506 | unsigned int val; | ||
1510 | 1507 | ||
1511 | dsp->card = codec->card; | 1508 | /* |
1509 | * For simplicity set the DSP clock rate to be the | ||
1510 | * SYSCLK rate rather than making it configurable. | ||
1511 | */ | ||
1512 | ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); | ||
1513 | if (ret != 0) { | ||
1514 | adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); | ||
1515 | return; | ||
1516 | } | ||
1517 | val = (val & ARIZONA_SYSCLK_FREQ_MASK) | ||
1518 | >> ARIZONA_SYSCLK_FREQ_SHIFT; | ||
1512 | 1519 | ||
1513 | switch (event) { | 1520 | ret = regmap_update_bits_async(dsp->regmap, |
1514 | case SND_SOC_DAPM_POST_PMU: | 1521 | dsp->base + ADSP2_CLOCKING, |
1515 | /* | 1522 | ADSP2_CLK_SEL_MASK, val); |
1516 | * For simplicity set the DSP clock rate to be the | 1523 | if (ret != 0) { |
1517 | * SYSCLK rate rather than making it configurable. | 1524 | adsp_err(dsp, "Failed to set clock rate: %d\n", ret); |
1518 | */ | 1525 | return; |
1519 | ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); | 1526 | } |
1520 | if (ret != 0) { | ||
1521 | adsp_err(dsp, "Failed to read SYSCLK state: %d\n", | ||
1522 | ret); | ||
1523 | return ret; | ||
1524 | } | ||
1525 | val = (val & ARIZONA_SYSCLK_FREQ_MASK) | ||
1526 | >> ARIZONA_SYSCLK_FREQ_SHIFT; | ||
1527 | 1527 | ||
1528 | ret = regmap_update_bits(dsp->regmap, | 1528 | if (dsp->dvfs) { |
1529 | dsp->base + ADSP2_CLOCKING, | 1529 | ret = regmap_read(dsp->regmap, |
1530 | ADSP2_CLK_SEL_MASK, val); | 1530 | dsp->base + ADSP2_CLOCKING, &val); |
1531 | if (ret != 0) { | 1531 | if (ret != 0) { |
1532 | adsp_err(dsp, "Failed to set clock rate: %d\n", | 1532 | dev_err(dsp->dev, "Failed to read clocking: %d\n", ret); |
1533 | ret); | 1533 | return; |
1534 | return ret; | ||
1535 | } | 1534 | } |
1536 | 1535 | ||
1537 | if (dsp->dvfs) { | 1536 | if ((val & ADSP2_CLK_SEL_MASK) >= 3) { |
1538 | ret = regmap_read(dsp->regmap, | 1537 | ret = regulator_enable(dsp->dvfs); |
1539 | dsp->base + ADSP2_CLOCKING, &val); | ||
1540 | if (ret != 0) { | 1538 | if (ret != 0) { |
1541 | dev_err(dsp->dev, | 1539 | dev_err(dsp->dev, |
1542 | "Failed to read clocking: %d\n", ret); | 1540 | "Failed to enable supply: %d\n", |
1543 | return ret; | 1541 | ret); |
1542 | return; | ||
1544 | } | 1543 | } |
1545 | 1544 | ||
1546 | if ((val & ADSP2_CLK_SEL_MASK) >= 3) { | 1545 | ret = regulator_set_voltage(dsp->dvfs, |
1547 | ret = regulator_enable(dsp->dvfs); | 1546 | 1800000, |
1548 | if (ret != 0) { | 1547 | 1800000); |
1549 | dev_err(dsp->dev, | 1548 | if (ret != 0) { |
1550 | "Failed to enable supply: %d\n", | 1549 | dev_err(dsp->dev, |
1551 | ret); | 1550 | "Failed to raise supply: %d\n", |
1552 | return ret; | 1551 | ret); |
1553 | } | 1552 | return; |
1554 | |||
1555 | ret = regulator_set_voltage(dsp->dvfs, | ||
1556 | 1800000, | ||
1557 | 1800000); | ||
1558 | if (ret != 0) { | ||
1559 | dev_err(dsp->dev, | ||
1560 | "Failed to raise supply: %d\n", | ||
1561 | ret); | ||
1562 | return ret; | ||
1563 | } | ||
1564 | } | 1553 | } |
1565 | } | 1554 | } |
1555 | } | ||
1566 | 1556 | ||
1567 | ret = wm_adsp2_ena(dsp); | 1557 | ret = wm_adsp2_ena(dsp); |
1568 | if (ret != 0) | 1558 | if (ret != 0) |
1569 | return ret; | 1559 | return; |
1570 | 1560 | ||
1571 | ret = wm_adsp_load(dsp); | 1561 | ret = wm_adsp_load(dsp); |
1572 | if (ret != 0) | 1562 | if (ret != 0) |
1573 | goto err; | 1563 | goto err; |
1574 | 1564 | ||
1575 | ret = wm_adsp_setup_algs(dsp); | 1565 | ret = wm_adsp_setup_algs(dsp); |
1576 | if (ret != 0) | 1566 | if (ret != 0) |
1577 | goto err; | 1567 | goto err; |
1578 | 1568 | ||
1579 | ret = wm_adsp_load_coeff(dsp); | 1569 | ret = wm_adsp_load_coeff(dsp); |
1580 | if (ret != 0) | 1570 | if (ret != 0) |
1581 | goto err; | 1571 | goto err; |
1582 | 1572 | ||
1583 | /* Initialize caches for enabled and unset controls */ | 1573 | /* Initialize caches for enabled and unset controls */ |
1584 | ret = wm_coeff_init_control_caches(dsp); | 1574 | ret = wm_coeff_init_control_caches(dsp); |
1585 | if (ret != 0) | 1575 | if (ret != 0) |
1586 | goto err; | 1576 | goto err; |
1587 | 1577 | ||
1588 | /* Sync set controls */ | 1578 | /* Sync set controls */ |
1589 | ret = wm_coeff_sync_controls(dsp); | 1579 | ret = wm_coeff_sync_controls(dsp); |
1590 | if (ret != 0) | 1580 | if (ret != 0) |
1591 | goto err; | 1581 | goto err; |
1582 | |||
1583 | ret = regmap_update_bits_async(dsp->regmap, | ||
1584 | dsp->base + ADSP2_CONTROL, | ||
1585 | ADSP2_CORE_ENA, | ||
1586 | ADSP2_CORE_ENA); | ||
1587 | if (ret != 0) | ||
1588 | goto err; | ||
1589 | |||
1590 | dsp->running = true; | ||
1591 | |||
1592 | return; | ||
1593 | |||
1594 | err: | ||
1595 | regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, | ||
1596 | ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); | ||
1597 | } | ||
1598 | |||
1599 | int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, | ||
1600 | struct snd_kcontrol *kcontrol, int event) | ||
1601 | { | ||
1602 | struct snd_soc_codec *codec = w->codec; | ||
1603 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); | ||
1604 | struct wm_adsp *dsp = &dsps[w->shift]; | ||
1605 | |||
1606 | dsp->card = codec->card; | ||
1607 | |||
1608 | switch (event) { | ||
1609 | case SND_SOC_DAPM_PRE_PMU: | ||
1610 | queue_work(system_unbound_wq, &dsp->boot_work); | ||
1611 | break; | ||
1612 | default: | ||
1613 | break; | ||
1614 | }; | ||
1615 | |||
1616 | return 0; | ||
1617 | } | ||
1618 | EXPORT_SYMBOL_GPL(wm_adsp2_early_event); | ||
1619 | |||
1620 | int wm_adsp2_event(struct snd_soc_dapm_widget *w, | ||
1621 | struct snd_kcontrol *kcontrol, int event) | ||
1622 | { | ||
1623 | struct snd_soc_codec *codec = w->codec; | ||
1624 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); | ||
1625 | struct wm_adsp *dsp = &dsps[w->shift]; | ||
1626 | struct wm_adsp_alg_region *alg_region; | ||
1627 | struct wm_coeff_ctl *ctl; | ||
1628 | int ret; | ||
1629 | |||
1630 | switch (event) { | ||
1631 | case SND_SOC_DAPM_POST_PMU: | ||
1632 | flush_work(&dsp->boot_work); | ||
1633 | |||
1634 | if (!dsp->running) | ||
1635 | return -EIO; | ||
1592 | 1636 | ||
1593 | ret = regmap_update_bits(dsp->regmap, | 1637 | ret = regmap_update_bits(dsp->regmap, |
1594 | dsp->base + ADSP2_CONTROL, | 1638 | dsp->base + ADSP2_CONTROL, |
1595 | ADSP2_CORE_ENA | ADSP2_START, | 1639 | ADSP2_START, |
1596 | ADSP2_CORE_ENA | ADSP2_START); | 1640 | ADSP2_START); |
1597 | if (ret != 0) | 1641 | if (ret != 0) |
1598 | goto err; | 1642 | goto err; |
1599 | |||
1600 | dsp->running = true; | ||
1601 | break; | 1643 | break; |
1602 | 1644 | ||
1603 | case SND_SOC_DAPM_PRE_PMD: | 1645 | case SND_SOC_DAPM_PRE_PMD: |
@@ -1668,6 +1710,7 @@ int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) | |||
1668 | 1710 | ||
1669 | INIT_LIST_HEAD(&adsp->alg_regions); | 1711 | INIT_LIST_HEAD(&adsp->alg_regions); |
1670 | INIT_LIST_HEAD(&adsp->ctl_list); | 1712 | INIT_LIST_HEAD(&adsp->ctl_list); |
1713 | INIT_WORK(&adsp->boot_work, wm_adsp2_boot_work); | ||
1671 | 1714 | ||
1672 | if (dvfs) { | 1715 | if (dvfs) { |
1673 | adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); | 1716 | adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); |
diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index d018dea6254d..a4f6b64deb61 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h | |||
@@ -59,6 +59,8 @@ struct wm_adsp { | |||
59 | struct regulator *dvfs; | 59 | struct regulator *dvfs; |
60 | 60 | ||
61 | struct list_head ctl_list; | 61 | struct list_head ctl_list; |
62 | |||
63 | struct work_struct boot_work; | ||
62 | }; | 64 | }; |
63 | 65 | ||
64 | #define WM_ADSP1(wname, num) \ | 66 | #define WM_ADSP1(wname, num) \ |
@@ -66,8 +68,12 @@ struct wm_adsp { | |||
66 | wm_adsp1_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD) | 68 | wm_adsp1_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD) |
67 | 69 | ||
68 | #define WM_ADSP2(wname, num) \ | 70 | #define WM_ADSP2(wname, num) \ |
69 | SND_SOC_DAPM_PGA_E(wname, SND_SOC_NOPM, num, 0, NULL, 0, \ | 71 | { .id = snd_soc_dapm_dai_link, .name = wname " Preloader", \ |
70 | wm_adsp2_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD) | 72 | .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_early_event, \ |
73 | .event_flags = SND_SOC_DAPM_PRE_PMU }, \ | ||
74 | { .id = snd_soc_dapm_out_drv, .name = wname, \ | ||
75 | .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_event, \ | ||
76 | .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } | ||
71 | 77 | ||
72 | extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; | 78 | extern const struct snd_kcontrol_new wm_adsp1_fw_controls[]; |
73 | extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; | 79 | extern const struct snd_kcontrol_new wm_adsp2_fw_controls[]; |
@@ -76,6 +82,8 @@ int wm_adsp1_init(struct wm_adsp *adsp); | |||
76 | int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs); | 82 | int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs); |
77 | int wm_adsp1_event(struct snd_soc_dapm_widget *w, | 83 | int wm_adsp1_event(struct snd_soc_dapm_widget *w, |
78 | struct snd_kcontrol *kcontrol, int event); | 84 | struct snd_kcontrol *kcontrol, int event); |
85 | int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, | ||
86 | struct snd_kcontrol *kcontrol, int event); | ||
79 | int wm_adsp2_event(struct snd_soc_dapm_widget *w, | 87 | int wm_adsp2_event(struct snd_soc_dapm_widget *w, |
80 | struct snd_kcontrol *kcontrol, int event); | 88 | struct snd_kcontrol *kcontrol, int event); |
81 | 89 | ||
diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig index 95970f5db3ec..a8ec1fc3e4d0 100644 --- a/sound/soc/davinci/Kconfig +++ b/sound/soc/davinci/Kconfig | |||
@@ -1,11 +1,6 @@ | |||
1 | config SND_DAVINCI_SOC | 1 | config SND_DAVINCI_SOC |
2 | tristate "SoC Audio for the TI DAVINCI or AM33XX chip" | 2 | tristate "SoC Audio for TI DAVINCI or AM33XX/AM43XX chips" |
3 | depends on ARCH_DAVINCI || SOC_AM33XX | 3 | depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX |
4 | help | ||
5 | Platform driver for daVinci or AM33xx | ||
6 | Say Y or M if you want to add support for codecs attached to | ||
7 | the DAVINCI AC97, I2S, or McASP interface. You will also need | ||
8 | to select the audio interfaces to support below. | ||
9 | 4 | ||
10 | config SND_DAVINCI_SOC_I2S | 5 | config SND_DAVINCI_SOC_I2S |
11 | tristate | 6 | tristate |
@@ -16,11 +11,15 @@ config SND_DAVINCI_SOC_MCASP | |||
16 | config SND_DAVINCI_SOC_VCIF | 11 | config SND_DAVINCI_SOC_VCIF |
17 | tristate | 12 | tristate |
18 | 13 | ||
14 | config SND_DAVINCI_SOC_GENERIC_EVM | ||
15 | tristate | ||
16 | select SND_SOC_TLV320AIC3X | ||
17 | select SND_DAVINCI_SOC_MCASP | ||
18 | |||
19 | config SND_AM33XX_SOC_EVM | 19 | config SND_AM33XX_SOC_EVM |
20 | tristate "SoC Audio for the AM33XX chip based boards" | 20 | tristate "SoC Audio for the AM33XX chip based boards" |
21 | depends on SND_DAVINCI_SOC && SOC_AM33XX | 21 | depends on SND_DAVINCI_SOC && SOC_AM33XX |
22 | select SND_SOC_TLV320AIC3X | 22 | select SND_DAVINCI_SOC_GENERIC_EVM |
23 | select SND_DAVINCI_SOC_MCASP | ||
24 | help | 23 | help |
25 | Say Y or M if you want to add support for SoC audio on AM33XX | 24 | Say Y or M if you want to add support for SoC audio on AM33XX |
26 | boards using McASP and TLV320AIC3X codec. For example AM335X-EVM, | 25 | boards using McASP and TLV320AIC3X codec. For example AM335X-EVM, |
@@ -31,8 +30,7 @@ config SND_DAVINCI_SOC_EVM | |||
31 | tristate "SoC Audio support for DaVinci DM6446, DM355 or DM365 EVM" | 30 | tristate "SoC Audio support for DaVinci DM6446, DM355 or DM365 EVM" |
32 | depends on SND_DAVINCI_SOC | 31 | depends on SND_DAVINCI_SOC |
33 | depends on MACH_DAVINCI_EVM || MACH_DAVINCI_DM355_EVM || MACH_DAVINCI_DM365_EVM | 32 | depends on MACH_DAVINCI_EVM || MACH_DAVINCI_DM355_EVM || MACH_DAVINCI_DM365_EVM |
34 | select SND_DAVINCI_SOC_I2S | 33 | select SND_DAVINCI_SOC_GENERIC_EVM |
35 | select SND_SOC_TLV320AIC3X | ||
36 | help | 34 | help |
37 | Say Y if you want to add support for SoC audio on TI | 35 | Say Y if you want to add support for SoC audio on TI |
38 | DaVinci DM6446, DM355 or DM365 EVM platforms. | 36 | DaVinci DM6446, DM355 or DM365 EVM platforms. |
@@ -59,8 +57,7 @@ endchoice | |||
59 | config SND_DM6467_SOC_EVM | 57 | config SND_DM6467_SOC_EVM |
60 | tristate "SoC Audio support for DaVinci DM6467 EVM" | 58 | tristate "SoC Audio support for DaVinci DM6467 EVM" |
61 | depends on SND_DAVINCI_SOC && MACH_DAVINCI_DM6467_EVM | 59 | depends on SND_DAVINCI_SOC && MACH_DAVINCI_DM6467_EVM |
62 | select SND_DAVINCI_SOC_MCASP | 60 | select SND_DAVINCI_SOC_GENERIC_EVM |
63 | select SND_SOC_TLV320AIC3X | ||
64 | select SND_SOC_SPDIF | 61 | select SND_SOC_SPDIF |
65 | 62 | ||
66 | help | 63 | help |
@@ -69,8 +66,7 @@ config SND_DM6467_SOC_EVM | |||
69 | config SND_DA830_SOC_EVM | 66 | config SND_DA830_SOC_EVM |
70 | tristate "SoC Audio support for DA830/OMAP-L137 EVM" | 67 | tristate "SoC Audio support for DA830/OMAP-L137 EVM" |
71 | depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA830_EVM | 68 | depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA830_EVM |
72 | select SND_DAVINCI_SOC_MCASP | 69 | select SND_DAVINCI_SOC_GENERIC_EVM |
73 | select SND_SOC_TLV320AIC3X | ||
74 | 70 | ||
75 | help | 71 | help |
76 | Say Y if you want to add support for SoC audio on TI | 72 | Say Y if you want to add support for SoC audio on TI |
@@ -79,8 +75,7 @@ config SND_DA830_SOC_EVM | |||
79 | config SND_DA850_SOC_EVM | 75 | config SND_DA850_SOC_EVM |
80 | tristate "SoC Audio support for DA850/OMAP-L138 EVM" | 76 | tristate "SoC Audio support for DA850/OMAP-L138 EVM" |
81 | depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA850_EVM | 77 | depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA850_EVM |
82 | select SND_DAVINCI_SOC_MCASP | 78 | select SND_DAVINCI_SOC_GENERIC_EVM |
83 | select SND_SOC_TLV320AIC3X | ||
84 | help | 79 | help |
85 | Say Y if you want to add support for SoC audio on TI | 80 | Say Y if you want to add support for SoC audio on TI |
86 | DA850/OMAP-L138 EVM | 81 | DA850/OMAP-L138 EVM |
diff --git a/sound/soc/davinci/Makefile b/sound/soc/davinci/Makefile index bc81e79fc301..744d4d9a0184 100644 --- a/sound/soc/davinci/Makefile +++ b/sound/soc/davinci/Makefile | |||
@@ -9,11 +9,7 @@ obj-$(CONFIG_SND_DAVINCI_SOC_I2S) += snd-soc-davinci-i2s.o | |||
9 | obj-$(CONFIG_SND_DAVINCI_SOC_MCASP) += snd-soc-davinci-mcasp.o | 9 | obj-$(CONFIG_SND_DAVINCI_SOC_MCASP) += snd-soc-davinci-mcasp.o |
10 | obj-$(CONFIG_SND_DAVINCI_SOC_VCIF) += snd-soc-davinci-vcif.o | 10 | obj-$(CONFIG_SND_DAVINCI_SOC_VCIF) += snd-soc-davinci-vcif.o |
11 | 11 | ||
12 | # DAVINCI Machine Support | 12 | # Generic DAVINCI/AM33xx Machine Support |
13 | snd-soc-evm-objs := davinci-evm.o | 13 | snd-soc-evm-objs := davinci-evm.o |
14 | 14 | ||
15 | obj-$(CONFIG_SND_DAVINCI_SOC_EVM) += snd-soc-evm.o | 15 | obj-$(CONFIG_SND_DAVINCI_SOC_GENERIC_EVM) += snd-soc-evm.o |
16 | obj-$(CONFIG_SND_AM33XX_SOC_EVM) += snd-soc-evm.o | ||
17 | obj-$(CONFIG_SND_DM6467_SOC_EVM) += snd-soc-evm.o | ||
18 | obj-$(CONFIG_SND_DA830_SOC_EVM) += snd-soc-evm.o | ||
19 | obj-$(CONFIG_SND_DA850_SOC_EVM) += snd-soc-evm.o | ||
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c index 623eb5e7c089..70ff3772079f 100644 --- a/sound/soc/davinci/davinci-evm.c +++ b/sound/soc/davinci/davinci-evm.c | |||
@@ -28,14 +28,11 @@ | |||
28 | 28 | ||
29 | #include "davinci-pcm.h" | 29 | #include "davinci-pcm.h" |
30 | #include "davinci-i2s.h" | 30 | #include "davinci-i2s.h" |
31 | #include "davinci-mcasp.h" | ||
32 | 31 | ||
33 | struct snd_soc_card_drvdata_davinci { | 32 | struct snd_soc_card_drvdata_davinci { |
34 | unsigned sysclk; | 33 | unsigned sysclk; |
35 | }; | 34 | }; |
36 | 35 | ||
37 | #define AUDIO_FORMAT (SND_SOC_DAIFMT_DSP_B | \ | ||
38 | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF) | ||
39 | static int evm_hw_params(struct snd_pcm_substream *substream, | 36 | static int evm_hw_params(struct snd_pcm_substream *substream, |
40 | struct snd_pcm_hw_params *params) | 37 | struct snd_pcm_hw_params *params) |
41 | { | 38 | { |
@@ -48,16 +45,6 @@ static int evm_hw_params(struct snd_pcm_substream *substream, | |||
48 | unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *) | 45 | unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *) |
49 | snd_soc_card_get_drvdata(soc_card))->sysclk; | 46 | snd_soc_card_get_drvdata(soc_card))->sysclk; |
50 | 47 | ||
51 | /* set codec DAI configuration */ | ||
52 | ret = snd_soc_dai_set_fmt(codec_dai, AUDIO_FORMAT); | ||
53 | if (ret < 0) | ||
54 | return ret; | ||
55 | |||
56 | /* set cpu DAI configuration */ | ||
57 | ret = snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT); | ||
58 | if (ret < 0) | ||
59 | return ret; | ||
60 | |||
61 | /* set the codec system clock */ | 48 | /* set the codec system clock */ |
62 | ret = snd_soc_dai_set_sysclk(codec_dai, 0, sysclk, SND_SOC_CLOCK_OUT); | 49 | ret = snd_soc_dai_set_sysclk(codec_dai, 0, sysclk, SND_SOC_CLOCK_OUT); |
63 | if (ret < 0) | 50 | if (ret < 0) |
@@ -71,24 +58,10 @@ static int evm_hw_params(struct snd_pcm_substream *substream, | |||
71 | return 0; | 58 | return 0; |
72 | } | 59 | } |
73 | 60 | ||
74 | static int evm_spdif_hw_params(struct snd_pcm_substream *substream, | ||
75 | struct snd_pcm_hw_params *params) | ||
76 | { | ||
77 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
78 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | ||
79 | |||
80 | /* set cpu DAI configuration */ | ||
81 | return snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT); | ||
82 | } | ||
83 | |||
84 | static struct snd_soc_ops evm_ops = { | 61 | static struct snd_soc_ops evm_ops = { |
85 | .hw_params = evm_hw_params, | 62 | .hw_params = evm_hw_params, |
86 | }; | 63 | }; |
87 | 64 | ||
88 | static struct snd_soc_ops evm_spdif_ops = { | ||
89 | .hw_params = evm_spdif_hw_params, | ||
90 | }; | ||
91 | |||
92 | /* davinci-evm machine dapm widgets */ | 65 | /* davinci-evm machine dapm widgets */ |
93 | static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { | 66 | static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { |
94 | SND_SOC_DAPM_HP("Headphone Jack", NULL), | 67 | SND_SOC_DAPM_HP("Headphone Jack", NULL), |
@@ -165,6 +138,8 @@ static struct snd_soc_dai_link dm6446_evm_dai = { | |||
165 | .platform_name = "davinci-mcbsp", | 138 | .platform_name = "davinci-mcbsp", |
166 | .init = evm_aic3x_init, | 139 | .init = evm_aic3x_init, |
167 | .ops = &evm_ops, | 140 | .ops = &evm_ops, |
141 | .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | | ||
142 | SND_SOC_DAIFMT_IB_NF, | ||
168 | }; | 143 | }; |
169 | 144 | ||
170 | static struct snd_soc_dai_link dm355_evm_dai = { | 145 | static struct snd_soc_dai_link dm355_evm_dai = { |
@@ -176,6 +151,8 @@ static struct snd_soc_dai_link dm355_evm_dai = { | |||
176 | .platform_name = "davinci-mcbsp.1", | 151 | .platform_name = "davinci-mcbsp.1", |
177 | .init = evm_aic3x_init, | 152 | .init = evm_aic3x_init, |
178 | .ops = &evm_ops, | 153 | .ops = &evm_ops, |
154 | .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | | ||
155 | SND_SOC_DAIFMT_IB_NF, | ||
179 | }; | 156 | }; |
180 | 157 | ||
181 | static struct snd_soc_dai_link dm365_evm_dai = { | 158 | static struct snd_soc_dai_link dm365_evm_dai = { |
@@ -184,10 +161,12 @@ static struct snd_soc_dai_link dm365_evm_dai = { | |||
184 | .stream_name = "AIC3X", | 161 | .stream_name = "AIC3X", |
185 | .cpu_dai_name = "davinci-mcbsp", | 162 | .cpu_dai_name = "davinci-mcbsp", |
186 | .codec_dai_name = "tlv320aic3x-hifi", | 163 | .codec_dai_name = "tlv320aic3x-hifi", |
187 | .init = evm_aic3x_init, | ||
188 | .codec_name = "tlv320aic3x-codec.1-0018", | 164 | .codec_name = "tlv320aic3x-codec.1-0018", |
189 | .ops = &evm_ops, | ||
190 | .platform_name = "davinci-mcbsp", | 165 | .platform_name = "davinci-mcbsp", |
166 | .init = evm_aic3x_init, | ||
167 | .ops = &evm_ops, | ||
168 | .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | | ||
169 | SND_SOC_DAIFMT_IB_NF, | ||
191 | #elif defined(CONFIG_SND_DM365_VOICE_CODEC) | 170 | #elif defined(CONFIG_SND_DM365_VOICE_CODEC) |
192 | .name = "Voice Codec - CQ93VC", | 171 | .name = "Voice Codec - CQ93VC", |
193 | .stream_name = "CQ93", | 172 | .stream_name = "CQ93", |
@@ -208,6 +187,8 @@ static struct snd_soc_dai_link dm6467_evm_dai[] = { | |||
208 | .codec_name = "tlv320aic3x-codec.0-001a", | 187 | .codec_name = "tlv320aic3x-codec.0-001a", |
209 | .init = evm_aic3x_init, | 188 | .init = evm_aic3x_init, |
210 | .ops = &evm_ops, | 189 | .ops = &evm_ops, |
190 | .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | | ||
191 | SND_SOC_DAIFMT_IB_NF, | ||
211 | }, | 192 | }, |
212 | { | 193 | { |
213 | .name = "McASP", | 194 | .name = "McASP", |
@@ -216,7 +197,8 @@ static struct snd_soc_dai_link dm6467_evm_dai[] = { | |||
216 | .codec_dai_name = "dit-hifi", | 197 | .codec_dai_name = "dit-hifi", |
217 | .codec_name = "spdif_dit", | 198 | .codec_name = "spdif_dit", |
218 | .platform_name = "davinci-mcasp.1", | 199 | .platform_name = "davinci-mcasp.1", |
219 | .ops = &evm_spdif_ops, | 200 | .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | |
201 | SND_SOC_DAIFMT_IB_NF, | ||
220 | }, | 202 | }, |
221 | }; | 203 | }; |
222 | 204 | ||
@@ -229,6 +211,8 @@ static struct snd_soc_dai_link da830_evm_dai = { | |||
229 | .platform_name = "davinci-mcasp.1", | 211 | .platform_name = "davinci-mcasp.1", |
230 | .init = evm_aic3x_init, | 212 | .init = evm_aic3x_init, |
231 | .ops = &evm_ops, | 213 | .ops = &evm_ops, |
214 | .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | | ||
215 | SND_SOC_DAIFMT_IB_NF, | ||
232 | }; | 216 | }; |
233 | 217 | ||
234 | static struct snd_soc_dai_link da850_evm_dai = { | 218 | static struct snd_soc_dai_link da850_evm_dai = { |
@@ -240,6 +224,8 @@ static struct snd_soc_dai_link da850_evm_dai = { | |||
240 | .platform_name = "davinci-mcasp.0", | 224 | .platform_name = "davinci-mcasp.0", |
241 | .init = evm_aic3x_init, | 225 | .init = evm_aic3x_init, |
242 | .ops = &evm_ops, | 226 | .ops = &evm_ops, |
227 | .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | | ||
228 | SND_SOC_DAIFMT_IB_NF, | ||
243 | }; | 229 | }; |
244 | 230 | ||
245 | /* davinci dm6446 evm audio machine driver */ | 231 | /* davinci dm6446 evm audio machine driver */ |
@@ -336,6 +322,8 @@ static struct snd_soc_dai_link evm_dai_tlv320aic3x = { | |||
336 | .codec_dai_name = "tlv320aic3x-hifi", | 322 | .codec_dai_name = "tlv320aic3x-hifi", |
337 | .ops = &evm_ops, | 323 | .ops = &evm_ops, |
338 | .init = evm_aic3x_init, | 324 | .init = evm_aic3x_init, |
325 | .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM | | ||
326 | SND_SOC_DAIFMT_IB_NF, | ||
339 | }; | 327 | }; |
340 | 328 | ||
341 | static const struct of_device_id davinci_evm_dt_ids[] = { | 329 | static const struct of_device_id davinci_evm_dt_ids[] = { |
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 71e14bb3a8cd..b7858bfa0295 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/slab.h> | 21 | #include <linux/slab.h> |
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/clk.h> | ||
24 | #include <linux/pm_runtime.h> | 25 | #include <linux/pm_runtime.h> |
25 | #include <linux/of.h> | 26 | #include <linux/of.h> |
26 | #include <linux/of_platform.h> | 27 | #include <linux/of_platform.h> |
@@ -31,351 +32,147 @@ | |||
31 | #include <sound/pcm_params.h> | 32 | #include <sound/pcm_params.h> |
32 | #include <sound/initval.h> | 33 | #include <sound/initval.h> |
33 | #include <sound/soc.h> | 34 | #include <sound/soc.h> |
35 | #include <sound/dmaengine_pcm.h> | ||
34 | 36 | ||
35 | #include "davinci-pcm.h" | 37 | #include "davinci-pcm.h" |
36 | #include "davinci-mcasp.h" | 38 | #include "davinci-mcasp.h" |
37 | 39 | ||
38 | /* | 40 | struct davinci_mcasp { |
39 | * McASP register definitions | 41 | struct davinci_pcm_dma_params dma_params[2]; |
40 | */ | 42 | struct snd_dmaengine_dai_dma_data dma_data[2]; |
41 | #define DAVINCI_MCASP_PID_REG 0x00 | 43 | void __iomem *base; |
42 | #define DAVINCI_MCASP_PWREMUMGT_REG 0x04 | 44 | u32 fifo_base; |
43 | 45 | struct device *dev; | |
44 | #define DAVINCI_MCASP_PFUNC_REG 0x10 | ||
45 | #define DAVINCI_MCASP_PDIR_REG 0x14 | ||
46 | #define DAVINCI_MCASP_PDOUT_REG 0x18 | ||
47 | #define DAVINCI_MCASP_PDSET_REG 0x1c | ||
48 | |||
49 | #define DAVINCI_MCASP_PDCLR_REG 0x20 | ||
50 | |||
51 | #define DAVINCI_MCASP_TLGC_REG 0x30 | ||
52 | #define DAVINCI_MCASP_TLMR_REG 0x34 | ||
53 | |||
54 | #define DAVINCI_MCASP_GBLCTL_REG 0x44 | ||
55 | #define DAVINCI_MCASP_AMUTE_REG 0x48 | ||
56 | #define DAVINCI_MCASP_LBCTL_REG 0x4c | ||
57 | |||
58 | #define DAVINCI_MCASP_TXDITCTL_REG 0x50 | ||
59 | |||
60 | #define DAVINCI_MCASP_GBLCTLR_REG 0x60 | ||
61 | #define DAVINCI_MCASP_RXMASK_REG 0x64 | ||
62 | #define DAVINCI_MCASP_RXFMT_REG 0x68 | ||
63 | #define DAVINCI_MCASP_RXFMCTL_REG 0x6c | ||
64 | |||
65 | #define DAVINCI_MCASP_ACLKRCTL_REG 0x70 | ||
66 | #define DAVINCI_MCASP_AHCLKRCTL_REG 0x74 | ||
67 | #define DAVINCI_MCASP_RXTDM_REG 0x78 | ||
68 | #define DAVINCI_MCASP_EVTCTLR_REG 0x7c | ||
69 | |||
70 | #define DAVINCI_MCASP_RXSTAT_REG 0x80 | ||
71 | #define DAVINCI_MCASP_RXTDMSLOT_REG 0x84 | ||
72 | #define DAVINCI_MCASP_RXCLKCHK_REG 0x88 | ||
73 | #define DAVINCI_MCASP_REVTCTL_REG 0x8c | ||
74 | |||
75 | #define DAVINCI_MCASP_GBLCTLX_REG 0xa0 | ||
76 | #define DAVINCI_MCASP_TXMASK_REG 0xa4 | ||
77 | #define DAVINCI_MCASP_TXFMT_REG 0xa8 | ||
78 | #define DAVINCI_MCASP_TXFMCTL_REG 0xac | ||
79 | |||
80 | #define DAVINCI_MCASP_ACLKXCTL_REG 0xb0 | ||
81 | #define DAVINCI_MCASP_AHCLKXCTL_REG 0xb4 | ||
82 | #define DAVINCI_MCASP_TXTDM_REG 0xb8 | ||
83 | #define DAVINCI_MCASP_EVTCTLX_REG 0xbc | ||
84 | |||
85 | #define DAVINCI_MCASP_TXSTAT_REG 0xc0 | ||
86 | #define DAVINCI_MCASP_TXTDMSLOT_REG 0xc4 | ||
87 | #define DAVINCI_MCASP_TXCLKCHK_REG 0xc8 | ||
88 | #define DAVINCI_MCASP_XEVTCTL_REG 0xcc | ||
89 | |||
90 | /* Left(even TDM Slot) Channel Status Register File */ | ||
91 | #define DAVINCI_MCASP_DITCSRA_REG 0x100 | ||
92 | /* Right(odd TDM slot) Channel Status Register File */ | ||
93 | #define DAVINCI_MCASP_DITCSRB_REG 0x118 | ||
94 | /* Left(even TDM slot) User Data Register File */ | ||
95 | #define DAVINCI_MCASP_DITUDRA_REG 0x130 | ||
96 | /* Right(odd TDM Slot) User Data Register File */ | ||
97 | #define DAVINCI_MCASP_DITUDRB_REG 0x148 | ||
98 | |||
99 | /* Serializer n Control Register */ | ||
100 | #define DAVINCI_MCASP_XRSRCTL_BASE_REG 0x180 | ||
101 | #define DAVINCI_MCASP_XRSRCTL_REG(n) (DAVINCI_MCASP_XRSRCTL_BASE_REG + \ | ||
102 | (n << 2)) | ||
103 | |||
104 | /* Transmit Buffer for Serializer n */ | ||
105 | #define DAVINCI_MCASP_TXBUF_REG 0x200 | ||
106 | /* Receive Buffer for Serializer n */ | ||
107 | #define DAVINCI_MCASP_RXBUF_REG 0x280 | ||
108 | |||
109 | /* McASP FIFO Registers */ | ||
110 | #define DAVINCI_MCASP_WFIFOCTL (0x1010) | ||
111 | #define DAVINCI_MCASP_WFIFOSTS (0x1014) | ||
112 | #define DAVINCI_MCASP_RFIFOCTL (0x1018) | ||
113 | #define DAVINCI_MCASP_RFIFOSTS (0x101C) | ||
114 | #define MCASP_VER3_WFIFOCTL (0x1000) | ||
115 | #define MCASP_VER3_WFIFOSTS (0x1004) | ||
116 | #define MCASP_VER3_RFIFOCTL (0x1008) | ||
117 | #define MCASP_VER3_RFIFOSTS (0x100C) | ||
118 | |||
119 | /* | ||
120 | * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management | ||
121 | * Register Bits | ||
122 | */ | ||
123 | #define MCASP_FREE BIT(0) | ||
124 | #define MCASP_SOFT BIT(1) | ||
125 | |||
126 | /* | ||
127 | * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits | ||
128 | */ | ||
129 | #define AXR(n) (1<<n) | ||
130 | #define PFUNC_AMUTE BIT(25) | ||
131 | #define ACLKX BIT(26) | ||
132 | #define AHCLKX BIT(27) | ||
133 | #define AFSX BIT(28) | ||
134 | #define ACLKR BIT(29) | ||
135 | #define AHCLKR BIT(30) | ||
136 | #define AFSR BIT(31) | ||
137 | |||
138 | /* | ||
139 | * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits | ||
140 | */ | ||
141 | #define AXR(n) (1<<n) | ||
142 | #define PDIR_AMUTE BIT(25) | ||
143 | #define ACLKX BIT(26) | ||
144 | #define AHCLKX BIT(27) | ||
145 | #define AFSX BIT(28) | ||
146 | #define ACLKR BIT(29) | ||
147 | #define AHCLKR BIT(30) | ||
148 | #define AFSR BIT(31) | ||
149 | |||
150 | /* | ||
151 | * DAVINCI_MCASP_TXDITCTL_REG - Transmit DIT Control Register Bits | ||
152 | */ | ||
153 | #define DITEN BIT(0) /* Transmit DIT mode enable/disable */ | ||
154 | #define VA BIT(2) | ||
155 | #define VB BIT(3) | ||
156 | |||
157 | /* | ||
158 | * DAVINCI_MCASP_TXFMT_REG - Transmit Bitstream Format Register Bits | ||
159 | */ | ||
160 | #define TXROT(val) (val) | ||
161 | #define TXSEL BIT(3) | ||
162 | #define TXSSZ(val) (val<<4) | ||
163 | #define TXPBIT(val) (val<<8) | ||
164 | #define TXPAD(val) (val<<13) | ||
165 | #define TXORD BIT(15) | ||
166 | #define FSXDLY(val) (val<<16) | ||
167 | |||
168 | /* | ||
169 | * DAVINCI_MCASP_RXFMT_REG - Receive Bitstream Format Register Bits | ||
170 | */ | ||
171 | #define RXROT(val) (val) | ||
172 | #define RXSEL BIT(3) | ||
173 | #define RXSSZ(val) (val<<4) | ||
174 | #define RXPBIT(val) (val<<8) | ||
175 | #define RXPAD(val) (val<<13) | ||
176 | #define RXORD BIT(15) | ||
177 | #define FSRDLY(val) (val<<16) | ||
178 | |||
179 | /* | ||
180 | * DAVINCI_MCASP_TXFMCTL_REG - Transmit Frame Control Register Bits | ||
181 | */ | ||
182 | #define FSXPOL BIT(0) | ||
183 | #define AFSXE BIT(1) | ||
184 | #define FSXDUR BIT(4) | ||
185 | #define FSXMOD(val) (val<<7) | ||
186 | |||
187 | /* | ||
188 | * DAVINCI_MCASP_RXFMCTL_REG - Receive Frame Control Register Bits | ||
189 | */ | ||
190 | #define FSRPOL BIT(0) | ||
191 | #define AFSRE BIT(1) | ||
192 | #define FSRDUR BIT(4) | ||
193 | #define FSRMOD(val) (val<<7) | ||
194 | |||
195 | /* | ||
196 | * DAVINCI_MCASP_ACLKXCTL_REG - Transmit Clock Control Register Bits | ||
197 | */ | ||
198 | #define ACLKXDIV(val) (val) | ||
199 | #define ACLKXE BIT(5) | ||
200 | #define TX_ASYNC BIT(6) | ||
201 | #define ACLKXPOL BIT(7) | ||
202 | #define ACLKXDIV_MASK 0x1f | ||
203 | |||
204 | /* | ||
205 | * DAVINCI_MCASP_ACLKRCTL_REG Receive Clock Control Register Bits | ||
206 | */ | ||
207 | #define ACLKRDIV(val) (val) | ||
208 | #define ACLKRE BIT(5) | ||
209 | #define RX_ASYNC BIT(6) | ||
210 | #define ACLKRPOL BIT(7) | ||
211 | #define ACLKRDIV_MASK 0x1f | ||
212 | |||
213 | /* | ||
214 | * DAVINCI_MCASP_AHCLKXCTL_REG - High Frequency Transmit Clock Control | ||
215 | * Register Bits | ||
216 | */ | ||
217 | #define AHCLKXDIV(val) (val) | ||
218 | #define AHCLKXPOL BIT(14) | ||
219 | #define AHCLKXE BIT(15) | ||
220 | #define AHCLKXDIV_MASK 0xfff | ||
221 | 46 | ||
222 | /* | 47 | /* McASP specific data */ |
223 | * DAVINCI_MCASP_AHCLKRCTL_REG - High Frequency Receive Clock Control | 48 | int tdm_slots; |
224 | * Register Bits | 49 | u8 op_mode; |
225 | */ | 50 | u8 num_serializer; |
226 | #define AHCLKRDIV(val) (val) | 51 | u8 *serial_dir; |
227 | #define AHCLKRPOL BIT(14) | 52 | u8 version; |
228 | #define AHCLKRE BIT(15) | 53 | u16 bclk_lrclk_ratio; |
229 | #define AHCLKRDIV_MASK 0xfff | 54 | int streams; |
230 | 55 | ||
231 | /* | 56 | /* McASP FIFO related */ |
232 | * DAVINCI_MCASP_XRSRCTL_BASE_REG - Serializer Control Register Bits | 57 | u8 txnumevt; |
233 | */ | 58 | u8 rxnumevt; |
234 | #define MODE(val) (val) | ||
235 | #define DISMOD (val)(val<<2) | ||
236 | #define TXSTATE BIT(4) | ||
237 | #define RXSTATE BIT(5) | ||
238 | #define SRMOD_MASK 3 | ||
239 | #define SRMOD_INACTIVE 0 | ||
240 | |||
241 | /* | ||
242 | * DAVINCI_MCASP_LBCTL_REG - Loop Back Control Register Bits | ||
243 | */ | ||
244 | #define LBEN BIT(0) | ||
245 | #define LBORD BIT(1) | ||
246 | #define LBGENMODE(val) (val<<2) | ||
247 | 59 | ||
248 | /* | 60 | bool dat_port; |
249 | * DAVINCI_MCASP_TXTDMSLOT_REG - Transmit TDM Slot Register configuration | ||
250 | */ | ||
251 | #define TXTDMS(n) (1<<n) | ||
252 | |||
253 | /* | ||
254 | * DAVINCI_MCASP_RXTDMSLOT_REG - Receive TDM Slot Register configuration | ||
255 | */ | ||
256 | #define RXTDMS(n) (1<<n) | ||
257 | |||
258 | /* | ||
259 | * DAVINCI_MCASP_GBLCTL_REG - Global Control Register Bits | ||
260 | */ | ||
261 | #define RXCLKRST BIT(0) /* Receiver Clock Divider Reset */ | ||
262 | #define RXHCLKRST BIT(1) /* Receiver High Frequency Clock Divider */ | ||
263 | #define RXSERCLR BIT(2) /* Receiver Serializer Clear */ | ||
264 | #define RXSMRST BIT(3) /* Receiver State Machine Reset */ | ||
265 | #define RXFSRST BIT(4) /* Frame Sync Generator Reset */ | ||
266 | #define TXCLKRST BIT(8) /* Transmitter Clock Divider Reset */ | ||
267 | #define TXHCLKRST BIT(9) /* Transmitter High Frequency Clock Divider*/ | ||
268 | #define TXSERCLR BIT(10) /* Transmit Serializer Clear */ | ||
269 | #define TXSMRST BIT(11) /* Transmitter State Machine Reset */ | ||
270 | #define TXFSRST BIT(12) /* Frame Sync Generator Reset */ | ||
271 | 61 | ||
272 | /* | 62 | #ifdef CONFIG_PM_SLEEP |
273 | * DAVINCI_MCASP_AMUTE_REG - Mute Control Register Bits | 63 | struct { |
274 | */ | 64 | u32 txfmtctl; |
275 | #define MUTENA(val) (val) | 65 | u32 rxfmtctl; |
276 | #define MUTEINPOL BIT(2) | 66 | u32 txfmt; |
277 | #define MUTEINENA BIT(3) | 67 | u32 rxfmt; |
278 | #define MUTEIN BIT(4) | 68 | u32 aclkxctl; |
279 | #define MUTER BIT(5) | 69 | u32 aclkrctl; |
280 | #define MUTEX BIT(6) | 70 | u32 pdir; |
281 | #define MUTEFSR BIT(7) | 71 | } context; |
282 | #define MUTEFSX BIT(8) | 72 | #endif |
283 | #define MUTEBADCLKR BIT(9) | 73 | }; |
284 | #define MUTEBADCLKX BIT(10) | ||
285 | #define MUTERXDMAERR BIT(11) | ||
286 | #define MUTETXDMAERR BIT(12) | ||
287 | |||
288 | /* | ||
289 | * DAVINCI_MCASP_REVTCTL_REG - Receiver DMA Event Control Register bits | ||
290 | */ | ||
291 | #define RXDATADMADIS BIT(0) | ||
292 | |||
293 | /* | ||
294 | * DAVINCI_MCASP_XEVTCTL_REG - Transmitter DMA Event Control Register bits | ||
295 | */ | ||
296 | #define TXDATADMADIS BIT(0) | ||
297 | |||
298 | /* | ||
299 | * DAVINCI_MCASP_W[R]FIFOCTL - Write/Read FIFO Control Register bits | ||
300 | */ | ||
301 | #define FIFO_ENABLE BIT(16) | ||
302 | #define NUMEVT_MASK (0xFF << 8) | ||
303 | #define NUMDMA_MASK (0xFF) | ||
304 | |||
305 | #define DAVINCI_MCASP_NUM_SERIALIZER 16 | ||
306 | 74 | ||
307 | static inline void mcasp_set_bits(void __iomem *reg, u32 val) | 75 | static inline void mcasp_set_bits(struct davinci_mcasp *mcasp, u32 offset, |
76 | u32 val) | ||
308 | { | 77 | { |
78 | void __iomem *reg = mcasp->base + offset; | ||
309 | __raw_writel(__raw_readl(reg) | val, reg); | 79 | __raw_writel(__raw_readl(reg) | val, reg); |
310 | } | 80 | } |
311 | 81 | ||
312 | static inline void mcasp_clr_bits(void __iomem *reg, u32 val) | 82 | static inline void mcasp_clr_bits(struct davinci_mcasp *mcasp, u32 offset, |
83 | u32 val) | ||
313 | { | 84 | { |
85 | void __iomem *reg = mcasp->base + offset; | ||
314 | __raw_writel((__raw_readl(reg) & ~(val)), reg); | 86 | __raw_writel((__raw_readl(reg) & ~(val)), reg); |
315 | } | 87 | } |
316 | 88 | ||
317 | static inline void mcasp_mod_bits(void __iomem *reg, u32 val, u32 mask) | 89 | static inline void mcasp_mod_bits(struct davinci_mcasp *mcasp, u32 offset, |
90 | u32 val, u32 mask) | ||
318 | { | 91 | { |
92 | void __iomem *reg = mcasp->base + offset; | ||
319 | __raw_writel((__raw_readl(reg) & ~mask) | val, reg); | 93 | __raw_writel((__raw_readl(reg) & ~mask) | val, reg); |
320 | } | 94 | } |
321 | 95 | ||
322 | static inline void mcasp_set_reg(void __iomem *reg, u32 val) | 96 | static inline void mcasp_set_reg(struct davinci_mcasp *mcasp, u32 offset, |
97 | u32 val) | ||
323 | { | 98 | { |
324 | __raw_writel(val, reg); | 99 | __raw_writel(val, mcasp->base + offset); |
325 | } | 100 | } |
326 | 101 | ||
327 | static inline u32 mcasp_get_reg(void __iomem *reg) | 102 | static inline u32 mcasp_get_reg(struct davinci_mcasp *mcasp, u32 offset) |
328 | { | 103 | { |
329 | return (unsigned int)__raw_readl(reg); | 104 | return (u32)__raw_readl(mcasp->base + offset); |
330 | } | 105 | } |
331 | 106 | ||
332 | static inline void mcasp_set_ctl_reg(void __iomem *regs, u32 val) | 107 | static void mcasp_set_ctl_reg(struct davinci_mcasp *mcasp, u32 ctl_reg, u32 val) |
333 | { | 108 | { |
334 | int i = 0; | 109 | int i = 0; |
335 | 110 | ||
336 | mcasp_set_bits(regs, val); | 111 | mcasp_set_bits(mcasp, ctl_reg, val); |
337 | 112 | ||
338 | /* programming GBLCTL needs to read back from GBLCTL and verfiy */ | 113 | /* programming GBLCTL needs to read back from GBLCTL and verfiy */ |
339 | /* loop count is to avoid the lock-up */ | 114 | /* loop count is to avoid the lock-up */ |
340 | for (i = 0; i < 1000; i++) { | 115 | for (i = 0; i < 1000; i++) { |
341 | if ((mcasp_get_reg(regs) & val) == val) | 116 | if ((mcasp_get_reg(mcasp, ctl_reg) & val) == val) |
342 | break; | 117 | break; |
343 | } | 118 | } |
344 | 119 | ||
345 | if (i == 1000 && ((mcasp_get_reg(regs) & val) != val)) | 120 | if (i == 1000 && ((mcasp_get_reg(mcasp, ctl_reg) & val) != val)) |
346 | printk(KERN_ERR "GBLCTL write error\n"); | 121 | printk(KERN_ERR "GBLCTL write error\n"); |
347 | } | 122 | } |
348 | 123 | ||
349 | static void mcasp_start_rx(struct davinci_audio_dev *dev) | 124 | static bool mcasp_is_synchronous(struct davinci_mcasp *mcasp) |
350 | { | 125 | { |
351 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST); | 126 | u32 rxfmctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG); |
352 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST); | 127 | u32 aclkxctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG); |
353 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR); | ||
354 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); | ||
355 | 128 | ||
356 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); | 129 | return !(aclkxctl & TX_ASYNC) && rxfmctl & AFSRE; |
357 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); | 130 | } |
358 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); | ||
359 | 131 | ||
360 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); | 132 | static void mcasp_start_rx(struct davinci_mcasp *mcasp) |
361 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); | 133 | { |
134 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST); | ||
135 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST); | ||
136 | |||
137 | /* | ||
138 | * When ASYNC == 0 the transmit and receive sections operate | ||
139 | * synchronously from the transmit clock and frame sync. We need to make | ||
140 | * sure that the TX signlas are enabled when starting reception. | ||
141 | */ | ||
142 | if (mcasp_is_synchronous(mcasp)) { | ||
143 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); | ||
144 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); | ||
145 | } | ||
146 | |||
147 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR); | ||
148 | mcasp_set_reg(mcasp, DAVINCI_MCASP_RXBUF_REG, 0); | ||
149 | |||
150 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); | ||
151 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); | ||
152 | mcasp_set_reg(mcasp, DAVINCI_MCASP_RXBUF_REG, 0); | ||
153 | |||
154 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); | ||
155 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); | ||
156 | |||
157 | if (mcasp_is_synchronous(mcasp)) | ||
158 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); | ||
362 | } | 159 | } |
363 | 160 | ||
364 | static void mcasp_start_tx(struct davinci_audio_dev *dev) | 161 | static void mcasp_start_tx(struct davinci_mcasp *mcasp) |
365 | { | 162 | { |
366 | u8 offset = 0, i; | 163 | u8 offset = 0, i; |
367 | u32 cnt; | 164 | u32 cnt; |
368 | 165 | ||
369 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); | 166 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); |
370 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); | 167 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); |
371 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR); | 168 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR); |
372 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); | 169 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0); |
373 | 170 | ||
374 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSMRST); | 171 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXSMRST); |
375 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); | 172 | mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); |
376 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); | 173 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0); |
377 | for (i = 0; i < dev->num_serializer; i++) { | 174 | for (i = 0; i < mcasp->num_serializer; i++) { |
378 | if (dev->serial_dir[i] == TX_MODE) { | 175 | if (mcasp->serial_dir[i] == TX_MODE) { |
379 | offset = i; | 176 | offset = i; |
380 | break; | 177 | break; |
381 | } | 178 | } |
@@ -383,156 +180,140 @@ static void mcasp_start_tx(struct davinci_audio_dev *dev) | |||
383 | 180 | ||
384 | /* wait for TX ready */ | 181 | /* wait for TX ready */ |
385 | cnt = 0; | 182 | cnt = 0; |
386 | while (!(mcasp_get_reg(dev->base + DAVINCI_MCASP_XRSRCTL_REG(offset)) & | 183 | while (!(mcasp_get_reg(mcasp, DAVINCI_MCASP_XRSRCTL_REG(offset)) & |
387 | TXSTATE) && (cnt < 100000)) | 184 | TXSTATE) && (cnt < 100000)) |
388 | cnt++; | 185 | cnt++; |
389 | 186 | ||
390 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); | 187 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXBUF_REG, 0); |
391 | } | 188 | } |
392 | 189 | ||
393 | static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream) | 190 | static void davinci_mcasp_start(struct davinci_mcasp *mcasp, int stream) |
394 | { | 191 | { |
192 | u32 reg; | ||
193 | |||
194 | mcasp->streams++; | ||
195 | |||
395 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { | 196 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
396 | if (dev->txnumevt) { /* enable FIFO */ | 197 | if (mcasp->txnumevt) { /* enable FIFO */ |
397 | switch (dev->version) { | 198 | reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; |
398 | case MCASP_VERSION_3: | 199 | mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); |
399 | mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL, | 200 | mcasp_set_bits(mcasp, reg, FIFO_ENABLE); |
400 | FIFO_ENABLE); | ||
401 | mcasp_set_bits(dev->base + MCASP_VER3_WFIFOCTL, | ||
402 | FIFO_ENABLE); | ||
403 | break; | ||
404 | default: | ||
405 | mcasp_clr_bits(dev->base + | ||
406 | DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); | ||
407 | mcasp_set_bits(dev->base + | ||
408 | DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); | ||
409 | } | ||
410 | } | 201 | } |
411 | mcasp_start_tx(dev); | 202 | mcasp_start_tx(mcasp); |
412 | } else { | 203 | } else { |
413 | if (dev->rxnumevt) { /* enable FIFO */ | 204 | if (mcasp->rxnumevt) { /* enable FIFO */ |
414 | switch (dev->version) { | 205 | reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; |
415 | case MCASP_VERSION_3: | 206 | mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); |
416 | mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL, | 207 | mcasp_set_bits(mcasp, reg, FIFO_ENABLE); |
417 | FIFO_ENABLE); | ||
418 | mcasp_set_bits(dev->base + MCASP_VER3_RFIFOCTL, | ||
419 | FIFO_ENABLE); | ||
420 | break; | ||
421 | default: | ||
422 | mcasp_clr_bits(dev->base + | ||
423 | DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); | ||
424 | mcasp_set_bits(dev->base + | ||
425 | DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); | ||
426 | } | ||
427 | } | 208 | } |
428 | mcasp_start_rx(dev); | 209 | mcasp_start_rx(mcasp); |
429 | } | 210 | } |
430 | } | 211 | } |
431 | 212 | ||
432 | static void mcasp_stop_rx(struct davinci_audio_dev *dev) | 213 | static void mcasp_stop_rx(struct davinci_mcasp *mcasp) |
433 | { | 214 | { |
434 | mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, 0); | 215 | /* |
435 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); | 216 | * In synchronous mode stop the TX clocks if no other stream is |
217 | * running | ||
218 | */ | ||
219 | if (mcasp_is_synchronous(mcasp) && !mcasp->streams) | ||
220 | mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, 0); | ||
221 | |||
222 | mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, 0); | ||
223 | mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); | ||
436 | } | 224 | } |
437 | 225 | ||
438 | static void mcasp_stop_tx(struct davinci_audio_dev *dev) | 226 | static void mcasp_stop_tx(struct davinci_mcasp *mcasp) |
439 | { | 227 | { |
440 | mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, 0); | 228 | u32 val = 0; |
441 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); | 229 | |
230 | /* | ||
231 | * In synchronous mode keep TX clocks running if the capture stream is | ||
232 | * still running. | ||
233 | */ | ||
234 | if (mcasp_is_synchronous(mcasp) && mcasp->streams) | ||
235 | val = TXHCLKRST | TXCLKRST | TXFSRST; | ||
236 | |||
237 | mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, val); | ||
238 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); | ||
442 | } | 239 | } |
443 | 240 | ||
444 | static void davinci_mcasp_stop(struct davinci_audio_dev *dev, int stream) | 241 | static void davinci_mcasp_stop(struct davinci_mcasp *mcasp, int stream) |
445 | { | 242 | { |
243 | u32 reg; | ||
244 | |||
245 | mcasp->streams--; | ||
246 | |||
446 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { | 247 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
447 | if (dev->txnumevt) { /* disable FIFO */ | 248 | if (mcasp->txnumevt) { /* disable FIFO */ |
448 | switch (dev->version) { | 249 | reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; |
449 | case MCASP_VERSION_3: | 250 | mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); |
450 | mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL, | ||
451 | FIFO_ENABLE); | ||
452 | break; | ||
453 | default: | ||
454 | mcasp_clr_bits(dev->base + | ||
455 | DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); | ||
456 | } | ||
457 | } | 251 | } |
458 | mcasp_stop_tx(dev); | 252 | mcasp_stop_tx(mcasp); |
459 | } else { | 253 | } else { |
460 | if (dev->rxnumevt) { /* disable FIFO */ | 254 | if (mcasp->rxnumevt) { /* disable FIFO */ |
461 | switch (dev->version) { | 255 | reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; |
462 | case MCASP_VERSION_3: | 256 | mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); |
463 | mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL, | ||
464 | FIFO_ENABLE); | ||
465 | break; | ||
466 | |||
467 | default: | ||
468 | mcasp_clr_bits(dev->base + | ||
469 | DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); | ||
470 | } | ||
471 | } | 257 | } |
472 | mcasp_stop_rx(dev); | 258 | mcasp_stop_rx(mcasp); |
473 | } | 259 | } |
474 | } | 260 | } |
475 | 261 | ||
476 | static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, | 262 | static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
477 | unsigned int fmt) | 263 | unsigned int fmt) |
478 | { | 264 | { |
479 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); | 265 | struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); |
480 | void __iomem *base = dev->base; | ||
481 | 266 | ||
482 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | 267 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
483 | case SND_SOC_DAIFMT_DSP_B: | 268 | case SND_SOC_DAIFMT_DSP_B: |
484 | case SND_SOC_DAIFMT_AC97: | 269 | case SND_SOC_DAIFMT_AC97: |
485 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); | 270 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); |
486 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); | 271 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); |
487 | break; | 272 | break; |
488 | default: | 273 | default: |
489 | /* configure a full-word SYNC pulse (LRCLK) */ | 274 | /* configure a full-word SYNC pulse (LRCLK) */ |
490 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); | 275 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); |
491 | mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); | 276 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); |
492 | 277 | ||
493 | /* make 1st data bit occur one ACLK cycle after the frame sync */ | 278 | /* make 1st data bit occur one ACLK cycle after the frame sync */ |
494 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); | 279 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); |
495 | mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); | 280 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); |
496 | break; | 281 | break; |
497 | } | 282 | } |
498 | 283 | ||
499 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | 284 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
500 | case SND_SOC_DAIFMT_CBS_CFS: | 285 | case SND_SOC_DAIFMT_CBS_CFS: |
501 | /* codec is clock and frame slave */ | 286 | /* codec is clock and frame slave */ |
502 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); | 287 | mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); |
503 | mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); | 288 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); |
504 | 289 | ||
505 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); | 290 | mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); |
506 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); | 291 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); |
507 | 292 | ||
508 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, | 293 | mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR); |
509 | ACLKX | ACLKR); | 294 | mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR); |
510 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, | ||
511 | AFSX | AFSR); | ||
512 | break; | 295 | break; |
513 | case SND_SOC_DAIFMT_CBM_CFS: | 296 | case SND_SOC_DAIFMT_CBM_CFS: |
514 | /* codec is clock master and frame slave */ | 297 | /* codec is clock master and frame slave */ |
515 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); | 298 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); |
516 | mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); | 299 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); |
517 | 300 | ||
518 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); | 301 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); |
519 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); | 302 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); |
520 | 303 | ||
521 | mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, | 304 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR); |
522 | ACLKX | ACLKR); | 305 | mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR); |
523 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, | ||
524 | AFSX | AFSR); | ||
525 | break; | 306 | break; |
526 | case SND_SOC_DAIFMT_CBM_CFM: | 307 | case SND_SOC_DAIFMT_CBM_CFM: |
527 | /* codec is clock and frame master */ | 308 | /* codec is clock and frame master */ |
528 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); | 309 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); |
529 | mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); | 310 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); |
530 | 311 | ||
531 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); | 312 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); |
532 | mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); | 313 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); |
533 | 314 | ||
534 | mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, | 315 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, |
535 | ACLKX | AHCLKX | AFSX | ACLKR | AHCLKR | AFSR); | 316 | ACLKX | AHCLKX | AFSX | ACLKR | AHCLKR | AFSR); |
536 | break; | 317 | break; |
537 | 318 | ||
538 | default: | 319 | default: |
@@ -541,35 +322,35 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
541 | 322 | ||
542 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | 323 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
543 | case SND_SOC_DAIFMT_IB_NF: | 324 | case SND_SOC_DAIFMT_IB_NF: |
544 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); | 325 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
545 | mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); | 326 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
546 | 327 | ||
547 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); | 328 | mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
548 | mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); | 329 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
549 | break; | 330 | break; |
550 | 331 | ||
551 | case SND_SOC_DAIFMT_NB_IF: | 332 | case SND_SOC_DAIFMT_NB_IF: |
552 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); | 333 | mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
553 | mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); | 334 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
554 | 335 | ||
555 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); | 336 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
556 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); | 337 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
557 | break; | 338 | break; |
558 | 339 | ||
559 | case SND_SOC_DAIFMT_IB_IF: | 340 | case SND_SOC_DAIFMT_IB_IF: |
560 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); | 341 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
561 | mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); | 342 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
562 | 343 | ||
563 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); | 344 | mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
564 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); | 345 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
565 | break; | 346 | break; |
566 | 347 | ||
567 | case SND_SOC_DAIFMT_NB_NF: | 348 | case SND_SOC_DAIFMT_NB_NF: |
568 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); | 349 | mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
569 | mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); | 350 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
570 | 351 | ||
571 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); | 352 | mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
572 | mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); | 353 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
573 | break; | 354 | break; |
574 | 355 | ||
575 | default: | 356 | default: |
@@ -581,25 +362,25 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
581 | 362 | ||
582 | static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div) | 363 | static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div) |
583 | { | 364 | { |
584 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); | 365 | struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); |
585 | 366 | ||
586 | switch (div_id) { | 367 | switch (div_id) { |
587 | case 0: /* MCLK divider */ | 368 | case 0: /* MCLK divider */ |
588 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, | 369 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, |
589 | AHCLKXDIV(div - 1), AHCLKXDIV_MASK); | 370 | AHCLKXDIV(div - 1), AHCLKXDIV_MASK); |
590 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, | 371 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, |
591 | AHCLKRDIV(div - 1), AHCLKRDIV_MASK); | 372 | AHCLKRDIV(div - 1), AHCLKRDIV_MASK); |
592 | break; | 373 | break; |
593 | 374 | ||
594 | case 1: /* BCLK divider */ | 375 | case 1: /* BCLK divider */ |
595 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, | 376 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, |
596 | ACLKXDIV(div - 1), ACLKXDIV_MASK); | 377 | ACLKXDIV(div - 1), ACLKXDIV_MASK); |
597 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKRCTL_REG, | 378 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, |
598 | ACLKRDIV(div - 1), ACLKRDIV_MASK); | 379 | ACLKRDIV(div - 1), ACLKRDIV_MASK); |
599 | break; | 380 | break; |
600 | 381 | ||
601 | case 2: /* BCLK/LRCLK ratio */ | 382 | case 2: /* BCLK/LRCLK ratio */ |
602 | dev->bclk_lrclk_ratio = div; | 383 | mcasp->bclk_lrclk_ratio = div; |
603 | break; | 384 | break; |
604 | 385 | ||
605 | default: | 386 | default: |
@@ -612,22 +393,22 @@ static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div | |||
612 | static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id, | 393 | static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id, |
613 | unsigned int freq, int dir) | 394 | unsigned int freq, int dir) |
614 | { | 395 | { |
615 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); | 396 | struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); |
616 | 397 | ||
617 | if (dir == SND_SOC_CLOCK_OUT) { | 398 | if (dir == SND_SOC_CLOCK_OUT) { |
618 | mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); | 399 | mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); |
619 | mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); | 400 | mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); |
620 | mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AHCLKX); | 401 | mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX); |
621 | } else { | 402 | } else { |
622 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); | 403 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); |
623 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); | 404 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); |
624 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AHCLKX); | 405 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX); |
625 | } | 406 | } |
626 | 407 | ||
627 | return 0; | 408 | return 0; |
628 | } | 409 | } |
629 | 410 | ||
630 | static int davinci_config_channel_size(struct davinci_audio_dev *dev, | 411 | static int davinci_config_channel_size(struct davinci_mcasp *mcasp, |
631 | int word_length) | 412 | int word_length) |
632 | { | 413 | { |
633 | u32 fmt; | 414 | u32 fmt; |
@@ -644,71 +425,68 @@ static int davinci_config_channel_size(struct davinci_audio_dev *dev, | |||
644 | * both left and right channels), so it has to be divided by number of | 425 | * both left and right channels), so it has to be divided by number of |
645 | * tdm-slots (for I2S - divided by 2). | 426 | * tdm-slots (for I2S - divided by 2). |
646 | */ | 427 | */ |
647 | if (dev->bclk_lrclk_ratio) | 428 | if (mcasp->bclk_lrclk_ratio) |
648 | word_length = dev->bclk_lrclk_ratio / dev->tdm_slots; | 429 | word_length = mcasp->bclk_lrclk_ratio / mcasp->tdm_slots; |
649 | 430 | ||
650 | /* mapping of the XSSZ bit-field as described in the datasheet */ | 431 | /* mapping of the XSSZ bit-field as described in the datasheet */ |
651 | fmt = (word_length >> 1) - 1; | 432 | fmt = (word_length >> 1) - 1; |
652 | 433 | ||
653 | if (dev->op_mode != DAVINCI_MCASP_DIT_MODE) { | 434 | if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { |
654 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, | 435 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, RXSSZ(fmt), |
655 | RXSSZ(fmt), RXSSZ(0x0F)); | 436 | RXSSZ(0x0F)); |
656 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, | 437 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXSSZ(fmt), |
657 | TXSSZ(fmt), TXSSZ(0x0F)); | 438 | TXSSZ(0x0F)); |
658 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, | 439 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(tx_rotate), |
659 | TXROT(tx_rotate), TXROT(7)); | 440 | TXROT(7)); |
660 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, | 441 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, RXROT(rx_rotate), |
661 | RXROT(rx_rotate), RXROT(7)); | 442 | RXROT(7)); |
662 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXMASK_REG, | 443 | mcasp_set_reg(mcasp, DAVINCI_MCASP_RXMASK_REG, mask); |
663 | mask); | ||
664 | } | 444 | } |
665 | 445 | ||
666 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, mask); | 446 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXMASK_REG, mask); |
667 | 447 | ||
668 | return 0; | 448 | return 0; |
669 | } | 449 | } |
670 | 450 | ||
671 | static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream, | 451 | static int davinci_hw_common_param(struct davinci_mcasp *mcasp, int stream, |
672 | int channels) | 452 | int channels) |
673 | { | 453 | { |
674 | int i; | 454 | int i; |
675 | u8 tx_ser = 0; | 455 | u8 tx_ser = 0; |
676 | u8 rx_ser = 0; | 456 | u8 rx_ser = 0; |
677 | u8 ser; | 457 | u8 ser; |
678 | u8 slots = dev->tdm_slots; | 458 | u8 slots = mcasp->tdm_slots; |
679 | u8 max_active_serializers = (channels + slots - 1) / slots; | 459 | u8 max_active_serializers = (channels + slots - 1) / slots; |
460 | u32 reg; | ||
680 | /* Default configuration */ | 461 | /* Default configuration */ |
681 | mcasp_set_bits(dev->base + DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); | 462 | if (mcasp->version != MCASP_VERSION_4) |
463 | mcasp_set_bits(mcasp, DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); | ||
682 | 464 | ||
683 | /* All PINS as McASP */ | 465 | /* All PINS as McASP */ |
684 | mcasp_set_reg(dev->base + DAVINCI_MCASP_PFUNC_REG, 0x00000000); | 466 | mcasp_set_reg(mcasp, DAVINCI_MCASP_PFUNC_REG, 0x00000000); |
685 | 467 | ||
686 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { | 468 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
687 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); | 469 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); |
688 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, | 470 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); |
689 | TXDATADMADIS); | ||
690 | } else { | 471 | } else { |
691 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); | 472 | mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); |
692 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_REVTCTL_REG, | 473 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_REVTCTL_REG, RXDATADMADIS); |
693 | RXDATADMADIS); | ||
694 | } | 474 | } |
695 | 475 | ||
696 | for (i = 0; i < dev->num_serializer; i++) { | 476 | for (i = 0; i < mcasp->num_serializer; i++) { |
697 | mcasp_set_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i), | 477 | mcasp_set_bits(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i), |
698 | dev->serial_dir[i]); | 478 | mcasp->serial_dir[i]); |
699 | if (dev->serial_dir[i] == TX_MODE && | 479 | if (mcasp->serial_dir[i] == TX_MODE && |
700 | tx_ser < max_active_serializers) { | 480 | tx_ser < max_active_serializers) { |
701 | mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, | 481 | mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AXR(i)); |
702 | AXR(i)); | ||
703 | tx_ser++; | 482 | tx_ser++; |
704 | } else if (dev->serial_dir[i] == RX_MODE && | 483 | } else if (mcasp->serial_dir[i] == RX_MODE && |
705 | rx_ser < max_active_serializers) { | 484 | rx_ser < max_active_serializers) { |
706 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, | 485 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AXR(i)); |
707 | AXR(i)); | ||
708 | rx_ser++; | 486 | rx_ser++; |
709 | } else { | 487 | } else { |
710 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i), | 488 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i), |
711 | SRMOD_INACTIVE, SRMOD_MASK); | 489 | SRMOD_INACTIVE, SRMOD_MASK); |
712 | } | 490 | } |
713 | } | 491 | } |
714 | 492 | ||
@@ -718,127 +496,113 @@ static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream, | |||
718 | ser = rx_ser; | 496 | ser = rx_ser; |
719 | 497 | ||
720 | if (ser < max_active_serializers) { | 498 | if (ser < max_active_serializers) { |
721 | dev_warn(dev->dev, "stream has more channels (%d) than are " | 499 | dev_warn(mcasp->dev, "stream has more channels (%d) than are " |
722 | "enabled in mcasp (%d)\n", channels, ser * slots); | 500 | "enabled in mcasp (%d)\n", channels, ser * slots); |
723 | return -EINVAL; | 501 | return -EINVAL; |
724 | } | 502 | } |
725 | 503 | ||
726 | if (dev->txnumevt && stream == SNDRV_PCM_STREAM_PLAYBACK) { | 504 | if (mcasp->txnumevt && stream == SNDRV_PCM_STREAM_PLAYBACK) { |
727 | if (dev->txnumevt * tx_ser > 64) | 505 | if (mcasp->txnumevt * tx_ser > 64) |
728 | dev->txnumevt = 1; | 506 | mcasp->txnumevt = 1; |
729 | 507 | ||
730 | switch (dev->version) { | 508 | reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; |
731 | case MCASP_VERSION_3: | 509 | mcasp_mod_bits(mcasp, reg, tx_ser, NUMDMA_MASK); |
732 | mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, tx_ser, | 510 | mcasp_mod_bits(mcasp, reg, ((mcasp->txnumevt * tx_ser) << 8), |
733 | NUMDMA_MASK); | 511 | NUMEVT_MASK); |
734 | mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, | ||
735 | ((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK); | ||
736 | break; | ||
737 | default: | ||
738 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, | ||
739 | tx_ser, NUMDMA_MASK); | ||
740 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, | ||
741 | ((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK); | ||
742 | } | ||
743 | } | 512 | } |
744 | 513 | ||
745 | if (dev->rxnumevt && stream == SNDRV_PCM_STREAM_CAPTURE) { | 514 | if (mcasp->rxnumevt && stream == SNDRV_PCM_STREAM_CAPTURE) { |
746 | if (dev->rxnumevt * rx_ser > 64) | 515 | if (mcasp->rxnumevt * rx_ser > 64) |
747 | dev->rxnumevt = 1; | 516 | mcasp->rxnumevt = 1; |
748 | switch (dev->version) { | 517 | |
749 | case MCASP_VERSION_3: | 518 | reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; |
750 | mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, rx_ser, | 519 | mcasp_mod_bits(mcasp, reg, rx_ser, NUMDMA_MASK); |
751 | NUMDMA_MASK); | 520 | mcasp_mod_bits(mcasp, reg, ((mcasp->rxnumevt * rx_ser) << 8), |
752 | mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, | 521 | NUMEVT_MASK); |
753 | ((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK); | ||
754 | break; | ||
755 | default: | ||
756 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, | ||
757 | rx_ser, NUMDMA_MASK); | ||
758 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, | ||
759 | ((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK); | ||
760 | } | ||
761 | } | 522 | } |
762 | 523 | ||
763 | return 0; | 524 | return 0; |
764 | } | 525 | } |
765 | 526 | ||
766 | static void davinci_hw_param(struct davinci_audio_dev *dev, int stream) | 527 | static void davinci_hw_param(struct davinci_mcasp *mcasp, int stream) |
767 | { | 528 | { |
768 | int i, active_slots; | 529 | int i, active_slots; |
769 | u32 mask = 0; | 530 | u32 mask = 0; |
531 | u32 busel = 0; | ||
770 | 532 | ||
771 | active_slots = (dev->tdm_slots > 31) ? 32 : dev->tdm_slots; | 533 | active_slots = (mcasp->tdm_slots > 31) ? 32 : mcasp->tdm_slots; |
772 | for (i = 0; i < active_slots; i++) | 534 | for (i = 0; i < active_slots; i++) |
773 | mask |= (1 << i); | 535 | mask |= (1 << i); |
774 | 536 | ||
775 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); | 537 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); |
538 | |||
539 | if (!mcasp->dat_port) | ||
540 | busel = TXSEL; | ||
776 | 541 | ||
777 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { | 542 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
778 | /* bit stream is MSB first with no delay */ | 543 | /* bit stream is MSB first with no delay */ |
779 | /* DSP_B mode */ | 544 | /* DSP_B mode */ |
780 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, mask); | 545 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, mask); |
781 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, TXORD); | 546 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, busel | TXORD); |
782 | 547 | ||
783 | if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32)) | 548 | if ((mcasp->tdm_slots >= 2) && (mcasp->tdm_slots <= 32)) |
784 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, | 549 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, |
785 | FSXMOD(dev->tdm_slots), FSXMOD(0x1FF)); | 550 | FSXMOD(mcasp->tdm_slots), FSXMOD(0x1FF)); |
786 | else | 551 | else |
787 | printk(KERN_ERR "playback tdm slot %d not supported\n", | 552 | printk(KERN_ERR "playback tdm slot %d not supported\n", |
788 | dev->tdm_slots); | 553 | mcasp->tdm_slots); |
789 | } else { | 554 | } else { |
790 | /* bit stream is MSB first with no delay */ | 555 | /* bit stream is MSB first with no delay */ |
791 | /* DSP_B mode */ | 556 | /* DSP_B mode */ |
792 | mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, RXORD); | 557 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, busel | RXORD); |
793 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXTDM_REG, mask); | 558 | mcasp_set_reg(mcasp, DAVINCI_MCASP_RXTDM_REG, mask); |
794 | 559 | ||
795 | if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32)) | 560 | if ((mcasp->tdm_slots >= 2) && (mcasp->tdm_slots <= 32)) |
796 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, | 561 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, |
797 | FSRMOD(dev->tdm_slots), FSRMOD(0x1FF)); | 562 | FSRMOD(mcasp->tdm_slots), FSRMOD(0x1FF)); |
798 | else | 563 | else |
799 | printk(KERN_ERR "capture tdm slot %d not supported\n", | 564 | printk(KERN_ERR "capture tdm slot %d not supported\n", |
800 | dev->tdm_slots); | 565 | mcasp->tdm_slots); |
801 | } | 566 | } |
802 | } | 567 | } |
803 | 568 | ||
804 | /* S/PDIF */ | 569 | /* S/PDIF */ |
805 | static void davinci_hw_dit_param(struct davinci_audio_dev *dev) | 570 | static void davinci_hw_dit_param(struct davinci_mcasp *mcasp) |
806 | { | 571 | { |
807 | /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0 | 572 | /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0 |
808 | and LSB first */ | 573 | and LSB first */ |
809 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, | 574 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(6) | TXSSZ(15)); |
810 | TXROT(6) | TXSSZ(15)); | ||
811 | 575 | ||
812 | /* Set TX frame synch : DIT Mode, 1 bit width, internal, rising edge */ | 576 | /* Set TX frame synch : DIT Mode, 1 bit width, internal, rising edge */ |
813 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXFMCTL_REG, | 577 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE | FSXMOD(0x180)); |
814 | AFSXE | FSXMOD(0x180)); | ||
815 | 578 | ||
816 | /* Set the TX tdm : for all the slots */ | 579 | /* Set the TX tdm : for all the slots */ |
817 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF); | 580 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF); |
818 | 581 | ||
819 | /* Set the TX clock controls : div = 1 and internal */ | 582 | /* Set the TX clock controls : div = 1 and internal */ |
820 | mcasp_set_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, | 583 | mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | TX_ASYNC); |
821 | ACLKXE | TX_ASYNC); | ||
822 | 584 | ||
823 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); | 585 | mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); |
824 | 586 | ||
825 | /* Only 44100 and 48000 are valid, both have the same setting */ | 587 | /* Only 44100 and 48000 are valid, both have the same setting */ |
826 | mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3)); | 588 | mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3)); |
827 | 589 | ||
828 | /* Enable the DIT */ | 590 | /* Enable the DIT */ |
829 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXDITCTL_REG, DITEN); | 591 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXDITCTL_REG, DITEN); |
830 | } | 592 | } |
831 | 593 | ||
832 | static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, | 594 | static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, |
833 | struct snd_pcm_hw_params *params, | 595 | struct snd_pcm_hw_params *params, |
834 | struct snd_soc_dai *cpu_dai) | 596 | struct snd_soc_dai *cpu_dai) |
835 | { | 597 | { |
836 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); | 598 | struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); |
837 | struct davinci_pcm_dma_params *dma_params = | 599 | struct davinci_pcm_dma_params *dma_params = |
838 | &dev->dma_params[substream->stream]; | 600 | &mcasp->dma_params[substream->stream]; |
601 | struct snd_dmaengine_dai_dma_data *dma_data = | ||
602 | &mcasp->dma_data[substream->stream]; | ||
839 | int word_length; | 603 | int word_length; |
840 | u8 fifo_level; | 604 | u8 fifo_level; |
841 | u8 slots = dev->tdm_slots; | 605 | u8 slots = mcasp->tdm_slots; |
842 | u8 active_serializers; | 606 | u8 active_serializers; |
843 | int channels; | 607 | int channels; |
844 | struct snd_interval *pcm_channels = hw_param_interval(params, | 608 | struct snd_interval *pcm_channels = hw_param_interval(params, |
@@ -847,17 +611,17 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, | |||
847 | 611 | ||
848 | active_serializers = (channels + slots - 1) / slots; | 612 | active_serializers = (channels + slots - 1) / slots; |
849 | 613 | ||
850 | if (davinci_hw_common_param(dev, substream->stream, channels) == -EINVAL) | 614 | if (davinci_hw_common_param(mcasp, substream->stream, channels) == -EINVAL) |
851 | return -EINVAL; | 615 | return -EINVAL; |
852 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 616 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
853 | fifo_level = dev->txnumevt * active_serializers; | 617 | fifo_level = mcasp->txnumevt * active_serializers; |
854 | else | 618 | else |
855 | fifo_level = dev->rxnumevt * active_serializers; | 619 | fifo_level = mcasp->rxnumevt * active_serializers; |
856 | 620 | ||
857 | if (dev->op_mode == DAVINCI_MCASP_DIT_MODE) | 621 | if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) |
858 | davinci_hw_dit_param(dev); | 622 | davinci_hw_dit_param(mcasp); |
859 | else | 623 | else |
860 | davinci_hw_param(dev, substream->stream); | 624 | davinci_hw_param(mcasp, substream->stream); |
861 | 625 | ||
862 | switch (params_format(params)) { | 626 | switch (params_format(params)) { |
863 | case SNDRV_PCM_FORMAT_U8: | 627 | case SNDRV_PCM_FORMAT_U8: |
@@ -891,13 +655,15 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, | |||
891 | return -EINVAL; | 655 | return -EINVAL; |
892 | } | 656 | } |
893 | 657 | ||
894 | if (dev->version == MCASP_VERSION_2 && !fifo_level) | 658 | if (mcasp->version == MCASP_VERSION_2 && !fifo_level) |
895 | dma_params->acnt = 4; | 659 | dma_params->acnt = 4; |
896 | else | 660 | else |
897 | dma_params->acnt = dma_params->data_type; | 661 | dma_params->acnt = dma_params->data_type; |
898 | 662 | ||
899 | dma_params->fifo_level = fifo_level; | 663 | dma_params->fifo_level = fifo_level; |
900 | davinci_config_channel_size(dev, word_length); | 664 | dma_data->maxburst = fifo_level; |
665 | |||
666 | davinci_config_channel_size(mcasp, word_length); | ||
901 | 667 | ||
902 | return 0; | 668 | return 0; |
903 | } | 669 | } |
@@ -905,29 +671,29 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, | |||
905 | static int davinci_mcasp_trigger(struct snd_pcm_substream *substream, | 671 | static int davinci_mcasp_trigger(struct snd_pcm_substream *substream, |
906 | int cmd, struct snd_soc_dai *cpu_dai) | 672 | int cmd, struct snd_soc_dai *cpu_dai) |
907 | { | 673 | { |
908 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); | 674 | struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); |
909 | int ret = 0; | 675 | int ret = 0; |
910 | 676 | ||
911 | switch (cmd) { | 677 | switch (cmd) { |
912 | case SNDRV_PCM_TRIGGER_RESUME: | 678 | case SNDRV_PCM_TRIGGER_RESUME: |
913 | case SNDRV_PCM_TRIGGER_START: | 679 | case SNDRV_PCM_TRIGGER_START: |
914 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | 680 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
915 | ret = pm_runtime_get_sync(dev->dev); | 681 | ret = pm_runtime_get_sync(mcasp->dev); |
916 | if (IS_ERR_VALUE(ret)) | 682 | if (IS_ERR_VALUE(ret)) |
917 | dev_err(dev->dev, "pm_runtime_get_sync() failed\n"); | 683 | dev_err(mcasp->dev, "pm_runtime_get_sync() failed\n"); |
918 | davinci_mcasp_start(dev, substream->stream); | 684 | davinci_mcasp_start(mcasp, substream->stream); |
919 | break; | 685 | break; |
920 | 686 | ||
921 | case SNDRV_PCM_TRIGGER_SUSPEND: | 687 | case SNDRV_PCM_TRIGGER_SUSPEND: |
922 | davinci_mcasp_stop(dev, substream->stream); | 688 | davinci_mcasp_stop(mcasp, substream->stream); |
923 | ret = pm_runtime_put_sync(dev->dev); | 689 | ret = pm_runtime_put_sync(mcasp->dev); |
924 | if (IS_ERR_VALUE(ret)) | 690 | if (IS_ERR_VALUE(ret)) |
925 | dev_err(dev->dev, "pm_runtime_put_sync() failed\n"); | 691 | dev_err(mcasp->dev, "pm_runtime_put_sync() failed\n"); |
926 | break; | 692 | break; |
927 | 693 | ||
928 | case SNDRV_PCM_TRIGGER_STOP: | 694 | case SNDRV_PCM_TRIGGER_STOP: |
929 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | 695 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
930 | davinci_mcasp_stop(dev, substream->stream); | 696 | davinci_mcasp_stop(mcasp, substream->stream); |
931 | break; | 697 | break; |
932 | 698 | ||
933 | default: | 699 | default: |
@@ -940,9 +706,14 @@ static int davinci_mcasp_trigger(struct snd_pcm_substream *substream, | |||
940 | static int davinci_mcasp_startup(struct snd_pcm_substream *substream, | 706 | static int davinci_mcasp_startup(struct snd_pcm_substream *substream, |
941 | struct snd_soc_dai *dai) | 707 | struct snd_soc_dai *dai) |
942 | { | 708 | { |
943 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); | 709 | struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); |
710 | |||
711 | if (mcasp->version == MCASP_VERSION_4) | ||
712 | snd_soc_dai_set_dma_data(dai, substream, | ||
713 | &mcasp->dma_data[substream->stream]); | ||
714 | else | ||
715 | snd_soc_dai_set_dma_data(dai, substream, mcasp->dma_params); | ||
944 | 716 | ||
945 | snd_soc_dai_set_dma_data(dai, substream, dev->dma_params); | ||
946 | return 0; | 717 | return 0; |
947 | } | 718 | } |
948 | 719 | ||
@@ -955,6 +726,8 @@ static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = { | |||
955 | .set_sysclk = davinci_mcasp_set_sysclk, | 726 | .set_sysclk = davinci_mcasp_set_sysclk, |
956 | }; | 727 | }; |
957 | 728 | ||
729 | #define DAVINCI_MCASP_RATES SNDRV_PCM_RATE_8000_192000 | ||
730 | |||
958 | #define DAVINCI_MCASP_PCM_FMTS (SNDRV_PCM_FMTBIT_S8 | \ | 731 | #define DAVINCI_MCASP_PCM_FMTS (SNDRV_PCM_FMTBIT_S8 | \ |
959 | SNDRV_PCM_FMTBIT_U8 | \ | 732 | SNDRV_PCM_FMTBIT_U8 | \ |
960 | SNDRV_PCM_FMTBIT_S16_LE | \ | 733 | SNDRV_PCM_FMTBIT_S16_LE | \ |
@@ -985,7 +758,7 @@ static struct snd_soc_dai_driver davinci_mcasp_dai[] = { | |||
985 | 758 | ||
986 | }, | 759 | }, |
987 | { | 760 | { |
988 | "davinci-mcasp.1", | 761 | .name = "davinci-mcasp.1", |
989 | .playback = { | 762 | .playback = { |
990 | .channels_min = 1, | 763 | .channels_min = 1, |
991 | .channels_max = 384, | 764 | .channels_max = 384, |
@@ -1016,13 +789,20 @@ static struct snd_platform_data da830_mcasp_pdata = { | |||
1016 | .version = MCASP_VERSION_2, | 789 | .version = MCASP_VERSION_2, |
1017 | }; | 790 | }; |
1018 | 791 | ||
1019 | static struct snd_platform_data omap2_mcasp_pdata = { | 792 | static struct snd_platform_data am33xx_mcasp_pdata = { |
1020 | .tx_dma_offset = 0, | 793 | .tx_dma_offset = 0, |
1021 | .rx_dma_offset = 0, | 794 | .rx_dma_offset = 0, |
1022 | .asp_chan_q = EVENTQ_0, | 795 | .asp_chan_q = EVENTQ_0, |
1023 | .version = MCASP_VERSION_3, | 796 | .version = MCASP_VERSION_3, |
1024 | }; | 797 | }; |
1025 | 798 | ||
799 | static struct snd_platform_data dra7_mcasp_pdata = { | ||
800 | .tx_dma_offset = 0x200, | ||
801 | .rx_dma_offset = 0x284, | ||
802 | .asp_chan_q = EVENTQ_0, | ||
803 | .version = MCASP_VERSION_4, | ||
804 | }; | ||
805 | |||
1026 | static const struct of_device_id mcasp_dt_ids[] = { | 806 | static const struct of_device_id mcasp_dt_ids[] = { |
1027 | { | 807 | { |
1028 | .compatible = "ti,dm646x-mcasp-audio", | 808 | .compatible = "ti,dm646x-mcasp-audio", |
@@ -1034,12 +814,56 @@ static const struct of_device_id mcasp_dt_ids[] = { | |||
1034 | }, | 814 | }, |
1035 | { | 815 | { |
1036 | .compatible = "ti,am33xx-mcasp-audio", | 816 | .compatible = "ti,am33xx-mcasp-audio", |
1037 | .data = &omap2_mcasp_pdata, | 817 | .data = &am33xx_mcasp_pdata, |
818 | }, | ||
819 | { | ||
820 | .compatible = "ti,dra7-mcasp-audio", | ||
821 | .data = &dra7_mcasp_pdata, | ||
1038 | }, | 822 | }, |
1039 | { /* sentinel */ } | 823 | { /* sentinel */ } |
1040 | }; | 824 | }; |
1041 | MODULE_DEVICE_TABLE(of, mcasp_dt_ids); | 825 | MODULE_DEVICE_TABLE(of, mcasp_dt_ids); |
1042 | 826 | ||
827 | static int mcasp_reparent_fck(struct platform_device *pdev) | ||
828 | { | ||
829 | struct device_node *node = pdev->dev.of_node; | ||
830 | struct clk *gfclk, *parent_clk; | ||
831 | const char *parent_name; | ||
832 | int ret; | ||
833 | |||
834 | if (!node) | ||
835 | return 0; | ||
836 | |||
837 | parent_name = of_get_property(node, "fck_parent", NULL); | ||
838 | if (!parent_name) | ||
839 | return 0; | ||
840 | |||
841 | gfclk = clk_get(&pdev->dev, "fck"); | ||
842 | if (IS_ERR(gfclk)) { | ||
843 | dev_err(&pdev->dev, "failed to get fck\n"); | ||
844 | return PTR_ERR(gfclk); | ||
845 | } | ||
846 | |||
847 | parent_clk = clk_get(NULL, parent_name); | ||
848 | if (IS_ERR(parent_clk)) { | ||
849 | dev_err(&pdev->dev, "failed to get parent clock\n"); | ||
850 | ret = PTR_ERR(parent_clk); | ||
851 | goto err1; | ||
852 | } | ||
853 | |||
854 | ret = clk_set_parent(gfclk, parent_clk); | ||
855 | if (ret) { | ||
856 | dev_err(&pdev->dev, "failed to reparent fck\n"); | ||
857 | goto err2; | ||
858 | } | ||
859 | |||
860 | err2: | ||
861 | clk_put(parent_clk); | ||
862 | err1: | ||
863 | clk_put(gfclk); | ||
864 | return ret; | ||
865 | } | ||
866 | |||
1043 | static struct snd_platform_data *davinci_mcasp_set_pdata_from_of( | 867 | static struct snd_platform_data *davinci_mcasp_set_pdata_from_of( |
1044 | struct platform_device *pdev) | 868 | struct platform_device *pdev) |
1045 | { | 869 | { |
@@ -1152,7 +976,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev) | |||
1152 | struct davinci_pcm_dma_params *dma_data; | 976 | struct davinci_pcm_dma_params *dma_data; |
1153 | struct resource *mem, *ioarea, *res, *dat; | 977 | struct resource *mem, *ioarea, *res, *dat; |
1154 | struct snd_platform_data *pdata; | 978 | struct snd_platform_data *pdata; |
1155 | struct davinci_audio_dev *dev; | 979 | struct davinci_mcasp *mcasp; |
1156 | int ret; | 980 | int ret; |
1157 | 981 | ||
1158 | if (!pdev->dev.platform_data && !pdev->dev.of_node) { | 982 | if (!pdev->dev.platform_data && !pdev->dev.of_node) { |
@@ -1160,9 +984,9 @@ static int davinci_mcasp_probe(struct platform_device *pdev) | |||
1160 | return -EINVAL; | 984 | return -EINVAL; |
1161 | } | 985 | } |
1162 | 986 | ||
1163 | dev = devm_kzalloc(&pdev->dev, sizeof(struct davinci_audio_dev), | 987 | mcasp = devm_kzalloc(&pdev->dev, sizeof(struct davinci_mcasp), |
1164 | GFP_KERNEL); | 988 | GFP_KERNEL); |
1165 | if (!dev) | 989 | if (!mcasp) |
1166 | return -ENOMEM; | 990 | return -ENOMEM; |
1167 | 991 | ||
1168 | pdata = davinci_mcasp_set_pdata_from_of(pdev); | 992 | pdata = davinci_mcasp_set_pdata_from_of(pdev); |
@@ -1173,7 +997,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev) | |||
1173 | 997 | ||
1174 | mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); | 998 | mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); |
1175 | if (!mem) { | 999 | if (!mem) { |
1176 | dev_warn(dev->dev, | 1000 | dev_warn(mcasp->dev, |
1177 | "\"mpu\" mem resource not found, using index 0\n"); | 1001 | "\"mpu\" mem resource not found, using index 0\n"); |
1178 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1002 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1179 | if (!mem) { | 1003 | if (!mem) { |
@@ -1197,32 +1021,39 @@ static int davinci_mcasp_probe(struct platform_device *pdev) | |||
1197 | return ret; | 1021 | return ret; |
1198 | } | 1022 | } |
1199 | 1023 | ||
1200 | dev->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); | 1024 | mcasp->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); |
1201 | if (!dev->base) { | 1025 | if (!mcasp->base) { |
1202 | dev_err(&pdev->dev, "ioremap failed\n"); | 1026 | dev_err(&pdev->dev, "ioremap failed\n"); |
1203 | ret = -ENOMEM; | 1027 | ret = -ENOMEM; |
1204 | goto err_release_clk; | 1028 | goto err_release_clk; |
1205 | } | 1029 | } |
1206 | 1030 | ||
1207 | dev->op_mode = pdata->op_mode; | 1031 | mcasp->op_mode = pdata->op_mode; |
1208 | dev->tdm_slots = pdata->tdm_slots; | 1032 | mcasp->tdm_slots = pdata->tdm_slots; |
1209 | dev->num_serializer = pdata->num_serializer; | 1033 | mcasp->num_serializer = pdata->num_serializer; |
1210 | dev->serial_dir = pdata->serial_dir; | 1034 | mcasp->serial_dir = pdata->serial_dir; |
1211 | dev->version = pdata->version; | 1035 | mcasp->version = pdata->version; |
1212 | dev->txnumevt = pdata->txnumevt; | 1036 | mcasp->txnumevt = pdata->txnumevt; |
1213 | dev->rxnumevt = pdata->rxnumevt; | 1037 | mcasp->rxnumevt = pdata->rxnumevt; |
1214 | dev->dev = &pdev->dev; | 1038 | |
1039 | mcasp->dev = &pdev->dev; | ||
1215 | 1040 | ||
1216 | dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); | 1041 | dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); |
1217 | if (!dat) | 1042 | if (dat) |
1218 | dat = mem; | 1043 | mcasp->dat_port = true; |
1219 | 1044 | ||
1220 | dma_data = &dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK]; | 1045 | dma_data = &mcasp->dma_params[SNDRV_PCM_STREAM_PLAYBACK]; |
1221 | dma_data->asp_chan_q = pdata->asp_chan_q; | 1046 | dma_data->asp_chan_q = pdata->asp_chan_q; |
1222 | dma_data->ram_chan_q = pdata->ram_chan_q; | 1047 | dma_data->ram_chan_q = pdata->ram_chan_q; |
1223 | dma_data->sram_pool = pdata->sram_pool; | 1048 | dma_data->sram_pool = pdata->sram_pool; |
1224 | dma_data->sram_size = pdata->sram_size_playback; | 1049 | dma_data->sram_size = pdata->sram_size_playback; |
1225 | dma_data->dma_addr = dat->start + pdata->tx_dma_offset; | 1050 | if (dat) |
1051 | dma_data->dma_addr = dat->start; | ||
1052 | else | ||
1053 | dma_data->dma_addr = mem->start + pdata->tx_dma_offset; | ||
1054 | |||
1055 | /* Unconditional dmaengine stuff */ | ||
1056 | mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = dma_data->dma_addr; | ||
1226 | 1057 | ||
1227 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); | 1058 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); |
1228 | if (res) | 1059 | if (res) |
@@ -1230,12 +1061,26 @@ static int davinci_mcasp_probe(struct platform_device *pdev) | |||
1230 | else | 1061 | else |
1231 | dma_data->channel = pdata->tx_dma_channel; | 1062 | dma_data->channel = pdata->tx_dma_channel; |
1232 | 1063 | ||
1233 | dma_data = &dev->dma_params[SNDRV_PCM_STREAM_CAPTURE]; | 1064 | dma_data = &mcasp->dma_params[SNDRV_PCM_STREAM_CAPTURE]; |
1234 | dma_data->asp_chan_q = pdata->asp_chan_q; | 1065 | dma_data->asp_chan_q = pdata->asp_chan_q; |
1235 | dma_data->ram_chan_q = pdata->ram_chan_q; | 1066 | dma_data->ram_chan_q = pdata->ram_chan_q; |
1236 | dma_data->sram_pool = pdata->sram_pool; | 1067 | dma_data->sram_pool = pdata->sram_pool; |
1237 | dma_data->sram_size = pdata->sram_size_capture; | 1068 | dma_data->sram_size = pdata->sram_size_capture; |
1238 | dma_data->dma_addr = dat->start + pdata->rx_dma_offset; | 1069 | if (dat) |
1070 | dma_data->dma_addr = dat->start; | ||
1071 | else | ||
1072 | dma_data->dma_addr = mem->start + pdata->rx_dma_offset; | ||
1073 | |||
1074 | /* Unconditional dmaengine stuff */ | ||
1075 | mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = dma_data->dma_addr; | ||
1076 | |||
1077 | if (mcasp->version < MCASP_VERSION_3) { | ||
1078 | mcasp->fifo_base = DAVINCI_MCASP_V2_AFIFO_BASE; | ||
1079 | /* dma_data->dma_addr is pointing to the data port address */ | ||
1080 | mcasp->dat_port = true; | ||
1081 | } else { | ||
1082 | mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE; | ||
1083 | } | ||
1239 | 1084 | ||
1240 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); | 1085 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); |
1241 | if (res) | 1086 | if (res) |
@@ -1243,17 +1088,26 @@ static int davinci_mcasp_probe(struct platform_device *pdev) | |||
1243 | else | 1088 | else |
1244 | dma_data->channel = pdata->rx_dma_channel; | 1089 | dma_data->channel = pdata->rx_dma_channel; |
1245 | 1090 | ||
1246 | dev_set_drvdata(&pdev->dev, dev); | 1091 | /* Unconditional dmaengine stuff */ |
1092 | mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data = "tx"; | ||
1093 | mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE].filter_data = "rx"; | ||
1094 | |||
1095 | dev_set_drvdata(&pdev->dev, mcasp); | ||
1096 | |||
1097 | mcasp_reparent_fck(pdev); | ||
1098 | |||
1247 | ret = snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, | 1099 | ret = snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, |
1248 | &davinci_mcasp_dai[pdata->op_mode], 1); | 1100 | &davinci_mcasp_dai[pdata->op_mode], 1); |
1249 | 1101 | ||
1250 | if (ret != 0) | 1102 | if (ret != 0) |
1251 | goto err_release_clk; | 1103 | goto err_release_clk; |
1252 | 1104 | ||
1253 | ret = davinci_soc_platform_register(&pdev->dev); | 1105 | if (mcasp->version != MCASP_VERSION_4) { |
1254 | if (ret) { | 1106 | ret = davinci_soc_platform_register(&pdev->dev); |
1255 | dev_err(&pdev->dev, "register PCM failed: %d\n", ret); | 1107 | if (ret) { |
1256 | goto err_unregister_component; | 1108 | dev_err(&pdev->dev, "register PCM failed: %d\n", ret); |
1109 | goto err_unregister_component; | ||
1110 | } | ||
1257 | } | 1111 | } |
1258 | 1112 | ||
1259 | return 0; | 1113 | return 0; |
@@ -1268,9 +1122,11 @@ err_release_clk: | |||
1268 | 1122 | ||
1269 | static int davinci_mcasp_remove(struct platform_device *pdev) | 1123 | static int davinci_mcasp_remove(struct platform_device *pdev) |
1270 | { | 1124 | { |
1125 | struct davinci_mcasp *mcasp = dev_get_drvdata(&pdev->dev); | ||
1271 | 1126 | ||
1272 | snd_soc_unregister_component(&pdev->dev); | 1127 | snd_soc_unregister_component(&pdev->dev); |
1273 | davinci_soc_platform_unregister(&pdev->dev); | 1128 | if (mcasp->version != MCASP_VERSION_4) |
1129 | davinci_soc_platform_unregister(&pdev->dev); | ||
1274 | 1130 | ||
1275 | pm_runtime_put_sync(&pdev->dev); | 1131 | pm_runtime_put_sync(&pdev->dev); |
1276 | pm_runtime_disable(&pdev->dev); | 1132 | pm_runtime_disable(&pdev->dev); |
@@ -1281,32 +1137,30 @@ static int davinci_mcasp_remove(struct platform_device *pdev) | |||
1281 | #ifdef CONFIG_PM_SLEEP | 1137 | #ifdef CONFIG_PM_SLEEP |
1282 | static int davinci_mcasp_suspend(struct device *dev) | 1138 | static int davinci_mcasp_suspend(struct device *dev) |
1283 | { | 1139 | { |
1284 | struct davinci_audio_dev *a = dev_get_drvdata(dev); | 1140 | struct davinci_mcasp *mcasp = dev_get_drvdata(dev); |
1285 | void __iomem *base = a->base; | ||
1286 | 1141 | ||
1287 | a->context.txfmtctl = mcasp_get_reg(base + DAVINCI_MCASP_TXFMCTL_REG); | 1142 | mcasp->context.txfmtctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG); |
1288 | a->context.rxfmtctl = mcasp_get_reg(base + DAVINCI_MCASP_RXFMCTL_REG); | 1143 | mcasp->context.rxfmtctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG); |
1289 | a->context.txfmt = mcasp_get_reg(base + DAVINCI_MCASP_TXFMT_REG); | 1144 | mcasp->context.txfmt = mcasp_get_reg(mcasp, DAVINCI_MCASP_TXFMT_REG); |
1290 | a->context.rxfmt = mcasp_get_reg(base + DAVINCI_MCASP_RXFMT_REG); | 1145 | mcasp->context.rxfmt = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMT_REG); |
1291 | a->context.aclkxctl = mcasp_get_reg(base + DAVINCI_MCASP_ACLKXCTL_REG); | 1146 | mcasp->context.aclkxctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG); |
1292 | a->context.aclkrctl = mcasp_get_reg(base + DAVINCI_MCASP_ACLKRCTL_REG); | 1147 | mcasp->context.aclkrctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKRCTL_REG); |
1293 | a->context.pdir = mcasp_get_reg(base + DAVINCI_MCASP_PDIR_REG); | 1148 | mcasp->context.pdir = mcasp_get_reg(mcasp, DAVINCI_MCASP_PDIR_REG); |
1294 | 1149 | ||
1295 | return 0; | 1150 | return 0; |
1296 | } | 1151 | } |
1297 | 1152 | ||
1298 | static int davinci_mcasp_resume(struct device *dev) | 1153 | static int davinci_mcasp_resume(struct device *dev) |
1299 | { | 1154 | { |
1300 | struct davinci_audio_dev *a = dev_get_drvdata(dev); | 1155 | struct davinci_mcasp *mcasp = dev_get_drvdata(dev); |
1301 | void __iomem *base = a->base; | 1156 | |
1302 | 1157 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG, mcasp->context.txfmtctl); | |
1303 | mcasp_set_reg(base + DAVINCI_MCASP_TXFMCTL_REG, a->context.txfmtctl); | 1158 | mcasp_set_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG, mcasp->context.rxfmtctl); |
1304 | mcasp_set_reg(base + DAVINCI_MCASP_RXFMCTL_REG, a->context.rxfmtctl); | 1159 | mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMT_REG, mcasp->context.txfmt); |
1305 | mcasp_set_reg(base + DAVINCI_MCASP_TXFMT_REG, a->context.txfmt); | 1160 | mcasp_set_reg(mcasp, DAVINCI_MCASP_RXFMT_REG, mcasp->context.rxfmt); |
1306 | mcasp_set_reg(base + DAVINCI_MCASP_RXFMT_REG, a->context.rxfmt); | 1161 | mcasp_set_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, mcasp->context.aclkxctl); |
1307 | mcasp_set_reg(base + DAVINCI_MCASP_ACLKXCTL_REG, a->context.aclkxctl); | 1162 | mcasp_set_reg(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, mcasp->context.aclkrctl); |
1308 | mcasp_set_reg(base + DAVINCI_MCASP_ACLKRCTL_REG, a->context.aclkrctl); | 1163 | mcasp_set_reg(mcasp, DAVINCI_MCASP_PDIR_REG, mcasp->context.pdir); |
1309 | mcasp_set_reg(base + DAVINCI_MCASP_PDIR_REG, a->context.pdir); | ||
1310 | 1164 | ||
1311 | return 0; | 1165 | return 0; |
1312 | } | 1166 | } |
diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h index a2e27e1c32f3..8fed757d6087 100644 --- a/sound/soc/davinci/davinci-mcasp.h +++ b/sound/soc/davinci/davinci-mcasp.h | |||
@@ -18,43 +18,271 @@ | |||
18 | #ifndef DAVINCI_MCASP_H | 18 | #ifndef DAVINCI_MCASP_H |
19 | #define DAVINCI_MCASP_H | 19 | #define DAVINCI_MCASP_H |
20 | 20 | ||
21 | #include <linux/io.h> | 21 | /* |
22 | #include <linux/platform_data/davinci_asp.h> | 22 | * McASP register definitions |
23 | 23 | */ | |
24 | #include "davinci-pcm.h" | 24 | #define DAVINCI_MCASP_PID_REG 0x00 |
25 | 25 | #define DAVINCI_MCASP_PWREMUMGT_REG 0x04 | |
26 | #define DAVINCI_MCASP_RATES SNDRV_PCM_RATE_8000_192000 | 26 | |
27 | #define DAVINCI_MCASP_I2S_DAI 0 | 27 | #define DAVINCI_MCASP_PFUNC_REG 0x10 |
28 | #define DAVINCI_MCASP_DIT_DAI 1 | 28 | #define DAVINCI_MCASP_PDIR_REG 0x14 |
29 | 29 | #define DAVINCI_MCASP_PDOUT_REG 0x18 | |
30 | struct davinci_audio_dev { | 30 | #define DAVINCI_MCASP_PDSET_REG 0x1c |
31 | struct davinci_pcm_dma_params dma_params[2]; | 31 | |
32 | void __iomem *base; | 32 | #define DAVINCI_MCASP_PDCLR_REG 0x20 |
33 | struct device *dev; | 33 | |
34 | 34 | #define DAVINCI_MCASP_TLGC_REG 0x30 | |
35 | /* McASP specific data */ | 35 | #define DAVINCI_MCASP_TLMR_REG 0x34 |
36 | int tdm_slots; | 36 | |
37 | u8 op_mode; | 37 | #define DAVINCI_MCASP_GBLCTL_REG 0x44 |
38 | u8 num_serializer; | 38 | #define DAVINCI_MCASP_AMUTE_REG 0x48 |
39 | u8 *serial_dir; | 39 | #define DAVINCI_MCASP_LBCTL_REG 0x4c |
40 | u8 version; | 40 | |
41 | u16 bclk_lrclk_ratio; | 41 | #define DAVINCI_MCASP_TXDITCTL_REG 0x50 |
42 | 42 | ||
43 | /* McASP FIFO related */ | 43 | #define DAVINCI_MCASP_GBLCTLR_REG 0x60 |
44 | u8 txnumevt; | 44 | #define DAVINCI_MCASP_RXMASK_REG 0x64 |
45 | u8 rxnumevt; | 45 | #define DAVINCI_MCASP_RXFMT_REG 0x68 |
46 | 46 | #define DAVINCI_MCASP_RXFMCTL_REG 0x6c | |
47 | #ifdef CONFIG_PM_SLEEP | 47 | |
48 | struct { | 48 | #define DAVINCI_MCASP_ACLKRCTL_REG 0x70 |
49 | u32 txfmtctl; | 49 | #define DAVINCI_MCASP_AHCLKRCTL_REG 0x74 |
50 | u32 rxfmtctl; | 50 | #define DAVINCI_MCASP_RXTDM_REG 0x78 |
51 | u32 txfmt; | 51 | #define DAVINCI_MCASP_EVTCTLR_REG 0x7c |
52 | u32 rxfmt; | 52 | |
53 | u32 aclkxctl; | 53 | #define DAVINCI_MCASP_RXSTAT_REG 0x80 |
54 | u32 aclkrctl; | 54 | #define DAVINCI_MCASP_RXTDMSLOT_REG 0x84 |
55 | u32 pdir; | 55 | #define DAVINCI_MCASP_RXCLKCHK_REG 0x88 |
56 | } context; | 56 | #define DAVINCI_MCASP_REVTCTL_REG 0x8c |
57 | #endif | 57 | |
58 | }; | 58 | #define DAVINCI_MCASP_GBLCTLX_REG 0xa0 |
59 | #define DAVINCI_MCASP_TXMASK_REG 0xa4 | ||
60 | #define DAVINCI_MCASP_TXFMT_REG 0xa8 | ||
61 | #define DAVINCI_MCASP_TXFMCTL_REG 0xac | ||
62 | |||
63 | #define DAVINCI_MCASP_ACLKXCTL_REG 0xb0 | ||
64 | #define DAVINCI_MCASP_AHCLKXCTL_REG 0xb4 | ||
65 | #define DAVINCI_MCASP_TXTDM_REG 0xb8 | ||
66 | #define DAVINCI_MCASP_EVTCTLX_REG 0xbc | ||
67 | |||
68 | #define DAVINCI_MCASP_TXSTAT_REG 0xc0 | ||
69 | #define DAVINCI_MCASP_TXTDMSLOT_REG 0xc4 | ||
70 | #define DAVINCI_MCASP_TXCLKCHK_REG 0xc8 | ||
71 | #define DAVINCI_MCASP_XEVTCTL_REG 0xcc | ||
72 | |||
73 | /* Left(even TDM Slot) Channel Status Register File */ | ||
74 | #define DAVINCI_MCASP_DITCSRA_REG 0x100 | ||
75 | /* Right(odd TDM slot) Channel Status Register File */ | ||
76 | #define DAVINCI_MCASP_DITCSRB_REG 0x118 | ||
77 | /* Left(even TDM slot) User Data Register File */ | ||
78 | #define DAVINCI_MCASP_DITUDRA_REG 0x130 | ||
79 | /* Right(odd TDM Slot) User Data Register File */ | ||
80 | #define DAVINCI_MCASP_DITUDRB_REG 0x148 | ||
81 | |||
82 | /* Serializer n Control Register */ | ||
83 | #define DAVINCI_MCASP_XRSRCTL_BASE_REG 0x180 | ||
84 | #define DAVINCI_MCASP_XRSRCTL_REG(n) (DAVINCI_MCASP_XRSRCTL_BASE_REG + \ | ||
85 | (n << 2)) | ||
86 | |||
87 | /* Transmit Buffer for Serializer n */ | ||
88 | #define DAVINCI_MCASP_TXBUF_REG 0x200 | ||
89 | /* Receive Buffer for Serializer n */ | ||
90 | #define DAVINCI_MCASP_RXBUF_REG 0x280 | ||
91 | |||
92 | /* McASP FIFO Registers */ | ||
93 | #define DAVINCI_MCASP_V2_AFIFO_BASE (0x1010) | ||
94 | #define DAVINCI_MCASP_V3_AFIFO_BASE (0x1000) | ||
95 | |||
96 | /* FIFO register offsets from AFIFO base */ | ||
97 | #define MCASP_WFIFOCTL_OFFSET (0x0) | ||
98 | #define MCASP_WFIFOSTS_OFFSET (0x4) | ||
99 | #define MCASP_RFIFOCTL_OFFSET (0x8) | ||
100 | #define MCASP_RFIFOSTS_OFFSET (0xc) | ||
101 | |||
102 | /* | ||
103 | * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management | ||
104 | * Register Bits | ||
105 | */ | ||
106 | #define MCASP_FREE BIT(0) | ||
107 | #define MCASP_SOFT BIT(1) | ||
108 | |||
109 | /* | ||
110 | * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits | ||
111 | */ | ||
112 | #define AXR(n) (1<<n) | ||
113 | #define PFUNC_AMUTE BIT(25) | ||
114 | #define ACLKX BIT(26) | ||
115 | #define AHCLKX BIT(27) | ||
116 | #define AFSX BIT(28) | ||
117 | #define ACLKR BIT(29) | ||
118 | #define AHCLKR BIT(30) | ||
119 | #define AFSR BIT(31) | ||
120 | |||
121 | /* | ||
122 | * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits | ||
123 | */ | ||
124 | #define AXR(n) (1<<n) | ||
125 | #define PDIR_AMUTE BIT(25) | ||
126 | #define ACLKX BIT(26) | ||
127 | #define AHCLKX BIT(27) | ||
128 | #define AFSX BIT(28) | ||
129 | #define ACLKR BIT(29) | ||
130 | #define AHCLKR BIT(30) | ||
131 | #define AFSR BIT(31) | ||
132 | |||
133 | /* | ||
134 | * DAVINCI_MCASP_TXDITCTL_REG - Transmit DIT Control Register Bits | ||
135 | */ | ||
136 | #define DITEN BIT(0) /* Transmit DIT mode enable/disable */ | ||
137 | #define VA BIT(2) | ||
138 | #define VB BIT(3) | ||
139 | |||
140 | /* | ||
141 | * DAVINCI_MCASP_TXFMT_REG - Transmit Bitstream Format Register Bits | ||
142 | */ | ||
143 | #define TXROT(val) (val) | ||
144 | #define TXSEL BIT(3) | ||
145 | #define TXSSZ(val) (val<<4) | ||
146 | #define TXPBIT(val) (val<<8) | ||
147 | #define TXPAD(val) (val<<13) | ||
148 | #define TXORD BIT(15) | ||
149 | #define FSXDLY(val) (val<<16) | ||
150 | |||
151 | /* | ||
152 | * DAVINCI_MCASP_RXFMT_REG - Receive Bitstream Format Register Bits | ||
153 | */ | ||
154 | #define RXROT(val) (val) | ||
155 | #define RXSEL BIT(3) | ||
156 | #define RXSSZ(val) (val<<4) | ||
157 | #define RXPBIT(val) (val<<8) | ||
158 | #define RXPAD(val) (val<<13) | ||
159 | #define RXORD BIT(15) | ||
160 | #define FSRDLY(val) (val<<16) | ||
161 | |||
162 | /* | ||
163 | * DAVINCI_MCASP_TXFMCTL_REG - Transmit Frame Control Register Bits | ||
164 | */ | ||
165 | #define FSXPOL BIT(0) | ||
166 | #define AFSXE BIT(1) | ||
167 | #define FSXDUR BIT(4) | ||
168 | #define FSXMOD(val) (val<<7) | ||
169 | |||
170 | /* | ||
171 | * DAVINCI_MCASP_RXFMCTL_REG - Receive Frame Control Register Bits | ||
172 | */ | ||
173 | #define FSRPOL BIT(0) | ||
174 | #define AFSRE BIT(1) | ||
175 | #define FSRDUR BIT(4) | ||
176 | #define FSRMOD(val) (val<<7) | ||
177 | |||
178 | /* | ||
179 | * DAVINCI_MCASP_ACLKXCTL_REG - Transmit Clock Control Register Bits | ||
180 | */ | ||
181 | #define ACLKXDIV(val) (val) | ||
182 | #define ACLKXE BIT(5) | ||
183 | #define TX_ASYNC BIT(6) | ||
184 | #define ACLKXPOL BIT(7) | ||
185 | #define ACLKXDIV_MASK 0x1f | ||
186 | |||
187 | /* | ||
188 | * DAVINCI_MCASP_ACLKRCTL_REG Receive Clock Control Register Bits | ||
189 | */ | ||
190 | #define ACLKRDIV(val) (val) | ||
191 | #define ACLKRE BIT(5) | ||
192 | #define RX_ASYNC BIT(6) | ||
193 | #define ACLKRPOL BIT(7) | ||
194 | #define ACLKRDIV_MASK 0x1f | ||
195 | |||
196 | /* | ||
197 | * DAVINCI_MCASP_AHCLKXCTL_REG - High Frequency Transmit Clock Control | ||
198 | * Register Bits | ||
199 | */ | ||
200 | #define AHCLKXDIV(val) (val) | ||
201 | #define AHCLKXPOL BIT(14) | ||
202 | #define AHCLKXE BIT(15) | ||
203 | #define AHCLKXDIV_MASK 0xfff | ||
204 | |||
205 | /* | ||
206 | * DAVINCI_MCASP_AHCLKRCTL_REG - High Frequency Receive Clock Control | ||
207 | * Register Bits | ||
208 | */ | ||
209 | #define AHCLKRDIV(val) (val) | ||
210 | #define AHCLKRPOL BIT(14) | ||
211 | #define AHCLKRE BIT(15) | ||
212 | #define AHCLKRDIV_MASK 0xfff | ||
213 | |||
214 | /* | ||
215 | * DAVINCI_MCASP_XRSRCTL_BASE_REG - Serializer Control Register Bits | ||
216 | */ | ||
217 | #define MODE(val) (val) | ||
218 | #define DISMOD (val)(val<<2) | ||
219 | #define TXSTATE BIT(4) | ||
220 | #define RXSTATE BIT(5) | ||
221 | #define SRMOD_MASK 3 | ||
222 | #define SRMOD_INACTIVE 0 | ||
223 | |||
224 | /* | ||
225 | * DAVINCI_MCASP_LBCTL_REG - Loop Back Control Register Bits | ||
226 | */ | ||
227 | #define LBEN BIT(0) | ||
228 | #define LBORD BIT(1) | ||
229 | #define LBGENMODE(val) (val<<2) | ||
230 | |||
231 | /* | ||
232 | * DAVINCI_MCASP_TXTDMSLOT_REG - Transmit TDM Slot Register configuration | ||
233 | */ | ||
234 | #define TXTDMS(n) (1<<n) | ||
235 | |||
236 | /* | ||
237 | * DAVINCI_MCASP_RXTDMSLOT_REG - Receive TDM Slot Register configuration | ||
238 | */ | ||
239 | #define RXTDMS(n) (1<<n) | ||
240 | |||
241 | /* | ||
242 | * DAVINCI_MCASP_GBLCTL_REG - Global Control Register Bits | ||
243 | */ | ||
244 | #define RXCLKRST BIT(0) /* Receiver Clock Divider Reset */ | ||
245 | #define RXHCLKRST BIT(1) /* Receiver High Frequency Clock Divider */ | ||
246 | #define RXSERCLR BIT(2) /* Receiver Serializer Clear */ | ||
247 | #define RXSMRST BIT(3) /* Receiver State Machine Reset */ | ||
248 | #define RXFSRST BIT(4) /* Frame Sync Generator Reset */ | ||
249 | #define TXCLKRST BIT(8) /* Transmitter Clock Divider Reset */ | ||
250 | #define TXHCLKRST BIT(9) /* Transmitter High Frequency Clock Divider*/ | ||
251 | #define TXSERCLR BIT(10) /* Transmit Serializer Clear */ | ||
252 | #define TXSMRST BIT(11) /* Transmitter State Machine Reset */ | ||
253 | #define TXFSRST BIT(12) /* Frame Sync Generator Reset */ | ||
254 | |||
255 | /* | ||
256 | * DAVINCI_MCASP_AMUTE_REG - Mute Control Register Bits | ||
257 | */ | ||
258 | #define MUTENA(val) (val) | ||
259 | #define MUTEINPOL BIT(2) | ||
260 | #define MUTEINENA BIT(3) | ||
261 | #define MUTEIN BIT(4) | ||
262 | #define MUTER BIT(5) | ||
263 | #define MUTEX BIT(6) | ||
264 | #define MUTEFSR BIT(7) | ||
265 | #define MUTEFSX BIT(8) | ||
266 | #define MUTEBADCLKR BIT(9) | ||
267 | #define MUTEBADCLKX BIT(10) | ||
268 | #define MUTERXDMAERR BIT(11) | ||
269 | #define MUTETXDMAERR BIT(12) | ||
270 | |||
271 | /* | ||
272 | * DAVINCI_MCASP_REVTCTL_REG - Receiver DMA Event Control Register bits | ||
273 | */ | ||
274 | #define RXDATADMADIS BIT(0) | ||
275 | |||
276 | /* | ||
277 | * DAVINCI_MCASP_XEVTCTL_REG - Transmitter DMA Event Control Register bits | ||
278 | */ | ||
279 | #define TXDATADMADIS BIT(0) | ||
280 | |||
281 | /* | ||
282 | * DAVINCI_MCASP_W[R]FIFOCTL - Write/Read FIFO Control Register bits | ||
283 | */ | ||
284 | #define FIFO_ENABLE BIT(16) | ||
285 | #define NUMEVT_MASK (0xFF << 8) | ||
286 | #define NUMDMA_MASK (0xFF) | ||
59 | 287 | ||
60 | #endif /* DAVINCI_MCASP_H */ | 288 | #endif /* DAVINCI_MCASP_H */ |
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c index fb5d107f5603..14145cdf8a11 100644 --- a/sound/soc/davinci/davinci-pcm.c +++ b/sound/soc/davinci/davinci-pcm.c | |||
@@ -46,33 +46,11 @@ static void print_buf_info(int slot, char *name) | |||
46 | } | 46 | } |
47 | #endif | 47 | #endif |
48 | 48 | ||
49 | #define DAVINCI_PCM_FMTBITS (\ | ||
50 | SNDRV_PCM_FMTBIT_S8 |\ | ||
51 | SNDRV_PCM_FMTBIT_U8 |\ | ||
52 | SNDRV_PCM_FMTBIT_S16_LE |\ | ||
53 | SNDRV_PCM_FMTBIT_S16_BE |\ | ||
54 | SNDRV_PCM_FMTBIT_U16_LE |\ | ||
55 | SNDRV_PCM_FMTBIT_U16_BE |\ | ||
56 | SNDRV_PCM_FMTBIT_S24_LE |\ | ||
57 | SNDRV_PCM_FMTBIT_S24_BE |\ | ||
58 | SNDRV_PCM_FMTBIT_U24_LE |\ | ||
59 | SNDRV_PCM_FMTBIT_U24_BE |\ | ||
60 | SNDRV_PCM_FMTBIT_S32_LE |\ | ||
61 | SNDRV_PCM_FMTBIT_S32_BE |\ | ||
62 | SNDRV_PCM_FMTBIT_U32_LE |\ | ||
63 | SNDRV_PCM_FMTBIT_U32_BE) | ||
64 | |||
65 | static struct snd_pcm_hardware pcm_hardware_playback = { | 49 | static struct snd_pcm_hardware pcm_hardware_playback = { |
66 | .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 50 | .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
67 | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | 51 | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | |
68 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME| | 52 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME| |
69 | SNDRV_PCM_INFO_BATCH), | 53 | SNDRV_PCM_INFO_BATCH), |
70 | .formats = DAVINCI_PCM_FMTBITS, | ||
71 | .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT, | ||
72 | .rate_min = 8000, | ||
73 | .rate_max = 192000, | ||
74 | .channels_min = 2, | ||
75 | .channels_max = 384, | ||
76 | .buffer_bytes_max = 128 * 1024, | 54 | .buffer_bytes_max = 128 * 1024, |
77 | .period_bytes_min = 32, | 55 | .period_bytes_min = 32, |
78 | .period_bytes_max = 8 * 1024, | 56 | .period_bytes_max = 8 * 1024, |
@@ -86,12 +64,6 @@ static struct snd_pcm_hardware pcm_hardware_capture = { | |||
86 | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | 64 | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | |
87 | SNDRV_PCM_INFO_PAUSE | | 65 | SNDRV_PCM_INFO_PAUSE | |
88 | SNDRV_PCM_INFO_BATCH), | 66 | SNDRV_PCM_INFO_BATCH), |
89 | .formats = DAVINCI_PCM_FMTBITS, | ||
90 | .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT, | ||
91 | .rate_min = 8000, | ||
92 | .rate_max = 192000, | ||
93 | .channels_min = 2, | ||
94 | .channels_max = 384, | ||
95 | .buffer_bytes_max = 128 * 1024, | 67 | .buffer_bytes_max = 128 * 1024, |
96 | .period_bytes_min = 32, | 68 | .period_bytes_min = 32, |
97 | .period_bytes_max = 8 * 1024, | 69 | .period_bytes_max = 8 * 1024, |
diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig index b7ab71f2ccc1..324988dea4bd 100644 --- a/sound/soc/fsl/Kconfig +++ b/sound/soc/fsl/Kconfig | |||
@@ -1,9 +1,16 @@ | |||
1 | config SND_SOC_FSL_SAI | ||
2 | tristate | ||
3 | select SND_SOC_GENERIC_DMAENGINE_PCM | ||
4 | |||
1 | config SND_SOC_FSL_SSI | 5 | config SND_SOC_FSL_SSI |
2 | tristate | 6 | tristate |
3 | 7 | ||
4 | config SND_SOC_FSL_SPDIF | 8 | config SND_SOC_FSL_SPDIF |
5 | tristate | 9 | tristate |
6 | 10 | ||
11 | config SND_SOC_FSL_ESAI | ||
12 | tristate | ||
13 | |||
7 | config SND_SOC_FSL_UTILS | 14 | config SND_SOC_FSL_UTILS |
8 | tristate | 15 | tristate |
9 | 16 | ||
@@ -197,7 +204,6 @@ config SND_SOC_IMX_SPDIF | |||
197 | tristate "SoC Audio support for i.MX boards with S/PDIF" | 204 | tristate "SoC Audio support for i.MX boards with S/PDIF" |
198 | select SND_SOC_IMX_PCM_DMA | 205 | select SND_SOC_IMX_PCM_DMA |
199 | select SND_SOC_FSL_SPDIF | 206 | select SND_SOC_FSL_SPDIF |
200 | select SND_SOC_SPDIF | ||
201 | select REGMAP_MMIO | 207 | select REGMAP_MMIO |
202 | help | 208 | help |
203 | SoC Audio support for i.MX boards with S/PDIF | 209 | SoC Audio support for i.MX boards with S/PDIF |
diff --git a/sound/soc/fsl/Makefile b/sound/soc/fsl/Makefile index 8db705b0fdf9..b12ad4b9b4da 100644 --- a/sound/soc/fsl/Makefile +++ b/sound/soc/fsl/Makefile | |||
@@ -10,13 +10,17 @@ obj-$(CONFIG_SND_SOC_P1022_DS) += snd-soc-p1022-ds.o | |||
10 | snd-soc-p1022-rdk-objs := p1022_rdk.o | 10 | snd-soc-p1022-rdk-objs := p1022_rdk.o |
11 | obj-$(CONFIG_SND_SOC_P1022_RDK) += snd-soc-p1022-rdk.o | 11 | obj-$(CONFIG_SND_SOC_P1022_RDK) += snd-soc-p1022-rdk.o |
12 | 12 | ||
13 | # Freescale PowerPC SSI/DMA Platform Support | 13 | # Freescale SSI/DMA/SAI/SPDIF Support |
14 | snd-soc-fsl-sai-objs := fsl_sai.o | ||
14 | snd-soc-fsl-ssi-objs := fsl_ssi.o | 15 | snd-soc-fsl-ssi-objs := fsl_ssi.o |
15 | snd-soc-fsl-spdif-objs := fsl_spdif.o | 16 | snd-soc-fsl-spdif-objs := fsl_spdif.o |
17 | snd-soc-fsl-esai-objs := fsl_esai.o | ||
16 | snd-soc-fsl-utils-objs := fsl_utils.o | 18 | snd-soc-fsl-utils-objs := fsl_utils.o |
17 | snd-soc-fsl-dma-objs := fsl_dma.o | 19 | snd-soc-fsl-dma-objs := fsl_dma.o |
20 | obj-$(CONFIG_SND_SOC_FSL_SAI) += snd-soc-fsl-sai.o | ||
18 | obj-$(CONFIG_SND_SOC_FSL_SSI) += snd-soc-fsl-ssi.o | 21 | obj-$(CONFIG_SND_SOC_FSL_SSI) += snd-soc-fsl-ssi.o |
19 | obj-$(CONFIG_SND_SOC_FSL_SPDIF) += snd-soc-fsl-spdif.o | 22 | obj-$(CONFIG_SND_SOC_FSL_SPDIF) += snd-soc-fsl-spdif.o |
23 | obj-$(CONFIG_SND_SOC_FSL_ESAI) += snd-soc-fsl-esai.o | ||
20 | obj-$(CONFIG_SND_SOC_FSL_UTILS) += snd-soc-fsl-utils.o | 24 | obj-$(CONFIG_SND_SOC_FSL_UTILS) += snd-soc-fsl-utils.o |
21 | obj-$(CONFIG_SND_SOC_POWERPC_DMA) += snd-soc-fsl-dma.o | 25 | obj-$(CONFIG_SND_SOC_POWERPC_DMA) += snd-soc-fsl-dma.o |
22 | 26 | ||
diff --git a/sound/soc/fsl/fsl_dma.c b/sound/soc/fsl/fsl_dma.c index fb9bb9eb5ca3..6bb0ea59284f 100644 --- a/sound/soc/fsl/fsl_dma.c +++ b/sound/soc/fsl/fsl_dma.c | |||
@@ -55,10 +55,6 @@ | |||
55 | SNDRV_PCM_FMTBIT_S32_BE | \ | 55 | SNDRV_PCM_FMTBIT_S32_BE | \ |
56 | SNDRV_PCM_FMTBIT_U32_LE | \ | 56 | SNDRV_PCM_FMTBIT_U32_LE | \ |
57 | SNDRV_PCM_FMTBIT_U32_BE) | 57 | SNDRV_PCM_FMTBIT_U32_BE) |
58 | |||
59 | #define FSLDMA_PCM_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \ | ||
60 | SNDRV_PCM_RATE_CONTINUOUS) | ||
61 | |||
62 | struct dma_object { | 58 | struct dma_object { |
63 | struct snd_soc_platform_driver dai; | 59 | struct snd_soc_platform_driver dai; |
64 | dma_addr_t ssi_stx_phys; | 60 | dma_addr_t ssi_stx_phys; |
@@ -140,9 +136,6 @@ static const struct snd_pcm_hardware fsl_dma_hardware = { | |||
140 | SNDRV_PCM_INFO_JOINT_DUPLEX | | 136 | SNDRV_PCM_INFO_JOINT_DUPLEX | |
141 | SNDRV_PCM_INFO_PAUSE, | 137 | SNDRV_PCM_INFO_PAUSE, |
142 | .formats = FSLDMA_PCM_FORMATS, | 138 | .formats = FSLDMA_PCM_FORMATS, |
143 | .rates = FSLDMA_PCM_RATES, | ||
144 | .rate_min = 5512, | ||
145 | .rate_max = 192000, | ||
146 | .period_bytes_min = 512, /* A reasonable limit */ | 139 | .period_bytes_min = 512, /* A reasonable limit */ |
147 | .period_bytes_max = (u32) -1, | 140 | .period_bytes_max = (u32) -1, |
148 | .periods_min = NUM_DMA_LINKS, | 141 | .periods_min = NUM_DMA_LINKS, |
@@ -852,7 +845,7 @@ static void fsl_dma_free_dma_buffers(struct snd_pcm *pcm) | |||
852 | } | 845 | } |
853 | 846 | ||
854 | /** | 847 | /** |
855 | * find_ssi_node -- returns the SSI node that points to his DMA channel node | 848 | * find_ssi_node -- returns the SSI node that points to its DMA channel node |
856 | * | 849 | * |
857 | * Although this DMA driver attempts to operate independently of the other | 850 | * Although this DMA driver attempts to operate independently of the other |
858 | * devices, it still needs to determine some information about the SSI device | 851 | * devices, it still needs to determine some information about the SSI device |
diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c new file mode 100644 index 000000000000..d0c72ed261e7 --- /dev/null +++ b/sound/soc/fsl/fsl_esai.c | |||
@@ -0,0 +1,815 @@ | |||
1 | /* | ||
2 | * Freescale ESAI ALSA SoC Digital Audio Interface (DAI) driver | ||
3 | * | ||
4 | * Copyright (C) 2014 Freescale Semiconductor, Inc. | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/clk.h> | ||
12 | #include <linux/dmaengine.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/of_irq.h> | ||
15 | #include <linux/of_platform.h> | ||
16 | #include <sound/dmaengine_pcm.h> | ||
17 | #include <sound/pcm_params.h> | ||
18 | |||
19 | #include "fsl_esai.h" | ||
20 | #include "imx-pcm.h" | ||
21 | |||
22 | #define FSL_ESAI_RATES SNDRV_PCM_RATE_8000_192000 | ||
23 | #define FSL_ESAI_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ | ||
24 | SNDRV_PCM_FMTBIT_S16_LE | \ | ||
25 | SNDRV_PCM_FMTBIT_S20_3LE | \ | ||
26 | SNDRV_PCM_FMTBIT_S24_LE) | ||
27 | |||
28 | /** | ||
29 | * fsl_esai: ESAI private data | ||
30 | * | ||
31 | * @dma_params_rx: DMA parameters for receive channel | ||
32 | * @dma_params_tx: DMA parameters for transmit channel | ||
33 | * @pdev: platform device pointer | ||
34 | * @regmap: regmap handler | ||
35 | * @coreclk: clock source to access register | ||
36 | * @extalclk: esai clock source to derive HCK, SCK and FS | ||
37 | * @fsysclk: system clock source to derive HCK, SCK and FS | ||
38 | * @fifo_depth: depth of tx/rx FIFO | ||
39 | * @slot_width: width of each DAI slot | ||
40 | * @hck_rate: clock rate of desired HCKx clock | ||
41 | * @sck_div: if using PSR/PM dividers for SCKx clock | ||
42 | * @slave_mode: if fully using DAI slave mode | ||
43 | * @synchronous: if using tx/rx synchronous mode | ||
44 | * @name: driver name | ||
45 | */ | ||
46 | struct fsl_esai { | ||
47 | struct snd_dmaengine_dai_dma_data dma_params_rx; | ||
48 | struct snd_dmaengine_dai_dma_data dma_params_tx; | ||
49 | struct platform_device *pdev; | ||
50 | struct regmap *regmap; | ||
51 | struct clk *coreclk; | ||
52 | struct clk *extalclk; | ||
53 | struct clk *fsysclk; | ||
54 | u32 fifo_depth; | ||
55 | u32 slot_width; | ||
56 | u32 hck_rate[2]; | ||
57 | bool sck_div[2]; | ||
58 | bool slave_mode; | ||
59 | bool synchronous; | ||
60 | char name[32]; | ||
61 | }; | ||
62 | |||
63 | static irqreturn_t esai_isr(int irq, void *devid) | ||
64 | { | ||
65 | struct fsl_esai *esai_priv = (struct fsl_esai *)devid; | ||
66 | struct platform_device *pdev = esai_priv->pdev; | ||
67 | u32 esr; | ||
68 | |||
69 | regmap_read(esai_priv->regmap, REG_ESAI_ESR, &esr); | ||
70 | |||
71 | if (esr & ESAI_ESR_TINIT_MASK) | ||
72 | dev_dbg(&pdev->dev, "isr: Transmition Initialized\n"); | ||
73 | |||
74 | if (esr & ESAI_ESR_RFF_MASK) | ||
75 | dev_warn(&pdev->dev, "isr: Receiving overrun\n"); | ||
76 | |||
77 | if (esr & ESAI_ESR_TFE_MASK) | ||
78 | dev_warn(&pdev->dev, "isr: Transmition underrun\n"); | ||
79 | |||
80 | if (esr & ESAI_ESR_TLS_MASK) | ||
81 | dev_dbg(&pdev->dev, "isr: Just transmitted the last slot\n"); | ||
82 | |||
83 | if (esr & ESAI_ESR_TDE_MASK) | ||
84 | dev_dbg(&pdev->dev, "isr: Transmition data exception\n"); | ||
85 | |||
86 | if (esr & ESAI_ESR_TED_MASK) | ||
87 | dev_dbg(&pdev->dev, "isr: Transmitting even slots\n"); | ||
88 | |||
89 | if (esr & ESAI_ESR_TD_MASK) | ||
90 | dev_dbg(&pdev->dev, "isr: Transmitting data\n"); | ||
91 | |||
92 | if (esr & ESAI_ESR_RLS_MASK) | ||
93 | dev_dbg(&pdev->dev, "isr: Just received the last slot\n"); | ||
94 | |||
95 | if (esr & ESAI_ESR_RDE_MASK) | ||
96 | dev_dbg(&pdev->dev, "isr: Receiving data exception\n"); | ||
97 | |||
98 | if (esr & ESAI_ESR_RED_MASK) | ||
99 | dev_dbg(&pdev->dev, "isr: Receiving even slots\n"); | ||
100 | |||
101 | if (esr & ESAI_ESR_RD_MASK) | ||
102 | dev_dbg(&pdev->dev, "isr: Receiving data\n"); | ||
103 | |||
104 | return IRQ_HANDLED; | ||
105 | } | ||
106 | |||
107 | /** | ||
108 | * This function is used to calculate the divisors of psr, pm, fp and it is | ||
109 | * supposed to be called in set_dai_sysclk() and set_bclk(). | ||
110 | * | ||
111 | * @ratio: desired overall ratio for the paticipating dividers | ||
112 | * @usefp: for HCK setting, there is no need to set fp divider | ||
113 | * @fp: bypass other dividers by setting fp directly if fp != 0 | ||
114 | * @tx: current setting is for playback or capture | ||
115 | */ | ||
116 | static int fsl_esai_divisor_cal(struct snd_soc_dai *dai, bool tx, u32 ratio, | ||
117 | bool usefp, u32 fp) | ||
118 | { | ||
119 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
120 | u32 psr, pm = 999, maxfp, prod, sub, savesub, i, j; | ||
121 | |||
122 | maxfp = usefp ? 16 : 1; | ||
123 | |||
124 | if (usefp && fp) | ||
125 | goto out_fp; | ||
126 | |||
127 | if (ratio > 2 * 8 * 256 * maxfp || ratio < 2) { | ||
128 | dev_err(dai->dev, "the ratio is out of range (2 ~ %d)\n", | ||
129 | 2 * 8 * 256 * maxfp); | ||
130 | return -EINVAL; | ||
131 | } else if (ratio % 2) { | ||
132 | dev_err(dai->dev, "the raio must be even if using upper divider\n"); | ||
133 | return -EINVAL; | ||
134 | } | ||
135 | |||
136 | ratio /= 2; | ||
137 | |||
138 | psr = ratio <= 256 * maxfp ? ESAI_xCCR_xPSR_BYPASS : ESAI_xCCR_xPSR_DIV8; | ||
139 | |||
140 | /* Set the max fluctuation -- 0.1% of the max devisor */ | ||
141 | savesub = (psr ? 1 : 8) * 256 * maxfp / 1000; | ||
142 | |||
143 | /* Find the best value for PM */ | ||
144 | for (i = 1; i <= 256; i++) { | ||
145 | for (j = 1; j <= maxfp; j++) { | ||
146 | /* PSR (1 or 8) * PM (1 ~ 256) * FP (1 ~ 16) */ | ||
147 | prod = (psr ? 1 : 8) * i * j; | ||
148 | |||
149 | if (prod == ratio) | ||
150 | sub = 0; | ||
151 | else if (prod / ratio == 1) | ||
152 | sub = prod - ratio; | ||
153 | else if (ratio / prod == 1) | ||
154 | sub = ratio - prod; | ||
155 | else | ||
156 | continue; | ||
157 | |||
158 | /* Calculate the fraction */ | ||
159 | sub = sub * 1000 / ratio; | ||
160 | if (sub < savesub) { | ||
161 | savesub = sub; | ||
162 | pm = i; | ||
163 | fp = j; | ||
164 | } | ||
165 | |||
166 | /* We are lucky */ | ||
167 | if (savesub == 0) | ||
168 | goto out; | ||
169 | } | ||
170 | } | ||
171 | |||
172 | if (pm == 999) { | ||
173 | dev_err(dai->dev, "failed to calculate proper divisors\n"); | ||
174 | return -EINVAL; | ||
175 | } | ||
176 | |||
177 | out: | ||
178 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx), | ||
179 | ESAI_xCCR_xPSR_MASK | ESAI_xCCR_xPM_MASK, | ||
180 | psr | ESAI_xCCR_xPM(pm)); | ||
181 | |||
182 | out_fp: | ||
183 | /* Bypass fp if not being required */ | ||
184 | if (maxfp <= 1) | ||
185 | return 0; | ||
186 | |||
187 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx), | ||
188 | ESAI_xCCR_xFP_MASK, ESAI_xCCR_xFP(fp)); | ||
189 | |||
190 | return 0; | ||
191 | } | ||
192 | |||
193 | /** | ||
194 | * This function mainly configures the clock frequency of MCLK (HCKT/HCKR) | ||
195 | * | ||
196 | * @Parameters: | ||
197 | * clk_id: The clock source of HCKT/HCKR | ||
198 | * (Input from outside; output from inside, FSYS or EXTAL) | ||
199 | * freq: The required clock rate of HCKT/HCKR | ||
200 | * dir: The clock direction of HCKT/HCKR | ||
201 | * | ||
202 | * Note: If the direction is input, we do not care about clk_id. | ||
203 | */ | ||
204 | static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, | ||
205 | unsigned int freq, int dir) | ||
206 | { | ||
207 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
208 | struct clk *clksrc = esai_priv->extalclk; | ||
209 | bool tx = clk_id <= ESAI_HCKT_EXTAL; | ||
210 | bool in = dir == SND_SOC_CLOCK_IN; | ||
211 | u32 ret, ratio, ecr = 0; | ||
212 | unsigned long clk_rate; | ||
213 | |||
214 | /* sck_div can be only bypassed if ETO/ERO=0 and SNC_SOC_CLOCK_OUT */ | ||
215 | esai_priv->sck_div[tx] = true; | ||
216 | |||
217 | /* Set the direction of HCKT/HCKR pins */ | ||
218 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx), | ||
219 | ESAI_xCCR_xHCKD, in ? 0 : ESAI_xCCR_xHCKD); | ||
220 | |||
221 | if (in) | ||
222 | goto out; | ||
223 | |||
224 | switch (clk_id) { | ||
225 | case ESAI_HCKT_FSYS: | ||
226 | case ESAI_HCKR_FSYS: | ||
227 | clksrc = esai_priv->fsysclk; | ||
228 | break; | ||
229 | case ESAI_HCKT_EXTAL: | ||
230 | ecr |= ESAI_ECR_ETI; | ||
231 | case ESAI_HCKR_EXTAL: | ||
232 | ecr |= ESAI_ECR_ERI; | ||
233 | break; | ||
234 | default: | ||
235 | return -EINVAL; | ||
236 | } | ||
237 | |||
238 | if (IS_ERR(clksrc)) { | ||
239 | dev_err(dai->dev, "no assigned %s clock\n", | ||
240 | clk_id % 2 ? "extal" : "fsys"); | ||
241 | return PTR_ERR(clksrc); | ||
242 | } | ||
243 | clk_rate = clk_get_rate(clksrc); | ||
244 | |||
245 | ratio = clk_rate / freq; | ||
246 | if (ratio * freq > clk_rate) | ||
247 | ret = ratio * freq - clk_rate; | ||
248 | else if (ratio * freq < clk_rate) | ||
249 | ret = clk_rate - ratio * freq; | ||
250 | else | ||
251 | ret = 0; | ||
252 | |||
253 | /* Block if clock source can not be divided into the required rate */ | ||
254 | if (ret != 0 && clk_rate / ret < 1000) { | ||
255 | dev_err(dai->dev, "failed to derive required HCK%c rate\n", | ||
256 | tx ? 'T' : 'R'); | ||
257 | return -EINVAL; | ||
258 | } | ||
259 | |||
260 | if (ratio == 1) { | ||
261 | /* Bypass all the dividers if not being needed */ | ||
262 | ecr |= tx ? ESAI_ECR_ETO : ESAI_ECR_ERO; | ||
263 | goto out; | ||
264 | } | ||
265 | |||
266 | ret = fsl_esai_divisor_cal(dai, tx, ratio, false, 0); | ||
267 | if (ret) | ||
268 | return ret; | ||
269 | |||
270 | esai_priv->sck_div[tx] = false; | ||
271 | |||
272 | out: | ||
273 | esai_priv->hck_rate[tx] = freq; | ||
274 | |||
275 | regmap_update_bits(esai_priv->regmap, REG_ESAI_ECR, | ||
276 | tx ? ESAI_ECR_ETI | ESAI_ECR_ETO : | ||
277 | ESAI_ECR_ERI | ESAI_ECR_ERO, ecr); | ||
278 | |||
279 | return 0; | ||
280 | } | ||
281 | |||
282 | /** | ||
283 | * This function configures the related dividers according to the bclk rate | ||
284 | */ | ||
285 | static int fsl_esai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq) | ||
286 | { | ||
287 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
288 | u32 hck_rate = esai_priv->hck_rate[tx]; | ||
289 | u32 sub, ratio = hck_rate / freq; | ||
290 | |||
291 | /* Don't apply for fully slave mode*/ | ||
292 | if (esai_priv->slave_mode) | ||
293 | return 0; | ||
294 | |||
295 | if (ratio * freq > hck_rate) | ||
296 | sub = ratio * freq - hck_rate; | ||
297 | else if (ratio * freq < hck_rate) | ||
298 | sub = hck_rate - ratio * freq; | ||
299 | else | ||
300 | sub = 0; | ||
301 | |||
302 | /* Block if clock source can not be divided into the required rate */ | ||
303 | if (sub != 0 && hck_rate / sub < 1000) { | ||
304 | dev_err(dai->dev, "failed to derive required SCK%c rate\n", | ||
305 | tx ? 'T' : 'R'); | ||
306 | return -EINVAL; | ||
307 | } | ||
308 | |||
309 | if (esai_priv->sck_div[tx] && (ratio > 16 || ratio == 0)) { | ||
310 | dev_err(dai->dev, "the ratio is out of range (1 ~ 16)\n"); | ||
311 | return -EINVAL; | ||
312 | } | ||
313 | |||
314 | return fsl_esai_divisor_cal(dai, tx, ratio, true, | ||
315 | esai_priv->sck_div[tx] ? 0 : ratio); | ||
316 | } | ||
317 | |||
318 | static int fsl_esai_set_dai_tdm_slot(struct snd_soc_dai *dai, u32 tx_mask, | ||
319 | u32 rx_mask, int slots, int slot_width) | ||
320 | { | ||
321 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
322 | |||
323 | regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, | ||
324 | ESAI_xCCR_xDC_MASK, ESAI_xCCR_xDC(slots)); | ||
325 | |||
326 | regmap_update_bits(esai_priv->regmap, REG_ESAI_TSMA, | ||
327 | ESAI_xSMA_xS_MASK, ESAI_xSMA_xS(tx_mask)); | ||
328 | regmap_update_bits(esai_priv->regmap, REG_ESAI_TSMB, | ||
329 | ESAI_xSMA_xS_MASK, ESAI_xSMB_xS(tx_mask)); | ||
330 | |||
331 | regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, | ||
332 | ESAI_xCCR_xDC_MASK, ESAI_xCCR_xDC(slots)); | ||
333 | |||
334 | regmap_update_bits(esai_priv->regmap, REG_ESAI_RSMA, | ||
335 | ESAI_xSMA_xS_MASK, ESAI_xSMA_xS(rx_mask)); | ||
336 | regmap_update_bits(esai_priv->regmap, REG_ESAI_RSMB, | ||
337 | ESAI_xSMA_xS_MASK, ESAI_xSMB_xS(rx_mask)); | ||
338 | |||
339 | esai_priv->slot_width = slot_width; | ||
340 | |||
341 | return 0; | ||
342 | } | ||
343 | |||
344 | static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | ||
345 | { | ||
346 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
347 | u32 xcr = 0, xccr = 0, mask; | ||
348 | |||
349 | /* DAI mode */ | ||
350 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | ||
351 | case SND_SOC_DAIFMT_I2S: | ||
352 | /* Data on rising edge of bclk, frame low, 1clk before data */ | ||
353 | xcr |= ESAI_xCR_xFSR; | ||
354 | xccr |= ESAI_xCCR_xFSP | ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP; | ||
355 | break; | ||
356 | case SND_SOC_DAIFMT_LEFT_J: | ||
357 | /* Data on rising edge of bclk, frame high */ | ||
358 | xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP; | ||
359 | break; | ||
360 | case SND_SOC_DAIFMT_RIGHT_J: | ||
361 | /* Data on rising edge of bclk, frame high, right aligned */ | ||
362 | xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCR_xWA; | ||
363 | break; | ||
364 | case SND_SOC_DAIFMT_DSP_A: | ||
365 | /* Data on rising edge of bclk, frame high, 1clk before data */ | ||
366 | xcr |= ESAI_xCR_xFSL | ESAI_xCR_xFSR; | ||
367 | xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP; | ||
368 | break; | ||
369 | case SND_SOC_DAIFMT_DSP_B: | ||
370 | /* Data on rising edge of bclk, frame high */ | ||
371 | xcr |= ESAI_xCR_xFSL; | ||
372 | xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP; | ||
373 | break; | ||
374 | default: | ||
375 | return -EINVAL; | ||
376 | } | ||
377 | |||
378 | /* DAI clock inversion */ | ||
379 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | ||
380 | case SND_SOC_DAIFMT_NB_NF: | ||
381 | /* Nothing to do for both normal cases */ | ||
382 | break; | ||
383 | case SND_SOC_DAIFMT_IB_NF: | ||
384 | /* Invert bit clock */ | ||
385 | xccr ^= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP; | ||
386 | break; | ||
387 | case SND_SOC_DAIFMT_NB_IF: | ||
388 | /* Invert frame clock */ | ||
389 | xccr ^= ESAI_xCCR_xFSP; | ||
390 | break; | ||
391 | case SND_SOC_DAIFMT_IB_IF: | ||
392 | /* Invert both clocks */ | ||
393 | xccr ^= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCCR_xFSP; | ||
394 | break; | ||
395 | default: | ||
396 | return -EINVAL; | ||
397 | } | ||
398 | |||
399 | esai_priv->slave_mode = false; | ||
400 | |||
401 | /* DAI clock master masks */ | ||
402 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | ||
403 | case SND_SOC_DAIFMT_CBM_CFM: | ||
404 | esai_priv->slave_mode = true; | ||
405 | break; | ||
406 | case SND_SOC_DAIFMT_CBS_CFM: | ||
407 | xccr |= ESAI_xCCR_xCKD; | ||
408 | break; | ||
409 | case SND_SOC_DAIFMT_CBM_CFS: | ||
410 | xccr |= ESAI_xCCR_xFSD; | ||
411 | break; | ||
412 | case SND_SOC_DAIFMT_CBS_CFS: | ||
413 | xccr |= ESAI_xCCR_xFSD | ESAI_xCCR_xCKD; | ||
414 | break; | ||
415 | default: | ||
416 | return -EINVAL; | ||
417 | } | ||
418 | |||
419 | mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR; | ||
420 | regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr); | ||
421 | regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr); | ||
422 | |||
423 | mask = ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCCR_xFSP | | ||
424 | ESAI_xCCR_xFSD | ESAI_xCCR_xCKD | ESAI_xCR_xWA; | ||
425 | regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr); | ||
426 | regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr); | ||
427 | |||
428 | return 0; | ||
429 | } | ||
430 | |||
431 | static int fsl_esai_startup(struct snd_pcm_substream *substream, | ||
432 | struct snd_soc_dai *dai) | ||
433 | { | ||
434 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
435 | |||
436 | /* | ||
437 | * Some platforms might use the same bit to gate all three or two of | ||
438 | * clocks, so keep all clocks open/close at the same time for safety | ||
439 | */ | ||
440 | clk_prepare_enable(esai_priv->coreclk); | ||
441 | if (!IS_ERR(esai_priv->extalclk)) | ||
442 | clk_prepare_enable(esai_priv->extalclk); | ||
443 | if (!IS_ERR(esai_priv->fsysclk)) | ||
444 | clk_prepare_enable(esai_priv->fsysclk); | ||
445 | |||
446 | if (!dai->active) { | ||
447 | /* Reset Port C */ | ||
448 | regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC, | ||
449 | ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO)); | ||
450 | regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC, | ||
451 | ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO)); | ||
452 | |||
453 | /* Set synchronous mode */ | ||
454 | regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR, | ||
455 | ESAI_SAICR_SYNC, esai_priv->synchronous ? | ||
456 | ESAI_SAICR_SYNC : 0); | ||
457 | |||
458 | /* Set a default slot number -- 2 */ | ||
459 | regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, | ||
460 | ESAI_xCCR_xDC_MASK, ESAI_xCCR_xDC(2)); | ||
461 | regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, | ||
462 | ESAI_xCCR_xDC_MASK, ESAI_xCCR_xDC(2)); | ||
463 | } | ||
464 | |||
465 | return 0; | ||
466 | } | ||
467 | |||
468 | static int fsl_esai_hw_params(struct snd_pcm_substream *substream, | ||
469 | struct snd_pcm_hw_params *params, | ||
470 | struct snd_soc_dai *dai) | ||
471 | { | ||
472 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
473 | bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; | ||
474 | u32 width = snd_pcm_format_width(params_format(params)); | ||
475 | u32 channels = params_channels(params); | ||
476 | u32 bclk, mask, val, ret; | ||
477 | |||
478 | bclk = params_rate(params) * esai_priv->slot_width * 2; | ||
479 | |||
480 | ret = fsl_esai_set_bclk(dai, tx, bclk); | ||
481 | if (ret) | ||
482 | return ret; | ||
483 | |||
484 | /* Use Normal mode to support monaural audio */ | ||
485 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), | ||
486 | ESAI_xCR_xMOD_MASK, params_channels(params) > 1 ? | ||
487 | ESAI_xCR_xMOD_NETWORK : 0); | ||
488 | |||
489 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx), | ||
490 | ESAI_xFCR_xFR_MASK, ESAI_xFCR_xFR); | ||
491 | |||
492 | mask = ESAI_xFCR_xFR_MASK | ESAI_xFCR_xWA_MASK | ESAI_xFCR_xFWM_MASK | | ||
493 | (tx ? ESAI_xFCR_TE_MASK | ESAI_xFCR_TIEN : ESAI_xFCR_RE_MASK); | ||
494 | val = ESAI_xFCR_xWA(width) | ESAI_xFCR_xFWM(esai_priv->fifo_depth) | | ||
495 | (tx ? ESAI_xFCR_TE(channels) | ESAI_xFCR_TIEN : ESAI_xFCR_RE(channels)); | ||
496 | |||
497 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx), mask, val); | ||
498 | |||
499 | mask = ESAI_xCR_xSWS_MASK | (tx ? ESAI_xCR_PADC : 0); | ||
500 | val = ESAI_xCR_xSWS(esai_priv->slot_width, width) | (tx ? ESAI_xCR_PADC : 0); | ||
501 | |||
502 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val); | ||
503 | |||
504 | return 0; | ||
505 | } | ||
506 | |||
507 | static void fsl_esai_shutdown(struct snd_pcm_substream *substream, | ||
508 | struct snd_soc_dai *dai) | ||
509 | { | ||
510 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
511 | |||
512 | if (!IS_ERR(esai_priv->fsysclk)) | ||
513 | clk_disable_unprepare(esai_priv->fsysclk); | ||
514 | if (!IS_ERR(esai_priv->extalclk)) | ||
515 | clk_disable_unprepare(esai_priv->extalclk); | ||
516 | clk_disable_unprepare(esai_priv->coreclk); | ||
517 | } | ||
518 | |||
519 | static int fsl_esai_trigger(struct snd_pcm_substream *substream, int cmd, | ||
520 | struct snd_soc_dai *dai) | ||
521 | { | ||
522 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
523 | bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; | ||
524 | u8 i, channels = substream->runtime->channels; | ||
525 | |||
526 | switch (cmd) { | ||
527 | case SNDRV_PCM_TRIGGER_START: | ||
528 | case SNDRV_PCM_TRIGGER_RESUME: | ||
529 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
530 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx), | ||
531 | ESAI_xFCR_xFEN_MASK, ESAI_xFCR_xFEN); | ||
532 | |||
533 | /* Write initial words reqiured by ESAI as normal procedure */ | ||
534 | for (i = 0; tx && i < channels; i++) | ||
535 | regmap_write(esai_priv->regmap, REG_ESAI_ETDR, 0x0); | ||
536 | |||
537 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), | ||
538 | tx ? ESAI_xCR_TE_MASK : ESAI_xCR_RE_MASK, | ||
539 | tx ? ESAI_xCR_TE(channels) : ESAI_xCR_RE(channels)); | ||
540 | break; | ||
541 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
542 | case SNDRV_PCM_TRIGGER_STOP: | ||
543 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
544 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), | ||
545 | tx ? ESAI_xCR_TE_MASK : ESAI_xCR_RE_MASK, 0); | ||
546 | |||
547 | /* Disable and reset FIFO */ | ||
548 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx), | ||
549 | ESAI_xFCR_xFR | ESAI_xFCR_xFEN, ESAI_xFCR_xFR); | ||
550 | regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx), | ||
551 | ESAI_xFCR_xFR, 0); | ||
552 | break; | ||
553 | default: | ||
554 | return -EINVAL; | ||
555 | } | ||
556 | |||
557 | return 0; | ||
558 | } | ||
559 | |||
560 | static struct snd_soc_dai_ops fsl_esai_dai_ops = { | ||
561 | .startup = fsl_esai_startup, | ||
562 | .shutdown = fsl_esai_shutdown, | ||
563 | .trigger = fsl_esai_trigger, | ||
564 | .hw_params = fsl_esai_hw_params, | ||
565 | .set_sysclk = fsl_esai_set_dai_sysclk, | ||
566 | .set_fmt = fsl_esai_set_dai_fmt, | ||
567 | .set_tdm_slot = fsl_esai_set_dai_tdm_slot, | ||
568 | }; | ||
569 | |||
570 | static int fsl_esai_dai_probe(struct snd_soc_dai *dai) | ||
571 | { | ||
572 | struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai); | ||
573 | |||
574 | snd_soc_dai_init_dma_data(dai, &esai_priv->dma_params_tx, | ||
575 | &esai_priv->dma_params_rx); | ||
576 | |||
577 | return 0; | ||
578 | } | ||
579 | |||
580 | static struct snd_soc_dai_driver fsl_esai_dai = { | ||
581 | .probe = fsl_esai_dai_probe, | ||
582 | .playback = { | ||
583 | .channels_min = 1, | ||
584 | .channels_max = 12, | ||
585 | .rates = FSL_ESAI_RATES, | ||
586 | .formats = FSL_ESAI_FORMATS, | ||
587 | }, | ||
588 | .capture = { | ||
589 | .channels_min = 1, | ||
590 | .channels_max = 8, | ||
591 | .rates = FSL_ESAI_RATES, | ||
592 | .formats = FSL_ESAI_FORMATS, | ||
593 | }, | ||
594 | .ops = &fsl_esai_dai_ops, | ||
595 | }; | ||
596 | |||
597 | static const struct snd_soc_component_driver fsl_esai_component = { | ||
598 | .name = "fsl-esai", | ||
599 | }; | ||
600 | |||
601 | static bool fsl_esai_readable_reg(struct device *dev, unsigned int reg) | ||
602 | { | ||
603 | switch (reg) { | ||
604 | case REG_ESAI_ERDR: | ||
605 | case REG_ESAI_ECR: | ||
606 | case REG_ESAI_ESR: | ||
607 | case REG_ESAI_TFCR: | ||
608 | case REG_ESAI_TFSR: | ||
609 | case REG_ESAI_RFCR: | ||
610 | case REG_ESAI_RFSR: | ||
611 | case REG_ESAI_RX0: | ||
612 | case REG_ESAI_RX1: | ||
613 | case REG_ESAI_RX2: | ||
614 | case REG_ESAI_RX3: | ||
615 | case REG_ESAI_SAISR: | ||
616 | case REG_ESAI_SAICR: | ||
617 | case REG_ESAI_TCR: | ||
618 | case REG_ESAI_TCCR: | ||
619 | case REG_ESAI_RCR: | ||
620 | case REG_ESAI_RCCR: | ||
621 | case REG_ESAI_TSMA: | ||
622 | case REG_ESAI_TSMB: | ||
623 | case REG_ESAI_RSMA: | ||
624 | case REG_ESAI_RSMB: | ||
625 | case REG_ESAI_PRRC: | ||
626 | case REG_ESAI_PCRC: | ||
627 | return true; | ||
628 | default: | ||
629 | return false; | ||
630 | } | ||
631 | } | ||
632 | |||
633 | static bool fsl_esai_writeable_reg(struct device *dev, unsigned int reg) | ||
634 | { | ||
635 | switch (reg) { | ||
636 | case REG_ESAI_ETDR: | ||
637 | case REG_ESAI_ECR: | ||
638 | case REG_ESAI_TFCR: | ||
639 | case REG_ESAI_RFCR: | ||
640 | case REG_ESAI_TX0: | ||
641 | case REG_ESAI_TX1: | ||
642 | case REG_ESAI_TX2: | ||
643 | case REG_ESAI_TX3: | ||
644 | case REG_ESAI_TX4: | ||
645 | case REG_ESAI_TX5: | ||
646 | case REG_ESAI_TSR: | ||
647 | case REG_ESAI_SAICR: | ||
648 | case REG_ESAI_TCR: | ||
649 | case REG_ESAI_TCCR: | ||
650 | case REG_ESAI_RCR: | ||
651 | case REG_ESAI_RCCR: | ||
652 | case REG_ESAI_TSMA: | ||
653 | case REG_ESAI_TSMB: | ||
654 | case REG_ESAI_RSMA: | ||
655 | case REG_ESAI_RSMB: | ||
656 | case REG_ESAI_PRRC: | ||
657 | case REG_ESAI_PCRC: | ||
658 | return true; | ||
659 | default: | ||
660 | return false; | ||
661 | } | ||
662 | } | ||
663 | |||
664 | static const struct regmap_config fsl_esai_regmap_config = { | ||
665 | .reg_bits = 32, | ||
666 | .reg_stride = 4, | ||
667 | .val_bits = 32, | ||
668 | |||
669 | .max_register = REG_ESAI_PCRC, | ||
670 | .readable_reg = fsl_esai_readable_reg, | ||
671 | .writeable_reg = fsl_esai_writeable_reg, | ||
672 | }; | ||
673 | |||
674 | static int fsl_esai_probe(struct platform_device *pdev) | ||
675 | { | ||
676 | struct device_node *np = pdev->dev.of_node; | ||
677 | struct fsl_esai *esai_priv; | ||
678 | struct resource *res; | ||
679 | const uint32_t *iprop; | ||
680 | void __iomem *regs; | ||
681 | int irq, ret; | ||
682 | |||
683 | esai_priv = devm_kzalloc(&pdev->dev, sizeof(*esai_priv), GFP_KERNEL); | ||
684 | if (!esai_priv) | ||
685 | return -ENOMEM; | ||
686 | |||
687 | esai_priv->pdev = pdev; | ||
688 | strcpy(esai_priv->name, np->name); | ||
689 | |||
690 | /* Get the addresses and IRQ */ | ||
691 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
692 | regs = devm_ioremap_resource(&pdev->dev, res); | ||
693 | if (IS_ERR(regs)) | ||
694 | return PTR_ERR(regs); | ||
695 | |||
696 | esai_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, | ||
697 | "core", regs, &fsl_esai_regmap_config); | ||
698 | if (IS_ERR(esai_priv->regmap)) { | ||
699 | dev_err(&pdev->dev, "failed to init regmap: %ld\n", | ||
700 | PTR_ERR(esai_priv->regmap)); | ||
701 | return PTR_ERR(esai_priv->regmap); | ||
702 | } | ||
703 | |||
704 | esai_priv->coreclk = devm_clk_get(&pdev->dev, "core"); | ||
705 | if (IS_ERR(esai_priv->coreclk)) { | ||
706 | dev_err(&pdev->dev, "failed to get core clock: %ld\n", | ||
707 | PTR_ERR(esai_priv->coreclk)); | ||
708 | return PTR_ERR(esai_priv->coreclk); | ||
709 | } | ||
710 | |||
711 | esai_priv->extalclk = devm_clk_get(&pdev->dev, "extal"); | ||
712 | if (IS_ERR(esai_priv->extalclk)) | ||
713 | dev_warn(&pdev->dev, "failed to get extal clock: %ld\n", | ||
714 | PTR_ERR(esai_priv->extalclk)); | ||
715 | |||
716 | esai_priv->fsysclk = devm_clk_get(&pdev->dev, "fsys"); | ||
717 | if (IS_ERR(esai_priv->fsysclk)) | ||
718 | dev_warn(&pdev->dev, "failed to get fsys clock: %ld\n", | ||
719 | PTR_ERR(esai_priv->fsysclk)); | ||
720 | |||
721 | irq = platform_get_irq(pdev, 0); | ||
722 | if (irq < 0) { | ||
723 | dev_err(&pdev->dev, "no irq for node %s\n", np->full_name); | ||
724 | return irq; | ||
725 | } | ||
726 | |||
727 | ret = devm_request_irq(&pdev->dev, irq, esai_isr, 0, | ||
728 | esai_priv->name, esai_priv); | ||
729 | if (ret) { | ||
730 | dev_err(&pdev->dev, "failed to claim irq %u\n", irq); | ||
731 | return ret; | ||
732 | } | ||
733 | |||
734 | /* Set a default slot size */ | ||
735 | esai_priv->slot_width = 32; | ||
736 | |||
737 | /* Set a default master/slave state */ | ||
738 | esai_priv->slave_mode = true; | ||
739 | |||
740 | /* Determine the FIFO depth */ | ||
741 | iprop = of_get_property(np, "fsl,fifo-depth", NULL); | ||
742 | if (iprop) | ||
743 | esai_priv->fifo_depth = be32_to_cpup(iprop); | ||
744 | else | ||
745 | esai_priv->fifo_depth = 64; | ||
746 | |||
747 | esai_priv->dma_params_tx.maxburst = 16; | ||
748 | esai_priv->dma_params_rx.maxburst = 16; | ||
749 | esai_priv->dma_params_tx.addr = res->start + REG_ESAI_ETDR; | ||
750 | esai_priv->dma_params_rx.addr = res->start + REG_ESAI_ERDR; | ||
751 | |||
752 | esai_priv->synchronous = | ||
753 | of_property_read_bool(np, "fsl,esai-synchronous"); | ||
754 | |||
755 | /* Implement full symmetry for synchronous mode */ | ||
756 | if (esai_priv->synchronous) { | ||
757 | fsl_esai_dai.symmetric_rates = 1; | ||
758 | fsl_esai_dai.symmetric_channels = 1; | ||
759 | fsl_esai_dai.symmetric_samplebits = 1; | ||
760 | } | ||
761 | |||
762 | dev_set_drvdata(&pdev->dev, esai_priv); | ||
763 | |||
764 | /* Reset ESAI unit */ | ||
765 | ret = regmap_write(esai_priv->regmap, REG_ESAI_ECR, ESAI_ECR_ERST); | ||
766 | if (ret) { | ||
767 | dev_err(&pdev->dev, "failed to reset ESAI: %d\n", ret); | ||
768 | return ret; | ||
769 | } | ||
770 | |||
771 | /* | ||
772 | * We need to enable ESAI so as to access some of its registers. | ||
773 | * Otherwise, we would fail to dump regmap from user space. | ||
774 | */ | ||
775 | ret = regmap_write(esai_priv->regmap, REG_ESAI_ECR, ESAI_ECR_ESAIEN); | ||
776 | if (ret) { | ||
777 | dev_err(&pdev->dev, "failed to enable ESAI: %d\n", ret); | ||
778 | return ret; | ||
779 | } | ||
780 | |||
781 | ret = devm_snd_soc_register_component(&pdev->dev, &fsl_esai_component, | ||
782 | &fsl_esai_dai, 1); | ||
783 | if (ret) { | ||
784 | dev_err(&pdev->dev, "failed to register DAI: %d\n", ret); | ||
785 | return ret; | ||
786 | } | ||
787 | |||
788 | ret = imx_pcm_dma_init(pdev); | ||
789 | if (ret) | ||
790 | dev_err(&pdev->dev, "failed to init imx pcm dma: %d\n", ret); | ||
791 | |||
792 | return ret; | ||
793 | } | ||
794 | |||
795 | static const struct of_device_id fsl_esai_dt_ids[] = { | ||
796 | { .compatible = "fsl,imx35-esai", }, | ||
797 | {} | ||
798 | }; | ||
799 | MODULE_DEVICE_TABLE(of, fsl_esai_dt_ids); | ||
800 | |||
801 | static struct platform_driver fsl_esai_driver = { | ||
802 | .probe = fsl_esai_probe, | ||
803 | .driver = { | ||
804 | .name = "fsl-esai-dai", | ||
805 | .owner = THIS_MODULE, | ||
806 | .of_match_table = fsl_esai_dt_ids, | ||
807 | }, | ||
808 | }; | ||
809 | |||
810 | module_platform_driver(fsl_esai_driver); | ||
811 | |||
812 | MODULE_AUTHOR("Freescale Semiconductor, Inc."); | ||
813 | MODULE_DESCRIPTION("Freescale ESAI CPU DAI driver"); | ||
814 | MODULE_LICENSE("GPL v2"); | ||
815 | MODULE_ALIAS("platform:fsl-esai-dai"); | ||
diff --git a/sound/soc/fsl/fsl_esai.h b/sound/soc/fsl/fsl_esai.h new file mode 100644 index 000000000000..9c9f957fcae1 --- /dev/null +++ b/sound/soc/fsl/fsl_esai.h | |||
@@ -0,0 +1,354 @@ | |||
1 | /* | ||
2 | * fsl_esai.h - ALSA ESAI interface for the Freescale i.MX SoC | ||
3 | * | ||
4 | * Copyright (C) 2014 Freescale Semiconductor, Inc. | ||
5 | * | ||
6 | * Author: Nicolin Chen <Guangyu.Chen@freescale.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public License | ||
9 | * version 2. This program is licensed "as is" without any warranty of any | ||
10 | * kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #ifndef _FSL_ESAI_DAI_H | ||
14 | #define _FSL_ESAI_DAI_H | ||
15 | |||
16 | /* ESAI Register Map */ | ||
17 | #define REG_ESAI_ETDR 0x00 | ||
18 | #define REG_ESAI_ERDR 0x04 | ||
19 | #define REG_ESAI_ECR 0x08 | ||
20 | #define REG_ESAI_ESR 0x0C | ||
21 | #define REG_ESAI_TFCR 0x10 | ||
22 | #define REG_ESAI_TFSR 0x14 | ||
23 | #define REG_ESAI_RFCR 0x18 | ||
24 | #define REG_ESAI_RFSR 0x1C | ||
25 | #define REG_ESAI_xFCR(tx) (tx ? REG_ESAI_TFCR : REG_ESAI_RFCR) | ||
26 | #define REG_ESAI_xFSR(tx) (tx ? REG_ESAI_TFSR : REG_ESAI_RFSR) | ||
27 | #define REG_ESAI_TX0 0x80 | ||
28 | #define REG_ESAI_TX1 0x84 | ||
29 | #define REG_ESAI_TX2 0x88 | ||
30 | #define REG_ESAI_TX3 0x8C | ||
31 | #define REG_ESAI_TX4 0x90 | ||
32 | #define REG_ESAI_TX5 0x94 | ||
33 | #define REG_ESAI_TSR 0x98 | ||
34 | #define REG_ESAI_RX0 0xA0 | ||
35 | #define REG_ESAI_RX1 0xA4 | ||
36 | #define REG_ESAI_RX2 0xA8 | ||
37 | #define REG_ESAI_RX3 0xAC | ||
38 | #define REG_ESAI_SAISR 0xCC | ||
39 | #define REG_ESAI_SAICR 0xD0 | ||
40 | #define REG_ESAI_TCR 0xD4 | ||
41 | #define REG_ESAI_TCCR 0xD8 | ||
42 | #define REG_ESAI_RCR 0xDC | ||
43 | #define REG_ESAI_RCCR 0xE0 | ||
44 | #define REG_ESAI_xCR(tx) (tx ? REG_ESAI_TCR : REG_ESAI_RCR) | ||
45 | #define REG_ESAI_xCCR(tx) (tx ? REG_ESAI_TCCR : REG_ESAI_RCCR) | ||
46 | #define REG_ESAI_TSMA 0xE4 | ||
47 | #define REG_ESAI_TSMB 0xE8 | ||
48 | #define REG_ESAI_RSMA 0xEC | ||
49 | #define REG_ESAI_RSMB 0xF0 | ||
50 | #define REG_ESAI_xSMA(tx) (tx ? REG_ESAI_TSMA : REG_ESAI_RSMA) | ||
51 | #define REG_ESAI_xSMB(tx) (tx ? REG_ESAI_TSMB : REG_ESAI_RSMB) | ||
52 | #define REG_ESAI_PRRC 0xF8 | ||
53 | #define REG_ESAI_PCRC 0xFC | ||
54 | |||
55 | /* ESAI Control Register -- REG_ESAI_ECR 0x8 */ | ||
56 | #define ESAI_ECR_ETI_SHIFT 19 | ||
57 | #define ESAI_ECR_ETI_MASK (1 << ESAI_ECR_ETI_SHIFT) | ||
58 | #define ESAI_ECR_ETI (1 << ESAI_ECR_ETI_SHIFT) | ||
59 | #define ESAI_ECR_ETO_SHIFT 18 | ||
60 | #define ESAI_ECR_ETO_MASK (1 << ESAI_ECR_ETO_SHIFT) | ||
61 | #define ESAI_ECR_ETO (1 << ESAI_ECR_ETO_SHIFT) | ||
62 | #define ESAI_ECR_ERI_SHIFT 17 | ||
63 | #define ESAI_ECR_ERI_MASK (1 << ESAI_ECR_ERI_SHIFT) | ||
64 | #define ESAI_ECR_ERI (1 << ESAI_ECR_ERI_SHIFT) | ||
65 | #define ESAI_ECR_ERO_SHIFT 16 | ||
66 | #define ESAI_ECR_ERO_MASK (1 << ESAI_ECR_ERO_SHIFT) | ||
67 | #define ESAI_ECR_ERO (1 << ESAI_ECR_ERO_SHIFT) | ||
68 | #define ESAI_ECR_ERST_SHIFT 1 | ||
69 | #define ESAI_ECR_ERST_MASK (1 << ESAI_ECR_ERST_SHIFT) | ||
70 | #define ESAI_ECR_ERST (1 << ESAI_ECR_ERST_SHIFT) | ||
71 | #define ESAI_ECR_ESAIEN_SHIFT 0 | ||
72 | #define ESAI_ECR_ESAIEN_MASK (1 << ESAI_ECR_ESAIEN_SHIFT) | ||
73 | #define ESAI_ECR_ESAIEN (1 << ESAI_ECR_ESAIEN_SHIFT) | ||
74 | |||
75 | /* ESAI Status Register -- REG_ESAI_ESR 0xC */ | ||
76 | #define ESAI_ESR_TINIT_SHIFT 10 | ||
77 | #define ESAI_ESR_TINIT_MASK (1 << ESAI_ESR_TINIT_SHIFT) | ||
78 | #define ESAI_ESR_TINIT (1 << ESAI_ESR_TINIT_SHIFT) | ||
79 | #define ESAI_ESR_RFF_SHIFT 9 | ||
80 | #define ESAI_ESR_RFF_MASK (1 << ESAI_ESR_RFF_SHIFT) | ||
81 | #define ESAI_ESR_RFF (1 << ESAI_ESR_RFF_SHIFT) | ||
82 | #define ESAI_ESR_TFE_SHIFT 8 | ||
83 | #define ESAI_ESR_TFE_MASK (1 << ESAI_ESR_TFE_SHIFT) | ||
84 | #define ESAI_ESR_TFE (1 << ESAI_ESR_TFE_SHIFT) | ||
85 | #define ESAI_ESR_TLS_SHIFT 7 | ||
86 | #define ESAI_ESR_TLS_MASK (1 << ESAI_ESR_TLS_SHIFT) | ||
87 | #define ESAI_ESR_TLS (1 << ESAI_ESR_TLS_SHIFT) | ||
88 | #define ESAI_ESR_TDE_SHIFT 6 | ||
89 | #define ESAI_ESR_TDE_MASK (1 << ESAI_ESR_TDE_SHIFT) | ||
90 | #define ESAI_ESR_TDE (1 << ESAI_ESR_TDE_SHIFT) | ||
91 | #define ESAI_ESR_TED_SHIFT 5 | ||
92 | #define ESAI_ESR_TED_MASK (1 << ESAI_ESR_TED_SHIFT) | ||
93 | #define ESAI_ESR_TED (1 << ESAI_ESR_TED_SHIFT) | ||
94 | #define ESAI_ESR_TD_SHIFT 4 | ||
95 | #define ESAI_ESR_TD_MASK (1 << ESAI_ESR_TD_SHIFT) | ||
96 | #define ESAI_ESR_TD (1 << ESAI_ESR_TD_SHIFT) | ||
97 | #define ESAI_ESR_RLS_SHIFT 3 | ||
98 | #define ESAI_ESR_RLS_MASK (1 << ESAI_ESR_RLS_SHIFT) | ||
99 | #define ESAI_ESR_RLS (1 << ESAI_ESR_RLS_SHIFT) | ||
100 | #define ESAI_ESR_RDE_SHIFT 2 | ||
101 | #define ESAI_ESR_RDE_MASK (1 << ESAI_ESR_RDE_SHIFT) | ||
102 | #define ESAI_ESR_RDE (1 << ESAI_ESR_RDE_SHIFT) | ||
103 | #define ESAI_ESR_RED_SHIFT 1 | ||
104 | #define ESAI_ESR_RED_MASK (1 << ESAI_ESR_RED_SHIFT) | ||
105 | #define ESAI_ESR_RED (1 << ESAI_ESR_RED_SHIFT) | ||
106 | #define ESAI_ESR_RD_SHIFT 0 | ||
107 | #define ESAI_ESR_RD_MASK (1 << ESAI_ESR_RD_SHIFT) | ||
108 | #define ESAI_ESR_RD (1 << ESAI_ESR_RD_SHIFT) | ||
109 | |||
110 | /* | ||
111 | * Transmit FIFO Configuration Register -- REG_ESAI_TFCR 0x10 | ||
112 | * Receive FIFO Configuration Register -- REG_ESAI_RFCR 0x18 | ||
113 | */ | ||
114 | #define ESAI_xFCR_TIEN_SHIFT 19 | ||
115 | #define ESAI_xFCR_TIEN_MASK (1 << ESAI_xFCR_TIEN_SHIFT) | ||
116 | #define ESAI_xFCR_TIEN (1 << ESAI_xFCR_TIEN_SHIFT) | ||
117 | #define ESAI_xFCR_REXT_SHIFT 19 | ||
118 | #define ESAI_xFCR_REXT_MASK (1 << ESAI_xFCR_REXT_SHIFT) | ||
119 | #define ESAI_xFCR_REXT (1 << ESAI_xFCR_REXT_SHIFT) | ||
120 | #define ESAI_xFCR_xWA_SHIFT 16 | ||
121 | #define ESAI_xFCR_xWA_WIDTH 3 | ||
122 | #define ESAI_xFCR_xWA_MASK (((1 << ESAI_xFCR_xWA_WIDTH) - 1) << ESAI_xFCR_xWA_SHIFT) | ||
123 | #define ESAI_xFCR_xWA(v) (((8 - ((v) >> 2)) << ESAI_xFCR_xWA_SHIFT) & ESAI_xFCR_xWA_MASK) | ||
124 | #define ESAI_xFCR_xFWM_SHIFT 8 | ||
125 | #define ESAI_xFCR_xFWM_WIDTH 8 | ||
126 | #define ESAI_xFCR_xFWM_MASK (((1 << ESAI_xFCR_xFWM_WIDTH) - 1) << ESAI_xFCR_xFWM_SHIFT) | ||
127 | #define ESAI_xFCR_xFWM(v) ((((v) - 1) << ESAI_xFCR_xFWM_SHIFT) & ESAI_xFCR_xFWM_MASK) | ||
128 | #define ESAI_xFCR_xE_SHIFT 2 | ||
129 | #define ESAI_xFCR_TE_WIDTH 6 | ||
130 | #define ESAI_xFCR_RE_WIDTH 4 | ||
131 | #define ESAI_xFCR_TE_MASK (((1 << ESAI_xFCR_TE_WIDTH) - 1) << ESAI_xFCR_xE_SHIFT) | ||
132 | #define ESAI_xFCR_RE_MASK (((1 << ESAI_xFCR_RE_WIDTH) - 1) << ESAI_xFCR_xE_SHIFT) | ||
133 | #define ESAI_xFCR_TE(x) ((ESAI_xFCR_TE_MASK >> (ESAI_xFCR_TE_WIDTH - ((x + 1) >> 1))) & ESAI_xFCR_TE_MASK) | ||
134 | #define ESAI_xFCR_RE(x) ((ESAI_xFCR_RE_MASK >> (ESAI_xFCR_RE_WIDTH - ((x + 1) >> 1))) & ESAI_xFCR_RE_MASK) | ||
135 | #define ESAI_xFCR_xFR_SHIFT 1 | ||
136 | #define ESAI_xFCR_xFR_MASK (1 << ESAI_xFCR_xFR_SHIFT) | ||
137 | #define ESAI_xFCR_xFR (1 << ESAI_xFCR_xFR_SHIFT) | ||
138 | #define ESAI_xFCR_xFEN_SHIFT 0 | ||
139 | #define ESAI_xFCR_xFEN_MASK (1 << ESAI_xFCR_xFEN_SHIFT) | ||
140 | #define ESAI_xFCR_xFEN (1 << ESAI_xFCR_xFEN_SHIFT) | ||
141 | |||
142 | /* | ||
143 | * Transmit FIFO Status Register -- REG_ESAI_TFSR 0x14 | ||
144 | * Receive FIFO Status Register --REG_ESAI_RFSR 0x1C | ||
145 | */ | ||
146 | #define ESAI_xFSR_NTFO_SHIFT 12 | ||
147 | #define ESAI_xFSR_NRFI_SHIFT 12 | ||
148 | #define ESAI_xFSR_NTFI_SHIFT 8 | ||
149 | #define ESAI_xFSR_NRFO_SHIFT 8 | ||
150 | #define ESAI_xFSR_NTFx_WIDTH 3 | ||
151 | #define ESAI_xFSR_NRFx_WIDTH 2 | ||
152 | #define ESAI_xFSR_NTFO_MASK (((1 << ESAI_xFSR_NTFx_WIDTH) - 1) << ESAI_xFSR_NTFO_SHIFT) | ||
153 | #define ESAI_xFSR_NTFI_MASK (((1 << ESAI_xFSR_NTFx_WIDTH) - 1) << ESAI_xFSR_NTFI_SHIFT) | ||
154 | #define ESAI_xFSR_NRFO_MASK (((1 << ESAI_xFSR_NRFx_WIDTH) - 1) << ESAI_xFSR_NRFO_SHIFT) | ||
155 | #define ESAI_xFSR_NRFI_MASK (((1 << ESAI_xFSR_NRFx_WIDTH) - 1) << ESAI_xFSR_NRFI_SHIFT) | ||
156 | #define ESAI_xFSR_xFCNT_SHIFT 0 | ||
157 | #define ESAI_xFSR_xFCNT_WIDTH 8 | ||
158 | #define ESAI_xFSR_xFCNT_MASK (((1 << ESAI_xFSR_xFCNT_WIDTH) - 1) << ESAI_xFSR_xFCNT_SHIFT) | ||
159 | |||
160 | /* ESAI Transmit Slot Register -- REG_ESAI_TSR 0x98 */ | ||
161 | #define ESAI_TSR_SHIFT 0 | ||
162 | #define ESAI_TSR_WIDTH 24 | ||
163 | #define ESAI_TSR_MASK (((1 << ESAI_TSR_WIDTH) - 1) << ESAI_TSR_SHIFT) | ||
164 | |||
165 | /* Serial Audio Interface Status Register -- REG_ESAI_SAISR 0xCC */ | ||
166 | #define ESAI_SAISR_TODFE_SHIFT 17 | ||
167 | #define ESAI_SAISR_TODFE_MASK (1 << ESAI_SAISR_TODFE_SHIFT) | ||
168 | #define ESAI_SAISR_TODFE (1 << ESAI_SAISR_TODFE_SHIFT) | ||
169 | #define ESAI_SAISR_TEDE_SHIFT 16 | ||
170 | #define ESAI_SAISR_TEDE_MASK (1 << ESAI_SAISR_TEDE_SHIFT) | ||
171 | #define ESAI_SAISR_TEDE (1 << ESAI_SAISR_TEDE_SHIFT) | ||
172 | #define ESAI_SAISR_TDE_SHIFT 15 | ||
173 | #define ESAI_SAISR_TDE_MASK (1 << ESAI_SAISR_TDE_SHIFT) | ||
174 | #define ESAI_SAISR_TDE (1 << ESAI_SAISR_TDE_SHIFT) | ||
175 | #define ESAI_SAISR_TUE_SHIFT 14 | ||
176 | #define ESAI_SAISR_TUE_MASK (1 << ESAI_SAISR_TUE_SHIFT) | ||
177 | #define ESAI_SAISR_TUE (1 << ESAI_SAISR_TUE_SHIFT) | ||
178 | #define ESAI_SAISR_TFS_SHIFT 13 | ||
179 | #define ESAI_SAISR_TFS_MASK (1 << ESAI_SAISR_TFS_SHIFT) | ||
180 | #define ESAI_SAISR_TFS (1 << ESAI_SAISR_TFS_SHIFT) | ||
181 | #define ESAI_SAISR_RODF_SHIFT 10 | ||
182 | #define ESAI_SAISR_RODF_MASK (1 << ESAI_SAISR_RODF_SHIFT) | ||
183 | #define ESAI_SAISR_RODF (1 << ESAI_SAISR_RODF_SHIFT) | ||
184 | #define ESAI_SAISR_REDF_SHIFT 9 | ||
185 | #define ESAI_SAISR_REDF_MASK (1 << ESAI_SAISR_REDF_SHIFT) | ||
186 | #define ESAI_SAISR_REDF (1 << ESAI_SAISR_REDF_SHIFT) | ||
187 | #define ESAI_SAISR_RDF_SHIFT 8 | ||
188 | #define ESAI_SAISR_RDF_MASK (1 << ESAI_SAISR_RDF_SHIFT) | ||
189 | #define ESAI_SAISR_RDF (1 << ESAI_SAISR_RDF_SHIFT) | ||
190 | #define ESAI_SAISR_ROE_SHIFT 7 | ||
191 | #define ESAI_SAISR_ROE_MASK (1 << ESAI_SAISR_ROE_SHIFT) | ||
192 | #define ESAI_SAISR_ROE (1 << ESAI_SAISR_ROE_SHIFT) | ||
193 | #define ESAI_SAISR_RFS_SHIFT 6 | ||
194 | #define ESAI_SAISR_RFS_MASK (1 << ESAI_SAISR_RFS_SHIFT) | ||
195 | #define ESAI_SAISR_RFS (1 << ESAI_SAISR_RFS_SHIFT) | ||
196 | #define ESAI_SAISR_IF2_SHIFT 2 | ||
197 | #define ESAI_SAISR_IF2_MASK (1 << ESAI_SAISR_IF2_SHIFT) | ||
198 | #define ESAI_SAISR_IF2 (1 << ESAI_SAISR_IF2_SHIFT) | ||
199 | #define ESAI_SAISR_IF1_SHIFT 1 | ||
200 | #define ESAI_SAISR_IF1_MASK (1 << ESAI_SAISR_IF1_SHIFT) | ||
201 | #define ESAI_SAISR_IF1 (1 << ESAI_SAISR_IF1_SHIFT) | ||
202 | #define ESAI_SAISR_IF0_SHIFT 0 | ||
203 | #define ESAI_SAISR_IF0_MASK (1 << ESAI_SAISR_IF0_SHIFT) | ||
204 | #define ESAI_SAISR_IF0 (1 << ESAI_SAISR_IF0_SHIFT) | ||
205 | |||
206 | /* Serial Audio Interface Control Register -- REG_ESAI_SAICR 0xD0 */ | ||
207 | #define ESAI_SAICR_ALC_SHIFT 8 | ||
208 | #define ESAI_SAICR_ALC_MASK (1 << ESAI_SAICR_ALC_SHIFT) | ||
209 | #define ESAI_SAICR_ALC (1 << ESAI_SAICR_ALC_SHIFT) | ||
210 | #define ESAI_SAICR_TEBE_SHIFT 7 | ||
211 | #define ESAI_SAICR_TEBE_MASK (1 << ESAI_SAICR_TEBE_SHIFT) | ||
212 | #define ESAI_SAICR_TEBE (1 << ESAI_SAICR_TEBE_SHIFT) | ||
213 | #define ESAI_SAICR_SYNC_SHIFT 6 | ||
214 | #define ESAI_SAICR_SYNC_MASK (1 << ESAI_SAICR_SYNC_SHIFT) | ||
215 | #define ESAI_SAICR_SYNC (1 << ESAI_SAICR_SYNC_SHIFT) | ||
216 | #define ESAI_SAICR_OF2_SHIFT 2 | ||
217 | #define ESAI_SAICR_OF2_MASK (1 << ESAI_SAICR_OF2_SHIFT) | ||
218 | #define ESAI_SAICR_OF2 (1 << ESAI_SAICR_OF2_SHIFT) | ||
219 | #define ESAI_SAICR_OF1_SHIFT 1 | ||
220 | #define ESAI_SAICR_OF1_MASK (1 << ESAI_SAICR_OF1_SHIFT) | ||
221 | #define ESAI_SAICR_OF1 (1 << ESAI_SAICR_OF1_SHIFT) | ||
222 | #define ESAI_SAICR_OF0_SHIFT 0 | ||
223 | #define ESAI_SAICR_OF0_MASK (1 << ESAI_SAICR_OF0_SHIFT) | ||
224 | #define ESAI_SAICR_OF0 (1 << ESAI_SAICR_OF0_SHIFT) | ||
225 | |||
226 | /* | ||
227 | * Transmit Control Register -- REG_ESAI_TCR 0xD4 | ||
228 | * Receive Control Register -- REG_ESAI_RCR 0xDC | ||
229 | */ | ||
230 | #define ESAI_xCR_xLIE_SHIFT 23 | ||
231 | #define ESAI_xCR_xLIE_MASK (1 << ESAI_xCR_xLIE_SHIFT) | ||
232 | #define ESAI_xCR_xLIE (1 << ESAI_xCR_xLIE_SHIFT) | ||
233 | #define ESAI_xCR_xIE_SHIFT 22 | ||
234 | #define ESAI_xCR_xIE_MASK (1 << ESAI_xCR_xIE_SHIFT) | ||
235 | #define ESAI_xCR_xIE (1 << ESAI_xCR_xIE_SHIFT) | ||
236 | #define ESAI_xCR_xEDIE_SHIFT 21 | ||
237 | #define ESAI_xCR_xEDIE_MASK (1 << ESAI_xCR_xEDIE_SHIFT) | ||
238 | #define ESAI_xCR_xEDIE (1 << ESAI_xCR_xEDIE_SHIFT) | ||
239 | #define ESAI_xCR_xEIE_SHIFT 20 | ||
240 | #define ESAI_xCR_xEIE_MASK (1 << ESAI_xCR_xEIE_SHIFT) | ||
241 | #define ESAI_xCR_xEIE (1 << ESAI_xCR_xEIE_SHIFT) | ||
242 | #define ESAI_xCR_xPR_SHIFT 19 | ||
243 | #define ESAI_xCR_xPR_MASK (1 << ESAI_xCR_xPR_SHIFT) | ||
244 | #define ESAI_xCR_xPR (1 << ESAI_xCR_xPR_SHIFT) | ||
245 | #define ESAI_xCR_PADC_SHIFT 17 | ||
246 | #define ESAI_xCR_PADC_MASK (1 << ESAI_xCR_PADC_SHIFT) | ||
247 | #define ESAI_xCR_PADC (1 << ESAI_xCR_PADC_SHIFT) | ||
248 | #define ESAI_xCR_xFSR_SHIFT 16 | ||
249 | #define ESAI_xCR_xFSR_MASK (1 << ESAI_xCR_xFSR_SHIFT) | ||
250 | #define ESAI_xCR_xFSR (1 << ESAI_xCR_xFSR_SHIFT) | ||
251 | #define ESAI_xCR_xFSL_SHIFT 15 | ||
252 | #define ESAI_xCR_xFSL_MASK (1 << ESAI_xCR_xFSL_SHIFT) | ||
253 | #define ESAI_xCR_xFSL (1 << ESAI_xCR_xFSL_SHIFT) | ||
254 | #define ESAI_xCR_xSWS_SHIFT 10 | ||
255 | #define ESAI_xCR_xSWS_WIDTH 5 | ||
256 | #define ESAI_xCR_xSWS_MASK (((1 << ESAI_xCR_xSWS_WIDTH) - 1) << ESAI_xCR_xSWS_SHIFT) | ||
257 | #define ESAI_xCR_xSWS(s, w) ((w < 24 ? (s - w + ((w - 8) >> 2)) : (s < 32 ? 0x1e : 0x1f)) << ESAI_xCR_xSWS_SHIFT) | ||
258 | #define ESAI_xCR_xMOD_SHIFT 8 | ||
259 | #define ESAI_xCR_xMOD_WIDTH 2 | ||
260 | #define ESAI_xCR_xMOD_MASK (((1 << ESAI_xCR_xMOD_WIDTH) - 1) << ESAI_xCR_xMOD_SHIFT) | ||
261 | #define ESAI_xCR_xMOD_ONDEMAND (0x1 << ESAI_xCR_xMOD_SHIFT) | ||
262 | #define ESAI_xCR_xMOD_NETWORK (0x1 << ESAI_xCR_xMOD_SHIFT) | ||
263 | #define ESAI_xCR_xMOD_AC97 (0x3 << ESAI_xCR_xMOD_SHIFT) | ||
264 | #define ESAI_xCR_xWA_SHIFT 7 | ||
265 | #define ESAI_xCR_xWA_MASK (1 << ESAI_xCR_xWA_SHIFT) | ||
266 | #define ESAI_xCR_xWA (1 << ESAI_xCR_xWA_SHIFT) | ||
267 | #define ESAI_xCR_xSHFD_SHIFT 6 | ||
268 | #define ESAI_xCR_xSHFD_MASK (1 << ESAI_xCR_xSHFD_SHIFT) | ||
269 | #define ESAI_xCR_xSHFD (1 << ESAI_xCR_xSHFD_SHIFT) | ||
270 | #define ESAI_xCR_xE_SHIFT 0 | ||
271 | #define ESAI_xCR_TE_WIDTH 6 | ||
272 | #define ESAI_xCR_RE_WIDTH 4 | ||
273 | #define ESAI_xCR_TE_MASK (((1 << ESAI_xCR_TE_WIDTH) - 1) << ESAI_xCR_xE_SHIFT) | ||
274 | #define ESAI_xCR_RE_MASK (((1 << ESAI_xCR_RE_WIDTH) - 1) << ESAI_xCR_xE_SHIFT) | ||
275 | #define ESAI_xCR_TE(x) ((ESAI_xCR_TE_MASK >> (ESAI_xCR_TE_WIDTH - ((x + 1) >> 1))) & ESAI_xCR_TE_MASK) | ||
276 | #define ESAI_xCR_RE(x) ((ESAI_xCR_RE_MASK >> (ESAI_xCR_RE_WIDTH - ((x + 1) >> 1))) & ESAI_xCR_RE_MASK) | ||
277 | |||
278 | /* | ||
279 | * Transmit Clock Control Register -- REG_ESAI_TCCR 0xD8 | ||
280 | * Receive Clock Control Register -- REG_ESAI_RCCR 0xE0 | ||
281 | */ | ||
282 | #define ESAI_xCCR_xHCKD_SHIFT 23 | ||
283 | #define ESAI_xCCR_xHCKD_MASK (1 << ESAI_xCCR_xHCKD_SHIFT) | ||
284 | #define ESAI_xCCR_xHCKD (1 << ESAI_xCCR_xHCKD_SHIFT) | ||
285 | #define ESAI_xCCR_xFSD_SHIFT 22 | ||
286 | #define ESAI_xCCR_xFSD_MASK (1 << ESAI_xCCR_xFSD_SHIFT) | ||
287 | #define ESAI_xCCR_xFSD (1 << ESAI_xCCR_xFSD_SHIFT) | ||
288 | #define ESAI_xCCR_xCKD_SHIFT 21 | ||
289 | #define ESAI_xCCR_xCKD_MASK (1 << ESAI_xCCR_xCKD_SHIFT) | ||
290 | #define ESAI_xCCR_xCKD (1 << ESAI_xCCR_xCKD_SHIFT) | ||
291 | #define ESAI_xCCR_xHCKP_SHIFT 20 | ||
292 | #define ESAI_xCCR_xHCKP_MASK (1 << ESAI_xCCR_xHCKP_SHIFT) | ||
293 | #define ESAI_xCCR_xHCKP (1 << ESAI_xCCR_xHCKP_SHIFT) | ||
294 | #define ESAI_xCCR_xFSP_SHIFT 19 | ||
295 | #define ESAI_xCCR_xFSP_MASK (1 << ESAI_xCCR_xFSP_SHIFT) | ||
296 | #define ESAI_xCCR_xFSP (1 << ESAI_xCCR_xFSP_SHIFT) | ||
297 | #define ESAI_xCCR_xCKP_SHIFT 18 | ||
298 | #define ESAI_xCCR_xCKP_MASK (1 << ESAI_xCCR_xCKP_SHIFT) | ||
299 | #define ESAI_xCCR_xCKP (1 << ESAI_xCCR_xCKP_SHIFT) | ||
300 | #define ESAI_xCCR_xFP_SHIFT 14 | ||
301 | #define ESAI_xCCR_xFP_WIDTH 4 | ||
302 | #define ESAI_xCCR_xFP_MASK (((1 << ESAI_xCCR_xFP_WIDTH) - 1) << ESAI_xCCR_xFP_SHIFT) | ||
303 | #define ESAI_xCCR_xFP(v) ((((v) - 1) << ESAI_xCCR_xFP_SHIFT) & ESAI_xCCR_xFP_MASK) | ||
304 | #define ESAI_xCCR_xDC_SHIFT 9 | ||
305 | #define ESAI_xCCR_xDC_WIDTH 4 | ||
306 | #define ESAI_xCCR_xDC_MASK (((1 << ESAI_xCCR_xDC_WIDTH) - 1) << ESAI_xCCR_xDC_SHIFT) | ||
307 | #define ESAI_xCCR_xDC(v) ((((v) - 1) << ESAI_xCCR_xDC_SHIFT) & ESAI_xCCR_xDC_MASK) | ||
308 | #define ESAI_xCCR_xPSR_SHIFT 8 | ||
309 | #define ESAI_xCCR_xPSR_MASK (1 << ESAI_xCCR_xPSR_SHIFT) | ||
310 | #define ESAI_xCCR_xPSR_BYPASS (1 << ESAI_xCCR_xPSR_SHIFT) | ||
311 | #define ESAI_xCCR_xPSR_DIV8 (0 << ESAI_xCCR_xPSR_SHIFT) | ||
312 | #define ESAI_xCCR_xPM_SHIFT 0 | ||
313 | #define ESAI_xCCR_xPM_WIDTH 8 | ||
314 | #define ESAI_xCCR_xPM_MASK (((1 << ESAI_xCCR_xPM_WIDTH) - 1) << ESAI_xCCR_xPM_SHIFT) | ||
315 | #define ESAI_xCCR_xPM(v) ((((v) - 1) << ESAI_xCCR_xPM_SHIFT) & ESAI_xCCR_xPM_MASK) | ||
316 | |||
317 | /* Transmit Slot Mask Register A/B -- REG_ESAI_TSMA/B 0xE4 ~ 0xF0 */ | ||
318 | #define ESAI_xSMA_xS_SHIFT 0 | ||
319 | #define ESAI_xSMA_xS_WIDTH 16 | ||
320 | #define ESAI_xSMA_xS_MASK (((1 << ESAI_xSMA_xS_WIDTH) - 1) << ESAI_xSMA_xS_SHIFT) | ||
321 | #define ESAI_xSMA_xS(v) ((v) & ESAI_xSMA_xS_MASK) | ||
322 | #define ESAI_xSMB_xS_SHIFT 0 | ||
323 | #define ESAI_xSMB_xS_WIDTH 16 | ||
324 | #define ESAI_xSMB_xS_MASK (((1 << ESAI_xSMB_xS_WIDTH) - 1) << ESAI_xSMB_xS_SHIFT) | ||
325 | #define ESAI_xSMB_xS(v) (((v) >> ESAI_xSMA_xS_WIDTH) & ESAI_xSMA_xS_MASK) | ||
326 | |||
327 | /* Port C Direction Register -- REG_ESAI_PRRC 0xF8 */ | ||
328 | #define ESAI_PRRC_PDC_SHIFT 0 | ||
329 | #define ESAI_PRRC_PDC_WIDTH 12 | ||
330 | #define ESAI_PRRC_PDC_MASK (((1 << ESAI_PRRC_PDC_WIDTH) - 1) << ESAI_PRRC_PDC_SHIFT) | ||
331 | #define ESAI_PRRC_PDC(v) ((v) & ESAI_PRRC_PDC_MASK) | ||
332 | |||
333 | /* Port C Control Register -- REG_ESAI_PCRC 0xFC */ | ||
334 | #define ESAI_PCRC_PC_SHIFT 0 | ||
335 | #define ESAI_PCRC_PC_WIDTH 12 | ||
336 | #define ESAI_PCRC_PC_MASK (((1 << ESAI_PCRC_PC_WIDTH) - 1) << ESAI_PCRC_PC_SHIFT) | ||
337 | #define ESAI_PCRC_PC(v) ((v) & ESAI_PCRC_PC_MASK) | ||
338 | |||
339 | #define ESAI_GPIO 0xfff | ||
340 | |||
341 | /* ESAI clock source */ | ||
342 | #define ESAI_HCKT_FSYS 0 | ||
343 | #define ESAI_HCKT_EXTAL 1 | ||
344 | #define ESAI_HCKR_FSYS 2 | ||
345 | #define ESAI_HCKR_EXTAL 3 | ||
346 | |||
347 | /* ESAI clock divider */ | ||
348 | #define ESAI_TX_DIV_PSR 0 | ||
349 | #define ESAI_TX_DIV_PM 1 | ||
350 | #define ESAI_TX_DIV_FP 2 | ||
351 | #define ESAI_RX_DIV_PSR 3 | ||
352 | #define ESAI_RX_DIV_PM 4 | ||
353 | #define ESAI_RX_DIV_FP 5 | ||
354 | #endif /* _FSL_ESAI_DAI_H */ | ||
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c new file mode 100644 index 000000000000..cdd3fa830704 --- /dev/null +++ b/sound/soc/fsl/fsl_sai.c | |||
@@ -0,0 +1,459 @@ | |||
1 | /* | ||
2 | * Freescale ALSA SoC Digital Audio Interface (SAI) driver. | ||
3 | * | ||
4 | * Copyright 2012-2013 Freescale Semiconductor, Inc. | ||
5 | * | ||
6 | * This program is free software, you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation, either version 2 of the License, or(at your | ||
9 | * option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/clk.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/dmaengine.h> | ||
16 | #include <linux/module.h> | ||
17 | #include <linux/of_address.h> | ||
18 | #include <linux/slab.h> | ||
19 | #include <sound/core.h> | ||
20 | #include <sound/dmaengine_pcm.h> | ||
21 | #include <sound/pcm_params.h> | ||
22 | |||
23 | #include "fsl_sai.h" | ||
24 | |||
25 | static inline u32 sai_readl(struct fsl_sai *sai, | ||
26 | const void __iomem *addr) | ||
27 | { | ||
28 | u32 val; | ||
29 | |||
30 | val = __raw_readl(addr); | ||
31 | |||
32 | if (likely(sai->big_endian_regs)) | ||
33 | val = be32_to_cpu(val); | ||
34 | else | ||
35 | val = le32_to_cpu(val); | ||
36 | rmb(); | ||
37 | |||
38 | return val; | ||
39 | } | ||
40 | |||
41 | static inline void sai_writel(struct fsl_sai *sai, | ||
42 | u32 val, void __iomem *addr) | ||
43 | { | ||
44 | wmb(); | ||
45 | if (likely(sai->big_endian_regs)) | ||
46 | val = cpu_to_be32(val); | ||
47 | else | ||
48 | val = cpu_to_le32(val); | ||
49 | |||
50 | __raw_writel(val, addr); | ||
51 | } | ||
52 | |||
53 | static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai, | ||
54 | int clk_id, unsigned int freq, int fsl_dir) | ||
55 | { | ||
56 | struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); | ||
57 | u32 val_cr2, reg_cr2; | ||
58 | |||
59 | if (fsl_dir == FSL_FMT_TRANSMITTER) | ||
60 | reg_cr2 = FSL_SAI_TCR2; | ||
61 | else | ||
62 | reg_cr2 = FSL_SAI_RCR2; | ||
63 | |||
64 | val_cr2 = sai_readl(sai, sai->base + reg_cr2); | ||
65 | val_cr2 &= ~FSL_SAI_CR2_MSEL_MASK; | ||
66 | |||
67 | switch (clk_id) { | ||
68 | case FSL_SAI_CLK_BUS: | ||
69 | val_cr2 |= FSL_SAI_CR2_MSEL_BUS; | ||
70 | break; | ||
71 | case FSL_SAI_CLK_MAST1: | ||
72 | val_cr2 |= FSL_SAI_CR2_MSEL_MCLK1; | ||
73 | break; | ||
74 | case FSL_SAI_CLK_MAST2: | ||
75 | val_cr2 |= FSL_SAI_CR2_MSEL_MCLK2; | ||
76 | break; | ||
77 | case FSL_SAI_CLK_MAST3: | ||
78 | val_cr2 |= FSL_SAI_CR2_MSEL_MCLK3; | ||
79 | break; | ||
80 | default: | ||
81 | return -EINVAL; | ||
82 | } | ||
83 | |||
84 | sai_writel(sai, val_cr2, sai->base + reg_cr2); | ||
85 | |||
86 | return 0; | ||
87 | } | ||
88 | |||
89 | static int fsl_sai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, | ||
90 | int clk_id, unsigned int freq, int dir) | ||
91 | { | ||
92 | struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); | ||
93 | int ret; | ||
94 | |||
95 | if (dir == SND_SOC_CLOCK_IN) | ||
96 | return 0; | ||
97 | |||
98 | ret = clk_prepare_enable(sai->clk); | ||
99 | if (ret) | ||
100 | return ret; | ||
101 | |||
102 | ret = fsl_sai_set_dai_sysclk_tr(cpu_dai, clk_id, freq, | ||
103 | FSL_FMT_TRANSMITTER); | ||
104 | if (ret) { | ||
105 | dev_err(cpu_dai->dev, "Cannot set tx sysclk: %d\n", ret); | ||
106 | goto err_clk; | ||
107 | } | ||
108 | |||
109 | ret = fsl_sai_set_dai_sysclk_tr(cpu_dai, clk_id, freq, | ||
110 | FSL_FMT_RECEIVER); | ||
111 | if (ret) { | ||
112 | dev_err(cpu_dai->dev, "Cannot set rx sysclk: %d\n", ret); | ||
113 | goto err_clk; | ||
114 | } | ||
115 | |||
116 | err_clk: | ||
117 | clk_disable_unprepare(sai->clk); | ||
118 | |||
119 | return ret; | ||
120 | } | ||
121 | |||
122 | static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai, | ||
123 | unsigned int fmt, int fsl_dir) | ||
124 | { | ||
125 | struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); | ||
126 | u32 val_cr2, val_cr4, reg_cr2, reg_cr4; | ||
127 | |||
128 | if (fsl_dir == FSL_FMT_TRANSMITTER) { | ||
129 | reg_cr2 = FSL_SAI_TCR2; | ||
130 | reg_cr4 = FSL_SAI_TCR4; | ||
131 | } else { | ||
132 | reg_cr2 = FSL_SAI_RCR2; | ||
133 | reg_cr4 = FSL_SAI_RCR4; | ||
134 | } | ||
135 | |||
136 | val_cr2 = sai_readl(sai, sai->base + reg_cr2); | ||
137 | val_cr4 = sai_readl(sai, sai->base + reg_cr4); | ||
138 | |||
139 | if (sai->big_endian_data) | ||
140 | val_cr4 &= ~FSL_SAI_CR4_MF; | ||
141 | else | ||
142 | val_cr4 |= FSL_SAI_CR4_MF; | ||
143 | |||
144 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | ||
145 | case SND_SOC_DAIFMT_I2S: | ||
146 | val_cr4 |= FSL_SAI_CR4_FSE; | ||
147 | break; | ||
148 | default: | ||
149 | return -EINVAL; | ||
150 | } | ||
151 | |||
152 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | ||
153 | case SND_SOC_DAIFMT_IB_IF: | ||
154 | val_cr4 |= FSL_SAI_CR4_FSP; | ||
155 | val_cr2 &= ~FSL_SAI_CR2_BCP; | ||
156 | break; | ||
157 | case SND_SOC_DAIFMT_IB_NF: | ||
158 | val_cr4 &= ~FSL_SAI_CR4_FSP; | ||
159 | val_cr2 &= ~FSL_SAI_CR2_BCP; | ||
160 | break; | ||
161 | case SND_SOC_DAIFMT_NB_IF: | ||
162 | val_cr4 |= FSL_SAI_CR4_FSP; | ||
163 | val_cr2 |= FSL_SAI_CR2_BCP; | ||
164 | break; | ||
165 | case SND_SOC_DAIFMT_NB_NF: | ||
166 | val_cr4 &= ~FSL_SAI_CR4_FSP; | ||
167 | val_cr2 |= FSL_SAI_CR2_BCP; | ||
168 | break; | ||
169 | default: | ||
170 | return -EINVAL; | ||
171 | } | ||
172 | |||
173 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | ||
174 | case SND_SOC_DAIFMT_CBS_CFS: | ||
175 | val_cr2 |= FSL_SAI_CR2_BCD_MSTR; | ||
176 | val_cr4 |= FSL_SAI_CR4_FSD_MSTR; | ||
177 | break; | ||
178 | case SND_SOC_DAIFMT_CBM_CFM: | ||
179 | val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR; | ||
180 | val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR; | ||
181 | break; | ||
182 | default: | ||
183 | return -EINVAL; | ||
184 | } | ||
185 | |||
186 | sai_writel(sai, val_cr2, sai->base + reg_cr2); | ||
187 | sai_writel(sai, val_cr4, sai->base + reg_cr4); | ||
188 | |||
189 | return 0; | ||
190 | } | ||
191 | |||
192 | static int fsl_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) | ||
193 | { | ||
194 | struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); | ||
195 | int ret; | ||
196 | |||
197 | ret = clk_prepare_enable(sai->clk); | ||
198 | if (ret) | ||
199 | return ret; | ||
200 | |||
201 | ret = fsl_sai_set_dai_fmt_tr(cpu_dai, fmt, FSL_FMT_TRANSMITTER); | ||
202 | if (ret) { | ||
203 | dev_err(cpu_dai->dev, "Cannot set tx format: %d\n", ret); | ||
204 | goto err_clk; | ||
205 | } | ||
206 | |||
207 | ret = fsl_sai_set_dai_fmt_tr(cpu_dai, fmt, FSL_FMT_RECEIVER); | ||
208 | if (ret) { | ||
209 | dev_err(cpu_dai->dev, "Cannot set rx format: %d\n", ret); | ||
210 | goto err_clk; | ||
211 | } | ||
212 | |||
213 | err_clk: | ||
214 | clk_disable_unprepare(sai->clk); | ||
215 | |||
216 | return ret; | ||
217 | } | ||
218 | |||
219 | static int fsl_sai_hw_params(struct snd_pcm_substream *substream, | ||
220 | struct snd_pcm_hw_params *params, | ||
221 | struct snd_soc_dai *cpu_dai) | ||
222 | { | ||
223 | struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); | ||
224 | u32 val_cr4, val_cr5, val_mr, reg_cr4, reg_cr5, reg_mr; | ||
225 | unsigned int channels = params_channels(params); | ||
226 | u32 word_width = snd_pcm_format_width(params_format(params)); | ||
227 | |||
228 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
229 | reg_cr4 = FSL_SAI_TCR4; | ||
230 | reg_cr5 = FSL_SAI_TCR5; | ||
231 | reg_mr = FSL_SAI_TMR; | ||
232 | } else { | ||
233 | reg_cr4 = FSL_SAI_RCR4; | ||
234 | reg_cr5 = FSL_SAI_RCR5; | ||
235 | reg_mr = FSL_SAI_RMR; | ||
236 | } | ||
237 | |||
238 | val_cr4 = sai_readl(sai, sai->base + reg_cr4); | ||
239 | val_cr4 &= ~FSL_SAI_CR4_SYWD_MASK; | ||
240 | val_cr4 &= ~FSL_SAI_CR4_FRSZ_MASK; | ||
241 | |||
242 | val_cr5 = sai_readl(sai, sai->base + reg_cr5); | ||
243 | val_cr5 &= ~FSL_SAI_CR5_WNW_MASK; | ||
244 | val_cr5 &= ~FSL_SAI_CR5_W0W_MASK; | ||
245 | val_cr5 &= ~FSL_SAI_CR5_FBT_MASK; | ||
246 | |||
247 | val_cr4 |= FSL_SAI_CR4_SYWD(word_width); | ||
248 | val_cr5 |= FSL_SAI_CR5_WNW(word_width); | ||
249 | val_cr5 |= FSL_SAI_CR5_W0W(word_width); | ||
250 | |||
251 | val_cr5 &= ~FSL_SAI_CR5_FBT_MASK; | ||
252 | if (sai->big_endian_data) | ||
253 | val_cr5 |= FSL_SAI_CR5_FBT(0); | ||
254 | else | ||
255 | val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1); | ||
256 | |||
257 | val_cr4 |= FSL_SAI_CR4_FRSZ(channels); | ||
258 | val_mr = ~0UL - ((1 << channels) - 1); | ||
259 | |||
260 | sai_writel(sai, val_cr4, sai->base + reg_cr4); | ||
261 | sai_writel(sai, val_cr5, sai->base + reg_cr5); | ||
262 | sai_writel(sai, val_mr, sai->base + reg_mr); | ||
263 | |||
264 | return 0; | ||
265 | } | ||
266 | |||
267 | static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, | ||
268 | struct snd_soc_dai *cpu_dai) | ||
269 | { | ||
270 | struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); | ||
271 | u32 tcsr, rcsr, val_cr2, val_cr3, reg_cr3; | ||
272 | |||
273 | val_cr2 = sai_readl(sai, sai->base + FSL_SAI_TCR2); | ||
274 | val_cr2 &= ~FSL_SAI_CR2_SYNC; | ||
275 | sai_writel(sai, val_cr2, sai->base + FSL_SAI_TCR2); | ||
276 | |||
277 | val_cr2 = sai_readl(sai, sai->base + FSL_SAI_RCR2); | ||
278 | val_cr2 |= FSL_SAI_CR2_SYNC; | ||
279 | sai_writel(sai, val_cr2, sai->base + FSL_SAI_RCR2); | ||
280 | |||
281 | tcsr = sai_readl(sai, sai->base + FSL_SAI_TCSR); | ||
282 | rcsr = sai_readl(sai, sai->base + FSL_SAI_RCSR); | ||
283 | |||
284 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
285 | tcsr |= FSL_SAI_CSR_FRDE; | ||
286 | rcsr &= ~FSL_SAI_CSR_FRDE; | ||
287 | reg_cr3 = FSL_SAI_TCR3; | ||
288 | } else { | ||
289 | rcsr |= FSL_SAI_CSR_FRDE; | ||
290 | tcsr &= ~FSL_SAI_CSR_FRDE; | ||
291 | reg_cr3 = FSL_SAI_RCR3; | ||
292 | } | ||
293 | |||
294 | val_cr3 = sai_readl(sai, sai->base + reg_cr3); | ||
295 | |||
296 | switch (cmd) { | ||
297 | case SNDRV_PCM_TRIGGER_START: | ||
298 | case SNDRV_PCM_TRIGGER_RESUME: | ||
299 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
300 | tcsr |= FSL_SAI_CSR_TERE; | ||
301 | rcsr |= FSL_SAI_CSR_TERE; | ||
302 | val_cr3 |= FSL_SAI_CR3_TRCE; | ||
303 | |||
304 | sai_writel(sai, val_cr3, sai->base + reg_cr3); | ||
305 | sai_writel(sai, rcsr, sai->base + FSL_SAI_RCSR); | ||
306 | sai_writel(sai, tcsr, sai->base + FSL_SAI_TCSR); | ||
307 | break; | ||
308 | |||
309 | case SNDRV_PCM_TRIGGER_STOP: | ||
310 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
311 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
312 | if (!(cpu_dai->playback_active || cpu_dai->capture_active)) { | ||
313 | tcsr &= ~FSL_SAI_CSR_TERE; | ||
314 | rcsr &= ~FSL_SAI_CSR_TERE; | ||
315 | } | ||
316 | |||
317 | val_cr3 &= ~FSL_SAI_CR3_TRCE; | ||
318 | |||
319 | sai_writel(sai, tcsr, sai->base + FSL_SAI_TCSR); | ||
320 | sai_writel(sai, rcsr, sai->base + FSL_SAI_RCSR); | ||
321 | sai_writel(sai, val_cr3, sai->base + reg_cr3); | ||
322 | break; | ||
323 | default: | ||
324 | return -EINVAL; | ||
325 | } | ||
326 | |||
327 | return 0; | ||
328 | } | ||
329 | |||
330 | static int fsl_sai_startup(struct snd_pcm_substream *substream, | ||
331 | struct snd_soc_dai *cpu_dai) | ||
332 | { | ||
333 | struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); | ||
334 | |||
335 | return clk_prepare_enable(sai->clk); | ||
336 | } | ||
337 | |||
338 | static void fsl_sai_shutdown(struct snd_pcm_substream *substream, | ||
339 | struct snd_soc_dai *cpu_dai) | ||
340 | { | ||
341 | struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); | ||
342 | |||
343 | clk_disable_unprepare(sai->clk); | ||
344 | } | ||
345 | |||
346 | static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = { | ||
347 | .set_sysclk = fsl_sai_set_dai_sysclk, | ||
348 | .set_fmt = fsl_sai_set_dai_fmt, | ||
349 | .hw_params = fsl_sai_hw_params, | ||
350 | .trigger = fsl_sai_trigger, | ||
351 | .startup = fsl_sai_startup, | ||
352 | .shutdown = fsl_sai_shutdown, | ||
353 | }; | ||
354 | |||
355 | static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai) | ||
356 | { | ||
357 | struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev); | ||
358 | int ret; | ||
359 | |||
360 | ret = clk_prepare_enable(sai->clk); | ||
361 | if (ret) | ||
362 | return ret; | ||
363 | |||
364 | sai_writel(sai, 0x0, sai->base + FSL_SAI_RCSR); | ||
365 | sai_writel(sai, 0x0, sai->base + FSL_SAI_TCSR); | ||
366 | sai_writel(sai, FSL_SAI_MAXBURST_TX * 2, sai->base + FSL_SAI_TCR1); | ||
367 | sai_writel(sai, FSL_SAI_MAXBURST_RX - 1, sai->base + FSL_SAI_RCR1); | ||
368 | |||
369 | clk_disable_unprepare(sai->clk); | ||
370 | |||
371 | snd_soc_dai_init_dma_data(cpu_dai, &sai->dma_params_tx, | ||
372 | &sai->dma_params_rx); | ||
373 | |||
374 | snd_soc_dai_set_drvdata(cpu_dai, sai); | ||
375 | |||
376 | return 0; | ||
377 | } | ||
378 | |||
379 | static struct snd_soc_dai_driver fsl_sai_dai = { | ||
380 | .probe = fsl_sai_dai_probe, | ||
381 | .playback = { | ||
382 | .channels_min = 1, | ||
383 | .channels_max = 2, | ||
384 | .rates = SNDRV_PCM_RATE_8000_96000, | ||
385 | .formats = FSL_SAI_FORMATS, | ||
386 | }, | ||
387 | .capture = { | ||
388 | .channels_min = 1, | ||
389 | .channels_max = 2, | ||
390 | .rates = SNDRV_PCM_RATE_8000_96000, | ||
391 | .formats = FSL_SAI_FORMATS, | ||
392 | }, | ||
393 | .ops = &fsl_sai_pcm_dai_ops, | ||
394 | }; | ||
395 | |||
396 | static const struct snd_soc_component_driver fsl_component = { | ||
397 | .name = "fsl-sai", | ||
398 | }; | ||
399 | |||
400 | static int fsl_sai_probe(struct platform_device *pdev) | ||
401 | { | ||
402 | struct device_node *np = pdev->dev.of_node; | ||
403 | struct fsl_sai *sai; | ||
404 | struct resource *res; | ||
405 | int ret; | ||
406 | |||
407 | sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL); | ||
408 | if (!sai) | ||
409 | return -ENOMEM; | ||
410 | |||
411 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
412 | sai->base = devm_ioremap_resource(&pdev->dev, res); | ||
413 | if (IS_ERR(sai->base)) | ||
414 | return PTR_ERR(sai->base); | ||
415 | |||
416 | sai->clk = devm_clk_get(&pdev->dev, "sai"); | ||
417 | if (IS_ERR(sai->clk)) { | ||
418 | dev_err(&pdev->dev, "Cannot get SAI's clock\n"); | ||
419 | return PTR_ERR(sai->clk); | ||
420 | } | ||
421 | |||
422 | sai->dma_params_rx.addr = res->start + FSL_SAI_RDR; | ||
423 | sai->dma_params_tx.addr = res->start + FSL_SAI_TDR; | ||
424 | sai->dma_params_rx.maxburst = FSL_SAI_MAXBURST_RX; | ||
425 | sai->dma_params_tx.maxburst = FSL_SAI_MAXBURST_TX; | ||
426 | |||
427 | sai->big_endian_regs = of_property_read_bool(np, "big-endian-regs"); | ||
428 | sai->big_endian_data = of_property_read_bool(np, "big-endian-data"); | ||
429 | |||
430 | platform_set_drvdata(pdev, sai); | ||
431 | |||
432 | ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component, | ||
433 | &fsl_sai_dai, 1); | ||
434 | if (ret) | ||
435 | return ret; | ||
436 | |||
437 | return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, | ||
438 | SND_DMAENGINE_PCM_FLAG_NO_RESIDUE); | ||
439 | } | ||
440 | |||
441 | static const struct of_device_id fsl_sai_ids[] = { | ||
442 | { .compatible = "fsl,vf610-sai", }, | ||
443 | { /* sentinel */ } | ||
444 | }; | ||
445 | |||
446 | static struct platform_driver fsl_sai_driver = { | ||
447 | .probe = fsl_sai_probe, | ||
448 | .driver = { | ||
449 | .name = "fsl-sai", | ||
450 | .owner = THIS_MODULE, | ||
451 | .of_match_table = fsl_sai_ids, | ||
452 | }, | ||
453 | }; | ||
454 | module_platform_driver(fsl_sai_driver); | ||
455 | |||
456 | MODULE_DESCRIPTION("Freescale Soc SAI Interface"); | ||
457 | MODULE_AUTHOR("Xiubo Li, <Li.Xiubo@freescale.com>"); | ||
458 | MODULE_ALIAS("platform:fsl-sai"); | ||
459 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h new file mode 100644 index 000000000000..41bb62e69361 --- /dev/null +++ b/sound/soc/fsl/fsl_sai.h | |||
@@ -0,0 +1,114 @@ | |||
1 | /* | ||
2 | * Copyright 2012-2013 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __FSL_SAI_H | ||
10 | #define __FSL_SAI_H | ||
11 | |||
12 | #include <sound/dmaengine_pcm.h> | ||
13 | |||
14 | #define FSL_SAI_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ | ||
15 | SNDRV_PCM_FMTBIT_S20_3LE |\ | ||
16 | SNDRV_PCM_FMTBIT_S24_LE) | ||
17 | |||
18 | /* SAI Transmit/Recieve Control Register */ | ||
19 | #define FSL_SAI_TCSR 0x00 | ||
20 | #define FSL_SAI_RCSR 0x80 | ||
21 | #define FSL_SAI_CSR_TERE BIT(31) | ||
22 | #define FSL_SAI_CSR_FWF BIT(17) | ||
23 | #define FSL_SAI_CSR_FRIE BIT(8) | ||
24 | #define FSL_SAI_CSR_FRDE BIT(0) | ||
25 | |||
26 | /* SAI Transmit Data/FIFO/MASK Register */ | ||
27 | #define FSL_SAI_TDR 0x20 | ||
28 | #define FSL_SAI_TFR 0x40 | ||
29 | #define FSL_SAI_TMR 0x60 | ||
30 | |||
31 | /* SAI Recieve Data/FIFO/MASK Register */ | ||
32 | #define FSL_SAI_RDR 0xa0 | ||
33 | #define FSL_SAI_RFR 0xc0 | ||
34 | #define FSL_SAI_RMR 0xe0 | ||
35 | |||
36 | /* SAI Transmit and Recieve Configuration 1 Register */ | ||
37 | #define FSL_SAI_TCR1 0x04 | ||
38 | #define FSL_SAI_RCR1 0x84 | ||
39 | |||
40 | /* SAI Transmit and Recieve Configuration 2 Register */ | ||
41 | #define FSL_SAI_TCR2 0x08 | ||
42 | #define FSL_SAI_RCR2 0x88 | ||
43 | #define FSL_SAI_CR2_SYNC BIT(30) | ||
44 | #define FSL_SAI_CR2_MSEL_MASK (0xff << 26) | ||
45 | #define FSL_SAI_CR2_MSEL_BUS 0 | ||
46 | #define FSL_SAI_CR2_MSEL_MCLK1 BIT(26) | ||
47 | #define FSL_SAI_CR2_MSEL_MCLK2 BIT(27) | ||
48 | #define FSL_SAI_CR2_MSEL_MCLK3 (BIT(26) | BIT(27)) | ||
49 | #define FSL_SAI_CR2_BCP BIT(25) | ||
50 | #define FSL_SAI_CR2_BCD_MSTR BIT(24) | ||
51 | |||
52 | /* SAI Transmit and Recieve Configuration 3 Register */ | ||
53 | #define FSL_SAI_TCR3 0x0c | ||
54 | #define FSL_SAI_RCR3 0x8c | ||
55 | #define FSL_SAI_CR3_TRCE BIT(16) | ||
56 | #define FSL_SAI_CR3_WDFL(x) (x) | ||
57 | #define FSL_SAI_CR3_WDFL_MASK 0x1f | ||
58 | |||
59 | /* SAI Transmit and Recieve Configuration 4 Register */ | ||
60 | #define FSL_SAI_TCR4 0x10 | ||
61 | #define FSL_SAI_RCR4 0x90 | ||
62 | #define FSL_SAI_CR4_FRSZ(x) (((x) - 1) << 16) | ||
63 | #define FSL_SAI_CR4_FRSZ_MASK (0x1f << 16) | ||
64 | #define FSL_SAI_CR4_SYWD(x) (((x) - 1) << 8) | ||
65 | #define FSL_SAI_CR4_SYWD_MASK (0x1f << 8) | ||
66 | #define FSL_SAI_CR4_MF BIT(4) | ||
67 | #define FSL_SAI_CR4_FSE BIT(3) | ||
68 | #define FSL_SAI_CR4_FSP BIT(1) | ||
69 | #define FSL_SAI_CR4_FSD_MSTR BIT(0) | ||
70 | |||
71 | /* SAI Transmit and Recieve Configuration 5 Register */ | ||
72 | #define FSL_SAI_TCR5 0x14 | ||
73 | #define FSL_SAI_RCR5 0x94 | ||
74 | #define FSL_SAI_CR5_WNW(x) (((x) - 1) << 24) | ||
75 | #define FSL_SAI_CR5_WNW_MASK (0x1f << 24) | ||
76 | #define FSL_SAI_CR5_W0W(x) (((x) - 1) << 16) | ||
77 | #define FSL_SAI_CR5_W0W_MASK (0x1f << 16) | ||
78 | #define FSL_SAI_CR5_FBT(x) ((x) << 8) | ||
79 | #define FSL_SAI_CR5_FBT_MASK (0x1f << 8) | ||
80 | |||
81 | /* SAI type */ | ||
82 | #define FSL_SAI_DMA BIT(0) | ||
83 | #define FSL_SAI_USE_AC97 BIT(1) | ||
84 | #define FSL_SAI_NET BIT(2) | ||
85 | #define FSL_SAI_TRA_SYN BIT(3) | ||
86 | #define FSL_SAI_REC_SYN BIT(4) | ||
87 | #define FSL_SAI_USE_I2S_SLAVE BIT(5) | ||
88 | |||
89 | #define FSL_FMT_TRANSMITTER 0 | ||
90 | #define FSL_FMT_RECEIVER 1 | ||
91 | |||
92 | /* SAI clock sources */ | ||
93 | #define FSL_SAI_CLK_BUS 0 | ||
94 | #define FSL_SAI_CLK_MAST1 1 | ||
95 | #define FSL_SAI_CLK_MAST2 2 | ||
96 | #define FSL_SAI_CLK_MAST3 3 | ||
97 | |||
98 | /* SAI data transfer numbers per DMA request */ | ||
99 | #define FSL_SAI_MAXBURST_TX 6 | ||
100 | #define FSL_SAI_MAXBURST_RX 6 | ||
101 | |||
102 | struct fsl_sai { | ||
103 | struct clk *clk; | ||
104 | |||
105 | void __iomem *base; | ||
106 | |||
107 | bool big_endian_regs; | ||
108 | bool big_endian_data; | ||
109 | |||
110 | struct snd_dmaengine_dai_dma_data dma_params_rx; | ||
111 | struct snd_dmaengine_dai_dma_data dma_params_tx; | ||
112 | }; | ||
113 | |||
114 | #endif /* __FSL_SAI_H */ | ||
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index 55193a5596ca..4d075f1abe78 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c | |||
@@ -1181,13 +1181,6 @@ static int fsl_spdif_probe(struct platform_device *pdev) | |||
1181 | return ret; | 1181 | return ret; |
1182 | } | 1182 | } |
1183 | 1183 | ||
1184 | static int fsl_spdif_remove(struct platform_device *pdev) | ||
1185 | { | ||
1186 | imx_pcm_dma_exit(pdev); | ||
1187 | |||
1188 | return 0; | ||
1189 | } | ||
1190 | |||
1191 | static const struct of_device_id fsl_spdif_dt_ids[] = { | 1184 | static const struct of_device_id fsl_spdif_dt_ids[] = { |
1192 | { .compatible = "fsl,imx35-spdif", }, | 1185 | { .compatible = "fsl,imx35-spdif", }, |
1193 | {} | 1186 | {} |
@@ -1201,7 +1194,6 @@ static struct platform_driver fsl_spdif_driver = { | |||
1201 | .of_match_table = fsl_spdif_dt_ids, | 1194 | .of_match_table = fsl_spdif_dt_ids, |
1202 | }, | 1195 | }, |
1203 | .probe = fsl_spdif_probe, | 1196 | .probe = fsl_spdif_probe, |
1204 | .remove = fsl_spdif_remove, | ||
1205 | }; | 1197 | }; |
1206 | 1198 | ||
1207 | module_platform_driver(fsl_spdif_driver); | 1199 | module_platform_driver(fsl_spdif_driver); |
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 35e277379b86..f9090b167ad7 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c | |||
@@ -35,9 +35,11 @@ | |||
35 | #include <linux/module.h> | 35 | #include <linux/module.h> |
36 | #include <linux/interrupt.h> | 36 | #include <linux/interrupt.h> |
37 | #include <linux/clk.h> | 37 | #include <linux/clk.h> |
38 | #include <linux/debugfs.h> | ||
38 | #include <linux/device.h> | 39 | #include <linux/device.h> |
39 | #include <linux/delay.h> | 40 | #include <linux/delay.h> |
40 | #include <linux/slab.h> | 41 | #include <linux/slab.h> |
42 | #include <linux/spinlock.h> | ||
41 | #include <linux/of_address.h> | 43 | #include <linux/of_address.h> |
42 | #include <linux/of_irq.h> | 44 | #include <linux/of_irq.h> |
43 | #include <linux/of_platform.h> | 45 | #include <linux/of_platform.h> |
@@ -79,8 +81,7 @@ static inline void write_ssi_mask(u32 __iomem *addr, u32 clear, u32 set) | |||
79 | * ALSA that we support all rates and let the codec driver decide what rates | 81 | * ALSA that we support all rates and let the codec driver decide what rates |
80 | * are really supported. | 82 | * are really supported. |
81 | */ | 83 | */ |
82 | #define FSLSSI_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \ | 84 | #define FSLSSI_I2S_RATES SNDRV_PCM_RATE_CONTINUOUS |
83 | SNDRV_PCM_RATE_CONTINUOUS) | ||
84 | 85 | ||
85 | /** | 86 | /** |
86 | * FSLSSI_I2S_FORMATS: audio formats supported by the SSI | 87 | * FSLSSI_I2S_FORMATS: audio formats supported by the SSI |
@@ -106,12 +107,33 @@ static inline void write_ssi_mask(u32 __iomem *addr, u32 clear, u32 set) | |||
106 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE) | 107 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE) |
107 | #endif | 108 | #endif |
108 | 109 | ||
109 | /* SIER bitflag of interrupts to enable */ | 110 | #define FSLSSI_SIER_DBG_RX_FLAGS (CCSR_SSI_SIER_RFF0_EN | \ |
110 | #define SIER_FLAGS (CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TDMAE | \ | 111 | CCSR_SSI_SIER_RLS_EN | CCSR_SSI_SIER_RFS_EN | \ |
111 | CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TUE0_EN | \ | 112 | CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_RFRC_EN) |
112 | CCSR_SSI_SIER_TUE1_EN | CCSR_SSI_SIER_RFRC_EN | \ | 113 | #define FSLSSI_SIER_DBG_TX_FLAGS (CCSR_SSI_SIER_TFE0_EN | \ |
113 | CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE | \ | 114 | CCSR_SSI_SIER_TLS_EN | CCSR_SSI_SIER_TFS_EN | \ |
114 | CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN) | 115 | CCSR_SSI_SIER_TUE0_EN | CCSR_SSI_SIER_TFRC_EN) |
116 | #define FSLSSI_SISR_MASK (FSLSSI_SIER_DBG_RX_FLAGS | FSLSSI_SIER_DBG_TX_FLAGS) | ||
117 | |||
118 | |||
119 | enum fsl_ssi_type { | ||
120 | FSL_SSI_MCP8610, | ||
121 | FSL_SSI_MX21, | ||
122 | FSL_SSI_MX35, | ||
123 | FSL_SSI_MX51, | ||
124 | }; | ||
125 | |||
126 | struct fsl_ssi_reg_val { | ||
127 | u32 sier; | ||
128 | u32 srcr; | ||
129 | u32 stcr; | ||
130 | u32 scr; | ||
131 | }; | ||
132 | |||
133 | struct fsl_ssi_rxtx_reg_val { | ||
134 | struct fsl_ssi_reg_val rx; | ||
135 | struct fsl_ssi_reg_val tx; | ||
136 | }; | ||
115 | 137 | ||
116 | /** | 138 | /** |
117 | * fsl_ssi_private: per-SSI private data | 139 | * fsl_ssi_private: per-SSI private data |
@@ -119,8 +141,6 @@ static inline void write_ssi_mask(u32 __iomem *addr, u32 clear, u32 set) | |||
119 | * @ssi: pointer to the SSI's registers | 141 | * @ssi: pointer to the SSI's registers |
120 | * @ssi_phys: physical address of the SSI registers | 142 | * @ssi_phys: physical address of the SSI registers |
121 | * @irq: IRQ of this SSI | 143 | * @irq: IRQ of this SSI |
122 | * @first_stream: pointer to the stream that was opened first | ||
123 | * @second_stream: pointer to second stream | ||
124 | * @playback: the number of playback streams opened | 144 | * @playback: the number of playback streams opened |
125 | * @capture: the number of capture streams opened | 145 | * @capture: the number of capture streams opened |
126 | * @cpu_dai: the CPU DAI for this device | 146 | * @cpu_dai: the CPU DAI for this device |
@@ -132,23 +152,29 @@ struct fsl_ssi_private { | |||
132 | struct ccsr_ssi __iomem *ssi; | 152 | struct ccsr_ssi __iomem *ssi; |
133 | dma_addr_t ssi_phys; | 153 | dma_addr_t ssi_phys; |
134 | unsigned int irq; | 154 | unsigned int irq; |
135 | struct snd_pcm_substream *first_stream; | ||
136 | struct snd_pcm_substream *second_stream; | ||
137 | unsigned int fifo_depth; | 155 | unsigned int fifo_depth; |
138 | struct snd_soc_dai_driver cpu_dai_drv; | 156 | struct snd_soc_dai_driver cpu_dai_drv; |
139 | struct device_attribute dev_attr; | ||
140 | struct platform_device *pdev; | 157 | struct platform_device *pdev; |
141 | 158 | ||
159 | enum fsl_ssi_type hw_type; | ||
142 | bool new_binding; | 160 | bool new_binding; |
143 | bool ssi_on_imx; | 161 | bool ssi_on_imx; |
144 | bool imx_ac97; | 162 | bool imx_ac97; |
145 | bool use_dma; | 163 | bool use_dma; |
164 | bool baudclk_locked; | ||
165 | bool irq_stats; | ||
166 | bool offline_config; | ||
167 | u8 i2s_mode; | ||
168 | spinlock_t baudclk_lock; | ||
169 | struct clk *baudclk; | ||
146 | struct clk *clk; | 170 | struct clk *clk; |
147 | struct snd_dmaengine_dai_dma_data dma_params_tx; | 171 | struct snd_dmaengine_dai_dma_data dma_params_tx; |
148 | struct snd_dmaengine_dai_dma_data dma_params_rx; | 172 | struct snd_dmaengine_dai_dma_data dma_params_rx; |
149 | struct imx_dma_data filter_data_tx; | 173 | struct imx_dma_data filter_data_tx; |
150 | struct imx_dma_data filter_data_rx; | 174 | struct imx_dma_data filter_data_rx; |
151 | struct imx_pcm_fiq_params fiq_params; | 175 | struct imx_pcm_fiq_params fiq_params; |
176 | /* Register values for rx/tx configuration */ | ||
177 | struct fsl_ssi_rxtx_reg_val rxtx_reg_val; | ||
152 | 178 | ||
153 | struct { | 179 | struct { |
154 | unsigned int rfrc; | 180 | unsigned int rfrc; |
@@ -173,10 +199,21 @@ struct fsl_ssi_private { | |||
173 | unsigned int tfe1; | 199 | unsigned int tfe1; |
174 | unsigned int tfe0; | 200 | unsigned int tfe0; |
175 | } stats; | 201 | } stats; |
202 | struct dentry *dbg_dir; | ||
203 | struct dentry *dbg_stats; | ||
176 | 204 | ||
177 | char name[1]; | 205 | char name[1]; |
178 | }; | 206 | }; |
179 | 207 | ||
208 | static const struct of_device_id fsl_ssi_ids[] = { | ||
209 | { .compatible = "fsl,mpc8610-ssi", .data = (void *) FSL_SSI_MCP8610}, | ||
210 | { .compatible = "fsl,imx51-ssi", .data = (void *) FSL_SSI_MX51}, | ||
211 | { .compatible = "fsl,imx35-ssi", .data = (void *) FSL_SSI_MX35}, | ||
212 | { .compatible = "fsl,imx21-ssi", .data = (void *) FSL_SSI_MX21}, | ||
213 | {} | ||
214 | }; | ||
215 | MODULE_DEVICE_TABLE(of, fsl_ssi_ids); | ||
216 | |||
180 | /** | 217 | /** |
181 | * fsl_ssi_isr: SSI interrupt handler | 218 | * fsl_ssi_isr: SSI interrupt handler |
182 | * | 219 | * |
@@ -195,23 +232,40 @@ static irqreturn_t fsl_ssi_isr(int irq, void *dev_id) | |||
195 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | 232 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; |
196 | irqreturn_t ret = IRQ_NONE; | 233 | irqreturn_t ret = IRQ_NONE; |
197 | __be32 sisr; | 234 | __be32 sisr; |
198 | __be32 sisr2 = 0; | 235 | __be32 sisr2; |
236 | __be32 sisr_write_mask = 0; | ||
237 | |||
238 | switch (ssi_private->hw_type) { | ||
239 | case FSL_SSI_MX21: | ||
240 | sisr_write_mask = 0; | ||
241 | break; | ||
242 | |||
243 | case FSL_SSI_MCP8610: | ||
244 | case FSL_SSI_MX35: | ||
245 | sisr_write_mask = CCSR_SSI_SISR_RFRC | CCSR_SSI_SISR_TFRC | | ||
246 | CCSR_SSI_SISR_ROE0 | CCSR_SSI_SISR_ROE1 | | ||
247 | CCSR_SSI_SISR_TUE0 | CCSR_SSI_SISR_TUE1; | ||
248 | break; | ||
249 | |||
250 | case FSL_SSI_MX51: | ||
251 | sisr_write_mask = CCSR_SSI_SISR_ROE0 | CCSR_SSI_SISR_ROE1 | | ||
252 | CCSR_SSI_SISR_TUE0 | CCSR_SSI_SISR_TUE1; | ||
253 | break; | ||
254 | } | ||
199 | 255 | ||
200 | /* We got an interrupt, so read the status register to see what we | 256 | /* We got an interrupt, so read the status register to see what we |
201 | were interrupted for. We mask it with the Interrupt Enable register | 257 | were interrupted for. We mask it with the Interrupt Enable register |
202 | so that we only check for events that we're interested in. | 258 | so that we only check for events that we're interested in. |
203 | */ | 259 | */ |
204 | sisr = read_ssi(&ssi->sisr) & SIER_FLAGS; | 260 | sisr = read_ssi(&ssi->sisr) & FSLSSI_SISR_MASK; |
205 | 261 | ||
206 | if (sisr & CCSR_SSI_SISR_RFRC) { | 262 | if (sisr & CCSR_SSI_SISR_RFRC) { |
207 | ssi_private->stats.rfrc++; | 263 | ssi_private->stats.rfrc++; |
208 | sisr2 |= CCSR_SSI_SISR_RFRC; | ||
209 | ret = IRQ_HANDLED; | 264 | ret = IRQ_HANDLED; |
210 | } | 265 | } |
211 | 266 | ||
212 | if (sisr & CCSR_SSI_SISR_TFRC) { | 267 | if (sisr & CCSR_SSI_SISR_TFRC) { |
213 | ssi_private->stats.tfrc++; | 268 | ssi_private->stats.tfrc++; |
214 | sisr2 |= CCSR_SSI_SISR_TFRC; | ||
215 | ret = IRQ_HANDLED; | 269 | ret = IRQ_HANDLED; |
216 | } | 270 | } |
217 | 271 | ||
@@ -252,25 +306,21 @@ static irqreturn_t fsl_ssi_isr(int irq, void *dev_id) | |||
252 | 306 | ||
253 | if (sisr & CCSR_SSI_SISR_ROE1) { | 307 | if (sisr & CCSR_SSI_SISR_ROE1) { |
254 | ssi_private->stats.roe1++; | 308 | ssi_private->stats.roe1++; |
255 | sisr2 |= CCSR_SSI_SISR_ROE1; | ||
256 | ret = IRQ_HANDLED; | 309 | ret = IRQ_HANDLED; |
257 | } | 310 | } |
258 | 311 | ||
259 | if (sisr & CCSR_SSI_SISR_ROE0) { | 312 | if (sisr & CCSR_SSI_SISR_ROE0) { |
260 | ssi_private->stats.roe0++; | 313 | ssi_private->stats.roe0++; |
261 | sisr2 |= CCSR_SSI_SISR_ROE0; | ||
262 | ret = IRQ_HANDLED; | 314 | ret = IRQ_HANDLED; |
263 | } | 315 | } |
264 | 316 | ||
265 | if (sisr & CCSR_SSI_SISR_TUE1) { | 317 | if (sisr & CCSR_SSI_SISR_TUE1) { |
266 | ssi_private->stats.tue1++; | 318 | ssi_private->stats.tue1++; |
267 | sisr2 |= CCSR_SSI_SISR_TUE1; | ||
268 | ret = IRQ_HANDLED; | 319 | ret = IRQ_HANDLED; |
269 | } | 320 | } |
270 | 321 | ||
271 | if (sisr & CCSR_SSI_SISR_TUE0) { | 322 | if (sisr & CCSR_SSI_SISR_TUE0) { |
272 | ssi_private->stats.tue0++; | 323 | ssi_private->stats.tue0++; |
273 | sisr2 |= CCSR_SSI_SISR_TUE0; | ||
274 | ret = IRQ_HANDLED; | 324 | ret = IRQ_HANDLED; |
275 | } | 325 | } |
276 | 326 | ||
@@ -314,6 +364,7 @@ static irqreturn_t fsl_ssi_isr(int irq, void *dev_id) | |||
314 | ret = IRQ_HANDLED; | 364 | ret = IRQ_HANDLED; |
315 | } | 365 | } |
316 | 366 | ||
367 | sisr2 = sisr & sisr_write_mask; | ||
317 | /* Clear the bits that we set */ | 368 | /* Clear the bits that we set */ |
318 | if (sisr2) | 369 | if (sisr2) |
319 | write_ssi(sisr2, &ssi->sisr); | 370 | write_ssi(sisr2, &ssi->sisr); |
@@ -321,17 +372,287 @@ static irqreturn_t fsl_ssi_isr(int irq, void *dev_id) | |||
321 | return ret; | 372 | return ret; |
322 | } | 373 | } |
323 | 374 | ||
375 | #if IS_ENABLED(CONFIG_DEBUG_FS) | ||
376 | /* Show the statistics of a flag only if its interrupt is enabled. The | ||
377 | * compiler will optimze this code to a no-op if the interrupt is not | ||
378 | * enabled. | ||
379 | */ | ||
380 | #define SIER_SHOW(flag, name) \ | ||
381 | do { \ | ||
382 | if (FSLSSI_SISR_MASK & CCSR_SSI_SIER_##flag) \ | ||
383 | seq_printf(s, #name "=%u\n", ssi_private->stats.name); \ | ||
384 | } while (0) | ||
385 | |||
386 | |||
387 | /** | ||
388 | * fsl_sysfs_ssi_show: display SSI statistics | ||
389 | * | ||
390 | * Display the statistics for the current SSI device. To avoid confusion, | ||
391 | * we only show those counts that are enabled. | ||
392 | */ | ||
393 | static int fsl_ssi_stats_show(struct seq_file *s, void *unused) | ||
394 | { | ||
395 | struct fsl_ssi_private *ssi_private = s->private; | ||
396 | |||
397 | SIER_SHOW(RFRC_EN, rfrc); | ||
398 | SIER_SHOW(TFRC_EN, tfrc); | ||
399 | SIER_SHOW(CMDAU_EN, cmdau); | ||
400 | SIER_SHOW(CMDDU_EN, cmddu); | ||
401 | SIER_SHOW(RXT_EN, rxt); | ||
402 | SIER_SHOW(RDR1_EN, rdr1); | ||
403 | SIER_SHOW(RDR0_EN, rdr0); | ||
404 | SIER_SHOW(TDE1_EN, tde1); | ||
405 | SIER_SHOW(TDE0_EN, tde0); | ||
406 | SIER_SHOW(ROE1_EN, roe1); | ||
407 | SIER_SHOW(ROE0_EN, roe0); | ||
408 | SIER_SHOW(TUE1_EN, tue1); | ||
409 | SIER_SHOW(TUE0_EN, tue0); | ||
410 | SIER_SHOW(TFS_EN, tfs); | ||
411 | SIER_SHOW(RFS_EN, rfs); | ||
412 | SIER_SHOW(TLS_EN, tls); | ||
413 | SIER_SHOW(RLS_EN, rls); | ||
414 | SIER_SHOW(RFF1_EN, rff1); | ||
415 | SIER_SHOW(RFF0_EN, rff0); | ||
416 | SIER_SHOW(TFE1_EN, tfe1); | ||
417 | SIER_SHOW(TFE0_EN, tfe0); | ||
418 | |||
419 | return 0; | ||
420 | } | ||
421 | |||
422 | static int fsl_ssi_stats_open(struct inode *inode, struct file *file) | ||
423 | { | ||
424 | return single_open(file, fsl_ssi_stats_show, inode->i_private); | ||
425 | } | ||
426 | |||
427 | static const struct file_operations fsl_ssi_stats_ops = { | ||
428 | .open = fsl_ssi_stats_open, | ||
429 | .read = seq_read, | ||
430 | .llseek = seq_lseek, | ||
431 | .release = single_release, | ||
432 | }; | ||
433 | |||
434 | static int fsl_ssi_debugfs_create(struct fsl_ssi_private *ssi_private, | ||
435 | struct device *dev) | ||
436 | { | ||
437 | ssi_private->dbg_dir = debugfs_create_dir(dev_name(dev), NULL); | ||
438 | if (!ssi_private->dbg_dir) | ||
439 | return -ENOMEM; | ||
440 | |||
441 | ssi_private->dbg_stats = debugfs_create_file("stats", S_IRUGO, | ||
442 | ssi_private->dbg_dir, ssi_private, &fsl_ssi_stats_ops); | ||
443 | if (!ssi_private->dbg_stats) { | ||
444 | debugfs_remove(ssi_private->dbg_dir); | ||
445 | return -ENOMEM; | ||
446 | } | ||
447 | |||
448 | return 0; | ||
449 | } | ||
450 | |||
451 | static void fsl_ssi_debugfs_remove(struct fsl_ssi_private *ssi_private) | ||
452 | { | ||
453 | debugfs_remove(ssi_private->dbg_stats); | ||
454 | debugfs_remove(ssi_private->dbg_dir); | ||
455 | } | ||
456 | |||
457 | #else | ||
458 | |||
459 | static int fsl_ssi_debugfs_create(struct fsl_ssi_private *ssi_private, | ||
460 | struct device *dev) | ||
461 | { | ||
462 | return 0; | ||
463 | } | ||
464 | |||
465 | static void fsl_ssi_debugfs_remove(struct fsl_ssi_private *ssi_private) | ||
466 | { | ||
467 | } | ||
468 | |||
469 | #endif /* IS_ENABLED(CONFIG_DEBUG_FS) */ | ||
470 | |||
471 | /* | ||
472 | * Enable/Disable all rx/tx config flags at once. | ||
473 | */ | ||
474 | static void fsl_ssi_rxtx_config(struct fsl_ssi_private *ssi_private, | ||
475 | bool enable) | ||
476 | { | ||
477 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | ||
478 | struct fsl_ssi_rxtx_reg_val *vals = &ssi_private->rxtx_reg_val; | ||
479 | |||
480 | if (enable) { | ||
481 | write_ssi_mask(&ssi->sier, 0, vals->rx.sier | vals->tx.sier); | ||
482 | write_ssi_mask(&ssi->srcr, 0, vals->rx.srcr | vals->tx.srcr); | ||
483 | write_ssi_mask(&ssi->stcr, 0, vals->rx.stcr | vals->tx.stcr); | ||
484 | } else { | ||
485 | write_ssi_mask(&ssi->srcr, vals->rx.srcr | vals->tx.srcr, 0); | ||
486 | write_ssi_mask(&ssi->stcr, vals->rx.stcr | vals->tx.stcr, 0); | ||
487 | write_ssi_mask(&ssi->sier, vals->rx.sier | vals->tx.sier, 0); | ||
488 | } | ||
489 | } | ||
490 | |||
491 | /* | ||
492 | * Enable/Disable a ssi configuration. You have to pass either | ||
493 | * ssi_private->rxtx_reg_val.rx or tx as vals parameter. | ||
494 | */ | ||
495 | static void fsl_ssi_config(struct fsl_ssi_private *ssi_private, bool enable, | ||
496 | struct fsl_ssi_reg_val *vals) | ||
497 | { | ||
498 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | ||
499 | struct fsl_ssi_reg_val *avals; | ||
500 | u32 scr_val = read_ssi(&ssi->scr); | ||
501 | int nr_active_streams = !!(scr_val & CCSR_SSI_SCR_TE) + | ||
502 | !!(scr_val & CCSR_SSI_SCR_RE); | ||
503 | |||
504 | /* Find the other direction values rx or tx which we do not want to | ||
505 | * modify */ | ||
506 | if (&ssi_private->rxtx_reg_val.rx == vals) | ||
507 | avals = &ssi_private->rxtx_reg_val.tx; | ||
508 | else | ||
509 | avals = &ssi_private->rxtx_reg_val.rx; | ||
510 | |||
511 | /* If vals should be disabled, start with disabling the unit */ | ||
512 | if (!enable) { | ||
513 | u32 scr = vals->scr & (vals->scr ^ avals->scr); | ||
514 | write_ssi_mask(&ssi->scr, scr, 0); | ||
515 | } | ||
516 | |||
517 | /* | ||
518 | * We are running on a SoC which does not support online SSI | ||
519 | * reconfiguration, so we have to enable all necessary flags at once | ||
520 | * even if we do not use them later (capture and playback configuration) | ||
521 | */ | ||
522 | if (ssi_private->offline_config) { | ||
523 | if ((enable && !nr_active_streams) || | ||
524 | (!enable && nr_active_streams == 1)) | ||
525 | fsl_ssi_rxtx_config(ssi_private, enable); | ||
526 | |||
527 | goto config_done; | ||
528 | } | ||
529 | |||
530 | /* | ||
531 | * Configure single direction units while the SSI unit is running | ||
532 | * (online configuration) | ||
533 | */ | ||
534 | if (enable) { | ||
535 | write_ssi_mask(&ssi->sier, 0, vals->sier); | ||
536 | write_ssi_mask(&ssi->srcr, 0, vals->srcr); | ||
537 | write_ssi_mask(&ssi->stcr, 0, vals->stcr); | ||
538 | } else { | ||
539 | u32 sier; | ||
540 | u32 srcr; | ||
541 | u32 stcr; | ||
542 | |||
543 | /* | ||
544 | * Disabling the necessary flags for one of rx/tx while the | ||
545 | * other stream is active is a little bit more difficult. We | ||
546 | * have to disable only those flags that differ between both | ||
547 | * streams (rx XOR tx) and that are set in the stream that is | ||
548 | * disabled now. Otherwise we could alter flags of the other | ||
549 | * stream | ||
550 | */ | ||
551 | |||
552 | /* These assignments are simply vals without bits set in avals*/ | ||
553 | sier = vals->sier & (vals->sier ^ avals->sier); | ||
554 | srcr = vals->srcr & (vals->srcr ^ avals->srcr); | ||
555 | stcr = vals->stcr & (vals->stcr ^ avals->stcr); | ||
556 | |||
557 | write_ssi_mask(&ssi->srcr, srcr, 0); | ||
558 | write_ssi_mask(&ssi->stcr, stcr, 0); | ||
559 | write_ssi_mask(&ssi->sier, sier, 0); | ||
560 | } | ||
561 | |||
562 | config_done: | ||
563 | /* Enabling of subunits is done after configuration */ | ||
564 | if (enable) | ||
565 | write_ssi_mask(&ssi->scr, 0, vals->scr); | ||
566 | } | ||
567 | |||
568 | |||
569 | static void fsl_ssi_rx_config(struct fsl_ssi_private *ssi_private, bool enable) | ||
570 | { | ||
571 | fsl_ssi_config(ssi_private, enable, &ssi_private->rxtx_reg_val.rx); | ||
572 | } | ||
573 | |||
574 | static void fsl_ssi_tx_config(struct fsl_ssi_private *ssi_private, bool enable) | ||
575 | { | ||
576 | fsl_ssi_config(ssi_private, enable, &ssi_private->rxtx_reg_val.tx); | ||
577 | } | ||
578 | |||
579 | /* | ||
580 | * Setup rx/tx register values used to enable/disable the streams. These will | ||
581 | * be used later in fsl_ssi_config to setup the streams without the need to | ||
582 | * check for all different SSI modes. | ||
583 | */ | ||
584 | static void fsl_ssi_setup_reg_vals(struct fsl_ssi_private *ssi_private) | ||
585 | { | ||
586 | struct fsl_ssi_rxtx_reg_val *reg = &ssi_private->rxtx_reg_val; | ||
587 | |||
588 | reg->rx.sier = CCSR_SSI_SIER_RFF0_EN; | ||
589 | reg->rx.srcr = CCSR_SSI_SRCR_RFEN0; | ||
590 | reg->rx.scr = 0; | ||
591 | reg->tx.sier = CCSR_SSI_SIER_TFE0_EN; | ||
592 | reg->tx.stcr = CCSR_SSI_STCR_TFEN0; | ||
593 | reg->tx.scr = 0; | ||
594 | |||
595 | if (!ssi_private->imx_ac97) { | ||
596 | reg->rx.scr = CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE; | ||
597 | reg->rx.sier |= CCSR_SSI_SIER_RFF0_EN; | ||
598 | reg->tx.scr = CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE; | ||
599 | reg->tx.sier |= CCSR_SSI_SIER_TFE0_EN; | ||
600 | } | ||
601 | |||
602 | if (ssi_private->use_dma) { | ||
603 | reg->rx.sier |= CCSR_SSI_SIER_RDMAE; | ||
604 | reg->tx.sier |= CCSR_SSI_SIER_TDMAE; | ||
605 | } else { | ||
606 | reg->rx.sier |= CCSR_SSI_SIER_RIE; | ||
607 | reg->tx.sier |= CCSR_SSI_SIER_TIE; | ||
608 | } | ||
609 | |||
610 | reg->rx.sier |= FSLSSI_SIER_DBG_RX_FLAGS; | ||
611 | reg->tx.sier |= FSLSSI_SIER_DBG_TX_FLAGS; | ||
612 | } | ||
613 | |||
614 | static void fsl_ssi_setup_ac97(struct fsl_ssi_private *ssi_private) | ||
615 | { | ||
616 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | ||
617 | |||
618 | /* | ||
619 | * Setup the clock control register | ||
620 | */ | ||
621 | write_ssi(CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13), | ||
622 | &ssi->stccr); | ||
623 | write_ssi(CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13), | ||
624 | &ssi->srccr); | ||
625 | |||
626 | /* | ||
627 | * Enable AC97 mode and startup the SSI | ||
628 | */ | ||
629 | write_ssi(CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV, | ||
630 | &ssi->sacnt); | ||
631 | write_ssi(0xff, &ssi->saccdis); | ||
632 | write_ssi(0x300, &ssi->saccen); | ||
633 | |||
634 | /* | ||
635 | * Enable SSI, Transmit and Receive. AC97 has to communicate with the | ||
636 | * codec before a stream is started. | ||
637 | */ | ||
638 | write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN | | ||
639 | CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE); | ||
640 | |||
641 | write_ssi(CCSR_SSI_SOR_WAIT(3), &ssi->sor); | ||
642 | } | ||
643 | |||
324 | static int fsl_ssi_setup(struct fsl_ssi_private *ssi_private) | 644 | static int fsl_ssi_setup(struct fsl_ssi_private *ssi_private) |
325 | { | 645 | { |
326 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | 646 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; |
327 | u8 i2s_mode; | ||
328 | u8 wm; | 647 | u8 wm; |
329 | int synchronous = ssi_private->cpu_dai_drv.symmetric_rates; | 648 | int synchronous = ssi_private->cpu_dai_drv.symmetric_rates; |
330 | 649 | ||
650 | fsl_ssi_setup_reg_vals(ssi_private); | ||
651 | |||
331 | if (ssi_private->imx_ac97) | 652 | if (ssi_private->imx_ac97) |
332 | i2s_mode = CCSR_SSI_SCR_I2S_MODE_NORMAL | CCSR_SSI_SCR_NET; | 653 | ssi_private->i2s_mode = CCSR_SSI_SCR_I2S_MODE_NORMAL | CCSR_SSI_SCR_NET; |
333 | else | 654 | else |
334 | i2s_mode = CCSR_SSI_SCR_I2S_MODE_SLAVE; | 655 | ssi_private->i2s_mode = CCSR_SSI_SCR_I2S_MODE_SLAVE; |
335 | 656 | ||
336 | /* | 657 | /* |
337 | * Section 16.5 of the MPC8610 reference manual says that the SSI needs | 658 | * Section 16.5 of the MPC8610 reference manual says that the SSI needs |
@@ -348,16 +669,15 @@ static int fsl_ssi_setup(struct fsl_ssi_private *ssi_private) | |||
348 | write_ssi_mask(&ssi->scr, | 669 | write_ssi_mask(&ssi->scr, |
349 | CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_SYN, | 670 | CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_SYN, |
350 | CCSR_SSI_SCR_TFR_CLK_DIS | | 671 | CCSR_SSI_SCR_TFR_CLK_DIS | |
351 | i2s_mode | | 672 | ssi_private->i2s_mode | |
352 | (synchronous ? CCSR_SSI_SCR_SYN : 0)); | 673 | (synchronous ? CCSR_SSI_SCR_SYN : 0)); |
353 | 674 | ||
354 | write_ssi(CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFEN0 | | 675 | write_ssi(CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFSI | |
355 | CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TEFS | | 676 | CCSR_SSI_STCR_TEFS | CCSR_SSI_STCR_TSCKP, &ssi->stcr); |
356 | CCSR_SSI_STCR_TSCKP, &ssi->stcr); | 677 | |
678 | write_ssi(CCSR_SSI_SRCR_RXBIT0 | CCSR_SSI_SRCR_RFSI | | ||
679 | CCSR_SSI_SRCR_REFS | CCSR_SSI_SRCR_RSCKP, &ssi->srcr); | ||
357 | 680 | ||
358 | write_ssi(CCSR_SSI_SRCR_RXBIT0 | CCSR_SSI_SRCR_RFEN0 | | ||
359 | CCSR_SSI_SRCR_RFSI | CCSR_SSI_SRCR_REFS | | ||
360 | CCSR_SSI_SRCR_RSCKP, &ssi->srcr); | ||
361 | /* | 681 | /* |
362 | * The DC and PM bits are only used if the SSI is the clock master. | 682 | * The DC and PM bits are only used if the SSI is the clock master. |
363 | */ | 683 | */ |
@@ -387,30 +707,18 @@ static int fsl_ssi_setup(struct fsl_ssi_private *ssi_private) | |||
387 | * because it is also running without an active substream. Normally SSI | 707 | * because it is also running without an active substream. Normally SSI |
388 | * is only enabled when there is a substream. | 708 | * is only enabled when there is a substream. |
389 | */ | 709 | */ |
390 | if (ssi_private->imx_ac97) { | 710 | if (ssi_private->imx_ac97) |
391 | /* | 711 | fsl_ssi_setup_ac97(ssi_private); |
392 | * Setup the clock control register | ||
393 | */ | ||
394 | write_ssi(CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13), | ||
395 | &ssi->stccr); | ||
396 | write_ssi(CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13), | ||
397 | &ssi->srccr); | ||
398 | |||
399 | /* | ||
400 | * Enable AC97 mode and startup the SSI | ||
401 | */ | ||
402 | write_ssi(CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV, | ||
403 | &ssi->sacnt); | ||
404 | write_ssi(0xff, &ssi->saccdis); | ||
405 | write_ssi(0x300, &ssi->saccen); | ||
406 | |||
407 | /* | ||
408 | * Enable SSI, Transmit and Receive | ||
409 | */ | ||
410 | write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN | | ||
411 | CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE); | ||
412 | 712 | ||
413 | write_ssi(CCSR_SSI_SOR_WAIT(3), &ssi->sor); | 713 | /* |
714 | * Set a default slot number so that there is no need for those common | ||
715 | * cases like I2S mode to call the extra set_tdm_slot() any more. | ||
716 | */ | ||
717 | if (!ssi_private->imx_ac97) { | ||
718 | write_ssi_mask(&ssi->stccr, CCSR_SSI_SxCCR_DC_MASK, | ||
719 | CCSR_SSI_SxCCR_DC(2)); | ||
720 | write_ssi_mask(&ssi->srccr, CCSR_SSI_SxCCR_DC_MASK, | ||
721 | CCSR_SSI_SxCCR_DC(2)); | ||
414 | } | 722 | } |
415 | 723 | ||
416 | return 0; | 724 | return 0; |
@@ -431,53 +739,17 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream, | |||
431 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 739 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
432 | struct fsl_ssi_private *ssi_private = | 740 | struct fsl_ssi_private *ssi_private = |
433 | snd_soc_dai_get_drvdata(rtd->cpu_dai); | 741 | snd_soc_dai_get_drvdata(rtd->cpu_dai); |
434 | int synchronous = ssi_private->cpu_dai_drv.symmetric_rates; | 742 | unsigned long flags; |
435 | 743 | ||
436 | /* | 744 | /* First, we only do fsl_ssi_setup() when SSI is going to be active. |
437 | * If this is the first stream opened, then request the IRQ | 745 | * Second, fsl_ssi_setup was already called by ac97_init earlier if |
438 | * and initialize the SSI registers. | 746 | * the driver is in ac97 mode. |
439 | */ | 747 | */ |
440 | if (!ssi_private->first_stream) { | 748 | if (!dai->active && !ssi_private->imx_ac97) { |
441 | ssi_private->first_stream = substream; | 749 | fsl_ssi_setup(ssi_private); |
442 | 750 | spin_lock_irqsave(&ssi_private->baudclk_lock, flags); | |
443 | /* | 751 | ssi_private->baudclk_locked = false; |
444 | * fsl_ssi_setup was already called by ac97_init earlier if | 752 | spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags); |
445 | * the driver is in ac97 mode. | ||
446 | */ | ||
447 | if (!ssi_private->imx_ac97) | ||
448 | fsl_ssi_setup(ssi_private); | ||
449 | } else { | ||
450 | if (synchronous) { | ||
451 | struct snd_pcm_runtime *first_runtime = | ||
452 | ssi_private->first_stream->runtime; | ||
453 | /* | ||
454 | * This is the second stream open, and we're in | ||
455 | * synchronous mode, so we need to impose sample | ||
456 | * sample size constraints. This is because STCCR is | ||
457 | * used for playback and capture in synchronous mode, | ||
458 | * so there's no way to specify different word | ||
459 | * lengths. | ||
460 | * | ||
461 | * Note that this can cause a race condition if the | ||
462 | * second stream is opened before the first stream is | ||
463 | * fully initialized. We provide some protection by | ||
464 | * checking to make sure the first stream is | ||
465 | * initialized, but it's not perfect. ALSA sometimes | ||
466 | * re-initializes the driver with a different sample | ||
467 | * rate or size. If the second stream is opened | ||
468 | * before the first stream has received its final | ||
469 | * parameters, then the second stream may be | ||
470 | * constrained to the wrong sample rate or size. | ||
471 | */ | ||
472 | if (first_runtime->sample_bits) { | ||
473 | snd_pcm_hw_constraint_minmax(substream->runtime, | ||
474 | SNDRV_PCM_HW_PARAM_SAMPLE_BITS, | ||
475 | first_runtime->sample_bits, | ||
476 | first_runtime->sample_bits); | ||
477 | } | ||
478 | } | ||
479 | |||
480 | ssi_private->second_stream = substream; | ||
481 | } | 753 | } |
482 | 754 | ||
483 | return 0; | 755 | return 0; |
@@ -501,6 +773,7 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream, | |||
501 | { | 773 | { |
502 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); | 774 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); |
503 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | 775 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; |
776 | unsigned int channels = params_channels(hw_params); | ||
504 | unsigned int sample_size = | 777 | unsigned int sample_size = |
505 | snd_pcm_format_width(params_format(hw_params)); | 778 | snd_pcm_format_width(params_format(hw_params)); |
506 | u32 wl = CCSR_SSI_SxCCR_WL(sample_size); | 779 | u32 wl = CCSR_SSI_SxCCR_WL(sample_size); |
@@ -530,6 +803,248 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream, | |||
530 | else | 803 | else |
531 | write_ssi_mask(&ssi->srccr, CCSR_SSI_SxCCR_WL_MASK, wl); | 804 | write_ssi_mask(&ssi->srccr, CCSR_SSI_SxCCR_WL_MASK, wl); |
532 | 805 | ||
806 | if (!ssi_private->imx_ac97) | ||
807 | write_ssi_mask(&ssi->scr, | ||
808 | CCSR_SSI_SCR_NET | CCSR_SSI_SCR_I2S_MODE_MASK, | ||
809 | channels == 1 ? 0 : ssi_private->i2s_mode); | ||
810 | |||
811 | return 0; | ||
812 | } | ||
813 | |||
814 | /** | ||
815 | * fsl_ssi_set_dai_fmt - configure Digital Audio Interface Format. | ||
816 | */ | ||
817 | static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) | ||
818 | { | ||
819 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); | ||
820 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | ||
821 | u32 strcr = 0, stcr, srcr, scr, mask; | ||
822 | |||
823 | scr = read_ssi(&ssi->scr) & ~(CCSR_SSI_SCR_SYN | CCSR_SSI_SCR_I2S_MODE_MASK); | ||
824 | scr |= CCSR_SSI_SCR_NET; | ||
825 | |||
826 | mask = CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFDIR | CCSR_SSI_STCR_TXDIR | | ||
827 | CCSR_SSI_STCR_TSCKP | CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TFSL | | ||
828 | CCSR_SSI_STCR_TEFS; | ||
829 | stcr = read_ssi(&ssi->stcr) & ~mask; | ||
830 | srcr = read_ssi(&ssi->srcr) & ~mask; | ||
831 | |||
832 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | ||
833 | case SND_SOC_DAIFMT_I2S: | ||
834 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | ||
835 | case SND_SOC_DAIFMT_CBS_CFS: | ||
836 | ssi_private->i2s_mode = CCSR_SSI_SCR_I2S_MODE_MASTER; | ||
837 | break; | ||
838 | case SND_SOC_DAIFMT_CBM_CFM: | ||
839 | ssi_private->i2s_mode = CCSR_SSI_SCR_I2S_MODE_SLAVE; | ||
840 | break; | ||
841 | default: | ||
842 | return -EINVAL; | ||
843 | } | ||
844 | scr |= ssi_private->i2s_mode; | ||
845 | |||
846 | /* Data on rising edge of bclk, frame low, 1clk before data */ | ||
847 | strcr |= CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TSCKP | | ||
848 | CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TEFS; | ||
849 | break; | ||
850 | case SND_SOC_DAIFMT_LEFT_J: | ||
851 | /* Data on rising edge of bclk, frame high */ | ||
852 | strcr |= CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TSCKP; | ||
853 | break; | ||
854 | case SND_SOC_DAIFMT_DSP_A: | ||
855 | /* Data on rising edge of bclk, frame high, 1clk before data */ | ||
856 | strcr |= CCSR_SSI_STCR_TFSL | CCSR_SSI_STCR_TSCKP | | ||
857 | CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TEFS; | ||
858 | break; | ||
859 | case SND_SOC_DAIFMT_DSP_B: | ||
860 | /* Data on rising edge of bclk, frame high */ | ||
861 | strcr |= CCSR_SSI_STCR_TFSL | CCSR_SSI_STCR_TSCKP | | ||
862 | CCSR_SSI_STCR_TXBIT0; | ||
863 | break; | ||
864 | default: | ||
865 | return -EINVAL; | ||
866 | } | ||
867 | |||
868 | /* DAI clock inversion */ | ||
869 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | ||
870 | case SND_SOC_DAIFMT_NB_NF: | ||
871 | /* Nothing to do for both normal cases */ | ||
872 | break; | ||
873 | case SND_SOC_DAIFMT_IB_NF: | ||
874 | /* Invert bit clock */ | ||
875 | strcr ^= CCSR_SSI_STCR_TSCKP; | ||
876 | break; | ||
877 | case SND_SOC_DAIFMT_NB_IF: | ||
878 | /* Invert frame clock */ | ||
879 | strcr ^= CCSR_SSI_STCR_TFSI; | ||
880 | break; | ||
881 | case SND_SOC_DAIFMT_IB_IF: | ||
882 | /* Invert both clocks */ | ||
883 | strcr ^= CCSR_SSI_STCR_TSCKP; | ||
884 | strcr ^= CCSR_SSI_STCR_TFSI; | ||
885 | break; | ||
886 | default: | ||
887 | return -EINVAL; | ||
888 | } | ||
889 | |||
890 | /* DAI clock master masks */ | ||
891 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | ||
892 | case SND_SOC_DAIFMT_CBS_CFS: | ||
893 | strcr |= CCSR_SSI_STCR_TFDIR | CCSR_SSI_STCR_TXDIR; | ||
894 | scr |= CCSR_SSI_SCR_SYS_CLK_EN; | ||
895 | break; | ||
896 | case SND_SOC_DAIFMT_CBM_CFM: | ||
897 | scr &= ~CCSR_SSI_SCR_SYS_CLK_EN; | ||
898 | break; | ||
899 | default: | ||
900 | return -EINVAL; | ||
901 | } | ||
902 | |||
903 | stcr |= strcr; | ||
904 | srcr |= strcr; | ||
905 | |||
906 | if (ssi_private->cpu_dai_drv.symmetric_rates) { | ||
907 | /* Need to clear RXDIR when using SYNC mode */ | ||
908 | srcr &= ~CCSR_SSI_SRCR_RXDIR; | ||
909 | scr |= CCSR_SSI_SCR_SYN; | ||
910 | } | ||
911 | |||
912 | write_ssi(stcr, &ssi->stcr); | ||
913 | write_ssi(srcr, &ssi->srcr); | ||
914 | write_ssi(scr, &ssi->scr); | ||
915 | |||
916 | return 0; | ||
917 | } | ||
918 | |||
919 | /** | ||
920 | * fsl_ssi_set_dai_sysclk - configure Digital Audio Interface bit clock | ||
921 | * | ||
922 | * Note: This function can be only called when using SSI as DAI master | ||
923 | * | ||
924 | * Quick instruction for parameters: | ||
925 | * freq: Output BCLK frequency = samplerate * 32 (fixed) * channels | ||
926 | * dir: SND_SOC_CLOCK_OUT -> TxBCLK, SND_SOC_CLOCK_IN -> RxBCLK. | ||
927 | */ | ||
928 | static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai, | ||
929 | int clk_id, unsigned int freq, int dir) | ||
930 | { | ||
931 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); | ||
932 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | ||
933 | int synchronous = ssi_private->cpu_dai_drv.symmetric_rates, ret; | ||
934 | u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i; | ||
935 | unsigned long flags, clkrate, baudrate, tmprate; | ||
936 | u64 sub, savesub = 100000; | ||
937 | |||
938 | /* Don't apply it to any non-baudclk circumstance */ | ||
939 | if (IS_ERR(ssi_private->baudclk)) | ||
940 | return -EINVAL; | ||
941 | |||
942 | /* It should be already enough to divide clock by setting pm alone */ | ||
943 | psr = 0; | ||
944 | div2 = 0; | ||
945 | |||
946 | factor = (div2 + 1) * (7 * psr + 1) * 2; | ||
947 | |||
948 | for (i = 0; i < 255; i++) { | ||
949 | /* The bclk rate must be smaller than 1/5 sysclk rate */ | ||
950 | if (factor * (i + 1) < 5) | ||
951 | continue; | ||
952 | |||
953 | tmprate = freq * factor * (i + 2); | ||
954 | clkrate = clk_round_rate(ssi_private->baudclk, tmprate); | ||
955 | |||
956 | do_div(clkrate, factor); | ||
957 | afreq = (u32)clkrate / (i + 1); | ||
958 | |||
959 | if (freq == afreq) | ||
960 | sub = 0; | ||
961 | else if (freq / afreq == 1) | ||
962 | sub = freq - afreq; | ||
963 | else if (afreq / freq == 1) | ||
964 | sub = afreq - freq; | ||
965 | else | ||
966 | continue; | ||
967 | |||
968 | /* Calculate the fraction */ | ||
969 | sub *= 100000; | ||
970 | do_div(sub, freq); | ||
971 | |||
972 | if (sub < savesub) { | ||
973 | baudrate = tmprate; | ||
974 | savesub = sub; | ||
975 | pm = i; | ||
976 | } | ||
977 | |||
978 | /* We are lucky */ | ||
979 | if (savesub == 0) | ||
980 | break; | ||
981 | } | ||
982 | |||
983 | /* No proper pm found if it is still remaining the initial value */ | ||
984 | if (pm == 999) { | ||
985 | dev_err(cpu_dai->dev, "failed to handle the required sysclk\n"); | ||
986 | return -EINVAL; | ||
987 | } | ||
988 | |||
989 | stccr = CCSR_SSI_SxCCR_PM(pm + 1) | (div2 ? CCSR_SSI_SxCCR_DIV2 : 0) | | ||
990 | (psr ? CCSR_SSI_SxCCR_PSR : 0); | ||
991 | mask = CCSR_SSI_SxCCR_PM_MASK | CCSR_SSI_SxCCR_DIV2 | CCSR_SSI_SxCCR_PSR; | ||
992 | |||
993 | if (dir == SND_SOC_CLOCK_OUT || synchronous) | ||
994 | write_ssi_mask(&ssi->stccr, mask, stccr); | ||
995 | else | ||
996 | write_ssi_mask(&ssi->srccr, mask, stccr); | ||
997 | |||
998 | spin_lock_irqsave(&ssi_private->baudclk_lock, flags); | ||
999 | if (!ssi_private->baudclk_locked) { | ||
1000 | ret = clk_set_rate(ssi_private->baudclk, baudrate); | ||
1001 | if (ret) { | ||
1002 | spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags); | ||
1003 | dev_err(cpu_dai->dev, "failed to set baudclk rate\n"); | ||
1004 | return -EINVAL; | ||
1005 | } | ||
1006 | ssi_private->baudclk_locked = true; | ||
1007 | } | ||
1008 | spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags); | ||
1009 | |||
1010 | return 0; | ||
1011 | } | ||
1012 | |||
1013 | /** | ||
1014 | * fsl_ssi_set_dai_tdm_slot - set TDM slot number | ||
1015 | * | ||
1016 | * Note: This function can be only called when using SSI as DAI master | ||
1017 | */ | ||
1018 | static int fsl_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask, | ||
1019 | u32 rx_mask, int slots, int slot_width) | ||
1020 | { | ||
1021 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai); | ||
1022 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | ||
1023 | u32 val; | ||
1024 | |||
1025 | /* The slot number should be >= 2 if using Network mode or I2S mode */ | ||
1026 | val = read_ssi(&ssi->scr) & (CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_NET); | ||
1027 | if (val && slots < 2) { | ||
1028 | dev_err(cpu_dai->dev, "slot number should be >= 2 in I2S or NET\n"); | ||
1029 | return -EINVAL; | ||
1030 | } | ||
1031 | |||
1032 | write_ssi_mask(&ssi->stccr, CCSR_SSI_SxCCR_DC_MASK, | ||
1033 | CCSR_SSI_SxCCR_DC(slots)); | ||
1034 | write_ssi_mask(&ssi->srccr, CCSR_SSI_SxCCR_DC_MASK, | ||
1035 | CCSR_SSI_SxCCR_DC(slots)); | ||
1036 | |||
1037 | /* The register SxMSKs needs SSI to provide essential clock due to | ||
1038 | * hardware design. So we here temporarily enable SSI to set them. | ||
1039 | */ | ||
1040 | val = read_ssi(&ssi->scr) & CCSR_SSI_SCR_SSIEN; | ||
1041 | write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN); | ||
1042 | |||
1043 | write_ssi(tx_mask, &ssi->stmsk); | ||
1044 | write_ssi(rx_mask, &ssi->srmsk); | ||
1045 | |||
1046 | write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_SSIEN, val); | ||
1047 | |||
533 | return 0; | 1048 | return 0; |
534 | } | 1049 | } |
535 | 1050 | ||
@@ -548,77 +1063,46 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd, | |||
548 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 1063 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
549 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(rtd->cpu_dai); | 1064 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
550 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | 1065 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; |
551 | unsigned int sier_bits; | 1066 | unsigned long flags; |
552 | |||
553 | /* | ||
554 | * Enable only the interrupts and DMA requests | ||
555 | * that are needed for the channel. As the fiq | ||
556 | * is polling for this bits, we have to ensure | ||
557 | * that this are aligned with the preallocated | ||
558 | * buffers | ||
559 | */ | ||
560 | |||
561 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
562 | if (ssi_private->use_dma) | ||
563 | sier_bits = SIER_FLAGS; | ||
564 | else | ||
565 | sier_bits = CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TFE0_EN; | ||
566 | } else { | ||
567 | if (ssi_private->use_dma) | ||
568 | sier_bits = SIER_FLAGS; | ||
569 | else | ||
570 | sier_bits = CCSR_SSI_SIER_RIE | CCSR_SSI_SIER_RFF0_EN; | ||
571 | } | ||
572 | 1067 | ||
573 | switch (cmd) { | 1068 | switch (cmd) { |
574 | case SNDRV_PCM_TRIGGER_START: | 1069 | case SNDRV_PCM_TRIGGER_START: |
575 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | 1070 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
576 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 1071 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
577 | write_ssi_mask(&ssi->scr, 0, | 1072 | fsl_ssi_tx_config(ssi_private, true); |
578 | CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE); | ||
579 | else | 1073 | else |
580 | write_ssi_mask(&ssi->scr, 0, | 1074 | fsl_ssi_rx_config(ssi_private, true); |
581 | CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE); | ||
582 | break; | 1075 | break; |
583 | 1076 | ||
584 | case SNDRV_PCM_TRIGGER_STOP: | 1077 | case SNDRV_PCM_TRIGGER_STOP: |
585 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | 1078 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
586 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 1079 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
587 | write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_TE, 0); | 1080 | fsl_ssi_tx_config(ssi_private, false); |
588 | else | 1081 | else |
589 | write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_RE, 0); | 1082 | fsl_ssi_rx_config(ssi_private, false); |
590 | 1083 | ||
591 | if (!ssi_private->imx_ac97 && (read_ssi(&ssi->scr) & | 1084 | if (!ssi_private->imx_ac97 && (read_ssi(&ssi->scr) & |
592 | (CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE)) == 0) | 1085 | (CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE)) == 0) { |
593 | write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_SSIEN, 0); | 1086 | spin_lock_irqsave(&ssi_private->baudclk_lock, flags); |
1087 | ssi_private->baudclk_locked = false; | ||
1088 | spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags); | ||
1089 | } | ||
594 | break; | 1090 | break; |
595 | 1091 | ||
596 | default: | 1092 | default: |
597 | return -EINVAL; | 1093 | return -EINVAL; |
598 | } | 1094 | } |
599 | 1095 | ||
600 | write_ssi(sier_bits, &ssi->sier); | 1096 | if (ssi_private->imx_ac97) { |
1097 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
1098 | write_ssi(CCSR_SSI_SOR_TX_CLR, &ssi->sor); | ||
1099 | else | ||
1100 | write_ssi(CCSR_SSI_SOR_RX_CLR, &ssi->sor); | ||
1101 | } | ||
601 | 1102 | ||
602 | return 0; | 1103 | return 0; |
603 | } | 1104 | } |
604 | 1105 | ||
605 | /** | ||
606 | * fsl_ssi_shutdown: shutdown the SSI | ||
607 | * | ||
608 | * Shutdown the SSI if there are no other substreams open. | ||
609 | */ | ||
610 | static void fsl_ssi_shutdown(struct snd_pcm_substream *substream, | ||
611 | struct snd_soc_dai *dai) | ||
612 | { | ||
613 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
614 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(rtd->cpu_dai); | ||
615 | |||
616 | if (ssi_private->first_stream == substream) | ||
617 | ssi_private->first_stream = ssi_private->second_stream; | ||
618 | |||
619 | ssi_private->second_stream = NULL; | ||
620 | } | ||
621 | |||
622 | static int fsl_ssi_dai_probe(struct snd_soc_dai *dai) | 1106 | static int fsl_ssi_dai_probe(struct snd_soc_dai *dai) |
623 | { | 1107 | { |
624 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(dai); | 1108 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(dai); |
@@ -634,7 +1118,9 @@ static int fsl_ssi_dai_probe(struct snd_soc_dai *dai) | |||
634 | static const struct snd_soc_dai_ops fsl_ssi_dai_ops = { | 1118 | static const struct snd_soc_dai_ops fsl_ssi_dai_ops = { |
635 | .startup = fsl_ssi_startup, | 1119 | .startup = fsl_ssi_startup, |
636 | .hw_params = fsl_ssi_hw_params, | 1120 | .hw_params = fsl_ssi_hw_params, |
637 | .shutdown = fsl_ssi_shutdown, | 1121 | .set_fmt = fsl_ssi_set_dai_fmt, |
1122 | .set_sysclk = fsl_ssi_set_dai_sysclk, | ||
1123 | .set_tdm_slot = fsl_ssi_set_dai_tdm_slot, | ||
638 | .trigger = fsl_ssi_trigger, | 1124 | .trigger = fsl_ssi_trigger, |
639 | }; | 1125 | }; |
640 | 1126 | ||
@@ -642,14 +1128,13 @@ static const struct snd_soc_dai_ops fsl_ssi_dai_ops = { | |||
642 | static struct snd_soc_dai_driver fsl_ssi_dai_template = { | 1128 | static struct snd_soc_dai_driver fsl_ssi_dai_template = { |
643 | .probe = fsl_ssi_dai_probe, | 1129 | .probe = fsl_ssi_dai_probe, |
644 | .playback = { | 1130 | .playback = { |
645 | /* The SSI does not support monaural audio. */ | 1131 | .channels_min = 1, |
646 | .channels_min = 2, | ||
647 | .channels_max = 2, | 1132 | .channels_max = 2, |
648 | .rates = FSLSSI_I2S_RATES, | 1133 | .rates = FSLSSI_I2S_RATES, |
649 | .formats = FSLSSI_I2S_FORMATS, | 1134 | .formats = FSLSSI_I2S_FORMATS, |
650 | }, | 1135 | }, |
651 | .capture = { | 1136 | .capture = { |
652 | .channels_min = 2, | 1137 | .channels_min = 1, |
653 | .channels_max = 2, | 1138 | .channels_max = 2, |
654 | .rates = FSLSSI_I2S_RATES, | 1139 | .rates = FSLSSI_I2S_RATES, |
655 | .formats = FSLSSI_I2S_FORMATS, | 1140 | .formats = FSLSSI_I2S_FORMATS, |
@@ -661,59 +1146,6 @@ static const struct snd_soc_component_driver fsl_ssi_component = { | |||
661 | .name = "fsl-ssi", | 1146 | .name = "fsl-ssi", |
662 | }; | 1147 | }; |
663 | 1148 | ||
664 | /** | ||
665 | * fsl_ssi_ac97_trigger: start and stop the AC97 receive/transmit. | ||
666 | * | ||
667 | * This function is called by ALSA to start, stop, pause, and resume the | ||
668 | * transfer of data. | ||
669 | */ | ||
670 | static int fsl_ssi_ac97_trigger(struct snd_pcm_substream *substream, int cmd, | ||
671 | struct snd_soc_dai *dai) | ||
672 | { | ||
673 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
674 | struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata( | ||
675 | rtd->cpu_dai); | ||
676 | struct ccsr_ssi __iomem *ssi = ssi_private->ssi; | ||
677 | |||
678 | switch (cmd) { | ||
679 | case SNDRV_PCM_TRIGGER_START: | ||
680 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
681 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
682 | write_ssi_mask(&ssi->sier, 0, CCSR_SSI_SIER_TIE | | ||
683 | CCSR_SSI_SIER_TFE0_EN); | ||
684 | else | ||
685 | write_ssi_mask(&ssi->sier, 0, CCSR_SSI_SIER_RIE | | ||
686 | CCSR_SSI_SIER_RFF0_EN); | ||
687 | break; | ||
688 | |||
689 | case SNDRV_PCM_TRIGGER_STOP: | ||
690 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
691 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
692 | write_ssi_mask(&ssi->sier, CCSR_SSI_SIER_TIE | | ||
693 | CCSR_SSI_SIER_TFE0_EN, 0); | ||
694 | else | ||
695 | write_ssi_mask(&ssi->sier, CCSR_SSI_SIER_RIE | | ||
696 | CCSR_SSI_SIER_RFF0_EN, 0); | ||
697 | break; | ||
698 | |||
699 | default: | ||
700 | return -EINVAL; | ||
701 | } | ||
702 | |||
703 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
704 | write_ssi(CCSR_SSI_SOR_TX_CLR, &ssi->sor); | ||
705 | else | ||
706 | write_ssi(CCSR_SSI_SOR_RX_CLR, &ssi->sor); | ||
707 | |||
708 | return 0; | ||
709 | } | ||
710 | |||
711 | static const struct snd_soc_dai_ops fsl_ssi_ac97_dai_ops = { | ||
712 | .startup = fsl_ssi_startup, | ||
713 | .shutdown = fsl_ssi_shutdown, | ||
714 | .trigger = fsl_ssi_ac97_trigger, | ||
715 | }; | ||
716 | |||
717 | static struct snd_soc_dai_driver fsl_ssi_ac97_dai = { | 1149 | static struct snd_soc_dai_driver fsl_ssi_ac97_dai = { |
718 | .ac97_control = 1, | 1150 | .ac97_control = 1, |
719 | .playback = { | 1151 | .playback = { |
@@ -730,7 +1162,7 @@ static struct snd_soc_dai_driver fsl_ssi_ac97_dai = { | |||
730 | .rates = SNDRV_PCM_RATE_48000, | 1162 | .rates = SNDRV_PCM_RATE_48000, |
731 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 1163 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
732 | }, | 1164 | }, |
733 | .ops = &fsl_ssi_ac97_dai_ops, | 1165 | .ops = &fsl_ssi_dai_ops, |
734 | }; | 1166 | }; |
735 | 1167 | ||
736 | 1168 | ||
@@ -788,56 +1220,6 @@ static struct snd_ac97_bus_ops fsl_ssi_ac97_ops = { | |||
788 | .write = fsl_ssi_ac97_write, | 1220 | .write = fsl_ssi_ac97_write, |
789 | }; | 1221 | }; |
790 | 1222 | ||
791 | /* Show the statistics of a flag only if its interrupt is enabled. The | ||
792 | * compiler will optimze this code to a no-op if the interrupt is not | ||
793 | * enabled. | ||
794 | */ | ||
795 | #define SIER_SHOW(flag, name) \ | ||
796 | do { \ | ||
797 | if (SIER_FLAGS & CCSR_SSI_SIER_##flag) \ | ||
798 | length += sprintf(buf + length, #name "=%u\n", \ | ||
799 | ssi_private->stats.name); \ | ||
800 | } while (0) | ||
801 | |||
802 | |||
803 | /** | ||
804 | * fsl_sysfs_ssi_show: display SSI statistics | ||
805 | * | ||
806 | * Display the statistics for the current SSI device. To avoid confusion, | ||
807 | * we only show those counts that are enabled. | ||
808 | */ | ||
809 | static ssize_t fsl_sysfs_ssi_show(struct device *dev, | ||
810 | struct device_attribute *attr, char *buf) | ||
811 | { | ||
812 | struct fsl_ssi_private *ssi_private = | ||
813 | container_of(attr, struct fsl_ssi_private, dev_attr); | ||
814 | ssize_t length = 0; | ||
815 | |||
816 | SIER_SHOW(RFRC_EN, rfrc); | ||
817 | SIER_SHOW(TFRC_EN, tfrc); | ||
818 | SIER_SHOW(CMDAU_EN, cmdau); | ||
819 | SIER_SHOW(CMDDU_EN, cmddu); | ||
820 | SIER_SHOW(RXT_EN, rxt); | ||
821 | SIER_SHOW(RDR1_EN, rdr1); | ||
822 | SIER_SHOW(RDR0_EN, rdr0); | ||
823 | SIER_SHOW(TDE1_EN, tde1); | ||
824 | SIER_SHOW(TDE0_EN, tde0); | ||
825 | SIER_SHOW(ROE1_EN, roe1); | ||
826 | SIER_SHOW(ROE0_EN, roe0); | ||
827 | SIER_SHOW(TUE1_EN, tue1); | ||
828 | SIER_SHOW(TUE0_EN, tue0); | ||
829 | SIER_SHOW(TFS_EN, tfs); | ||
830 | SIER_SHOW(RFS_EN, rfs); | ||
831 | SIER_SHOW(TLS_EN, tls); | ||
832 | SIER_SHOW(RLS_EN, rls); | ||
833 | SIER_SHOW(RFF1_EN, rff1); | ||
834 | SIER_SHOW(RFF0_EN, rff0); | ||
835 | SIER_SHOW(TFE1_EN, tfe1); | ||
836 | SIER_SHOW(TFE0_EN, tfe0); | ||
837 | |||
838 | return length; | ||
839 | } | ||
840 | |||
841 | /** | 1223 | /** |
842 | * Make every character in a string lower-case | 1224 | * Make every character in a string lower-case |
843 | */ | 1225 | */ |
@@ -859,6 +1241,8 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
859 | int ret = 0; | 1241 | int ret = 0; |
860 | struct device_attribute *dev_attr = NULL; | 1242 | struct device_attribute *dev_attr = NULL; |
861 | struct device_node *np = pdev->dev.of_node; | 1243 | struct device_node *np = pdev->dev.of_node; |
1244 | const struct of_device_id *of_id; | ||
1245 | enum fsl_ssi_type hw_type; | ||
862 | const char *p, *sprop; | 1246 | const char *p, *sprop; |
863 | const uint32_t *iprop; | 1247 | const uint32_t *iprop; |
864 | struct resource res; | 1248 | struct resource res; |
@@ -873,6 +1257,11 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
873 | if (!of_device_is_available(np)) | 1257 | if (!of_device_is_available(np)) |
874 | return -ENODEV; | 1258 | return -ENODEV; |
875 | 1259 | ||
1260 | of_id = of_match_device(fsl_ssi_ids, &pdev->dev); | ||
1261 | if (!of_id) | ||
1262 | return -EINVAL; | ||
1263 | hw_type = (enum fsl_ssi_type) of_id->data; | ||
1264 | |||
876 | /* We only support the SSI in "I2S Slave" mode */ | 1265 | /* We only support the SSI in "I2S Slave" mode */ |
877 | sprop = of_get_property(np, "fsl,mode", NULL); | 1266 | sprop = of_get_property(np, "fsl,mode", NULL); |
878 | if (!sprop) { | 1267 | if (!sprop) { |
@@ -899,6 +1288,7 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
899 | 1288 | ||
900 | ssi_private->use_dma = !of_property_read_bool(np, | 1289 | ssi_private->use_dma = !of_property_read_bool(np, |
901 | "fsl,fiq-stream-filter"); | 1290 | "fsl,fiq-stream-filter"); |
1291 | ssi_private->hw_type = hw_type; | ||
902 | 1292 | ||
903 | if (ac97) { | 1293 | if (ac97) { |
904 | memcpy(&ssi_private->cpu_dai_drv, &fsl_ssi_ac97_dai, | 1294 | memcpy(&ssi_private->cpu_dai_drv, &fsl_ssi_ac97_dai, |
@@ -935,8 +1325,11 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
935 | } | 1325 | } |
936 | 1326 | ||
937 | /* Are the RX and the TX clocks locked? */ | 1327 | /* Are the RX and the TX clocks locked? */ |
938 | if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) | 1328 | if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) { |
939 | ssi_private->cpu_dai_drv.symmetric_rates = 1; | 1329 | ssi_private->cpu_dai_drv.symmetric_rates = 1; |
1330 | ssi_private->cpu_dai_drv.symmetric_channels = 1; | ||
1331 | ssi_private->cpu_dai_drv.symmetric_samplebits = 1; | ||
1332 | } | ||
940 | 1333 | ||
941 | /* Determine the FIFO depth. */ | 1334 | /* Determine the FIFO depth. */ |
942 | iprop = of_get_property(np, "fsl,fifo-depth", NULL); | 1335 | iprop = of_get_property(np, "fsl,fifo-depth", NULL); |
@@ -946,7 +1339,37 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
946 | /* Older 8610 DTs didn't have the fifo-depth property */ | 1339 | /* Older 8610 DTs didn't have the fifo-depth property */ |
947 | ssi_private->fifo_depth = 8; | 1340 | ssi_private->fifo_depth = 8; |
948 | 1341 | ||
949 | if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx21-ssi")) { | 1342 | ssi_private->baudclk_locked = false; |
1343 | spin_lock_init(&ssi_private->baudclk_lock); | ||
1344 | |||
1345 | /* | ||
1346 | * imx51 and later SoCs have a slightly different IP that allows the | ||
1347 | * SSI configuration while the SSI unit is running. | ||
1348 | * | ||
1349 | * More important, it is necessary on those SoCs to configure the | ||
1350 | * sperate TX/RX DMA bits just before starting the stream | ||
1351 | * (fsl_ssi_trigger). The SDMA unit has to be configured before fsl_ssi | ||
1352 | * sends any DMA requests to the SDMA unit, otherwise it is not defined | ||
1353 | * how the SDMA unit handles the DMA request. | ||
1354 | * | ||
1355 | * SDMA units are present on devices starting at imx35 but the imx35 | ||
1356 | * reference manual states that the DMA bits should not be changed | ||
1357 | * while the SSI unit is running (SSIEN). So we support the necessary | ||
1358 | * online configuration of fsl-ssi starting at imx51. | ||
1359 | */ | ||
1360 | switch (hw_type) { | ||
1361 | case FSL_SSI_MCP8610: | ||
1362 | case FSL_SSI_MX21: | ||
1363 | case FSL_SSI_MX35: | ||
1364 | ssi_private->offline_config = true; | ||
1365 | break; | ||
1366 | case FSL_SSI_MX51: | ||
1367 | ssi_private->offline_config = false; | ||
1368 | break; | ||
1369 | } | ||
1370 | |||
1371 | if (hw_type == FSL_SSI_MX21 || hw_type == FSL_SSI_MX51 || | ||
1372 | hw_type == FSL_SSI_MX35) { | ||
950 | u32 dma_events[2]; | 1373 | u32 dma_events[2]; |
951 | ssi_private->ssi_on_imx = true; | 1374 | ssi_private->ssi_on_imx = true; |
952 | 1375 | ||
@@ -963,6 +1386,16 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
963 | goto error_irqmap; | 1386 | goto error_irqmap; |
964 | } | 1387 | } |
965 | 1388 | ||
1389 | /* For those SLAVE implementations, we ingore non-baudclk cases | ||
1390 | * and, instead, abandon MASTER mode that needs baud clock. | ||
1391 | */ | ||
1392 | ssi_private->baudclk = devm_clk_get(&pdev->dev, "baud"); | ||
1393 | if (IS_ERR(ssi_private->baudclk)) | ||
1394 | dev_warn(&pdev->dev, "could not get baud clock: %ld\n", | ||
1395 | PTR_ERR(ssi_private->baudclk)); | ||
1396 | else | ||
1397 | clk_prepare_enable(ssi_private->baudclk); | ||
1398 | |||
966 | /* | 1399 | /* |
967 | * We have burstsize be "fifo_depth - 2" to match the SSI | 1400 | * We have burstsize be "fifo_depth - 2" to match the SSI |
968 | * watermark setting in fsl_ssi_startup(). | 1401 | * watermark setting in fsl_ssi_startup(). |
@@ -1001,32 +1434,25 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
1001 | dma_events[0], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI); | 1434 | dma_events[0], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI); |
1002 | imx_pcm_dma_params_init_data(&ssi_private->filter_data_rx, | 1435 | imx_pcm_dma_params_init_data(&ssi_private->filter_data_rx, |
1003 | dma_events[1], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI); | 1436 | dma_events[1], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI); |
1004 | } else if (ssi_private->use_dma) { | 1437 | } |
1438 | |||
1439 | /* | ||
1440 | * Enable interrupts only for MCP8610 and MX51. The other MXs have | ||
1441 | * different writeable interrupt status registers. | ||
1442 | */ | ||
1443 | if (ssi_private->use_dma) { | ||
1005 | /* The 'name' should not have any slashes in it. */ | 1444 | /* The 'name' should not have any slashes in it. */ |
1006 | ret = devm_request_irq(&pdev->dev, ssi_private->irq, | 1445 | ret = devm_request_irq(&pdev->dev, ssi_private->irq, |
1007 | fsl_ssi_isr, 0, ssi_private->name, | 1446 | fsl_ssi_isr, 0, ssi_private->name, |
1008 | ssi_private); | 1447 | ssi_private); |
1448 | ssi_private->irq_stats = true; | ||
1009 | if (ret < 0) { | 1449 | if (ret < 0) { |
1010 | dev_err(&pdev->dev, "could not claim irq %u\n", | 1450 | dev_err(&pdev->dev, "could not claim irq %u\n", |
1011 | ssi_private->irq); | 1451 | ssi_private->irq); |
1012 | goto error_irqmap; | 1452 | goto error_clk; |
1013 | } | 1453 | } |
1014 | } | 1454 | } |
1015 | 1455 | ||
1016 | /* Initialize the the device_attribute structure */ | ||
1017 | dev_attr = &ssi_private->dev_attr; | ||
1018 | sysfs_attr_init(&dev_attr->attr); | ||
1019 | dev_attr->attr.name = "statistics"; | ||
1020 | dev_attr->attr.mode = S_IRUGO; | ||
1021 | dev_attr->show = fsl_sysfs_ssi_show; | ||
1022 | |||
1023 | ret = device_create_file(&pdev->dev, dev_attr); | ||
1024 | if (ret) { | ||
1025 | dev_err(&pdev->dev, "could not create sysfs %s file\n", | ||
1026 | ssi_private->dev_attr.attr.name); | ||
1027 | goto error_clk; | ||
1028 | } | ||
1029 | |||
1030 | /* Register with ASoC */ | 1456 | /* Register with ASoC */ |
1031 | dev_set_drvdata(&pdev->dev, ssi_private); | 1457 | dev_set_drvdata(&pdev->dev, ssi_private); |
1032 | 1458 | ||
@@ -1037,6 +1463,10 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
1037 | goto error_dev; | 1463 | goto error_dev; |
1038 | } | 1464 | } |
1039 | 1465 | ||
1466 | ret = fsl_ssi_debugfs_create(ssi_private, &pdev->dev); | ||
1467 | if (ret) | ||
1468 | goto error_dbgfs; | ||
1469 | |||
1040 | if (ssi_private->ssi_on_imx) { | 1470 | if (ssi_private->ssi_on_imx) { |
1041 | if (!ssi_private->use_dma) { | 1471 | if (!ssi_private->use_dma) { |
1042 | 1472 | ||
@@ -1056,11 +1486,11 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
1056 | 1486 | ||
1057 | ret = imx_pcm_fiq_init(pdev, &ssi_private->fiq_params); | 1487 | ret = imx_pcm_fiq_init(pdev, &ssi_private->fiq_params); |
1058 | if (ret) | 1488 | if (ret) |
1059 | goto error_dev; | 1489 | goto error_pcm; |
1060 | } else { | 1490 | } else { |
1061 | ret = imx_pcm_dma_init(pdev); | 1491 | ret = imx_pcm_dma_init(pdev); |
1062 | if (ret) | 1492 | if (ret) |
1063 | goto error_dev; | 1493 | goto error_pcm; |
1064 | } | 1494 | } |
1065 | } | 1495 | } |
1066 | 1496 | ||
@@ -1102,19 +1532,28 @@ done: | |||
1102 | return 0; | 1532 | return 0; |
1103 | 1533 | ||
1104 | error_dai: | 1534 | error_dai: |
1105 | if (ssi_private->ssi_on_imx) | 1535 | if (ssi_private->ssi_on_imx && !ssi_private->use_dma) |
1106 | imx_pcm_dma_exit(pdev); | 1536 | imx_pcm_fiq_exit(pdev); |
1537 | |||
1538 | error_pcm: | ||
1539 | fsl_ssi_debugfs_remove(ssi_private); | ||
1540 | |||
1541 | error_dbgfs: | ||
1107 | snd_soc_unregister_component(&pdev->dev); | 1542 | snd_soc_unregister_component(&pdev->dev); |
1108 | 1543 | ||
1109 | error_dev: | 1544 | error_dev: |
1110 | device_remove_file(&pdev->dev, dev_attr); | 1545 | device_remove_file(&pdev->dev, dev_attr); |
1111 | 1546 | ||
1112 | error_clk: | 1547 | error_clk: |
1113 | if (ssi_private->ssi_on_imx) | 1548 | if (ssi_private->ssi_on_imx) { |
1549 | if (!IS_ERR(ssi_private->baudclk)) | ||
1550 | clk_disable_unprepare(ssi_private->baudclk); | ||
1114 | clk_disable_unprepare(ssi_private->clk); | 1551 | clk_disable_unprepare(ssi_private->clk); |
1552 | } | ||
1115 | 1553 | ||
1116 | error_irqmap: | 1554 | error_irqmap: |
1117 | irq_dispose_mapping(ssi_private->irq); | 1555 | if (ssi_private->irq_stats) |
1556 | irq_dispose_mapping(ssi_private->irq); | ||
1118 | 1557 | ||
1119 | return ret; | 1558 | return ret; |
1120 | } | 1559 | } |
@@ -1123,26 +1562,22 @@ static int fsl_ssi_remove(struct platform_device *pdev) | |||
1123 | { | 1562 | { |
1124 | struct fsl_ssi_private *ssi_private = dev_get_drvdata(&pdev->dev); | 1563 | struct fsl_ssi_private *ssi_private = dev_get_drvdata(&pdev->dev); |
1125 | 1564 | ||
1565 | fsl_ssi_debugfs_remove(ssi_private); | ||
1566 | |||
1126 | if (!ssi_private->new_binding) | 1567 | if (!ssi_private->new_binding) |
1127 | platform_device_unregister(ssi_private->pdev); | 1568 | platform_device_unregister(ssi_private->pdev); |
1128 | if (ssi_private->ssi_on_imx) | ||
1129 | imx_pcm_dma_exit(pdev); | ||
1130 | snd_soc_unregister_component(&pdev->dev); | 1569 | snd_soc_unregister_component(&pdev->dev); |
1131 | device_remove_file(&pdev->dev, &ssi_private->dev_attr); | 1570 | if (ssi_private->ssi_on_imx) { |
1132 | if (ssi_private->ssi_on_imx) | 1571 | if (!IS_ERR(ssi_private->baudclk)) |
1572 | clk_disable_unprepare(ssi_private->baudclk); | ||
1133 | clk_disable_unprepare(ssi_private->clk); | 1573 | clk_disable_unprepare(ssi_private->clk); |
1134 | irq_dispose_mapping(ssi_private->irq); | 1574 | } |
1575 | if (ssi_private->irq_stats) | ||
1576 | irq_dispose_mapping(ssi_private->irq); | ||
1135 | 1577 | ||
1136 | return 0; | 1578 | return 0; |
1137 | } | 1579 | } |
1138 | 1580 | ||
1139 | static const struct of_device_id fsl_ssi_ids[] = { | ||
1140 | { .compatible = "fsl,mpc8610-ssi", }, | ||
1141 | { .compatible = "fsl,imx21-ssi", }, | ||
1142 | {} | ||
1143 | }; | ||
1144 | MODULE_DEVICE_TABLE(of, fsl_ssi_ids); | ||
1145 | |||
1146 | static struct platform_driver fsl_ssi_driver = { | 1581 | static struct platform_driver fsl_ssi_driver = { |
1147 | .driver = { | 1582 | .driver = { |
1148 | .name = "fsl-ssi-dai", | 1583 | .name = "fsl-ssi-dai", |
diff --git a/sound/soc/fsl/fsl_ssi.h b/sound/soc/fsl/fsl_ssi.h index e6b9a69e2a68..e6b63240a3d7 100644 --- a/sound/soc/fsl/fsl_ssi.h +++ b/sound/soc/fsl/fsl_ssi.h | |||
@@ -125,7 +125,9 @@ struct ccsr_ssi { | |||
125 | #define CCSR_SSI_SRCR_REFS 0x00000001 | 125 | #define CCSR_SSI_SRCR_REFS 0x00000001 |
126 | 126 | ||
127 | /* STCCR and SRCCR */ | 127 | /* STCCR and SRCCR */ |
128 | #define CCSR_SSI_SxCCR_DIV2_SHIFT 18 | ||
128 | #define CCSR_SSI_SxCCR_DIV2 0x00040000 | 129 | #define CCSR_SSI_SxCCR_DIV2 0x00040000 |
130 | #define CCSR_SSI_SxCCR_PSR_SHIFT 17 | ||
129 | #define CCSR_SSI_SxCCR_PSR 0x00020000 | 131 | #define CCSR_SSI_SxCCR_PSR 0x00020000 |
130 | #define CCSR_SSI_SxCCR_WL_SHIFT 13 | 132 | #define CCSR_SSI_SxCCR_WL_SHIFT 13 |
131 | #define CCSR_SSI_SxCCR_WL_MASK 0x0001E000 | 133 | #define CCSR_SSI_SxCCR_WL_MASK 0x0001E000 |
diff --git a/sound/soc/fsl/imx-pcm-dma.c b/sound/soc/fsl/imx-pcm-dma.c index aee23077080a..2585ae44e634 100644 --- a/sound/soc/fsl/imx-pcm-dma.c +++ b/sound/soc/fsl/imx-pcm-dma.c | |||
@@ -41,9 +41,6 @@ static const struct snd_pcm_hardware imx_pcm_hardware = { | |||
41 | SNDRV_PCM_INFO_PAUSE | | 41 | SNDRV_PCM_INFO_PAUSE | |
42 | SNDRV_PCM_INFO_RESUME, | 42 | SNDRV_PCM_INFO_RESUME, |
43 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 43 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
44 | .rate_min = 8000, | ||
45 | .channels_min = 2, | ||
46 | .channels_max = 2, | ||
47 | .buffer_bytes_max = IMX_SSI_DMABUF_SIZE, | 44 | .buffer_bytes_max = IMX_SSI_DMABUF_SIZE, |
48 | .period_bytes_min = 128, | 45 | .period_bytes_min = 128, |
49 | .period_bytes_max = 65535, /* Limited by SDMA engine */ | 46 | .period_bytes_max = 65535, /* Limited by SDMA engine */ |
@@ -61,16 +58,11 @@ static const struct snd_dmaengine_pcm_config imx_dmaengine_pcm_config = { | |||
61 | 58 | ||
62 | int imx_pcm_dma_init(struct platform_device *pdev) | 59 | int imx_pcm_dma_init(struct platform_device *pdev) |
63 | { | 60 | { |
64 | return snd_dmaengine_pcm_register(&pdev->dev, &imx_dmaengine_pcm_config, | 61 | return devm_snd_dmaengine_pcm_register(&pdev->dev, |
62 | &imx_dmaengine_pcm_config, | ||
65 | SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | | 63 | SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | |
66 | SND_DMAENGINE_PCM_FLAG_COMPAT); | 64 | SND_DMAENGINE_PCM_FLAG_COMPAT); |
67 | } | 65 | } |
68 | EXPORT_SYMBOL_GPL(imx_pcm_dma_init); | 66 | EXPORT_SYMBOL_GPL(imx_pcm_dma_init); |
69 | 67 | ||
70 | void imx_pcm_dma_exit(struct platform_device *pdev) | ||
71 | { | ||
72 | snd_dmaengine_pcm_unregister(&pdev->dev); | ||
73 | } | ||
74 | EXPORT_SYMBOL_GPL(imx_pcm_dma_exit); | ||
75 | |||
76 | MODULE_LICENSE("GPL"); | 68 | MODULE_LICENSE("GPL"); |
diff --git a/sound/soc/fsl/imx-pcm-fiq.c b/sound/soc/fsl/imx-pcm-fiq.c index c75d43bb2e92..6553202dd48c 100644 --- a/sound/soc/fsl/imx-pcm-fiq.c +++ b/sound/soc/fsl/imx-pcm-fiq.c | |||
@@ -162,9 +162,6 @@ static struct snd_pcm_hardware snd_imx_hardware = { | |||
162 | SNDRV_PCM_INFO_PAUSE | | 162 | SNDRV_PCM_INFO_PAUSE | |
163 | SNDRV_PCM_INFO_RESUME, | 163 | SNDRV_PCM_INFO_RESUME, |
164 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 164 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
165 | .rate_min = 8000, | ||
166 | .channels_min = 2, | ||
167 | .channels_max = 2, | ||
168 | .buffer_bytes_max = IMX_SSI_DMABUF_SIZE, | 165 | .buffer_bytes_max = IMX_SSI_DMABUF_SIZE, |
169 | .period_bytes_min = 128, | 166 | .period_bytes_min = 128, |
170 | .period_bytes_max = 16 * 1024, | 167 | .period_bytes_max = 16 * 1024, |
diff --git a/sound/soc/fsl/imx-pcm.h b/sound/soc/fsl/imx-pcm.h index 5d5b73303e11..c79cb27473be 100644 --- a/sound/soc/fsl/imx-pcm.h +++ b/sound/soc/fsl/imx-pcm.h | |||
@@ -40,16 +40,11 @@ struct imx_pcm_fiq_params { | |||
40 | 40 | ||
41 | #if IS_ENABLED(CONFIG_SND_SOC_IMX_PCM_DMA) | 41 | #if IS_ENABLED(CONFIG_SND_SOC_IMX_PCM_DMA) |
42 | int imx_pcm_dma_init(struct platform_device *pdev); | 42 | int imx_pcm_dma_init(struct platform_device *pdev); |
43 | void imx_pcm_dma_exit(struct platform_device *pdev); | ||
44 | #else | 43 | #else |
45 | static inline int imx_pcm_dma_init(struct platform_device *pdev) | 44 | static inline int imx_pcm_dma_init(struct platform_device *pdev) |
46 | { | 45 | { |
47 | return -ENODEV; | 46 | return -ENODEV; |
48 | } | 47 | } |
49 | |||
50 | static inline void imx_pcm_dma_exit(struct platform_device *pdev) | ||
51 | { | ||
52 | } | ||
53 | #endif | 48 | #endif |
54 | 49 | ||
55 | #if IS_ENABLED(CONFIG_SND_SOC_IMX_PCM_FIQ) | 50 | #if IS_ENABLED(CONFIG_SND_SOC_IMX_PCM_FIQ) |
diff --git a/sound/soc/fsl/imx-spdif.c b/sound/soc/fsl/imx-spdif.c index 8499d5292f08..e1dc40143600 100644 --- a/sound/soc/fsl/imx-spdif.c +++ b/sound/soc/fsl/imx-spdif.c | |||
@@ -14,17 +14,15 @@ | |||
14 | #include <sound/soc.h> | 14 | #include <sound/soc.h> |
15 | 15 | ||
16 | struct imx_spdif_data { | 16 | struct imx_spdif_data { |
17 | struct snd_soc_dai_link dai[2]; | 17 | struct snd_soc_dai_link dai; |
18 | struct snd_soc_card card; | 18 | struct snd_soc_card card; |
19 | struct platform_device *txdev; | ||
20 | struct platform_device *rxdev; | ||
21 | }; | 19 | }; |
22 | 20 | ||
23 | static int imx_spdif_audio_probe(struct platform_device *pdev) | 21 | static int imx_spdif_audio_probe(struct platform_device *pdev) |
24 | { | 22 | { |
25 | struct device_node *spdif_np, *np = pdev->dev.of_node; | 23 | struct device_node *spdif_np, *np = pdev->dev.of_node; |
26 | struct imx_spdif_data *data; | 24 | struct imx_spdif_data *data; |
27 | int ret = 0, num_links = 0; | 25 | int ret = 0; |
28 | 26 | ||
29 | spdif_np = of_parse_phandle(np, "spdif-controller", 0); | 27 | spdif_np = of_parse_phandle(np, "spdif-controller", 0); |
30 | if (!spdif_np) { | 28 | if (!spdif_np) { |
@@ -35,74 +33,46 @@ static int imx_spdif_audio_probe(struct platform_device *pdev) | |||
35 | 33 | ||
36 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | 34 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
37 | if (!data) { | 35 | if (!data) { |
38 | dev_err(&pdev->dev, "failed to allocate memory\n"); | ||
39 | ret = -ENOMEM; | 36 | ret = -ENOMEM; |
40 | goto end; | 37 | goto end; |
41 | } | 38 | } |
42 | 39 | ||
43 | if (of_property_read_bool(np, "spdif-out")) { | 40 | data->dai.name = "S/PDIF PCM"; |
44 | data->dai[num_links].name = "S/PDIF TX"; | 41 | data->dai.stream_name = "S/PDIF PCM"; |
45 | data->dai[num_links].stream_name = "S/PDIF PCM Playback"; | 42 | data->dai.codec_dai_name = "snd-soc-dummy-dai"; |
46 | data->dai[num_links].codec_dai_name = "dit-hifi"; | 43 | data->dai.codec_name = "snd-soc-dummy"; |
47 | data->dai[num_links].codec_name = "spdif-dit"; | 44 | data->dai.cpu_of_node = spdif_np; |
48 | data->dai[num_links].cpu_of_node = spdif_np; | 45 | data->dai.platform_of_node = spdif_np; |
49 | data->dai[num_links].platform_of_node = spdif_np; | 46 | data->dai.playback_only = true; |
50 | num_links++; | 47 | data->dai.capture_only = true; |
51 | |||
52 | data->txdev = platform_device_register_simple("spdif-dit", -1, NULL, 0); | ||
53 | if (IS_ERR(data->txdev)) { | ||
54 | ret = PTR_ERR(data->txdev); | ||
55 | dev_err(&pdev->dev, "register dit failed: %d\n", ret); | ||
56 | goto end; | ||
57 | } | ||
58 | } | ||
59 | 48 | ||
60 | if (of_property_read_bool(np, "spdif-in")) { | 49 | if (of_property_read_bool(np, "spdif-out")) |
61 | data->dai[num_links].name = "S/PDIF RX"; | 50 | data->dai.capture_only = false; |
62 | data->dai[num_links].stream_name = "S/PDIF PCM Capture"; | 51 | |
63 | data->dai[num_links].codec_dai_name = "dir-hifi"; | 52 | if (of_property_read_bool(np, "spdif-in")) |
64 | data->dai[num_links].codec_name = "spdif-dir"; | 53 | data->dai.playback_only = false; |
65 | data->dai[num_links].cpu_of_node = spdif_np; | ||
66 | data->dai[num_links].platform_of_node = spdif_np; | ||
67 | num_links++; | ||
68 | |||
69 | data->rxdev = platform_device_register_simple("spdif-dir", -1, NULL, 0); | ||
70 | if (IS_ERR(data->rxdev)) { | ||
71 | ret = PTR_ERR(data->rxdev); | ||
72 | dev_err(&pdev->dev, "register dir failed: %d\n", ret); | ||
73 | goto error_dit; | ||
74 | } | ||
75 | } | ||
76 | 54 | ||
77 | if (!num_links) { | 55 | if (data->dai.playback_only && data->dai.capture_only) { |
78 | dev_err(&pdev->dev, "no enabled S/PDIF DAI link\n"); | 56 | dev_err(&pdev->dev, "no enabled S/PDIF DAI link\n"); |
79 | goto error_dir; | 57 | goto end; |
80 | } | 58 | } |
81 | 59 | ||
82 | data->card.dev = &pdev->dev; | 60 | data->card.dev = &pdev->dev; |
83 | data->card.num_links = num_links; | 61 | data->card.dai_link = &data->dai; |
84 | data->card.dai_link = data->dai; | 62 | data->card.num_links = 1; |
85 | 63 | ||
86 | ret = snd_soc_of_parse_card_name(&data->card, "model"); | 64 | ret = snd_soc_of_parse_card_name(&data->card, "model"); |
87 | if (ret) | 65 | if (ret) |
88 | goto error_dir; | 66 | goto end; |
89 | 67 | ||
90 | ret = devm_snd_soc_register_card(&pdev->dev, &data->card); | 68 | ret = devm_snd_soc_register_card(&pdev->dev, &data->card); |
91 | if (ret) { | 69 | if (ret) { |
92 | dev_err(&pdev->dev, "snd_soc_register_card failed: %d\n", ret); | 70 | dev_err(&pdev->dev, "snd_soc_register_card failed: %d\n", ret); |
93 | goto error_dir; | 71 | goto end; |
94 | } | 72 | } |
95 | 73 | ||
96 | platform_set_drvdata(pdev, data); | 74 | platform_set_drvdata(pdev, data); |
97 | 75 | ||
98 | goto end; | ||
99 | |||
100 | error_dir: | ||
101 | if (data->rxdev) | ||
102 | platform_device_unregister(data->rxdev); | ||
103 | error_dit: | ||
104 | if (data->txdev) | ||
105 | platform_device_unregister(data->txdev); | ||
106 | end: | 76 | end: |
107 | if (spdif_np) | 77 | if (spdif_np) |
108 | of_node_put(spdif_np); | 78 | of_node_put(spdif_np); |
@@ -110,18 +80,6 @@ end: | |||
110 | return ret; | 80 | return ret; |
111 | } | 81 | } |
112 | 82 | ||
113 | static int imx_spdif_audio_remove(struct platform_device *pdev) | ||
114 | { | ||
115 | struct imx_spdif_data *data = platform_get_drvdata(pdev); | ||
116 | |||
117 | if (data->rxdev) | ||
118 | platform_device_unregister(data->rxdev); | ||
119 | if (data->txdev) | ||
120 | platform_device_unregister(data->txdev); | ||
121 | |||
122 | return 0; | ||
123 | } | ||
124 | |||
125 | static const struct of_device_id imx_spdif_dt_ids[] = { | 83 | static const struct of_device_id imx_spdif_dt_ids[] = { |
126 | { .compatible = "fsl,imx-audio-spdif", }, | 84 | { .compatible = "fsl,imx-audio-spdif", }, |
127 | { /* sentinel */ } | 85 | { /* sentinel */ } |
@@ -135,7 +93,6 @@ static struct platform_driver imx_spdif_driver = { | |||
135 | .of_match_table = imx_spdif_dt_ids, | 93 | .of_match_table = imx_spdif_dt_ids, |
136 | }, | 94 | }, |
137 | .probe = imx_spdif_audio_probe, | 95 | .probe = imx_spdif_audio_probe, |
138 | .remove = imx_spdif_audio_remove, | ||
139 | }; | 96 | }; |
140 | 97 | ||
141 | module_platform_driver(imx_spdif_driver); | 98 | module_platform_driver(imx_spdif_driver); |
diff --git a/sound/soc/fsl/imx-ssi.c b/sound/soc/fsl/imx-ssi.c index f5f248c91c16..df552fa1aa65 100644 --- a/sound/soc/fsl/imx-ssi.c +++ b/sound/soc/fsl/imx-ssi.c | |||
@@ -304,8 +304,7 @@ static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd, | |||
304 | scr |= SSI_SCR_RE; | 304 | scr |= SSI_SCR_RE; |
305 | sier |= sier_bits; | 305 | sier |= sier_bits; |
306 | 306 | ||
307 | if (++ssi->enabled == 1) | 307 | scr |= SSI_SCR_SSIEN; |
308 | scr |= SSI_SCR_SSIEN; | ||
309 | 308 | ||
310 | break; | 309 | break; |
311 | 310 | ||
@@ -318,7 +317,7 @@ static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd, | |||
318 | scr &= ~SSI_SCR_RE; | 317 | scr &= ~SSI_SCR_RE; |
319 | sier &= ~sier_bits; | 318 | sier &= ~sier_bits; |
320 | 319 | ||
321 | if (--ssi->enabled == 0) | 320 | if (!(scr & (SSI_SCR_TE | SSI_SCR_RE))) |
322 | scr &= ~SSI_SCR_SSIEN; | 321 | scr &= ~SSI_SCR_SSIEN; |
323 | 322 | ||
324 | break; | 323 | break; |
@@ -536,7 +535,9 @@ static int imx_ssi_probe(struct platform_device *pdev) | |||
536 | ret); | 535 | ret); |
537 | goto failed_clk; | 536 | goto failed_clk; |
538 | } | 537 | } |
539 | clk_prepare_enable(ssi->clk); | 538 | ret = clk_prepare_enable(ssi->clk); |
539 | if (ret) | ||
540 | goto failed_clk; | ||
540 | 541 | ||
541 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 542 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
542 | ssi->base = devm_ioremap_resource(&pdev->dev, res); | 543 | ssi->base = devm_ioremap_resource(&pdev->dev, res); |
@@ -624,9 +625,6 @@ static int imx_ssi_remove(struct platform_device *pdev) | |||
624 | { | 625 | { |
625 | struct imx_ssi *ssi = platform_get_drvdata(pdev); | 626 | struct imx_ssi *ssi = platform_get_drvdata(pdev); |
626 | 627 | ||
627 | if (!ssi->dma_init) | ||
628 | imx_pcm_dma_exit(pdev); | ||
629 | |||
630 | if (!ssi->fiq_init) | 628 | if (!ssi->fiq_init) |
631 | imx_pcm_fiq_exit(pdev); | 629 | imx_pcm_fiq_exit(pdev); |
632 | 630 | ||
diff --git a/sound/soc/fsl/imx-ssi.h b/sound/soc/fsl/imx-ssi.h index 560c40fc9ebb..be6562365b6a 100644 --- a/sound/soc/fsl/imx-ssi.h +++ b/sound/soc/fsl/imx-ssi.h | |||
@@ -213,7 +213,6 @@ struct imx_ssi { | |||
213 | 213 | ||
214 | int fiq_init; | 214 | int fiq_init; |
215 | int dma_init; | 215 | int dma_init; |
216 | int enabled; | ||
217 | }; | 216 | }; |
218 | 217 | ||
219 | #endif /* _IMX_SSI_H */ | 218 | #endif /* _IMX_SSI_H */ |
diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c index 71bf2f248cd4..f2b5d756b1f3 100644 --- a/sound/soc/fsl/mpc5200_dma.c +++ b/sound/soc/fsl/mpc5200_dma.c | |||
@@ -200,10 +200,6 @@ static const struct snd_pcm_hardware psc_dma_hardware = { | |||
200 | SNDRV_PCM_INFO_BATCH, | 200 | SNDRV_PCM_INFO_BATCH, |
201 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | | 201 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | |
202 | SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE, | 202 | SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE, |
203 | .rate_min = 8000, | ||
204 | .rate_max = 48000, | ||
205 | .channels_min = 1, | ||
206 | .channels_max = 2, | ||
207 | .period_bytes_max = 1024 * 1024, | 203 | .period_bytes_max = 1024 * 1024, |
208 | .period_bytes_min = 32, | 204 | .period_bytes_min = 32, |
209 | .periods_min = 2, | 205 | .periods_min = 2, |
diff --git a/sound/soc/fsl/mpc5200_psc_i2s.c b/sound/soc/fsl/mpc5200_psc_i2s.c index f4efaadb80a2..5d07e8a74a21 100644 --- a/sound/soc/fsl/mpc5200_psc_i2s.c +++ b/sound/soc/fsl/mpc5200_psc_i2s.c | |||
@@ -26,8 +26,7 @@ | |||
26 | * ALSA that we support all rates and let the codec driver decide what rates | 26 | * ALSA that we support all rates and let the codec driver decide what rates |
27 | * are really supported. | 27 | * are really supported. |
28 | */ | 28 | */ |
29 | #define PSC_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \ | 29 | #define PSC_I2S_RATES SNDRV_PCM_RATE_CONTINUOUS |
30 | SNDRV_PCM_RATE_CONTINUOUS) | ||
31 | 30 | ||
32 | /** | 31 | /** |
33 | * PSC_I2S_FORMATS: audio formats supported by the PSC I2S mode | 32 | * PSC_I2S_FORMATS: audio formats supported by the PSC I2S mode |
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c index b2fbb7075a6c..2a1b1b5b5221 100644 --- a/sound/soc/generic/simple-card.c +++ b/sound/soc/generic/simple-card.c | |||
@@ -8,14 +8,13 @@ | |||
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | */ | 10 | */ |
11 | 11 | #include <linux/clk.h> | |
12 | #include <linux/platform_device.h> | ||
13 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/of.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/string.h> | ||
14 | #include <sound/simple_card.h> | 16 | #include <sound/simple_card.h> |
15 | 17 | ||
16 | #define asoc_simple_get_card_info(p) \ | ||
17 | container_of(p->dai_link, struct asoc_simple_card_info, snd_link) | ||
18 | |||
19 | static int __asoc_simple_card_dai_init(struct snd_soc_dai *dai, | 18 | static int __asoc_simple_card_dai_init(struct snd_soc_dai *dai, |
20 | struct asoc_simple_dai *set, | 19 | struct asoc_simple_dai *set, |
21 | unsigned int daifmt) | 20 | unsigned int daifmt) |
@@ -24,7 +23,7 @@ static int __asoc_simple_card_dai_init(struct snd_soc_dai *dai, | |||
24 | 23 | ||
25 | daifmt |= set->fmt; | 24 | daifmt |= set->fmt; |
26 | 25 | ||
27 | if (!ret && daifmt) | 26 | if (daifmt) |
28 | ret = snd_soc_dai_set_fmt(dai, daifmt); | 27 | ret = snd_soc_dai_set_fmt(dai, daifmt); |
29 | 28 | ||
30 | if (ret == -ENOTSUPP) { | 29 | if (ret == -ENOTSUPP) { |
@@ -40,7 +39,8 @@ static int __asoc_simple_card_dai_init(struct snd_soc_dai *dai, | |||
40 | 39 | ||
41 | static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd) | 40 | static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd) |
42 | { | 41 | { |
43 | struct asoc_simple_card_info *info = asoc_simple_get_card_info(rtd); | 42 | struct asoc_simple_card_info *info = |
43 | snd_soc_card_get_drvdata(rtd->card); | ||
44 | struct snd_soc_dai *codec = rtd->codec_dai; | 44 | struct snd_soc_dai *codec = rtd->codec_dai; |
45 | struct snd_soc_dai *cpu = rtd->cpu_dai; | 45 | struct snd_soc_dai *cpu = rtd->cpu_dai; |
46 | unsigned int daifmt = info->daifmt; | 46 | unsigned int daifmt = info->daifmt; |
@@ -57,22 +57,182 @@ static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd) | |||
57 | return 0; | 57 | return 0; |
58 | } | 58 | } |
59 | 59 | ||
60 | static int | ||
61 | asoc_simple_card_sub_parse_of(struct device_node *np, | ||
62 | struct asoc_simple_dai *dai, | ||
63 | struct device_node **node) | ||
64 | { | ||
65 | struct clk *clk; | ||
66 | int ret; | ||
67 | |||
68 | /* | ||
69 | * get node via "sound-dai = <&phandle port>" | ||
70 | * it will be used as xxx_of_node on soc_bind_dai_link() | ||
71 | */ | ||
72 | *node = of_parse_phandle(np, "sound-dai", 0); | ||
73 | if (!*node) | ||
74 | return -ENODEV; | ||
75 | |||
76 | /* get dai->name */ | ||
77 | ret = snd_soc_of_get_dai_name(np, &dai->name); | ||
78 | if (ret < 0) | ||
79 | goto parse_error; | ||
80 | |||
81 | /* | ||
82 | * bitclock-inversion, frame-inversion | ||
83 | * bitclock-master, frame-master | ||
84 | * and specific "format" if it has | ||
85 | */ | ||
86 | dai->fmt = snd_soc_of_parse_daifmt(np, NULL); | ||
87 | |||
88 | /* | ||
89 | * dai->sysclk come from | ||
90 | * "clocks = <&xxx>" (if system has common clock) | ||
91 | * or "system-clock-frequency = <xxx>" | ||
92 | * or device's module clock. | ||
93 | */ | ||
94 | if (of_property_read_bool(np, "clocks")) { | ||
95 | clk = of_clk_get(np, 0); | ||
96 | if (IS_ERR(clk)) { | ||
97 | ret = PTR_ERR(clk); | ||
98 | goto parse_error; | ||
99 | } | ||
100 | |||
101 | dai->sysclk = clk_get_rate(clk); | ||
102 | } else if (of_property_read_bool(np, "system-clock-frequency")) { | ||
103 | of_property_read_u32(np, | ||
104 | "system-clock-frequency", | ||
105 | &dai->sysclk); | ||
106 | } else { | ||
107 | clk = of_clk_get(*node, 0); | ||
108 | if (!IS_ERR(clk)) | ||
109 | dai->sysclk = clk_get_rate(clk); | ||
110 | } | ||
111 | |||
112 | ret = 0; | ||
113 | |||
114 | parse_error: | ||
115 | of_node_put(*node); | ||
116 | |||
117 | return ret; | ||
118 | } | ||
119 | |||
120 | static int asoc_simple_card_parse_of(struct device_node *node, | ||
121 | struct asoc_simple_card_info *info, | ||
122 | struct device *dev, | ||
123 | struct device_node **of_cpu, | ||
124 | struct device_node **of_codec, | ||
125 | struct device_node **of_platform) | ||
126 | { | ||
127 | struct device_node *np; | ||
128 | char *name; | ||
129 | int ret; | ||
130 | |||
131 | /* get CPU/CODEC common format via simple-audio-card,format */ | ||
132 | info->daifmt = snd_soc_of_parse_daifmt(node, "simple-audio-card,") & | ||
133 | (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_INV_MASK); | ||
134 | |||
135 | /* DAPM routes */ | ||
136 | if (of_property_read_bool(node, "simple-audio-card,routing")) { | ||
137 | ret = snd_soc_of_parse_audio_routing(&info->snd_card, | ||
138 | "simple-audio-card,routing"); | ||
139 | if (ret) | ||
140 | return ret; | ||
141 | } | ||
142 | |||
143 | /* CPU sub-node */ | ||
144 | ret = -EINVAL; | ||
145 | np = of_get_child_by_name(node, "simple-audio-card,cpu"); | ||
146 | if (np) | ||
147 | ret = asoc_simple_card_sub_parse_of(np, | ||
148 | &info->cpu_dai, | ||
149 | of_cpu); | ||
150 | if (ret < 0) | ||
151 | return ret; | ||
152 | |||
153 | /* CODEC sub-node */ | ||
154 | ret = -EINVAL; | ||
155 | np = of_get_child_by_name(node, "simple-audio-card,codec"); | ||
156 | if (np) | ||
157 | ret = asoc_simple_card_sub_parse_of(np, | ||
158 | &info->codec_dai, | ||
159 | of_codec); | ||
160 | if (ret < 0) | ||
161 | return ret; | ||
162 | |||
163 | if (!info->cpu_dai.name || !info->codec_dai.name) | ||
164 | return -EINVAL; | ||
165 | |||
166 | /* card name is created from CPU/CODEC dai name */ | ||
167 | name = devm_kzalloc(dev, | ||
168 | strlen(info->cpu_dai.name) + | ||
169 | strlen(info->codec_dai.name) + 2, | ||
170 | GFP_KERNEL); | ||
171 | sprintf(name, "%s-%s", info->cpu_dai.name, info->codec_dai.name); | ||
172 | info->name = info->card = name; | ||
173 | |||
174 | /* simple-card assumes platform == cpu */ | ||
175 | *of_platform = *of_cpu; | ||
176 | |||
177 | dev_dbg(dev, "card-name : %s\n", info->card); | ||
178 | dev_dbg(dev, "platform : %04x\n", info->daifmt); | ||
179 | dev_dbg(dev, "cpu : %s / %04x / %d\n", | ||
180 | info->cpu_dai.name, | ||
181 | info->cpu_dai.fmt, | ||
182 | info->cpu_dai.sysclk); | ||
183 | dev_dbg(dev, "codec : %s / %04x / %d\n", | ||
184 | info->codec_dai.name, | ||
185 | info->codec_dai.fmt, | ||
186 | info->codec_dai.sysclk); | ||
187 | |||
188 | return 0; | ||
189 | } | ||
190 | |||
60 | static int asoc_simple_card_probe(struct platform_device *pdev) | 191 | static int asoc_simple_card_probe(struct platform_device *pdev) |
61 | { | 192 | { |
62 | struct asoc_simple_card_info *cinfo = pdev->dev.platform_data; | 193 | struct asoc_simple_card_info *cinfo; |
194 | struct device_node *np = pdev->dev.of_node; | ||
195 | struct device_node *of_cpu, *of_codec, *of_platform; | ||
63 | struct device *dev = &pdev->dev; | 196 | struct device *dev = &pdev->dev; |
197 | int ret; | ||
64 | 198 | ||
65 | if (!cinfo) { | 199 | cinfo = NULL; |
66 | dev_err(dev, "no info for asoc-simple-card\n"); | 200 | of_cpu = NULL; |
67 | return -EINVAL; | 201 | of_codec = NULL; |
202 | of_platform = NULL; | ||
203 | |||
204 | cinfo = devm_kzalloc(dev, sizeof(*cinfo), GFP_KERNEL); | ||
205 | if (!cinfo) | ||
206 | return -ENOMEM; | ||
207 | |||
208 | if (np && of_device_is_available(np)) { | ||
209 | cinfo->snd_card.dev = dev; | ||
210 | |||
211 | ret = asoc_simple_card_parse_of(np, cinfo, dev, | ||
212 | &of_cpu, | ||
213 | &of_codec, | ||
214 | &of_platform); | ||
215 | if (ret < 0) { | ||
216 | if (ret != -EPROBE_DEFER) | ||
217 | dev_err(dev, "parse error %d\n", ret); | ||
218 | return ret; | ||
219 | } | ||
220 | } else { | ||
221 | if (!dev->platform_data) { | ||
222 | dev_err(dev, "no info for asoc-simple-card\n"); | ||
223 | return -EINVAL; | ||
224 | } | ||
225 | |||
226 | memcpy(cinfo, dev->platform_data, sizeof(*cinfo)); | ||
227 | cinfo->snd_card.dev = dev; | ||
68 | } | 228 | } |
69 | 229 | ||
70 | if (!cinfo->name || | 230 | if (!cinfo->name || |
71 | !cinfo->card || | 231 | !cinfo->card || |
72 | !cinfo->codec || | 232 | !cinfo->codec_dai.name || |
73 | !cinfo->platform || | 233 | !(cinfo->codec || of_codec) || |
74 | !cinfo->cpu_dai.name || | 234 | !(cinfo->platform || of_platform) || |
75 | !cinfo->codec_dai.name) { | 235 | !(cinfo->cpu_dai.name || of_cpu)) { |
76 | dev_err(dev, "insufficient asoc_simple_card_info settings\n"); | 236 | dev_err(dev, "insufficient asoc_simple_card_info settings\n"); |
77 | return -EINVAL; | 237 | return -EINVAL; |
78 | } | 238 | } |
@@ -86,6 +246,9 @@ static int asoc_simple_card_probe(struct platform_device *pdev) | |||
86 | cinfo->snd_link.platform_name = cinfo->platform; | 246 | cinfo->snd_link.platform_name = cinfo->platform; |
87 | cinfo->snd_link.codec_name = cinfo->codec; | 247 | cinfo->snd_link.codec_name = cinfo->codec; |
88 | cinfo->snd_link.codec_dai_name = cinfo->codec_dai.name; | 248 | cinfo->snd_link.codec_dai_name = cinfo->codec_dai.name; |
249 | cinfo->snd_link.cpu_of_node = of_cpu; | ||
250 | cinfo->snd_link.codec_of_node = of_codec; | ||
251 | cinfo->snd_link.platform_of_node = of_platform; | ||
89 | cinfo->snd_link.init = asoc_simple_card_dai_init; | 252 | cinfo->snd_link.init = asoc_simple_card_dai_init; |
90 | 253 | ||
91 | /* | 254 | /* |
@@ -95,25 +258,25 @@ static int asoc_simple_card_probe(struct platform_device *pdev) | |||
95 | cinfo->snd_card.owner = THIS_MODULE; | 258 | cinfo->snd_card.owner = THIS_MODULE; |
96 | cinfo->snd_card.dai_link = &cinfo->snd_link; | 259 | cinfo->snd_card.dai_link = &cinfo->snd_link; |
97 | cinfo->snd_card.num_links = 1; | 260 | cinfo->snd_card.num_links = 1; |
98 | cinfo->snd_card.dev = &pdev->dev; | ||
99 | 261 | ||
100 | return snd_soc_register_card(&cinfo->snd_card); | 262 | snd_soc_card_set_drvdata(&cinfo->snd_card, cinfo); |
101 | } | ||
102 | 263 | ||
103 | static int asoc_simple_card_remove(struct platform_device *pdev) | 264 | return devm_snd_soc_register_card(&pdev->dev, &cinfo->snd_card); |
104 | { | ||
105 | struct asoc_simple_card_info *cinfo = pdev->dev.platform_data; | ||
106 | |||
107 | return snd_soc_unregister_card(&cinfo->snd_card); | ||
108 | } | 265 | } |
109 | 266 | ||
267 | static const struct of_device_id asoc_simple_of_match[] = { | ||
268 | { .compatible = "simple-audio-card", }, | ||
269 | {}, | ||
270 | }; | ||
271 | MODULE_DEVICE_TABLE(of, asoc_simple_of_match); | ||
272 | |||
110 | static struct platform_driver asoc_simple_card = { | 273 | static struct platform_driver asoc_simple_card = { |
111 | .driver = { | 274 | .driver = { |
112 | .name = "asoc-simple-card", | 275 | .name = "asoc-simple-card", |
113 | .owner = THIS_MODULE, | 276 | .owner = THIS_MODULE, |
277 | .of_match_table = asoc_simple_of_match, | ||
114 | }, | 278 | }, |
115 | .probe = asoc_simple_card_probe, | 279 | .probe = asoc_simple_card_probe, |
116 | .remove = asoc_simple_card_remove, | ||
117 | }; | 280 | }; |
118 | 281 | ||
119 | module_platform_driver(asoc_simple_card); | 282 | module_platform_driver(asoc_simple_card); |
diff --git a/sound/soc/mid-x86/Kconfig b/sound/soc/intel/Kconfig index 61c10bf503d2..61c10bf503d2 100644 --- a/sound/soc/mid-x86/Kconfig +++ b/sound/soc/intel/Kconfig | |||
diff --git a/sound/soc/mid-x86/Makefile b/sound/soc/intel/Makefile index 639883339465..639883339465 100644 --- a/sound/soc/mid-x86/Makefile +++ b/sound/soc/intel/Makefile | |||
diff --git a/sound/soc/mid-x86/mfld_machine.c b/sound/soc/intel/mfld_machine.c index d3d4c32434f7..d3d4c32434f7 100644 --- a/sound/soc/mid-x86/mfld_machine.c +++ b/sound/soc/intel/mfld_machine.c | |||
diff --git a/sound/soc/mid-x86/sst_dsp.h b/sound/soc/intel/sst_dsp.h index 0fce1de284ff..0fce1de284ff 100644 --- a/sound/soc/mid-x86/sst_dsp.h +++ b/sound/soc/intel/sst_dsp.h | |||
diff --git a/sound/soc/mid-x86/sst_platform.c b/sound/soc/intel/sst_platform.c index b6b5eb698d33..f465a8180863 100644 --- a/sound/soc/mid-x86/sst_platform.c +++ b/sound/soc/intel/sst_platform.c | |||
@@ -89,16 +89,6 @@ static struct snd_pcm_hardware sst_platform_pcm_hw = { | |||
89 | SNDRV_PCM_INFO_MMAP_VALID | | 89 | SNDRV_PCM_INFO_MMAP_VALID | |
90 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 90 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
91 | SNDRV_PCM_INFO_SYNC_START), | 91 | SNDRV_PCM_INFO_SYNC_START), |
92 | .formats = (SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_U16 | | ||
93 | SNDRV_PCM_FMTBIT_S24 | SNDRV_PCM_FMTBIT_U24 | | ||
94 | SNDRV_PCM_FMTBIT_S32 | SNDRV_PCM_FMTBIT_U32), | ||
95 | .rates = (SNDRV_PCM_RATE_8000| | ||
96 | SNDRV_PCM_RATE_44100 | | ||
97 | SNDRV_PCM_RATE_48000), | ||
98 | .rate_min = SST_MIN_RATE, | ||
99 | .rate_max = SST_MAX_RATE, | ||
100 | .channels_min = SST_MIN_CHANNEL, | ||
101 | .channels_max = SST_MAX_CHANNEL, | ||
102 | .buffer_bytes_max = SST_MAX_BUFFER, | 92 | .buffer_bytes_max = SST_MAX_BUFFER, |
103 | .period_bytes_min = SST_MIN_PERIOD_BYTES, | 93 | .period_bytes_min = SST_MIN_PERIOD_BYTES, |
104 | .period_bytes_max = SST_MAX_PERIOD_BYTES, | 94 | .period_bytes_max = SST_MAX_PERIOD_BYTES, |
diff --git a/sound/soc/mid-x86/sst_platform.h b/sound/soc/intel/sst_platform.h index cacc9066ec52..bee64fb7d2ef 100644 --- a/sound/soc/mid-x86/sst_platform.h +++ b/sound/soc/intel/sst_platform.h | |||
@@ -33,10 +33,6 @@ | |||
33 | #define SST_STEREO 2 | 33 | #define SST_STEREO 2 |
34 | #define SST_MAX_CAP 5 | 34 | #define SST_MAX_CAP 5 |
35 | 35 | ||
36 | #define SST_MIN_RATE 8000 | ||
37 | #define SST_MAX_RATE 48000 | ||
38 | #define SST_MIN_CHANNEL 1 | ||
39 | #define SST_MAX_CHANNEL 5 | ||
40 | #define SST_MAX_BUFFER (800*1024) | 36 | #define SST_MAX_BUFFER (800*1024) |
41 | #define SST_MIN_BUFFER (800*1024) | 37 | #define SST_MIN_BUFFER (800*1024) |
42 | #define SST_MIN_PERIOD_BYTES 32 | 38 | #define SST_MIN_PERIOD_BYTES 32 |
diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig index 5351cba66c9e..29f76af5d963 100644 --- a/sound/soc/jz4740/Kconfig +++ b/sound/soc/jz4740/Kconfig | |||
@@ -1,6 +1,7 @@ | |||
1 | config SND_JZ4740_SOC | 1 | config SND_JZ4740_SOC |
2 | tristate "SoC Audio for Ingenic JZ4740 SoC" | 2 | tristate "SoC Audio for Ingenic JZ4740 SoC" |
3 | depends on MACH_JZ4740 && SND_SOC | 3 | depends on MACH_JZ4740 && SND_SOC |
4 | select SND_SOC_GENERIC_DMAENGINE_PCM | ||
4 | help | 5 | help |
5 | Say Y or M if you want to add support for codecs attached to | 6 | Say Y or M if you want to add support for codecs attached to |
6 | the JZ4740 I2S interface. You will also need to select the audio | 7 | the JZ4740 I2S interface. You will also need to select the audio |
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c index 4c849a49c72a..8f220009e0f6 100644 --- a/sound/soc/jz4740/jz4740-i2s.c +++ b/sound/soc/jz4740/jz4740-i2s.c | |||
@@ -29,9 +29,11 @@ | |||
29 | #include <sound/pcm_params.h> | 29 | #include <sound/pcm_params.h> |
30 | #include <sound/soc.h> | 30 | #include <sound/soc.h> |
31 | #include <sound/initval.h> | 31 | #include <sound/initval.h> |
32 | #include <sound/dmaengine_pcm.h> | ||
33 | |||
34 | #include <asm/mach-jz4740/dma.h> | ||
32 | 35 | ||
33 | #include "jz4740-i2s.h" | 36 | #include "jz4740-i2s.h" |
34 | #include "jz4740-pcm.h" | ||
35 | 37 | ||
36 | #define JZ_REG_AIC_CONF 0x00 | 38 | #define JZ_REG_AIC_CONF 0x00 |
37 | #define JZ_REG_AIC_CTRL 0x04 | 39 | #define JZ_REG_AIC_CTRL 0x04 |
@@ -89,8 +91,8 @@ struct jz4740_i2s { | |||
89 | struct clk *clk_aic; | 91 | struct clk *clk_aic; |
90 | struct clk *clk_i2s; | 92 | struct clk *clk_i2s; |
91 | 93 | ||
92 | struct jz4740_pcm_config pcm_config_playback; | 94 | struct snd_dmaengine_dai_dma_data playback_dma_data; |
93 | struct jz4740_pcm_config pcm_config_capture; | 95 | struct snd_dmaengine_dai_dma_data capture_dma_data; |
94 | }; | 96 | }; |
95 | 97 | ||
96 | static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s, | 98 | static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s, |
@@ -233,8 +235,6 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream, | |||
233 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | 235 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
234 | { | 236 | { |
235 | struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); | 237 | struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); |
236 | enum jz4740_dma_width dma_width; | ||
237 | struct jz4740_pcm_config *pcm_config; | ||
238 | unsigned int sample_size; | 238 | unsigned int sample_size; |
239 | uint32_t ctrl; | 239 | uint32_t ctrl; |
240 | 240 | ||
@@ -243,11 +243,9 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream, | |||
243 | switch (params_format(params)) { | 243 | switch (params_format(params)) { |
244 | case SNDRV_PCM_FORMAT_S8: | 244 | case SNDRV_PCM_FORMAT_S8: |
245 | sample_size = 0; | 245 | sample_size = 0; |
246 | dma_width = JZ4740_DMA_WIDTH_8BIT; | ||
247 | break; | 246 | break; |
248 | case SNDRV_PCM_FORMAT_S16: | 247 | case SNDRV_PCM_FORMAT_S16: |
249 | sample_size = 1; | 248 | sample_size = 1; |
250 | dma_width = JZ4740_DMA_WIDTH_16BIT; | ||
251 | break; | 249 | break; |
252 | default: | 250 | default: |
253 | return -EINVAL; | 251 | return -EINVAL; |
@@ -260,22 +258,13 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream, | |||
260 | ctrl |= JZ_AIC_CTRL_MONO_TO_STEREO; | 258 | ctrl |= JZ_AIC_CTRL_MONO_TO_STEREO; |
261 | else | 259 | else |
262 | ctrl &= ~JZ_AIC_CTRL_MONO_TO_STEREO; | 260 | ctrl &= ~JZ_AIC_CTRL_MONO_TO_STEREO; |
263 | |||
264 | pcm_config = &i2s->pcm_config_playback; | ||
265 | pcm_config->dma_config.dst_width = dma_width; | ||
266 | |||
267 | } else { | 261 | } else { |
268 | ctrl &= ~JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_MASK; | 262 | ctrl &= ~JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_MASK; |
269 | ctrl |= sample_size << JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET; | 263 | ctrl |= sample_size << JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET; |
270 | |||
271 | pcm_config = &i2s->pcm_config_capture; | ||
272 | pcm_config->dma_config.src_width = dma_width; | ||
273 | } | 264 | } |
274 | 265 | ||
275 | jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl); | 266 | jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl); |
276 | 267 | ||
277 | snd_soc_dai_set_dma_data(dai, substream, pcm_config); | ||
278 | |||
279 | return 0; | 268 | return 0; |
280 | } | 269 | } |
281 | 270 | ||
@@ -342,25 +331,19 @@ static int jz4740_i2s_resume(struct snd_soc_dai *dai) | |||
342 | 331 | ||
343 | static void jz4740_i2c_init_pcm_config(struct jz4740_i2s *i2s) | 332 | static void jz4740_i2c_init_pcm_config(struct jz4740_i2s *i2s) |
344 | { | 333 | { |
345 | struct jz4740_dma_config *dma_config; | 334 | struct snd_dmaengine_dai_dma_data *dma_data; |
346 | 335 | ||
347 | /* Playback */ | 336 | /* Playback */ |
348 | dma_config = &i2s->pcm_config_playback.dma_config; | 337 | dma_data = &i2s->playback_dma_data; |
349 | dma_config->src_width = JZ4740_DMA_WIDTH_32BIT; | 338 | dma_data->maxburst = 16; |
350 | dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE; | 339 | dma_data->slave_id = JZ4740_DMA_TYPE_AIC_TRANSMIT; |
351 | dma_config->request_type = JZ4740_DMA_TYPE_AIC_TRANSMIT; | 340 | dma_data->addr = i2s->phys_base + JZ_REG_AIC_FIFO; |
352 | dma_config->flags = JZ4740_DMA_SRC_AUTOINC; | ||
353 | dma_config->mode = JZ4740_DMA_MODE_SINGLE; | ||
354 | i2s->pcm_config_playback.fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO; | ||
355 | 341 | ||
356 | /* Capture */ | 342 | /* Capture */ |
357 | dma_config = &i2s->pcm_config_capture.dma_config; | 343 | dma_data = &i2s->capture_dma_data; |
358 | dma_config->dst_width = JZ4740_DMA_WIDTH_32BIT; | 344 | dma_data->maxburst = 16; |
359 | dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE; | 345 | dma_data->slave_id = JZ4740_DMA_TYPE_AIC_RECEIVE; |
360 | dma_config->request_type = JZ4740_DMA_TYPE_AIC_RECEIVE; | 346 | dma_data->addr = i2s->phys_base + JZ_REG_AIC_FIFO; |
361 | dma_config->flags = JZ4740_DMA_DST_AUTOINC; | ||
362 | dma_config->mode = JZ4740_DMA_MODE_SINGLE; | ||
363 | i2s->pcm_config_capture.fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO; | ||
364 | } | 347 | } |
365 | 348 | ||
366 | static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai) | 349 | static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai) |
@@ -371,6 +354,8 @@ static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai) | |||
371 | clk_prepare_enable(i2s->clk_aic); | 354 | clk_prepare_enable(i2s->clk_aic); |
372 | 355 | ||
373 | jz4740_i2c_init_pcm_config(i2s); | 356 | jz4740_i2c_init_pcm_config(i2s); |
357 | snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data, | ||
358 | &i2s->capture_dma_data); | ||
374 | 359 | ||
375 | conf = (7 << JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) | | 360 | conf = (7 << JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) | |
376 | (8 << JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) | | 361 | (8 << JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) | |
@@ -432,91 +417,41 @@ static const struct snd_soc_component_driver jz4740_i2s_component = { | |||
432 | static int jz4740_i2s_dev_probe(struct platform_device *pdev) | 417 | static int jz4740_i2s_dev_probe(struct platform_device *pdev) |
433 | { | 418 | { |
434 | struct jz4740_i2s *i2s; | 419 | struct jz4740_i2s *i2s; |
420 | struct resource *mem; | ||
435 | int ret; | 421 | int ret; |
436 | 422 | ||
437 | i2s = kzalloc(sizeof(*i2s), GFP_KERNEL); | 423 | i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); |
438 | |||
439 | if (!i2s) | 424 | if (!i2s) |
440 | return -ENOMEM; | 425 | return -ENOMEM; |
441 | 426 | ||
442 | i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 427 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
443 | if (!i2s->mem) { | 428 | i2s->base = devm_ioremap_resource(&pdev->dev, mem); |
444 | ret = -ENOENT; | 429 | if (IS_ERR(i2s->base)) |
445 | goto err_free; | 430 | return PTR_ERR(i2s->base); |
446 | } | ||
447 | |||
448 | i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem), | ||
449 | pdev->name); | ||
450 | if (!i2s->mem) { | ||
451 | ret = -EBUSY; | ||
452 | goto err_free; | ||
453 | } | ||
454 | 431 | ||
455 | i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem)); | 432 | i2s->phys_base = mem->start; |
456 | if (!i2s->base) { | ||
457 | ret = -EBUSY; | ||
458 | goto err_release_mem_region; | ||
459 | } | ||
460 | 433 | ||
461 | i2s->phys_base = i2s->mem->start; | 434 | i2s->clk_aic = devm_clk_get(&pdev->dev, "aic"); |
435 | if (IS_ERR(i2s->clk_aic)) | ||
436 | return PTR_ERR(i2s->clk_aic); | ||
462 | 437 | ||
463 | i2s->clk_aic = clk_get(&pdev->dev, "aic"); | 438 | i2s->clk_i2s = devm_clk_get(&pdev->dev, "i2s"); |
464 | if (IS_ERR(i2s->clk_aic)) { | 439 | if (IS_ERR(i2s->clk_i2s)) |
465 | ret = PTR_ERR(i2s->clk_aic); | 440 | return PTR_ERR(i2s->clk_i2s); |
466 | goto err_iounmap; | ||
467 | } | ||
468 | |||
469 | i2s->clk_i2s = clk_get(&pdev->dev, "i2s"); | ||
470 | if (IS_ERR(i2s->clk_i2s)) { | ||
471 | ret = PTR_ERR(i2s->clk_i2s); | ||
472 | goto err_clk_put_aic; | ||
473 | } | ||
474 | 441 | ||
475 | platform_set_drvdata(pdev, i2s); | 442 | platform_set_drvdata(pdev, i2s); |
476 | ret = snd_soc_register_component(&pdev->dev, &jz4740_i2s_component, | ||
477 | &jz4740_i2s_dai, 1); | ||
478 | 443 | ||
479 | if (ret) { | 444 | ret = devm_snd_soc_register_component(&pdev->dev, |
480 | dev_err(&pdev->dev, "Failed to register DAI\n"); | 445 | &jz4740_i2s_component, &jz4740_i2s_dai, 1); |
481 | goto err_clk_put_i2s; | 446 | if (ret) |
482 | } | 447 | return ret; |
483 | |||
484 | return 0; | ||
485 | |||
486 | err_clk_put_i2s: | ||
487 | clk_put(i2s->clk_i2s); | ||
488 | err_clk_put_aic: | ||
489 | clk_put(i2s->clk_aic); | ||
490 | err_iounmap: | ||
491 | iounmap(i2s->base); | ||
492 | err_release_mem_region: | ||
493 | release_mem_region(i2s->mem->start, resource_size(i2s->mem)); | ||
494 | err_free: | ||
495 | kfree(i2s); | ||
496 | |||
497 | return ret; | ||
498 | } | ||
499 | 448 | ||
500 | static int jz4740_i2s_dev_remove(struct platform_device *pdev) | 449 | return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, |
501 | { | 450 | SND_DMAENGINE_PCM_FLAG_COMPAT); |
502 | struct jz4740_i2s *i2s = platform_get_drvdata(pdev); | ||
503 | |||
504 | snd_soc_unregister_component(&pdev->dev); | ||
505 | |||
506 | clk_put(i2s->clk_i2s); | ||
507 | clk_put(i2s->clk_aic); | ||
508 | |||
509 | iounmap(i2s->base); | ||
510 | release_mem_region(i2s->mem->start, resource_size(i2s->mem)); | ||
511 | |||
512 | kfree(i2s); | ||
513 | |||
514 | return 0; | ||
515 | } | 451 | } |
516 | 452 | ||
517 | static struct platform_driver jz4740_i2s_driver = { | 453 | static struct platform_driver jz4740_i2s_driver = { |
518 | .probe = jz4740_i2s_dev_probe, | 454 | .probe = jz4740_i2s_dev_probe, |
519 | .remove = jz4740_i2s_dev_remove, | ||
520 | .driver = { | 455 | .driver = { |
521 | .name = "jz4740-i2s", | 456 | .name = "jz4740-i2s", |
522 | .owner = THIS_MODULE, | 457 | .owner = THIS_MODULE, |
diff --git a/sound/soc/jz4740/jz4740-pcm.c b/sound/soc/jz4740/jz4740-pcm.c deleted file mode 100644 index 1d7ef28585e1..000000000000 --- a/sound/soc/jz4740/jz4740-pcm.c +++ /dev/null | |||
@@ -1,358 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms of the GNU General Public License as published by the | ||
6 | * Free Software Foundation; either version 2 of the License, or (at your | ||
7 | * option) any later version. | ||
8 | * | ||
9 | * You should have received a copy of the GNU General Public License along | ||
10 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
11 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <linux/init.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/module.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/slab.h> | ||
21 | |||
22 | #include <linux/dma-mapping.h> | ||
23 | |||
24 | #include <sound/core.h> | ||
25 | #include <sound/pcm.h> | ||
26 | #include <sound/pcm_params.h> | ||
27 | #include <sound/soc.h> | ||
28 | |||
29 | #include <asm/mach-jz4740/dma.h> | ||
30 | #include "jz4740-pcm.h" | ||
31 | |||
32 | struct jz4740_runtime_data { | ||
33 | unsigned long dma_period; | ||
34 | dma_addr_t dma_start; | ||
35 | dma_addr_t dma_pos; | ||
36 | dma_addr_t dma_end; | ||
37 | |||
38 | struct jz4740_dma_chan *dma; | ||
39 | |||
40 | dma_addr_t fifo_addr; | ||
41 | }; | ||
42 | |||
43 | /* identify hardware playback capabilities */ | ||
44 | static const struct snd_pcm_hardware jz4740_pcm_hardware = { | ||
45 | .info = SNDRV_PCM_INFO_MMAP | | ||
46 | SNDRV_PCM_INFO_MMAP_VALID | | ||
47 | SNDRV_PCM_INFO_INTERLEAVED | | ||
48 | SNDRV_PCM_INFO_BLOCK_TRANSFER, | ||
49 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8, | ||
50 | |||
51 | .rates = SNDRV_PCM_RATE_8000_48000, | ||
52 | .channels_min = 1, | ||
53 | .channels_max = 2, | ||
54 | .period_bytes_min = 16, | ||
55 | .period_bytes_max = 2 * PAGE_SIZE, | ||
56 | .periods_min = 2, | ||
57 | .periods_max = 128, | ||
58 | .buffer_bytes_max = 128 * 2 * PAGE_SIZE, | ||
59 | .fifo_size = 32, | ||
60 | }; | ||
61 | |||
62 | static void jz4740_pcm_start_transfer(struct jz4740_runtime_data *prtd, | ||
63 | struct snd_pcm_substream *substream) | ||
64 | { | ||
65 | unsigned long count; | ||
66 | |||
67 | if (prtd->dma_pos == prtd->dma_end) | ||
68 | prtd->dma_pos = prtd->dma_start; | ||
69 | |||
70 | if (prtd->dma_pos + prtd->dma_period > prtd->dma_end) | ||
71 | count = prtd->dma_end - prtd->dma_pos; | ||
72 | else | ||
73 | count = prtd->dma_period; | ||
74 | |||
75 | jz4740_dma_disable(prtd->dma); | ||
76 | |||
77 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
78 | jz4740_dma_set_src_addr(prtd->dma, prtd->dma_pos); | ||
79 | jz4740_dma_set_dst_addr(prtd->dma, prtd->fifo_addr); | ||
80 | } else { | ||
81 | jz4740_dma_set_src_addr(prtd->dma, prtd->fifo_addr); | ||
82 | jz4740_dma_set_dst_addr(prtd->dma, prtd->dma_pos); | ||
83 | } | ||
84 | |||
85 | jz4740_dma_set_transfer_count(prtd->dma, count); | ||
86 | |||
87 | prtd->dma_pos += count; | ||
88 | |||
89 | jz4740_dma_enable(prtd->dma); | ||
90 | } | ||
91 | |||
92 | static void jz4740_pcm_dma_transfer_done(struct jz4740_dma_chan *dma, int err, | ||
93 | void *dev_id) | ||
94 | { | ||
95 | struct snd_pcm_substream *substream = dev_id; | ||
96 | struct snd_pcm_runtime *runtime = substream->runtime; | ||
97 | struct jz4740_runtime_data *prtd = runtime->private_data; | ||
98 | |||
99 | snd_pcm_period_elapsed(substream); | ||
100 | |||
101 | jz4740_pcm_start_transfer(prtd, substream); | ||
102 | } | ||
103 | |||
104 | static int jz4740_pcm_hw_params(struct snd_pcm_substream *substream, | ||
105 | struct snd_pcm_hw_params *params) | ||
106 | { | ||
107 | struct snd_pcm_runtime *runtime = substream->runtime; | ||
108 | struct jz4740_runtime_data *prtd = runtime->private_data; | ||
109 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
110 | struct jz4740_pcm_config *config; | ||
111 | |||
112 | config = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | ||
113 | |||
114 | if (!config) | ||
115 | return 0; | ||
116 | |||
117 | if (!prtd->dma) { | ||
118 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | ||
119 | prtd->dma = jz4740_dma_request(substream, "PCM Capture"); | ||
120 | else | ||
121 | prtd->dma = jz4740_dma_request(substream, "PCM Playback"); | ||
122 | } | ||
123 | |||
124 | if (!prtd->dma) | ||
125 | return -EBUSY; | ||
126 | |||
127 | jz4740_dma_configure(prtd->dma, &config->dma_config); | ||
128 | prtd->fifo_addr = config->fifo_addr; | ||
129 | |||
130 | jz4740_dma_set_complete_cb(prtd->dma, jz4740_pcm_dma_transfer_done); | ||
131 | |||
132 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); | ||
133 | runtime->dma_bytes = params_buffer_bytes(params); | ||
134 | |||
135 | prtd->dma_period = params_period_bytes(params); | ||
136 | prtd->dma_start = runtime->dma_addr; | ||
137 | prtd->dma_pos = prtd->dma_start; | ||
138 | prtd->dma_end = prtd->dma_start + runtime->dma_bytes; | ||
139 | |||
140 | return 0; | ||
141 | } | ||
142 | |||
143 | static int jz4740_pcm_hw_free(struct snd_pcm_substream *substream) | ||
144 | { | ||
145 | struct jz4740_runtime_data *prtd = substream->runtime->private_data; | ||
146 | |||
147 | snd_pcm_set_runtime_buffer(substream, NULL); | ||
148 | if (prtd->dma) { | ||
149 | jz4740_dma_free(prtd->dma); | ||
150 | prtd->dma = NULL; | ||
151 | } | ||
152 | |||
153 | return 0; | ||
154 | } | ||
155 | |||
156 | static int jz4740_pcm_prepare(struct snd_pcm_substream *substream) | ||
157 | { | ||
158 | struct jz4740_runtime_data *prtd = substream->runtime->private_data; | ||
159 | |||
160 | if (!prtd->dma) | ||
161 | return -EBUSY; | ||
162 | |||
163 | prtd->dma_pos = prtd->dma_start; | ||
164 | |||
165 | return 0; | ||
166 | } | ||
167 | |||
168 | static int jz4740_pcm_trigger(struct snd_pcm_substream *substream, int cmd) | ||
169 | { | ||
170 | struct snd_pcm_runtime *runtime = substream->runtime; | ||
171 | struct jz4740_runtime_data *prtd = runtime->private_data; | ||
172 | |||
173 | switch (cmd) { | ||
174 | case SNDRV_PCM_TRIGGER_START: | ||
175 | case SNDRV_PCM_TRIGGER_RESUME: | ||
176 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
177 | jz4740_pcm_start_transfer(prtd, substream); | ||
178 | break; | ||
179 | case SNDRV_PCM_TRIGGER_STOP: | ||
180 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
181 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
182 | jz4740_dma_disable(prtd->dma); | ||
183 | break; | ||
184 | default: | ||
185 | break; | ||
186 | } | ||
187 | |||
188 | return 0; | ||
189 | } | ||
190 | |||
191 | static snd_pcm_uframes_t jz4740_pcm_pointer(struct snd_pcm_substream *substream) | ||
192 | { | ||
193 | struct snd_pcm_runtime *runtime = substream->runtime; | ||
194 | struct jz4740_runtime_data *prtd = runtime->private_data; | ||
195 | unsigned long byte_offset; | ||
196 | snd_pcm_uframes_t offset; | ||
197 | struct jz4740_dma_chan *dma = prtd->dma; | ||
198 | |||
199 | /* prtd->dma_pos points to the end of the current transfer. So by | ||
200 | * subtracting prdt->dma_start we get the offset to the end of the | ||
201 | * current period in bytes. By subtracting the residue of the transfer | ||
202 | * we get the current offset in bytes. */ | ||
203 | byte_offset = prtd->dma_pos - prtd->dma_start; | ||
204 | byte_offset -= jz4740_dma_get_residue(dma); | ||
205 | |||
206 | offset = bytes_to_frames(runtime, byte_offset); | ||
207 | if (offset >= runtime->buffer_size) | ||
208 | offset = 0; | ||
209 | |||
210 | return offset; | ||
211 | } | ||
212 | |||
213 | static int jz4740_pcm_open(struct snd_pcm_substream *substream) | ||
214 | { | ||
215 | struct snd_pcm_runtime *runtime = substream->runtime; | ||
216 | struct jz4740_runtime_data *prtd; | ||
217 | |||
218 | prtd = kzalloc(sizeof(*prtd), GFP_KERNEL); | ||
219 | if (prtd == NULL) | ||
220 | return -ENOMEM; | ||
221 | |||
222 | snd_soc_set_runtime_hwparams(substream, &jz4740_pcm_hardware); | ||
223 | |||
224 | runtime->private_data = prtd; | ||
225 | |||
226 | return 0; | ||
227 | } | ||
228 | |||
229 | static int jz4740_pcm_close(struct snd_pcm_substream *substream) | ||
230 | { | ||
231 | struct snd_pcm_runtime *runtime = substream->runtime; | ||
232 | struct jz4740_runtime_data *prtd = runtime->private_data; | ||
233 | |||
234 | kfree(prtd); | ||
235 | |||
236 | return 0; | ||
237 | } | ||
238 | |||
239 | static int jz4740_pcm_mmap(struct snd_pcm_substream *substream, | ||
240 | struct vm_area_struct *vma) | ||
241 | { | ||
242 | return remap_pfn_range(vma, vma->vm_start, | ||
243 | substream->dma_buffer.addr >> PAGE_SHIFT, | ||
244 | vma->vm_end - vma->vm_start, vma->vm_page_prot); | ||
245 | } | ||
246 | |||
247 | static struct snd_pcm_ops jz4740_pcm_ops = { | ||
248 | .open = jz4740_pcm_open, | ||
249 | .close = jz4740_pcm_close, | ||
250 | .ioctl = snd_pcm_lib_ioctl, | ||
251 | .hw_params = jz4740_pcm_hw_params, | ||
252 | .hw_free = jz4740_pcm_hw_free, | ||
253 | .prepare = jz4740_pcm_prepare, | ||
254 | .trigger = jz4740_pcm_trigger, | ||
255 | .pointer = jz4740_pcm_pointer, | ||
256 | .mmap = jz4740_pcm_mmap, | ||
257 | }; | ||
258 | |||
259 | static int jz4740_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) | ||
260 | { | ||
261 | struct snd_pcm_substream *substream = pcm->streams[stream].substream; | ||
262 | struct snd_dma_buffer *buf = &substream->dma_buffer; | ||
263 | size_t size = jz4740_pcm_hardware.buffer_bytes_max; | ||
264 | |||
265 | buf->dev.type = SNDRV_DMA_TYPE_DEV; | ||
266 | buf->dev.dev = pcm->card->dev; | ||
267 | buf->private_data = NULL; | ||
268 | |||
269 | buf->area = dma_alloc_noncoherent(pcm->card->dev, size, | ||
270 | &buf->addr, GFP_KERNEL); | ||
271 | if (!buf->area) | ||
272 | return -ENOMEM; | ||
273 | |||
274 | buf->bytes = size; | ||
275 | |||
276 | return 0; | ||
277 | } | ||
278 | |||
279 | static void jz4740_pcm_free(struct snd_pcm *pcm) | ||
280 | { | ||
281 | struct snd_pcm_substream *substream; | ||
282 | struct snd_dma_buffer *buf; | ||
283 | int stream; | ||
284 | |||
285 | for (stream = 0; stream < SNDRV_PCM_STREAM_LAST; ++stream) { | ||
286 | substream = pcm->streams[stream].substream; | ||
287 | if (!substream) | ||
288 | continue; | ||
289 | |||
290 | buf = &substream->dma_buffer; | ||
291 | if (!buf->area) | ||
292 | continue; | ||
293 | |||
294 | dma_free_noncoherent(pcm->card->dev, buf->bytes, buf->area, | ||
295 | buf->addr); | ||
296 | buf->area = NULL; | ||
297 | } | ||
298 | } | ||
299 | |||
300 | static int jz4740_pcm_new(struct snd_soc_pcm_runtime *rtd) | ||
301 | { | ||
302 | struct snd_card *card = rtd->card->snd_card; | ||
303 | struct snd_pcm *pcm = rtd->pcm; | ||
304 | int ret; | ||
305 | |||
306 | ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32)); | ||
307 | if (ret) | ||
308 | return ret; | ||
309 | |||
310 | if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { | ||
311 | ret = jz4740_pcm_preallocate_dma_buffer(pcm, | ||
312 | SNDRV_PCM_STREAM_PLAYBACK); | ||
313 | if (ret) | ||
314 | goto err; | ||
315 | } | ||
316 | |||
317 | if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { | ||
318 | ret = jz4740_pcm_preallocate_dma_buffer(pcm, | ||
319 | SNDRV_PCM_STREAM_CAPTURE); | ||
320 | if (ret) | ||
321 | goto err; | ||
322 | } | ||
323 | |||
324 | err: | ||
325 | return ret; | ||
326 | } | ||
327 | |||
328 | static struct snd_soc_platform_driver jz4740_soc_platform = { | ||
329 | .ops = &jz4740_pcm_ops, | ||
330 | .pcm_new = jz4740_pcm_new, | ||
331 | .pcm_free = jz4740_pcm_free, | ||
332 | }; | ||
333 | |||
334 | static int jz4740_pcm_probe(struct platform_device *pdev) | ||
335 | { | ||
336 | return snd_soc_register_platform(&pdev->dev, &jz4740_soc_platform); | ||
337 | } | ||
338 | |||
339 | static int jz4740_pcm_remove(struct platform_device *pdev) | ||
340 | { | ||
341 | snd_soc_unregister_platform(&pdev->dev); | ||
342 | return 0; | ||
343 | } | ||
344 | |||
345 | static struct platform_driver jz4740_pcm_driver = { | ||
346 | .probe = jz4740_pcm_probe, | ||
347 | .remove = jz4740_pcm_remove, | ||
348 | .driver = { | ||
349 | .name = "jz4740-pcm-audio", | ||
350 | .owner = THIS_MODULE, | ||
351 | }, | ||
352 | }; | ||
353 | |||
354 | module_platform_driver(jz4740_pcm_driver); | ||
355 | |||
356 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); | ||
357 | MODULE_DESCRIPTION("Ingenic SoC JZ4740 PCM driver"); | ||
358 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/jz4740/jz4740-pcm.h b/sound/soc/jz4740/jz4740-pcm.h deleted file mode 100644 index 1220cbb4382c..000000000000 --- a/sound/soc/jz4740/jz4740-pcm.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * This program is free software; you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License version 2 as | ||
5 | * published by the Free Software Foundation. | ||
6 | */ | ||
7 | |||
8 | #ifndef _JZ4740_PCM_H | ||
9 | #define _JZ4740_PCM_H | ||
10 | |||
11 | #include <linux/dma-mapping.h> | ||
12 | #include <asm/mach-jz4740/dma.h> | ||
13 | |||
14 | |||
15 | struct jz4740_pcm_config { | ||
16 | struct jz4740_dma_config dma_config; | ||
17 | phys_addr_t fifo_addr; | ||
18 | }; | ||
19 | |||
20 | #endif | ||
diff --git a/sound/soc/jz4740/qi_lb60.c b/sound/soc/jz4740/qi_lb60.c index 55fd6b5df55f..82b5f37cd2c7 100644 --- a/sound/soc/jz4740/qi_lb60.c +++ b/sound/soc/jz4740/qi_lb60.c | |||
@@ -73,7 +73,7 @@ static struct snd_soc_dai_link qi_lb60_dai = { | |||
73 | .name = "jz4740", | 73 | .name = "jz4740", |
74 | .stream_name = "jz4740", | 74 | .stream_name = "jz4740", |
75 | .cpu_dai_name = "jz4740-i2s", | 75 | .cpu_dai_name = "jz4740-i2s", |
76 | .platform_name = "jz4740-pcm-audio", | 76 | .platform_name = "jz4740-i2s", |
77 | .codec_dai_name = "jz4740-hifi", | 77 | .codec_dai_name = "jz4740-hifi", |
78 | .codec_name = "jz4740-codec", | 78 | .codec_name = "jz4740-codec", |
79 | .init = qi_lb60_codec_init, | 79 | .init = qi_lb60_codec_init, |
diff --git a/sound/soc/kirkwood/kirkwood-dma.c b/sound/soc/kirkwood/kirkwood-dma.c index 4af1936cf0f4..aac22fccdcdc 100644 --- a/sound/soc/kirkwood/kirkwood-dma.c +++ b/sound/soc/kirkwood/kirkwood-dma.c | |||
@@ -21,16 +21,6 @@ | |||
21 | #include <sound/soc.h> | 21 | #include <sound/soc.h> |
22 | #include "kirkwood.h" | 22 | #include "kirkwood.h" |
23 | 23 | ||
24 | #define KIRKWOOD_RATES \ | ||
25 | (SNDRV_PCM_RATE_8000_192000 | \ | ||
26 | SNDRV_PCM_RATE_CONTINUOUS | \ | ||
27 | SNDRV_PCM_RATE_KNOT) | ||
28 | |||
29 | #define KIRKWOOD_FORMATS \ | ||
30 | (SNDRV_PCM_FMTBIT_S16_LE | \ | ||
31 | SNDRV_PCM_FMTBIT_S24_LE | \ | ||
32 | SNDRV_PCM_FMTBIT_S32_LE) | ||
33 | |||
34 | static struct kirkwood_dma_data *kirkwood_priv(struct snd_pcm_substream *subs) | 24 | static struct kirkwood_dma_data *kirkwood_priv(struct snd_pcm_substream *subs) |
35 | { | 25 | { |
36 | struct snd_soc_pcm_runtime *soc_runtime = subs->private_data; | 26 | struct snd_soc_pcm_runtime *soc_runtime = subs->private_data; |
@@ -43,12 +33,6 @@ static struct snd_pcm_hardware kirkwood_dma_snd_hw = { | |||
43 | SNDRV_PCM_INFO_MMAP_VALID | | 33 | SNDRV_PCM_INFO_MMAP_VALID | |
44 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 34 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
45 | SNDRV_PCM_INFO_PAUSE), | 35 | SNDRV_PCM_INFO_PAUSE), |
46 | .formats = KIRKWOOD_FORMATS, | ||
47 | .rates = KIRKWOOD_RATES, | ||
48 | .rate_min = 8000, | ||
49 | .rate_max = 384000, | ||
50 | .channels_min = 1, | ||
51 | .channels_max = 8, | ||
52 | .buffer_bytes_max = KIRKWOOD_SND_MAX_BUFFER_BYTES, | 36 | .buffer_bytes_max = KIRKWOOD_SND_MAX_BUFFER_BYTES, |
53 | .period_bytes_min = KIRKWOOD_SND_MIN_PERIOD_BYTES, | 37 | .period_bytes_min = KIRKWOOD_SND_MIN_PERIOD_BYTES, |
54 | .period_bytes_max = KIRKWOOD_SND_MAX_PERIOD_BYTES, | 38 | .period_bytes_max = KIRKWOOD_SND_MAX_PERIOD_BYTES, |
diff --git a/sound/soc/mxs/mxs-pcm.c b/sound/soc/mxs/mxs-pcm.c index b16abbbf7764..a371b4f91c53 100644 --- a/sound/soc/mxs/mxs-pcm.c +++ b/sound/soc/mxs/mxs-pcm.c | |||
@@ -36,11 +36,6 @@ static const struct snd_pcm_hardware snd_mxs_hardware = { | |||
36 | SNDRV_PCM_INFO_RESUME | | 36 | SNDRV_PCM_INFO_RESUME | |
37 | SNDRV_PCM_INFO_INTERLEAVED | | 37 | SNDRV_PCM_INFO_INTERLEAVED | |
38 | SNDRV_PCM_INFO_HALF_DUPLEX, | 38 | SNDRV_PCM_INFO_HALF_DUPLEX, |
39 | .formats = SNDRV_PCM_FMTBIT_S16_LE | | ||
40 | SNDRV_PCM_FMTBIT_S20_3LE | | ||
41 | SNDRV_PCM_FMTBIT_S24_LE, | ||
42 | .channels_min = 2, | ||
43 | .channels_max = 2, | ||
44 | .period_bytes_min = 32, | 39 | .period_bytes_min = 32, |
45 | .period_bytes_max = 8192, | 40 | .period_bytes_max = 8192, |
46 | .periods_min = 1, | 41 | .periods_min = 1, |
@@ -56,16 +51,9 @@ static const struct snd_dmaengine_pcm_config mxs_dmaengine_pcm_config = { | |||
56 | 51 | ||
57 | int mxs_pcm_platform_register(struct device *dev) | 52 | int mxs_pcm_platform_register(struct device *dev) |
58 | { | 53 | { |
59 | return snd_dmaengine_pcm_register(dev, &mxs_dmaengine_pcm_config, | 54 | return devm_snd_dmaengine_pcm_register(dev, &mxs_dmaengine_pcm_config, |
60 | SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | | ||
61 | SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX); | 55 | SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX); |
62 | } | 56 | } |
63 | EXPORT_SYMBOL_GPL(mxs_pcm_platform_register); | 57 | EXPORT_SYMBOL_GPL(mxs_pcm_platform_register); |
64 | 58 | ||
65 | void mxs_pcm_platform_unregister(struct device *dev) | ||
66 | { | ||
67 | snd_dmaengine_pcm_unregister(dev); | ||
68 | } | ||
69 | EXPORT_SYMBOL_GPL(mxs_pcm_platform_unregister); | ||
70 | |||
71 | MODULE_LICENSE("GPL"); | 59 | MODULE_LICENSE("GPL"); |
diff --git a/sound/soc/mxs/mxs-pcm.h b/sound/soc/mxs/mxs-pcm.h index bc685b67cac7..035ea0436ca5 100644 --- a/sound/soc/mxs/mxs-pcm.h +++ b/sound/soc/mxs/mxs-pcm.h | |||
@@ -20,6 +20,5 @@ | |||
20 | #define _MXS_PCM_H | 20 | #define _MXS_PCM_H |
21 | 21 | ||
22 | int mxs_pcm_platform_register(struct device *dev); | 22 | int mxs_pcm_platform_register(struct device *dev); |
23 | void mxs_pcm_platform_unregister(struct device *dev); | ||
24 | 23 | ||
25 | #endif | 24 | #endif |
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index 54e622acac33..231d7e7b0711 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c | |||
@@ -50,9 +50,9 @@ static struct mxs_saif *mxs_saif[2]; | |||
50 | * This also means that both SAIFs must operate at the same sample rate. | 50 | * This also means that both SAIFs must operate at the same sample rate. |
51 | * | 51 | * |
52 | * We abstract this as each saif has a master, the master could be | 52 | * We abstract this as each saif has a master, the master could be |
53 | * himself or other saifs. In the generic saif driver, saif does not need | 53 | * itself or other saifs. In the generic saif driver, saif does not need |
54 | * to know the different clkmux. Saif only needs to know who is his master | 54 | * to know the different clkmux. Saif only needs to know who is its master |
55 | * and operating his master to generate the proper clock rate for him. | 55 | * and operating its master to generate the proper clock rate for it. |
56 | * The master id is provided in mach-specific layer according to different | 56 | * The master id is provided in mach-specific layer according to different |
57 | * clkmux setting. | 57 | * clkmux setting. |
58 | */ | 58 | */ |
@@ -76,7 +76,7 @@ static int mxs_saif_set_dai_sysclk(struct snd_soc_dai *cpu_dai, | |||
76 | * Since SAIF may work on EXTMASTER mode, IOW, it's working BITCLK&LRCLK | 76 | * Since SAIF may work on EXTMASTER mode, IOW, it's working BITCLK&LRCLK |
77 | * is provided by other SAIF, we provide a interface here to get its master | 77 | * is provided by other SAIF, we provide a interface here to get its master |
78 | * from its master_id. | 78 | * from its master_id. |
79 | * Note that the master could be himself. | 79 | * Note that the master could be itself. |
80 | */ | 80 | */ |
81 | static inline struct mxs_saif *mxs_saif_get_master(struct mxs_saif * saif) | 81 | static inline struct mxs_saif *mxs_saif_get_master(struct mxs_saif * saif) |
82 | { | 82 | { |
@@ -516,7 +516,7 @@ static int mxs_saif_trigger(struct snd_pcm_substream *substream, int cmd, | |||
516 | } | 516 | } |
517 | 517 | ||
518 | /* | 518 | /* |
519 | * If the saif's master is not himself, we also need to enable | 519 | * If the saif's master is not itself, we also need to enable |
520 | * itself clk for its internal basic logic to work. | 520 | * itself clk for its internal basic logic to work. |
521 | */ | 521 | */ |
522 | if (saif != master_saif) { | 522 | if (saif != master_saif) { |
@@ -804,13 +804,6 @@ static int mxs_saif_probe(struct platform_device *pdev) | |||
804 | return 0; | 804 | return 0; |
805 | } | 805 | } |
806 | 806 | ||
807 | static int mxs_saif_remove(struct platform_device *pdev) | ||
808 | { | ||
809 | mxs_pcm_platform_unregister(&pdev->dev); | ||
810 | |||
811 | return 0; | ||
812 | } | ||
813 | |||
814 | static const struct of_device_id mxs_saif_dt_ids[] = { | 807 | static const struct of_device_id mxs_saif_dt_ids[] = { |
815 | { .compatible = "fsl,imx28-saif", }, | 808 | { .compatible = "fsl,imx28-saif", }, |
816 | { /* sentinel */ } | 809 | { /* sentinel */ } |
@@ -819,7 +812,6 @@ MODULE_DEVICE_TABLE(of, mxs_saif_dt_ids); | |||
819 | 812 | ||
820 | static struct platform_driver mxs_saif_driver = { | 813 | static struct platform_driver mxs_saif_driver = { |
821 | .probe = mxs_saif_probe, | 814 | .probe = mxs_saif_probe, |
822 | .remove = mxs_saif_remove, | ||
823 | 815 | ||
824 | .driver = { | 816 | .driver = { |
825 | .name = "mxs-saif", | 817 | .name = "mxs-saif", |
diff --git a/sound/soc/nuc900/nuc900-pcm.c b/sound/soc/nuc900/nuc900-pcm.c index f588ee45b4fd..f434ed79d1b6 100644 --- a/sound/soc/nuc900/nuc900-pcm.c +++ b/sound/soc/nuc900/nuc900-pcm.c | |||
@@ -32,9 +32,6 @@ static const struct snd_pcm_hardware nuc900_pcm_hardware = { | |||
32 | SNDRV_PCM_INFO_MMAP_VALID | | 32 | SNDRV_PCM_INFO_MMAP_VALID | |
33 | SNDRV_PCM_INFO_PAUSE | | 33 | SNDRV_PCM_INFO_PAUSE | |
34 | SNDRV_PCM_INFO_RESUME, | 34 | SNDRV_PCM_INFO_RESUME, |
35 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
36 | .channels_min = 1, | ||
37 | .channels_max = 2, | ||
38 | .buffer_bytes_max = 4*1024, | 35 | .buffer_bytes_max = 4*1024, |
39 | .period_bytes_min = 1*1024, | 36 | .period_bytes_min = 1*1024, |
40 | .period_bytes_max = 4*1024, | 37 | .period_bytes_max = 4*1024, |
diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c index 83433fdea32a..86c75384c3c8 100644 --- a/sound/soc/omap/mcbsp.c +++ b/sound/soc/omap/mcbsp.c | |||
@@ -36,10 +36,10 @@ static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) | |||
36 | 36 | ||
37 | if (mcbsp->pdata->reg_size == 2) { | 37 | if (mcbsp->pdata->reg_size == 2) { |
38 | ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; | 38 | ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; |
39 | __raw_writew((u16)val, addr); | 39 | writew_relaxed((u16)val, addr); |
40 | } else { | 40 | } else { |
41 | ((u32 *)mcbsp->reg_cache)[reg] = val; | 41 | ((u32 *)mcbsp->reg_cache)[reg] = val; |
42 | __raw_writel(val, addr); | 42 | writel_relaxed(val, addr); |
43 | } | 43 | } |
44 | } | 44 | } |
45 | 45 | ||
@@ -48,22 +48,22 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) | |||
48 | void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; | 48 | void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; |
49 | 49 | ||
50 | if (mcbsp->pdata->reg_size == 2) { | 50 | if (mcbsp->pdata->reg_size == 2) { |
51 | return !from_cache ? __raw_readw(addr) : | 51 | return !from_cache ? readw_relaxed(addr) : |
52 | ((u16 *)mcbsp->reg_cache)[reg]; | 52 | ((u16 *)mcbsp->reg_cache)[reg]; |
53 | } else { | 53 | } else { |
54 | return !from_cache ? __raw_readl(addr) : | 54 | return !from_cache ? readl_relaxed(addr) : |
55 | ((u32 *)mcbsp->reg_cache)[reg]; | 55 | ((u32 *)mcbsp->reg_cache)[reg]; |
56 | } | 56 | } |
57 | } | 57 | } |
58 | 58 | ||
59 | static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) | 59 | static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) |
60 | { | 60 | { |
61 | __raw_writel(val, mcbsp->st_data->io_base_st + reg); | 61 | writel_relaxed(val, mcbsp->st_data->io_base_st + reg); |
62 | } | 62 | } |
63 | 63 | ||
64 | static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) | 64 | static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) |
65 | { | 65 | { |
66 | return __raw_readl(mcbsp->st_data->io_base_st + reg); | 66 | return readl_relaxed(mcbsp->st_data->io_base_st + reg); |
67 | } | 67 | } |
68 | 68 | ||
69 | #define MCBSP_READ(mcbsp, reg) \ | 69 | #define MCBSP_READ(mcbsp, reg) \ |
diff --git a/sound/soc/omap/omap-dmic.c b/sound/soc/omap/omap-dmic.c index 12e566be3793..1bd531d718f9 100644 --- a/sound/soc/omap/omap-dmic.c +++ b/sound/soc/omap/omap-dmic.c | |||
@@ -61,12 +61,12 @@ struct omap_dmic { | |||
61 | 61 | ||
62 | static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val) | 62 | static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val) |
63 | { | 63 | { |
64 | __raw_writel(val, dmic->io_base + reg); | 64 | writel_relaxed(val, dmic->io_base + reg); |
65 | } | 65 | } |
66 | 66 | ||
67 | static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg) | 67 | static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg) |
68 | { | 68 | { |
69 | return __raw_readl(dmic->io_base + reg); | 69 | return readl_relaxed(dmic->io_base + reg); |
70 | } | 70 | } |
71 | 71 | ||
72 | static inline void omap_dmic_start(struct omap_dmic *dmic) | 72 | static inline void omap_dmic_start(struct omap_dmic *dmic) |
diff --git a/sound/soc/omap/omap-mcpdm.c b/sound/soc/omap/omap-mcpdm.c index cd9ee167959d..2f5b1536477e 100644 --- a/sound/soc/omap/omap-mcpdm.c +++ b/sound/soc/omap/omap-mcpdm.c | |||
@@ -74,12 +74,12 @@ struct omap_mcpdm { | |||
74 | 74 | ||
75 | static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val) | 75 | static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val) |
76 | { | 76 | { |
77 | __raw_writel(val, mcpdm->io_base + reg); | 77 | writel_relaxed(val, mcpdm->io_base + reg); |
78 | } | 78 | } |
79 | 79 | ||
80 | static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg) | 80 | static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg) |
81 | { | 81 | { |
82 | return __raw_readl(mcpdm->io_base + reg); | 82 | return readl_relaxed(mcpdm->io_base + reg); |
83 | } | 83 | } |
84 | 84 | ||
85 | #ifdef DEBUG | 85 | #ifdef DEBUG |
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c index b8fa9862e54c..07b8b7bc9d20 100644 --- a/sound/soc/omap/omap-pcm.c +++ b/sound/soc/omap/omap-pcm.c | |||
@@ -45,8 +45,6 @@ static const struct snd_pcm_hardware omap_pcm_hardware = { | |||
45 | SNDRV_PCM_INFO_PAUSE | | 45 | SNDRV_PCM_INFO_PAUSE | |
46 | SNDRV_PCM_INFO_RESUME | | 46 | SNDRV_PCM_INFO_RESUME | |
47 | SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, | 47 | SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, |
48 | .formats = SNDRV_PCM_FMTBIT_S16_LE | | ||
49 | SNDRV_PCM_FMTBIT_S32_LE, | ||
50 | .period_bytes_min = 32, | 48 | .period_bytes_min = 32, |
51 | .period_bytes_max = 64 * 1024, | 49 | .period_bytes_max = 64 * 1024, |
52 | .periods_min = 2, | 50 | .periods_min = 2, |
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig index 4db74a083db1..6473052b6899 100644 --- a/sound/soc/pxa/Kconfig +++ b/sound/soc/pxa/Kconfig | |||
@@ -11,7 +11,7 @@ config SND_PXA2XX_SOC | |||
11 | config SND_MMP_SOC | 11 | config SND_MMP_SOC |
12 | bool "Soc Audio for Marvell MMP chips" | 12 | bool "Soc Audio for Marvell MMP chips" |
13 | depends on ARCH_MMP | 13 | depends on ARCH_MMP |
14 | select SND_DMAENGINE_PCM | 14 | select SND_SOC_GENERIC_DMAENGINE_PCM |
15 | select SND_ARM | 15 | select SND_ARM |
16 | help | 16 | help |
17 | Say Y if you want to add support for codecs attached to | 17 | Say Y if you want to add support for codecs attached to |
diff --git a/sound/soc/pxa/mmp-pcm.c b/sound/soc/pxa/mmp-pcm.c index 7929e19b0ef5..5e8d81330173 100644 --- a/sound/soc/pxa/mmp-pcm.c +++ b/sound/soc/pxa/mmp-pcm.c | |||
@@ -36,14 +36,9 @@ struct mmp_dma_data { | |||
36 | SNDRV_PCM_INFO_PAUSE | \ | 36 | SNDRV_PCM_INFO_PAUSE | \ |
37 | SNDRV_PCM_INFO_RESUME) | 37 | SNDRV_PCM_INFO_RESUME) |
38 | 38 | ||
39 | #define MMP_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ | ||
40 | SNDRV_PCM_FMTBIT_S24_LE | \ | ||
41 | SNDRV_PCM_FMTBIT_S32_LE) | ||
42 | |||
43 | static struct snd_pcm_hardware mmp_pcm_hardware[] = { | 39 | static struct snd_pcm_hardware mmp_pcm_hardware[] = { |
44 | { | 40 | { |
45 | .info = MMP_PCM_INFO, | 41 | .info = MMP_PCM_INFO, |
46 | .formats = MMP_PCM_FORMATS, | ||
47 | .period_bytes_min = 1024, | 42 | .period_bytes_min = 1024, |
48 | .period_bytes_max = 2048, | 43 | .period_bytes_max = 2048, |
49 | .periods_min = 2, | 44 | .periods_min = 2, |
@@ -53,7 +48,6 @@ static struct snd_pcm_hardware mmp_pcm_hardware[] = { | |||
53 | }, | 48 | }, |
54 | { | 49 | { |
55 | .info = MMP_PCM_INFO, | 50 | .info = MMP_PCM_INFO, |
56 | .formats = MMP_PCM_FORMATS, | ||
57 | .period_bytes_min = 1024, | 51 | .period_bytes_min = 1024, |
58 | .period_bytes_max = 2048, | 52 | .period_bytes_max = 2048, |
59 | .periods_min = 2, | 53 | .periods_min = 2, |
@@ -67,27 +61,15 @@ static int mmp_pcm_hw_params(struct snd_pcm_substream *substream, | |||
67 | struct snd_pcm_hw_params *params) | 61 | struct snd_pcm_hw_params *params) |
68 | { | 62 | { |
69 | struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream); | 63 | struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream); |
70 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
71 | struct snd_dmaengine_dai_dma_data *dma_params; | ||
72 | struct dma_slave_config slave_config; | 64 | struct dma_slave_config slave_config; |
73 | int ret; | 65 | int ret; |
74 | 66 | ||
75 | dma_params = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | 67 | ret = |
76 | if (!dma_params) | 68 | snd_dmaengine_pcm_prepare_slave_config(substream, params, |
77 | return 0; | 69 | &slave_config); |
78 | |||
79 | ret = snd_hwparams_to_dma_slave_config(substream, params, &slave_config); | ||
80 | if (ret) | 70 | if (ret) |
81 | return ret; | 71 | return ret; |
82 | 72 | ||
83 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
84 | slave_config.dst_addr = dma_params->addr; | ||
85 | slave_config.dst_maxburst = 4; | ||
86 | } else { | ||
87 | slave_config.src_addr = dma_params->addr; | ||
88 | slave_config.src_maxburst = 4; | ||
89 | } | ||
90 | |||
91 | ret = dmaengine_slave_config(chan, &slave_config); | 73 | ret = dmaengine_slave_config(chan, &slave_config); |
92 | if (ret) | 74 | if (ret) |
93 | return ret; | 75 | return ret; |
diff --git a/sound/soc/s6000/s6000-i2s.c b/sound/soc/s6000/s6000-i2s.c index 73bb99f0109a..7eba7979b9af 100644 --- a/sound/soc/s6000/s6000-i2s.c +++ b/sound/soc/s6000/s6000-i2s.c | |||
@@ -405,8 +405,7 @@ static int s6000_i2s_dai_probe(struct snd_soc_dai *dai) | |||
405 | return 0; | 405 | return 0; |
406 | } | 406 | } |
407 | 407 | ||
408 | #define S6000_I2S_RATES (SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_5512 | \ | 408 | #define S6000_I2S_RATES SNDRV_PCM_RATE_CONTINUOUS |
409 | SNDRV_PCM_RATE_8000_192000) | ||
410 | #define S6000_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) | 409 | #define S6000_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) |
411 | 410 | ||
412 | static const struct snd_soc_dai_ops s6000_i2s_dai_ops = { | 411 | static const struct snd_soc_dai_ops s6000_i2s_dai_ops = { |
diff --git a/sound/soc/s6000/s6000-pcm.c b/sound/soc/s6000/s6000-pcm.c index d219880815c0..fb8461e1b1f6 100644 --- a/sound/soc/s6000/s6000-pcm.c +++ b/sound/soc/s6000/s6000-pcm.c | |||
@@ -33,13 +33,6 @@ static struct snd_pcm_hardware s6000_pcm_hardware = { | |||
33 | .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 33 | .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
34 | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | 34 | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | |
35 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_JOINT_DUPLEX), | 35 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_JOINT_DUPLEX), |
36 | .formats = (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE), | ||
37 | .rates = (SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_5512 | \ | ||
38 | SNDRV_PCM_RATE_8000_192000), | ||
39 | .rate_min = 0, | ||
40 | .rate_max = 1562500, | ||
41 | .channels_min = 2, | ||
42 | .channels_max = 8, | ||
43 | .buffer_bytes_max = 0x7ffffff0, | 36 | .buffer_bytes_max = 0x7ffffff0, |
44 | .period_bytes_min = 16, | 37 | .period_bytes_min = 16, |
45 | .period_bytes_max = 0xfffff0, | 38 | .period_bytes_max = 0xfffff0, |
diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig index 37459dfd168d..27930fc432dc 100644 --- a/sound/soc/samsung/Kconfig +++ b/sound/soc/samsung/Kconfig | |||
@@ -1,13 +1,22 @@ | |||
1 | config SND_SOC_SAMSUNG | 1 | config SND_SOC_SAMSUNG |
2 | tristate "ASoC support for Samsung" | 2 | tristate "ASoC support for Samsung" |
3 | depends on PLAT_SAMSUNG | 3 | depends on PLAT_SAMSUNG |
4 | select S3C64XX_DMA if ARCH_S3C64XX | 4 | select S3C2410_DMA if ARCH_S3C24XX |
5 | select S3C24XX_DMA if ARCH_S3C24XX | 5 | select S3C64XX_PL080 if ARCH_S3C64XX |
6 | select SND_S3C_DMA if !ARCH_S3C24XX | ||
7 | select SND_S3C_DMA_LEGACY if ARCH_S3C24XX | ||
8 | select SND_SOC_GENERIC_DMAENGINE_PCM if !ARCH_S3C24XX | ||
6 | help | 9 | help |
7 | Say Y or M if you want to add support for codecs attached to | 10 | Say Y or M if you want to add support for codecs attached to |
8 | the Samsung SoCs' Audio interfaces. You will also need to | 11 | the Samsung SoCs' Audio interfaces. You will also need to |
9 | select the audio interfaces to support below. | 12 | select the audio interfaces to support below. |
10 | 13 | ||
14 | config SND_S3C_DMA | ||
15 | tristate | ||
16 | |||
17 | config SND_S3C_DMA_LEGACY | ||
18 | tristate | ||
19 | |||
11 | config SND_S3C24XX_I2S | 20 | config SND_S3C24XX_I2S |
12 | tristate | 21 | tristate |
13 | select S3C2410_DMA | 22 | select S3C2410_DMA |
diff --git a/sound/soc/samsung/Makefile b/sound/soc/samsung/Makefile index 709f6059ad67..86715d8efee6 100644 --- a/sound/soc/samsung/Makefile +++ b/sound/soc/samsung/Makefile | |||
@@ -1,5 +1,6 @@ | |||
1 | # S3c24XX Platform Support | 1 | # S3c24XX Platform Support |
2 | snd-soc-s3c24xx-objs := dma.o | 2 | snd-soc-s3c-dma-objs := dmaengine.o |
3 | snd-soc-s3c-dma-legacy-objs := dma.o | ||
3 | snd-soc-idma-objs := idma.o | 4 | snd-soc-idma-objs := idma.o |
4 | snd-soc-s3c24xx-i2s-objs := s3c24xx-i2s.o | 5 | snd-soc-s3c24xx-i2s-objs := s3c24xx-i2s.o |
5 | snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o | 6 | snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o |
@@ -9,7 +10,8 @@ snd-soc-samsung-spdif-objs := spdif.o | |||
9 | snd-soc-pcm-objs := pcm.o | 10 | snd-soc-pcm-objs := pcm.o |
10 | snd-soc-i2s-objs := i2s.o | 11 | snd-soc-i2s-objs := i2s.o |
11 | 12 | ||
12 | obj-$(CONFIG_SND_SOC_SAMSUNG) += snd-soc-s3c24xx.o | 13 | obj-$(CONFIG_SND_S3C_DMA) += snd-soc-s3c-dma.o |
14 | obj-$(CONFIG_SND_S3C_DMA_LEGACY) += snd-soc-s3c-dma-legacy.o | ||
13 | obj-$(CONFIG_SND_S3C24XX_I2S) += snd-soc-s3c24xx-i2s.o | 15 | obj-$(CONFIG_SND_S3C24XX_I2S) += snd-soc-s3c24xx-i2s.o |
14 | obj-$(CONFIG_SND_SAMSUNG_AC97) += snd-soc-ac97.o | 16 | obj-$(CONFIG_SND_SAMSUNG_AC97) += snd-soc-ac97.o |
15 | obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o | 17 | obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o |
diff --git a/sound/soc/samsung/ac97.c b/sound/soc/samsung/ac97.c index 350ba23a9893..4a88e36c82ec 100644 --- a/sound/soc/samsung/ac97.c +++ b/sound/soc/samsung/ac97.c | |||
@@ -221,24 +221,6 @@ static struct snd_ac97_bus_ops s3c_ac97_ops = { | |||
221 | .reset = s3c_ac97_cold_reset, | 221 | .reset = s3c_ac97_cold_reset, |
222 | }; | 222 | }; |
223 | 223 | ||
224 | static int s3c_ac97_hw_params(struct snd_pcm_substream *substream, | ||
225 | struct snd_pcm_hw_params *params, | ||
226 | struct snd_soc_dai *dai) | ||
227 | { | ||
228 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
229 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | ||
230 | struct s3c_dma_params *dma_data; | ||
231 | |||
232 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
233 | dma_data = &s3c_ac97_pcm_out; | ||
234 | else | ||
235 | dma_data = &s3c_ac97_pcm_in; | ||
236 | |||
237 | snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data); | ||
238 | |||
239 | return 0; | ||
240 | } | ||
241 | |||
242 | static int s3c_ac97_trigger(struct snd_pcm_substream *substream, int cmd, | 224 | static int s3c_ac97_trigger(struct snd_pcm_substream *substream, int cmd, |
243 | struct snd_soc_dai *dai) | 225 | struct snd_soc_dai *dai) |
244 | { | 226 | { |
@@ -279,21 +261,6 @@ static int s3c_ac97_trigger(struct snd_pcm_substream *substream, int cmd, | |||
279 | return 0; | 261 | return 0; |
280 | } | 262 | } |
281 | 263 | ||
282 | static int s3c_ac97_hw_mic_params(struct snd_pcm_substream *substream, | ||
283 | struct snd_pcm_hw_params *params, | ||
284 | struct snd_soc_dai *dai) | ||
285 | { | ||
286 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
287 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | ||
288 | |||
289 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
290 | return -ENODEV; | ||
291 | else | ||
292 | snd_soc_dai_set_dma_data(cpu_dai, substream, &s3c_ac97_mic_in); | ||
293 | |||
294 | return 0; | ||
295 | } | ||
296 | |||
297 | static int s3c_ac97_mic_trigger(struct snd_pcm_substream *substream, | 264 | static int s3c_ac97_mic_trigger(struct snd_pcm_substream *substream, |
298 | int cmd, struct snd_soc_dai *dai) | 265 | int cmd, struct snd_soc_dai *dai) |
299 | { | 266 | { |
@@ -329,15 +296,27 @@ static int s3c_ac97_mic_trigger(struct snd_pcm_substream *substream, | |||
329 | } | 296 | } |
330 | 297 | ||
331 | static const struct snd_soc_dai_ops s3c_ac97_dai_ops = { | 298 | static const struct snd_soc_dai_ops s3c_ac97_dai_ops = { |
332 | .hw_params = s3c_ac97_hw_params, | ||
333 | .trigger = s3c_ac97_trigger, | 299 | .trigger = s3c_ac97_trigger, |
334 | }; | 300 | }; |
335 | 301 | ||
336 | static const struct snd_soc_dai_ops s3c_ac97_mic_dai_ops = { | 302 | static const struct snd_soc_dai_ops s3c_ac97_mic_dai_ops = { |
337 | .hw_params = s3c_ac97_hw_mic_params, | ||
338 | .trigger = s3c_ac97_mic_trigger, | 303 | .trigger = s3c_ac97_mic_trigger, |
339 | }; | 304 | }; |
340 | 305 | ||
306 | static int s3c_ac97_dai_probe(struct snd_soc_dai *dai) | ||
307 | { | ||
308 | samsung_asoc_init_dma_data(dai, &s3c_ac97_pcm_out, &s3c_ac97_pcm_in); | ||
309 | |||
310 | return 0; | ||
311 | } | ||
312 | |||
313 | static int s3c_ac97_mic_dai_probe(struct snd_soc_dai *dai) | ||
314 | { | ||
315 | samsung_asoc_init_dma_data(dai, NULL, &s3c_ac97_mic_in); | ||
316 | |||
317 | return 0; | ||
318 | } | ||
319 | |||
341 | static struct snd_soc_dai_driver s3c_ac97_dai[] = { | 320 | static struct snd_soc_dai_driver s3c_ac97_dai[] = { |
342 | [S3C_AC97_DAI_PCM] = { | 321 | [S3C_AC97_DAI_PCM] = { |
343 | .name = "samsung-ac97", | 322 | .name = "samsung-ac97", |
@@ -354,6 +333,7 @@ static struct snd_soc_dai_driver s3c_ac97_dai[] = { | |||
354 | .channels_max = 2, | 333 | .channels_max = 2, |
355 | .rates = SNDRV_PCM_RATE_8000_48000, | 334 | .rates = SNDRV_PCM_RATE_8000_48000, |
356 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | 335 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, |
336 | .probe = s3c_ac97_dai_probe, | ||
357 | .ops = &s3c_ac97_dai_ops, | 337 | .ops = &s3c_ac97_dai_ops, |
358 | }, | 338 | }, |
359 | [S3C_AC97_DAI_MIC] = { | 339 | [S3C_AC97_DAI_MIC] = { |
@@ -365,6 +345,7 @@ static struct snd_soc_dai_driver s3c_ac97_dai[] = { | |||
365 | .channels_max = 1, | 345 | .channels_max = 1, |
366 | .rates = SNDRV_PCM_RATE_8000_48000, | 346 | .rates = SNDRV_PCM_RATE_8000_48000, |
367 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, | 347 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, |
348 | .probe = s3c_ac97_mic_dai_probe, | ||
368 | .ops = &s3c_ac97_mic_dai_ops, | 349 | .ops = &s3c_ac97_mic_dai_ops, |
369 | }, | 350 | }, |
370 | }; | 351 | }; |
diff --git a/sound/soc/samsung/dma.c b/sound/soc/samsung/dma.c index fe2748b494d4..dc09b71b7d9f 100644 --- a/sound/soc/samsung/dma.c +++ b/sound/soc/samsung/dma.c | |||
@@ -35,12 +35,6 @@ static const struct snd_pcm_hardware dma_hardware = { | |||
35 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 35 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
36 | SNDRV_PCM_INFO_MMAP | | 36 | SNDRV_PCM_INFO_MMAP | |
37 | SNDRV_PCM_INFO_MMAP_VALID, | 37 | SNDRV_PCM_INFO_MMAP_VALID, |
38 | .formats = SNDRV_PCM_FMTBIT_S16_LE | | ||
39 | SNDRV_PCM_FMTBIT_U16_LE | | ||
40 | SNDRV_PCM_FMTBIT_U8 | | ||
41 | SNDRV_PCM_FMTBIT_S8, | ||
42 | .channels_min = 2, | ||
43 | .channels_max = 2, | ||
44 | .buffer_bytes_max = 128*1024, | 38 | .buffer_bytes_max = 128*1024, |
45 | .period_bytes_min = PAGE_SIZE, | 39 | .period_bytes_min = PAGE_SIZE, |
46 | .period_bytes_max = PAGE_SIZE*2, | 40 | .period_bytes_max = PAGE_SIZE*2, |
@@ -441,6 +435,14 @@ static struct snd_soc_platform_driver samsung_asoc_platform = { | |||
441 | .pcm_free = dma_free_dma_buffers, | 435 | .pcm_free = dma_free_dma_buffers, |
442 | }; | 436 | }; |
443 | 437 | ||
438 | void samsung_asoc_init_dma_data(struct snd_soc_dai *dai, | ||
439 | struct s3c_dma_params *playback, | ||
440 | struct s3c_dma_params *capture) | ||
441 | { | ||
442 | snd_soc_dai_init_dma_data(dai, playback, capture); | ||
443 | } | ||
444 | EXPORT_SYMBOL_GPL(samsung_asoc_init_dma_data); | ||
445 | |||
444 | int samsung_asoc_dma_platform_register(struct device *dev) | 446 | int samsung_asoc_dma_platform_register(struct device *dev) |
445 | { | 447 | { |
446 | return snd_soc_register_platform(dev, &samsung_asoc_platform); | 448 | return snd_soc_register_platform(dev, &samsung_asoc_platform); |
diff --git a/sound/soc/samsung/dma.h b/sound/soc/samsung/dma.h index 0e86315a3eaf..225e5378014e 100644 --- a/sound/soc/samsung/dma.h +++ b/sound/soc/samsung/dma.h | |||
@@ -12,6 +12,8 @@ | |||
12 | #ifndef _S3C_AUDIO_H | 12 | #ifndef _S3C_AUDIO_H |
13 | #define _S3C_AUDIO_H | 13 | #define _S3C_AUDIO_H |
14 | 14 | ||
15 | #include <sound/dmaengine_pcm.h> | ||
16 | |||
15 | struct s3c_dma_params { | 17 | struct s3c_dma_params { |
16 | struct s3c2410_dma_client *client; /* stream identifier */ | 18 | struct s3c2410_dma_client *client; /* stream identifier */ |
17 | int channel; /* Channel ID */ | 19 | int channel; /* Channel ID */ |
@@ -20,8 +22,12 @@ struct s3c_dma_params { | |||
20 | unsigned ch; | 22 | unsigned ch; |
21 | struct samsung_dma_ops *ops; | 23 | struct samsung_dma_ops *ops; |
22 | char *ch_name; | 24 | char *ch_name; |
25 | struct snd_dmaengine_dai_dma_data dma_data; | ||
23 | }; | 26 | }; |
24 | 27 | ||
28 | void samsung_asoc_init_dma_data(struct snd_soc_dai *dai, | ||
29 | struct s3c_dma_params *playback, | ||
30 | struct s3c_dma_params *capture); | ||
25 | int samsung_asoc_dma_platform_register(struct device *dev); | 31 | int samsung_asoc_dma_platform_register(struct device *dev); |
26 | void samsung_asoc_dma_platform_unregister(struct device *dev); | 32 | void samsung_asoc_dma_platform_unregister(struct device *dev); |
27 | 33 | ||
diff --git a/sound/soc/samsung/dmaengine.c b/sound/soc/samsung/dmaengine.c new file mode 100644 index 000000000000..750ce5808d9f --- /dev/null +++ b/sound/soc/samsung/dmaengine.c | |||
@@ -0,0 +1,83 @@ | |||
1 | /* | ||
2 | * dmaengine.c - Samsung dmaengine wrapper | ||
3 | * | ||
4 | * Author: Mark Brown <broonie@linaro.org> | ||
5 | * Copyright 2013 Linaro | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * version 2 as published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but | ||
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
14 | * General Public License for more details. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #include <linux/module.h> | ||
19 | #include <linux/amba/pl08x.h> | ||
20 | |||
21 | #include <sound/core.h> | ||
22 | #include <sound/pcm.h> | ||
23 | #include <sound/pcm_params.h> | ||
24 | #include <sound/dmaengine_pcm.h> | ||
25 | #include <sound/soc.h> | ||
26 | #include <sound/soc-dai.h> | ||
27 | |||
28 | #include "dma.h" | ||
29 | |||
30 | #ifdef CONFIG_ARCH_S3C64XX | ||
31 | #define filter_fn pl08x_filter_id | ||
32 | #else | ||
33 | #define filter_fn NULL | ||
34 | #endif | ||
35 | |||
36 | static const struct snd_dmaengine_pcm_config samsung_dmaengine_pcm_config = { | ||
37 | .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, | ||
38 | .compat_filter_fn = filter_fn, | ||
39 | }; | ||
40 | |||
41 | void samsung_asoc_init_dma_data(struct snd_soc_dai *dai, | ||
42 | struct s3c_dma_params *playback, | ||
43 | struct s3c_dma_params *capture) | ||
44 | { | ||
45 | struct snd_dmaengine_dai_dma_data *playback_data = NULL; | ||
46 | struct snd_dmaengine_dai_dma_data *capture_data = NULL; | ||
47 | |||
48 | if (playback) { | ||
49 | playback_data = &playback->dma_data; | ||
50 | playback_data->filter_data = (void *)playback->channel; | ||
51 | playback_data->chan_name = playback->ch_name; | ||
52 | playback_data->addr = playback->dma_addr; | ||
53 | playback_data->addr_width = playback->dma_size; | ||
54 | } | ||
55 | if (capture) { | ||
56 | capture_data = &capture->dma_data; | ||
57 | capture_data->filter_data = (void *)capture->channel; | ||
58 | capture_data->chan_name = capture->ch_name; | ||
59 | capture_data->addr = capture->dma_addr; | ||
60 | capture_data->addr_width = capture->dma_size; | ||
61 | } | ||
62 | |||
63 | snd_soc_dai_init_dma_data(dai, playback_data, capture_data); | ||
64 | } | ||
65 | EXPORT_SYMBOL_GPL(samsung_asoc_init_dma_data); | ||
66 | |||
67 | int samsung_asoc_dma_platform_register(struct device *dev) | ||
68 | { | ||
69 | return snd_dmaengine_pcm_register(dev, &samsung_dmaengine_pcm_config, | ||
70 | SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME | | ||
71 | SND_DMAENGINE_PCM_FLAG_COMPAT); | ||
72 | } | ||
73 | EXPORT_SYMBOL_GPL(samsung_asoc_dma_platform_register); | ||
74 | |||
75 | void samsung_asoc_dma_platform_unregister(struct device *dev) | ||
76 | { | ||
77 | return snd_dmaengine_pcm_unregister(dev); | ||
78 | } | ||
79 | EXPORT_SYMBOL_GPL(samsung_asoc_dma_platform_unregister); | ||
80 | |||
81 | MODULE_AUTHOR("Mark Brown <broonie@linaro.org>"); | ||
82 | MODULE_DESCRIPTION("Samsung dmaengine ASoC driver"); | ||
83 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c index a5cbdb4f1655..92f64363427d 100644 --- a/sound/soc/samsung/i2s.c +++ b/sound/soc/samsung/i2s.c | |||
@@ -702,6 +702,8 @@ static int i2s_hw_params(struct snd_pcm_substream *substream, | |||
702 | } | 702 | } |
703 | writel(mod, i2s->addr + I2SMOD); | 703 | writel(mod, i2s->addr + I2SMOD); |
704 | 704 | ||
705 | samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); | ||
706 | |||
705 | i2s->frmclk = params_rate(params); | 707 | i2s->frmclk = params_rate(params); |
706 | 708 | ||
707 | return 0; | 709 | return 0; |
@@ -946,8 +948,11 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) | |||
946 | struct i2s_dai *i2s = to_info(dai); | 948 | struct i2s_dai *i2s = to_info(dai); |
947 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; | 949 | struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; |
948 | 950 | ||
949 | if (other && other->clk) /* If this is probe on secondary */ | 951 | if (other && other->clk) { /* If this is probe on secondary */ |
952 | samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback, | ||
953 | NULL); | ||
950 | goto probe_exit; | 954 | goto probe_exit; |
955 | } | ||
951 | 956 | ||
952 | i2s->addr = ioremap(i2s->base, 0x100); | 957 | i2s->addr = ioremap(i2s->base, 0x100); |
953 | if (i2s->addr == NULL) { | 958 | if (i2s->addr == NULL) { |
@@ -963,7 +968,7 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) | |||
963 | } | 968 | } |
964 | clk_prepare_enable(i2s->clk); | 969 | clk_prepare_enable(i2s->clk); |
965 | 970 | ||
966 | snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); | 971 | samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); |
967 | 972 | ||
968 | if (other) { | 973 | if (other) { |
969 | other->addr = i2s->addr; | 974 | other->addr = i2s->addr; |
diff --git a/sound/soc/samsung/idma.c b/sound/soc/samsung/idma.c index e4f318fc2f82..3d5cf1530b6f 100644 --- a/sound/soc/samsung/idma.c +++ b/sound/soc/samsung/idma.c | |||
@@ -35,14 +35,6 @@ static const struct snd_pcm_hardware idma_hardware = { | |||
35 | SNDRV_PCM_INFO_MMAP_VALID | | 35 | SNDRV_PCM_INFO_MMAP_VALID | |
36 | SNDRV_PCM_INFO_PAUSE | | 36 | SNDRV_PCM_INFO_PAUSE | |
37 | SNDRV_PCM_INFO_RESUME, | 37 | SNDRV_PCM_INFO_RESUME, |
38 | .formats = SNDRV_PCM_FMTBIT_S16_LE | | ||
39 | SNDRV_PCM_FMTBIT_U16_LE | | ||
40 | SNDRV_PCM_FMTBIT_S24_LE | | ||
41 | SNDRV_PCM_FMTBIT_U24_LE | | ||
42 | SNDRV_PCM_FMTBIT_U8 | | ||
43 | SNDRV_PCM_FMTBIT_S8, | ||
44 | .channels_min = 2, | ||
45 | .channels_max = 2, | ||
46 | .buffer_bytes_max = MAX_IDMA_BUFFER, | 38 | .buffer_bytes_max = MAX_IDMA_BUFFER, |
47 | .period_bytes_min = 128, | 39 | .period_bytes_min = 128, |
48 | .period_bytes_max = MAX_IDMA_PERIOD, | 40 | .period_bytes_max = MAX_IDMA_PERIOD, |
diff --git a/sound/soc/samsung/pcm.c b/sound/soc/samsung/pcm.c index e54256fc4b2c..6a5e4bf6ac96 100644 --- a/sound/soc/samsung/pcm.c +++ b/sound/soc/samsung/pcm.c | |||
@@ -275,7 +275,6 @@ static int s3c_pcm_hw_params(struct snd_pcm_substream *substream, | |||
275 | { | 275 | { |
276 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 276 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
277 | struct s3c_pcm_info *pcm = snd_soc_dai_get_drvdata(rtd->cpu_dai); | 277 | struct s3c_pcm_info *pcm = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
278 | struct s3c_dma_params *dma_data; | ||
279 | void __iomem *regs = pcm->regs; | 278 | void __iomem *regs = pcm->regs; |
280 | struct clk *clk; | 279 | struct clk *clk; |
281 | int sclk_div, sync_div; | 280 | int sclk_div, sync_div; |
@@ -284,13 +283,6 @@ static int s3c_pcm_hw_params(struct snd_pcm_substream *substream, | |||
284 | 283 | ||
285 | dev_dbg(pcm->dev, "Entered %s\n", __func__); | 284 | dev_dbg(pcm->dev, "Entered %s\n", __func__); |
286 | 285 | ||
287 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
288 | dma_data = pcm->dma_playback; | ||
289 | else | ||
290 | dma_data = pcm->dma_capture; | ||
291 | |||
292 | snd_soc_dai_set_dma_data(rtd->cpu_dai, substream, dma_data); | ||
293 | |||
294 | /* Strictly check for sample size */ | 286 | /* Strictly check for sample size */ |
295 | switch (params_format(params)) { | 287 | switch (params_format(params)) { |
296 | case SNDRV_PCM_FORMAT_S16_LE: | 288 | case SNDRV_PCM_FORMAT_S16_LE: |
@@ -461,10 +453,20 @@ static const struct snd_soc_dai_ops s3c_pcm_dai_ops = { | |||
461 | .set_fmt = s3c_pcm_set_fmt, | 453 | .set_fmt = s3c_pcm_set_fmt, |
462 | }; | 454 | }; |
463 | 455 | ||
456 | static int s3c_pcm_dai_probe(struct snd_soc_dai *dai) | ||
457 | { | ||
458 | struct s3c_pcm_info *pcm = snd_soc_dai_get_drvdata(dai); | ||
459 | |||
460 | snd_soc_dai_init_dma_data(dai, pcm->dma_playback, pcm->dma_capture); | ||
461 | |||
462 | return 0; | ||
463 | } | ||
464 | |||
464 | #define S3C_PCM_RATES SNDRV_PCM_RATE_8000_96000 | 465 | #define S3C_PCM_RATES SNDRV_PCM_RATE_8000_96000 |
465 | 466 | ||
466 | #define S3C_PCM_DAI_DECLARE \ | 467 | #define S3C_PCM_DAI_DECLARE \ |
467 | .symmetric_rates = 1, \ | 468 | .symmetric_rates = 1, \ |
469 | .probe = s3c_pcm_dai_probe, \ | ||
468 | .ops = &s3c_pcm_dai_ops, \ | 470 | .ops = &s3c_pcm_dai_ops, \ |
469 | .playback = { \ | 471 | .playback = { \ |
470 | .channels_min = 2, \ | 472 | .channels_min = 2, \ |
diff --git a/sound/soc/samsung/regs-ac97.h b/sound/soc/samsung/regs-ac97.h index c3878f7acb83..a71be45bbffc 100644 --- a/sound/soc/samsung/regs-ac97.h +++ b/sound/soc/samsung/regs-ac97.h | |||
@@ -1,5 +1,4 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-ac97.h | 1 | /* |
2 | * | ||
3 | * Copyright (c) 2006 Simtec Electronics <linux@simtec.co.uk> | 2 | * Copyright (c) 2006 Simtec Electronics <linux@simtec.co.uk> |
4 | * http://www.simtec.co.uk/products/SWLINUX/ | 3 | * http://www.simtec.co.uk/products/SWLINUX/ |
5 | * | 4 | * |
@@ -10,8 +9,8 @@ | |||
10 | * S3C2440 AC97 Controller | 9 | * S3C2440 AC97 Controller |
11 | */ | 10 | */ |
12 | 11 | ||
13 | #ifndef __ASM_ARCH_REGS_AC97_H | 12 | #ifndef __SAMSUNG_REGS_AC97_H__ |
14 | #define __ASM_ARCH_REGS_AC97_H __FILE__ | 13 | #define __SAMSUNG_REGS_AC97_H__ |
15 | 14 | ||
16 | #define S3C_AC97_GLBCTRL (0x00) | 15 | #define S3C_AC97_GLBCTRL (0x00) |
17 | 16 | ||
@@ -64,4 +63,4 @@ | |||
64 | #define S3C_AC97_PCM_DATA (0x18) | 63 | #define S3C_AC97_PCM_DATA (0x18) |
65 | #define S3C_AC97_MIC_DATA (0x1C) | 64 | #define S3C_AC97_MIC_DATA (0x1C) |
66 | 65 | ||
67 | #endif /* __ASM_ARCH_REGS_AC97_H */ | 66 | #endif /* __SAMSUNG_REGS_AC97_H__ */ |
diff --git a/sound/soc/samsung/regs-iis.h b/sound/soc/samsung/regs-iis.h index a18d35e7a735..dc6cbbe9c4f0 100644 --- a/sound/soc/samsung/regs-iis.h +++ b/sound/soc/samsung/regs-iis.h | |||
@@ -1,5 +1,4 @@ | |||
1 | /* arch/arm/plat-samsung/include/plat/regs-iis.h | 1 | /* |
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> | 2 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> |
4 | * http://www.simtec.co.uk/products/SWLINUX/ | 3 | * http://www.simtec.co.uk/products/SWLINUX/ |
5 | * | 4 | * |
@@ -10,8 +9,8 @@ | |||
10 | * S3C2410 IIS register definition | 9 | * S3C2410 IIS register definition |
11 | */ | 10 | */ |
12 | 11 | ||
13 | #ifndef __ASM_ARCH_REGS_IIS_H | 12 | #ifndef __SAMSUNG_REGS_IIS_H__ |
14 | #define __ASM_ARCH_REGS_IIS_H | 13 | #define __SAMSUNG_REGS_IIS_H__ |
15 | 14 | ||
16 | #define S3C2410_IISCON (0x00) | 15 | #define S3C2410_IISCON (0x00) |
17 | 16 | ||
@@ -67,4 +66,4 @@ | |||
67 | 66 | ||
68 | #define S3C2410_IISFIFO (0x10) | 67 | #define S3C2410_IISFIFO (0x10) |
69 | 68 | ||
70 | #endif /* __ASM_ARCH_REGS_IIS_H */ | 69 | #endif /* __SAMSUNG_REGS_IIS_H__ */ |
diff --git a/sound/soc/sh/dma-sh7760.c b/sound/soc/sh/dma-sh7760.c index 1a8b03e4b41b..c85f8eb66c97 100644 --- a/sound/soc/sh/dma-sh7760.c +++ b/sound/soc/sh/dma-sh7760.c | |||
@@ -89,29 +89,12 @@ struct camelot_pcm { | |||
89 | #define DMABRG_PREALLOC_BUFFER 32 * 1024 | 89 | #define DMABRG_PREALLOC_BUFFER 32 * 1024 |
90 | #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024 | 90 | #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024 |
91 | 91 | ||
92 | /* support everything the SSI supports */ | ||
93 | #define DMABRG_RATES \ | ||
94 | SNDRV_PCM_RATE_8000_192000 | ||
95 | |||
96 | #define DMABRG_FMTS \ | ||
97 | (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \ | ||
98 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \ | ||
99 | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \ | ||
100 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \ | ||
101 | SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE) | ||
102 | |||
103 | static struct snd_pcm_hardware camelot_pcm_hardware = { | 92 | static struct snd_pcm_hardware camelot_pcm_hardware = { |
104 | .info = (SNDRV_PCM_INFO_MMAP | | 93 | .info = (SNDRV_PCM_INFO_MMAP | |
105 | SNDRV_PCM_INFO_INTERLEAVED | | 94 | SNDRV_PCM_INFO_INTERLEAVED | |
106 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 95 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
107 | SNDRV_PCM_INFO_MMAP_VALID | | 96 | SNDRV_PCM_INFO_MMAP_VALID | |
108 | SNDRV_PCM_INFO_BATCH), | 97 | SNDRV_PCM_INFO_BATCH), |
109 | .formats = DMABRG_FMTS, | ||
110 | .rates = DMABRG_RATES, | ||
111 | .rate_min = 8000, | ||
112 | .rate_max = 192000, | ||
113 | .channels_min = 2, | ||
114 | .channels_max = 8, /* max of the SSI */ | ||
115 | .buffer_bytes_max = DMABRG_PERIOD_MAX, | 98 | .buffer_bytes_max = DMABRG_PERIOD_MAX, |
116 | .period_bytes_min = DMABRG_PERIOD_MIN, | 99 | .period_bytes_min = DMABRG_PERIOD_MIN, |
117 | .period_bytes_max = DMABRG_PERIOD_MAX / 2, | 100 | .period_bytes_max = DMABRG_PERIOD_MAX / 2, |
diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c index b33ca7cd085b..1967f44e7cd4 100644 --- a/sound/soc/sh/fsi.c +++ b/sound/soc/sh/fsi.c | |||
@@ -232,9 +232,9 @@ struct fsi_stream { | |||
232 | * these are for DMAEngine | 232 | * these are for DMAEngine |
233 | */ | 233 | */ |
234 | struct dma_chan *chan; | 234 | struct dma_chan *chan; |
235 | struct sh_dmae_slave slave; /* see fsi_handler_init() */ | ||
236 | struct work_struct work; | 235 | struct work_struct work; |
237 | dma_addr_t dma; | 236 | dma_addr_t dma; |
237 | int dma_id; | ||
238 | int loop_cnt; | 238 | int loop_cnt; |
239 | int additional_pos; | 239 | int additional_pos; |
240 | }; | 240 | }; |
@@ -1410,15 +1410,6 @@ static void fsi_dma_do_work(struct work_struct *work) | |||
1410 | } | 1410 | } |
1411 | } | 1411 | } |
1412 | 1412 | ||
1413 | static bool fsi_dma_filter(struct dma_chan *chan, void *param) | ||
1414 | { | ||
1415 | struct sh_dmae_slave *slave = param; | ||
1416 | |||
1417 | chan->private = slave; | ||
1418 | |||
1419 | return true; | ||
1420 | } | ||
1421 | |||
1422 | static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io) | 1413 | static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io) |
1423 | { | 1414 | { |
1424 | schedule_work(&io->work); | 1415 | schedule_work(&io->work); |
@@ -1446,15 +1437,34 @@ static int fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io, | |||
1446 | static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev) | 1437 | static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev) |
1447 | { | 1438 | { |
1448 | dma_cap_mask_t mask; | 1439 | dma_cap_mask_t mask; |
1440 | int is_play = fsi_stream_is_play(fsi, io); | ||
1449 | 1441 | ||
1450 | dma_cap_zero(mask); | 1442 | dma_cap_zero(mask); |
1451 | dma_cap_set(DMA_SLAVE, mask); | 1443 | dma_cap_set(DMA_SLAVE, mask); |
1452 | 1444 | ||
1453 | io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave); | 1445 | io->chan = dma_request_slave_channel_compat(mask, |
1446 | shdma_chan_filter, (void *)io->dma_id, | ||
1447 | dev, is_play ? "tx" : "rx"); | ||
1448 | if (io->chan) { | ||
1449 | struct dma_slave_config cfg; | ||
1450 | int ret; | ||
1451 | |||
1452 | cfg.slave_id = io->dma_id; | ||
1453 | cfg.dst_addr = 0; /* use default addr */ | ||
1454 | cfg.src_addr = 0; /* use default addr */ | ||
1455 | cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; | ||
1456 | |||
1457 | ret = dmaengine_slave_config(io->chan, &cfg); | ||
1458 | if (ret < 0) { | ||
1459 | dma_release_channel(io->chan); | ||
1460 | io->chan = NULL; | ||
1461 | } | ||
1462 | } | ||
1463 | |||
1454 | if (!io->chan) { | 1464 | if (!io->chan) { |
1455 | 1465 | ||
1456 | /* switch to PIO handler */ | 1466 | /* switch to PIO handler */ |
1457 | if (fsi_stream_is_play(fsi, io)) | 1467 | if (is_play) |
1458 | fsi->playback.handler = &fsi_pio_push_handler; | 1468 | fsi->playback.handler = &fsi_pio_push_handler; |
1459 | else | 1469 | else |
1460 | fsi->capture.handler = &fsi_pio_pop_handler; | 1470 | fsi->capture.handler = &fsi_pio_pop_handler; |
@@ -1777,12 +1787,6 @@ static struct snd_pcm_hardware fsi_pcm_hardware = { | |||
1777 | SNDRV_PCM_INFO_MMAP | | 1787 | SNDRV_PCM_INFO_MMAP | |
1778 | SNDRV_PCM_INFO_MMAP_VALID | | 1788 | SNDRV_PCM_INFO_MMAP_VALID | |
1779 | SNDRV_PCM_INFO_PAUSE, | 1789 | SNDRV_PCM_INFO_PAUSE, |
1780 | .formats = FSI_FMTS, | ||
1781 | .rates = FSI_RATES, | ||
1782 | .rate_min = 8000, | ||
1783 | .rate_max = 192000, | ||
1784 | .channels_min = 2, | ||
1785 | .channels_max = 2, | ||
1786 | .buffer_bytes_max = 64 * 1024, | 1790 | .buffer_bytes_max = 64 * 1024, |
1787 | .period_bytes_min = 32, | 1791 | .period_bytes_min = 32, |
1788 | .period_bytes_max = 8192, | 1792 | .period_bytes_max = 8192, |
@@ -1960,7 +1964,7 @@ static void fsi_handler_init(struct fsi_priv *fsi, | |||
1960 | fsi->capture.priv = fsi; | 1964 | fsi->capture.priv = fsi; |
1961 | 1965 | ||
1962 | if (info->tx_id) { | 1966 | if (info->tx_id) { |
1963 | fsi->playback.slave.shdma_slave.slave_id = info->tx_id; | 1967 | fsi->playback.dma_id = info->tx_id; |
1964 | fsi->playback.handler = &fsi_dma_push_handler; | 1968 | fsi->playback.handler = &fsi_dma_push_handler; |
1965 | } | 1969 | } |
1966 | } | 1970 | } |
diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c index 9430097979a5..a53235c4d1b0 100644 --- a/sound/soc/sh/rcar/adg.c +++ b/sound/soc/sh/rcar/adg.c | |||
@@ -19,8 +19,8 @@ | |||
19 | struct rsnd_adg { | 19 | struct rsnd_adg { |
20 | struct clk *clk[CLKMAX]; | 20 | struct clk *clk[CLKMAX]; |
21 | 21 | ||
22 | int rate_of_441khz_div_6; | 22 | int rbga_rate_for_441khz_div_6; /* RBGA */ |
23 | int rate_of_48khz_div_6; | 23 | int rbgb_rate_for_48khz_div_6; /* RBGB */ |
24 | u32 ckr; | 24 | u32 ckr; |
25 | }; | 25 | }; |
26 | 26 | ||
@@ -30,41 +30,114 @@ struct rsnd_adg { | |||
30 | i++, (pos) = adg->clk[i]) | 30 | i++, (pos) = adg->clk[i]) |
31 | #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg) | 31 | #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg) |
32 | 32 | ||
33 | static enum rsnd_reg rsnd_adg_ssi_reg_get(int id) | 33 | static int rsnd_adg_set_convert_clk_gen1(struct rsnd_priv *priv, |
34 | struct rsnd_mod *mod, | ||
35 | unsigned int src_rate, | ||
36 | unsigned int dst_rate) | ||
34 | { | 37 | { |
35 | enum rsnd_reg reg; | 38 | struct rsnd_adg *adg = rsnd_priv_to_adg(priv); |
39 | struct device *dev = rsnd_priv_to_dev(priv); | ||
40 | int idx, sel, div, shift; | ||
41 | u32 mask, val; | ||
42 | int id = rsnd_mod_id(mod); | ||
43 | unsigned int sel_rate [] = { | ||
44 | clk_get_rate(adg->clk[CLKA]), /* 000: CLKA */ | ||
45 | clk_get_rate(adg->clk[CLKB]), /* 001: CLKB */ | ||
46 | clk_get_rate(adg->clk[CLKC]), /* 010: CLKC */ | ||
47 | 0, /* 011: MLBCLK (not used) */ | ||
48 | adg->rbga_rate_for_441khz_div_6,/* 100: RBGA */ | ||
49 | adg->rbgb_rate_for_48khz_div_6, /* 101: RBGB */ | ||
50 | }; | ||
51 | |||
52 | /* find div (= 1/128, 1/256, 1/512, 1/1024, 1/2048 */ | ||
53 | for (sel = 0; sel < ARRAY_SIZE(sel_rate); sel++) { | ||
54 | for (div = 128, idx = 0; | ||
55 | div <= 2048; | ||
56 | div *= 2, idx++) { | ||
57 | if (src_rate == sel_rate[sel] / div) { | ||
58 | val = (idx << 4) | sel; | ||
59 | goto find_rate; | ||
60 | } | ||
61 | } | ||
62 | } | ||
63 | dev_err(dev, "can't find convert src clk\n"); | ||
64 | return -EINVAL; | ||
65 | |||
66 | find_rate: | ||
67 | shift = (id % 4) * 8; | ||
68 | mask = 0xFF << shift; | ||
69 | val = val << shift; | ||
70 | |||
71 | dev_dbg(dev, "adg convert src clk = %02x\n", val); | ||
72 | |||
73 | switch (id / 4) { | ||
74 | case 0: | ||
75 | rsnd_mod_bset(mod, AUDIO_CLK_SEL3, mask, val); | ||
76 | break; | ||
77 | case 1: | ||
78 | rsnd_mod_bset(mod, AUDIO_CLK_SEL4, mask, val); | ||
79 | break; | ||
80 | case 2: | ||
81 | rsnd_mod_bset(mod, AUDIO_CLK_SEL5, mask, val); | ||
82 | break; | ||
83 | } | ||
84 | |||
85 | /* | ||
86 | * Gen1 doesn't need dst_rate settings, | ||
87 | * since it uses SSI WS pin. | ||
88 | * see also rsnd_src_set_route_if_gen1() | ||
89 | */ | ||
90 | |||
91 | return 0; | ||
92 | } | ||
93 | |||
94 | int rsnd_adg_set_convert_clk(struct rsnd_priv *priv, | ||
95 | struct rsnd_mod *mod, | ||
96 | unsigned int src_rate, | ||
97 | unsigned int dst_rate) | ||
98 | { | ||
99 | if (rsnd_is_gen1(priv)) | ||
100 | return rsnd_adg_set_convert_clk_gen1(priv, mod, | ||
101 | src_rate, dst_rate); | ||
102 | |||
103 | return -EINVAL; | ||
104 | } | ||
105 | |||
106 | static void rsnd_adg_set_ssi_clk(struct rsnd_mod *mod, u32 val) | ||
107 | { | ||
108 | int id = rsnd_mod_id(mod); | ||
109 | int shift = (id % 4) * 8; | ||
110 | u32 mask = 0xFF << shift; | ||
111 | |||
112 | val = val << shift; | ||
36 | 113 | ||
37 | /* | 114 | /* |
38 | * SSI 8 is not connected to ADG. | 115 | * SSI 8 is not connected to ADG. |
39 | * it works with SSI 7 | 116 | * it works with SSI 7 |
40 | */ | 117 | */ |
41 | if (id == 8) | 118 | if (id == 8) |
42 | return RSND_REG_MAX; | 119 | return; |
43 | 120 | ||
44 | if (0 <= id && id <= 3) | 121 | switch (id / 4) { |
45 | reg = RSND_REG_AUDIO_CLK_SEL0; | 122 | case 0: |
46 | else if (4 <= id && id <= 7) | 123 | rsnd_mod_bset(mod, AUDIO_CLK_SEL0, mask, val); |
47 | reg = RSND_REG_AUDIO_CLK_SEL1; | 124 | break; |
48 | else | 125 | case 1: |
49 | reg = RSND_REG_AUDIO_CLK_SEL2; | 126 | rsnd_mod_bset(mod, AUDIO_CLK_SEL1, mask, val); |
50 | 127 | break; | |
51 | return reg; | 128 | case 2: |
129 | rsnd_mod_bset(mod, AUDIO_CLK_SEL2, mask, val); | ||
130 | break; | ||
131 | } | ||
52 | } | 132 | } |
53 | 133 | ||
54 | int rsnd_adg_ssi_clk_stop(struct rsnd_mod *mod) | 134 | int rsnd_adg_ssi_clk_stop(struct rsnd_mod *mod) |
55 | { | 135 | { |
56 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | ||
57 | enum rsnd_reg reg; | ||
58 | int id; | ||
59 | |||
60 | /* | 136 | /* |
61 | * "mod" = "ssi" here. | 137 | * "mod" = "ssi" here. |
62 | * we can get "ssi id" from mod | 138 | * we can get "ssi id" from mod |
63 | */ | 139 | */ |
64 | id = rsnd_mod_id(mod); | 140 | rsnd_adg_set_ssi_clk(mod, 0); |
65 | reg = rsnd_adg_ssi_reg_get(id); | ||
66 | |||
67 | rsnd_write(priv, mod, reg, 0); | ||
68 | 141 | ||
69 | return 0; | 142 | return 0; |
70 | } | 143 | } |
@@ -75,8 +148,7 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate) | |||
75 | struct rsnd_adg *adg = rsnd_priv_to_adg(priv); | 148 | struct rsnd_adg *adg = rsnd_priv_to_adg(priv); |
76 | struct device *dev = rsnd_priv_to_dev(priv); | 149 | struct device *dev = rsnd_priv_to_dev(priv); |
77 | struct clk *clk; | 150 | struct clk *clk; |
78 | enum rsnd_reg reg; | 151 | int i; |
79 | int id, shift, i; | ||
80 | u32 data; | 152 | u32 data; |
81 | int sel_table[] = { | 153 | int sel_table[] = { |
82 | [CLKA] = 0x1, | 154 | [CLKA] = 0x1, |
@@ -102,12 +174,12 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate) | |||
102 | /* | 174 | /* |
103 | * find 1/6 clock from BRGA/BRGB | 175 | * find 1/6 clock from BRGA/BRGB |
104 | */ | 176 | */ |
105 | if (rate == adg->rate_of_441khz_div_6) { | 177 | if (rate == adg->rbga_rate_for_441khz_div_6) { |
106 | data = 0x10; | 178 | data = 0x10; |
107 | goto found_clock; | 179 | goto found_clock; |
108 | } | 180 | } |
109 | 181 | ||
110 | if (rate == adg->rate_of_48khz_div_6) { | 182 | if (rate == adg->rbgb_rate_for_48khz_div_6) { |
111 | data = 0x20; | 183 | data = 0x20; |
112 | goto found_clock; | 184 | goto found_clock; |
113 | } | 185 | } |
@@ -125,19 +197,10 @@ found_clock: | |||
125 | * This "mod" = "ssi" here. | 197 | * This "mod" = "ssi" here. |
126 | * we can get "ssi id" from mod | 198 | * we can get "ssi id" from mod |
127 | */ | 199 | */ |
128 | id = rsnd_mod_id(mod); | 200 | rsnd_adg_set_ssi_clk(mod, data); |
129 | reg = rsnd_adg_ssi_reg_get(id); | ||
130 | |||
131 | dev_dbg(dev, "ADG: ssi%d selects clk%d = %d", id, i, rate); | ||
132 | |||
133 | /* | ||
134 | * Enable SSIx clock | ||
135 | */ | ||
136 | shift = (id % 4) * 8; | ||
137 | 201 | ||
138 | rsnd_bset(priv, mod, reg, | 202 | dev_dbg(dev, "ADG: ssi%d selects clk%d = %d", |
139 | 0xFF << shift, | 203 | rsnd_mod_id(mod), i, rate); |
140 | data << shift); | ||
141 | 204 | ||
142 | return 0; | 205 | return 0; |
143 | } | 206 | } |
@@ -166,8 +229,8 @@ static void rsnd_adg_ssi_clk_init(struct rsnd_priv *priv, struct rsnd_adg *adg) | |||
166 | * rsnd_adg_ssi_clk_try_start() | 229 | * rsnd_adg_ssi_clk_try_start() |
167 | */ | 230 | */ |
168 | ckr = 0; | 231 | ckr = 0; |
169 | adg->rate_of_441khz_div_6 = 0; | 232 | adg->rbga_rate_for_441khz_div_6 = 0; |
170 | adg->rate_of_48khz_div_6 = 0; | 233 | adg->rbgb_rate_for_48khz_div_6 = 0; |
171 | for_each_rsnd_clk(clk, adg, i) { | 234 | for_each_rsnd_clk(clk, adg, i) { |
172 | rate = clk_get_rate(clk); | 235 | rate = clk_get_rate(clk); |
173 | 236 | ||
@@ -175,14 +238,14 @@ static void rsnd_adg_ssi_clk_init(struct rsnd_priv *priv, struct rsnd_adg *adg) | |||
175 | continue; | 238 | continue; |
176 | 239 | ||
177 | /* RBGA */ | 240 | /* RBGA */ |
178 | if (!adg->rate_of_441khz_div_6 && (0 == rate % 44100)) { | 241 | if (!adg->rbga_rate_for_441khz_div_6 && (0 == rate % 44100)) { |
179 | adg->rate_of_441khz_div_6 = rate / 6; | 242 | adg->rbga_rate_for_441khz_div_6 = rate / 6; |
180 | ckr |= brg_table[i] << 20; | 243 | ckr |= brg_table[i] << 20; |
181 | } | 244 | } |
182 | 245 | ||
183 | /* RBGB */ | 246 | /* RBGB */ |
184 | if (!adg->rate_of_48khz_div_6 && (0 == rate % 48000)) { | 247 | if (!adg->rbgb_rate_for_48khz_div_6 && (0 == rate % 48000)) { |
185 | adg->rate_of_48khz_div_6 = rate / 6; | 248 | adg->rbgb_rate_for_48khz_div_6 = rate / 6; |
186 | ckr |= brg_table[i] << 16; | 249 | ckr |= brg_table[i] << 16; |
187 | } | 250 | } |
188 | } | 251 | } |
diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c index b3653d37f75f..743de5e3b1e1 100644 --- a/sound/soc/sh/rcar/core.c +++ b/sound/soc/sh/rcar/core.c | |||
@@ -628,12 +628,6 @@ static struct snd_pcm_hardware rsnd_pcm_hardware = { | |||
628 | SNDRV_PCM_INFO_MMAP | | 628 | SNDRV_PCM_INFO_MMAP | |
629 | SNDRV_PCM_INFO_MMAP_VALID | | 629 | SNDRV_PCM_INFO_MMAP_VALID | |
630 | SNDRV_PCM_INFO_PAUSE, | 630 | SNDRV_PCM_INFO_PAUSE, |
631 | .formats = RSND_FMTS, | ||
632 | .rates = RSND_RATES, | ||
633 | .rate_min = 8000, | ||
634 | .rate_max = 192000, | ||
635 | .channels_min = 2, | ||
636 | .channels_max = 2, | ||
637 | .buffer_bytes_max = 64 * 1024, | 631 | .buffer_bytes_max = 64 * 1024, |
638 | .period_bytes_min = 32, | 632 | .period_bytes_min = 32, |
639 | .period_bytes_max = 8192, | 633 | .period_bytes_max = 8192, |
diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c index 61212ee97c28..add088bd4b2a 100644 --- a/sound/soc/sh/rcar/gen.c +++ b/sound/soc/sh/rcar/gen.c | |||
@@ -10,20 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | #include "rsnd.h" | 11 | #include "rsnd.h" |
12 | 12 | ||
13 | struct rsnd_gen_ops { | ||
14 | int (*probe)(struct platform_device *pdev, | ||
15 | struct rcar_snd_info *info, | ||
16 | struct rsnd_priv *priv); | ||
17 | void (*remove)(struct platform_device *pdev, | ||
18 | struct rsnd_priv *priv); | ||
19 | int (*path_init)(struct rsnd_priv *priv, | ||
20 | struct rsnd_dai *rdai, | ||
21 | struct rsnd_dai_stream *io); | ||
22 | int (*path_exit)(struct rsnd_priv *priv, | ||
23 | struct rsnd_dai *rdai, | ||
24 | struct rsnd_dai_stream *io); | ||
25 | }; | ||
26 | |||
27 | struct rsnd_gen { | 13 | struct rsnd_gen { |
28 | void __iomem *base[RSND_BASE_MAX]; | 14 | void __iomem *base[RSND_BASE_MAX]; |
29 | 15 | ||
@@ -86,12 +72,28 @@ static struct regmap_bus rsnd_regmap_bus = { | |||
86 | .val_format_endian_default = REGMAP_ENDIAN_NATIVE, | 72 | .val_format_endian_default = REGMAP_ENDIAN_NATIVE, |
87 | }; | 73 | }; |
88 | 74 | ||
75 | static int rsnd_is_accessible_reg(struct rsnd_priv *priv, | ||
76 | struct rsnd_gen *gen, enum rsnd_reg reg) | ||
77 | { | ||
78 | if (!gen->regs[reg]) { | ||
79 | struct device *dev = rsnd_priv_to_dev(priv); | ||
80 | |||
81 | dev_err(dev, "unsupported register access %x\n", reg); | ||
82 | return 0; | ||
83 | } | ||
84 | |||
85 | return 1; | ||
86 | } | ||
87 | |||
89 | u32 rsnd_read(struct rsnd_priv *priv, | 88 | u32 rsnd_read(struct rsnd_priv *priv, |
90 | struct rsnd_mod *mod, enum rsnd_reg reg) | 89 | struct rsnd_mod *mod, enum rsnd_reg reg) |
91 | { | 90 | { |
92 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | 91 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); |
93 | u32 val; | 92 | u32 val; |
94 | 93 | ||
94 | if (!rsnd_is_accessible_reg(priv, gen, reg)) | ||
95 | return 0; | ||
96 | |||
95 | regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val); | 97 | regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val); |
96 | 98 | ||
97 | return val; | 99 | return val; |
@@ -103,6 +105,9 @@ void rsnd_write(struct rsnd_priv *priv, | |||
103 | { | 105 | { |
104 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | 106 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); |
105 | 107 | ||
108 | if (!rsnd_is_accessible_reg(priv, gen, reg)) | ||
109 | return; | ||
110 | |||
106 | regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data); | 111 | regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data); |
107 | } | 112 | } |
108 | 113 | ||
@@ -111,21 +116,48 @@ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, | |||
111 | { | 116 | { |
112 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | 117 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); |
113 | 118 | ||
119 | if (!rsnd_is_accessible_reg(priv, gen, reg)) | ||
120 | return; | ||
121 | |||
114 | regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod), | 122 | regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod), |
115 | mask, data); | 123 | mask, data); |
116 | } | 124 | } |
117 | 125 | ||
118 | /* | 126 | static int rsnd_gen_regmap_init(struct rsnd_priv *priv, |
119 | * Gen2 | 127 | struct rsnd_gen *gen, |
120 | * will be filled in the future | 128 | struct reg_field *regf) |
121 | */ | 129 | { |
130 | int i; | ||
131 | struct device *dev = rsnd_priv_to_dev(priv); | ||
132 | struct regmap_config regc; | ||
122 | 133 | ||
123 | /* | 134 | memset(®c, 0, sizeof(regc)); |
124 | * Gen1 | 135 | regc.reg_bits = 32; |
125 | */ | 136 | regc.val_bits = 32; |
126 | static int rsnd_gen1_path_init(struct rsnd_priv *priv, | 137 | |
127 | struct rsnd_dai *rdai, | 138 | gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, ®c); |
128 | struct rsnd_dai_stream *io) | 139 | if (IS_ERR(gen->regmap)) { |
140 | dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap)); | ||
141 | return PTR_ERR(gen->regmap); | ||
142 | } | ||
143 | |||
144 | for (i = 0; i < RSND_REG_MAX; i++) { | ||
145 | gen->regs[i] = NULL; | ||
146 | if (!regf[i].reg) | ||
147 | continue; | ||
148 | |||
149 | gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]); | ||
150 | if (IS_ERR(gen->regs[i])) | ||
151 | return PTR_ERR(gen->regs[i]); | ||
152 | |||
153 | } | ||
154 | |||
155 | return 0; | ||
156 | } | ||
157 | |||
158 | int rsnd_gen_path_init(struct rsnd_priv *priv, | ||
159 | struct rsnd_dai *rdai, | ||
160 | struct rsnd_dai_stream *io) | ||
129 | { | 161 | { |
130 | struct rsnd_mod *mod; | 162 | struct rsnd_mod *mod; |
131 | int ret; | 163 | int ret; |
@@ -163,9 +195,9 @@ static int rsnd_gen1_path_init(struct rsnd_priv *priv, | |||
163 | return ret; | 195 | return ret; |
164 | } | 196 | } |
165 | 197 | ||
166 | static int rsnd_gen1_path_exit(struct rsnd_priv *priv, | 198 | int rsnd_gen_path_exit(struct rsnd_priv *priv, |
167 | struct rsnd_dai *rdai, | 199 | struct rsnd_dai *rdai, |
168 | struct rsnd_dai_stream *io) | 200 | struct rsnd_dai_stream *io) |
169 | { | 201 | { |
170 | struct rsnd_mod *mod, *n; | 202 | struct rsnd_mod *mod, *n; |
171 | int ret = 0; | 203 | int ret = 0; |
@@ -179,6 +211,94 @@ static int rsnd_gen1_path_exit(struct rsnd_priv *priv, | |||
179 | return ret; | 211 | return ret; |
180 | } | 212 | } |
181 | 213 | ||
214 | /* | ||
215 | * Gen2 | ||
216 | */ | ||
217 | |||
218 | /* single address mapping */ | ||
219 | #define RSND_GEN2_S_REG(gen, reg, id, offset) \ | ||
220 | RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, 0, 10) | ||
221 | |||
222 | /* multi address mapping */ | ||
223 | #define RSND_GEN2_M_REG(gen, reg, id, offset, _id_offset) \ | ||
224 | RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, _id_offset, 10) | ||
225 | |||
226 | static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen) | ||
227 | { | ||
228 | struct reg_field regf[RSND_REG_MAX] = { | ||
229 | RSND_GEN2_S_REG(gen, SSIU, SSI_MODE0, 0x800), | ||
230 | RSND_GEN2_S_REG(gen, SSIU, SSI_MODE1, 0x804), | ||
231 | /* FIXME: it needs SSI_MODE2/3 in the future */ | ||
232 | RSND_GEN2_M_REG(gen, SSIU, INT_ENABLE, 0x18, 0x80), | ||
233 | |||
234 | RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00), | ||
235 | RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04), | ||
236 | RSND_GEN2_S_REG(gen, ADG, SSICKR, 0x08), | ||
237 | RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c), | ||
238 | RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10), | ||
239 | RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL2, 0x14), | ||
240 | |||
241 | RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40), | ||
242 | RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40), | ||
243 | RSND_GEN2_M_REG(gen, SSI, SSITDR, 0x08, 0x40), | ||
244 | RSND_GEN2_M_REG(gen, SSI, SSIRDR, 0x0c, 0x40), | ||
245 | RSND_GEN2_M_REG(gen, SSI, SSIWSR, 0x20, 0x40), | ||
246 | }; | ||
247 | |||
248 | return rsnd_gen_regmap_init(priv, gen, regf); | ||
249 | } | ||
250 | |||
251 | static int rsnd_gen2_probe(struct platform_device *pdev, | ||
252 | struct rcar_snd_info *info, | ||
253 | struct rsnd_priv *priv) | ||
254 | { | ||
255 | struct device *dev = rsnd_priv_to_dev(priv); | ||
256 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | ||
257 | struct resource *scu_res; | ||
258 | struct resource *adg_res; | ||
259 | struct resource *ssiu_res; | ||
260 | struct resource *ssi_res; | ||
261 | int ret; | ||
262 | |||
263 | /* | ||
264 | * map address | ||
265 | */ | ||
266 | scu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SCU); | ||
267 | adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_ADG); | ||
268 | ssiu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSIU); | ||
269 | ssi_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSI); | ||
270 | |||
271 | gen->base[RSND_GEN2_SCU] = devm_ioremap_resource(dev, scu_res); | ||
272 | gen->base[RSND_GEN2_ADG] = devm_ioremap_resource(dev, adg_res); | ||
273 | gen->base[RSND_GEN2_SSIU] = devm_ioremap_resource(dev, ssiu_res); | ||
274 | gen->base[RSND_GEN2_SSI] = devm_ioremap_resource(dev, ssi_res); | ||
275 | if (IS_ERR(gen->base[RSND_GEN2_SCU]) || | ||
276 | IS_ERR(gen->base[RSND_GEN2_ADG]) || | ||
277 | IS_ERR(gen->base[RSND_GEN2_SSIU]) || | ||
278 | IS_ERR(gen->base[RSND_GEN2_SSI])) | ||
279 | return -ENODEV; | ||
280 | |||
281 | ret = rsnd_gen2_regmap_init(priv, gen); | ||
282 | if (ret < 0) | ||
283 | return ret; | ||
284 | |||
285 | dev_dbg(dev, "Gen2 device probed\n"); | ||
286 | dev_dbg(dev, "SRU : %08x => %p\n", scu_res->start, | ||
287 | gen->base[RSND_GEN2_SCU]); | ||
288 | dev_dbg(dev, "ADG : %08x => %p\n", adg_res->start, | ||
289 | gen->base[RSND_GEN2_ADG]); | ||
290 | dev_dbg(dev, "SSIU : %08x => %p\n", ssiu_res->start, | ||
291 | gen->base[RSND_GEN2_SSIU]); | ||
292 | dev_dbg(dev, "SSI : %08x => %p\n", ssi_res->start, | ||
293 | gen->base[RSND_GEN2_SSI]); | ||
294 | |||
295 | return 0; | ||
296 | } | ||
297 | |||
298 | /* | ||
299 | * Gen1 | ||
300 | */ | ||
301 | |||
182 | /* single address mapping */ | 302 | /* single address mapping */ |
183 | #define RSND_GEN1_S_REG(gen, reg, id, offset) \ | 303 | #define RSND_GEN1_S_REG(gen, reg, id, offset) \ |
184 | RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, 0, 9) | 304 | RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, 0, 9) |
@@ -189,19 +309,23 @@ static int rsnd_gen1_path_exit(struct rsnd_priv *priv, | |||
189 | 309 | ||
190 | static int rsnd_gen1_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen) | 310 | static int rsnd_gen1_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen) |
191 | { | 311 | { |
192 | int i; | ||
193 | struct device *dev = rsnd_priv_to_dev(priv); | ||
194 | struct regmap_config regc; | ||
195 | struct reg_field regf[RSND_REG_MAX] = { | 312 | struct reg_field regf[RSND_REG_MAX] = { |
196 | RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_SEL, 0x00), | 313 | RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_SEL, 0x00), |
197 | RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL0, 0x08), | 314 | RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL0, 0x08), |
198 | RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL1, 0x0c), | 315 | RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL1, 0x0c), |
199 | RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL2, 0x10), | 316 | RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL2, 0x10), |
200 | RSND_GEN1_S_REG(gen, SRU, SRC_CTRL, 0xc0), | 317 | RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_CTRL, 0xc0), |
201 | RSND_GEN1_S_REG(gen, SRU, SSI_MODE0, 0xD0), | 318 | RSND_GEN1_S_REG(gen, SRU, SSI_MODE0, 0xD0), |
202 | RSND_GEN1_S_REG(gen, SRU, SSI_MODE1, 0xD4), | 319 | RSND_GEN1_S_REG(gen, SRU, SSI_MODE1, 0xD4), |
203 | RSND_GEN1_M_REG(gen, SRU, BUSIF_MODE, 0x20, 0x4), | 320 | RSND_GEN1_M_REG(gen, SRU, BUSIF_MODE, 0x20, 0x4), |
204 | RSND_GEN1_M_REG(gen, SRU, BUSIF_ADINR, 0x214, 0x40), | 321 | RSND_GEN1_M_REG(gen, SRU, SRC_ROUTE_MODE0,0x50, 0x8), |
322 | RSND_GEN1_M_REG(gen, SRU, SRC_SWRSR, 0x200, 0x40), | ||
323 | RSND_GEN1_M_REG(gen, SRU, SRC_SRCIR, 0x204, 0x40), | ||
324 | RSND_GEN1_M_REG(gen, SRU, SRC_ADINR, 0x214, 0x40), | ||
325 | RSND_GEN1_M_REG(gen, SRU, SRC_IFSCR, 0x21c, 0x40), | ||
326 | RSND_GEN1_M_REG(gen, SRU, SRC_IFSVR, 0x220, 0x40), | ||
327 | RSND_GEN1_M_REG(gen, SRU, SRC_SRCCR, 0x224, 0x40), | ||
328 | RSND_GEN1_M_REG(gen, SRU, SRC_MNFSR, 0x228, 0x40), | ||
205 | 329 | ||
206 | RSND_GEN1_S_REG(gen, ADG, BRRA, 0x00), | 330 | RSND_GEN1_S_REG(gen, ADG, BRRA, 0x00), |
207 | RSND_GEN1_S_REG(gen, ADG, BRRB, 0x04), | 331 | RSND_GEN1_S_REG(gen, ADG, BRRB, 0x04), |
@@ -219,24 +343,7 @@ static int rsnd_gen1_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen) | |||
219 | RSND_GEN1_M_REG(gen, SSI, SSIWSR, 0x20, 0x40), | 343 | RSND_GEN1_M_REG(gen, SSI, SSIWSR, 0x20, 0x40), |
220 | }; | 344 | }; |
221 | 345 | ||
222 | memset(®c, 0, sizeof(regc)); | 346 | return rsnd_gen_regmap_init(priv, gen, regf); |
223 | regc.reg_bits = 32; | ||
224 | regc.val_bits = 32; | ||
225 | |||
226 | gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, ®c); | ||
227 | if (IS_ERR(gen->regmap)) { | ||
228 | dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap)); | ||
229 | return PTR_ERR(gen->regmap); | ||
230 | } | ||
231 | |||
232 | for (i = 0; i < RSND_REG_MAX; i++) { | ||
233 | gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]); | ||
234 | if (IS_ERR(gen->regs[i])) | ||
235 | return PTR_ERR(gen->regs[i]); | ||
236 | |||
237 | } | ||
238 | |||
239 | return 0; | ||
240 | } | 347 | } |
241 | 348 | ||
242 | static int rsnd_gen1_probe(struct platform_device *pdev, | 349 | static int rsnd_gen1_probe(struct platform_device *pdev, |
@@ -281,45 +388,16 @@ static int rsnd_gen1_probe(struct platform_device *pdev, | |||
281 | 388 | ||
282 | } | 389 | } |
283 | 390 | ||
284 | static void rsnd_gen1_remove(struct platform_device *pdev, | ||
285 | struct rsnd_priv *priv) | ||
286 | { | ||
287 | } | ||
288 | |||
289 | static struct rsnd_gen_ops rsnd_gen1_ops = { | ||
290 | .probe = rsnd_gen1_probe, | ||
291 | .remove = rsnd_gen1_remove, | ||
292 | .path_init = rsnd_gen1_path_init, | ||
293 | .path_exit = rsnd_gen1_path_exit, | ||
294 | }; | ||
295 | |||
296 | /* | 391 | /* |
297 | * Gen | 392 | * Gen |
298 | */ | 393 | */ |
299 | int rsnd_gen_path_init(struct rsnd_priv *priv, | ||
300 | struct rsnd_dai *rdai, | ||
301 | struct rsnd_dai_stream *io) | ||
302 | { | ||
303 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | ||
304 | |||
305 | return gen->ops->path_init(priv, rdai, io); | ||
306 | } | ||
307 | |||
308 | int rsnd_gen_path_exit(struct rsnd_priv *priv, | ||
309 | struct rsnd_dai *rdai, | ||
310 | struct rsnd_dai_stream *io) | ||
311 | { | ||
312 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | ||
313 | |||
314 | return gen->ops->path_exit(priv, rdai, io); | ||
315 | } | ||
316 | |||
317 | int rsnd_gen_probe(struct platform_device *pdev, | 394 | int rsnd_gen_probe(struct platform_device *pdev, |
318 | struct rcar_snd_info *info, | 395 | struct rcar_snd_info *info, |
319 | struct rsnd_priv *priv) | 396 | struct rsnd_priv *priv) |
320 | { | 397 | { |
321 | struct device *dev = rsnd_priv_to_dev(priv); | 398 | struct device *dev = rsnd_priv_to_dev(priv); |
322 | struct rsnd_gen *gen; | 399 | struct rsnd_gen *gen; |
400 | int ret; | ||
323 | 401 | ||
324 | gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL); | 402 | gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL); |
325 | if (!gen) { | 403 | if (!gen) { |
@@ -327,23 +405,21 @@ int rsnd_gen_probe(struct platform_device *pdev, | |||
327 | return -ENOMEM; | 405 | return -ENOMEM; |
328 | } | 406 | } |
329 | 407 | ||
408 | priv->gen = gen; | ||
409 | |||
410 | ret = -ENODEV; | ||
330 | if (rsnd_is_gen1(priv)) | 411 | if (rsnd_is_gen1(priv)) |
331 | gen->ops = &rsnd_gen1_ops; | 412 | ret = rsnd_gen1_probe(pdev, info, priv); |
413 | else if (rsnd_is_gen2(priv)) | ||
414 | ret = rsnd_gen2_probe(pdev, info, priv); | ||
332 | 415 | ||
333 | if (!gen->ops) { | 416 | if (ret < 0) |
334 | dev_err(dev, "unknown generation R-Car sound device\n"); | 417 | dev_err(dev, "unknown generation R-Car sound device\n"); |
335 | return -ENODEV; | ||
336 | } | ||
337 | |||
338 | priv->gen = gen; | ||
339 | 418 | ||
340 | return gen->ops->probe(pdev, info, priv); | 419 | return ret; |
341 | } | 420 | } |
342 | 421 | ||
343 | void rsnd_gen_remove(struct platform_device *pdev, | 422 | void rsnd_gen_remove(struct platform_device *pdev, |
344 | struct rsnd_priv *priv) | 423 | struct rsnd_priv *priv) |
345 | { | 424 | { |
346 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | ||
347 | |||
348 | gen->ops->remove(pdev, priv); | ||
349 | } | 425 | } |
diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h index 9e463e50e7e6..4ca66cd899c8 100644 --- a/sound/soc/sh/rcar/rsnd.h +++ b/sound/soc/sh/rcar/rsnd.h | |||
@@ -31,16 +31,24 @@ | |||
31 | * see gen1/gen2 for detail | 31 | * see gen1/gen2 for detail |
32 | */ | 32 | */ |
33 | enum rsnd_reg { | 33 | enum rsnd_reg { |
34 | /* SRU/SCU */ | 34 | /* SRU/SCU/SSIU */ |
35 | RSND_REG_SRC_ROUTE_SEL, | 35 | RSND_REG_SRC_ROUTE_SEL, /* for Gen1 */ |
36 | RSND_REG_SRC_TMG_SEL0, | 36 | RSND_REG_SRC_TMG_SEL0, /* for Gen1 */ |
37 | RSND_REG_SRC_TMG_SEL1, | 37 | RSND_REG_SRC_TMG_SEL1, /* for Gen1 */ |
38 | RSND_REG_SRC_TMG_SEL2, | 38 | RSND_REG_SRC_TMG_SEL2, /* for Gen1 */ |
39 | RSND_REG_SRC_CTRL, | 39 | RSND_REG_SRC_ROUTE_CTRL, /* for Gen1 */ |
40 | RSND_REG_SSI_MODE0, | 40 | RSND_REG_SSI_MODE0, |
41 | RSND_REG_SSI_MODE1, | 41 | RSND_REG_SSI_MODE1, |
42 | RSND_REG_BUSIF_MODE, | 42 | RSND_REG_BUSIF_MODE, |
43 | RSND_REG_BUSIF_ADINR, | 43 | RSND_REG_INT_ENABLE, /* for Gen2 */ |
44 | RSND_REG_SRC_ROUTE_MODE0, | ||
45 | RSND_REG_SRC_SWRSR, | ||
46 | RSND_REG_SRC_SRCIR, | ||
47 | RSND_REG_SRC_ADINR, | ||
48 | RSND_REG_SRC_IFSCR, | ||
49 | RSND_REG_SRC_IFSVR, | ||
50 | RSND_REG_SRC_SRCCR, | ||
51 | RSND_REG_SRC_MNFSR, | ||
44 | 52 | ||
45 | /* ADG */ | 53 | /* ADG */ |
46 | RSND_REG_BRRA, | 54 | RSND_REG_BRRA, |
@@ -49,9 +57,9 @@ enum rsnd_reg { | |||
49 | RSND_REG_AUDIO_CLK_SEL0, | 57 | RSND_REG_AUDIO_CLK_SEL0, |
50 | RSND_REG_AUDIO_CLK_SEL1, | 58 | RSND_REG_AUDIO_CLK_SEL1, |
51 | RSND_REG_AUDIO_CLK_SEL2, | 59 | RSND_REG_AUDIO_CLK_SEL2, |
52 | RSND_REG_AUDIO_CLK_SEL3, | 60 | RSND_REG_AUDIO_CLK_SEL3, /* for Gen1 */ |
53 | RSND_REG_AUDIO_CLK_SEL4, | 61 | RSND_REG_AUDIO_CLK_SEL4, /* for Gen1 */ |
54 | RSND_REG_AUDIO_CLK_SEL5, | 62 | RSND_REG_AUDIO_CLK_SEL5, /* for Gen1 */ |
55 | 63 | ||
56 | /* SSI */ | 64 | /* SSI */ |
57 | RSND_REG_SSICR, | 65 | RSND_REG_SSICR, |
@@ -174,11 +182,11 @@ struct rsnd_dai { | |||
174 | struct rsnd_dai_stream playback; | 182 | struct rsnd_dai_stream playback; |
175 | struct rsnd_dai_stream capture; | 183 | struct rsnd_dai_stream capture; |
176 | 184 | ||
177 | int clk_master:1; | 185 | unsigned int clk_master:1; |
178 | int bit_clk_inv:1; | 186 | unsigned int bit_clk_inv:1; |
179 | int frm_clk_inv:1; | 187 | unsigned int frm_clk_inv:1; |
180 | int sys_delay:1; | 188 | unsigned int sys_delay:1; |
181 | int data_alignment:1; | 189 | unsigned int data_alignment:1; |
182 | }; | 190 | }; |
183 | 191 | ||
184 | #define rsnd_dai_nr(priv) ((priv)->dai_nr) | 192 | #define rsnd_dai_nr(priv) ((priv)->dai_nr) |
@@ -229,6 +237,10 @@ int rsnd_adg_probe(struct platform_device *pdev, | |||
229 | struct rsnd_priv *priv); | 237 | struct rsnd_priv *priv); |
230 | void rsnd_adg_remove(struct platform_device *pdev, | 238 | void rsnd_adg_remove(struct platform_device *pdev, |
231 | struct rsnd_priv *priv); | 239 | struct rsnd_priv *priv); |
240 | int rsnd_adg_set_convert_clk(struct rsnd_priv *priv, | ||
241 | struct rsnd_mod *mod, | ||
242 | unsigned int src_rate, | ||
243 | unsigned int dst_rate); | ||
232 | 244 | ||
233 | /* | 245 | /* |
234 | * R-Car sound priv | 246 | * R-Car sound priv |
@@ -282,6 +294,10 @@ void rsnd_scu_remove(struct platform_device *pdev, | |||
282 | struct rsnd_priv *priv); | 294 | struct rsnd_priv *priv); |
283 | struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id); | 295 | struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id); |
284 | bool rsnd_scu_hpbif_is_enable(struct rsnd_mod *mod); | 296 | bool rsnd_scu_hpbif_is_enable(struct rsnd_mod *mod); |
297 | unsigned int rsnd_scu_get_ssi_rate(struct rsnd_priv *priv, | ||
298 | struct rsnd_mod *ssi_mod, | ||
299 | struct snd_pcm_runtime *runtime); | ||
300 | |||
285 | #define rsnd_scu_nr(priv) ((priv)->scu_nr) | 301 | #define rsnd_scu_nr(priv) ((priv)->scu_nr) |
286 | 302 | ||
287 | /* | 303 | /* |
diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c index fa8fa15860b9..9bb08bb1d455 100644 --- a/sound/soc/sh/rcar/scu.c +++ b/sound/soc/sh/rcar/scu.c | |||
@@ -13,9 +13,13 @@ | |||
13 | struct rsnd_scu { | 13 | struct rsnd_scu { |
14 | struct rsnd_scu_platform_info *info; /* rcar_snd.h */ | 14 | struct rsnd_scu_platform_info *info; /* rcar_snd.h */ |
15 | struct rsnd_mod mod; | 15 | struct rsnd_mod mod; |
16 | struct clk *clk; | ||
16 | }; | 17 | }; |
17 | 18 | ||
18 | #define rsnd_scu_mode_flags(p) ((p)->info->flags) | 19 | #define rsnd_scu_mode_flags(p) ((p)->info->flags) |
20 | #define rsnd_scu_convert_rate(p) ((p)->info->convert_rate) | ||
21 | |||
22 | #define RSND_SCU_NAME_SIZE 16 | ||
19 | 23 | ||
20 | /* | 24 | /* |
21 | * ADINR | 25 | * ADINR |
@@ -26,6 +30,15 @@ struct rsnd_scu { | |||
26 | #define OTBL_18 (6 << 16) | 30 | #define OTBL_18 (6 << 16) |
27 | #define OTBL_16 (8 << 16) | 31 | #define OTBL_16 (8 << 16) |
28 | 32 | ||
33 | /* | ||
34 | * image of SRC (Sampling Rate Converter) | ||
35 | * | ||
36 | * 96kHz <-> +-----+ 48kHz +-----+ 48kHz +-------+ | ||
37 | * 48kHz <-> | SRC | <------> | SSI | <-----> | codec | | ||
38 | * 44.1kHz <-> +-----+ +-----+ +-------+ | ||
39 | * ... | ||
40 | * | ||
41 | */ | ||
29 | 42 | ||
30 | #define rsnd_mod_to_scu(_mod) \ | 43 | #define rsnd_mod_to_scu(_mod) \ |
31 | container_of((_mod), struct rsnd_scu, mod) | 44 | container_of((_mod), struct rsnd_scu, mod) |
@@ -36,7 +49,8 @@ struct rsnd_scu { | |||
36 | ((pos) = (struct rsnd_scu *)(priv)->scu + i); \ | 49 | ((pos) = (struct rsnd_scu *)(priv)->scu + i); \ |
37 | i++) | 50 | i++) |
38 | 51 | ||
39 | static int rsnd_scu_set_route(struct rsnd_priv *priv, | 52 | /* Gen1 only */ |
53 | static int rsnd_src_set_route_if_gen1(struct rsnd_priv *priv, | ||
40 | struct rsnd_mod *mod, | 54 | struct rsnd_mod *mod, |
41 | struct rsnd_dai *rdai, | 55 | struct rsnd_dai *rdai, |
42 | struct rsnd_dai_stream *io) | 56 | struct rsnd_dai_stream *io) |
@@ -55,7 +69,7 @@ static int rsnd_scu_set_route(struct rsnd_priv *priv, | |||
55 | { 0x3, 28, }, /* 7 */ | 69 | { 0x3, 28, }, /* 7 */ |
56 | { 0x3, 30, }, /* 8 */ | 70 | { 0x3, 30, }, /* 8 */ |
57 | }; | 71 | }; |
58 | 72 | struct rsnd_scu *scu = rsnd_mod_to_scu(mod); | |
59 | u32 mask; | 73 | u32 mask; |
60 | u32 val; | 74 | u32 val; |
61 | int shift; | 75 | int shift; |
@@ -85,9 +99,18 @@ static int rsnd_scu_set_route(struct rsnd_priv *priv, | |||
85 | */ | 99 | */ |
86 | shift = (id % 4) * 8; | 100 | shift = (id % 4) * 8; |
87 | mask = 0x1F << shift; | 101 | mask = 0x1F << shift; |
88 | if (8 == id) /* SRU8 is very special */ | 102 | |
103 | /* | ||
104 | * ADG is used as source clock if SRC was used, | ||
105 | * then, SSI WS is used as destination clock. | ||
106 | * SSI WS is used as source clock if SRC is not used | ||
107 | * (when playback, source/destination become reverse when capture) | ||
108 | */ | ||
109 | if (rsnd_scu_convert_rate(scu)) /* use ADG */ | ||
110 | val = 0; | ||
111 | else if (8 == id) /* use SSI WS, but SRU8 is special */ | ||
89 | val = id << shift; | 112 | val = id << shift; |
90 | else | 113 | else /* use SSI WS */ |
91 | val = (id + 1) << shift; | 114 | val = (id + 1) << shift; |
92 | 115 | ||
93 | switch (id / 4) { | 116 | switch (id / 4) { |
@@ -105,30 +128,45 @@ static int rsnd_scu_set_route(struct rsnd_priv *priv, | |||
105 | return 0; | 128 | return 0; |
106 | } | 129 | } |
107 | 130 | ||
108 | static int rsnd_scu_set_mode(struct rsnd_priv *priv, | 131 | unsigned int rsnd_scu_get_ssi_rate(struct rsnd_priv *priv, |
109 | struct rsnd_mod *mod, | 132 | struct rsnd_mod *ssi_mod, |
110 | struct rsnd_dai *rdai, | 133 | struct snd_pcm_runtime *runtime) |
111 | struct rsnd_dai_stream *io) | ||
112 | { | 134 | { |
113 | int id = rsnd_mod_id(mod); | 135 | struct rsnd_scu *scu; |
114 | u32 val; | 136 | unsigned int rate; |
115 | 137 | ||
116 | if (rsnd_is_gen1(priv)) { | 138 | /* this function is assuming SSI id = SCU id here */ |
117 | val = (1 << id); | 139 | scu = rsnd_mod_to_scu(rsnd_scu_mod_get(priv, rsnd_mod_id(ssi_mod))); |
118 | rsnd_mod_bset(mod, SRC_CTRL, val, val); | ||
119 | } | ||
120 | 140 | ||
121 | return 0; | 141 | /* |
142 | * return convert rate if SRC is used, | ||
143 | * otherwise, return runtime->rate as usual | ||
144 | */ | ||
145 | rate = rsnd_scu_convert_rate(scu); | ||
146 | if (!rate) | ||
147 | rate = runtime->rate; | ||
148 | |||
149 | return rate; | ||
122 | } | 150 | } |
123 | 151 | ||
124 | static int rsnd_scu_set_hpbif(struct rsnd_priv *priv, | 152 | static int rsnd_scu_convert_rate_ctrl(struct rsnd_priv *priv, |
125 | struct rsnd_mod *mod, | 153 | struct rsnd_mod *mod, |
126 | struct rsnd_dai *rdai, | 154 | struct rsnd_dai *rdai, |
127 | struct rsnd_dai_stream *io) | 155 | struct rsnd_dai_stream *io) |
128 | { | 156 | { |
129 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | 157 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
158 | struct rsnd_scu *scu = rsnd_mod_to_scu(mod); | ||
159 | u32 convert_rate = rsnd_scu_convert_rate(scu); | ||
130 | u32 adinr = runtime->channels; | 160 | u32 adinr = runtime->channels; |
131 | 161 | ||
162 | /* set/clear soft reset */ | ||
163 | rsnd_mod_write(mod, SRC_SWRSR, 0); | ||
164 | rsnd_mod_write(mod, SRC_SWRSR, 1); | ||
165 | |||
166 | /* Initialize the operation of the SRC internal circuits */ | ||
167 | rsnd_mod_write(mod, SRC_SRCIR, 1); | ||
168 | |||
169 | /* Set channel number and output bit length */ | ||
132 | switch (runtime->sample_bits) { | 170 | switch (runtime->sample_bits) { |
133 | case 16: | 171 | case 16: |
134 | adinr |= OTBL_16; | 172 | adinr |= OTBL_16; |
@@ -139,9 +177,81 @@ static int rsnd_scu_set_hpbif(struct rsnd_priv *priv, | |||
139 | default: | 177 | default: |
140 | return -EIO; | 178 | return -EIO; |
141 | } | 179 | } |
180 | rsnd_mod_write(mod, SRC_ADINR, adinr); | ||
181 | |||
182 | if (convert_rate) { | ||
183 | u32 fsrate = 0x0400000 / convert_rate * runtime->rate; | ||
184 | int ret; | ||
185 | |||
186 | /* Enable the initial value of IFS */ | ||
187 | rsnd_mod_write(mod, SRC_IFSCR, 1); | ||
188 | |||
189 | /* Set initial value of IFS */ | ||
190 | rsnd_mod_write(mod, SRC_IFSVR, fsrate); | ||
191 | |||
192 | /* Select SRC mode (fixed value) */ | ||
193 | rsnd_mod_write(mod, SRC_SRCCR, 0x00010110); | ||
194 | |||
195 | /* Set the restriction value of the FS ratio (98%) */ | ||
196 | rsnd_mod_write(mod, SRC_MNFSR, fsrate / 100 * 98); | ||
197 | |||
198 | if (rsnd_is_gen1(priv)) { | ||
199 | /* no SRC_BFSSR settings, since SRC_SRCCR::BUFMD is 0 */ | ||
200 | } | ||
142 | 201 | ||
202 | /* set convert clock */ | ||
203 | ret = rsnd_adg_set_convert_clk(priv, mod, | ||
204 | runtime->rate, | ||
205 | convert_rate); | ||
206 | if (ret < 0) | ||
207 | return ret; | ||
208 | } | ||
209 | |||
210 | /* Cancel the initialization and operate the SRC function */ | ||
211 | rsnd_mod_write(mod, SRC_SRCIR, 0); | ||
212 | |||
213 | /* use DMA transfer */ | ||
143 | rsnd_mod_write(mod, BUSIF_MODE, 1); | 214 | rsnd_mod_write(mod, BUSIF_MODE, 1); |
144 | rsnd_mod_write(mod, BUSIF_ADINR, adinr); | 215 | |
216 | return 0; | ||
217 | } | ||
218 | |||
219 | static int rsnd_scu_transfer_start(struct rsnd_priv *priv, | ||
220 | struct rsnd_mod *mod, | ||
221 | struct rsnd_dai *rdai, | ||
222 | struct rsnd_dai_stream *io) | ||
223 | { | ||
224 | struct rsnd_scu *scu = rsnd_mod_to_scu(mod); | ||
225 | int id = rsnd_mod_id(mod); | ||
226 | u32 val; | ||
227 | |||
228 | if (rsnd_is_gen1(priv)) { | ||
229 | val = (1 << id); | ||
230 | rsnd_mod_bset(mod, SRC_ROUTE_CTRL, val, val); | ||
231 | } | ||
232 | |||
233 | if (rsnd_scu_convert_rate(scu)) | ||
234 | rsnd_mod_write(mod, SRC_ROUTE_MODE0, 1); | ||
235 | |||
236 | return 0; | ||
237 | } | ||
238 | |||
239 | static int rsnd_scu_transfer_stop(struct rsnd_priv *priv, | ||
240 | struct rsnd_mod *mod, | ||
241 | struct rsnd_dai *rdai, | ||
242 | struct rsnd_dai_stream *io) | ||
243 | { | ||
244 | struct rsnd_scu *scu = rsnd_mod_to_scu(mod); | ||
245 | int id = rsnd_mod_id(mod); | ||
246 | u32 mask; | ||
247 | |||
248 | if (rsnd_is_gen1(priv)) { | ||
249 | mask = (1 << id); | ||
250 | rsnd_mod_bset(mod, SRC_ROUTE_CTRL, mask, 0); | ||
251 | } | ||
252 | |||
253 | if (rsnd_scu_convert_rate(scu)) | ||
254 | rsnd_mod_write(mod, SRC_ROUTE_MODE0, 0); | ||
145 | 255 | ||
146 | return 0; | 256 | return 0; |
147 | } | 257 | } |
@@ -159,6 +269,7 @@ static int rsnd_scu_start(struct rsnd_mod *mod, | |||
159 | struct rsnd_dai_stream *io) | 269 | struct rsnd_dai_stream *io) |
160 | { | 270 | { |
161 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | 271 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); |
272 | struct rsnd_scu *scu = rsnd_mod_to_scu(mod); | ||
162 | struct device *dev = rsnd_priv_to_dev(priv); | 273 | struct device *dev = rsnd_priv_to_dev(priv); |
163 | int ret; | 274 | int ret; |
164 | 275 | ||
@@ -173,16 +284,19 @@ static int rsnd_scu_start(struct rsnd_mod *mod, | |||
173 | return 0; | 284 | return 0; |
174 | } | 285 | } |
175 | 286 | ||
287 | clk_enable(scu->clk); | ||
288 | |||
176 | /* it use DMA transter */ | 289 | /* it use DMA transter */ |
177 | ret = rsnd_scu_set_route(priv, mod, rdai, io); | 290 | |
291 | ret = rsnd_src_set_route_if_gen1(priv, mod, rdai, io); | ||
178 | if (ret < 0) | 292 | if (ret < 0) |
179 | return ret; | 293 | return ret; |
180 | 294 | ||
181 | ret = rsnd_scu_set_mode(priv, mod, rdai, io); | 295 | ret = rsnd_scu_convert_rate_ctrl(priv, mod, rdai, io); |
182 | if (ret < 0) | 296 | if (ret < 0) |
183 | return ret; | 297 | return ret; |
184 | 298 | ||
185 | ret = rsnd_scu_set_hpbif(priv, mod, rdai, io); | 299 | ret = rsnd_scu_transfer_start(priv, mod, rdai, io); |
186 | if (ret < 0) | 300 | if (ret < 0) |
187 | return ret; | 301 | return ret; |
188 | 302 | ||
@@ -191,9 +305,27 @@ static int rsnd_scu_start(struct rsnd_mod *mod, | |||
191 | return 0; | 305 | return 0; |
192 | } | 306 | } |
193 | 307 | ||
308 | static int rsnd_scu_stop(struct rsnd_mod *mod, | ||
309 | struct rsnd_dai *rdai, | ||
310 | struct rsnd_dai_stream *io) | ||
311 | { | ||
312 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | ||
313 | struct rsnd_scu *scu = rsnd_mod_to_scu(mod); | ||
314 | |||
315 | if (!rsnd_scu_hpbif_is_enable(mod)) | ||
316 | return 0; | ||
317 | |||
318 | rsnd_scu_transfer_stop(priv, mod, rdai, io); | ||
319 | |||
320 | clk_disable(scu->clk); | ||
321 | |||
322 | return 0; | ||
323 | } | ||
324 | |||
194 | static struct rsnd_mod_ops rsnd_scu_ops = { | 325 | static struct rsnd_mod_ops rsnd_scu_ops = { |
195 | .name = "scu", | 326 | .name = "scu", |
196 | .start = rsnd_scu_start, | 327 | .start = rsnd_scu_start, |
328 | .stop = rsnd_scu_stop, | ||
197 | }; | 329 | }; |
198 | 330 | ||
199 | struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id) | 331 | struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id) |
@@ -210,6 +342,8 @@ int rsnd_scu_probe(struct platform_device *pdev, | |||
210 | { | 342 | { |
211 | struct device *dev = rsnd_priv_to_dev(priv); | 343 | struct device *dev = rsnd_priv_to_dev(priv); |
212 | struct rsnd_scu *scu; | 344 | struct rsnd_scu *scu; |
345 | struct clk *clk; | ||
346 | char name[RSND_SCU_NAME_SIZE]; | ||
213 | int i, nr; | 347 | int i, nr; |
214 | 348 | ||
215 | /* | 349 | /* |
@@ -226,9 +360,16 @@ int rsnd_scu_probe(struct platform_device *pdev, | |||
226 | priv->scu = scu; | 360 | priv->scu = scu; |
227 | 361 | ||
228 | for_each_rsnd_scu(scu, priv, i) { | 362 | for_each_rsnd_scu(scu, priv, i) { |
363 | snprintf(name, RSND_SCU_NAME_SIZE, "scu.%d", i); | ||
364 | |||
365 | clk = devm_clk_get(dev, name); | ||
366 | if (IS_ERR(clk)) | ||
367 | return PTR_ERR(clk); | ||
368 | |||
229 | rsnd_mod_init(priv, &scu->mod, | 369 | rsnd_mod_init(priv, &scu->mod, |
230 | &rsnd_scu_ops, i); | 370 | &rsnd_scu_ops, i); |
231 | scu->info = &info->scu_info[i]; | 371 | scu->info = &info->scu_info[i]; |
372 | scu->clk = clk; | ||
232 | 373 | ||
233 | dev_dbg(dev, "SCU%d probed\n", i); | 374 | dev_dbg(dev, "SCU%d probed\n", i); |
234 | } | 375 | } |
diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c index 5ac20cd5e006..4b8cf7ca9d19 100644 --- a/sound/soc/sh/rcar/ssi.c +++ b/sound/soc/sh/rcar/ssi.c | |||
@@ -187,9 +187,10 @@ static void rsnd_ssi_status_check(struct rsnd_mod *mod, | |||
187 | } | 187 | } |
188 | 188 | ||
189 | static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi, | 189 | static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi, |
190 | unsigned int rate) | 190 | struct rsnd_dai_stream *io) |
191 | { | 191 | { |
192 | struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod); | 192 | struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod); |
193 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | ||
193 | struct device *dev = rsnd_priv_to_dev(priv); | 194 | struct device *dev = rsnd_priv_to_dev(priv); |
194 | int i, j, ret; | 195 | int i, j, ret; |
195 | int adg_clk_div_table[] = { | 196 | int adg_clk_div_table[] = { |
@@ -199,6 +200,7 @@ static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi, | |||
199 | 1, 2, 4, 8, 16, 6, 12, | 200 | 1, 2, 4, 8, 16, 6, 12, |
200 | }; | 201 | }; |
201 | unsigned int main_rate; | 202 | unsigned int main_rate; |
203 | unsigned int rate = rsnd_scu_get_ssi_rate(priv, &ssi->mod, runtime); | ||
202 | 204 | ||
203 | /* | 205 | /* |
204 | * Find best clock, and try to start ADG | 206 | * Find best clock, and try to start ADG |
@@ -209,7 +211,7 @@ static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi, | |||
209 | /* | 211 | /* |
210 | * this driver is assuming that | 212 | * this driver is assuming that |
211 | * system word is 64fs (= 2 x 32bit) | 213 | * system word is 64fs (= 2 x 32bit) |
212 | * see rsnd_ssi_start() | 214 | * see rsnd_ssi_init() |
213 | */ | 215 | */ |
214 | main_rate = rate / adg_clk_div_table[i] | 216 | main_rate = rate / adg_clk_div_table[i] |
215 | * 32 * 2 * ssi_clk_mul_table[j]; | 217 | * 32 * 2 * ssi_clk_mul_table[j]; |
@@ -251,14 +253,10 @@ static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi, | |||
251 | clk_enable(ssi->clk); | 253 | clk_enable(ssi->clk); |
252 | 254 | ||
253 | if (rsnd_rdai_is_clk_master(rdai)) { | 255 | if (rsnd_rdai_is_clk_master(rdai)) { |
254 | struct snd_pcm_runtime *runtime; | ||
255 | |||
256 | runtime = rsnd_io_to_runtime(io); | ||
257 | |||
258 | if (rsnd_ssi_clk_from_parent(ssi)) | 256 | if (rsnd_ssi_clk_from_parent(ssi)) |
259 | rsnd_ssi_hw_start(ssi->parent, rdai, io); | 257 | rsnd_ssi_hw_start(ssi->parent, rdai, io); |
260 | else | 258 | else |
261 | rsnd_ssi_master_clk_start(ssi, runtime->rate); | 259 | rsnd_ssi_master_clk_start(ssi, io); |
262 | } | 260 | } |
263 | } | 261 | } |
264 | 262 | ||
@@ -457,6 +455,10 @@ static int rsnd_ssi_pio_start(struct rsnd_mod *mod, | |||
457 | /* enable PIO IRQ */ | 455 | /* enable PIO IRQ */ |
458 | ssi->cr_etc = UIEN | OIEN | DIEN; | 456 | ssi->cr_etc = UIEN | OIEN | DIEN; |
459 | 457 | ||
458 | /* enable PIO interrupt if gen2 */ | ||
459 | if (rsnd_is_gen2(priv)) | ||
460 | rsnd_mod_write(&ssi->mod, INT_ENABLE, 0x0f000000); | ||
461 | |||
460 | rsnd_ssi_hw_start(ssi, rdai, io); | 462 | rsnd_ssi_hw_start(ssi, rdai, io); |
461 | 463 | ||
462 | dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod)); | 464 | dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod)); |
@@ -650,7 +652,7 @@ int rsnd_ssi_probe(struct platform_device *pdev, | |||
650 | 652 | ||
651 | snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i); | 653 | snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i); |
652 | 654 | ||
653 | clk = clk_get(dev, name); | 655 | clk = devm_clk_get(dev, name); |
654 | if (IS_ERR(clk)) | 656 | if (IS_ERR(clk)) |
655 | return PTR_ERR(clk); | 657 | return PTR_ERR(clk); |
656 | 658 | ||
@@ -711,7 +713,6 @@ void rsnd_ssi_remove(struct platform_device *pdev, | |||
711 | int i; | 713 | int i; |
712 | 714 | ||
713 | for_each_rsnd_ssi(ssi, priv, i) { | 715 | for_each_rsnd_ssi(ssi, priv, i) { |
714 | clk_put(ssi->clk); | ||
715 | if (rsnd_ssi_dma_available(ssi)) | 716 | if (rsnd_ssi_dma_available(ssi)) |
716 | rsnd_dma_quit(priv, rsnd_mod_to_dma(&ssi->mod)); | 717 | rsnd_dma_quit(priv, rsnd_mod_to_dma(&ssi->mod)); |
717 | } | 718 | } |
diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c index 53c9ecdd119f..5e9690c85d8f 100644 --- a/sound/soc/soc-compress.c +++ b/sound/soc/soc-compress.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <sound/compress_driver.h> | 24 | #include <sound/compress_driver.h> |
25 | #include <sound/soc.h> | 25 | #include <sound/soc.h> |
26 | #include <sound/initval.h> | 26 | #include <sound/initval.h> |
27 | #include <sound/soc-dpcm.h> | ||
27 | 28 | ||
28 | static int soc_compr_open(struct snd_compr_stream *cstream) | 29 | static int soc_compr_open(struct snd_compr_stream *cstream) |
29 | { | 30 | { |
@@ -75,6 +76,98 @@ out: | |||
75 | return ret; | 76 | return ret; |
76 | } | 77 | } |
77 | 78 | ||
79 | static int soc_compr_open_fe(struct snd_compr_stream *cstream) | ||
80 | { | ||
81 | struct snd_soc_pcm_runtime *fe = cstream->private_data; | ||
82 | struct snd_pcm_substream *fe_substream = fe->pcm->streams[0].substream; | ||
83 | struct snd_soc_platform *platform = fe->platform; | ||
84 | struct snd_soc_dai *cpu_dai = fe->cpu_dai; | ||
85 | struct snd_soc_dai *codec_dai = fe->codec_dai; | ||
86 | struct snd_soc_dpcm *dpcm; | ||
87 | struct snd_soc_dapm_widget_list *list; | ||
88 | int stream; | ||
89 | int ret = 0; | ||
90 | |||
91 | if (cstream->direction == SND_COMPRESS_PLAYBACK) | ||
92 | stream = SNDRV_PCM_STREAM_PLAYBACK; | ||
93 | else | ||
94 | stream = SNDRV_PCM_STREAM_CAPTURE; | ||
95 | |||
96 | mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); | ||
97 | |||
98 | if (platform->driver->compr_ops && platform->driver->compr_ops->open) { | ||
99 | ret = platform->driver->compr_ops->open(cstream); | ||
100 | if (ret < 0) { | ||
101 | pr_err("compress asoc: can't open platform %s\n", platform->name); | ||
102 | goto out; | ||
103 | } | ||
104 | } | ||
105 | |||
106 | if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->startup) { | ||
107 | ret = fe->dai_link->compr_ops->startup(cstream); | ||
108 | if (ret < 0) { | ||
109 | pr_err("compress asoc: %s startup failed\n", fe->dai_link->name); | ||
110 | goto machine_err; | ||
111 | } | ||
112 | } | ||
113 | |||
114 | fe->dpcm[stream].runtime = fe_substream->runtime; | ||
115 | |||
116 | if (dpcm_path_get(fe, stream, &list) <= 0) { | ||
117 | dev_dbg(fe->dev, "ASoC: %s no valid %s route\n", | ||
118 | fe->dai_link->name, stream ? "capture" : "playback"); | ||
119 | } | ||
120 | |||
121 | /* calculate valid and active FE <-> BE dpcms */ | ||
122 | dpcm_process_paths(fe, stream, &list, 1); | ||
123 | |||
124 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_FE; | ||
125 | |||
126 | ret = dpcm_be_dai_startup(fe, stream); | ||
127 | if (ret < 0) { | ||
128 | /* clean up all links */ | ||
129 | list_for_each_entry(dpcm, &fe->dpcm[stream].be_clients, list_be) | ||
130 | dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE; | ||
131 | |||
132 | dpcm_be_disconnect(fe, stream); | ||
133 | fe->dpcm[stream].runtime = NULL; | ||
134 | goto fe_err; | ||
135 | } | ||
136 | |||
137 | dpcm_clear_pending_state(fe, stream); | ||
138 | dpcm_path_put(&list); | ||
139 | |||
140 | fe->dpcm[stream].state = SND_SOC_DPCM_STATE_OPEN; | ||
141 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; | ||
142 | |||
143 | if (cstream->direction == SND_COMPRESS_PLAYBACK) { | ||
144 | cpu_dai->playback_active++; | ||
145 | codec_dai->playback_active++; | ||
146 | } else { | ||
147 | cpu_dai->capture_active++; | ||
148 | codec_dai->capture_active++; | ||
149 | } | ||
150 | |||
151 | cpu_dai->active++; | ||
152 | codec_dai->active++; | ||
153 | fe->codec->active++; | ||
154 | |||
155 | mutex_unlock(&fe->card->mutex); | ||
156 | |||
157 | return 0; | ||
158 | |||
159 | fe_err: | ||
160 | if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->shutdown) | ||
161 | fe->dai_link->compr_ops->shutdown(cstream); | ||
162 | machine_err: | ||
163 | if (platform->driver->compr_ops && platform->driver->compr_ops->free) | ||
164 | platform->driver->compr_ops->free(cstream); | ||
165 | out: | ||
166 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; | ||
167 | mutex_unlock(&fe->card->mutex); | ||
168 | return ret; | ||
169 | } | ||
170 | |||
78 | /* | 171 | /* |
79 | * Power down the audio subsystem pmdown_time msecs after close is called. | 172 | * Power down the audio subsystem pmdown_time msecs after close is called. |
80 | * This is to ensure there are no pops or clicks in between any music tracks | 173 | * This is to ensure there are no pops or clicks in between any music tracks |
@@ -164,6 +257,65 @@ static int soc_compr_free(struct snd_compr_stream *cstream) | |||
164 | return 0; | 257 | return 0; |
165 | } | 258 | } |
166 | 259 | ||
260 | static int soc_compr_free_fe(struct snd_compr_stream *cstream) | ||
261 | { | ||
262 | struct snd_soc_pcm_runtime *fe = cstream->private_data; | ||
263 | struct snd_soc_platform *platform = fe->platform; | ||
264 | struct snd_soc_dai *cpu_dai = fe->cpu_dai; | ||
265 | struct snd_soc_dai *codec_dai = fe->codec_dai; | ||
266 | struct snd_soc_dpcm *dpcm; | ||
267 | int stream, ret; | ||
268 | |||
269 | mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); | ||
270 | |||
271 | if (cstream->direction == SND_COMPRESS_PLAYBACK) { | ||
272 | stream = SNDRV_PCM_STREAM_PLAYBACK; | ||
273 | cpu_dai->playback_active--; | ||
274 | codec_dai->playback_active--; | ||
275 | } else { | ||
276 | stream = SNDRV_PCM_STREAM_CAPTURE; | ||
277 | cpu_dai->capture_active--; | ||
278 | codec_dai->capture_active--; | ||
279 | } | ||
280 | |||
281 | cpu_dai->active--; | ||
282 | codec_dai->active--; | ||
283 | fe->codec->active--; | ||
284 | |||
285 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_FE; | ||
286 | |||
287 | ret = dpcm_be_dai_hw_free(fe, stream); | ||
288 | if (ret < 0) | ||
289 | dev_err(fe->dev, "compressed hw_free failed %d\n", ret); | ||
290 | |||
291 | ret = dpcm_be_dai_shutdown(fe, stream); | ||
292 | |||
293 | /* mark FE's links ready to prune */ | ||
294 | list_for_each_entry(dpcm, &fe->dpcm[stream].be_clients, list_be) | ||
295 | dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE; | ||
296 | |||
297 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
298 | dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_STOP); | ||
299 | else | ||
300 | dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_STOP); | ||
301 | |||
302 | fe->dpcm[stream].state = SND_SOC_DPCM_STATE_CLOSE; | ||
303 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; | ||
304 | |||
305 | dpcm_be_disconnect(fe, stream); | ||
306 | |||
307 | fe->dpcm[stream].runtime = NULL; | ||
308 | |||
309 | if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->shutdown) | ||
310 | fe->dai_link->compr_ops->shutdown(cstream); | ||
311 | |||
312 | if (platform->driver->compr_ops && platform->driver->compr_ops->free) | ||
313 | platform->driver->compr_ops->free(cstream); | ||
314 | |||
315 | mutex_unlock(&fe->card->mutex); | ||
316 | return 0; | ||
317 | } | ||
318 | |||
167 | static int soc_compr_trigger(struct snd_compr_stream *cstream, int cmd) | 319 | static int soc_compr_trigger(struct snd_compr_stream *cstream, int cmd) |
168 | { | 320 | { |
169 | 321 | ||
@@ -194,6 +346,59 @@ out: | |||
194 | return ret; | 346 | return ret; |
195 | } | 347 | } |
196 | 348 | ||
349 | static int soc_compr_trigger_fe(struct snd_compr_stream *cstream, int cmd) | ||
350 | { | ||
351 | struct snd_soc_pcm_runtime *fe = cstream->private_data; | ||
352 | struct snd_soc_platform *platform = fe->platform; | ||
353 | int ret = 0, stream; | ||
354 | |||
355 | if (cmd == SND_COMPR_TRIGGER_PARTIAL_DRAIN || | ||
356 | cmd == SND_COMPR_TRIGGER_DRAIN) { | ||
357 | |||
358 | if (platform->driver->compr_ops && | ||
359 | platform->driver->compr_ops->trigger) | ||
360 | return platform->driver->compr_ops->trigger(cstream, cmd); | ||
361 | } | ||
362 | |||
363 | if (cstream->direction == SND_COMPRESS_PLAYBACK) | ||
364 | stream = SNDRV_PCM_STREAM_PLAYBACK; | ||
365 | else | ||
366 | stream = SNDRV_PCM_STREAM_CAPTURE; | ||
367 | |||
368 | |||
369 | mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); | ||
370 | |||
371 | if (platform->driver->compr_ops && platform->driver->compr_ops->trigger) { | ||
372 | ret = platform->driver->compr_ops->trigger(cstream, cmd); | ||
373 | if (ret < 0) | ||
374 | goto out; | ||
375 | } | ||
376 | |||
377 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_FE; | ||
378 | |||
379 | ret = dpcm_be_dai_trigger(fe, stream, cmd); | ||
380 | |||
381 | switch (cmd) { | ||
382 | case SNDRV_PCM_TRIGGER_START: | ||
383 | case SNDRV_PCM_TRIGGER_RESUME: | ||
384 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
385 | fe->dpcm[stream].state = SND_SOC_DPCM_STATE_START; | ||
386 | break; | ||
387 | case SNDRV_PCM_TRIGGER_STOP: | ||
388 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
389 | fe->dpcm[stream].state = SND_SOC_DPCM_STATE_STOP; | ||
390 | break; | ||
391 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
392 | fe->dpcm[stream].state = SND_SOC_DPCM_STATE_PAUSED; | ||
393 | break; | ||
394 | } | ||
395 | |||
396 | out: | ||
397 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; | ||
398 | mutex_unlock(&fe->card->mutex); | ||
399 | return ret; | ||
400 | } | ||
401 | |||
197 | static int soc_compr_set_params(struct snd_compr_stream *cstream, | 402 | static int soc_compr_set_params(struct snd_compr_stream *cstream, |
198 | struct snd_compr_params *params) | 403 | struct snd_compr_params *params) |
199 | { | 404 | { |
@@ -241,6 +446,64 @@ err: | |||
241 | return ret; | 446 | return ret; |
242 | } | 447 | } |
243 | 448 | ||
449 | static int soc_compr_set_params_fe(struct snd_compr_stream *cstream, | ||
450 | struct snd_compr_params *params) | ||
451 | { | ||
452 | struct snd_soc_pcm_runtime *fe = cstream->private_data; | ||
453 | struct snd_pcm_substream *fe_substream = fe->pcm->streams[0].substream; | ||
454 | struct snd_soc_platform *platform = fe->platform; | ||
455 | int ret = 0, stream; | ||
456 | |||
457 | if (cstream->direction == SND_COMPRESS_PLAYBACK) | ||
458 | stream = SNDRV_PCM_STREAM_PLAYBACK; | ||
459 | else | ||
460 | stream = SNDRV_PCM_STREAM_CAPTURE; | ||
461 | |||
462 | mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); | ||
463 | |||
464 | if (platform->driver->compr_ops && platform->driver->compr_ops->set_params) { | ||
465 | ret = platform->driver->compr_ops->set_params(cstream, params); | ||
466 | if (ret < 0) | ||
467 | goto out; | ||
468 | } | ||
469 | |||
470 | if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->set_params) { | ||
471 | ret = fe->dai_link->compr_ops->set_params(cstream); | ||
472 | if (ret < 0) | ||
473 | goto out; | ||
474 | } | ||
475 | |||
476 | /* | ||
477 | * Create an empty hw_params for the BE as the machine driver must | ||
478 | * fix this up to match DSP decoder and ASRC configuration. | ||
479 | * I.e. machine driver fixup for compressed BE is mandatory. | ||
480 | */ | ||
481 | memset(&fe->dpcm[fe_substream->stream].hw_params, 0, | ||
482 | sizeof(struct snd_pcm_hw_params)); | ||
483 | |||
484 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_FE; | ||
485 | |||
486 | ret = dpcm_be_dai_hw_params(fe, stream); | ||
487 | if (ret < 0) | ||
488 | goto out; | ||
489 | |||
490 | ret = dpcm_be_dai_prepare(fe, stream); | ||
491 | if (ret < 0) | ||
492 | goto out; | ||
493 | |||
494 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
495 | dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_START); | ||
496 | else | ||
497 | dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_START); | ||
498 | |||
499 | fe->dpcm[stream].state = SND_SOC_DPCM_STATE_PREPARE; | ||
500 | |||
501 | out: | ||
502 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; | ||
503 | mutex_unlock(&fe->card->mutex); | ||
504 | return ret; | ||
505 | } | ||
506 | |||
244 | static int soc_compr_get_params(struct snd_compr_stream *cstream, | 507 | static int soc_compr_get_params(struct snd_compr_stream *cstream, |
245 | struct snd_codec *params) | 508 | struct snd_codec *params) |
246 | { | 509 | { |
@@ -360,6 +623,7 @@ static int soc_compr_get_metadata(struct snd_compr_stream *cstream, | |||
360 | 623 | ||
361 | return ret; | 624 | return ret; |
362 | } | 625 | } |
626 | |||
363 | /* ASoC Compress operations */ | 627 | /* ASoC Compress operations */ |
364 | static struct snd_compr_ops soc_compr_ops = { | 628 | static struct snd_compr_ops soc_compr_ops = { |
365 | .open = soc_compr_open, | 629 | .open = soc_compr_open, |
@@ -375,6 +639,21 @@ static struct snd_compr_ops soc_compr_ops = { | |||
375 | .get_codec_caps = soc_compr_get_codec_caps | 639 | .get_codec_caps = soc_compr_get_codec_caps |
376 | }; | 640 | }; |
377 | 641 | ||
642 | /* ASoC Dynamic Compress operations */ | ||
643 | static struct snd_compr_ops soc_compr_dyn_ops = { | ||
644 | .open = soc_compr_open_fe, | ||
645 | .free = soc_compr_free_fe, | ||
646 | .set_params = soc_compr_set_params_fe, | ||
647 | .get_params = soc_compr_get_params, | ||
648 | .set_metadata = soc_compr_set_metadata, | ||
649 | .get_metadata = soc_compr_get_metadata, | ||
650 | .trigger = soc_compr_trigger_fe, | ||
651 | .pointer = soc_compr_pointer, | ||
652 | .ack = soc_compr_ack, | ||
653 | .get_caps = soc_compr_get_caps, | ||
654 | .get_codec_caps = soc_compr_get_codec_caps | ||
655 | }; | ||
656 | |||
378 | /* create a new compress */ | 657 | /* create a new compress */ |
379 | int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) | 658 | int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) |
380 | { | 659 | { |
@@ -383,6 +662,7 @@ int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) | |||
383 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | 662 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
384 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | 663 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
385 | struct snd_compr *compr; | 664 | struct snd_compr *compr; |
665 | struct snd_pcm *be_pcm; | ||
386 | char new_name[64]; | 666 | char new_name[64]; |
387 | int ret = 0, direction = 0; | 667 | int ret = 0, direction = 0; |
388 | 668 | ||
@@ -410,7 +690,26 @@ int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) | |||
410 | ret = -ENOMEM; | 690 | ret = -ENOMEM; |
411 | goto compr_err; | 691 | goto compr_err; |
412 | } | 692 | } |
413 | memcpy(compr->ops, &soc_compr_ops, sizeof(soc_compr_ops)); | 693 | |
694 | if (rtd->dai_link->dynamic) { | ||
695 | snprintf(new_name, sizeof(new_name), "(%s)", | ||
696 | rtd->dai_link->stream_name); | ||
697 | |||
698 | ret = snd_pcm_new_internal(rtd->card->snd_card, new_name, num, | ||
699 | 1, 0, &be_pcm); | ||
700 | if (ret < 0) { | ||
701 | dev_err(rtd->card->dev, "ASoC: can't create compressed for %s\n", | ||
702 | rtd->dai_link->name); | ||
703 | goto compr_err; | ||
704 | } | ||
705 | |||
706 | rtd->pcm = be_pcm; | ||
707 | rtd->fe_compr = 1; | ||
708 | be_pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->private_data = rtd; | ||
709 | be_pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->private_data = rtd; | ||
710 | memcpy(compr->ops, &soc_compr_dyn_ops, sizeof(soc_compr_dyn_ops)); | ||
711 | } else | ||
712 | memcpy(compr->ops, &soc_compr_ops, sizeof(soc_compr_ops)); | ||
414 | 713 | ||
415 | /* Add copy callback for not memory mapped DSPs */ | 714 | /* Add copy callback for not memory mapped DSPs */ |
416 | if (platform->driver->compr_ops && platform->driver->compr_ops->copy) | 715 | if (platform->driver->compr_ops && platform->driver->compr_ops->copy) |
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index a66783e13a9c..fe1df50805a3 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c | |||
@@ -1728,6 +1728,7 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card) | |||
1728 | } | 1728 | } |
1729 | 1729 | ||
1730 | snd_soc_dapm_link_dai_widgets(card); | 1730 | snd_soc_dapm_link_dai_widgets(card); |
1731 | snd_soc_dapm_connect_dai_link_widgets(card); | ||
1731 | 1732 | ||
1732 | if (card->controls) | 1733 | if (card->controls) |
1733 | snd_soc_add_card_controls(card, card->controls, card->num_controls); | 1734 | snd_soc_add_card_controls(card, card->controls, card->num_controls); |
@@ -3484,7 +3485,7 @@ int snd_soc_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id, | |||
3484 | return dai->codec->driver->set_sysclk(dai->codec, clk_id, 0, | 3485 | return dai->codec->driver->set_sysclk(dai->codec, clk_id, 0, |
3485 | freq, dir); | 3486 | freq, dir); |
3486 | else | 3487 | else |
3487 | return -EINVAL; | 3488 | return -ENOTSUPP; |
3488 | } | 3489 | } |
3489 | EXPORT_SYMBOL_GPL(snd_soc_dai_set_sysclk); | 3490 | EXPORT_SYMBOL_GPL(snd_soc_dai_set_sysclk); |
3490 | 3491 | ||
@@ -3505,7 +3506,7 @@ int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id, | |||
3505 | return codec->driver->set_sysclk(codec, clk_id, source, | 3506 | return codec->driver->set_sysclk(codec, clk_id, source, |
3506 | freq, dir); | 3507 | freq, dir); |
3507 | else | 3508 | else |
3508 | return -EINVAL; | 3509 | return -ENOTSUPP; |
3509 | } | 3510 | } |
3510 | EXPORT_SYMBOL_GPL(snd_soc_codec_set_sysclk); | 3511 | EXPORT_SYMBOL_GPL(snd_soc_codec_set_sysclk); |
3511 | 3512 | ||
@@ -4617,10 +4618,14 @@ int snd_soc_of_get_dai_name(struct device_node *of_node, | |||
4617 | 4618 | ||
4618 | if (id < 0 || id >= pos->num_dai) { | 4619 | if (id < 0 || id >= pos->num_dai) { |
4619 | ret = -EINVAL; | 4620 | ret = -EINVAL; |
4620 | } else { | 4621 | break; |
4621 | *dai_name = pos->dai_drv[id].name; | ||
4622 | ret = 0; | ||
4623 | } | 4622 | } |
4623 | |||
4624 | ret = 0; | ||
4625 | |||
4626 | *dai_name = pos->dai_drv[id].name; | ||
4627 | if (!*dai_name) | ||
4628 | *dai_name = pos->name; | ||
4624 | } | 4629 | } |
4625 | 4630 | ||
4626 | break; | 4631 | break; |
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index dcade130157f..dc8ff13187f7 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c | |||
@@ -371,12 +371,16 @@ static void dapm_reset(struct snd_soc_card *card) | |||
371 | } | 371 | } |
372 | } | 372 | } |
373 | 373 | ||
374 | static int soc_widget_read(struct snd_soc_dapm_widget *w, int reg) | 374 | static int soc_widget_read(struct snd_soc_dapm_widget *w, int reg, |
375 | unsigned int *value) | ||
375 | { | 376 | { |
376 | if (w->codec) | 377 | if (w->codec) { |
377 | return snd_soc_read(w->codec, reg); | 378 | *value = snd_soc_read(w->codec, reg); |
378 | else if (w->platform) | 379 | return 0; |
379 | return snd_soc_platform_read(w->platform, reg); | 380 | } else if (w->platform) { |
381 | *value = snd_soc_platform_read(w->platform, reg); | ||
382 | return 0; | ||
383 | } | ||
380 | 384 | ||
381 | dev_err(w->dapm->dev, "ASoC: no valid widget read method\n"); | 385 | dev_err(w->dapm->dev, "ASoC: no valid widget read method\n"); |
382 | return -1; | 386 | return -1; |
@@ -430,13 +434,12 @@ static int soc_widget_update_bits_locked(struct snd_soc_dapm_widget *w, | |||
430 | return ret; | 434 | return ret; |
431 | } else { | 435 | } else { |
432 | soc_widget_lock(w); | 436 | soc_widget_lock(w); |
433 | ret = soc_widget_read(w, reg); | 437 | ret = soc_widget_read(w, reg, &old); |
434 | if (ret < 0) { | 438 | if (ret < 0) { |
435 | soc_widget_unlock(w); | 439 | soc_widget_unlock(w); |
436 | return ret; | 440 | return ret; |
437 | } | 441 | } |
438 | 442 | ||
439 | old = ret; | ||
440 | new = (old & ~mask) | (value & mask); | 443 | new = (old & ~mask) | (value & mask); |
441 | change = old != new; | 444 | change = old != new; |
442 | if (change) { | 445 | if (change) { |
@@ -513,7 +516,7 @@ static void dapm_set_path_status(struct snd_soc_dapm_widget *w, | |||
513 | unsigned int invert = mc->invert; | 516 | unsigned int invert = mc->invert; |
514 | 517 | ||
515 | if (reg != SND_SOC_NOPM) { | 518 | if (reg != SND_SOC_NOPM) { |
516 | val = soc_widget_read(w, reg); | 519 | soc_widget_read(w, reg, &val); |
517 | val = (val >> shift) & mask; | 520 | val = (val >> shift) & mask; |
518 | if (invert) | 521 | if (invert) |
519 | val = max - val; | 522 | val = max - val; |
@@ -529,7 +532,7 @@ static void dapm_set_path_status(struct snd_soc_dapm_widget *w, | |||
529 | w->kcontrol_news[i].private_value; | 532 | w->kcontrol_news[i].private_value; |
530 | int val, item; | 533 | int val, item; |
531 | 534 | ||
532 | val = soc_widget_read(w, e->reg); | 535 | soc_widget_read(w, e->reg, &val); |
533 | item = (val >> e->shift_l) & e->mask; | 536 | item = (val >> e->shift_l) & e->mask; |
534 | 537 | ||
535 | if (item < e->max && !strcmp(p->name, e->texts[item])) | 538 | if (item < e->max && !strcmp(p->name, e->texts[item])) |
@@ -558,7 +561,7 @@ static void dapm_set_path_status(struct snd_soc_dapm_widget *w, | |||
558 | w->kcontrol_news[i].private_value; | 561 | w->kcontrol_news[i].private_value; |
559 | int val, item; | 562 | int val, item; |
560 | 563 | ||
561 | val = soc_widget_read(w, e->reg); | 564 | soc_widget_read(w, e->reg, &val); |
562 | val = (val >> e->shift_l) & e->mask; | 565 | val = (val >> e->shift_l) & e->mask; |
563 | for (item = 0; item < e->max; item++) { | 566 | for (item = 0; item < e->max; item++) { |
564 | if (val == e->values[item]) | 567 | if (val == e->values[item]) |
@@ -2473,7 +2476,8 @@ err: | |||
2473 | } | 2476 | } |
2474 | 2477 | ||
2475 | static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, | 2478 | static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, |
2476 | const struct snd_soc_dapm_route *route) | 2479 | const struct snd_soc_dapm_route *route, |
2480 | unsigned int is_prefixed) | ||
2477 | { | 2481 | { |
2478 | struct snd_soc_dapm_widget *wsource = NULL, *wsink = NULL, *w; | 2482 | struct snd_soc_dapm_widget *wsource = NULL, *wsink = NULL, *w; |
2479 | struct snd_soc_dapm_widget *wtsource = NULL, *wtsink = NULL; | 2483 | struct snd_soc_dapm_widget *wtsource = NULL, *wtsink = NULL; |
@@ -2483,7 +2487,7 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, | |||
2483 | char prefixed_source[80]; | 2487 | char prefixed_source[80]; |
2484 | int ret; | 2488 | int ret; |
2485 | 2489 | ||
2486 | if (dapm->codec && dapm->codec->name_prefix) { | 2490 | if (dapm->codec && dapm->codec->name_prefix && !is_prefixed) { |
2487 | snprintf(prefixed_sink, sizeof(prefixed_sink), "%s %s", | 2491 | snprintf(prefixed_sink, sizeof(prefixed_sink), "%s %s", |
2488 | dapm->codec->name_prefix, route->sink); | 2492 | dapm->codec->name_prefix, route->sink); |
2489 | sink = prefixed_sink; | 2493 | sink = prefixed_sink; |
@@ -2611,7 +2615,7 @@ int snd_soc_dapm_add_routes(struct snd_soc_dapm_context *dapm, | |||
2611 | 2615 | ||
2612 | mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_INIT); | 2616 | mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_INIT); |
2613 | for (i = 0; i < num; i++) { | 2617 | for (i = 0; i < num; i++) { |
2614 | r = snd_soc_dapm_add_route(dapm, route); | 2618 | r = snd_soc_dapm_add_route(dapm, route, false); |
2615 | if (r < 0) { | 2619 | if (r < 0) { |
2616 | dev_err(dapm->dev, "ASoC: Failed to add route %s -> %s -> %s\n", | 2620 | dev_err(dapm->dev, "ASoC: Failed to add route %s -> %s -> %s\n", |
2617 | route->source, | 2621 | route->source, |
@@ -2782,7 +2786,8 @@ int snd_soc_dapm_new_widgets(struct snd_soc_card *card) | |||
2782 | 2786 | ||
2783 | /* Read the initial power state from the device */ | 2787 | /* Read the initial power state from the device */ |
2784 | if (w->reg >= 0) { | 2788 | if (w->reg >= 0) { |
2785 | val = soc_widget_read(w, w->reg) >> w->shift; | 2789 | soc_widget_read(w, w->reg, &val); |
2790 | val = val >> w->shift; | ||
2786 | val &= w->mask; | 2791 | val &= w->mask; |
2787 | if (val == w->on_val) | 2792 | if (val == w->on_val) |
2788 | w->power = 1; | 2793 | w->power = 1; |
@@ -2868,6 +2873,7 @@ int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, | |||
2868 | unsigned int val; | 2873 | unsigned int val; |
2869 | int connect, change; | 2874 | int connect, change; |
2870 | struct snd_soc_dapm_update update; | 2875 | struct snd_soc_dapm_update update; |
2876 | int ret = 0; | ||
2871 | 2877 | ||
2872 | if (snd_soc_volsw_is_stereo(mc)) | 2878 | if (snd_soc_volsw_is_stereo(mc)) |
2873 | dev_warn(codec->dapm.dev, | 2879 | dev_warn(codec->dapm.dev, |
@@ -2901,12 +2907,16 @@ int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, | |||
2901 | card->update = &update; | 2907 | card->update = &update; |
2902 | } | 2908 | } |
2903 | 2909 | ||
2904 | soc_dapm_mixer_update_power(card, kcontrol, connect); | 2910 | ret = soc_dapm_mixer_update_power(card, kcontrol, connect); |
2905 | 2911 | ||
2906 | card->update = NULL; | 2912 | card->update = NULL; |
2907 | } | 2913 | } |
2908 | 2914 | ||
2909 | mutex_unlock(&card->dapm_mutex); | 2915 | mutex_unlock(&card->dapm_mutex); |
2916 | |||
2917 | if (ret > 0) | ||
2918 | soc_dpcm_runtime_update(card); | ||
2919 | |||
2910 | return change; | 2920 | return change; |
2911 | } | 2921 | } |
2912 | EXPORT_SYMBOL_GPL(snd_soc_dapm_put_volsw); | 2922 | EXPORT_SYMBOL_GPL(snd_soc_dapm_put_volsw); |
@@ -2955,6 +2965,7 @@ int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol, | |||
2955 | unsigned int val, mux, change; | 2965 | unsigned int val, mux, change; |
2956 | unsigned int mask; | 2966 | unsigned int mask; |
2957 | struct snd_soc_dapm_update update; | 2967 | struct snd_soc_dapm_update update; |
2968 | int ret = 0; | ||
2958 | 2969 | ||
2959 | if (ucontrol->value.enumerated.item[0] > e->max - 1) | 2970 | if (ucontrol->value.enumerated.item[0] > e->max - 1) |
2960 | return -EINVAL; | 2971 | return -EINVAL; |
@@ -2978,12 +2989,16 @@ int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol, | |||
2978 | update.val = val; | 2989 | update.val = val; |
2979 | card->update = &update; | 2990 | card->update = &update; |
2980 | 2991 | ||
2981 | soc_dapm_mux_update_power(card, kcontrol, mux, e); | 2992 | ret = soc_dapm_mux_update_power(card, kcontrol, mux, e); |
2982 | 2993 | ||
2983 | card->update = NULL; | 2994 | card->update = NULL; |
2984 | } | 2995 | } |
2985 | 2996 | ||
2986 | mutex_unlock(&card->dapm_mutex); | 2997 | mutex_unlock(&card->dapm_mutex); |
2998 | |||
2999 | if (ret > 0) | ||
3000 | soc_dpcm_runtime_update(card); | ||
3001 | |||
2987 | return change; | 3002 | return change; |
2988 | } | 3003 | } |
2989 | EXPORT_SYMBOL_GPL(snd_soc_dapm_put_enum_double); | 3004 | EXPORT_SYMBOL_GPL(snd_soc_dapm_put_enum_double); |
@@ -3019,6 +3034,7 @@ int snd_soc_dapm_put_enum_virt(struct snd_kcontrol *kcontrol, | |||
3019 | struct soc_enum *e = | 3034 | struct soc_enum *e = |
3020 | (struct soc_enum *)kcontrol->private_value; | 3035 | (struct soc_enum *)kcontrol->private_value; |
3021 | int change; | 3036 | int change; |
3037 | int ret = 0; | ||
3022 | 3038 | ||
3023 | if (ucontrol->value.enumerated.item[0] >= e->max) | 3039 | if (ucontrol->value.enumerated.item[0] >= e->max) |
3024 | return -EINVAL; | 3040 | return -EINVAL; |
@@ -3028,9 +3044,13 @@ int snd_soc_dapm_put_enum_virt(struct snd_kcontrol *kcontrol, | |||
3028 | value = ucontrol->value.enumerated.item[0]; | 3044 | value = ucontrol->value.enumerated.item[0]; |
3029 | change = dapm_kcontrol_set_value(kcontrol, value); | 3045 | change = dapm_kcontrol_set_value(kcontrol, value); |
3030 | if (change) | 3046 | if (change) |
3031 | soc_dapm_mux_update_power(card, kcontrol, value, e); | 3047 | ret = soc_dapm_mux_update_power(card, kcontrol, value, e); |
3032 | 3048 | ||
3033 | mutex_unlock(&card->dapm_mutex); | 3049 | mutex_unlock(&card->dapm_mutex); |
3050 | |||
3051 | if (ret > 0) | ||
3052 | soc_dpcm_runtime_update(card); | ||
3053 | |||
3034 | return change; | 3054 | return change; |
3035 | } | 3055 | } |
3036 | EXPORT_SYMBOL_GPL(snd_soc_dapm_put_enum_virt); | 3056 | EXPORT_SYMBOL_GPL(snd_soc_dapm_put_enum_virt); |
@@ -3097,6 +3117,7 @@ int snd_soc_dapm_put_value_enum_double(struct snd_kcontrol *kcontrol, | |||
3097 | unsigned int val, mux, change; | 3117 | unsigned int val, mux, change; |
3098 | unsigned int mask; | 3118 | unsigned int mask; |
3099 | struct snd_soc_dapm_update update; | 3119 | struct snd_soc_dapm_update update; |
3120 | int ret = 0; | ||
3100 | 3121 | ||
3101 | if (ucontrol->value.enumerated.item[0] > e->max - 1) | 3122 | if (ucontrol->value.enumerated.item[0] > e->max - 1) |
3102 | return -EINVAL; | 3123 | return -EINVAL; |
@@ -3120,12 +3141,16 @@ int snd_soc_dapm_put_value_enum_double(struct snd_kcontrol *kcontrol, | |||
3120 | update.val = val; | 3141 | update.val = val; |
3121 | card->update = &update; | 3142 | card->update = &update; |
3122 | 3143 | ||
3123 | soc_dapm_mux_update_power(card, kcontrol, mux, e); | 3144 | ret = soc_dapm_mux_update_power(card, kcontrol, mux, e); |
3124 | 3145 | ||
3125 | card->update = NULL; | 3146 | card->update = NULL; |
3126 | } | 3147 | } |
3127 | 3148 | ||
3128 | mutex_unlock(&card->dapm_mutex); | 3149 | mutex_unlock(&card->dapm_mutex); |
3150 | |||
3151 | if (ret > 0) | ||
3152 | soc_dpcm_runtime_update(card); | ||
3153 | |||
3129 | return change; | 3154 | return change; |
3130 | } | 3155 | } |
3131 | EXPORT_SYMBOL_GPL(snd_soc_dapm_put_value_enum_double); | 3156 | EXPORT_SYMBOL_GPL(snd_soc_dapm_put_value_enum_double); |
@@ -3614,6 +3639,55 @@ int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card) | |||
3614 | return 0; | 3639 | return 0; |
3615 | } | 3640 | } |
3616 | 3641 | ||
3642 | void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card) | ||
3643 | { | ||
3644 | struct snd_soc_pcm_runtime *rtd = card->rtd; | ||
3645 | struct snd_soc_dai *cpu_dai, *codec_dai; | ||
3646 | struct snd_soc_dapm_route r; | ||
3647 | int i; | ||
3648 | |||
3649 | memset(&r, 0, sizeof(r)); | ||
3650 | |||
3651 | /* for each BE DAI link... */ | ||
3652 | for (i = 0; i < card->num_rtd; i++) { | ||
3653 | rtd = &card->rtd[i]; | ||
3654 | cpu_dai = rtd->cpu_dai; | ||
3655 | codec_dai = rtd->codec_dai; | ||
3656 | |||
3657 | /* dynamic FE links have no fixed DAI mapping */ | ||
3658 | if (rtd->dai_link->dynamic) | ||
3659 | continue; | ||
3660 | |||
3661 | /* there is no point in connecting BE DAI links with dummies */ | ||
3662 | if (snd_soc_dai_is_dummy(codec_dai) || | ||
3663 | snd_soc_dai_is_dummy(cpu_dai)) | ||
3664 | continue; | ||
3665 | |||
3666 | /* connect BE DAI playback if widgets are valid */ | ||
3667 | if (codec_dai->playback_widget && cpu_dai->playback_widget) { | ||
3668 | r.source = cpu_dai->playback_widget->name; | ||
3669 | r.sink = codec_dai->playback_widget->name; | ||
3670 | dev_dbg(rtd->dev, "connected DAI link %s:%s -> %s:%s\n", | ||
3671 | cpu_dai->codec->name, r.source, | ||
3672 | codec_dai->platform->name, r.sink); | ||
3673 | |||
3674 | snd_soc_dapm_add_route(&card->dapm, &r, true); | ||
3675 | } | ||
3676 | |||
3677 | /* connect BE DAI capture if widgets are valid */ | ||
3678 | if (codec_dai->capture_widget && cpu_dai->capture_widget) { | ||
3679 | r.source = codec_dai->capture_widget->name; | ||
3680 | r.sink = cpu_dai->capture_widget->name; | ||
3681 | dev_dbg(rtd->dev, "connected DAI link %s:%s -> %s:%s\n", | ||
3682 | codec_dai->codec->name, r.source, | ||
3683 | cpu_dai->platform->name, r.sink); | ||
3684 | |||
3685 | snd_soc_dapm_add_route(&card->dapm, &r, true); | ||
3686 | } | ||
3687 | |||
3688 | } | ||
3689 | } | ||
3690 | |||
3617 | static void soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream, | 3691 | static void soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream, |
3618 | int event) | 3692 | int event) |
3619 | { | 3693 | { |
diff --git a/sound/soc/soc-devres.c b/sound/soc/soc-devres.c index 3449c1e909ae..7ac745df1412 100644 --- a/sound/soc/soc-devres.c +++ b/sound/soc/soc-devres.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/moduleparam.h> | 13 | #include <linux/moduleparam.h> |
14 | #include <sound/soc.h> | 14 | #include <sound/soc.h> |
15 | #include <sound/dmaengine_pcm.h> | ||
15 | 16 | ||
16 | static void devm_component_release(struct device *dev, void *res) | 17 | static void devm_component_release(struct device *dev, void *res) |
17 | { | 18 | { |
@@ -84,3 +85,43 @@ int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card) | |||
84 | return ret; | 85 | return ret; |
85 | } | 86 | } |
86 | EXPORT_SYMBOL_GPL(devm_snd_soc_register_card); | 87 | EXPORT_SYMBOL_GPL(devm_snd_soc_register_card); |
88 | |||
89 | #ifdef CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM | ||
90 | |||
91 | static void devm_dmaengine_pcm_release(struct device *dev, void *res) | ||
92 | { | ||
93 | snd_dmaengine_pcm_unregister(*(struct device **)res); | ||
94 | } | ||
95 | |||
96 | /** | ||
97 | * devm_snd_dmaengine_pcm_register - resource managed dmaengine PCM registration | ||
98 | * @dev: The parent device for the PCM device | ||
99 | * @config: Platform specific PCM configuration | ||
100 | * @flags: Platform specific quirks | ||
101 | * | ||
102 | * Register a dmaengine based PCM device with automatic unregistration when the | ||
103 | * device is unregistered. | ||
104 | */ | ||
105 | int devm_snd_dmaengine_pcm_register(struct device *dev, | ||
106 | const struct snd_dmaengine_pcm_config *config, unsigned int flags) | ||
107 | { | ||
108 | struct device **ptr; | ||
109 | int ret; | ||
110 | |||
111 | ptr = devres_alloc(devm_dmaengine_pcm_release, sizeof(*ptr), GFP_KERNEL); | ||
112 | if (!ptr) | ||
113 | return -ENOMEM; | ||
114 | |||
115 | ret = snd_dmaengine_pcm_register(dev, config, flags); | ||
116 | if (ret == 0) { | ||
117 | *ptr = dev; | ||
118 | devres_add(dev, ptr); | ||
119 | } else { | ||
120 | devres_free(ptr); | ||
121 | } | ||
122 | |||
123 | return ret; | ||
124 | } | ||
125 | EXPORT_SYMBOL_GPL(devm_snd_dmaengine_pcm_register); | ||
126 | |||
127 | #endif | ||
diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index 41949af3baae..5bace124ef43 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c | |||
@@ -137,10 +137,15 @@ static int dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream *substrea | |||
137 | hw.buffer_bytes_max = SIZE_MAX; | 137 | hw.buffer_bytes_max = SIZE_MAX; |
138 | hw.fifo_size = dma_data->fifo_size; | 138 | hw.fifo_size = dma_data->fifo_size; |
139 | 139 | ||
140 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE) | ||
141 | hw.info |= SNDRV_PCM_INFO_BATCH; | ||
142 | |||
140 | ret = dma_get_slave_caps(chan, &dma_caps); | 143 | ret = dma_get_slave_caps(chan, &dma_caps); |
141 | if (ret == 0) { | 144 | if (ret == 0) { |
142 | if (dma_caps.cmd_pause) | 145 | if (dma_caps.cmd_pause) |
143 | hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME; | 146 | hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME; |
147 | if (dma_caps.residue_granularity <= DMA_RESIDUE_GRANULARITY_SEGMENT) | ||
148 | hw.info |= SNDRV_PCM_INFO_BATCH; | ||
144 | } | 149 | } |
145 | 150 | ||
146 | return snd_soc_set_runtime_hwparams(substream, &hw); | 151 | return snd_soc_set_runtime_hwparams(substream, &hw); |
@@ -171,17 +176,35 @@ static struct dma_chan *dmaengine_pcm_compat_request_channel( | |||
171 | { | 176 | { |
172 | struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); | 177 | struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); |
173 | struct snd_dmaengine_dai_dma_data *dma_data; | 178 | struct snd_dmaengine_dai_dma_data *dma_data; |
179 | dma_filter_fn fn = NULL; | ||
174 | 180 | ||
175 | dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | 181 | dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); |
176 | 182 | ||
177 | if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0]) | 183 | if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0]) |
178 | return pcm->chan[0]; | 184 | return pcm->chan[0]; |
179 | 185 | ||
180 | if (pcm->config->compat_request_channel) | 186 | if (pcm->config && pcm->config->compat_request_channel) |
181 | return pcm->config->compat_request_channel(rtd, substream); | 187 | return pcm->config->compat_request_channel(rtd, substream); |
182 | 188 | ||
183 | return snd_dmaengine_pcm_request_channel(pcm->config->compat_filter_fn, | 189 | if (pcm->config) |
184 | dma_data->filter_data); | 190 | fn = pcm->config->compat_filter_fn; |
191 | |||
192 | return snd_dmaengine_pcm_request_channel(fn, dma_data->filter_data); | ||
193 | } | ||
194 | |||
195 | static bool dmaengine_pcm_can_report_residue(struct dma_chan *chan) | ||
196 | { | ||
197 | struct dma_slave_caps dma_caps; | ||
198 | int ret; | ||
199 | |||
200 | ret = dma_get_slave_caps(chan, &dma_caps); | ||
201 | if (ret != 0) | ||
202 | return true; | ||
203 | |||
204 | if (dma_caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) | ||
205 | return false; | ||
206 | |||
207 | return true; | ||
185 | } | 208 | } |
186 | 209 | ||
187 | static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) | 210 | static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) |
@@ -236,6 +259,16 @@ static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) | |||
236 | max_buffer_size); | 259 | max_buffer_size); |
237 | if (ret) | 260 | if (ret) |
238 | goto err_free; | 261 | goto err_free; |
262 | |||
263 | /* | ||
264 | * This will only return false if we know for sure that at least | ||
265 | * one channel does not support residue reporting. If the DMA | ||
266 | * driver does not implement the slave_caps API we rely having | ||
267 | * the NO_RESIDUE flag set manually in case residue reporting is | ||
268 | * not supported. | ||
269 | */ | ||
270 | if (!dmaengine_pcm_can_report_residue(pcm->chan[i])) | ||
271 | pcm->flags |= SND_DMAENGINE_PCM_FLAG_NO_RESIDUE; | ||
239 | } | 272 | } |
240 | 273 | ||
241 | return 0; | 274 | return 0; |
@@ -245,6 +278,18 @@ err_free: | |||
245 | return ret; | 278 | return ret; |
246 | } | 279 | } |
247 | 280 | ||
281 | static snd_pcm_uframes_t dmaengine_pcm_pointer( | ||
282 | struct snd_pcm_substream *substream) | ||
283 | { | ||
284 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
285 | struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); | ||
286 | |||
287 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE) | ||
288 | return snd_dmaengine_pcm_pointer_no_residue(substream); | ||
289 | else | ||
290 | return snd_dmaengine_pcm_pointer(substream); | ||
291 | } | ||
292 | |||
248 | static const struct snd_pcm_ops dmaengine_pcm_ops = { | 293 | static const struct snd_pcm_ops dmaengine_pcm_ops = { |
249 | .open = dmaengine_pcm_open, | 294 | .open = dmaengine_pcm_open, |
250 | .close = snd_dmaengine_pcm_close, | 295 | .close = snd_dmaengine_pcm_close, |
@@ -252,7 +297,7 @@ static const struct snd_pcm_ops dmaengine_pcm_ops = { | |||
252 | .hw_params = dmaengine_pcm_hw_params, | 297 | .hw_params = dmaengine_pcm_hw_params, |
253 | .hw_free = snd_pcm_lib_free_pages, | 298 | .hw_free = snd_pcm_lib_free_pages, |
254 | .trigger = snd_dmaengine_pcm_trigger, | 299 | .trigger = snd_dmaengine_pcm_trigger, |
255 | .pointer = snd_dmaengine_pcm_pointer, | 300 | .pointer = dmaengine_pcm_pointer, |
256 | }; | 301 | }; |
257 | 302 | ||
258 | static const struct snd_soc_platform_driver dmaengine_pcm_platform = { | 303 | static const struct snd_soc_platform_driver dmaengine_pcm_platform = { |
@@ -262,47 +307,59 @@ static const struct snd_soc_platform_driver dmaengine_pcm_platform = { | |||
262 | .probe_order = SND_SOC_COMP_ORDER_LATE, | 307 | .probe_order = SND_SOC_COMP_ORDER_LATE, |
263 | }; | 308 | }; |
264 | 309 | ||
265 | static const struct snd_pcm_ops dmaengine_no_residue_pcm_ops = { | ||
266 | .open = dmaengine_pcm_open, | ||
267 | .close = snd_dmaengine_pcm_close, | ||
268 | .ioctl = snd_pcm_lib_ioctl, | ||
269 | .hw_params = dmaengine_pcm_hw_params, | ||
270 | .hw_free = snd_pcm_lib_free_pages, | ||
271 | .trigger = snd_dmaengine_pcm_trigger, | ||
272 | .pointer = snd_dmaengine_pcm_pointer_no_residue, | ||
273 | }; | ||
274 | |||
275 | static const struct snd_soc_platform_driver dmaengine_no_residue_pcm_platform = { | ||
276 | .ops = &dmaengine_no_residue_pcm_ops, | ||
277 | .pcm_new = dmaengine_pcm_new, | ||
278 | .pcm_free = dmaengine_pcm_free, | ||
279 | .probe_order = SND_SOC_COMP_ORDER_LATE, | ||
280 | }; | ||
281 | |||
282 | static const char * const dmaengine_pcm_dma_channel_names[] = { | 310 | static const char * const dmaengine_pcm_dma_channel_names[] = { |
283 | [SNDRV_PCM_STREAM_PLAYBACK] = "tx", | 311 | [SNDRV_PCM_STREAM_PLAYBACK] = "tx", |
284 | [SNDRV_PCM_STREAM_CAPTURE] = "rx", | 312 | [SNDRV_PCM_STREAM_CAPTURE] = "rx", |
285 | }; | 313 | }; |
286 | 314 | ||
287 | static void dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm, | 315 | static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm, |
288 | struct device *dev) | 316 | struct device *dev, const struct snd_dmaengine_pcm_config *config) |
289 | { | 317 | { |
290 | unsigned int i; | 318 | unsigned int i; |
319 | const char *name; | ||
320 | struct dma_chan *chan; | ||
291 | 321 | ||
292 | if ((pcm->flags & (SND_DMAENGINE_PCM_FLAG_NO_DT | | 322 | if ((pcm->flags & (SND_DMAENGINE_PCM_FLAG_NO_DT | |
293 | SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) || | 323 | SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) || |
294 | !dev->of_node) | 324 | !dev->of_node) |
295 | return; | 325 | return 0; |
326 | |||
327 | if (config && config->dma_dev) { | ||
328 | /* | ||
329 | * If this warning is seen, it probably means that your Linux | ||
330 | * device structure does not match your HW device structure. | ||
331 | * It would be best to refactor the Linux device structure to | ||
332 | * correctly match the HW structure. | ||
333 | */ | ||
334 | dev_warn(dev, "DMA channels sourced from device %s", | ||
335 | dev_name(config->dma_dev)); | ||
336 | dev = config->dma_dev; | ||
337 | } | ||
296 | 338 | ||
297 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) { | 339 | for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE; |
298 | pcm->chan[0] = dma_request_slave_channel(dev, "rx-tx"); | 340 | i++) { |
299 | pcm->chan[1] = pcm->chan[0]; | 341 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) |
300 | } else { | 342 | name = "rx-tx"; |
301 | for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE; i++) { | 343 | else |
302 | pcm->chan[i] = dma_request_slave_channel(dev, | 344 | name = dmaengine_pcm_dma_channel_names[i]; |
303 | dmaengine_pcm_dma_channel_names[i]); | 345 | if (config && config->chan_names[i]) |
346 | name = config->chan_names[i]; | ||
347 | chan = dma_request_slave_channel_reason(dev, name); | ||
348 | if (IS_ERR(chan)) { | ||
349 | if (PTR_ERR(chan) == -EPROBE_DEFER) | ||
350 | return -EPROBE_DEFER; | ||
351 | pcm->chan[i] = NULL; | ||
352 | } else { | ||
353 | pcm->chan[i] = chan; | ||
304 | } | 354 | } |
355 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) | ||
356 | break; | ||
305 | } | 357 | } |
358 | |||
359 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) | ||
360 | pcm->chan[1] = pcm->chan[0]; | ||
361 | |||
362 | return 0; | ||
306 | } | 363 | } |
307 | 364 | ||
308 | static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm) | 365 | static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm) |
@@ -338,14 +395,12 @@ int snd_dmaengine_pcm_register(struct device *dev, | |||
338 | pcm->config = config; | 395 | pcm->config = config; |
339 | pcm->flags = flags; | 396 | pcm->flags = flags; |
340 | 397 | ||
341 | dmaengine_pcm_request_chan_of(pcm, dev); | 398 | ret = dmaengine_pcm_request_chan_of(pcm, dev, config); |
399 | if (ret) | ||
400 | goto err_free_dma; | ||
342 | 401 | ||
343 | if (flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE) | 402 | ret = snd_soc_add_platform(dev, &pcm->platform, |
344 | ret = snd_soc_add_platform(dev, &pcm->platform, | 403 | &dmaengine_pcm_platform); |
345 | &dmaengine_no_residue_pcm_platform); | ||
346 | else | ||
347 | ret = snd_soc_add_platform(dev, &pcm->platform, | ||
348 | &dmaengine_pcm_platform); | ||
349 | if (ret) | 404 | if (ret) |
350 | goto err_free_dma; | 405 | goto err_free_dma; |
351 | 406 | ||
diff --git a/sound/soc/soc-io.c b/sound/soc/soc-io.c index 4f11d23f2062..aa886cca3ecf 100644 --- a/sound/soc/soc-io.c +++ b/sound/soc/soc-io.c | |||
@@ -99,14 +99,14 @@ int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, | |||
99 | config.val_bits = data_bits; | 99 | config.val_bits = data_bits; |
100 | 100 | ||
101 | switch (control) { | 101 | switch (control) { |
102 | #if defined(CONFIG_REGMAP_I2C) || defined(CONFIG_REGMAP_I2C_MODULE) | 102 | #if IS_ENABLED(CONFIG_REGMAP_I2C) |
103 | case SND_SOC_I2C: | 103 | case SND_SOC_I2C: |
104 | codec->control_data = regmap_init_i2c(to_i2c_client(codec->dev), | 104 | codec->control_data = regmap_init_i2c(to_i2c_client(codec->dev), |
105 | &config); | 105 | &config); |
106 | break; | 106 | break; |
107 | #endif | 107 | #endif |
108 | 108 | ||
109 | #if defined(CONFIG_REGMAP_SPI) || defined(CONFIG_REGMAP_SPI_MODULE) | 109 | #if IS_ENABLED(CONFIG_REGMAP_SPI) |
110 | case SND_SOC_SPI: | 110 | case SND_SOC_SPI: |
111 | codec->control_data = regmap_init_spi(to_spi_device(codec->dev), | 111 | codec->control_data = regmap_init_spi(to_spi_device(codec->dev), |
112 | &config); | 112 | &config); |
diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index 891b9a9bcbf8..47e1ce771e65 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c | |||
@@ -58,7 +58,7 @@ int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, | |||
58 | EXPORT_SYMBOL_GPL(snd_soc_set_runtime_hwparams); | 58 | EXPORT_SYMBOL_GPL(snd_soc_set_runtime_hwparams); |
59 | 59 | ||
60 | /* DPCM stream event, send event to FE and all active BEs. */ | 60 | /* DPCM stream event, send event to FE and all active BEs. */ |
61 | static int dpcm_dapm_stream_event(struct snd_soc_pcm_runtime *fe, int dir, | 61 | int dpcm_dapm_stream_event(struct snd_soc_pcm_runtime *fe, int dir, |
62 | int event) | 62 | int event) |
63 | { | 63 | { |
64 | struct snd_soc_dpcm *dpcm; | 64 | struct snd_soc_dpcm *dpcm; |
@@ -84,35 +84,117 @@ static int soc_pcm_apply_symmetry(struct snd_pcm_substream *substream, | |||
84 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 84 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
85 | int ret; | 85 | int ret; |
86 | 86 | ||
87 | if (!soc_dai->driver->symmetric_rates && | 87 | if (soc_dai->rate && (soc_dai->driver->symmetric_rates || |
88 | !rtd->dai_link->symmetric_rates) | 88 | rtd->dai_link->symmetric_rates)) { |
89 | return 0; | 89 | dev_dbg(soc_dai->dev, "ASoC: Symmetry forces %dHz rate\n", |
90 | soc_dai->rate); | ||
90 | 91 | ||
91 | /* This can happen if multiple streams are starting simultaneously - | 92 | ret = snd_pcm_hw_constraint_minmax(substream->runtime, |
92 | * the second can need to get its constraints before the first has | 93 | SNDRV_PCM_HW_PARAM_RATE, |
93 | * picked a rate. Complain and allow the application to carry on. | 94 | soc_dai->rate, soc_dai->rate); |
94 | */ | 95 | if (ret < 0) { |
95 | if (!soc_dai->rate) { | 96 | dev_err(soc_dai->dev, |
96 | dev_warn(soc_dai->dev, | 97 | "ASoC: Unable to apply rate constraint: %d\n", |
97 | "ASoC: Not enforcing symmetric_rates due to race\n"); | 98 | ret); |
98 | return 0; | 99 | return ret; |
100 | } | ||
99 | } | 101 | } |
100 | 102 | ||
101 | dev_dbg(soc_dai->dev, "ASoC: Symmetry forces %dHz rate\n", soc_dai->rate); | 103 | if (soc_dai->channels && (soc_dai->driver->symmetric_channels || |
104 | rtd->dai_link->symmetric_channels)) { | ||
105 | dev_dbg(soc_dai->dev, "ASoC: Symmetry forces %d channel(s)\n", | ||
106 | soc_dai->channels); | ||
102 | 107 | ||
103 | ret = snd_pcm_hw_constraint_minmax(substream->runtime, | 108 | ret = snd_pcm_hw_constraint_minmax(substream->runtime, |
104 | SNDRV_PCM_HW_PARAM_RATE, | 109 | SNDRV_PCM_HW_PARAM_CHANNELS, |
105 | soc_dai->rate, soc_dai->rate); | 110 | soc_dai->channels, |
106 | if (ret < 0) { | 111 | soc_dai->channels); |
107 | dev_err(soc_dai->dev, | 112 | if (ret < 0) { |
108 | "ASoC: Unable to apply rate symmetry constraint: %d\n", | 113 | dev_err(soc_dai->dev, |
109 | ret); | 114 | "ASoC: Unable to apply channel symmetry constraint: %d\n", |
110 | return ret; | 115 | ret); |
116 | return ret; | ||
117 | } | ||
118 | } | ||
119 | |||
120 | if (soc_dai->sample_bits && (soc_dai->driver->symmetric_samplebits || | ||
121 | rtd->dai_link->symmetric_samplebits)) { | ||
122 | dev_dbg(soc_dai->dev, "ASoC: Symmetry forces %d sample bits\n", | ||
123 | soc_dai->sample_bits); | ||
124 | |||
125 | ret = snd_pcm_hw_constraint_minmax(substream->runtime, | ||
126 | SNDRV_PCM_HW_PARAM_SAMPLE_BITS, | ||
127 | soc_dai->sample_bits, | ||
128 | soc_dai->sample_bits); | ||
129 | if (ret < 0) { | ||
130 | dev_err(soc_dai->dev, | ||
131 | "ASoC: Unable to apply sample bits symmetry constraint: %d\n", | ||
132 | ret); | ||
133 | return ret; | ||
134 | } | ||
135 | } | ||
136 | |||
137 | return 0; | ||
138 | } | ||
139 | |||
140 | static int soc_pcm_params_symmetry(struct snd_pcm_substream *substream, | ||
141 | struct snd_pcm_hw_params *params) | ||
142 | { | ||
143 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
144 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | ||
145 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | ||
146 | unsigned int rate, channels, sample_bits, symmetry; | ||
147 | |||
148 | rate = params_rate(params); | ||
149 | channels = params_channels(params); | ||
150 | sample_bits = snd_pcm_format_physical_width(params_format(params)); | ||
151 | |||
152 | /* reject unmatched parameters when applying symmetry */ | ||
153 | symmetry = cpu_dai->driver->symmetric_rates || | ||
154 | codec_dai->driver->symmetric_rates || | ||
155 | rtd->dai_link->symmetric_rates; | ||
156 | if (symmetry && cpu_dai->rate && cpu_dai->rate != rate) { | ||
157 | dev_err(rtd->dev, "ASoC: unmatched rate symmetry: %d - %d\n", | ||
158 | cpu_dai->rate, rate); | ||
159 | return -EINVAL; | ||
160 | } | ||
161 | |||
162 | symmetry = cpu_dai->driver->symmetric_channels || | ||
163 | codec_dai->driver->symmetric_channels || | ||
164 | rtd->dai_link->symmetric_channels; | ||
165 | if (symmetry && cpu_dai->channels && cpu_dai->channels != channels) { | ||
166 | dev_err(rtd->dev, "ASoC: unmatched channel symmetry: %d - %d\n", | ||
167 | cpu_dai->channels, channels); | ||
168 | return -EINVAL; | ||
169 | } | ||
170 | |||
171 | symmetry = cpu_dai->driver->symmetric_samplebits || | ||
172 | codec_dai->driver->symmetric_samplebits || | ||
173 | rtd->dai_link->symmetric_samplebits; | ||
174 | if (symmetry && cpu_dai->sample_bits && cpu_dai->sample_bits != sample_bits) { | ||
175 | dev_err(rtd->dev, "ASoC: unmatched sample bits symmetry: %d - %d\n", | ||
176 | cpu_dai->sample_bits, sample_bits); | ||
177 | return -EINVAL; | ||
111 | } | 178 | } |
112 | 179 | ||
113 | return 0; | 180 | return 0; |
114 | } | 181 | } |
115 | 182 | ||
183 | static bool soc_pcm_has_symmetry(struct snd_pcm_substream *substream) | ||
184 | { | ||
185 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
186 | struct snd_soc_dai_driver *cpu_driver = rtd->cpu_dai->driver; | ||
187 | struct snd_soc_dai_driver *codec_driver = rtd->codec_dai->driver; | ||
188 | struct snd_soc_dai_link *link = rtd->dai_link; | ||
189 | |||
190 | return cpu_driver->symmetric_rates || codec_driver->symmetric_rates || | ||
191 | link->symmetric_rates || cpu_driver->symmetric_channels || | ||
192 | codec_driver->symmetric_channels || link->symmetric_channels || | ||
193 | cpu_driver->symmetric_samplebits || | ||
194 | codec_driver->symmetric_samplebits || | ||
195 | link->symmetric_samplebits; | ||
196 | } | ||
197 | |||
116 | /* | 198 | /* |
117 | * List of sample sizes that might go over the bus for parameter | 199 | * List of sample sizes that might go over the bus for parameter |
118 | * application. There ought to be a wildcard sample size for things | 200 | * application. There ought to be a wildcard sample size for things |
@@ -158,14 +240,15 @@ static void soc_pcm_init_runtime_hw(struct snd_pcm_runtime *runtime, | |||
158 | cpu_stream->channels_min); | 240 | cpu_stream->channels_min); |
159 | hw->channels_max = min(codec_stream->channels_max, | 241 | hw->channels_max = min(codec_stream->channels_max, |
160 | cpu_stream->channels_max); | 242 | cpu_stream->channels_max); |
161 | hw->formats = codec_stream->formats & cpu_stream->formats; | 243 | if (hw->formats) |
162 | hw->rates = codec_stream->rates & cpu_stream->rates; | 244 | hw->formats &= codec_stream->formats & cpu_stream->formats; |
163 | if (codec_stream->rates | 245 | else |
164 | & (SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_CONTINUOUS)) | 246 | hw->formats = codec_stream->formats & cpu_stream->formats; |
165 | hw->rates |= cpu_stream->rates; | 247 | hw->rates = snd_pcm_rate_mask_intersect(codec_stream->rates, |
166 | if (cpu_stream->rates | 248 | cpu_stream->rates); |
167 | & (SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_CONTINUOUS)) | 249 | |
168 | hw->rates |= codec_stream->rates; | 250 | hw->rate_min = 0; |
251 | hw->rate_max = UINT_MAX; | ||
169 | 252 | ||
170 | snd_pcm_limit_hw_rates(runtime); | 253 | snd_pcm_limit_hw_rates(runtime); |
171 | 254 | ||
@@ -249,6 +332,9 @@ static int soc_pcm_open(struct snd_pcm_substream *substream) | |||
249 | &cpu_dai_drv->capture); | 332 | &cpu_dai_drv->capture); |
250 | } | 333 | } |
251 | 334 | ||
335 | if (soc_pcm_has_symmetry(substream)) | ||
336 | runtime->hw.info |= SNDRV_PCM_INFO_JOINT_DUPLEX; | ||
337 | |||
252 | ret = -EINVAL; | 338 | ret = -EINVAL; |
253 | if (!runtime->hw.rates) { | 339 | if (!runtime->hw.rates) { |
254 | printk(KERN_ERR "ASoC: %s <-> %s No matching rates\n", | 340 | printk(KERN_ERR "ASoC: %s <-> %s No matching rates\n", |
@@ -396,11 +482,6 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) | |||
396 | if (!codec_dai->active) | 482 | if (!codec_dai->active) |
397 | codec_dai->rate = 0; | 483 | codec_dai->rate = 0; |
398 | 484 | ||
399 | /* Muting the DAC suppresses artifacts caused during digital | ||
400 | * shutdown, for example from stopping clocks. | ||
401 | */ | ||
402 | snd_soc_dai_digital_mute(codec_dai, 1, substream->stream); | ||
403 | |||
404 | if (cpu_dai->driver->ops->shutdown) | 485 | if (cpu_dai->driver->ops->shutdown) |
405 | cpu_dai->driver->ops->shutdown(substream, cpu_dai); | 486 | cpu_dai->driver->ops->shutdown(substream, cpu_dai); |
406 | 487 | ||
@@ -531,6 +612,10 @@ static int soc_pcm_hw_params(struct snd_pcm_substream *substream, | |||
531 | 612 | ||
532 | mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); | 613 | mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); |
533 | 614 | ||
615 | ret = soc_pcm_params_symmetry(substream, params); | ||
616 | if (ret) | ||
617 | goto out; | ||
618 | |||
534 | if (rtd->dai_link->ops && rtd->dai_link->ops->hw_params) { | 619 | if (rtd->dai_link->ops && rtd->dai_link->ops->hw_params) { |
535 | ret = rtd->dai_link->ops->hw_params(substream, params); | 620 | ret = rtd->dai_link->ops->hw_params(substream, params); |
536 | if (ret < 0) { | 621 | if (ret < 0) { |
@@ -567,9 +652,16 @@ static int soc_pcm_hw_params(struct snd_pcm_substream *substream, | |||
567 | } | 652 | } |
568 | } | 653 | } |
569 | 654 | ||
570 | /* store the rate for each DAIs */ | 655 | /* store the parameters for each DAIs */ |
571 | cpu_dai->rate = params_rate(params); | 656 | cpu_dai->rate = params_rate(params); |
657 | cpu_dai->channels = params_channels(params); | ||
658 | cpu_dai->sample_bits = | ||
659 | snd_pcm_format_physical_width(params_format(params)); | ||
660 | |||
572 | codec_dai->rate = params_rate(params); | 661 | codec_dai->rate = params_rate(params); |
662 | codec_dai->channels = params_channels(params); | ||
663 | codec_dai->sample_bits = | ||
664 | snd_pcm_format_physical_width(params_format(params)); | ||
573 | 665 | ||
574 | out: | 666 | out: |
575 | mutex_unlock(&rtd->pcm_mutex); | 667 | mutex_unlock(&rtd->pcm_mutex); |
@@ -604,6 +696,19 @@ static int soc_pcm_hw_free(struct snd_pcm_substream *substream) | |||
604 | 696 | ||
605 | mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); | 697 | mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); |
606 | 698 | ||
699 | /* clear the corresponding DAIs parameters when going to be inactive */ | ||
700 | if (cpu_dai->active == 1) { | ||
701 | cpu_dai->rate = 0; | ||
702 | cpu_dai->channels = 0; | ||
703 | cpu_dai->sample_bits = 0; | ||
704 | } | ||
705 | |||
706 | if (codec_dai->active == 1) { | ||
707 | codec_dai->rate = 0; | ||
708 | codec_dai->channels = 0; | ||
709 | codec_dai->sample_bits = 0; | ||
710 | } | ||
711 | |||
607 | /* apply codec digital mute */ | 712 | /* apply codec digital mute */ |
608 | if ((playback && codec_dai->playback_active == 1) || | 713 | if ((playback && codec_dai->playback_active == 1) || |
609 | (!playback && codec_dai->capture_active == 1)) | 714 | (!playback && codec_dai->capture_active == 1)) |
@@ -672,7 +777,7 @@ static int soc_pcm_bespoke_trigger(struct snd_pcm_substream *substream, | |||
672 | return ret; | 777 | return ret; |
673 | } | 778 | } |
674 | 779 | ||
675 | if (platform->driver->ops && platform->driver->bespoke_trigger) { | 780 | if (platform->driver->bespoke_trigger) { |
676 | ret = platform->driver->bespoke_trigger(substream, cmd); | 781 | ret = platform->driver->bespoke_trigger(substream, cmd); |
677 | if (ret < 0) | 782 | if (ret < 0) |
678 | return ret; | 783 | return ret; |
@@ -780,7 +885,7 @@ static void dpcm_be_reparent(struct snd_soc_pcm_runtime *fe, | |||
780 | } | 885 | } |
781 | 886 | ||
782 | /* disconnect a BE and FE */ | 887 | /* disconnect a BE and FE */ |
783 | static void dpcm_be_disconnect(struct snd_soc_pcm_runtime *fe, int stream) | 888 | void dpcm_be_disconnect(struct snd_soc_pcm_runtime *fe, int stream) |
784 | { | 889 | { |
785 | struct snd_soc_dpcm *dpcm, *d; | 890 | struct snd_soc_dpcm *dpcm, *d; |
786 | 891 | ||
@@ -876,7 +981,7 @@ static int widget_in_list(struct snd_soc_dapm_widget_list *list, | |||
876 | return 0; | 981 | return 0; |
877 | } | 982 | } |
878 | 983 | ||
879 | static int dpcm_path_get(struct snd_soc_pcm_runtime *fe, | 984 | int dpcm_path_get(struct snd_soc_pcm_runtime *fe, |
880 | int stream, struct snd_soc_dapm_widget_list **list_) | 985 | int stream, struct snd_soc_dapm_widget_list **list_) |
881 | { | 986 | { |
882 | struct snd_soc_dai *cpu_dai = fe->cpu_dai; | 987 | struct snd_soc_dai *cpu_dai = fe->cpu_dai; |
@@ -898,11 +1003,6 @@ static int dpcm_path_get(struct snd_soc_pcm_runtime *fe, | |||
898 | return paths; | 1003 | return paths; |
899 | } | 1004 | } |
900 | 1005 | ||
901 | static inline void dpcm_path_put(struct snd_soc_dapm_widget_list **list) | ||
902 | { | ||
903 | kfree(*list); | ||
904 | } | ||
905 | |||
906 | static int dpcm_prune_paths(struct snd_soc_pcm_runtime *fe, int stream, | 1006 | static int dpcm_prune_paths(struct snd_soc_pcm_runtime *fe, int stream, |
907 | struct snd_soc_dapm_widget_list **list_) | 1007 | struct snd_soc_dapm_widget_list **list_) |
908 | { | 1008 | { |
@@ -972,7 +1072,7 @@ static int dpcm_add_paths(struct snd_soc_pcm_runtime *fe, int stream, | |||
972 | continue; | 1072 | continue; |
973 | 1073 | ||
974 | /* don't connect if FE is not running */ | 1074 | /* don't connect if FE is not running */ |
975 | if (!fe->dpcm[stream].runtime) | 1075 | if (!fe->dpcm[stream].runtime && !fe->fe_compr) |
976 | continue; | 1076 | continue; |
977 | 1077 | ||
978 | /* newly connected FE and BE */ | 1078 | /* newly connected FE and BE */ |
@@ -997,7 +1097,7 @@ static int dpcm_add_paths(struct snd_soc_pcm_runtime *fe, int stream, | |||
997 | * Find the corresponding BE DAIs that source or sink audio to this | 1097 | * Find the corresponding BE DAIs that source or sink audio to this |
998 | * FE substream. | 1098 | * FE substream. |
999 | */ | 1099 | */ |
1000 | static int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, | 1100 | int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, |
1001 | int stream, struct snd_soc_dapm_widget_list **list, int new) | 1101 | int stream, struct snd_soc_dapm_widget_list **list, int new) |
1002 | { | 1102 | { |
1003 | if (new) | 1103 | if (new) |
@@ -1006,7 +1106,7 @@ static int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, | |||
1006 | return dpcm_prune_paths(fe, stream, list); | 1106 | return dpcm_prune_paths(fe, stream, list); |
1007 | } | 1107 | } |
1008 | 1108 | ||
1009 | static void dpcm_clear_pending_state(struct snd_soc_pcm_runtime *fe, int stream) | 1109 | void dpcm_clear_pending_state(struct snd_soc_pcm_runtime *fe, int stream) |
1010 | { | 1110 | { |
1011 | struct snd_soc_dpcm *dpcm; | 1111 | struct snd_soc_dpcm *dpcm; |
1012 | 1112 | ||
@@ -1044,7 +1144,7 @@ static void dpcm_be_dai_startup_unwind(struct snd_soc_pcm_runtime *fe, | |||
1044 | } | 1144 | } |
1045 | } | 1145 | } |
1046 | 1146 | ||
1047 | static int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream) | 1147 | int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream) |
1048 | { | 1148 | { |
1049 | struct snd_soc_dpcm *dpcm; | 1149 | struct snd_soc_dpcm *dpcm; |
1050 | int err, count = 0; | 1150 | int err, count = 0; |
@@ -1131,6 +1231,20 @@ unwind: | |||
1131 | return err; | 1231 | return err; |
1132 | } | 1232 | } |
1133 | 1233 | ||
1234 | static void dpcm_init_runtime_hw(struct snd_pcm_runtime *runtime, | ||
1235 | struct snd_soc_pcm_stream *stream) | ||
1236 | { | ||
1237 | runtime->hw.rate_min = stream->rate_min; | ||
1238 | runtime->hw.rate_max = stream->rate_max; | ||
1239 | runtime->hw.channels_min = stream->channels_min; | ||
1240 | runtime->hw.channels_max = stream->channels_max; | ||
1241 | if (runtime->hw.formats) | ||
1242 | runtime->hw.formats &= stream->formats; | ||
1243 | else | ||
1244 | runtime->hw.formats = stream->formats; | ||
1245 | runtime->hw.rates = stream->rates; | ||
1246 | } | ||
1247 | |||
1134 | static void dpcm_set_fe_runtime(struct snd_pcm_substream *substream) | 1248 | static void dpcm_set_fe_runtime(struct snd_pcm_substream *substream) |
1135 | { | 1249 | { |
1136 | struct snd_pcm_runtime *runtime = substream->runtime; | 1250 | struct snd_pcm_runtime *runtime = substream->runtime; |
@@ -1138,21 +1252,10 @@ static void dpcm_set_fe_runtime(struct snd_pcm_substream *substream) | |||
1138 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | 1252 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
1139 | struct snd_soc_dai_driver *cpu_dai_drv = cpu_dai->driver; | 1253 | struct snd_soc_dai_driver *cpu_dai_drv = cpu_dai->driver; |
1140 | 1254 | ||
1141 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | 1255 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
1142 | runtime->hw.rate_min = cpu_dai_drv->playback.rate_min; | 1256 | dpcm_init_runtime_hw(runtime, &cpu_dai_drv->playback); |
1143 | runtime->hw.rate_max = cpu_dai_drv->playback.rate_max; | 1257 | else |
1144 | runtime->hw.channels_min = cpu_dai_drv->playback.channels_min; | 1258 | dpcm_init_runtime_hw(runtime, &cpu_dai_drv->capture); |
1145 | runtime->hw.channels_max = cpu_dai_drv->playback.channels_max; | ||
1146 | runtime->hw.formats &= cpu_dai_drv->playback.formats; | ||
1147 | runtime->hw.rates = cpu_dai_drv->playback.rates; | ||
1148 | } else { | ||
1149 | runtime->hw.rate_min = cpu_dai_drv->capture.rate_min; | ||
1150 | runtime->hw.rate_max = cpu_dai_drv->capture.rate_max; | ||
1151 | runtime->hw.channels_min = cpu_dai_drv->capture.channels_min; | ||
1152 | runtime->hw.channels_max = cpu_dai_drv->capture.channels_max; | ||
1153 | runtime->hw.formats &= cpu_dai_drv->capture.formats; | ||
1154 | runtime->hw.rates = cpu_dai_drv->capture.rates; | ||
1155 | } | ||
1156 | } | 1259 | } |
1157 | 1260 | ||
1158 | static int dpcm_fe_dai_startup(struct snd_pcm_substream *fe_substream) | 1261 | static int dpcm_fe_dai_startup(struct snd_pcm_substream *fe_substream) |
@@ -1193,7 +1296,7 @@ be_err: | |||
1193 | return ret; | 1296 | return ret; |
1194 | } | 1297 | } |
1195 | 1298 | ||
1196 | static int dpcm_be_dai_shutdown(struct snd_soc_pcm_runtime *fe, int stream) | 1299 | int dpcm_be_dai_shutdown(struct snd_soc_pcm_runtime *fe, int stream) |
1197 | { | 1300 | { |
1198 | struct snd_soc_dpcm *dpcm; | 1301 | struct snd_soc_dpcm *dpcm; |
1199 | 1302 | ||
@@ -1254,7 +1357,7 @@ static int dpcm_fe_dai_shutdown(struct snd_pcm_substream *substream) | |||
1254 | return 0; | 1357 | return 0; |
1255 | } | 1358 | } |
1256 | 1359 | ||
1257 | static int dpcm_be_dai_hw_free(struct snd_soc_pcm_runtime *fe, int stream) | 1360 | int dpcm_be_dai_hw_free(struct snd_soc_pcm_runtime *fe, int stream) |
1258 | { | 1361 | { |
1259 | struct snd_soc_dpcm *dpcm; | 1362 | struct snd_soc_dpcm *dpcm; |
1260 | 1363 | ||
@@ -1319,7 +1422,7 @@ static int dpcm_fe_dai_hw_free(struct snd_pcm_substream *substream) | |||
1319 | return 0; | 1422 | return 0; |
1320 | } | 1423 | } |
1321 | 1424 | ||
1322 | static int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) | 1425 | int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) |
1323 | { | 1426 | { |
1324 | struct snd_soc_dpcm *dpcm; | 1427 | struct snd_soc_dpcm *dpcm; |
1325 | int ret; | 1428 | int ret; |
@@ -1449,7 +1552,7 @@ static int dpcm_do_trigger(struct snd_soc_dpcm *dpcm, | |||
1449 | return ret; | 1552 | return ret; |
1450 | } | 1553 | } |
1451 | 1554 | ||
1452 | static int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream, | 1555 | int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream, |
1453 | int cmd) | 1556 | int cmd) |
1454 | { | 1557 | { |
1455 | struct snd_soc_dpcm *dpcm; | 1558 | struct snd_soc_dpcm *dpcm; |
@@ -1617,7 +1720,7 @@ out: | |||
1617 | return ret; | 1720 | return ret; |
1618 | } | 1721 | } |
1619 | 1722 | ||
1620 | static int dpcm_be_dai_prepare(struct snd_soc_pcm_runtime *fe, int stream) | 1723 | int dpcm_be_dai_prepare(struct snd_soc_pcm_runtime *fe, int stream) |
1621 | { | 1724 | { |
1622 | struct snd_soc_dpcm *dpcm; | 1725 | struct snd_soc_dpcm *dpcm; |
1623 | int ret = 0; | 1726 | int ret = 0; |
@@ -2033,10 +2136,8 @@ int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num) | |||
2033 | int ret = 0, playback = 0, capture = 0; | 2136 | int ret = 0, playback = 0, capture = 0; |
2034 | 2137 | ||
2035 | if (rtd->dai_link->dynamic || rtd->dai_link->no_pcm) { | 2138 | if (rtd->dai_link->dynamic || rtd->dai_link->no_pcm) { |
2036 | if (cpu_dai->driver->playback.channels_min) | 2139 | playback = rtd->dai_link->dpcm_playback; |
2037 | playback = 1; | 2140 | capture = rtd->dai_link->dpcm_capture; |
2038 | if (cpu_dai->driver->capture.channels_min) | ||
2039 | capture = 1; | ||
2040 | } else { | 2141 | } else { |
2041 | if (codec_dai->driver->playback.channels_min && | 2142 | if (codec_dai->driver->playback.channels_min && |
2042 | cpu_dai->driver->playback.channels_min) | 2143 | cpu_dai->driver->playback.channels_min) |
diff --git a/sound/soc/soc-utils.c b/sound/soc/soc-utils.c index 5e633659c1b3..7f22ca35a413 100644 --- a/sound/soc/soc-utils.c +++ b/sound/soc/soc-utils.c | |||
@@ -59,10 +59,6 @@ int snd_soc_params_to_bclk(struct snd_pcm_hw_params *params) | |||
59 | EXPORT_SYMBOL_GPL(snd_soc_params_to_bclk); | 59 | EXPORT_SYMBOL_GPL(snd_soc_params_to_bclk); |
60 | 60 | ||
61 | static const struct snd_pcm_hardware dummy_dma_hardware = { | 61 | static const struct snd_pcm_hardware dummy_dma_hardware = { |
62 | .formats = 0xffffffff, | ||
63 | .channels_min = 1, | ||
64 | .channels_max = UINT_MAX, | ||
65 | |||
66 | /* Random values to keep userspace happy when checking constraints */ | 62 | /* Random values to keep userspace happy when checking constraints */ |
67 | .info = SNDRV_PCM_INFO_INTERLEAVED | | 63 | .info = SNDRV_PCM_INFO_INTERLEAVED | |
68 | SNDRV_PCM_INFO_BLOCK_TRANSFER, | 64 | SNDRV_PCM_INFO_BLOCK_TRANSFER, |
@@ -123,6 +119,13 @@ static struct snd_soc_dai_driver dummy_dai = { | |||
123 | }, | 119 | }, |
124 | }; | 120 | }; |
125 | 121 | ||
122 | int snd_soc_dai_is_dummy(struct snd_soc_dai *dai) | ||
123 | { | ||
124 | if (dai->driver == &dummy_dai) | ||
125 | return 1; | ||
126 | return 0; | ||
127 | } | ||
128 | |||
126 | static int snd_soc_dummy_probe(struct platform_device *pdev) | 129 | static int snd_soc_dummy_probe(struct platform_device *pdev) |
127 | { | 130 | { |
128 | int ret; | 131 | int ret; |
diff --git a/sound/soc/spear/spdif_in.c b/sound/soc/spear/spdif_in.c index 21a8c954af1c..4ab442a63d7e 100644 --- a/sound/soc/spear/spdif_in.c +++ b/sound/soc/spear/spdif_in.c | |||
@@ -18,12 +18,14 @@ | |||
18 | #include <linux/ioport.h> | 18 | #include <linux/ioport.h> |
19 | #include <linux/module.h> | 19 | #include <linux/module.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <sound/dmaengine_pcm.h> | ||
21 | #include <sound/pcm.h> | 22 | #include <sound/pcm.h> |
22 | #include <sound/pcm_params.h> | 23 | #include <sound/pcm_params.h> |
23 | #include <sound/soc.h> | 24 | #include <sound/soc.h> |
24 | #include <sound/spear_dma.h> | 25 | #include <sound/spear_dma.h> |
25 | #include <sound/spear_spdif.h> | 26 | #include <sound/spear_spdif.h> |
26 | #include "spdif_in_regs.h" | 27 | #include "spdif_in_regs.h" |
28 | #include "spear_pcm.h" | ||
27 | 29 | ||
28 | struct spdif_in_params { | 30 | struct spdif_in_params { |
29 | u32 format; | 31 | u32 format; |
@@ -37,6 +39,8 @@ struct spdif_in_dev { | |||
37 | struct device *dev; | 39 | struct device *dev; |
38 | void (*reset_perip)(void); | 40 | void (*reset_perip)(void); |
39 | int irq; | 41 | int irq; |
42 | struct snd_dmaengine_dai_dma_data dma_params_rx; | ||
43 | struct snd_dmaengine_pcm_config config; | ||
40 | }; | 44 | }; |
41 | 45 | ||
42 | static void spdif_in_configure(struct spdif_in_dev *host) | 46 | static void spdif_in_configure(struct spdif_in_dev *host) |
@@ -53,7 +57,8 @@ static int spdif_in_dai_probe(struct snd_soc_dai *dai) | |||
53 | { | 57 | { |
54 | struct spdif_in_dev *host = snd_soc_dai_get_drvdata(dai); | 58 | struct spdif_in_dev *host = snd_soc_dai_get_drvdata(dai); |
55 | 59 | ||
56 | dai->capture_dma_data = &host->dma_params; | 60 | host->dma_params_rx.filter_data = &host->dma_params; |
61 | dai->capture_dma_data = &host->dma_params_rx; | ||
57 | 62 | ||
58 | return 0; | 63 | return 0; |
59 | } | 64 | } |
@@ -244,7 +249,6 @@ static int spdif_in_probe(struct platform_device *pdev) | |||
244 | host->dma_params.addr = res_fifo->start; | 249 | host->dma_params.addr = res_fifo->start; |
245 | host->dma_params.max_burst = 16; | 250 | host->dma_params.max_burst = 16; |
246 | host->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; | 251 | host->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
247 | host->dma_params.filter = pdata->filter; | ||
248 | host->reset_perip = pdata->reset_perip; | 252 | host->reset_perip = pdata->reset_perip; |
249 | 253 | ||
250 | host->dev = &pdev->dev; | 254 | host->dev = &pdev->dev; |
@@ -257,8 +261,13 @@ static int spdif_in_probe(struct platform_device *pdev) | |||
257 | return ret; | 261 | return ret; |
258 | } | 262 | } |
259 | 263 | ||
260 | return devm_snd_soc_register_component(&pdev->dev, &spdif_in_component, | 264 | ret = devm_snd_soc_register_component(&pdev->dev, &spdif_in_component, |
261 | &spdif_in_dai, 1); | 265 | &spdif_in_dai, 1); |
266 | if (ret) | ||
267 | return ret; | ||
268 | |||
269 | return devm_spear_pcm_platform_register(&pdev->dev, &host->config, | ||
270 | pdata->filter); | ||
262 | } | 271 | } |
263 | 272 | ||
264 | static struct platform_driver spdif_in_driver = { | 273 | static struct platform_driver spdif_in_driver = { |
diff --git a/sound/soc/spear/spdif_out.c b/sound/soc/spear/spdif_out.c index b6ef6f78dc78..fe99f461aff0 100644 --- a/sound/soc/spear/spdif_out.c +++ b/sound/soc/spear/spdif_out.c | |||
@@ -18,10 +18,12 @@ | |||
18 | #include <linux/ioport.h> | 18 | #include <linux/ioport.h> |
19 | #include <linux/module.h> | 19 | #include <linux/module.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <sound/dmaengine_pcm.h> | ||
21 | #include <sound/soc.h> | 22 | #include <sound/soc.h> |
22 | #include <sound/spear_dma.h> | 23 | #include <sound/spear_dma.h> |
23 | #include <sound/spear_spdif.h> | 24 | #include <sound/spear_spdif.h> |
24 | #include "spdif_out_regs.h" | 25 | #include "spdif_out_regs.h" |
26 | #include "spear_pcm.h" | ||
25 | 27 | ||
26 | struct spdif_out_params { | 28 | struct spdif_out_params { |
27 | u32 rate; | 29 | u32 rate; |
@@ -35,6 +37,8 @@ struct spdif_out_dev { | |||
35 | struct spdif_out_params saved_params; | 37 | struct spdif_out_params saved_params; |
36 | u32 running; | 38 | u32 running; |
37 | void __iomem *io_base; | 39 | void __iomem *io_base; |
40 | struct snd_dmaengine_dai_dma_data dma_params_tx; | ||
41 | struct snd_dmaengine_pcm_config config; | ||
38 | }; | 42 | }; |
39 | 43 | ||
40 | static void spdif_out_configure(struct spdif_out_dev *host) | 44 | static void spdif_out_configure(struct spdif_out_dev *host) |
@@ -244,7 +248,8 @@ static int spdif_soc_dai_probe(struct snd_soc_dai *dai) | |||
244 | { | 248 | { |
245 | struct spdif_out_dev *host = snd_soc_dai_get_drvdata(dai); | 249 | struct spdif_out_dev *host = snd_soc_dai_get_drvdata(dai); |
246 | 250 | ||
247 | dai->playback_dma_data = &host->dma_params; | 251 | host->dma_params_tx.filter_data = &host->dma_params; |
252 | dai->playback_dma_data = &host->dma_params_tx; | ||
248 | 253 | ||
249 | return snd_soc_add_dai_controls(dai, spdif_out_controls, | 254 | return snd_soc_add_dai_controls(dai, spdif_out_controls, |
250 | ARRAY_SIZE(spdif_out_controls)); | 255 | ARRAY_SIZE(spdif_out_controls)); |
@@ -280,6 +285,7 @@ static int spdif_out_probe(struct platform_device *pdev) | |||
280 | struct spdif_out_dev *host; | 285 | struct spdif_out_dev *host; |
281 | struct spear_spdif_platform_data *pdata; | 286 | struct spear_spdif_platform_data *pdata; |
282 | struct resource *res; | 287 | struct resource *res; |
288 | int ret; | ||
283 | 289 | ||
284 | host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); | 290 | host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); |
285 | if (!host) { | 291 | if (!host) { |
@@ -302,12 +308,16 @@ static int spdif_out_probe(struct platform_device *pdev) | |||
302 | host->dma_params.addr = res->start + SPDIF_OUT_FIFO_DATA; | 308 | host->dma_params.addr = res->start + SPDIF_OUT_FIFO_DATA; |
303 | host->dma_params.max_burst = 16; | 309 | host->dma_params.max_burst = 16; |
304 | host->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; | 310 | host->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
305 | host->dma_params.filter = pdata->filter; | ||
306 | 311 | ||
307 | dev_set_drvdata(&pdev->dev, host); | 312 | dev_set_drvdata(&pdev->dev, host); |
308 | 313 | ||
309 | return devm_snd_soc_register_component(&pdev->dev, &spdif_out_component, | 314 | ret = devm_snd_soc_register_component(&pdev->dev, &spdif_out_component, |
310 | &spdif_out_dai, 1); | 315 | &spdif_out_dai, 1); |
316 | if (ret) | ||
317 | return ret; | ||
318 | |||
319 | return devm_spear_pcm_platform_register(&pdev->dev, &host->config, | ||
320 | pdata->filter); | ||
311 | } | 321 | } |
312 | 322 | ||
313 | #ifdef CONFIG_PM | 323 | #ifdef CONFIG_PM |
diff --git a/sound/soc/spear/spear_pcm.c b/sound/soc/spear/spear_pcm.c index 4707f2b862c3..0e5a8f35d0ad 100644 --- a/sound/soc/spear/spear_pcm.c +++ b/sound/soc/spear/spear_pcm.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <sound/pcm.h> | 18 | #include <sound/pcm.h> |
19 | #include <sound/soc.h> | 19 | #include <sound/soc.h> |
20 | #include <sound/spear_dma.h> | 20 | #include <sound/spear_dma.h> |
21 | #include "spear_pcm.h" | ||
21 | 22 | ||
22 | static const struct snd_pcm_hardware spear_pcm_hardware = { | 23 | static const struct snd_pcm_hardware spear_pcm_hardware = { |
23 | .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 24 | .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
@@ -31,49 +32,24 @@ static const struct snd_pcm_hardware spear_pcm_hardware = { | |||
31 | .fifo_size = 0, /* fifo size in bytes */ | 32 | .fifo_size = 0, /* fifo size in bytes */ |
32 | }; | 33 | }; |
33 | 34 | ||
34 | static struct dma_chan *spear_pcm_request_chan(struct snd_soc_pcm_runtime *rtd, | ||
35 | struct snd_pcm_substream *substream) | ||
36 | { | ||
37 | struct spear_dma_data *dma_data; | ||
38 | |||
39 | dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | ||
40 | |||
41 | return snd_dmaengine_pcm_request_channel(dma_data->filter, dma_data); | ||
42 | } | ||
43 | |||
44 | static const struct snd_dmaengine_pcm_config spear_dmaengine_pcm_config = { | 35 | static const struct snd_dmaengine_pcm_config spear_dmaengine_pcm_config = { |
45 | .pcm_hardware = &spear_pcm_hardware, | 36 | .pcm_hardware = &spear_pcm_hardware, |
46 | .compat_request_channel = spear_pcm_request_chan, | ||
47 | .prealloc_buffer_size = 16 * 1024, | 37 | .prealloc_buffer_size = 16 * 1024, |
48 | }; | 38 | }; |
49 | 39 | ||
50 | static int spear_soc_platform_probe(struct platform_device *pdev) | 40 | int devm_spear_pcm_platform_register(struct device *dev, |
41 | struct snd_dmaengine_pcm_config *config, | ||
42 | bool (*filter)(struct dma_chan *chan, void *slave)) | ||
51 | { | 43 | { |
52 | return snd_dmaengine_pcm_register(&pdev->dev, | 44 | *config = spear_dmaengine_pcm_config; |
53 | &spear_dmaengine_pcm_config, | 45 | config->compat_filter_fn = filter; |
46 | |||
47 | return snd_dmaengine_pcm_register(dev, config, | ||
54 | SND_DMAENGINE_PCM_FLAG_NO_DT | | 48 | SND_DMAENGINE_PCM_FLAG_NO_DT | |
55 | SND_DMAENGINE_PCM_FLAG_COMPAT); | 49 | SND_DMAENGINE_PCM_FLAG_COMPAT); |
56 | } | 50 | } |
57 | 51 | EXPORT_SYMBOL_GPL(devm_spear_pcm_platform_register); | |
58 | static int spear_soc_platform_remove(struct platform_device *pdev) | ||
59 | { | ||
60 | snd_dmaengine_pcm_unregister(&pdev->dev); | ||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | static struct platform_driver spear_pcm_driver = { | ||
65 | .driver = { | ||
66 | .name = "spear-pcm-audio", | ||
67 | .owner = THIS_MODULE, | ||
68 | }, | ||
69 | |||
70 | .probe = spear_soc_platform_probe, | ||
71 | .remove = spear_soc_platform_remove, | ||
72 | }; | ||
73 | |||
74 | module_platform_driver(spear_pcm_driver); | ||
75 | 52 | ||
76 | MODULE_AUTHOR("Rajeev Kumar <rajeev-dlh.kumar@st.com>"); | 53 | MODULE_AUTHOR("Rajeev Kumar <rajeev-dlh.kumar@st.com>"); |
77 | MODULE_DESCRIPTION("SPEAr PCM DMA module"); | 54 | MODULE_DESCRIPTION("SPEAr PCM DMA module"); |
78 | MODULE_LICENSE("GPL"); | 55 | MODULE_LICENSE("GPL"); |
79 | MODULE_ALIAS("platform:spear-pcm-audio"); | ||
diff --git a/sound/soc/spear/spear_pcm.h b/sound/soc/spear/spear_pcm.h new file mode 100644 index 000000000000..9b0ca62d6f02 --- /dev/null +++ b/sound/soc/spear/spear_pcm.h | |||
@@ -0,0 +1,24 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #ifndef __SPEAR_PCM_H__ | ||
18 | #define __SPEAR_PCM_H__ | ||
19 | |||
20 | int devm_spear_pcm_platform_register(struct device *dev, | ||
21 | struct snd_dmaengine_pcm_config *config, | ||
22 | bool (*filter)(struct dma_chan *chan, void *slave)); | ||
23 | |||
24 | #endif | ||
diff --git a/sound/soc/tegra/Kconfig b/sound/soc/tegra/Kconfig index 8fc653ca3ab4..65a85f542521 100644 --- a/sound/soc/tegra/Kconfig +++ b/sound/soc/tegra/Kconfig | |||
@@ -116,3 +116,13 @@ config SND_SOC_TEGRA_ALC5632 | |||
116 | help | 116 | help |
117 | Say Y or M here if you want to add support for SoC audio on the | 117 | Say Y or M here if you want to add support for SoC audio on the |
118 | Toshiba AC100 netbook. | 118 | Toshiba AC100 netbook. |
119 | |||
120 | config SND_SOC_TEGRA_MAX98090 | ||
121 | tristate "SoC Audio support for Tegra boards using a MAX98090 codec" | ||
122 | depends on SND_SOC_TEGRA && I2C && GPIOLIB | ||
123 | select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC | ||
124 | select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC | ||
125 | select SND_SOC_MAX98090 | ||
126 | help | ||
127 | Say Y or M here if you want to add support for SoC audio on Tegra | ||
128 | boards using the MAX98090 codec, such as Venice2. | ||
diff --git a/sound/soc/tegra/Makefile b/sound/soc/tegra/Makefile index 21d2550a08a4..5ae588cd96c4 100644 --- a/sound/soc/tegra/Makefile +++ b/sound/soc/tegra/Makefile | |||
@@ -24,6 +24,7 @@ snd-soc-tegra-wm8903-objs := tegra_wm8903.o | |||
24 | snd-soc-tegra-wm9712-objs := tegra_wm9712.o | 24 | snd-soc-tegra-wm9712-objs := tegra_wm9712.o |
25 | snd-soc-tegra-trimslice-objs := trimslice.o | 25 | snd-soc-tegra-trimslice-objs := trimslice.o |
26 | snd-soc-tegra-alc5632-objs := tegra_alc5632.o | 26 | snd-soc-tegra-alc5632-objs := tegra_alc5632.o |
27 | snd-soc-tegra-max98090-objs := tegra_max98090.o | ||
27 | 28 | ||
28 | obj-$(CONFIG_SND_SOC_TEGRA_RT5640) += snd-soc-tegra-rt5640.o | 29 | obj-$(CONFIG_SND_SOC_TEGRA_RT5640) += snd-soc-tegra-rt5640.o |
29 | obj-$(CONFIG_SND_SOC_TEGRA_WM8753) += snd-soc-tegra-wm8753.o | 30 | obj-$(CONFIG_SND_SOC_TEGRA_WM8753) += snd-soc-tegra-wm8753.o |
@@ -31,3 +32,4 @@ obj-$(CONFIG_SND_SOC_TEGRA_WM8903) += snd-soc-tegra-wm8903.o | |||
31 | obj-$(CONFIG_SND_SOC_TEGRA_WM9712) += snd-soc-tegra-wm9712.o | 32 | obj-$(CONFIG_SND_SOC_TEGRA_WM9712) += snd-soc-tegra-wm9712.o |
32 | obj-$(CONFIG_SND_SOC_TEGRA_TRIMSLICE) += snd-soc-tegra-trimslice.o | 33 | obj-$(CONFIG_SND_SOC_TEGRA_TRIMSLICE) += snd-soc-tegra-trimslice.o |
33 | obj-$(CONFIG_SND_SOC_TEGRA_ALC5632) += snd-soc-tegra-alc5632.o | 34 | obj-$(CONFIG_SND_SOC_TEGRA_ALC5632) += snd-soc-tegra-alc5632.o |
35 | obj-$(CONFIG_SND_SOC_TEGRA_MAX98090) += snd-soc-tegra-max98090.o | ||
diff --git a/sound/soc/tegra/tegra20_ac97.c b/sound/soc/tegra/tegra20_ac97.c index ae27bcd586d2..088518d7694a 100644 --- a/sound/soc/tegra/tegra20_ac97.c +++ b/sound/soc/tegra/tegra20_ac97.c | |||
@@ -404,7 +404,7 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) | |||
404 | ret = snd_soc_set_ac97_ops(&tegra20_ac97_ops); | 404 | ret = snd_soc_set_ac97_ops(&tegra20_ac97_ops); |
405 | if (ret) { | 405 | if (ret) { |
406 | dev_err(&pdev->dev, "Failed to set AC'97 ops: %d\n", ret); | 406 | dev_err(&pdev->dev, "Failed to set AC'97 ops: %d\n", ret); |
407 | goto err_asoc_utils_fini; | 407 | goto err_clk_disable_unprepare; |
408 | } | 408 | } |
409 | 409 | ||
410 | ret = snd_soc_register_component(&pdev->dev, &tegra20_ac97_component, | 410 | ret = snd_soc_register_component(&pdev->dev, &tegra20_ac97_component, |
@@ -412,7 +412,7 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) | |||
412 | if (ret) { | 412 | if (ret) { |
413 | dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); | 413 | dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); |
414 | ret = -ENOMEM; | 414 | ret = -ENOMEM; |
415 | goto err_asoc_utils_fini; | 415 | goto err_clk_disable_unprepare; |
416 | } | 416 | } |
417 | 417 | ||
418 | ret = tegra_pcm_platform_register(&pdev->dev); | 418 | ret = tegra_pcm_platform_register(&pdev->dev); |
@@ -428,6 +428,8 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) | |||
428 | 428 | ||
429 | err_unregister_component: | 429 | err_unregister_component: |
430 | snd_soc_unregister_component(&pdev->dev); | 430 | snd_soc_unregister_component(&pdev->dev); |
431 | err_clk_disable_unprepare: | ||
432 | clk_disable_unprepare(ac97->clk_ac97); | ||
431 | err_asoc_utils_fini: | 433 | err_asoc_utils_fini: |
432 | tegra_asoc_utils_fini(&ac97->util_data); | 434 | tegra_asoc_utils_fini(&ac97->util_data); |
433 | err_clk_put: | 435 | err_clk_put: |
diff --git a/sound/soc/tegra/tegra_max98090.c b/sound/soc/tegra/tegra_max98090.c new file mode 100644 index 000000000000..0283cfb7c031 --- /dev/null +++ b/sound/soc/tegra/tegra_max98090.c | |||
@@ -0,0 +1,275 @@ | |||
1 | /* | ||
2 | * Tegra machine ASoC driver for boards using a MAX90809 CODEC. | ||
3 | * | ||
4 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
17 | * | ||
18 | * Based on code copyright/by: | ||
19 | * | ||
20 | * Copyright (C) 2010-2012 - NVIDIA, Inc. | ||
21 | * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net> | ||
22 | * (c) 2009, 2010 Nvidia Graphics Pvt. Ltd. | ||
23 | * Copyright 2007 Wolfson Microelectronics PLC. | ||
24 | */ | ||
25 | |||
26 | #include <linux/module.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/slab.h> | ||
29 | #include <linux/gpio.h> | ||
30 | #include <linux/of_gpio.h> | ||
31 | |||
32 | #include <sound/core.h> | ||
33 | #include <sound/jack.h> | ||
34 | #include <sound/pcm.h> | ||
35 | #include <sound/pcm_params.h> | ||
36 | #include <sound/soc.h> | ||
37 | |||
38 | #include "tegra_asoc_utils.h" | ||
39 | |||
40 | #define DRV_NAME "tegra-snd-max98090" | ||
41 | |||
42 | struct tegra_max98090 { | ||
43 | struct tegra_asoc_utils_data util_data; | ||
44 | int gpio_hp_det; | ||
45 | }; | ||
46 | |||
47 | static int tegra_max98090_asoc_hw_params(struct snd_pcm_substream *substream, | ||
48 | struct snd_pcm_hw_params *params) | ||
49 | { | ||
50 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
51 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | ||
52 | struct snd_soc_codec *codec = codec_dai->codec; | ||
53 | struct snd_soc_card *card = codec->card; | ||
54 | struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card); | ||
55 | int srate, mclk; | ||
56 | int err; | ||
57 | |||
58 | srate = params_rate(params); | ||
59 | switch (srate) { | ||
60 | case 8000: | ||
61 | case 16000: | ||
62 | case 24000: | ||
63 | case 32000: | ||
64 | case 48000: | ||
65 | case 64000: | ||
66 | case 96000: | ||
67 | mclk = 12288000; | ||
68 | break; | ||
69 | case 11025: | ||
70 | case 22050: | ||
71 | case 44100: | ||
72 | case 88200: | ||
73 | mclk = 11289600; | ||
74 | break; | ||
75 | default: | ||
76 | mclk = 12000000; | ||
77 | break; | ||
78 | } | ||
79 | |||
80 | err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); | ||
81 | if (err < 0) { | ||
82 | dev_err(card->dev, "Can't configure clocks\n"); | ||
83 | return err; | ||
84 | } | ||
85 | |||
86 | err = snd_soc_dai_set_sysclk(codec_dai, 0, mclk, | ||
87 | SND_SOC_CLOCK_IN); | ||
88 | if (err < 0) { | ||
89 | dev_err(card->dev, "codec_dai clock not set\n"); | ||
90 | return err; | ||
91 | } | ||
92 | |||
93 | return 0; | ||
94 | } | ||
95 | |||
96 | static struct snd_soc_ops tegra_max98090_ops = { | ||
97 | .hw_params = tegra_max98090_asoc_hw_params, | ||
98 | }; | ||
99 | |||
100 | static struct snd_soc_jack tegra_max98090_hp_jack; | ||
101 | |||
102 | static struct snd_soc_jack_pin tegra_max98090_hp_jack_pins[] = { | ||
103 | { | ||
104 | .pin = "Headphones", | ||
105 | .mask = SND_JACK_HEADPHONE, | ||
106 | }, | ||
107 | }; | ||
108 | |||
109 | static struct snd_soc_jack_gpio tegra_max98090_hp_jack_gpio = { | ||
110 | .name = "Headphone detection", | ||
111 | .report = SND_JACK_HEADPHONE, | ||
112 | .debounce_time = 150, | ||
113 | .invert = 1, | ||
114 | }; | ||
115 | |||
116 | static const struct snd_soc_dapm_widget tegra_max98090_dapm_widgets[] = { | ||
117 | SND_SOC_DAPM_HP("Headphones", NULL), | ||
118 | SND_SOC_DAPM_SPK("Speakers", NULL), | ||
119 | SND_SOC_DAPM_MIC("Mic Jack", NULL), | ||
120 | }; | ||
121 | |||
122 | static const struct snd_kcontrol_new tegra_max98090_controls[] = { | ||
123 | SOC_DAPM_PIN_SWITCH("Speakers"), | ||
124 | }; | ||
125 | |||
126 | static int tegra_max98090_asoc_init(struct snd_soc_pcm_runtime *rtd) | ||
127 | { | ||
128 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | ||
129 | struct snd_soc_codec *codec = codec_dai->codec; | ||
130 | struct tegra_max98090 *machine = snd_soc_card_get_drvdata(codec->card); | ||
131 | |||
132 | if (gpio_is_valid(machine->gpio_hp_det)) { | ||
133 | snd_soc_jack_new(codec, "Headphones", SND_JACK_HEADPHONE, | ||
134 | &tegra_max98090_hp_jack); | ||
135 | snd_soc_jack_add_pins(&tegra_max98090_hp_jack, | ||
136 | ARRAY_SIZE(tegra_max98090_hp_jack_pins), | ||
137 | tegra_max98090_hp_jack_pins); | ||
138 | |||
139 | tegra_max98090_hp_jack_gpio.gpio = machine->gpio_hp_det; | ||
140 | snd_soc_jack_add_gpios(&tegra_max98090_hp_jack, | ||
141 | 1, | ||
142 | &tegra_max98090_hp_jack_gpio); | ||
143 | } | ||
144 | |||
145 | return 0; | ||
146 | } | ||
147 | |||
148 | static struct snd_soc_dai_link tegra_max98090_dai = { | ||
149 | .name = "max98090", | ||
150 | .stream_name = "max98090 PCM", | ||
151 | .codec_dai_name = "HiFi", | ||
152 | .init = tegra_max98090_asoc_init, | ||
153 | .ops = &tegra_max98090_ops, | ||
154 | .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | | ||
155 | SND_SOC_DAIFMT_CBS_CFS, | ||
156 | }; | ||
157 | |||
158 | static struct snd_soc_card snd_soc_tegra_max98090 = { | ||
159 | .name = "tegra-max98090", | ||
160 | .owner = THIS_MODULE, | ||
161 | .dai_link = &tegra_max98090_dai, | ||
162 | .num_links = 1, | ||
163 | .controls = tegra_max98090_controls, | ||
164 | .num_controls = ARRAY_SIZE(tegra_max98090_controls), | ||
165 | .dapm_widgets = tegra_max98090_dapm_widgets, | ||
166 | .num_dapm_widgets = ARRAY_SIZE(tegra_max98090_dapm_widgets), | ||
167 | .fully_routed = true, | ||
168 | }; | ||
169 | |||
170 | static int tegra_max98090_probe(struct platform_device *pdev) | ||
171 | { | ||
172 | struct device_node *np = pdev->dev.of_node; | ||
173 | struct snd_soc_card *card = &snd_soc_tegra_max98090; | ||
174 | struct tegra_max98090 *machine; | ||
175 | int ret; | ||
176 | |||
177 | machine = devm_kzalloc(&pdev->dev, | ||
178 | sizeof(struct tegra_max98090), GFP_KERNEL); | ||
179 | if (!machine) { | ||
180 | dev_err(&pdev->dev, "Can't allocate tegra_max98090\n"); | ||
181 | return -ENOMEM; | ||
182 | } | ||
183 | |||
184 | card->dev = &pdev->dev; | ||
185 | platform_set_drvdata(pdev, card); | ||
186 | snd_soc_card_set_drvdata(card, machine); | ||
187 | |||
188 | machine->gpio_hp_det = of_get_named_gpio(np, "nvidia,hp-det-gpios", 0); | ||
189 | if (machine->gpio_hp_det == -EPROBE_DEFER) | ||
190 | return -EPROBE_DEFER; | ||
191 | |||
192 | ret = snd_soc_of_parse_card_name(card, "nvidia,model"); | ||
193 | if (ret) | ||
194 | goto err; | ||
195 | |||
196 | ret = snd_soc_of_parse_audio_routing(card, "nvidia,audio-routing"); | ||
197 | if (ret) | ||
198 | goto err; | ||
199 | |||
200 | tegra_max98090_dai.codec_of_node = of_parse_phandle(np, | ||
201 | "nvidia,audio-codec", 0); | ||
202 | if (!tegra_max98090_dai.codec_of_node) { | ||
203 | dev_err(&pdev->dev, | ||
204 | "Property 'nvidia,audio-codec' missing or invalid\n"); | ||
205 | ret = -EINVAL; | ||
206 | goto err; | ||
207 | } | ||
208 | |||
209 | tegra_max98090_dai.cpu_of_node = of_parse_phandle(np, | ||
210 | "nvidia,i2s-controller", 0); | ||
211 | if (!tegra_max98090_dai.cpu_of_node) { | ||
212 | dev_err(&pdev->dev, | ||
213 | "Property 'nvidia,i2s-controller' missing or invalid\n"); | ||
214 | ret = -EINVAL; | ||
215 | goto err; | ||
216 | } | ||
217 | |||
218 | tegra_max98090_dai.platform_of_node = tegra_max98090_dai.cpu_of_node; | ||
219 | |||
220 | ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev); | ||
221 | if (ret) | ||
222 | goto err; | ||
223 | |||
224 | ret = snd_soc_register_card(card); | ||
225 | if (ret) { | ||
226 | dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", | ||
227 | ret); | ||
228 | goto err_fini_utils; | ||
229 | } | ||
230 | |||
231 | return 0; | ||
232 | |||
233 | err_fini_utils: | ||
234 | tegra_asoc_utils_fini(&machine->util_data); | ||
235 | err: | ||
236 | return ret; | ||
237 | } | ||
238 | |||
239 | static int tegra_max98090_remove(struct platform_device *pdev) | ||
240 | { | ||
241 | struct snd_soc_card *card = platform_get_drvdata(pdev); | ||
242 | struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card); | ||
243 | |||
244 | snd_soc_jack_free_gpios(&tegra_max98090_hp_jack, 1, | ||
245 | &tegra_max98090_hp_jack_gpio); | ||
246 | |||
247 | snd_soc_unregister_card(card); | ||
248 | |||
249 | tegra_asoc_utils_fini(&machine->util_data); | ||
250 | |||
251 | return 0; | ||
252 | } | ||
253 | |||
254 | static const struct of_device_id tegra_max98090_of_match[] = { | ||
255 | { .compatible = "nvidia,tegra-audio-max98090", }, | ||
256 | {}, | ||
257 | }; | ||
258 | |||
259 | static struct platform_driver tegra_max98090_driver = { | ||
260 | .driver = { | ||
261 | .name = DRV_NAME, | ||
262 | .owner = THIS_MODULE, | ||
263 | .pm = &snd_soc_pm_ops, | ||
264 | .of_match_table = tegra_max98090_of_match, | ||
265 | }, | ||
266 | .probe = tegra_max98090_probe, | ||
267 | .remove = tegra_max98090_remove, | ||
268 | }; | ||
269 | module_platform_driver(tegra_max98090_driver); | ||
270 | |||
271 | MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>"); | ||
272 | MODULE_DESCRIPTION("Tegra max98090 machine ASoC driver"); | ||
273 | MODULE_LICENSE("GPL v2"); | ||
274 | MODULE_ALIAS("platform:" DRV_NAME); | ||
275 | MODULE_DEVICE_TABLE(of, tegra_max98090_of_match); | ||
diff --git a/sound/soc/tegra/tegra_pcm.c b/sound/soc/tegra/tegra_pcm.c index 7b2d23ba69b3..c09ffd18791b 100644 --- a/sound/soc/tegra/tegra_pcm.c +++ b/sound/soc/tegra/tegra_pcm.c | |||
@@ -42,9 +42,6 @@ static const struct snd_pcm_hardware tegra_pcm_hardware = { | |||
42 | .info = SNDRV_PCM_INFO_MMAP | | 42 | .info = SNDRV_PCM_INFO_MMAP | |
43 | SNDRV_PCM_INFO_MMAP_VALID | | 43 | SNDRV_PCM_INFO_MMAP_VALID | |
44 | SNDRV_PCM_INFO_INTERLEAVED, | 44 | SNDRV_PCM_INFO_INTERLEAVED, |
45 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
46 | .channels_min = 2, | ||
47 | .channels_max = 2, | ||
48 | .period_bytes_min = 1024, | 45 | .period_bytes_min = 1024, |
49 | .period_bytes_max = PAGE_SIZE, | 46 | .period_bytes_max = PAGE_SIZE, |
50 | .periods_min = 2, | 47 | .periods_min = 2, |
diff --git a/sound/soc/tegra/tegra_wm9712.c b/sound/soc/tegra/tegra_wm9712.c index 5e119630b0e0..45b57892b6a5 100644 --- a/sound/soc/tegra/tegra_wm9712.c +++ b/sound/soc/tegra/tegra_wm9712.c | |||
@@ -55,7 +55,6 @@ static int tegra_wm9712_init(struct snd_soc_pcm_runtime *rtd) | |||
55 | static struct snd_soc_dai_link tegra_wm9712_dai = { | 55 | static struct snd_soc_dai_link tegra_wm9712_dai = { |
56 | .name = "AC97 HiFi", | 56 | .name = "AC97 HiFi", |
57 | .stream_name = "AC97 HiFi", | 57 | .stream_name = "AC97 HiFi", |
58 | .cpu_dai_name = "tegra20-ac97", | ||
59 | .codec_dai_name = "wm9712-hifi", | 58 | .codec_dai_name = "wm9712-hifi", |
60 | .codec_name = "wm9712-codec", | 59 | .codec_name = "wm9712-codec", |
61 | .init = tegra_wm9712_init, | 60 | .init = tegra_wm9712_init, |
diff --git a/sound/soc/txx9/txx9aclc.c b/sound/soc/txx9/txx9aclc.c index fbd077f4de72..f0829de28708 100644 --- a/sound/soc/txx9/txx9aclc.c +++ b/sound/soc/txx9/txx9aclc.c | |||
@@ -40,11 +40,6 @@ static const struct snd_pcm_hardware txx9aclc_pcm_hardware = { | |||
40 | .info = SNDRV_PCM_INFO_INTERLEAVED | | 40 | .info = SNDRV_PCM_INFO_INTERLEAVED | |
41 | SNDRV_PCM_INFO_BATCH | | 41 | SNDRV_PCM_INFO_BATCH | |
42 | SNDRV_PCM_INFO_PAUSE, | 42 | SNDRV_PCM_INFO_PAUSE, |
43 | #ifdef __BIG_ENDIAN | ||
44 | .formats = SNDRV_PCM_FMTBIT_S16_BE, | ||
45 | #else | ||
46 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
47 | #endif | ||
48 | .period_bytes_min = 1024, | 43 | .period_bytes_min = 1024, |
49 | .period_bytes_max = 8 * 1024, | 44 | .period_bytes_max = 8 * 1024, |
50 | .periods_min = 2, | 45 | .periods_min = 2, |
diff --git a/sound/soc/ux500/mop500.c b/sound/soc/ux500/mop500.c index 178d1bad6259..b3b66aa98dce 100644 --- a/sound/soc/ux500/mop500.c +++ b/sound/soc/ux500/mop500.c | |||
@@ -91,6 +91,8 @@ static int mop500_of_probe(struct platform_device *pdev, | |||
91 | for (i = 0; i < 2; i++) { | 91 | for (i = 0; i < 2; i++) { |
92 | mop500_dai_links[i].cpu_of_node = msp_np[i]; | 92 | mop500_dai_links[i].cpu_of_node = msp_np[i]; |
93 | mop500_dai_links[i].cpu_dai_name = NULL; | 93 | mop500_dai_links[i].cpu_dai_name = NULL; |
94 | mop500_dai_links[i].platform_of_node = msp_np[i]; | ||
95 | mop500_dai_links[i].platform_name = NULL; | ||
94 | mop500_dai_links[i].codec_of_node = codec_np; | 96 | mop500_dai_links[i].codec_of_node = codec_np; |
95 | mop500_dai_links[i].codec_name = NULL; | 97 | mop500_dai_links[i].codec_name = NULL; |
96 | } | 98 | } |
diff --git a/sound/soc/ux500/ux500_msp_dai.c b/sound/soc/ux500/ux500_msp_dai.c index c6fb5cce980e..5f4807b2c007 100644 --- a/sound/soc/ux500/ux500_msp_dai.c +++ b/sound/soc/ux500/ux500_msp_dai.c | |||
@@ -17,12 +17,14 @@ | |||
17 | #include <linux/bitops.h> | 17 | #include <linux/bitops.h> |
18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
19 | #include <linux/clk.h> | 19 | #include <linux/clk.h> |
20 | #include <linux/of.h> | ||
20 | #include <linux/regulator/consumer.h> | 21 | #include <linux/regulator/consumer.h> |
21 | #include <linux/mfd/dbx500-prcmu.h> | 22 | #include <linux/mfd/dbx500-prcmu.h> |
22 | #include <linux/platform_data/asoc-ux500-msp.h> | 23 | #include <linux/platform_data/asoc-ux500-msp.h> |
23 | 24 | ||
24 | #include <sound/soc.h> | 25 | #include <sound/soc.h> |
25 | #include <sound/soc-dai.h> | 26 | #include <sound/soc-dai.h> |
27 | #include <sound/dmaengine_pcm.h> | ||
26 | 28 | ||
27 | #include "ux500_msp_i2s.h" | 29 | #include "ux500_msp_i2s.h" |
28 | #include "ux500_msp_dai.h" | 30 | #include "ux500_msp_dai.h" |
@@ -654,16 +656,52 @@ static int ux500_msp_dai_trigger(struct snd_pcm_substream *substream, | |||
654 | return ret; | 656 | return ret; |
655 | } | 657 | } |
656 | 658 | ||
659 | static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai) | ||
660 | { | ||
661 | struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev); | ||
662 | struct snd_dmaengine_dai_dma_data *playback_dma_data; | ||
663 | struct snd_dmaengine_dai_dma_data *capture_dma_data; | ||
664 | |||
665 | playback_dma_data = devm_kzalloc(dai->dev, | ||
666 | sizeof(*playback_dma_data), | ||
667 | GFP_KERNEL); | ||
668 | if (!playback_dma_data) | ||
669 | return -ENOMEM; | ||
670 | |||
671 | capture_dma_data = devm_kzalloc(dai->dev, | ||
672 | sizeof(*capture_dma_data), | ||
673 | GFP_KERNEL); | ||
674 | if (!capture_dma_data) | ||
675 | return -ENOMEM; | ||
676 | |||
677 | playback_dma_data->addr = drvdata->msp->playback_dma_data.tx_rx_addr; | ||
678 | capture_dma_data->addr = drvdata->msp->capture_dma_data.tx_rx_addr; | ||
679 | |||
680 | playback_dma_data->maxburst = 4; | ||
681 | capture_dma_data->maxburst = 4; | ||
682 | |||
683 | snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data); | ||
684 | |||
685 | return 0; | ||
686 | } | ||
687 | |||
657 | static int ux500_msp_dai_probe(struct snd_soc_dai *dai) | 688 | static int ux500_msp_dai_probe(struct snd_soc_dai *dai) |
658 | { | 689 | { |
659 | struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev); | 690 | struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev); |
691 | struct msp_i2s_platform_data *pdata = dai->dev->platform_data; | ||
692 | int ret; | ||
660 | 693 | ||
661 | dai->playback_dma_data = &drvdata->msp->playback_dma_data; | 694 | if (!pdata) { |
662 | dai->capture_dma_data = &drvdata->msp->capture_dma_data; | 695 | ret = ux500_msp_dai_of_probe(dai); |
696 | return ret; | ||
697 | } | ||
663 | 698 | ||
664 | drvdata->msp->playback_dma_data.data_size = drvdata->slot_width; | 699 | drvdata->msp->playback_dma_data.data_size = drvdata->slot_width; |
665 | drvdata->msp->capture_dma_data.data_size = drvdata->slot_width; | 700 | drvdata->msp->capture_dma_data.data_size = drvdata->slot_width; |
666 | 701 | ||
702 | snd_soc_dai_init_dma_data(dai, | ||
703 | &drvdata->msp->playback_dma_data, | ||
704 | &drvdata->msp->capture_dma_data); | ||
667 | return 0; | 705 | return 0; |
668 | } | 706 | } |
669 | 707 | ||
@@ -680,87 +718,19 @@ static struct snd_soc_dai_ops ux500_msp_dai_ops[] = { | |||
680 | } | 718 | } |
681 | }; | 719 | }; |
682 | 720 | ||
683 | static struct snd_soc_dai_driver ux500_msp_dai_drv[UX500_NBR_OF_DAI] = { | 721 | static struct snd_soc_dai_driver ux500_msp_dai_drv = { |
684 | { | 722 | .probe = ux500_msp_dai_probe, |
685 | .name = "ux500-msp-i2s.0", | 723 | .suspend = NULL, |
686 | .probe = ux500_msp_dai_probe, | 724 | .resume = NULL, |
687 | .id = 0, | 725 | .playback.channels_min = UX500_MSP_MIN_CHANNELS, |
688 | .suspend = NULL, | 726 | .playback.channels_max = UX500_MSP_MAX_CHANNELS, |
689 | .resume = NULL, | 727 | .playback.rates = UX500_I2S_RATES, |
690 | .playback = { | 728 | .playback.formats = UX500_I2S_FORMATS, |
691 | .channels_min = UX500_MSP_MIN_CHANNELS, | 729 | .capture.channels_min = UX500_MSP_MIN_CHANNELS, |
692 | .channels_max = UX500_MSP_MAX_CHANNELS, | 730 | .capture.channels_max = UX500_MSP_MAX_CHANNELS, |
693 | .rates = UX500_I2S_RATES, | 731 | .capture.rates = UX500_I2S_RATES, |
694 | .formats = UX500_I2S_FORMATS, | 732 | .capture.formats = UX500_I2S_FORMATS, |
695 | }, | 733 | .ops = ux500_msp_dai_ops, |
696 | .capture = { | ||
697 | .channels_min = UX500_MSP_MIN_CHANNELS, | ||
698 | .channels_max = UX500_MSP_MAX_CHANNELS, | ||
699 | .rates = UX500_I2S_RATES, | ||
700 | .formats = UX500_I2S_FORMATS, | ||
701 | }, | ||
702 | .ops = ux500_msp_dai_ops, | ||
703 | }, | ||
704 | { | ||
705 | .name = "ux500-msp-i2s.1", | ||
706 | .probe = ux500_msp_dai_probe, | ||
707 | .id = 1, | ||
708 | .suspend = NULL, | ||
709 | .resume = NULL, | ||
710 | .playback = { | ||
711 | .channels_min = UX500_MSP_MIN_CHANNELS, | ||
712 | .channels_max = UX500_MSP_MAX_CHANNELS, | ||
713 | .rates = UX500_I2S_RATES, | ||
714 | .formats = UX500_I2S_FORMATS, | ||
715 | }, | ||
716 | .capture = { | ||
717 | .channels_min = UX500_MSP_MIN_CHANNELS, | ||
718 | .channels_max = UX500_MSP_MAX_CHANNELS, | ||
719 | .rates = UX500_I2S_RATES, | ||
720 | .formats = UX500_I2S_FORMATS, | ||
721 | }, | ||
722 | .ops = ux500_msp_dai_ops, | ||
723 | }, | ||
724 | { | ||
725 | .name = "ux500-msp-i2s.2", | ||
726 | .id = 2, | ||
727 | .probe = ux500_msp_dai_probe, | ||
728 | .suspend = NULL, | ||
729 | .resume = NULL, | ||
730 | .playback = { | ||
731 | .channels_min = UX500_MSP_MIN_CHANNELS, | ||
732 | .channels_max = UX500_MSP_MAX_CHANNELS, | ||
733 | .rates = UX500_I2S_RATES, | ||
734 | .formats = UX500_I2S_FORMATS, | ||
735 | }, | ||
736 | .capture = { | ||
737 | .channels_min = UX500_MSP_MIN_CHANNELS, | ||
738 | .channels_max = UX500_MSP_MAX_CHANNELS, | ||
739 | .rates = UX500_I2S_RATES, | ||
740 | .formats = UX500_I2S_FORMATS, | ||
741 | }, | ||
742 | .ops = ux500_msp_dai_ops, | ||
743 | }, | ||
744 | { | ||
745 | .name = "ux500-msp-i2s.3", | ||
746 | .probe = ux500_msp_dai_probe, | ||
747 | .id = 3, | ||
748 | .suspend = NULL, | ||
749 | .resume = NULL, | ||
750 | .playback = { | ||
751 | .channels_min = UX500_MSP_MIN_CHANNELS, | ||
752 | .channels_max = UX500_MSP_MAX_CHANNELS, | ||
753 | .rates = UX500_I2S_RATES, | ||
754 | .formats = UX500_I2S_FORMATS, | ||
755 | }, | ||
756 | .capture = { | ||
757 | .channels_min = UX500_MSP_MIN_CHANNELS, | ||
758 | .channels_max = UX500_MSP_MAX_CHANNELS, | ||
759 | .rates = UX500_I2S_RATES, | ||
760 | .formats = UX500_I2S_FORMATS, | ||
761 | }, | ||
762 | .ops = ux500_msp_dai_ops, | ||
763 | }, | ||
764 | }; | 734 | }; |
765 | 735 | ||
766 | static const struct snd_soc_component_driver ux500_msp_component = { | 736 | static const struct snd_soc_component_driver ux500_msp_component = { |
@@ -771,10 +741,14 @@ static const struct snd_soc_component_driver ux500_msp_component = { | |||
771 | static int ux500_msp_drv_probe(struct platform_device *pdev) | 741 | static int ux500_msp_drv_probe(struct platform_device *pdev) |
772 | { | 742 | { |
773 | struct ux500_msp_i2s_drvdata *drvdata; | 743 | struct ux500_msp_i2s_drvdata *drvdata; |
744 | struct msp_i2s_platform_data *pdata = pdev->dev.platform_data; | ||
745 | struct device_node *np = pdev->dev.of_node; | ||
774 | int ret = 0; | 746 | int ret = 0; |
775 | 747 | ||
776 | dev_dbg(&pdev->dev, "%s: Enter (pdev->name = %s).\n", __func__, | 748 | if (!pdata && !np) { |
777 | pdev->name); | 749 | dev_err(&pdev->dev, "No platform data or Device Tree found\n"); |
750 | return -ENODEV; | ||
751 | } | ||
778 | 752 | ||
779 | drvdata = devm_kzalloc(&pdev->dev, | 753 | drvdata = devm_kzalloc(&pdev->dev, |
780 | sizeof(struct ux500_msp_i2s_drvdata), | 754 | sizeof(struct ux500_msp_i2s_drvdata), |
@@ -826,7 +800,7 @@ static int ux500_msp_drv_probe(struct platform_device *pdev) | |||
826 | dev_set_drvdata(&pdev->dev, drvdata); | 800 | dev_set_drvdata(&pdev->dev, drvdata); |
827 | 801 | ||
828 | ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component, | 802 | ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component, |
829 | &ux500_msp_dai_drv[drvdata->msp->id], 1); | 803 | &ux500_msp_dai_drv, 1); |
830 | if (ret < 0) { | 804 | if (ret < 0) { |
831 | dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n", | 805 | dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n", |
832 | __func__, drvdata->msp->id); | 806 | __func__, drvdata->msp->id); |
diff --git a/sound/soc/ux500/ux500_msp_i2s.c b/sound/soc/ux500/ux500_msp_i2s.c index 1ca8b08ae993..959d7b4edf56 100644 --- a/sound/soc/ux500/ux500_msp_i2s.c +++ b/sound/soc/ux500/ux500_msp_i2s.c | |||
@@ -646,6 +646,34 @@ int ux500_msp_i2s_close(struct ux500_msp *msp, unsigned int dir) | |||
646 | 646 | ||
647 | } | 647 | } |
648 | 648 | ||
649 | static int ux500_msp_i2s_of_init_msp(struct platform_device *pdev, | ||
650 | struct ux500_msp *msp, | ||
651 | struct msp_i2s_platform_data **platform_data) | ||
652 | { | ||
653 | struct msp_i2s_platform_data *pdata; | ||
654 | |||
655 | *platform_data = devm_kzalloc(&pdev->dev, | ||
656 | sizeof(struct msp_i2s_platform_data), | ||
657 | GFP_KERNEL); | ||
658 | pdata = *platform_data; | ||
659 | if (!pdata) | ||
660 | return -ENOMEM; | ||
661 | |||
662 | msp->playback_dma_data.dma_cfg = devm_kzalloc(&pdev->dev, | ||
663 | sizeof(struct stedma40_chan_cfg), | ||
664 | GFP_KERNEL); | ||
665 | if (!msp->playback_dma_data.dma_cfg) | ||
666 | return -ENOMEM; | ||
667 | |||
668 | msp->capture_dma_data.dma_cfg = devm_kzalloc(&pdev->dev, | ||
669 | sizeof(struct stedma40_chan_cfg), | ||
670 | GFP_KERNEL); | ||
671 | if (!msp->capture_dma_data.dma_cfg) | ||
672 | return -ENOMEM; | ||
673 | |||
674 | return 0; | ||
675 | } | ||
676 | |||
649 | int ux500_msp_i2s_init_msp(struct platform_device *pdev, | 677 | int ux500_msp_i2s_init_msp(struct platform_device *pdev, |
650 | struct ux500_msp **msp_p, | 678 | struct ux500_msp **msp_p, |
651 | struct msp_i2s_platform_data *platform_data) | 679 | struct msp_i2s_platform_data *platform_data) |
@@ -653,30 +681,28 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev, | |||
653 | struct resource *res = NULL; | 681 | struct resource *res = NULL; |
654 | struct device_node *np = pdev->dev.of_node; | 682 | struct device_node *np = pdev->dev.of_node; |
655 | struct ux500_msp *msp; | 683 | struct ux500_msp *msp; |
684 | int ret; | ||
656 | 685 | ||
657 | *msp_p = devm_kzalloc(&pdev->dev, sizeof(struct ux500_msp), GFP_KERNEL); | 686 | *msp_p = devm_kzalloc(&pdev->dev, sizeof(struct ux500_msp), GFP_KERNEL); |
658 | msp = *msp_p; | 687 | msp = *msp_p; |
659 | if (!msp) | 688 | if (!msp) |
660 | return -ENOMEM; | 689 | return -ENOMEM; |
661 | 690 | ||
662 | if (np) { | 691 | if (!platform_data) { |
663 | if (!platform_data) { | 692 | if (np) { |
664 | platform_data = devm_kzalloc(&pdev->dev, | 693 | ret = ux500_msp_i2s_of_init_msp(pdev, msp, |
665 | sizeof(struct msp_i2s_platform_data), GFP_KERNEL); | 694 | &platform_data); |
666 | if (!platform_data) | 695 | if (ret) |
667 | return -ENOMEM; | 696 | return ret; |
668 | } | 697 | } else |
669 | } else | ||
670 | if (!platform_data) | ||
671 | return -EINVAL; | 698 | return -EINVAL; |
699 | } else { | ||
700 | msp->playback_dma_data.dma_cfg = platform_data->msp_i2s_dma_tx; | ||
701 | msp->capture_dma_data.dma_cfg = platform_data->msp_i2s_dma_rx; | ||
702 | msp->id = platform_data->id; | ||
703 | } | ||
672 | 704 | ||
673 | dev_dbg(&pdev->dev, "%s: Enter (name: %s, id: %d).\n", __func__, | ||
674 | pdev->name, platform_data->id); | ||
675 | |||
676 | msp->id = platform_data->id; | ||
677 | msp->dev = &pdev->dev; | 705 | msp->dev = &pdev->dev; |
678 | msp->playback_dma_data.dma_cfg = platform_data->msp_i2s_dma_tx; | ||
679 | msp->capture_dma_data.dma_cfg = platform_data->msp_i2s_dma_rx; | ||
680 | 706 | ||
681 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 707 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
682 | if (res == NULL) { | 708 | if (res == NULL) { |
diff --git a/sound/soc/ux500/ux500_msp_i2s.h b/sound/soc/ux500/ux500_msp_i2s.h index 258d0bcee0bd..875de0f68b85 100644 --- a/sound/soc/ux500/ux500_msp_i2s.h +++ b/sound/soc/ux500/ux500_msp_i2s.h | |||
@@ -475,7 +475,7 @@ struct ux500_msp_dma_params { | |||
475 | }; | 475 | }; |
476 | 476 | ||
477 | struct ux500_msp { | 477 | struct ux500_msp { |
478 | enum msp_i2s_id id; | 478 | int id; |
479 | void __iomem *registers; | 479 | void __iomem *registers; |
480 | struct device *dev; | 480 | struct device *dev; |
481 | struct ux500_msp_dma_params playback_dma_data; | 481 | struct ux500_msp_dma_params playback_dma_data; |
diff --git a/sound/soc/ux500/ux500_pcm.c b/sound/soc/ux500/ux500_pcm.c index ce554de5d9dc..51a66a87305a 100644 --- a/sound/soc/ux500/ux500_pcm.c +++ b/sound/soc/ux500/ux500_pcm.c | |||
@@ -28,12 +28,6 @@ | |||
28 | #include "ux500_msp_i2s.h" | 28 | #include "ux500_msp_i2s.h" |
29 | #include "ux500_pcm.h" | 29 | #include "ux500_pcm.h" |
30 | 30 | ||
31 | #define UX500_PLATFORM_MIN_RATE 8000 | ||
32 | #define UX500_PLATFORM_MAX_RATE 48000 | ||
33 | |||
34 | #define UX500_PLATFORM_MIN_CHANNELS 1 | ||
35 | #define UX500_PLATFORM_MAX_CHANNELS 8 | ||
36 | |||
37 | #define UX500_PLATFORM_PERIODS_BYTES_MIN 128 | 31 | #define UX500_PLATFORM_PERIODS_BYTES_MIN 128 |
38 | #define UX500_PLATFORM_PERIODS_BYTES_MAX (64 * PAGE_SIZE) | 32 | #define UX500_PLATFORM_PERIODS_BYTES_MAX (64 * PAGE_SIZE) |
39 | #define UX500_PLATFORM_PERIODS_MIN 2 | 33 | #define UX500_PLATFORM_PERIODS_MIN 2 |
@@ -45,15 +39,6 @@ static const struct snd_pcm_hardware ux500_pcm_hw = { | |||
45 | SNDRV_PCM_INFO_MMAP | | 39 | SNDRV_PCM_INFO_MMAP | |
46 | SNDRV_PCM_INFO_RESUME | | 40 | SNDRV_PCM_INFO_RESUME | |
47 | SNDRV_PCM_INFO_PAUSE, | 41 | SNDRV_PCM_INFO_PAUSE, |
48 | .formats = SNDRV_PCM_FMTBIT_S16_LE | | ||
49 | SNDRV_PCM_FMTBIT_U16_LE | | ||
50 | SNDRV_PCM_FMTBIT_S16_BE | | ||
51 | SNDRV_PCM_FMTBIT_U16_BE, | ||
52 | .rates = SNDRV_PCM_RATE_KNOT, | ||
53 | .rate_min = UX500_PLATFORM_MIN_RATE, | ||
54 | .rate_max = UX500_PLATFORM_MAX_RATE, | ||
55 | .channels_min = UX500_PLATFORM_MIN_CHANNELS, | ||
56 | .channels_max = UX500_PLATFORM_MAX_CHANNELS, | ||
57 | .buffer_bytes_max = UX500_PLATFORM_BUFFER_BYTES_MAX, | 42 | .buffer_bytes_max = UX500_PLATFORM_BUFFER_BYTES_MAX, |
58 | .period_bytes_min = UX500_PLATFORM_PERIODS_BYTES_MIN, | 43 | .period_bytes_min = UX500_PLATFORM_PERIODS_BYTES_MIN, |
59 | .period_bytes_max = UX500_PLATFORM_PERIODS_BYTES_MAX, | 44 | .period_bytes_max = UX500_PLATFORM_PERIODS_BYTES_MAX, |
@@ -65,14 +50,10 @@ static struct dma_chan *ux500_pcm_request_chan(struct snd_soc_pcm_runtime *rtd, | |||
65 | struct snd_pcm_substream *substream) | 50 | struct snd_pcm_substream *substream) |
66 | { | 51 | { |
67 | struct snd_soc_dai *dai = rtd->cpu_dai; | 52 | struct snd_soc_dai *dai = rtd->cpu_dai; |
68 | struct device *dev = dai->dev; | ||
69 | u16 per_data_width, mem_data_width; | 53 | u16 per_data_width, mem_data_width; |
70 | struct stedma40_chan_cfg *dma_cfg; | 54 | struct stedma40_chan_cfg *dma_cfg; |
71 | struct ux500_msp_dma_params *dma_params; | 55 | struct ux500_msp_dma_params *dma_params; |
72 | 56 | ||
73 | dev_dbg(dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id, | ||
74 | snd_pcm_stream_str(substream)); | ||
75 | |||
76 | dma_params = snd_soc_dai_get_dma_data(dai, substream); | 57 | dma_params = snd_soc_dai_get_dma_data(dai, substream); |
77 | dma_cfg = dma_params->dma_cfg; | 58 | dma_cfg = dma_params->dma_cfg; |
78 | 59 | ||
@@ -108,26 +89,36 @@ static int ux500_pcm_prepare_slave_config(struct snd_pcm_substream *substream, | |||
108 | struct dma_slave_config *slave_config) | 89 | struct dma_slave_config *slave_config) |
109 | { | 90 | { |
110 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 91 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
111 | struct ux500_msp_dma_params *dma_params; | 92 | struct msp_i2s_platform_data *pdata = rtd->cpu_dai->dev->platform_data; |
112 | struct stedma40_chan_cfg *dma_cfg; | 93 | struct snd_dmaengine_dai_dma_data *snd_dma_params; |
94 | struct ux500_msp_dma_params *ste_dma_params; | ||
95 | dma_addr_t dma_addr; | ||
113 | int ret; | 96 | int ret; |
114 | 97 | ||
115 | dma_params = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | 98 | if (pdata) { |
116 | dma_cfg = dma_params->dma_cfg; | 99 | ste_dma_params = |
100 | snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | ||
101 | dma_addr = ste_dma_params->tx_rx_addr; | ||
102 | } else { | ||
103 | snd_dma_params = | ||
104 | snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | ||
105 | dma_addr = snd_dma_params->addr; | ||
106 | } | ||
117 | 107 | ||
118 | ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config); | 108 | ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config); |
119 | if (ret) | 109 | if (ret) |
120 | return ret; | 110 | return ret; |
121 | 111 | ||
122 | slave_config->dst_maxburst = 4; | 112 | slave_config->dst_maxburst = 4; |
123 | slave_config->dst_addr_width = dma_cfg->dst_info.data_width; | ||
124 | slave_config->src_maxburst = 4; | 113 | slave_config->src_maxburst = 4; |
125 | slave_config->src_addr_width = dma_cfg->src_info.data_width; | 114 | |
115 | slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; | ||
116 | slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; | ||
126 | 117 | ||
127 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 118 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
128 | slave_config->dst_addr = dma_params->tx_rx_addr; | 119 | slave_config->dst_addr = dma_addr; |
129 | else | 120 | else |
130 | slave_config->src_addr = dma_params->tx_rx_addr; | 121 | slave_config->src_addr = dma_addr; |
131 | 122 | ||
132 | return 0; | 123 | return 0; |
133 | } | 124 | } |
@@ -139,15 +130,25 @@ static const struct snd_dmaengine_pcm_config ux500_dmaengine_pcm_config = { | |||
139 | .prepare_slave_config = ux500_pcm_prepare_slave_config, | 130 | .prepare_slave_config = ux500_pcm_prepare_slave_config, |
140 | }; | 131 | }; |
141 | 132 | ||
133 | static const struct snd_dmaengine_pcm_config ux500_dmaengine_of_pcm_config = { | ||
134 | .compat_request_channel = ux500_pcm_request_chan, | ||
135 | .prepare_slave_config = ux500_pcm_prepare_slave_config, | ||
136 | }; | ||
137 | |||
142 | int ux500_pcm_register_platform(struct platform_device *pdev) | 138 | int ux500_pcm_register_platform(struct platform_device *pdev) |
143 | { | 139 | { |
140 | const struct snd_dmaengine_pcm_config *pcm_config; | ||
141 | struct device_node *np = pdev->dev.of_node; | ||
144 | int ret; | 142 | int ret; |
145 | 143 | ||
146 | ret = snd_dmaengine_pcm_register(&pdev->dev, | 144 | if (np) |
147 | &ux500_dmaengine_pcm_config, | 145 | pcm_config = &ux500_dmaengine_of_pcm_config; |
148 | SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | | 146 | else |
149 | SND_DMAENGINE_PCM_FLAG_COMPAT | | 147 | pcm_config = &ux500_dmaengine_pcm_config; |
150 | SND_DMAENGINE_PCM_FLAG_NO_DT); | 148 | |
149 | ret = snd_dmaengine_pcm_register(&pdev->dev, pcm_config, | ||
150 | SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | | ||
151 | SND_DMAENGINE_PCM_FLAG_COMPAT); | ||
151 | if (ret < 0) { | 152 | if (ret < 0) { |
152 | dev_err(&pdev->dev, | 153 | dev_err(&pdev->dev, |
153 | "%s: ERROR: Failed to register platform '%s' (%d)!\n", | 154 | "%s: ERROR: Failed to register platform '%s' (%d)!\n", |
diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c index 8e3d9a6c7a3b..25c38afaee49 100644 --- a/sound/spi/at73c213.c +++ b/sound/spi/at73c213.c | |||
@@ -174,7 +174,7 @@ static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip) | |||
174 | dac_rate_new = 8 * (ssc_rate / ssc_div); | 174 | dac_rate_new = 8 * (ssc_rate / ssc_div); |
175 | 175 | ||
176 | status = clk_round_rate(chip->board->dac_clk, dac_rate_new); | 176 | status = clk_round_rate(chip->board->dac_clk, dac_rate_new); |
177 | if (status < 0) | 177 | if (status <= 0) |
178 | return status; | 178 | return status; |
179 | 179 | ||
180 | /* Ignore difference smaller than 256 Hz. */ | 180 | /* Ignore difference smaller than 256 Hz. */ |
diff --git a/sound/usb/format.c b/sound/usb/format.c index 3525231c6b97..d244fd3703d8 100644 --- a/sound/usb/format.c +++ b/sound/usb/format.c | |||
@@ -189,8 +189,10 @@ static int parse_audio_format_rates_v1(struct snd_usb_audio *chip, struct audiof | |||
189 | chip->usb_id == USB_ID(0x0ccd, 0x00b1)) && | 189 | chip->usb_id == USB_ID(0x0ccd, 0x00b1)) && |
190 | fp->altsetting == 5 && fp->maxpacksize == 392) | 190 | fp->altsetting == 5 && fp->maxpacksize == 392) |
191 | rate = 96000; | 191 | rate = 96000; |
192 | /* Creative VF0470 Live Cam reports 16 kHz instead of 8kHz */ | 192 | /* Creative VF0420/VF0470 Live Cams report 16 kHz instead of 8kHz */ |
193 | if (rate == 16000 && chip->usb_id == USB_ID(0x041e, 0x4068)) | 193 | if (rate == 16000 && |
194 | (chip->usb_id == USB_ID(0x041e, 0x4064) || | ||
195 | chip->usb_id == USB_ID(0x041e, 0x4068))) | ||
194 | rate = 8000; | 196 | rate = 8000; |
195 | 197 | ||
196 | fp->rate_table[fp->nr_rates] = rate; | 198 | fp->rate_table[fp->nr_rates] = rate; |
diff --git a/sound/usb/hiface/pcm.c b/sound/usb/hiface/pcm.c index c21a3df9a0df..2c44139b4041 100644 --- a/sound/usb/hiface/pcm.c +++ b/sound/usb/hiface/pcm.c | |||
@@ -110,7 +110,7 @@ static const struct snd_pcm_hardware pcm_hw = { | |||
110 | #define HIFACE_RATE_96000 0x4a | 110 | #define HIFACE_RATE_96000 0x4a |
111 | #define HIFACE_RATE_176400 0x40 | 111 | #define HIFACE_RATE_176400 0x40 |
112 | #define HIFACE_RATE_192000 0x48 | 112 | #define HIFACE_RATE_192000 0x48 |
113 | #define HIFACE_RATE_352000 0x58 | 113 | #define HIFACE_RATE_352800 0x58 |
114 | #define HIFACE_RATE_384000 0x68 | 114 | #define HIFACE_RATE_384000 0x68 |
115 | 115 | ||
116 | static int hiface_pcm_set_rate(struct pcm_runtime *rt, unsigned int rate) | 116 | static int hiface_pcm_set_rate(struct pcm_runtime *rt, unsigned int rate) |
@@ -141,8 +141,8 @@ static int hiface_pcm_set_rate(struct pcm_runtime *rt, unsigned int rate) | |||
141 | case 192000: | 141 | case 192000: |
142 | rate_value = HIFACE_RATE_192000; | 142 | rate_value = HIFACE_RATE_192000; |
143 | break; | 143 | break; |
144 | case 352000: | 144 | case 352800: |
145 | rate_value = HIFACE_RATE_352000; | 145 | rate_value = HIFACE_RATE_352800; |
146 | break; | 146 | break; |
147 | case 384000: | 147 | case 384000: |
148 | rate_value = HIFACE_RATE_384000; | 148 | rate_value = HIFACE_RATE_384000; |
diff --git a/sound/usb/mixer_maps.c b/sound/usb/mixer_maps.c index cc2dd1f0decb..32af6b741ef5 100644 --- a/sound/usb/mixer_maps.c +++ b/sound/usb/mixer_maps.c | |||
@@ -322,6 +322,12 @@ static struct usbmix_name_map hercules_usb51_map[] = { | |||
322 | { 0 } /* terminator */ | 322 | { 0 } /* terminator */ |
323 | }; | 323 | }; |
324 | 324 | ||
325 | /* Plantronics Gamecom 780 has a broken volume control, better to disable it */ | ||
326 | static struct usbmix_name_map gamecom780_map[] = { | ||
327 | { 9, NULL }, /* FU, speaker out */ | ||
328 | {} | ||
329 | }; | ||
330 | |||
325 | /* | 331 | /* |
326 | * Control map entries | 332 | * Control map entries |
327 | */ | 333 | */ |
@@ -358,6 +364,10 @@ static struct usbmix_ctl_map usbmix_ctl_maps[] = { | |||
358 | .id = USB_ID(0x046d, 0x09a4), | 364 | .id = USB_ID(0x046d, 0x09a4), |
359 | .ignore_ctl_error = 1, | 365 | .ignore_ctl_error = 1, |
360 | }, | 366 | }, |
367 | { /* Plantronics GameCom 780 */ | ||
368 | .id = USB_ID(0x047f, 0xc010), | ||
369 | .map = gamecom780_map, | ||
370 | }, | ||
361 | { | 371 | { |
362 | /* Hercules DJ Console (Windows Edition) */ | 372 | /* Hercules DJ Console (Windows Edition) */ |
363 | .id = USB_ID(0x06f8, 0xb000), | 373 | .id = USB_ID(0x06f8, 0xb000), |
diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h index f5f0595ef9c7..f652b10ce905 100644 --- a/sound/usb/quirks-table.h +++ b/sound/usb/quirks-table.h | |||
@@ -72,22 +72,21 @@ | |||
72 | } | 72 | } |
73 | }, | 73 | }, |
74 | 74 | ||
75 | /* Creative/Toshiba Multimedia Center SB-0500 */ | 75 | /* Creative/E-Mu devices */ |
76 | { | 76 | { |
77 | USB_DEVICE(0x041e, 0x3048), | 77 | USB_DEVICE(0x041e, 0x3010), |
78 | .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { | 78 | .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { |
79 | .vendor_name = "Toshiba", | 79 | .vendor_name = "Creative Labs", |
80 | .product_name = "SB-0500", | 80 | .product_name = "Sound Blaster MP3+", |
81 | .ifnum = QUIRK_NO_INTERFACE | 81 | .ifnum = QUIRK_NO_INTERFACE |
82 | } | 82 | } |
83 | }, | 83 | }, |
84 | 84 | /* Creative/Toshiba Multimedia Center SB-0500 */ | |
85 | /* Creative/E-Mu devices */ | ||
86 | { | 85 | { |
87 | USB_DEVICE(0x041e, 0x3010), | 86 | USB_DEVICE(0x041e, 0x3048), |
88 | .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { | 87 | .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { |
89 | .vendor_name = "Creative Labs", | 88 | .vendor_name = "Toshiba", |
90 | .product_name = "Sound Blaster MP3+", | 89 | .product_name = "SB-0500", |
91 | .ifnum = QUIRK_NO_INTERFACE | 90 | .ifnum = QUIRK_NO_INTERFACE |
92 | } | 91 | } |
93 | }, | 92 | }, |
@@ -2521,6 +2520,46 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2521 | } | 2520 | } |
2522 | }, | 2521 | }, |
2523 | { | 2522 | { |
2523 | USB_DEVICE(0x1235, 0x0010), | ||
2524 | .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { | ||
2525 | .vendor_name = "Focusrite", | ||
2526 | .product_name = "Saffire 6 USB", | ||
2527 | .ifnum = QUIRK_ANY_INTERFACE, | ||
2528 | .type = QUIRK_COMPOSITE, | ||
2529 | .data = (const struct snd_usb_audio_quirk[]) { | ||
2530 | { | ||
2531 | .ifnum = 0, | ||
2532 | .type = QUIRK_AUDIO_FIXED_ENDPOINT, | ||
2533 | .data = &(const struct audioformat) { | ||
2534 | .formats = SNDRV_PCM_FMTBIT_S24_3LE, | ||
2535 | .channels = 4, | ||
2536 | .iface = 0, | ||
2537 | .altsetting = 1, | ||
2538 | .altset_idx = 1, | ||
2539 | .attributes = UAC_EP_CS_ATTR_SAMPLE_RATE, | ||
2540 | .endpoint = 0x01, | ||
2541 | .ep_attr = USB_ENDPOINT_XFER_ISOC, | ||
2542 | .rates = SNDRV_PCM_RATE_44100 | | ||
2543 | SNDRV_PCM_RATE_48000, | ||
2544 | .rate_min = 44100, | ||
2545 | .rate_max = 48000, | ||
2546 | .nr_rates = 2, | ||
2547 | .rate_table = (unsigned int[]) { | ||
2548 | 44100, 48000 | ||
2549 | } | ||
2550 | } | ||
2551 | }, | ||
2552 | { | ||
2553 | .ifnum = 1, | ||
2554 | .type = QUIRK_MIDI_RAW_BYTES | ||
2555 | }, | ||
2556 | { | ||
2557 | .ifnum = -1 | ||
2558 | } | ||
2559 | } | ||
2560 | } | ||
2561 | }, | ||
2562 | { | ||
2524 | USB_DEVICE(0x1235, 0x0018), | 2563 | USB_DEVICE(0x1235, 0x0018), |
2525 | .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { | 2564 | .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { |
2526 | .vendor_name = "Novation", | 2565 | .vendor_name = "Novation", |
@@ -2569,6 +2608,57 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2569 | .type = QUIRK_MIDI_NOVATION | 2608 | .type = QUIRK_MIDI_NOVATION |
2570 | } | 2609 | } |
2571 | }, | 2610 | }, |
2611 | { | ||
2612 | /* | ||
2613 | * Focusrite Scarlett 18i6 | ||
2614 | * | ||
2615 | * Avoid mixer creation, which otherwise fails because some of | ||
2616 | * the interface descriptor subtypes for interface 0 are | ||
2617 | * unknown. That should be fixed or worked-around but this at | ||
2618 | * least allows the device to be used successfully with a DAW | ||
2619 | * and an external mixer. See comments below about other | ||
2620 | * ignored interfaces. | ||
2621 | */ | ||
2622 | USB_DEVICE(0x1235, 0x8004), | ||
2623 | .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { | ||
2624 | .vendor_name = "Focusrite", | ||
2625 | .product_name = "Scarlett 18i6", | ||
2626 | .ifnum = QUIRK_ANY_INTERFACE, | ||
2627 | .type = QUIRK_COMPOSITE, | ||
2628 | .data = & (const struct snd_usb_audio_quirk[]) { | ||
2629 | { | ||
2630 | /* InterfaceSubClass 1 (Control Device) */ | ||
2631 | .ifnum = 0, | ||
2632 | .type = QUIRK_IGNORE_INTERFACE | ||
2633 | }, | ||
2634 | { | ||
2635 | .ifnum = 1, | ||
2636 | .type = QUIRK_AUDIO_STANDARD_INTERFACE | ||
2637 | }, | ||
2638 | { | ||
2639 | .ifnum = 2, | ||
2640 | .type = QUIRK_AUDIO_STANDARD_INTERFACE | ||
2641 | }, | ||
2642 | { | ||
2643 | /* InterfaceSubClass 1 (Control Device) */ | ||
2644 | .ifnum = 3, | ||
2645 | .type = QUIRK_IGNORE_INTERFACE | ||
2646 | }, | ||
2647 | { | ||
2648 | .ifnum = 4, | ||
2649 | .type = QUIRK_MIDI_STANDARD_INTERFACE | ||
2650 | }, | ||
2651 | { | ||
2652 | /* InterfaceSubClass 1 (Device Firmware Update) */ | ||
2653 | .ifnum = 5, | ||
2654 | .type = QUIRK_IGNORE_INTERFACE | ||
2655 | }, | ||
2656 | { | ||
2657 | .ifnum = -1 | ||
2658 | } | ||
2659 | } | ||
2660 | } | ||
2661 | }, | ||
2572 | 2662 | ||
2573 | /* Access Music devices */ | 2663 | /* Access Music devices */ |
2574 | { | 2664 | { |
@@ -2671,7 +2761,7 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2671 | } | 2761 | } |
2672 | }, | 2762 | }, |
2673 | { | 2763 | { |
2674 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x7240), | 2764 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x7210), |
2675 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | | 2765 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | |
2676 | USB_DEVICE_ID_MATCH_INT_CLASS | | 2766 | USB_DEVICE_ID_MATCH_INT_CLASS | |
2677 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, | 2767 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, |
@@ -2679,13 +2769,13 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2679 | .bInterfaceSubClass = USB_SUBCLASS_AUDIOCONTROL, | 2769 | .bInterfaceSubClass = USB_SUBCLASS_AUDIOCONTROL, |
2680 | .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { | 2770 | .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { |
2681 | .vendor_name = "Hauppauge", | 2771 | .vendor_name = "Hauppauge", |
2682 | .product_name = "HVR-850", | 2772 | .product_name = "HVR-950Q", |
2683 | .ifnum = QUIRK_ANY_INTERFACE, | 2773 | .ifnum = QUIRK_ANY_INTERFACE, |
2684 | .type = QUIRK_AUDIO_ALIGN_TRANSFER, | 2774 | .type = QUIRK_AUDIO_ALIGN_TRANSFER, |
2685 | } | 2775 | } |
2686 | }, | 2776 | }, |
2687 | { | 2777 | { |
2688 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x7210), | 2778 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x7217), |
2689 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | | 2779 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | |
2690 | USB_DEVICE_ID_MATCH_INT_CLASS | | 2780 | USB_DEVICE_ID_MATCH_INT_CLASS | |
2691 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, | 2781 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, |
@@ -2699,7 +2789,7 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2699 | } | 2789 | } |
2700 | }, | 2790 | }, |
2701 | { | 2791 | { |
2702 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x7217), | 2792 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x721b), |
2703 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | | 2793 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | |
2704 | USB_DEVICE_ID_MATCH_INT_CLASS | | 2794 | USB_DEVICE_ID_MATCH_INT_CLASS | |
2705 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, | 2795 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, |
@@ -2713,7 +2803,7 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2713 | } | 2803 | } |
2714 | }, | 2804 | }, |
2715 | { | 2805 | { |
2716 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x721b), | 2806 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x721e), |
2717 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | | 2807 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | |
2718 | USB_DEVICE_ID_MATCH_INT_CLASS | | 2808 | USB_DEVICE_ID_MATCH_INT_CLASS | |
2719 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, | 2809 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, |
@@ -2727,7 +2817,7 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2727 | } | 2817 | } |
2728 | }, | 2818 | }, |
2729 | { | 2819 | { |
2730 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x721e), | 2820 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x721f), |
2731 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | | 2821 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | |
2732 | USB_DEVICE_ID_MATCH_INT_CLASS | | 2822 | USB_DEVICE_ID_MATCH_INT_CLASS | |
2733 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, | 2823 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, |
@@ -2741,7 +2831,7 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2741 | } | 2831 | } |
2742 | }, | 2832 | }, |
2743 | { | 2833 | { |
2744 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x721f), | 2834 | USB_DEVICE_VENDOR_SPEC(0x2040, 0x7240), |
2745 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | | 2835 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE | |
2746 | USB_DEVICE_ID_MATCH_INT_CLASS | | 2836 | USB_DEVICE_ID_MATCH_INT_CLASS | |
2747 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, | 2837 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, |
@@ -2749,7 +2839,7 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
2749 | .bInterfaceSubClass = USB_SUBCLASS_AUDIOCONTROL, | 2839 | .bInterfaceSubClass = USB_SUBCLASS_AUDIOCONTROL, |
2750 | .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { | 2840 | .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { |
2751 | .vendor_name = "Hauppauge", | 2841 | .vendor_name = "Hauppauge", |
2752 | .product_name = "HVR-950Q", | 2842 | .product_name = "HVR-850", |
2753 | .ifnum = QUIRK_ANY_INTERFACE, | 2843 | .ifnum = QUIRK_ANY_INTERFACE, |
2754 | .type = QUIRK_AUDIO_ALIGN_TRANSFER, | 2844 | .type = QUIRK_AUDIO_ALIGN_TRANSFER, |
2755 | } | 2845 | } |
@@ -3054,58 +3144,6 @@ YAMAHA_DEVICE(0x7010, "UB99"), | |||
3054 | 3144 | ||
3055 | { | 3145 | { |
3056 | /* | 3146 | /* |
3057 | * Focusrite Scarlett 18i6 | ||
3058 | * | ||
3059 | * Avoid mixer creation, which otherwise fails because some of | ||
3060 | * the interface descriptor subtypes for interface 0 are | ||
3061 | * unknown. That should be fixed or worked-around but this at | ||
3062 | * least allows the device to be used successfully with a DAW | ||
3063 | * and an external mixer. See comments below about other | ||
3064 | * ignored interfaces. | ||
3065 | */ | ||
3066 | USB_DEVICE(0x1235, 0x8004), | ||
3067 | .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { | ||
3068 | .vendor_name = "Focusrite", | ||
3069 | .product_name = "Scarlett 18i6", | ||
3070 | .ifnum = QUIRK_ANY_INTERFACE, | ||
3071 | .type = QUIRK_COMPOSITE, | ||
3072 | .data = & (const struct snd_usb_audio_quirk[]) { | ||
3073 | { | ||
3074 | /* InterfaceSubClass 1 (Control Device) */ | ||
3075 | .ifnum = 0, | ||
3076 | .type = QUIRK_IGNORE_INTERFACE | ||
3077 | }, | ||
3078 | { | ||
3079 | .ifnum = 1, | ||
3080 | .type = QUIRK_AUDIO_STANDARD_INTERFACE | ||
3081 | }, | ||
3082 | { | ||
3083 | .ifnum = 2, | ||
3084 | .type = QUIRK_AUDIO_STANDARD_INTERFACE | ||
3085 | }, | ||
3086 | { | ||
3087 | /* InterfaceSubClass 1 (Control Device) */ | ||
3088 | .ifnum = 3, | ||
3089 | .type = QUIRK_IGNORE_INTERFACE | ||
3090 | }, | ||
3091 | { | ||
3092 | .ifnum = 4, | ||
3093 | .type = QUIRK_MIDI_STANDARD_INTERFACE | ||
3094 | }, | ||
3095 | { | ||
3096 | /* InterfaceSubClass 1 (Device Firmware Update) */ | ||
3097 | .ifnum = 5, | ||
3098 | .type = QUIRK_IGNORE_INTERFACE | ||
3099 | }, | ||
3100 | { | ||
3101 | .ifnum = -1 | ||
3102 | } | ||
3103 | } | ||
3104 | } | ||
3105 | }, | ||
3106 | |||
3107 | { | ||
3108 | /* | ||
3109 | * Some USB MIDI devices don't have an audio control interface, | 3147 | * Some USB MIDI devices don't have an audio control interface, |
3110 | * so we have to grab MIDI streaming interfaces here. | 3148 | * so we have to grab MIDI streaming interfaces here. |
3111 | */ | 3149 | */ |
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 0df9ede99dfd..89730707614c 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c | |||
@@ -660,10 +660,23 @@ static int snd_usb_cm6206_boot_quirk(struct usb_device *dev) | |||
660 | return err; | 660 | return err; |
661 | } | 661 | } |
662 | 662 | ||
663 | /* quirk for Plantronics GameCom 780 with CM6302 chip */ | ||
664 | static int snd_usb_gamecon780_boot_quirk(struct usb_device *dev) | ||
665 | { | ||
666 | /* set the initial volume and don't change; other values are either | ||
667 | * too loud or silent due to firmware bug (bko#65251) | ||
668 | */ | ||
669 | u8 buf[2] = { 0x74, 0xdc }; | ||
670 | return snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), UAC_SET_CUR, | ||
671 | USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_OUT, | ||
672 | UAC_FU_VOLUME << 8, 9 << 8, buf, 2); | ||
673 | } | ||
674 | |||
663 | /* | 675 | /* |
664 | * Novation Twitch DJ controller | 676 | * Novation Twitch DJ controller |
677 | * Focusrite Novation Saffire 6 USB audio card | ||
665 | */ | 678 | */ |
666 | static int snd_usb_twitch_boot_quirk(struct usb_device *dev) | 679 | static int snd_usb_novation_boot_quirk(struct usb_device *dev) |
667 | { | 680 | { |
668 | /* preemptively set up the device because otherwise the | 681 | /* preemptively set up the device because otherwise the |
669 | * raw MIDI endpoints are not active */ | 682 | * raw MIDI endpoints are not active */ |
@@ -972,9 +985,9 @@ int snd_usb_apply_boot_quirk(struct usb_device *dev, | |||
972 | /* Digidesign Mbox 2 */ | 985 | /* Digidesign Mbox 2 */ |
973 | return snd_usb_mbox2_boot_quirk(dev); | 986 | return snd_usb_mbox2_boot_quirk(dev); |
974 | 987 | ||
975 | case USB_ID(0x1235, 0x0018): | 988 | case USB_ID(0x1235, 0x0010): /* Focusrite Novation Saffire 6 USB */ |
976 | /* Focusrite Novation Twitch */ | 989 | case USB_ID(0x1235, 0x0018): /* Focusrite Novation Twitch */ |
977 | return snd_usb_twitch_boot_quirk(dev); | 990 | return snd_usb_novation_boot_quirk(dev); |
978 | 991 | ||
979 | case USB_ID(0x133e, 0x0815): | 992 | case USB_ID(0x133e, 0x0815): |
980 | /* Access Music VirusTI Desktop */ | 993 | /* Access Music VirusTI Desktop */ |
@@ -986,6 +999,8 @@ int snd_usb_apply_boot_quirk(struct usb_device *dev, | |||
986 | return snd_usb_nativeinstruments_boot_quirk(dev); | 999 | return snd_usb_nativeinstruments_boot_quirk(dev); |
987 | case USB_ID(0x0763, 0x2012): /* M-Audio Fast Track Pro USB */ | 1000 | case USB_ID(0x0763, 0x2012): /* M-Audio Fast Track Pro USB */ |
988 | return snd_usb_fasttrackpro_boot_quirk(dev); | 1001 | return snd_usb_fasttrackpro_boot_quirk(dev); |
1002 | case USB_ID(0x047f, 0xc010): /* Plantronics Gamecom 780 */ | ||
1003 | return snd_usb_gamecon780_boot_quirk(dev); | ||
989 | } | 1004 | } |
990 | 1005 | ||
991 | return 0; | 1006 | return 0; |