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-rw-r--r--Documentation/arm/memory.txt11
-rw-r--r--Documentation/devicetree/bindings/arm/gic.txt4
-rw-r--r--Documentation/devicetree/bindings/arm/vic.txt29
-rw-r--r--arch/arm/common/Kconfig6
-rw-r--r--arch/arm/common/gic.c165
-rw-r--r--arch/arm/common/vic.c143
-rw-r--r--arch/arm/include/asm/cti.h179
-rw-r--r--arch/arm/include/asm/entry-macro-vic2.S57
-rw-r--r--arch/arm/include/asm/hardware/entry-macro-gic.S60
-rw-r--r--arch/arm/include/asm/hardware/gic.h26
-rw-r--r--arch/arm/include/asm/hardware/vic.h10
-rw-r--r--arch/arm/include/asm/mach/arch.h9
-rw-r--r--arch/arm/include/asm/perf_event.h3
-rw-r--r--arch/arm/include/asm/pgtable.h13
-rw-r--r--arch/arm/include/asm/pmu.h15
-rw-r--r--arch/arm/include/asm/system.h1
-rw-r--r--arch/arm/kernel/entry-armv.S7
-rw-r--r--arch/arm/kernel/machine_kexec.c4
-rw-r--r--arch/arm/kernel/perf_event.c19
-rw-r--r--arch/arm/kernel/perf_event_v6.c32
-rw-r--r--arch/arm/kernel/perf_event_v7.c401
-rw-r--r--arch/arm/kernel/perf_event_xscale.c16
-rw-r--r--arch/arm/kernel/process.c35
-rw-r--r--arch/arm/kernel/setup.c15
-rw-r--r--arch/arm/mach-at91/include/mach/io.h8
-rw-r--r--arch/arm/mach-at91/include/mach/vmalloc.h28
-rw-r--r--arch/arm/mach-at91/setup.c18
-rw-r--r--arch/arm/mach-bcmring/dma.c2
-rw-r--r--arch/arm/mach-bcmring/include/mach/vmalloc.h25
-rw-r--r--arch/arm/mach-clps711x/Makefile2
-rw-r--r--arch/arm/mach-clps711x/common.c (renamed from arch/arm/mach-clps711x/irq.c)95
-rw-r--r--arch/arm/mach-clps711x/include/mach/system.h2
-rw-r--r--arch/arm/mach-clps711x/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-clps711x/mm.c48
-rw-r--r--arch/arm/mach-clps711x/time.c84
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c2
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/vmalloc.h11
-rw-r--r--arch/arm/mach-davinci/Makefile2
-rw-r--r--arch/arm/mach-davinci/include/mach/io.h8
-rw-r--r--arch/arm/mach-davinci/include/mach/vmalloc.h14
-rw-r--r--arch/arm/mach-davinci/io.c48
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h2
-rw-r--r--arch/arm/mach-dove/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-ebsa110/core.c2
-rw-r--r--arch/arm/mach-ebsa110/include/mach/system.h2
-rw-r--r--arch/arm/mach-ebsa110/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c2
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c9
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/entry-macro.S42
-rw-r--r--arch/arm/mach-ep93xx/include/mach/system.h2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-ep93xx/micro9.c5
-rw-r--r--arch/arm/mach-ep93xx/simone.c2
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c2
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c2
-rw-r--r--arch/arm/mach-exynos/cpu.c20
-rw-r--r--arch/arm/mach-exynos/include/mach/entry-macro.S75
-rw-r--r--arch/arm/mach-exynos/include/mach/vmalloc.h22
-rw-r--r--arch/arm/mach-exynos/mach-armlex4210.c2
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c2
-rw-r--r--arch/arm/mach-exynos/mach-origen.c2
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c3
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c3
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c2
-rw-r--r--arch/arm/mach-exynos/platsmp.c28
-rw-r--r--arch/arm/mach-footbridge/cats-hw.c2
-rw-r--r--arch/arm/mach-footbridge/include/mach/system.h2
-rw-r--r--arch/arm/mach-footbridge/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-gemini/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-h720x/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-highbank/highbank.c1
-rw-r--r--arch/arm/mach-highbank/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-highbank/include/mach/vmalloc.h1
-rw-r--r--arch/arm/mach-integrator/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-iop13xx/include/mach/vmalloc.h4
-rw-r--r--arch/arm/mach-iop32x/include/mach/io.h7
-rw-r--r--arch/arm/mach-iop32x/include/mach/system.h4
-rw-r--r--arch/arm/mach-iop32x/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-iop33x/include/mach/io.h7
-rw-r--r--arch/arm/mach-iop33x/include/mach/system.h2
-rw-r--r--arch/arm/mach-iop33x/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-ixp2000/include/mach/system.h2
-rw-r--r--arch/arm/mach-ixp2000/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/io.h29
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/system.h2
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-kirkwood/include/mach/io.h25
-rw-r--r--arch/arm/mach-kirkwood/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-ks8695/include/mach/system.h2
-rw-r--r--arch/arm/mach-ks8695/include/mach/vmalloc.h19
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/system.h3
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/vmalloc.h24
-rw-r--r--arch/arm/mach-mmp/include/mach/system.h4
-rw-r--r--arch/arm/mach-mmp/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-msm/board-msm8960.c2
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c4
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-qgic.S17
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-vic.S37
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro.S27
-rw-r--r--arch/arm/mach-msm/include/mach/vmalloc.h22
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-mxs/include/mach/vmalloc.h22
-rw-r--r--arch/arm/mach-mxs/system.c2
-rw-r--r--arch/arm/mach-netx/include/mach/entry-macro.S13
-rw-r--r--arch/arm/mach-netx/include/mach/vmalloc.h19
-rw-r--r--arch/arm/mach-netx/nxdb500.c2
-rw-r--r--arch/arm/mach-netx/nxdkn.c2
-rw-r--r--arch/arm/mach-netx/nxeb500hmi.c2
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c2
-rw-r--r--arch/arm/mach-nomadik/include/mach/entry-macro.S30
-rw-r--r--arch/arm/mach-nomadik/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-omap1/board-fsample.c2
-rw-r--r--arch/arm/mach-omap1/board-generic.c2
-rw-r--r--arch/arm/mach-omap1/board-h2.c2
-rw-r--r--arch/arm/mach-omap1/board-h3.c2
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c2
-rw-r--r--arch/arm/mach-omap1/board-innovator.c2
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c2
-rw-r--r--arch/arm/mach-omap1/board-osk.c2
-rw-r--r--arch/arm/mach-omap1/board-palmte.c2
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c2
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c2
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c2
-rw-r--r--arch/arm/mach-omap1/board-sx1.c2
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c2
-rw-r--r--arch/arm/mach-omap1/common.h61
-rw-r--r--arch/arm/mach-omap1/devices.c2
-rw-r--r--arch/arm/mach-omap1/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-omap1/io.c1
-rw-r--r--arch/arm/mach-omap1/time.c2
-rw-r--r--arch/arm/mach-omap1/timer32k.c2
-rw-r--r--arch/arm/mach-omap2/Kconfig18
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c3
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c3
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c3
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c11
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c3
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c3
-rw-r--r--arch/arm/mach-omap2/board-apollon.c3
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c86
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c3
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c3
-rw-r--r--arch/arm/mach-omap2/board-generic.c4
-rw-r--r--arch/arm/mach-omap2/board-h4.c3
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c4
-rw-r--r--arch/arm/mach-omap2/board-ldp.c3
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c5
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c3
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c5
-rw-r--r--arch/arm/mach-omap2/board-overo.c3
-rw-r--r--arch/arm/mach-omap2/board-rm680.c3
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c48
-rw-r--r--arch/arm/mach-omap2/board-rx51.c3
-rw-r--r--arch/arm/mach-omap2/board-ti8168evm.c35
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c2
-rw-r--r--arch/arm/mach-omap2/board-zoom.c4
-rw-r--r--arch/arm/mach-omap2/clock.c2
-rw-r--r--arch/arm/mach-omap2/clock.h2
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c6
-rw-r--r--arch/arm/mach-omap2/cm2xxx_3xxx.c2
-rw-r--r--arch/arm/mach-omap2/cm44xx.c2
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c2
-rw-r--r--arch/arm/mach-omap2/common.c50
-rw-r--r--arch/arm/mach-omap2/common.h196
-rw-r--r--arch/arm/mach-omap2/control.c2
-rw-r--r--arch/arm/mach-omap2/control.h8
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c1
-rw-r--r--arch/arm/mach-omap2/devices.c22
-rw-r--r--arch/arm/mach-omap2/display.c3
-rw-r--r--arch/arm/mach-omap2/i2c.c2
-rw-r--r--arch/arm/mach-omap2/id.c54
-rw-r--r--arch/arm/mach-omap2/include/mach/debug-macro.S12
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S137
-rw-r--r--arch/arm/mach-omap2/include/mach/omap4-common.h43
-rw-r--r--arch/arm/mach-omap2/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-omap2/io.c46
-rw-r--r--arch/arm/mach-omap2/irq.c53
-rw-r--r--arch/arm/mach-omap2/omap-hotplug.c3
-rw-r--r--arch/arm/mach-omap2/omap-smp.c3
-rw-r--r--arch/arm/mach-omap2/omap4-common.c9
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c2
-rw-r--r--arch/arm/mach-omap2/opp2xxx.h2
-rw-r--r--arch/arm/mach-omap2/pm.c2
-rw-r--r--arch/arm/mach-omap2/pm24xx.c1
-rw-r--r--arch/arm/mach-omap2/pm34xx.c1
-rw-r--r--arch/arm/mach-omap2/pm44xx.c2
-rw-r--r--arch/arm/mach-omap2/prcm.c2
-rw-r--r--arch/arm/mach-omap2/prcm_mpu44xx.c2
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c2
-rw-r--r--arch/arm/mach-omap2/prm44xx.c2
-rw-r--r--arch/arm/mach-omap2/prminst44xx.c2
-rw-r--r--arch/arm/mach-omap2/sdram-nokia.c27
-rw-r--r--arch/arm/mach-omap2/sdrc.c2
-rw-r--r--arch/arm/mach-omap2/sdrc2xxx.c2
-rw-r--r--arch/arm/mach-omap2/serial.c8
-rw-r--r--arch/arm/mach-omap2/smartreflex.c2
-rw-r--r--arch/arm/mach-omap2/timer.c2
-rw-r--r--arch/arm/mach-omap2/vc3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/vc44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/voltage.c2
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/voltagedomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/vp.c2
-rw-r--r--arch/arm/mach-omap2/vp3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/vp44xx_data.c2
-rw-r--r--arch/arm/mach-orion5x/include/mach/io.h25
-rw-r--r--arch/arm/mach-orion5x/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-picoxcell/common.c9
-rw-r--r--arch/arm/mach-picoxcell/include/mach/entry-macro.S11
-rw-r--r--arch/arm/mach-picoxcell/include/mach/vmalloc.h14
-rw-r--r--arch/arm/mach-pnx4008/include/mach/system.h2
-rw-r--r--arch/arm/mach-pnx4008/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-prima2/include/mach/map.h6
-rw-r--r--arch/arm/mach-prima2/include/mach/vmalloc.h16
-rw-r--r--arch/arm/mach-pxa/include/mach/entry-macro.S36
-rw-r--r--arch/arm/mach-pxa/include/mach/vmalloc.h11
-rw-r--r--arch/arm/mach-pxa/mioa701.c1
-rw-r--r--arch/arm/mach-pxa/poodle.c6
-rw-r--r--arch/arm/mach-pxa/reset.c2
-rw-r--r--arch/arm/mach-pxa/spitz.c3
-rw-r--r--arch/arm/mach-pxa/tosa.c1
-rw-r--r--arch/arm/mach-realview/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-realview/include/mach/vmalloc.h21
-rw-r--r--arch/arm/mach-realview/realview_eb.c5
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c1
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c1
-rw-r--r--arch/arm/mach-realview/realview_pba8.c1
-rw-r--r--arch/arm/mach-realview/realview_pbx.c5
-rw-r--r--arch/arm/mach-rpc/include/mach/system.h2
-rw-r--r--arch/arm/mach-rpc/include/mach/vmalloc.h10
-rw-r--r--arch/arm/mach-s3c2410/include/mach/system-reset.h4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/entry-macro.S7
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/system.h2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-ncp.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq5.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq7.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6400.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c2
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/entry-macro.S7
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c2
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/entry-macro.S25
-rw-r--r--arch/arm/mach-s5pc100/include/mach/vmalloc.h17
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/entry-macro.S37
-rw-r--r--arch/arm/mach-s5pv210/include/mach/vmalloc.h22
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-torbreck.c2
-rw-r--r--arch/arm/mach-sa1100/include/mach/system.h2
-rw-r--r--arch/arm/mach-sa1100/include/mach/vmalloc.h4
-rw-r--r--arch/arm/mach-shark/core.c1
-rw-r--r--arch/arm/mach-shark/include/mach/vmalloc.h4
-rw-r--r--arch/arm/mach-shmobile/Makefile1
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c2
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c2
-rw-r--r--arch/arm/mach-shmobile/entry-gic.S18
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/entry-macro.S9
-rw-r--r--arch/arm/mach-shmobile/include/mach/system.h2
-rw-r--r--arch/arm/mach-shmobile/include/mach/vmalloc.h7
-rw-r--r--arch/arm/mach-spear3xx/include/mach/entry-macro.S27
-rw-r--r--arch/arm/mach-spear3xx/include/mach/vmalloc.h19
-rw-r--r--arch/arm/mach-spear3xx/spear300_evb.c2
-rw-r--r--arch/arm/mach-spear3xx/spear310_evb.c2
-rw-r--r--arch/arm/mach-spear3xx/spear320_evb.c2
-rw-r--r--arch/arm/mach-spear6xx/include/mach/entry-macro.S36
-rw-r--r--arch/arm/mach-spear6xx/include/mach/vmalloc.h19
-rw-r--r--arch/arm/mach-spear6xx/spear600_evb.c2
-rw-r--r--arch/arm/mach-tegra/board-dt.c2
-rw-r--r--arch/arm/mach-tegra/board-harmony.c2
-rw-r--r--arch/arm/mach-tegra/board-paz00.c2
-rw-r--r--arch/arm/mach-tegra/board-seaboard.c4
-rw-r--r--arch/arm/mach-tegra/board-trimslice.c2
-rw-r--r--arch/arm/mach-tegra/include/mach/entry-macro.S22
-rw-r--r--arch/arm/mach-tegra/include/mach/io.h6
-rw-r--r--arch/arm/mach-tegra/include/mach/vmalloc.h28
-rw-r--r--arch/arm/mach-tegra/io.c21
-rw-r--r--arch/arm/mach-u300/include/mach/entry-macro.S24
-rw-r--r--arch/arm/mach-u300/include/mach/system.h2
-rw-r--r--arch/arm/mach-u300/include/mach/vmalloc.h12
-rw-r--r--arch/arm/mach-u300/u300.c2
-rw-r--r--arch/arm/mach-ux500/board-mop500.c4
-rw-r--r--arch/arm/mach-ux500/board-u5500.c2
-rw-r--r--arch/arm/mach-ux500/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-ux500/include/mach/vmalloc.h18
-rw-r--r--arch/arm/mach-versatile/core.c5
-rw-r--r--arch/arm/mach-versatile/include/mach/entry-macro.S30
-rw-r--r--arch/arm/mach-versatile/include/mach/vmalloc.h21
-rw-r--r--arch/arm/mach-versatile/versatile_ab.c2
-rw-r--r--arch/arm/mach-versatile/versatile_dt.c2
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c2
-rw-r--r--arch/arm/mach-vexpress/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-vexpress/include/mach/vmalloc.h21
-rw-r--r--arch/arm/mach-vexpress/v2m.c2
-rw-r--r--arch/arm/mach-vt8500/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-w90x900/include/mach/system.h2
-rw-r--r--arch/arm/mach-w90x900/include/mach/vmalloc.h23
-rw-r--r--arch/arm/mach-w90x900/irq.c2
-rw-r--r--arch/arm/mach-w90x900/nuc910.h9
-rw-r--r--arch/arm/mach-w90x900/nuc950.h9
-rw-r--r--arch/arm/mach-w90x900/nuc960.h9
-rw-r--r--arch/arm/mach-w90x900/nuc9xx.h23
-rw-r--r--arch/arm/mach-w90x900/time.c2
-rw-r--r--arch/arm/mach-zynq/common.c1
-rw-r--r--arch/arm/mach-zynq/include/mach/entry-macro.S3
-rw-r--r--arch/arm/mach-zynq/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mm/idmap.c2
-rw-r--r--arch/arm/mm/init.c40
-rw-r--r--arch/arm/mm/ioremap.c82
-rw-r--r--arch/arm/mm/mm.h14
-rw-r--r--arch/arm/mm/mmu.c51
-rw-r--r--arch/arm/mm/nommu.c4
-rw-r--r--arch/arm/plat-iop/Makefile2
-rw-r--r--arch/arm/plat-iop/io.c59
-rw-r--r--arch/arm/plat-mxc/Makefile1
-rw-r--r--arch/arm/plat-mxc/gic.c41
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S11
-rw-r--r--arch/arm/plat-mxc/include/mach/mx1.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/vmalloc.h22
-rw-r--r--arch/arm/plat-mxc/system.c2
-rw-r--r--arch/arm/plat-omap/Makefile3
-rw-r--r--arch/arm/plat-omap/common.c8
-rw-r--r--arch/arm/plat-omap/include/plat/am33xx.h25
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h4
-rw-r--r--arch/arm/plat-omap/include/plat/common.h82
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h56
-rw-r--r--arch/arm/plat-omap/include/plat/hardware.h3
-rw-r--r--arch/arm/plat-omap/include/plat/io.h88
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h14
-rw-r--r--arch/arm/plat-omap/include/plat/omap34xx.h2
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h14
-rw-r--r--arch/arm/plat-omap/include/plat/ti81xx.h (renamed from arch/arm/plat-omap/include/plat/ti816x.h)18
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h11
-rw-r--r--arch/arm/plat-omap/io.c159
-rw-r--r--arch/arm/plat-s5p/Kconfig1
-rw-r--r--arch/arm/plat-spear/include/plat/system.h2
-rw-r--r--arch/arm/plat-spear/include/plat/vmalloc.h19
-rw-r--r--arch/arm/plat-tcc/include/mach/vmalloc.h10
-rw-r--r--include/linux/vmalloc.h1
-rw-r--r--mm/vmalloc.c29
362 files changed, 2119 insertions, 3271 deletions
diff --git a/Documentation/arm/memory.txt b/Documentation/arm/memory.txt
index 771d48d3b335..208a2d465b92 100644
--- a/Documentation/arm/memory.txt
+++ b/Documentation/arm/memory.txt
@@ -51,15 +51,14 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned
51ff000000 ffbfffff Reserved for future expansion of DMA 51ff000000 ffbfffff Reserved for future expansion of DMA
52 mapping region. 52 mapping region.
53 53
54VMALLOC_END feffffff Free for platform use, recommended.
55 VMALLOC_END must be aligned to a 2MB
56 boundary.
57
58VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space. 54VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space.
59 Memory returned by vmalloc/ioremap will 55 Memory returned by vmalloc/ioremap will
60 be dynamically placed in this region. 56 be dynamically placed in this region.
61 VMALLOC_START may be based upon the value 57 Machine specific static mappings are also
62 of the high_memory variable. 58 located here through iotable_init().
59 VMALLOC_START is based upon the value
60 of the high_memory variable, and VMALLOC_END
61 is equal to 0xff000000.
63 62
64PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region. 63PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region.
65 This maps the platforms RAM, and typically 64 This maps the platforms RAM, and typically
diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt
index 52916b4aa1fe..9b4b82a721b6 100644
--- a/Documentation/devicetree/bindings/arm/gic.txt
+++ b/Documentation/devicetree/bindings/arm/gic.txt
@@ -42,6 +42,10 @@ Optional
42- interrupts : Interrupt source of the parent interrupt controller. Only 42- interrupts : Interrupt source of the parent interrupt controller. Only
43 present on secondary GICs. 43 present on secondary GICs.
44 44
45- cpu-offset : per-cpu offset within the distributor and cpu interface
46 regions, used when the GIC doesn't have banked registers. The offset is
47 cpu-offset * cpu-nr.
48
45Example: 49Example:
46 50
47 intc: interrupt-controller@fff11000 { 51 intc: interrupt-controller@fff11000 {
diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt
new file mode 100644
index 000000000000..266716b23437
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vic.txt
@@ -0,0 +1,29 @@
1* ARM Vectored Interrupt Controller
2
3One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
4system for interrupt routing. For multiple controllers they can either be
5nested or have the outputs wire-OR'd together.
6
7Required properties:
8
9- compatible : should be one of
10 "arm,pl190-vic"
11 "arm,pl192-vic"
12- interrupt-controller : Identifies the node as an interrupt controller
13- #interrupt-cells : The number of cells to define the interrupts. Must be 1 as
14 the VIC has no configuration options for interrupt sources. The cell is a u32
15 and defines the interrupt number.
16- reg : The register bank for the VIC.
17
18Optional properties:
19
20- interrupts : Interrupt source for parent controllers if the VIC is nested.
21
22Example:
23
24 vic0: interrupt-controller@60000 {
25 compatible = "arm,pl192-vic";
26 interrupt-controller;
27 #interrupt-cells = <1>;
28 reg = <0x60000 0x1000>;
29 };
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 74df9ca2be31..81a933eb0903 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,8 +1,14 @@
1config ARM_GIC 1config ARM_GIC
2 select IRQ_DOMAIN 2 select IRQ_DOMAIN
3 select MULTI_IRQ_HANDLER
4 bool
5
6config GIC_NON_BANKED
3 bool 7 bool
4 8
5config ARM_VIC 9config ARM_VIC
10 select IRQ_DOMAIN
11 select MULTI_IRQ_HANDLER
6 bool 12 bool
7 13
8config ARM_VIC_NR 14config ARM_VIC_NR
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 410a546060a2..b2dc2dd7f1df 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -40,13 +40,36 @@
40#include <linux/slab.h> 40#include <linux/slab.h>
41 41
42#include <asm/irq.h> 42#include <asm/irq.h>
43#include <asm/exception.h>
43#include <asm/mach/irq.h> 44#include <asm/mach/irq.h>
44#include <asm/hardware/gic.h> 45#include <asm/hardware/gic.h>
45 46
46static DEFINE_RAW_SPINLOCK(irq_controller_lock); 47union gic_base {
48 void __iomem *common_base;
49 void __percpu __iomem **percpu_base;
50};
47 51
48/* Address of GIC 0 CPU interface */ 52struct gic_chip_data {
49void __iomem *gic_cpu_base_addr __read_mostly; 53 unsigned int irq_offset;
54 union gic_base dist_base;
55 union gic_base cpu_base;
56#ifdef CONFIG_CPU_PM
57 u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
58 u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
59 u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
60 u32 __percpu *saved_ppi_enable;
61 u32 __percpu *saved_ppi_conf;
62#endif
63#ifdef CONFIG_IRQ_DOMAIN
64 struct irq_domain domain;
65#endif
66 unsigned int gic_irqs;
67#ifdef CONFIG_GIC_NON_BANKED
68 void __iomem *(*get_base)(union gic_base *);
69#endif
70};
71
72static DEFINE_RAW_SPINLOCK(irq_controller_lock);
50 73
51/* 74/*
52 * Supported arch specific GIC irq extension. 75 * Supported arch specific GIC irq extension.
@@ -67,16 +90,48 @@ struct irq_chip gic_arch_extn = {
67 90
68static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly; 91static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
69 92
93#ifdef CONFIG_GIC_NON_BANKED
94static void __iomem *gic_get_percpu_base(union gic_base *base)
95{
96 return *__this_cpu_ptr(base->percpu_base);
97}
98
99static void __iomem *gic_get_common_base(union gic_base *base)
100{
101 return base->common_base;
102}
103
104static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data)
105{
106 return data->get_base(&data->dist_base);
107}
108
109static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data)
110{
111 return data->get_base(&data->cpu_base);
112}
113
114static inline void gic_set_base_accessor(struct gic_chip_data *data,
115 void __iomem *(*f)(union gic_base *))
116{
117 data->get_base = f;
118}
119#else
120#define gic_data_dist_base(d) ((d)->dist_base.common_base)
121#define gic_data_cpu_base(d) ((d)->cpu_base.common_base)
122#define gic_set_base_accessor(d,f)
123#endif
124
70static inline void __iomem *gic_dist_base(struct irq_data *d) 125static inline void __iomem *gic_dist_base(struct irq_data *d)
71{ 126{
72 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); 127 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
73 return gic_data->dist_base; 128 return gic_data_dist_base(gic_data);
74} 129}
75 130
76static inline void __iomem *gic_cpu_base(struct irq_data *d) 131static inline void __iomem *gic_cpu_base(struct irq_data *d)
77{ 132{
78 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); 133 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
79 return gic_data->cpu_base; 134 return gic_data_cpu_base(gic_data);
80} 135}
81 136
82static inline unsigned int gic_irq(struct irq_data *d) 137static inline unsigned int gic_irq(struct irq_data *d)
@@ -215,6 +270,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
215#define gic_set_wake NULL 270#define gic_set_wake NULL
216#endif 271#endif
217 272
273asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
274{
275 u32 irqstat, irqnr;
276 struct gic_chip_data *gic = &gic_data[0];
277 void __iomem *cpu_base = gic_data_cpu_base(gic);
278
279 do {
280 irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
281 irqnr = irqstat & ~0x1c00;
282
283 if (likely(irqnr > 15 && irqnr < 1021)) {
284 irqnr = irq_domain_to_irq(&gic->domain, irqnr);
285 handle_IRQ(irqnr, regs);
286 continue;
287 }
288 if (irqnr < 16) {
289 writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
290#ifdef CONFIG_SMP
291 handle_IPI(irqnr, regs);
292#endif
293 continue;
294 }
295 break;
296 } while (1);
297}
298
218static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 299static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
219{ 300{
220 struct gic_chip_data *chip_data = irq_get_handler_data(irq); 301 struct gic_chip_data *chip_data = irq_get_handler_data(irq);
@@ -225,7 +306,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
225 chained_irq_enter(chip, desc); 306 chained_irq_enter(chip, desc);
226 307
227 raw_spin_lock(&irq_controller_lock); 308 raw_spin_lock(&irq_controller_lock);
228 status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK); 309 status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK);
229 raw_spin_unlock(&irq_controller_lock); 310 raw_spin_unlock(&irq_controller_lock);
230 311
231 gic_irq = (status & 0x3ff); 312 gic_irq = (status & 0x3ff);
@@ -270,7 +351,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
270 u32 cpumask; 351 u32 cpumask;
271 unsigned int gic_irqs = gic->gic_irqs; 352 unsigned int gic_irqs = gic->gic_irqs;
272 struct irq_domain *domain = &gic->domain; 353 struct irq_domain *domain = &gic->domain;
273 void __iomem *base = gic->dist_base; 354 void __iomem *base = gic_data_dist_base(gic);
274 u32 cpu = 0; 355 u32 cpu = 0;
275 356
276#ifdef CONFIG_SMP 357#ifdef CONFIG_SMP
@@ -330,8 +411,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
330 411
331static void __cpuinit gic_cpu_init(struct gic_chip_data *gic) 412static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
332{ 413{
333 void __iomem *dist_base = gic->dist_base; 414 void __iomem *dist_base = gic_data_dist_base(gic);
334 void __iomem *base = gic->cpu_base; 415 void __iomem *base = gic_data_cpu_base(gic);
335 int i; 416 int i;
336 417
337 /* 418 /*
@@ -368,7 +449,7 @@ static void gic_dist_save(unsigned int gic_nr)
368 BUG(); 449 BUG();
369 450
370 gic_irqs = gic_data[gic_nr].gic_irqs; 451 gic_irqs = gic_data[gic_nr].gic_irqs;
371 dist_base = gic_data[gic_nr].dist_base; 452 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
372 453
373 if (!dist_base) 454 if (!dist_base)
374 return; 455 return;
@@ -403,7 +484,7 @@ static void gic_dist_restore(unsigned int gic_nr)
403 BUG(); 484 BUG();
404 485
405 gic_irqs = gic_data[gic_nr].gic_irqs; 486 gic_irqs = gic_data[gic_nr].gic_irqs;
406 dist_base = gic_data[gic_nr].dist_base; 487 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
407 488
408 if (!dist_base) 489 if (!dist_base)
409 return; 490 return;
@@ -439,8 +520,8 @@ static void gic_cpu_save(unsigned int gic_nr)
439 if (gic_nr >= MAX_GIC_NR) 520 if (gic_nr >= MAX_GIC_NR)
440 BUG(); 521 BUG();
441 522
442 dist_base = gic_data[gic_nr].dist_base; 523 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
443 cpu_base = gic_data[gic_nr].cpu_base; 524 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
444 525
445 if (!dist_base || !cpu_base) 526 if (!dist_base || !cpu_base)
446 return; 527 return;
@@ -465,8 +546,8 @@ static void gic_cpu_restore(unsigned int gic_nr)
465 if (gic_nr >= MAX_GIC_NR) 546 if (gic_nr >= MAX_GIC_NR)
466 BUG(); 547 BUG();
467 548
468 dist_base = gic_data[gic_nr].dist_base; 549 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
469 cpu_base = gic_data[gic_nr].cpu_base; 550 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
470 551
471 if (!dist_base || !cpu_base) 552 if (!dist_base || !cpu_base)
472 return; 553 return;
@@ -491,6 +572,11 @@ static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v)
491 int i; 572 int i;
492 573
493 for (i = 0; i < MAX_GIC_NR; i++) { 574 for (i = 0; i < MAX_GIC_NR; i++) {
575#ifdef CONFIG_GIC_NON_BANKED
576 /* Skip over unused GICs */
577 if (!gic_data[i].get_base)
578 continue;
579#endif
494 switch (cmd) { 580 switch (cmd) {
495 case CPU_PM_ENTER: 581 case CPU_PM_ENTER:
496 gic_cpu_save(i); 582 gic_cpu_save(i);
@@ -564,8 +650,9 @@ const struct irq_domain_ops gic_irq_domain_ops = {
564#endif 650#endif
565}; 651};
566 652
567void __init gic_init(unsigned int gic_nr, int irq_start, 653void __init gic_init_bases(unsigned int gic_nr, int irq_start,
568 void __iomem *dist_base, void __iomem *cpu_base) 654 void __iomem *dist_base, void __iomem *cpu_base,
655 u32 percpu_offset)
569{ 656{
570 struct gic_chip_data *gic; 657 struct gic_chip_data *gic;
571 struct irq_domain *domain; 658 struct irq_domain *domain;
@@ -575,8 +662,36 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
575 662
576 gic = &gic_data[gic_nr]; 663 gic = &gic_data[gic_nr];
577 domain = &gic->domain; 664 domain = &gic->domain;
578 gic->dist_base = dist_base; 665#ifdef CONFIG_GIC_NON_BANKED
579 gic->cpu_base = cpu_base; 666 if (percpu_offset) { /* Frankein-GIC without banked registers... */
667 unsigned int cpu;
668
669 gic->dist_base.percpu_base = alloc_percpu(void __iomem *);
670 gic->cpu_base.percpu_base = alloc_percpu(void __iomem *);
671 if (WARN_ON(!gic->dist_base.percpu_base ||
672 !gic->cpu_base.percpu_base)) {
673 free_percpu(gic->dist_base.percpu_base);
674 free_percpu(gic->cpu_base.percpu_base);
675 return;
676 }
677
678 for_each_possible_cpu(cpu) {
679 unsigned long offset = percpu_offset * cpu_logical_map(cpu);
680 *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset;
681 *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset;
682 }
683
684 gic_set_base_accessor(gic, gic_get_percpu_base);
685 } else
686#endif
687 { /* Normal, sane GIC... */
688 WARN(percpu_offset,
689 "GIC_NON_BANKED not enabled, ignoring %08x offset!",
690 percpu_offset);
691 gic->dist_base.common_base = dist_base;
692 gic->cpu_base.common_base = cpu_base;
693 gic_set_base_accessor(gic, gic_get_common_base);
694 }
580 695
581 /* 696 /*
582 * For primary GICs, skip over SGIs. 697 * For primary GICs, skip over SGIs.
@@ -584,8 +699,6 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
584 */ 699 */
585 domain->hwirq_base = 32; 700 domain->hwirq_base = 32;
586 if (gic_nr == 0) { 701 if (gic_nr == 0) {
587 gic_cpu_base_addr = cpu_base;
588
589 if ((irq_start & 31) > 0) { 702 if ((irq_start & 31) > 0) {
590 domain->hwirq_base = 16; 703 domain->hwirq_base = 16;
591 if (irq_start != -1) 704 if (irq_start != -1)
@@ -597,7 +710,7 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
597 * Find out how many interrupts are supported. 710 * Find out how many interrupts are supported.
598 * The GIC only supports up to 1020 interrupt sources. 711 * The GIC only supports up to 1020 interrupt sources.
599 */ 712 */
600 gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f; 713 gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f;
601 gic_irqs = (gic_irqs + 1) * 32; 714 gic_irqs = (gic_irqs + 1) * 32;
602 if (gic_irqs > 1020) 715 if (gic_irqs > 1020)
603 gic_irqs = 1020; 716 gic_irqs = 1020;
@@ -645,7 +758,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
645 dsb(); 758 dsb();
646 759
647 /* this always happens on GIC0 */ 760 /* this always happens on GIC0 */
648 writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); 761 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
649} 762}
650#endif 763#endif
651 764
@@ -656,6 +769,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
656{ 769{
657 void __iomem *cpu_base; 770 void __iomem *cpu_base;
658 void __iomem *dist_base; 771 void __iomem *dist_base;
772 u32 percpu_offset;
659 int irq; 773 int irq;
660 struct irq_domain *domain = &gic_data[gic_cnt].domain; 774 struct irq_domain *domain = &gic_data[gic_cnt].domain;
661 775
@@ -668,9 +782,12 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
668 cpu_base = of_iomap(node, 1); 782 cpu_base = of_iomap(node, 1);
669 WARN(!cpu_base, "unable to map gic cpu registers\n"); 783 WARN(!cpu_base, "unable to map gic cpu registers\n");
670 784
785 if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
786 percpu_offset = 0;
787
671 domain->of_node = of_node_get(node); 788 domain->of_node = of_node_get(node);
672 789
673 gic_init(gic_cnt, -1, dist_base, cpu_base); 790 gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
674 791
675 if (parent) { 792 if (parent) {
676 irq = irq_of_parse_and_map(node, 0); 793 irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 01f18a421b17..6ed41ec2bbf5 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -19,17 +19,22 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22#include <linux/export.h>
22#include <linux/init.h> 23#include <linux/init.h>
23#include <linux/list.h> 24#include <linux/list.h>
24#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irqdomain.h>
27#include <linux/of.h>
28#include <linux/of_address.h>
29#include <linux/of_irq.h>
25#include <linux/syscore_ops.h> 30#include <linux/syscore_ops.h>
26#include <linux/device.h> 31#include <linux/device.h>
27#include <linux/amba/bus.h> 32#include <linux/amba/bus.h>
28 33
34#include <asm/exception.h>
29#include <asm/mach/irq.h> 35#include <asm/mach/irq.h>
30#include <asm/hardware/vic.h> 36#include <asm/hardware/vic.h>
31 37
32#ifdef CONFIG_PM
33/** 38/**
34 * struct vic_device - VIC PM device 39 * struct vic_device - VIC PM device
35 * @irq: The IRQ number for the base of the VIC. 40 * @irq: The IRQ number for the base of the VIC.
@@ -40,6 +45,7 @@
40 * @int_enable: Save for VIC_INT_ENABLE. 45 * @int_enable: Save for VIC_INT_ENABLE.
41 * @soft_int: Save for VIC_INT_SOFT. 46 * @soft_int: Save for VIC_INT_SOFT.
42 * @protect: Save for VIC_PROTECT. 47 * @protect: Save for VIC_PROTECT.
48 * @domain: The IRQ domain for the VIC.
43 */ 49 */
44struct vic_device { 50struct vic_device {
45 void __iomem *base; 51 void __iomem *base;
@@ -50,13 +56,13 @@ struct vic_device {
50 u32 int_enable; 56 u32 int_enable;
51 u32 soft_int; 57 u32 soft_int;
52 u32 protect; 58 u32 protect;
59 struct irq_domain domain;
53}; 60};
54 61
55/* we cannot allocate memory when VICs are initially registered */ 62/* we cannot allocate memory when VICs are initially registered */
56static struct vic_device vic_devices[CONFIG_ARM_VIC_NR]; 63static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
57 64
58static int vic_id; 65static int vic_id;
59#endif /* CONFIG_PM */
60 66
61/** 67/**
62 * vic_init2 - common initialisation code 68 * vic_init2 - common initialisation code
@@ -156,39 +162,50 @@ static int __init vic_pm_init(void)
156 return 0; 162 return 0;
157} 163}
158late_initcall(vic_pm_init); 164late_initcall(vic_pm_init);
165#endif /* CONFIG_PM */
159 166
160/** 167/**
161 * vic_pm_register - Register a VIC for later power management control 168 * vic_register() - Register a VIC.
162 * @base: The base address of the VIC. 169 * @base: The base address of the VIC.
163 * @irq: The base IRQ for the VIC. 170 * @irq: The base IRQ for the VIC.
164 * @resume_sources: bitmask of interrupts allowed for resume sources. 171 * @resume_sources: bitmask of interrupts allowed for resume sources.
172 * @node: The device tree node associated with the VIC.
165 * 173 *
166 * Register the VIC with the system device tree so that it can be notified 174 * Register the VIC with the system device tree so that it can be notified
167 * of suspend and resume requests and ensure that the correct actions are 175 * of suspend and resume requests and ensure that the correct actions are
168 * taken to re-instate the settings on resume. 176 * taken to re-instate the settings on resume.
177 *
178 * This also configures the IRQ domain for the VIC.
169 */ 179 */
170static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) 180static void __init vic_register(void __iomem *base, unsigned int irq,
181 u32 resume_sources, struct device_node *node)
171{ 182{
172 struct vic_device *v; 183 struct vic_device *v;
173 184
174 if (vic_id >= ARRAY_SIZE(vic_devices)) 185 if (vic_id >= ARRAY_SIZE(vic_devices)) {
175 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); 186 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
176 else { 187 return;
177 v = &vic_devices[vic_id];
178 v->base = base;
179 v->resume_sources = resume_sources;
180 v->irq = irq;
181 vic_id++;
182 } 188 }
189
190 v = &vic_devices[vic_id];
191 v->base = base;
192 v->resume_sources = resume_sources;
193 v->irq = irq;
194 vic_id++;
195
196 v->domain.irq_base = irq;
197 v->domain.nr_irq = 32;
198#ifdef CONFIG_OF_IRQ
199 v->domain.of_node = of_node_get(node);
200 v->domain.ops = &irq_domain_simple_ops;
201#endif /* CONFIG_OF */
202 irq_domain_add(&v->domain);
183} 203}
184#else
185static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
186#endif /* CONFIG_PM */
187 204
188static void vic_ack_irq(struct irq_data *d) 205static void vic_ack_irq(struct irq_data *d)
189{ 206{
190 void __iomem *base = irq_data_get_irq_chip_data(d); 207 void __iomem *base = irq_data_get_irq_chip_data(d);
191 unsigned int irq = d->irq & 31; 208 unsigned int irq = d->hwirq;
192 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); 209 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
193 /* moreover, clear the soft-triggered, in case it was the reason */ 210 /* moreover, clear the soft-triggered, in case it was the reason */
194 writel(1 << irq, base + VIC_INT_SOFT_CLEAR); 211 writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
@@ -197,14 +214,14 @@ static void vic_ack_irq(struct irq_data *d)
197static void vic_mask_irq(struct irq_data *d) 214static void vic_mask_irq(struct irq_data *d)
198{ 215{
199 void __iomem *base = irq_data_get_irq_chip_data(d); 216 void __iomem *base = irq_data_get_irq_chip_data(d);
200 unsigned int irq = d->irq & 31; 217 unsigned int irq = d->hwirq;
201 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); 218 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
202} 219}
203 220
204static void vic_unmask_irq(struct irq_data *d) 221static void vic_unmask_irq(struct irq_data *d)
205{ 222{
206 void __iomem *base = irq_data_get_irq_chip_data(d); 223 void __iomem *base = irq_data_get_irq_chip_data(d);
207 unsigned int irq = d->irq & 31; 224 unsigned int irq = d->hwirq;
208 writel(1 << irq, base + VIC_INT_ENABLE); 225 writel(1 << irq, base + VIC_INT_ENABLE);
209} 226}
210 227
@@ -226,7 +243,7 @@ static struct vic_device *vic_from_irq(unsigned int irq)
226static int vic_set_wake(struct irq_data *d, unsigned int on) 243static int vic_set_wake(struct irq_data *d, unsigned int on)
227{ 244{
228 struct vic_device *v = vic_from_irq(d->irq); 245 struct vic_device *v = vic_from_irq(d->irq);
229 unsigned int off = d->irq & 31; 246 unsigned int off = d->hwirq;
230 u32 bit = 1 << off; 247 u32 bit = 1 << off;
231 248
232 if (!v) 249 if (!v)
@@ -330,15 +347,9 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
330 vic_set_irq_sources(base, irq_start, vic_sources); 347 vic_set_irq_sources(base, irq_start, vic_sources);
331} 348}
332 349
333/** 350static void __init __vic_init(void __iomem *base, unsigned int irq_start,
334 * vic_init - initialise a vectored interrupt controller 351 u32 vic_sources, u32 resume_sources,
335 * @base: iomem base address 352 struct device_node *node)
336 * @irq_start: starting interrupt number, must be muliple of 32
337 * @vic_sources: bitmask of interrupt sources to allow
338 * @resume_sources: bitmask of interrupt sources to allow for resume
339 */
340void __init vic_init(void __iomem *base, unsigned int irq_start,
341 u32 vic_sources, u32 resume_sources)
342{ 353{
343 unsigned int i; 354 unsigned int i;
344 u32 cellid = 0; 355 u32 cellid = 0;
@@ -375,5 +386,81 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
375 386
376 vic_set_irq_sources(base, irq_start, vic_sources); 387 vic_set_irq_sources(base, irq_start, vic_sources);
377 388
378 vic_pm_register(base, irq_start, resume_sources); 389 vic_register(base, irq_start, resume_sources, node);
390}
391
392/**
393 * vic_init() - initialise a vectored interrupt controller
394 * @base: iomem base address
395 * @irq_start: starting interrupt number, must be muliple of 32
396 * @vic_sources: bitmask of interrupt sources to allow
397 * @resume_sources: bitmask of interrupt sources to allow for resume
398 */
399void __init vic_init(void __iomem *base, unsigned int irq_start,
400 u32 vic_sources, u32 resume_sources)
401{
402 __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
403}
404
405#ifdef CONFIG_OF
406int __init vic_of_init(struct device_node *node, struct device_node *parent)
407{
408 void __iomem *regs;
409 int irq_base;
410
411 if (WARN(parent, "non-root VICs are not supported"))
412 return -EINVAL;
413
414 regs = of_iomap(node, 0);
415 if (WARN_ON(!regs))
416 return -EIO;
417
418 irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
419 if (WARN_ON(irq_base < 0))
420 goto out_unmap;
421
422 __vic_init(regs, irq_base, ~0, ~0, node);
423
424 return 0;
425
426 out_unmap:
427 iounmap(regs);
428
429 return -EIO;
430}
431#endif /* CONFIG OF */
432
433/*
434 * Handle each interrupt in a single VIC. Returns non-zero if we've
435 * handled at least one interrupt. This does a single read of the
436 * status register and handles all interrupts in order from LSB first.
437 */
438static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
439{
440 u32 stat, irq;
441 int handled = 0;
442
443 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
444 while (stat) {
445 irq = ffs(stat) - 1;
446 handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
447 stat &= ~(1 << irq);
448 handled = 1;
449 }
450
451 return handled;
452}
453
454/*
455 * Keep iterating over all registered VIC's until there are no pending
456 * interrupts.
457 */
458asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
459{
460 int i, handled;
461
462 do {
463 for (i = 0, handled = 0; i < vic_id; ++i)
464 handled |= handle_one_vic(&vic_devices[i], regs);
465 } while (handled);
379} 466}
diff --git a/arch/arm/include/asm/cti.h b/arch/arm/include/asm/cti.h
new file mode 100644
index 000000000000..a0ada3ea4358
--- /dev/null
+++ b/arch/arm/include/asm/cti.h
@@ -0,0 +1,179 @@
1#ifndef __ASMARM_CTI_H
2#define __ASMARM_CTI_H
3
4#include <asm/io.h>
5
6/* The registers' definition is from section 3.2 of
7 * Embedded Cross Trigger Revision: r0p0
8 */
9#define CTICONTROL 0x000
10#define CTISTATUS 0x004
11#define CTILOCK 0x008
12#define CTIPROTECTION 0x00C
13#define CTIINTACK 0x010
14#define CTIAPPSET 0x014
15#define CTIAPPCLEAR 0x018
16#define CTIAPPPULSE 0x01c
17#define CTIINEN 0x020
18#define CTIOUTEN 0x0A0
19#define CTITRIGINSTATUS 0x130
20#define CTITRIGOUTSTATUS 0x134
21#define CTICHINSTATUS 0x138
22#define CTICHOUTSTATUS 0x13c
23#define CTIPERIPHID0 0xFE0
24#define CTIPERIPHID1 0xFE4
25#define CTIPERIPHID2 0xFE8
26#define CTIPERIPHID3 0xFEC
27#define CTIPCELLID0 0xFF0
28#define CTIPCELLID1 0xFF4
29#define CTIPCELLID2 0xFF8
30#define CTIPCELLID3 0xFFC
31
32/* The below are from section 3.6.4 of
33 * CoreSight v1.0 Architecture Specification
34 */
35#define LOCKACCESS 0xFB0
36#define LOCKSTATUS 0xFB4
37
38/* write this value to LOCKACCESS will unlock the module, and
39 * other value will lock the module
40 */
41#define LOCKCODE 0xC5ACCE55
42
43/**
44 * struct cti - cross trigger interface struct
45 * @base: mapped virtual address for the cti base
46 * @irq: irq number for the cti
47 * @trig_out_for_irq: triger out number which will cause
48 * the @irq happen
49 *
50 * cti struct used to operate cti registers.
51 */
52struct cti {
53 void __iomem *base;
54 int irq;
55 int trig_out_for_irq;
56};
57
58/**
59 * cti_init - initialize the cti instance
60 * @cti: cti instance
61 * @base: mapped virtual address for the cti base
62 * @irq: irq number for the cti
63 * @trig_out: triger out number which will cause
64 * the @irq happen
65 *
66 * called by machine code to pass the board dependent
67 * @base, @irq and @trig_out to cti.
68 */
69static inline void cti_init(struct cti *cti,
70 void __iomem *base, int irq, int trig_out)
71{
72 cti->base = base;
73 cti->irq = irq;
74 cti->trig_out_for_irq = trig_out;
75}
76
77/**
78 * cti_map_trigger - use the @chan to map @trig_in to @trig_out
79 * @cti: cti instance
80 * @trig_in: trigger in number
81 * @trig_out: trigger out number
82 * @channel: channel number
83 *
84 * This function maps one trigger in of @trig_in to one trigger
85 * out of @trig_out using the channel @chan.
86 */
87static inline void cti_map_trigger(struct cti *cti,
88 int trig_in, int trig_out, int chan)
89{
90 void __iomem *base = cti->base;
91 unsigned long val;
92
93 val = __raw_readl(base + CTIINEN + trig_in * 4);
94 val |= BIT(chan);
95 __raw_writel(val, base + CTIINEN + trig_in * 4);
96
97 val = __raw_readl(base + CTIOUTEN + trig_out * 4);
98 val |= BIT(chan);
99 __raw_writel(val, base + CTIOUTEN + trig_out * 4);
100}
101
102/**
103 * cti_enable - enable the cti module
104 * @cti: cti instance
105 *
106 * enable the cti module
107 */
108static inline void cti_enable(struct cti *cti)
109{
110 __raw_writel(0x1, cti->base + CTICONTROL);
111}
112
113/**
114 * cti_disable - disable the cti module
115 * @cti: cti instance
116 *
117 * enable the cti module
118 */
119static inline void cti_disable(struct cti *cti)
120{
121 __raw_writel(0, cti->base + CTICONTROL);
122}
123
124/**
125 * cti_irq_ack - clear the cti irq
126 * @cti: cti instance
127 *
128 * clear the cti irq
129 */
130static inline void cti_irq_ack(struct cti *cti)
131{
132 void __iomem *base = cti->base;
133 unsigned long val;
134
135 val = __raw_readl(base + CTIINTACK);
136 val |= BIT(cti->trig_out_for_irq);
137 __raw_writel(val, base + CTIINTACK);
138}
139
140/**
141 * cti_unlock - unlock cti module
142 * @cti: cti instance
143 *
144 * unlock the cti module, or else any writes to the cti
145 * module is not allowed.
146 */
147static inline void cti_unlock(struct cti *cti)
148{
149 void __iomem *base = cti->base;
150 unsigned long val;
151
152 val = __raw_readl(base + LOCKSTATUS);
153
154 if (val & 1) {
155 val = LOCKCODE;
156 __raw_writel(val, base + LOCKACCESS);
157 }
158}
159
160/**
161 * cti_lock - lock cti module
162 * @cti: cti instance
163 *
164 * lock the cti module, so any writes to the cti
165 * module will be not allowed.
166 */
167static inline void cti_lock(struct cti *cti)
168{
169 void __iomem *base = cti->base;
170 unsigned long val;
171
172 val = __raw_readl(base + LOCKSTATUS);
173
174 if (!(val & 1)) {
175 val = ~LOCKCODE;
176 __raw_writel(val, base + LOCKACCESS);
177 }
178}
179#endif
diff --git a/arch/arm/include/asm/entry-macro-vic2.S b/arch/arm/include/asm/entry-macro-vic2.S
deleted file mode 100644
index 3ceb85e43850..000000000000
--- a/arch/arm/include/asm/entry-macro-vic2.S
+++ /dev/null
@@ -1,57 +0,0 @@
1/* arch/arm/include/asm/entry-macro-vic2.S
2 *
3 * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
4 *
5 * Copyright 2008 Openmoko, Inc.
6 * Copyright 2008 Simtec Electronics
7 * http://armlinux.simtec.co.uk/
8 * Ben Dooks <ben@simtec.co.uk>
9 *
10 * Low-level IRQ helper macros for a device with two VICs
11 *
12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied.
15*/
16
17/* This should be included from <mach/entry-macro.S> with the necessary
18 * defines for virtual addresses and IRQ bases for the two vics.
19 *
20 * The code needs the following defined:
21 * IRQ_VIC0_BASE IRQ number of VIC0's first IRQ
22 * IRQ_VIC1_BASE IRQ number of VIC1's first IRQ
23 * VA_VIC0 Virtual address of VIC0
24 * VA_VIC1 Virtual address of VIC1
25 *
26 * Note, code assumes VIC0's virtual address is an ARM immediate constant
27 * away from VIC1.
28*/
29
30#include <asm/hardware/vic.h>
31
32 .macro disable_fiq
33 .endm
34
35 .macro get_irqnr_preamble, base, tmp
36 ldr \base, =VA_VIC0
37 .endm
38
39 .macro arch_ret_to_user, tmp1, tmp2
40 .endm
41
42 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
43
44 @ check the vic0
45 mov \irqnr, #IRQ_VIC0_BASE + 31
46 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
47 teq \irqstat, #0
48
49 @ otherwise try vic1
50 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
51 addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
52 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
53 teqeq \irqstat, #0
54
55 clzne \irqstat, \irqstat
56 subne \irqnr, \irqnr, \irqstat
57 .endm
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
deleted file mode 100644
index 74ebc803904d..000000000000
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/entry-macro-gic.S
3 *
4 * Low-level IRQ helper macros for GIC
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/gic.h>
12
13#ifndef HAVE_GET_IRQNR_PREAMBLE
14 .macro get_irqnr_preamble, base, tmp
15 ldr \base, =gic_cpu_base_addr
16 ldr \base, [\base]
17 .endm
18#endif
19
20/*
21 * The interrupt numbering scheme is defined in the
22 * interrupt controller spec. To wit:
23 *
24 * Interrupts 0-15 are IPI
25 * 16-31 are local. We allow 30 to be used for the watchdog.
26 * 32-1020 are global
27 * 1021-1022 are reserved
28 * 1023 is "spurious" (no interrupt)
29 *
30 * A simple read from the controller will tell us the number of the highest
31 * priority enabled interrupt. We then just need to check whether it is in the
32 * valid range for an IRQ (30-1020 inclusive).
33 */
34
35 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
36
37 ldr \irqstat, [\base, #GIC_CPU_INTACK]
38 /* bits 12-10 = src CPU, 9-0 = int # */
39
40 ldr \tmp, =1021
41 bic \irqnr, \irqstat, #0x1c00
42 cmp \irqnr, #15
43 cmpcc \irqnr, \irqnr
44 cmpne \irqnr, \tmp
45 cmpcs \irqnr, \irqnr
46 .endm
47
48/* We assume that irqstat (the raw value of the IRQ acknowledge
49 * register) is preserved from the macro above.
50 * If there is an IPI, we immediately signal end of interrupt on the
51 * controller, since this requires the original irqstat value which
52 * we won't easily be able to recreate later.
53 */
54
55 .macro test_for_ipi, irqnr, irqstat, base, tmp
56 bic \irqnr, \irqstat, #0x1c00
57 cmp \irqnr, #16
58 strcc \irqstat, [\base, #GIC_CPU_EOI]
59 cmpcs \irqnr, \irqnr
60 .endm
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 3e91f22046f5..4bdfe0018696 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,30 +36,22 @@
36#include <linux/irqdomain.h> 36#include <linux/irqdomain.h>
37struct device_node; 37struct device_node;
38 38
39extern void __iomem *gic_cpu_base_addr;
40extern struct irq_chip gic_arch_extn; 39extern struct irq_chip gic_arch_extn;
41 40
42void gic_init(unsigned int, int, void __iomem *, void __iomem *); 41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
42 u32 offset);
43int gic_of_init(struct device_node *node, struct device_node *parent); 43int gic_of_init(struct device_node *node, struct device_node *parent);
44void gic_secondary_init(unsigned int); 44void gic_secondary_init(unsigned int);
45void gic_handle_irq(struct pt_regs *regs);
45void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 46void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
46void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); 47void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
47 48
48struct gic_chip_data { 49static inline void gic_init(unsigned int nr, int start,
49 void __iomem *dist_base; 50 void __iomem *dist , void __iomem *cpu)
50 void __iomem *cpu_base; 51{
51#ifdef CONFIG_CPU_PM 52 gic_init_bases(nr, start, dist, cpu, 0);
52 u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; 53}
53 u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; 54
54 u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
55 u32 __percpu *saved_ppi_enable;
56 u32 __percpu *saved_ppi_conf;
57#endif
58#ifdef CONFIG_IRQ_DOMAIN
59 struct irq_domain domain;
60#endif
61 unsigned int gic_irqs;
62};
63#endif 55#endif
64 56
65#endif 57#endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 5d72550a8097..f42ebd619590 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -41,7 +41,15 @@
41#define VIC_PL192_VECT_ADDR 0xF00 41#define VIC_PL192_VECT_ADDR 0xF00
42 42
43#ifndef __ASSEMBLY__ 43#ifndef __ASSEMBLY__
44#include <linux/compiler.h>
45#include <linux/types.h>
46
47struct device_node;
48struct pt_regs;
49
44void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); 50void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
45#endif 51int vic_of_init(struct device_node *node, struct device_node *parent);
52void vic_handle_irq(struct pt_regs *regs);
46 53
54#endif /* __ASSEMBLY__ */
47#endif 55#endif
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 2b0efc3104ac..bcb0c883e21e 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -31,10 +31,10 @@ struct machine_desc {
31 unsigned int video_start; /* start of video RAM */ 31 unsigned int video_start; /* start of video RAM */
32 unsigned int video_end; /* end of video RAM */ 32 unsigned int video_end; /* end of video RAM */
33 33
34 unsigned int reserve_lp0 :1; /* never has lp0 */ 34 unsigned char reserve_lp0 :1; /* never has lp0 */
35 unsigned int reserve_lp1 :1; /* never has lp1 */ 35 unsigned char reserve_lp1 :1; /* never has lp1 */
36 unsigned int reserve_lp2 :1; /* never has lp2 */ 36 unsigned char reserve_lp2 :1; /* never has lp2 */
37 unsigned int soft_reboot :1; /* soft reboot */ 37 char restart_mode; /* default restart mode */
38 void (*fixup)(struct tag *, char **, 38 void (*fixup)(struct tag *, char **,
39 struct meminfo *); 39 struct meminfo *);
40 void (*reserve)(void);/* reserve mem blocks */ 40 void (*reserve)(void);/* reserve mem blocks */
@@ -46,6 +46,7 @@ struct machine_desc {
46#ifdef CONFIG_MULTI_IRQ_HANDLER 46#ifdef CONFIG_MULTI_IRQ_HANDLER
47 void (*handle_irq)(struct pt_regs *); 47 void (*handle_irq)(struct pt_regs *);
48#endif 48#endif
49 void (*restart)(char, const char *);
49}; 50};
50 51
51/* 52/*
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 0f8e3827a89b..99cfe3607989 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -32,7 +32,4 @@ enum arm_perf_pmu_ids {
32extern enum arm_perf_pmu_ids 32extern enum arm_perf_pmu_ids
33armpmu_get_pmu_id(void); 33armpmu_get_pmu_id(void);
34 34
35extern int
36armpmu_get_max_events(void);
37
38#endif /* __ARM_PERF_EVENT_H__ */ 35#endif /* __ARM_PERF_EVENT_H__ */
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 9451dce3a553..bcae9b81a6d0 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -21,7 +21,6 @@
21#else 21#else
22 22
23#include <asm/memory.h> 23#include <asm/memory.h>
24#include <mach/vmalloc.h>
25#include <asm/pgtable-hwdef.h> 24#include <asm/pgtable-hwdef.h>
26 25
27#include <asm/pgtable-2level.h> 26#include <asm/pgtable-2level.h>
@@ -33,14 +32,16 @@
33 * any out-of-bounds memory accesses will hopefully be caught. 32 * any out-of-bounds memory accesses will hopefully be caught.
34 * The vmalloc() routines leaves a hole of 4kB between each vmalloced 33 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
35 * area for the same reason. ;) 34 * area for the same reason. ;)
36 *
37 * Note that platforms may override VMALLOC_START, but they must provide
38 * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space,
39 * which may not overlap IO space.
40 */ 35 */
41#ifndef VMALLOC_START
42#define VMALLOC_OFFSET (8*1024*1024) 36#define VMALLOC_OFFSET (8*1024*1024)
43#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) 37#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
38#define VMALLOC_END 0xff000000UL
39
40/* This is a temporary hack until shmobile's DMA area size is sorted out */
41#ifdef CONFIG_ARCH_SHMOBILE
42#warning "SH-Mobile's consistent DMA size conflicts with VMALLOC_END by 144MB"
43#undef VMALLOC_END
44#define VMALLOC_END 0xF6000000UL
44#endif 45#endif
45 46
46#define LIBRARY_TEXT_START 0x0c000000 47#define LIBRARY_TEXT_START 0x0c000000
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 0bda22c094a6..b5a5be2536c1 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -27,13 +27,22 @@ enum arm_pmu_type {
27/* 27/*
28 * struct arm_pmu_platdata - ARM PMU platform data 28 * struct arm_pmu_platdata - ARM PMU platform data
29 * 29 *
30 * @handle_irq: an optional handler which will be called from the interrupt and 30 * @handle_irq: an optional handler which will be called from the
31 * passed the address of the low level handler, and can be used to implement 31 * interrupt and passed the address of the low level handler,
32 * any platform specific handling before or after calling it. 32 * and can be used to implement any platform specific handling
33 * before or after calling it.
34 * @enable_irq: an optional handler which will be called after
35 * request_irq and be used to handle some platform specific
36 * irq enablement
37 * @disable_irq: an optional handler which will be called before
38 * free_irq and be used to handle some platform specific
39 * irq disablement
33 */ 40 */
34struct arm_pmu_platdata { 41struct arm_pmu_platdata {
35 irqreturn_t (*handle_irq)(int irq, void *dev, 42 irqreturn_t (*handle_irq)(int irq, void *dev,
36 irq_handler_t pmu_handler); 43 irq_handler_t pmu_handler);
44 void (*enable_irq)(int irq);
45 void (*disable_irq)(int irq);
37}; 46};
38 47
39#ifdef CONFIG_CPU_HAS_PMU 48#ifdef CONFIG_CPU_HAS_PMU
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 984014b92647..fe7de7571bac 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -101,6 +101,7 @@ extern int __pure cpu_architecture(void);
101extern void cpu_init(void); 101extern void cpu_init(void);
102 102
103void arm_machine_restart(char mode, const char *cmd); 103void arm_machine_restart(char mode, const char *cmd);
104void soft_restart(unsigned long);
104extern void (*arm_pm_restart)(char str, const char *cmd); 105extern void (*arm_pm_restart)(char str, const char *cmd);
105 106
106#define UDBG_UNDEFINED (1 << 0) 107#define UDBG_UNDEFINED (1 << 0)
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index b145f16c91bc..3a456c6c7005 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -36,12 +36,11 @@
36#ifdef CONFIG_MULTI_IRQ_HANDLER 36#ifdef CONFIG_MULTI_IRQ_HANDLER
37 ldr r1, =handle_arch_irq 37 ldr r1, =handle_arch_irq
38 mov r0, sp 38 mov r0, sp
39 ldr r1, [r1]
40 adr lr, BSYM(9997f) 39 adr lr, BSYM(9997f)
41 teq r1, #0 40 ldr pc, [r1]
42 movne pc, r1 41#else
43#endif
44 arch_irq_handler_default 42 arch_irq_handler_default
43#endif
459997: 449997:
46 .endm 45 .endm
47 46
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index e59bbd496c39..29620b632ed9 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -16,7 +16,7 @@
16extern const unsigned char relocate_new_kernel[]; 16extern const unsigned char relocate_new_kernel[];
17extern const unsigned int relocate_new_kernel_size; 17extern const unsigned int relocate_new_kernel_size;
18 18
19extern void setup_mm_for_reboot(char mode); 19extern void setup_mm_for_reboot(void);
20 20
21extern unsigned long kexec_start_address; 21extern unsigned long kexec_start_address;
22extern unsigned long kexec_indirection_page; 22extern unsigned long kexec_indirection_page;
@@ -113,7 +113,7 @@ void machine_kexec(struct kimage *image)
113 kexec_reinit(); 113 kexec_reinit();
114 local_irq_disable(); 114 local_irq_disable();
115 local_fiq_disable(); 115 local_fiq_disable();
116 setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/ 116 setup_mm_for_reboot();
117 flush_cache_all(); 117 flush_cache_all();
118 outer_flush_all(); 118 outer_flush_all();
119 outer_disable(); 119 outer_disable();
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 8e9c98edc068..a4f192cc51b2 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -59,8 +59,7 @@ armpmu_get_pmu_id(void)
59} 59}
60EXPORT_SYMBOL_GPL(armpmu_get_pmu_id); 60EXPORT_SYMBOL_GPL(armpmu_get_pmu_id);
61 61
62int 62int perf_num_counters(void)
63armpmu_get_max_events(void)
64{ 63{
65 int max_events = 0; 64 int max_events = 0;
66 65
@@ -69,12 +68,6 @@ armpmu_get_max_events(void)
69 68
70 return max_events; 69 return max_events;
71} 70}
72EXPORT_SYMBOL_GPL(armpmu_get_max_events);
73
74int perf_num_counters(void)
75{
76 return armpmu_get_max_events();
77}
78EXPORT_SYMBOL_GPL(perf_num_counters); 71EXPORT_SYMBOL_GPL(perf_num_counters);
79 72
80#define HW_OP_UNSUPPORTED 0xFFFF 73#define HW_OP_UNSUPPORTED 0xFFFF
@@ -380,6 +373,8 @@ armpmu_release_hardware(struct arm_pmu *armpmu)
380{ 373{
381 int i, irq, irqs; 374 int i, irq, irqs;
382 struct platform_device *pmu_device = armpmu->plat_device; 375 struct platform_device *pmu_device = armpmu->plat_device;
376 struct arm_pmu_platdata *plat =
377 dev_get_platdata(&pmu_device->dev);
383 378
384 irqs = min(pmu_device->num_resources, num_possible_cpus()); 379 irqs = min(pmu_device->num_resources, num_possible_cpus());
385 380
@@ -387,8 +382,11 @@ armpmu_release_hardware(struct arm_pmu *armpmu)
387 if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs)) 382 if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
388 continue; 383 continue;
389 irq = platform_get_irq(pmu_device, i); 384 irq = platform_get_irq(pmu_device, i);
390 if (irq >= 0) 385 if (irq >= 0) {
386 if (plat && plat->disable_irq)
387 plat->disable_irq(irq);
391 free_irq(irq, armpmu); 388 free_irq(irq, armpmu);
389 }
392 } 390 }
393 391
394 release_pmu(armpmu->type); 392 release_pmu(armpmu->type);
@@ -448,7 +446,8 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
448 irq); 446 irq);
449 armpmu_release_hardware(armpmu); 447 armpmu_release_hardware(armpmu);
450 return err; 448 return err;
451 } 449 } else if (plat && plat->enable_irq)
450 plat->enable_irq(irq);
452 451
453 cpumask_set_cpu(i, &armpmu->active_irqs); 452 cpumask_set_cpu(i, &armpmu->active_irqs);
454 } 453 }
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index e63d8115c01b..533be9930ec2 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -65,13 +65,15 @@ enum armv6_counters {
65 * accesses/misses in hardware. 65 * accesses/misses in hardware.
66 */ 66 */
67static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = { 67static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = {
68 [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES, 68 [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES,
69 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC, 69 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC,
70 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 70 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED,
71 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 71 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED,
72 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC, 72 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC,
73 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT, 73 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT,
74 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, 74 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
75 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6_PERFCTR_IBUF_STALL,
76 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV6_PERFCTR_LSU_FULL_STALL,
75}; 77};
76 78
77static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 79static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -218,13 +220,15 @@ enum armv6mpcore_perf_types {
218 * accesses/misses in hardware. 220 * accesses/misses in hardware.
219 */ 221 */
220static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = { 222static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = {
221 [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES, 223 [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES,
222 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC, 224 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC,
223 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 225 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED,
224 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 226 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED,
225 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC, 227 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC,
226 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT, 228 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT,
227 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, 229 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
230 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6MPCORE_PERFCTR_IBUF_STALL,
231 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV6MPCORE_PERFCTR_LSU_FULL_STALL,
228}; 232};
229 233
230static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 234static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 1ef6d0034b85..460bbbb6b885 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -28,165 +28,87 @@ static struct arm_pmu armv7pmu;
28 * they are not available. 28 * they are not available.
29 */ 29 */
30enum armv7_perf_types { 30enum armv7_perf_types {
31 ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, 31 ARMV7_PERFCTR_PMNC_SW_INCR = 0x00,
32 ARMV7_PERFCTR_IFETCH_MISS = 0x01, 32 ARMV7_PERFCTR_L1_ICACHE_REFILL = 0x01,
33 ARMV7_PERFCTR_ITLB_MISS = 0x02, 33 ARMV7_PERFCTR_ITLB_REFILL = 0x02,
34 ARMV7_PERFCTR_DCACHE_REFILL = 0x03, /* L1 */ 34 ARMV7_PERFCTR_L1_DCACHE_REFILL = 0x03,
35 ARMV7_PERFCTR_DCACHE_ACCESS = 0x04, /* L1 */ 35 ARMV7_PERFCTR_L1_DCACHE_ACCESS = 0x04,
36 ARMV7_PERFCTR_DTLB_REFILL = 0x05, 36 ARMV7_PERFCTR_DTLB_REFILL = 0x05,
37 ARMV7_PERFCTR_DREAD = 0x06, 37 ARMV7_PERFCTR_MEM_READ = 0x06,
38 ARMV7_PERFCTR_DWRITE = 0x07, 38 ARMV7_PERFCTR_MEM_WRITE = 0x07,
39 ARMV7_PERFCTR_INSTR_EXECUTED = 0x08, 39 ARMV7_PERFCTR_INSTR_EXECUTED = 0x08,
40 ARMV7_PERFCTR_EXC_TAKEN = 0x09, 40 ARMV7_PERFCTR_EXC_TAKEN = 0x09,
41 ARMV7_PERFCTR_EXC_EXECUTED = 0x0A, 41 ARMV7_PERFCTR_EXC_EXECUTED = 0x0A,
42 ARMV7_PERFCTR_CID_WRITE = 0x0B, 42 ARMV7_PERFCTR_CID_WRITE = 0x0B,
43 /* ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS. 43
44 /*
45 * ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS.
44 * It counts: 46 * It counts:
45 * - all branch instructions, 47 * - all (taken) branch instructions,
46 * - instructions that explicitly write the PC, 48 * - instructions that explicitly write the PC,
47 * - exception generating instructions. 49 * - exception generating instructions.
48 */ 50 */
49 ARMV7_PERFCTR_PC_WRITE = 0x0C, 51 ARMV7_PERFCTR_PC_WRITE = 0x0C,
50 ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D, 52 ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D,
51 ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E, 53 ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E,
52 ARMV7_PERFCTR_UNALIGNED_ACCESS = 0x0F, 54 ARMV7_PERFCTR_MEM_UNALIGNED_ACCESS = 0x0F,
55 ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10,
56 ARMV7_PERFCTR_CLOCK_CYCLES = 0x11,
57 ARMV7_PERFCTR_PC_BRANCH_PRED = 0x12,
53 58
54 /* These events are defined by the PMUv2 supplement (ARM DDI 0457A). */ 59 /* These events are defined by the PMUv2 supplement (ARM DDI 0457A). */
55 ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10, 60 ARMV7_PERFCTR_MEM_ACCESS = 0x13,
56 ARMV7_PERFCTR_CLOCK_CYCLES = 0x11, 61 ARMV7_PERFCTR_L1_ICACHE_ACCESS = 0x14,
57 ARMV7_PERFCTR_PC_BRANCH_PRED = 0x12, 62 ARMV7_PERFCTR_L1_DCACHE_WB = 0x15,
58 ARMV7_PERFCTR_MEM_ACCESS = 0x13, 63 ARMV7_PERFCTR_L2_CACHE_ACCESS = 0x16,
59 ARMV7_PERFCTR_L1_ICACHE_ACCESS = 0x14, 64 ARMV7_PERFCTR_L2_CACHE_REFILL = 0x17,
60 ARMV7_PERFCTR_L1_DCACHE_WB = 0x15, 65 ARMV7_PERFCTR_L2_CACHE_WB = 0x18,
61 ARMV7_PERFCTR_L2_DCACHE_ACCESS = 0x16, 66 ARMV7_PERFCTR_BUS_ACCESS = 0x19,
62 ARMV7_PERFCTR_L2_DCACHE_REFILL = 0x17, 67 ARMV7_PERFCTR_MEM_ERROR = 0x1A,
63 ARMV7_PERFCTR_L2_DCACHE_WB = 0x18, 68 ARMV7_PERFCTR_INSTR_SPEC = 0x1B,
64 ARMV7_PERFCTR_BUS_ACCESS = 0x19, 69 ARMV7_PERFCTR_TTBR_WRITE = 0x1C,
65 ARMV7_PERFCTR_MEMORY_ERROR = 0x1A, 70 ARMV7_PERFCTR_BUS_CYCLES = 0x1D,
66 ARMV7_PERFCTR_INSTR_SPEC = 0x1B, 71
67 ARMV7_PERFCTR_TTBR_WRITE = 0x1C, 72 ARMV7_PERFCTR_CPU_CYCLES = 0xFF
68 ARMV7_PERFCTR_BUS_CYCLES = 0x1D,
69
70 ARMV7_PERFCTR_CPU_CYCLES = 0xFF
71}; 73};
72 74
73/* ARMv7 Cortex-A8 specific event types */ 75/* ARMv7 Cortex-A8 specific event types */
74enum armv7_a8_perf_types { 76enum armv7_a8_perf_types {
75 ARMV7_PERFCTR_WRITE_BUFFER_FULL = 0x40, 77 ARMV7_A8_PERFCTR_L2_CACHE_ACCESS = 0x43,
76 ARMV7_PERFCTR_L2_STORE_MERGED = 0x41, 78 ARMV7_A8_PERFCTR_L2_CACHE_REFILL = 0x44,
77 ARMV7_PERFCTR_L2_STORE_BUFF = 0x42, 79 ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS = 0x50,
78 ARMV7_PERFCTR_L2_ACCESS = 0x43, 80 ARMV7_A8_PERFCTR_STALL_ISIDE = 0x56,
79 ARMV7_PERFCTR_L2_CACH_MISS = 0x44,
80 ARMV7_PERFCTR_AXI_READ_CYCLES = 0x45,
81 ARMV7_PERFCTR_AXI_WRITE_CYCLES = 0x46,
82 ARMV7_PERFCTR_MEMORY_REPLAY = 0x47,
83 ARMV7_PERFCTR_UNALIGNED_ACCESS_REPLAY = 0x48,
84 ARMV7_PERFCTR_L1_DATA_MISS = 0x49,
85 ARMV7_PERFCTR_L1_INST_MISS = 0x4A,
86 ARMV7_PERFCTR_L1_DATA_COLORING = 0x4B,
87 ARMV7_PERFCTR_L1_NEON_DATA = 0x4C,
88 ARMV7_PERFCTR_L1_NEON_CACH_DATA = 0x4D,
89 ARMV7_PERFCTR_L2_NEON = 0x4E,
90 ARMV7_PERFCTR_L2_NEON_HIT = 0x4F,
91 ARMV7_PERFCTR_L1_INST = 0x50,
92 ARMV7_PERFCTR_PC_RETURN_MIS_PRED = 0x51,
93 ARMV7_PERFCTR_PC_BRANCH_FAILED = 0x52,
94 ARMV7_PERFCTR_PC_BRANCH_TAKEN = 0x53,
95 ARMV7_PERFCTR_PC_BRANCH_EXECUTED = 0x54,
96 ARMV7_PERFCTR_OP_EXECUTED = 0x55,
97 ARMV7_PERFCTR_CYCLES_INST_STALL = 0x56,
98 ARMV7_PERFCTR_CYCLES_INST = 0x57,
99 ARMV7_PERFCTR_CYCLES_NEON_DATA_STALL = 0x58,
100 ARMV7_PERFCTR_CYCLES_NEON_INST_STALL = 0x59,
101 ARMV7_PERFCTR_NEON_CYCLES = 0x5A,
102
103 ARMV7_PERFCTR_PMU0_EVENTS = 0x70,
104 ARMV7_PERFCTR_PMU1_EVENTS = 0x71,
105 ARMV7_PERFCTR_PMU_EVENTS = 0x72,
106}; 81};
107 82
108/* ARMv7 Cortex-A9 specific event types */ 83/* ARMv7 Cortex-A9 specific event types */
109enum armv7_a9_perf_types { 84enum armv7_a9_perf_types {
110 ARMV7_PERFCTR_JAVA_HW_BYTECODE_EXEC = 0x40, 85 ARMV7_A9_PERFCTR_INSTR_CORE_RENAME = 0x68,
111 ARMV7_PERFCTR_JAVA_SW_BYTECODE_EXEC = 0x41, 86 ARMV7_A9_PERFCTR_STALL_ICACHE = 0x60,
112 ARMV7_PERFCTR_JAZELLE_BRANCH_EXEC = 0x42, 87 ARMV7_A9_PERFCTR_STALL_DISPATCH = 0x66,
113
114 ARMV7_PERFCTR_COHERENT_LINE_MISS = 0x50,
115 ARMV7_PERFCTR_COHERENT_LINE_HIT = 0x51,
116
117 ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES = 0x60,
118 ARMV7_PERFCTR_DCACHE_DEP_STALL_CYCLES = 0x61,
119 ARMV7_PERFCTR_TLB_MISS_DEP_STALL_CYCLES = 0x62,
120 ARMV7_PERFCTR_STREX_EXECUTED_PASSED = 0x63,
121 ARMV7_PERFCTR_STREX_EXECUTED_FAILED = 0x64,
122 ARMV7_PERFCTR_DATA_EVICTION = 0x65,
123 ARMV7_PERFCTR_ISSUE_STAGE_NO_INST = 0x66,
124 ARMV7_PERFCTR_ISSUE_STAGE_EMPTY = 0x67,
125 ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE = 0x68,
126
127 ARMV7_PERFCTR_PREDICTABLE_FUNCT_RETURNS = 0x6E,
128
129 ARMV7_PERFCTR_MAIN_UNIT_EXECUTED_INST = 0x70,
130 ARMV7_PERFCTR_SECOND_UNIT_EXECUTED_INST = 0x71,
131 ARMV7_PERFCTR_LD_ST_UNIT_EXECUTED_INST = 0x72,
132 ARMV7_PERFCTR_FP_EXECUTED_INST = 0x73,
133 ARMV7_PERFCTR_NEON_EXECUTED_INST = 0x74,
134
135 ARMV7_PERFCTR_PLD_FULL_DEP_STALL_CYCLES = 0x80,
136 ARMV7_PERFCTR_DATA_WR_DEP_STALL_CYCLES = 0x81,
137 ARMV7_PERFCTR_ITLB_MISS_DEP_STALL_CYCLES = 0x82,
138 ARMV7_PERFCTR_DTLB_MISS_DEP_STALL_CYCLES = 0x83,
139 ARMV7_PERFCTR_MICRO_ITLB_MISS_DEP_STALL_CYCLES = 0x84,
140 ARMV7_PERFCTR_MICRO_DTLB_MISS_DEP_STALL_CYCLES = 0x85,
141 ARMV7_PERFCTR_DMB_DEP_STALL_CYCLES = 0x86,
142
143 ARMV7_PERFCTR_INTGR_CLK_ENABLED_CYCLES = 0x8A,
144 ARMV7_PERFCTR_DATA_ENGINE_CLK_EN_CYCLES = 0x8B,
145
146 ARMV7_PERFCTR_ISB_INST = 0x90,
147 ARMV7_PERFCTR_DSB_INST = 0x91,
148 ARMV7_PERFCTR_DMB_INST = 0x92,
149 ARMV7_PERFCTR_EXT_INTERRUPTS = 0x93,
150
151 ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_COMPLETED = 0xA0,
152 ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_SKIPPED = 0xA1,
153 ARMV7_PERFCTR_PLE_FIFO_FLUSH = 0xA2,
154 ARMV7_PERFCTR_PLE_RQST_COMPLETED = 0xA3,
155 ARMV7_PERFCTR_PLE_FIFO_OVERFLOW = 0xA4,
156 ARMV7_PERFCTR_PLE_RQST_PROG = 0xA5
157}; 88};
158 89
159/* ARMv7 Cortex-A5 specific event types */ 90/* ARMv7 Cortex-A5 specific event types */
160enum armv7_a5_perf_types { 91enum armv7_a5_perf_types {
161 ARMV7_PERFCTR_IRQ_TAKEN = 0x86, 92 ARMV7_A5_PERFCTR_PREFETCH_LINEFILL = 0xc2,
162 ARMV7_PERFCTR_FIQ_TAKEN = 0x87, 93 ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP = 0xc3,
163
164 ARMV7_PERFCTR_EXT_MEM_RQST = 0xc0,
165 ARMV7_PERFCTR_NC_EXT_MEM_RQST = 0xc1,
166 ARMV7_PERFCTR_PREFETCH_LINEFILL = 0xc2,
167 ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP = 0xc3,
168 ARMV7_PERFCTR_ENTER_READ_ALLOC = 0xc4,
169 ARMV7_PERFCTR_READ_ALLOC = 0xc5,
170
171 ARMV7_PERFCTR_STALL_SB_FULL = 0xc9,
172}; 94};
173 95
174/* ARMv7 Cortex-A15 specific event types */ 96/* ARMv7 Cortex-A15 specific event types */
175enum armv7_a15_perf_types { 97enum armv7_a15_perf_types {
176 ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS = 0x40, 98 ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ = 0x40,
177 ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS = 0x41, 99 ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE = 0x41,
178 ARMV7_PERFCTR_L1_DCACHE_READ_REFILL = 0x42, 100 ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ = 0x42,
179 ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL = 0x43, 101 ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE = 0x43,
180 102
181 ARMV7_PERFCTR_L1_DTLB_READ_REFILL = 0x4C, 103 ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ = 0x4C,
182 ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL = 0x4D, 104 ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE = 0x4D,
183 105
184 ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS = 0x50, 106 ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ = 0x50,
185 ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS = 0x51, 107 ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE = 0x51,
186 ARMV7_PERFCTR_L2_DCACHE_READ_REFILL = 0x52, 108 ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ = 0x52,
187 ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL = 0x53, 109 ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE = 0x53,
188 110
189 ARMV7_PERFCTR_SPEC_PC_WRITE = 0x76, 111 ARMV7_A15_PERFCTR_PC_WRITE_SPEC = 0x76,
190}; 112};
191 113
192/* 114/*
@@ -197,13 +119,15 @@ enum armv7_a15_perf_types {
197 * accesses/misses in hardware. 119 * accesses/misses in hardware.
198 */ 120 */
199static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = { 121static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = {
200 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 122 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
201 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, 123 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED,
202 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 124 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
203 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 125 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
204 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, 126 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
205 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 127 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
206 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, 128 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
129 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A8_PERFCTR_STALL_ISIDE,
130 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
207}; 131};
208 132
209static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 133static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -217,12 +141,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
217 * combined. 141 * combined.
218 */ 142 */
219 [C(OP_READ)] = { 143 [C(OP_READ)] = {
220 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, 144 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
221 [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, 145 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
222 }, 146 },
223 [C(OP_WRITE)] = { 147 [C(OP_WRITE)] = {
224 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, 148 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
225 [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, 149 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
226 }, 150 },
227 [C(OP_PREFETCH)] = { 151 [C(OP_PREFETCH)] = {
228 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 152 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -231,12 +155,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
231 }, 155 },
232 [C(L1I)] = { 156 [C(L1I)] = {
233 [C(OP_READ)] = { 157 [C(OP_READ)] = {
234 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, 158 [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
235 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, 159 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
236 }, 160 },
237 [C(OP_WRITE)] = { 161 [C(OP_WRITE)] = {
238 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, 162 [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
239 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, 163 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
240 }, 164 },
241 [C(OP_PREFETCH)] = { 165 [C(OP_PREFETCH)] = {
242 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 166 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -245,12 +169,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
245 }, 169 },
246 [C(LL)] = { 170 [C(LL)] = {
247 [C(OP_READ)] = { 171 [C(OP_READ)] = {
248 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, 172 [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
249 [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, 173 [C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
250 }, 174 },
251 [C(OP_WRITE)] = { 175 [C(OP_WRITE)] = {
252 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, 176 [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
253 [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, 177 [C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
254 }, 178 },
255 [C(OP_PREFETCH)] = { 179 [C(OP_PREFETCH)] = {
256 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 180 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -274,11 +198,11 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
274 [C(ITLB)] = { 198 [C(ITLB)] = {
275 [C(OP_READ)] = { 199 [C(OP_READ)] = {
276 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 200 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
277 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 201 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
278 }, 202 },
279 [C(OP_WRITE)] = { 203 [C(OP_WRITE)] = {
280 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 204 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
281 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 205 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
282 }, 206 },
283 [C(OP_PREFETCH)] = { 207 [C(OP_PREFETCH)] = {
284 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 208 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -287,14 +211,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
287 }, 211 },
288 [C(BPU)] = { 212 [C(BPU)] = {
289 [C(OP_READ)] = { 213 [C(OP_READ)] = {
290 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, 214 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
291 [C(RESULT_MISS)] 215 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
292 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
293 }, 216 },
294 [C(OP_WRITE)] = { 217 [C(OP_WRITE)] = {
295 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, 218 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
296 [C(RESULT_MISS)] 219 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
297 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
298 }, 220 },
299 [C(OP_PREFETCH)] = { 221 [C(OP_PREFETCH)] = {
300 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 222 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -321,14 +243,15 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
321 * Cortex-A9 HW events mapping 243 * Cortex-A9 HW events mapping
322 */ 244 */
323static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = { 245static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = {
324 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 246 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
325 [PERF_COUNT_HW_INSTRUCTIONS] = 247 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_A9_PERFCTR_INSTR_CORE_RENAME,
326 ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE, 248 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
327 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_DCACHE_ACCESS, 249 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
328 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_DCACHE_REFILL, 250 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
329 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, 251 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
330 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 252 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
331 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, 253 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A9_PERFCTR_STALL_ICACHE,
254 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV7_A9_PERFCTR_STALL_DISPATCH,
332}; 255};
333 256
334static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 257static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -342,12 +265,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
342 * combined. 265 * combined.
343 */ 266 */
344 [C(OP_READ)] = { 267 [C(OP_READ)] = {
345 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, 268 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
346 [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, 269 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
347 }, 270 },
348 [C(OP_WRITE)] = { 271 [C(OP_WRITE)] = {
349 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, 272 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
350 [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, 273 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
351 }, 274 },
352 [C(OP_PREFETCH)] = { 275 [C(OP_PREFETCH)] = {
353 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 276 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -357,11 +280,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
357 [C(L1I)] = { 280 [C(L1I)] = {
358 [C(OP_READ)] = { 281 [C(OP_READ)] = {
359 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 282 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
360 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 283 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
361 }, 284 },
362 [C(OP_WRITE)] = { 285 [C(OP_WRITE)] = {
363 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 286 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
364 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 287 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
365 }, 288 },
366 [C(OP_PREFETCH)] = { 289 [C(OP_PREFETCH)] = {
367 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 290 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -399,11 +322,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
399 [C(ITLB)] = { 322 [C(ITLB)] = {
400 [C(OP_READ)] = { 323 [C(OP_READ)] = {
401 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 324 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
402 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 325 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
403 }, 326 },
404 [C(OP_WRITE)] = { 327 [C(OP_WRITE)] = {
405 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 328 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
406 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 329 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
407 }, 330 },
408 [C(OP_PREFETCH)] = { 331 [C(OP_PREFETCH)] = {
409 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 332 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -412,14 +335,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
412 }, 335 },
413 [C(BPU)] = { 336 [C(BPU)] = {
414 [C(OP_READ)] = { 337 [C(OP_READ)] = {
415 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, 338 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
416 [C(RESULT_MISS)] 339 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
417 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
418 }, 340 },
419 [C(OP_WRITE)] = { 341 [C(OP_WRITE)] = {
420 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, 342 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
421 [C(RESULT_MISS)] 343 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
422 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
423 }, 344 },
424 [C(OP_PREFETCH)] = { 345 [C(OP_PREFETCH)] = {
425 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 346 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -446,13 +367,15 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
446 * Cortex-A5 HW events mapping 367 * Cortex-A5 HW events mapping
447 */ 368 */
448static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = { 369static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = {
449 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 370 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
450 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, 371 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED,
451 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 372 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
452 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 373 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
453 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, 374 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
454 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 375 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
455 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, 376 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
377 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
378 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
456}; 379};
457 380
458static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 381static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -460,42 +383,34 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
460 [PERF_COUNT_HW_CACHE_RESULT_MAX] = { 383 [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
461 [C(L1D)] = { 384 [C(L1D)] = {
462 [C(OP_READ)] = { 385 [C(OP_READ)] = {
463 [C(RESULT_ACCESS)] 386 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
464 = ARMV7_PERFCTR_DCACHE_ACCESS, 387 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
465 [C(RESULT_MISS)]
466 = ARMV7_PERFCTR_DCACHE_REFILL,
467 }, 388 },
468 [C(OP_WRITE)] = { 389 [C(OP_WRITE)] = {
469 [C(RESULT_ACCESS)] 390 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
470 = ARMV7_PERFCTR_DCACHE_ACCESS, 391 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
471 [C(RESULT_MISS)]
472 = ARMV7_PERFCTR_DCACHE_REFILL,
473 }, 392 },
474 [C(OP_PREFETCH)] = { 393 [C(OP_PREFETCH)] = {
475 [C(RESULT_ACCESS)] 394 [C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
476 = ARMV7_PERFCTR_PREFETCH_LINEFILL, 395 [C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
477 [C(RESULT_MISS)]
478 = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP,
479 }, 396 },
480 }, 397 },
481 [C(L1I)] = { 398 [C(L1I)] = {
482 [C(OP_READ)] = { 399 [C(OP_READ)] = {
483 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 400 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
484 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 401 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
485 }, 402 },
486 [C(OP_WRITE)] = { 403 [C(OP_WRITE)] = {
487 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 404 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
488 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 405 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
489 }, 406 },
490 /* 407 /*
491 * The prefetch counters don't differentiate between the I 408 * The prefetch counters don't differentiate between the I
492 * side and the D side. 409 * side and the D side.
493 */ 410 */
494 [C(OP_PREFETCH)] = { 411 [C(OP_PREFETCH)] = {
495 [C(RESULT_ACCESS)] 412 [C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
496 = ARMV7_PERFCTR_PREFETCH_LINEFILL, 413 [C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
497 [C(RESULT_MISS)]
498 = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP,
499 }, 414 },
500 }, 415 },
501 [C(LL)] = { 416 [C(LL)] = {
@@ -529,11 +444,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
529 [C(ITLB)] = { 444 [C(ITLB)] = {
530 [C(OP_READ)] = { 445 [C(OP_READ)] = {
531 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 446 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
532 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 447 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
533 }, 448 },
534 [C(OP_WRITE)] = { 449 [C(OP_WRITE)] = {
535 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 450 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
536 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 451 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
537 }, 452 },
538 [C(OP_PREFETCH)] = { 453 [C(OP_PREFETCH)] = {
539 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 454 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -543,13 +458,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
543 [C(BPU)] = { 458 [C(BPU)] = {
544 [C(OP_READ)] = { 459 [C(OP_READ)] = {
545 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, 460 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
546 [C(RESULT_MISS)] 461 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
547 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
548 }, 462 },
549 [C(OP_WRITE)] = { 463 [C(OP_WRITE)] = {
550 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, 464 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
551 [C(RESULT_MISS)] 465 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
552 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
553 }, 466 },
554 [C(OP_PREFETCH)] = { 467 [C(OP_PREFETCH)] = {
555 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 468 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -562,13 +475,15 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
562 * Cortex-A15 HW events mapping 475 * Cortex-A15 HW events mapping
563 */ 476 */
564static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = { 477static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = {
565 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 478 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
566 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, 479 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED,
567 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 480 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
568 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 481 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
569 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_SPEC_PC_WRITE, 482 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_A15_PERFCTR_PC_WRITE_SPEC,
570 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 483 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
571 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_BUS_CYCLES, 484 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_BUS_CYCLES,
485 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
486 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
572}; 487};
573 488
574static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 489static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -576,16 +491,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
576 [PERF_COUNT_HW_CACHE_RESULT_MAX] = { 491 [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
577 [C(L1D)] = { 492 [C(L1D)] = {
578 [C(OP_READ)] = { 493 [C(OP_READ)] = {
579 [C(RESULT_ACCESS)] 494 [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ,
580 = ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS, 495 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ,
581 [C(RESULT_MISS)]
582 = ARMV7_PERFCTR_L1_DCACHE_READ_REFILL,
583 }, 496 },
584 [C(OP_WRITE)] = { 497 [C(OP_WRITE)] = {
585 [C(RESULT_ACCESS)] 498 [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE,
586 = ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS, 499 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE,
587 [C(RESULT_MISS)]
588 = ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL,
589 }, 500 },
590 [C(OP_PREFETCH)] = { 501 [C(OP_PREFETCH)] = {
591 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 502 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -601,11 +512,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
601 */ 512 */
602 [C(OP_READ)] = { 513 [C(OP_READ)] = {
603 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 514 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
604 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 515 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
605 }, 516 },
606 [C(OP_WRITE)] = { 517 [C(OP_WRITE)] = {
607 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 518 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
608 [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, 519 [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
609 }, 520 },
610 [C(OP_PREFETCH)] = { 521 [C(OP_PREFETCH)] = {
611 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 522 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -614,16 +525,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
614 }, 525 },
615 [C(LL)] = { 526 [C(LL)] = {
616 [C(OP_READ)] = { 527 [C(OP_READ)] = {
617 [C(RESULT_ACCESS)] 528 [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ,
618 = ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS, 529 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ,
619 [C(RESULT_MISS)]
620 = ARMV7_PERFCTR_L2_DCACHE_READ_REFILL,
621 }, 530 },
622 [C(OP_WRITE)] = { 531 [C(OP_WRITE)] = {
623 [C(RESULT_ACCESS)] 532 [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE,
624 = ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS, 533 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE,
625 [C(RESULT_MISS)]
626 = ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL,
627 }, 534 },
628 [C(OP_PREFETCH)] = { 535 [C(OP_PREFETCH)] = {
629 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 536 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -633,13 +540,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
633 [C(DTLB)] = { 540 [C(DTLB)] = {
634 [C(OP_READ)] = { 541 [C(OP_READ)] = {
635 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 542 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
636 [C(RESULT_MISS)] 543 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ,
637 = ARMV7_PERFCTR_L1_DTLB_READ_REFILL,
638 }, 544 },
639 [C(OP_WRITE)] = { 545 [C(OP_WRITE)] = {
640 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 546 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
641 [C(RESULT_MISS)] 547 [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE,
642 = ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL,
643 }, 548 },
644 [C(OP_PREFETCH)] = { 549 [C(OP_PREFETCH)] = {
645 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 550 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -649,11 +554,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
649 [C(ITLB)] = { 554 [C(ITLB)] = {
650 [C(OP_READ)] = { 555 [C(OP_READ)] = {
651 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 556 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
652 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 557 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
653 }, 558 },
654 [C(OP_WRITE)] = { 559 [C(OP_WRITE)] = {
655 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 560 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
656 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, 561 [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
657 }, 562 },
658 [C(OP_PREFETCH)] = { 563 [C(OP_PREFETCH)] = {
659 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 564 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
@@ -663,13 +568,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
663 [C(BPU)] = { 568 [C(BPU)] = {
664 [C(OP_READ)] = { 569 [C(OP_READ)] = {
665 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, 570 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
666 [C(RESULT_MISS)] 571 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
667 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
668 }, 572 },
669 [C(OP_WRITE)] = { 573 [C(OP_WRITE)] = {
670 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, 574 [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
671 [C(RESULT_MISS)] 575 [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
672 = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
673 }, 576 },
674 [C(OP_PREFETCH)] = { 577 [C(OP_PREFETCH)] = {
675 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 578 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index e0cca10a8411..3b99d8269829 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -48,13 +48,15 @@ enum xscale_counters {
48}; 48};
49 49
50static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = { 50static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = {
51 [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT, 51 [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT,
52 [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION, 52 [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION,
53 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, 53 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED,
54 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, 54 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED,
55 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH, 55 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH,
56 [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS, 56 [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS,
57 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, 57 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
58 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = XSCALE_PERFCTR_ICACHE_NO_DELIVER,
59 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED,
58}; 60};
59 61
60static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] 62static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 3d0c6fb74ae4..eeb3e16c6046 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -57,7 +57,7 @@ static const char *isa_modes[] = {
57 "ARM" , "Thumb" , "Jazelle", "ThumbEE" 57 "ARM" , "Thumb" , "Jazelle", "ThumbEE"
58}; 58};
59 59
60extern void setup_mm_for_reboot(char mode); 60extern void setup_mm_for_reboot(void);
61 61
62static volatile int hlt_counter; 62static volatile int hlt_counter;
63 63
@@ -92,7 +92,7 @@ static int __init hlt_setup(char *__unused)
92__setup("nohlt", nohlt_setup); 92__setup("nohlt", nohlt_setup);
93__setup("hlt", hlt_setup); 93__setup("hlt", hlt_setup);
94 94
95void arm_machine_restart(char mode, const char *cmd) 95void soft_restart(unsigned long addr)
96{ 96{
97 /* Disable interrupts first */ 97 /* Disable interrupts first */
98 local_irq_disable(); 98 local_irq_disable();
@@ -103,7 +103,7 @@ void arm_machine_restart(char mode, const char *cmd)
103 * we may need it to insert some 1:1 mappings so that 103 * we may need it to insert some 1:1 mappings so that
104 * soft boot works. 104 * soft boot works.
105 */ 105 */
106 setup_mm_for_reboot(mode); 106 setup_mm_for_reboot();
107 107
108 /* Clean and invalidate caches */ 108 /* Clean and invalidate caches */
109 flush_cache_all(); 109 flush_cache_all();
@@ -114,18 +114,17 @@ void arm_machine_restart(char mode, const char *cmd)
114 /* Push out any further dirty data, and ensure cache is empty */ 114 /* Push out any further dirty data, and ensure cache is empty */
115 flush_cache_all(); 115 flush_cache_all();
116 116
117 /* 117 cpu_reset(addr);
118 * Now call the architecture specific reboot code. 118}
119 */
120 arch_reset(mode, cmd);
121 119
122 /* 120void arm_machine_restart(char mode, const char *cmd)
123 * Whoops - the architecture was unable to reboot. 121{
124 * Tell the user! 122 /* Disable interrupts first */
125 */ 123 local_irq_disable();
126 mdelay(1000); 124 local_fiq_disable();
127 printk("Reboot failed -- System halted\n"); 125
128 while (1); 126 /* Call the architecture specific reboot code. */
127 arch_reset(mode, cmd);
129} 128}
130 129
131/* 130/*
@@ -253,7 +252,15 @@ void machine_power_off(void)
253void machine_restart(char *cmd) 252void machine_restart(char *cmd)
254{ 253{
255 machine_shutdown(); 254 machine_shutdown();
255
256 arm_pm_restart(reboot_mode, cmd); 256 arm_pm_restart(reboot_mode, cmd);
257
258 /* Give a grace period for failure to restart of 1s */
259 mdelay(1000);
260
261 /* Whoops - the platform was unable to reboot. Tell the user! */
262 printk("Reboot failed -- System halted\n");
263 while (1);
257} 264}
258 265
259void __show_regs(struct pt_regs *regs) 266void __show_regs(struct pt_regs *regs)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 3448a3f9cc8c..5c7094e8f6e9 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -31,6 +31,7 @@
31#include <linux/memblock.h> 31#include <linux/memblock.h>
32#include <linux/bug.h> 32#include <linux/bug.h>
33#include <linux/compiler.h> 33#include <linux/compiler.h>
34#include <linux/sort.h>
34 35
35#include <asm/unified.h> 36#include <asm/unified.h>
36#include <asm/cpu.h> 37#include <asm/cpu.h>
@@ -890,6 +891,12 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
890 return mdesc; 891 return mdesc;
891} 892}
892 893
894static int __init meminfo_cmp(const void *_a, const void *_b)
895{
896 const struct membank *a = _a, *b = _b;
897 long cmp = bank_pfn_start(a) - bank_pfn_start(b);
898 return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
899}
893 900
894void __init setup_arch(char **cmdline_p) 901void __init setup_arch(char **cmdline_p)
895{ 902{
@@ -904,8 +911,8 @@ void __init setup_arch(char **cmdline_p)
904 machine_desc = mdesc; 911 machine_desc = mdesc;
905 machine_name = mdesc->name; 912 machine_name = mdesc->name;
906 913
907 if (mdesc->soft_reboot) 914 if (mdesc->restart_mode)
908 reboot_setup("s"); 915 reboot_setup(&mdesc->restart_mode);
909 916
910 init_mm.start_code = (unsigned long) _text; 917 init_mm.start_code = (unsigned long) _text;
911 init_mm.end_code = (unsigned long) _etext; 918 init_mm.end_code = (unsigned long) _etext;
@@ -918,12 +925,16 @@ void __init setup_arch(char **cmdline_p)
918 925
919 parse_early_param(); 926 parse_early_param();
920 927
928 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
921 sanity_check_meminfo(); 929 sanity_check_meminfo();
922 arm_memblock_init(&meminfo, mdesc); 930 arm_memblock_init(&meminfo, mdesc);
923 931
924 paging_init(mdesc); 932 paging_init(mdesc);
925 request_standard_resources(mdesc); 933 request_standard_resources(mdesc);
926 934
935 if (mdesc->restart)
936 arm_pm_restart = mdesc->restart;
937
927 unflatten_device_tree(); 938 unflatten_device_tree();
928 939
929#ifdef CONFIG_SMP 940#ifdef CONFIG_SMP
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 4298e7806c76..4ca09ef7ca29 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -30,14 +30,6 @@
30 30
31#ifndef __ASSEMBLY__ 31#ifndef __ASSEMBLY__
32 32
33#ifndef CONFIG_ARCH_AT91X40
34#define __arch_ioremap at91_ioremap
35#define __arch_iounmap at91_iounmap
36#endif
37
38void __iomem *at91_ioremap(unsigned long phys, size_t size, unsigned int type);
39void at91_iounmap(volatile void __iomem *addr);
40
41static inline unsigned int at91_sys_read(unsigned int reg_offset) 33static inline unsigned int at91_sys_read(unsigned int reg_offset)
42{ 34{
43 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; 35 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
deleted file mode 100644
index 8e4a1bd0ab1d..000000000000
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_VMALLOC_H
22#define __ASM_ARCH_VMALLOC_H
23
24#include <mach/hardware.h>
25
26#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
27
28#endif
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index aa64294c7db3..cf98a8f94dc5 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -73,24 +73,6 @@ static struct map_desc at91_io_desc __initdata = {
73 .type = MT_DEVICE, 73 .type = MT_DEVICE,
74}; 74};
75 75
76void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
77{
78 if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
79 return (void __iomem *)AT91_IO_P2V(p);
80
81 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
82}
83EXPORT_SYMBOL(at91_ioremap);
84
85void at91_iounmap(volatile void __iomem *addr)
86{
87 unsigned long virt = (unsigned long)addr;
88
89 if (virt >= VMALLOC_START && virt < VMALLOC_END)
90 __iounmap(addr);
91}
92EXPORT_SYMBOL(at91_iounmap);
93
94#define AT91_DBGU0 0xfffff200 76#define AT91_DBGU0 0xfffff200
95#define AT91_DBGU1 0xffffee00 77#define AT91_DBGU1 0xffffee00
96 78
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index f4d4d6d174d0..1a1a27dd5654 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -1615,7 +1615,7 @@ DMA_MemType_t dma_mem_type(void *addr)
1615{ 1615{
1616 unsigned long addrVal = (unsigned long)addr; 1616 unsigned long addrVal = (unsigned long)addr;
1617 1617
1618 if (addrVal >= VMALLOC_END) { 1618 if (addrVal >= CONSISTENT_BASE) {
1619 /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */ 1619 /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */
1620 1620
1621 /* dma_alloc_xxx pages are physically and virtually contiguous */ 1621 /* dma_alloc_xxx pages are physically and virtually contiguous */
diff --git a/arch/arm/mach-bcmring/include/mach/vmalloc.h b/arch/arm/mach-bcmring/include/mach/vmalloc.h
deleted file mode 100644
index 7397bd7817d9..000000000000
--- a/arch/arm/mach-bcmring/include/mach/vmalloc.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 *
3 * Copyright (C) 2000 Russell King.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20/*
21 * Move VMALLOC_END to 0xf0000000 so that the vm space can range from
22 * 0xe0000000 to 0xefffffff. This gives us 256 MB of vm space and handles
23 * larger physical memory designs better.
24 */
25#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index 4a197315f0cf..f2f0256232e3 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -4,7 +4,7 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := irq.o mm.o time.o 7obj-y := common.o
8obj-m := 8obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/common.c
index c2eceee645e3..ced2a4e406f4 100644
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -1,7 +1,9 @@
1/* 1/*
2 * linux/arch/arm/mach-clps711x/irq.c 2 * linux/arch/arm/mach-clps711x/core.c
3 * 3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 4 * Core support for the CLPS711x-based machines.
5 *
6 * Copyright (C) 2001,2011 Deep Blue Solutions Ltd
5 * 7 *
6 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -17,16 +19,42 @@
17 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 21 */
22#include <linux/kernel.h>
23#include <linux/mm.h>
20#include <linux/init.h> 24#include <linux/init.h>
21#include <linux/list.h> 25#include <linux/interrupt.h>
22#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/irq.h>
28#include <linux/sched.h>
29#include <linux/timex.h>
23 30
24#include <asm/mach/irq.h> 31#include <asm/sizes.h>
25#include <mach/hardware.h> 32#include <mach/hardware.h>
26#include <asm/irq.h> 33#include <asm/irq.h>
27 34#include <asm/leds.h>
35#include <asm/pgtable.h>
36#include <asm/page.h>
37#include <asm/mach/map.h>
38#include <asm/mach/time.h>
28#include <asm/hardware/clps7111.h> 39#include <asm/hardware/clps7111.h>
29 40
41/*
42 * This maps the generic CLPS711x registers
43 */
44static struct map_desc clps711x_io_desc[] __initdata = {
45 {
46 .virtual = CLPS7111_VIRT_BASE,
47 .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
48 .length = SZ_1M,
49 .type = MT_DEVICE
50 }
51};
52
53void __init clps711x_map_io(void)
54{
55 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
56}
57
30static void int1_mask(struct irq_data *d) 58static void int1_mask(struct irq_data *d)
31{ 59{
32 u32 intmr1; 60 u32 intmr1;
@@ -112,15 +140,15 @@ void __init clps711x_init_irq(void)
112 140
113 for (i = 0; i < NR_IRQS; i++) { 141 for (i = 0; i < NR_IRQS; i++) {
114 if (INT1_IRQS & (1 << i)) { 142 if (INT1_IRQS & (1 << i)) {
115 irq_set_chip_and_handler(i, &int1_chip, 143 irq_set_chip_and_handler(i, &int1_chip,
116 handle_level_irq); 144 handle_level_irq);
117 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 145 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
118 } 146 }
119 if (INT2_IRQS & (1 << i)) { 147 if (INT2_IRQS & (1 << i)) {
120 irq_set_chip_and_handler(i, &int2_chip, 148 irq_set_chip_and_handler(i, &int2_chip,
121 handle_level_irq); 149 handle_level_irq);
122 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 150 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
123 } 151 }
124 } 152 }
125 153
126 /* 154 /*
@@ -141,3 +169,54 @@ void __init clps711x_init_irq(void)
141 clps_writel(0, SYNCIO); 169 clps_writel(0, SYNCIO);
142 clps_writel(0, KBDEOI); 170 clps_writel(0, KBDEOI);
143} 171}
172
173/*
174 * gettimeoffset() returns time since last timer tick, in usecs.
175 *
176 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
177 * 'tick' is usecs per jiffy.
178 */
179static unsigned long clps711x_gettimeoffset(void)
180{
181 unsigned long hwticks;
182 hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */
183 return (hwticks * (tick_nsec / 1000)) / LATCH;
184}
185
186/*
187 * IRQ handler for the timer
188 */
189static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
190{
191 timer_tick();
192 return IRQ_HANDLED;
193}
194
195static struct irqaction clps711x_timer_irq = {
196 .name = "CLPS711x Timer Tick",
197 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
198 .handler = p720t_timer_interrupt,
199};
200
201static void __init clps711x_timer_init(void)
202{
203 struct timespec tv;
204 unsigned int syscon;
205
206 syscon = clps_readl(SYSCON1);
207 syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
208 clps_writel(syscon, SYSCON1);
209
210 clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
211
212 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
213
214 tv.tv_nsec = 0;
215 tv.tv_sec = clps_readl(RTCDR);
216 do_settimeofday(&tv);
217}
218
219struct sys_timer clps711x_timer = {
220 .init = clps711x_timer_init,
221 .offset = clps711x_gettimeoffset,
222};
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
index f916cd7a477d..6c119937d398 100644
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ b/arch/arm/mach-clps711x/include/mach/system.h
@@ -34,7 +34,7 @@ static inline void arch_idle(void)
34 34
35static inline void arch_reset(char mode, const char *cmd) 35static inline void arch_reset(char mode, const char *cmd)
36{ 36{
37 cpu_reset(0); 37 soft_restart(0);
38} 38}
39 39
40#endif 40#endif
diff --git a/arch/arm/mach-clps711x/include/mach/vmalloc.h b/arch/arm/mach-clps711x/include/mach/vmalloc.h
deleted file mode 100644
index 467b96137e47..000000000000
--- a/arch/arm/mach-clps711x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-clps711x/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c
deleted file mode 100644
index 986592176767..000000000000
--- a/arch/arm/mach-clps711x/mm.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * linux/arch/arm/mach-clps711x/mm.c
3 *
4 * Generic MM setup for the CLPS711x-based machines.
5 *
6 * Copyright (C) 2001 Deep Blue Solutions Ltd
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#include <linux/kernel.h>
23#include <linux/mm.h>
24#include <linux/init.h>
25
26#include <asm/sizes.h>
27#include <mach/hardware.h>
28#include <asm/pgtable.h>
29#include <asm/page.h>
30#include <asm/mach/map.h>
31#include <asm/hardware/clps7111.h>
32
33/*
34 * This maps the generic CLPS711x registers
35 */
36static struct map_desc clps711x_io_desc[] __initdata = {
37 {
38 .virtual = CLPS7111_VIRT_BASE,
39 .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
40 .length = SZ_1M,
41 .type = MT_DEVICE
42 }
43};
44
45void __init clps711x_map_io(void)
46{
47 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
48}
diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c
deleted file mode 100644
index d581ef0bcd24..000000000000
--- a/arch/arm/mach-clps711x/time.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * linux/arch/arm/mach-clps711x/time.c
3 *
4 * Copyright (C) 2001 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#include <linux/timex.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23#include <linux/sched.h>
24#include <linux/io.h>
25
26#include <mach/hardware.h>
27#include <asm/irq.h>
28#include <asm/leds.h>
29#include <asm/hardware/clps7111.h>
30
31#include <asm/mach/time.h>
32
33
34/*
35 * gettimeoffset() returns time since last timer tick, in usecs.
36 *
37 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
38 * 'tick' is usecs per jiffy.
39 */
40static unsigned long clps711x_gettimeoffset(void)
41{
42 unsigned long hwticks;
43 hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */
44 return (hwticks * (tick_nsec / 1000)) / LATCH;
45}
46
47/*
48 * IRQ handler for the timer
49 */
50static irqreturn_t
51p720t_timer_interrupt(int irq, void *dev_id)
52{
53 timer_tick();
54 return IRQ_HANDLED;
55}
56
57static struct irqaction clps711x_timer_irq = {
58 .name = "CLPS711x Timer Tick",
59 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
60 .handler = p720t_timer_interrupt,
61};
62
63static void __init clps711x_timer_init(void)
64{
65 struct timespec tv;
66 unsigned int syscon;
67
68 syscon = clps_readl(SYSCON1);
69 syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
70 clps_writel(syscon, SYSCON1);
71
72 clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
73
74 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
75
76 tv.tv_nsec = 0;
77 tv.tv_sec = clps_readl(RTCDR);
78 do_settimeofday(&tv);
79}
80
81struct sys_timer clps711x_timer = {
82 .init = clps711x_timer_init,
83 .offset = clps711x_gettimeoffset,
84};
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 55f7b4b08ab9..594852fe24cc 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -26,6 +26,7 @@
26#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
27#include <asm/setup.h> 27#include <asm/setup.h>
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29#include <asm/hardware/gic.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
31#include <asm/mach/time.h> 32#include <asm/mach/time.h>
@@ -201,5 +202,6 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
201 .map_io = cns3420_map_io, 202 .map_io = cns3420_map_io,
202 .init_irq = cns3xxx_init_irq, 203 .init_irq = cns3xxx_init_irq,
203 .timer = &cns3xxx_timer, 204 .timer = &cns3xxx_timer,
205 .handle_irq = gic_handle_irq,
204 .init_machine = cns3420_init, 206 .init_machine = cns3420_init,
205MACHINE_END 207MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index d87bfc397d39..01c57df5f716 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,8 +8,6 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <asm/hardware/entry-macro-gic.S>
12
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
15 13
diff --git a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
deleted file mode 100644
index 1dd231d2f772..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/*
2 * Copyright 2000 Russell King.
3 * Copyright 2003 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#define VMALLOC_END 0xd8000000UL
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 495e31306fc0..2db78bd5c835 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -4,7 +4,7 @@
4# 4#
5 5
6# Common objects 6# Common objects
7obj-y := time.o clock.o serial.o io.o psc.o \ 7obj-y := time.o clock.o serial.o psc.o \
8 dma.o usb.o common.o sram.o aemif.o 8 dma.o usb.o common.o sram.o aemif.o
9 9
10obj-$(CONFIG_DAVINCI_MUX) += mux.o 10obj-$(CONFIG_DAVINCI_MUX) += mux.o
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index d1b954955c12..b2267d1e1a71 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -21,12 +21,4 @@
21#define __mem_pci(a) (a) 21#define __mem_pci(a) (a)
22#define __mem_isa(a) (a) 22#define __mem_isa(a) (a)
23 23
24#ifndef __ASSEMBLER__
25#define __arch_ioremap davinci_ioremap
26#define __arch_iounmap davinci_iounmap
27
28void __iomem *davinci_ioremap(unsigned long phys, size_t size,
29 unsigned int type);
30void davinci_iounmap(volatile void __iomem *addr);
31#endif
32#endif /* __ASM_ARCH_IO_H */ 24#endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h
deleted file mode 100644
index d49646a8e206..000000000000
--- a/arch/arm/mach-davinci/include/mach/vmalloc.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * DaVinci vmalloc definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <mach/hardware.h>
12
13/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
14#define VMALLOC_END (IO_VIRT - (2<<20))
diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c
deleted file mode 100644
index 8ea60a8b2495..000000000000
--- a/arch/arm/mach-davinci/io.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * DaVinci I/O mapping code
3 *
4 * Copyright (C) 2005-2006 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/io.h>
13
14#include <asm/tlb.h>
15#include <asm/mach/map.h>
16
17#include <mach/common.h>
18
19/*
20 * Intercept ioremap() requests for addresses in our fixed mapping regions.
21 */
22void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type)
23{
24 struct map_desc *desc = davinci_soc_info.io_desc;
25 int desc_num = davinci_soc_info.io_desc_num;
26 int i;
27
28 for (i = 0; i < desc_num; i++, desc++) {
29 unsigned long iophys = __pfn_to_phys(desc->pfn);
30 unsigned long iosize = desc->length;
31
32 if (p >= iophys && (p + size) <= (iophys + iosize))
33 return __io(desc->virtual + p - iophys);
34 }
35
36 return __arm_ioremap_caller(p, size, type,
37 __builtin_return_address(0));
38}
39EXPORT_SYMBOL(davinci_ioremap);
40
41void davinci_iounmap(volatile void __iomem *addr)
42{
43 unsigned long virt = (unsigned long)addr;
44
45 if (virt >= VMALLOC_START && virt < VMALLOC_END)
46 __iounmap(addr);
47}
48EXPORT_SYMBOL(davinci_iounmap);
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index b20ec9af7882..ad1165d488c1 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -11,8 +11,6 @@
11#ifndef __ASM_ARCH_DOVE_H 11#ifndef __ASM_ARCH_DOVE_H
12#define __ASM_ARCH_DOVE_H 12#define __ASM_ARCH_DOVE_H
13 13
14#include <mach/vmalloc.h>
15
16/* 14/*
17 * Marvell Dove address maps. 15 * Marvell Dove address maps.
18 * 16 *
diff --git a/arch/arm/mach-dove/include/mach/vmalloc.h b/arch/arm/mach-dove/include/mach/vmalloc.h
deleted file mode 100644
index a28792cf761e..000000000000
--- a/arch/arm/mach-dove/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-dove/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfd800000UL
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index d0ce8abdd4b6..ce3ed244c4b0 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -283,7 +283,7 @@ MACHINE_START(EBSA110, "EBSA110")
283 .atag_offset = 0x400, 283 .atag_offset = 0x400,
284 .reserve_lp0 = 1, 284 .reserve_lp0 = 1,
285 .reserve_lp2 = 1, 285 .reserve_lp2 = 1,
286 .soft_reboot = 1, 286 .restart_mode = 's',
287 .map_io = ebsa110_map_io, 287 .map_io = ebsa110_map_io,
288 .init_irq = ebsa110_init_irq, 288 .init_irq = ebsa110_init_irq,
289 .timer = &ebsa110_timer, 289 .timer = &ebsa110_timer,
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
index 9a26245bf1fc..0d5df72a03f6 100644
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ b/arch/arm/mach-ebsa110/include/mach/system.h
@@ -34,6 +34,6 @@ static inline void arch_idle(void)
34 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); 34 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
35} 35}
36 36
37#define arch_reset(mode, cmd) cpu_reset(0x80000000) 37#define arch_reset(mode, cmd) soft_restart(0x80000000)
38 38
39#endif 39#endif
diff --git a/arch/arm/mach-ebsa110/include/mach/vmalloc.h b/arch/arm/mach-ebsa110/include/mach/vmalloc.h
deleted file mode 100644
index ea141b7a3e03..000000000000
--- a/arch/arm/mach-ebsa110/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-ebsa110/include/mach/vmalloc.h
3 *
4 * Copyright (C) 1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define VMALLOC_END 0xdf000000UL
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 0713448206a5..d9b0ea2ba4d8 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -16,6 +16,7 @@
16 16
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19#include <asm/hardware/vic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
21 22
@@ -36,6 +37,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
36 .atag_offset = 0x100, 37 .atag_offset = 0x100,
37 .map_io = ep93xx_map_io, 38 .map_io = ep93xx_map_io,
38 .init_irq = ep93xx_init_irq, 39 .init_irq = ep93xx_init_irq,
40 .handle_irq = vic_handle_irq,
39 .timer = &ep93xx_timer, 41 .timer = &ep93xx_timer,
40 .init_machine = adssphere_init_machine, 42 .init_machine = adssphere_init_machine,
41MACHINE_END 43MACHINE_END
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 70ef8c527d27..9bbae0835f27 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -39,6 +39,7 @@
39#include <mach/ep93xx_spi.h> 39#include <mach/ep93xx_spi.h>
40#include <mach/gpio-ep93xx.h> 40#include <mach/gpio-ep93xx.h>
41 41
42#include <asm/hardware/vic.h>
42#include <asm/mach-types.h> 43#include <asm/mach-types.h>
43#include <asm/mach/arch.h> 44#include <asm/mach/arch.h>
44 45
@@ -250,6 +251,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
250 .atag_offset = 0x100, 251 .atag_offset = 0x100,
251 .map_io = ep93xx_map_io, 252 .map_io = ep93xx_map_io,
252 .init_irq = ep93xx_init_irq, 253 .init_irq = ep93xx_init_irq,
254 .handle_irq = vic_handle_irq,
253 .timer = &ep93xx_timer, 255 .timer = &ep93xx_timer,
254 .init_machine = edb93xx_init_machine, 256 .init_machine = edb93xx_init_machine,
255MACHINE_END 257MACHINE_END
@@ -261,6 +263,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
261 .atag_offset = 0x100, 263 .atag_offset = 0x100,
262 .map_io = ep93xx_map_io, 264 .map_io = ep93xx_map_io,
263 .init_irq = ep93xx_init_irq, 265 .init_irq = ep93xx_init_irq,
266 .handle_irq = vic_handle_irq,
264 .timer = &ep93xx_timer, 267 .timer = &ep93xx_timer,
265 .init_machine = edb93xx_init_machine, 268 .init_machine = edb93xx_init_machine,
266MACHINE_END 269MACHINE_END
@@ -272,6 +275,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
272 .atag_offset = 0x100, 275 .atag_offset = 0x100,
273 .map_io = ep93xx_map_io, 276 .map_io = ep93xx_map_io,
274 .init_irq = ep93xx_init_irq, 277 .init_irq = ep93xx_init_irq,
278 .handle_irq = vic_handle_irq,
275 .timer = &ep93xx_timer, 279 .timer = &ep93xx_timer,
276 .init_machine = edb93xx_init_machine, 280 .init_machine = edb93xx_init_machine,
277MACHINE_END 281MACHINE_END
@@ -283,6 +287,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
283 .atag_offset = 0x100, 287 .atag_offset = 0x100,
284 .map_io = ep93xx_map_io, 288 .map_io = ep93xx_map_io,
285 .init_irq = ep93xx_init_irq, 289 .init_irq = ep93xx_init_irq,
290 .handle_irq = vic_handle_irq,
286 .timer = &ep93xx_timer, 291 .timer = &ep93xx_timer,
287 .init_machine = edb93xx_init_machine, 292 .init_machine = edb93xx_init_machine,
288MACHINE_END 293MACHINE_END
@@ -294,6 +299,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
294 .atag_offset = 0x100, 299 .atag_offset = 0x100,
295 .map_io = ep93xx_map_io, 300 .map_io = ep93xx_map_io,
296 .init_irq = ep93xx_init_irq, 301 .init_irq = ep93xx_init_irq,
302 .handle_irq = vic_handle_irq,
297 .timer = &ep93xx_timer, 303 .timer = &ep93xx_timer,
298 .init_machine = edb93xx_init_machine, 304 .init_machine = edb93xx_init_machine,
299MACHINE_END 305MACHINE_END
@@ -305,6 +311,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
305 .atag_offset = 0x100, 311 .atag_offset = 0x100,
306 .map_io = ep93xx_map_io, 312 .map_io = ep93xx_map_io,
307 .init_irq = ep93xx_init_irq, 313 .init_irq = ep93xx_init_irq,
314 .handle_irq = vic_handle_irq,
308 .timer = &ep93xx_timer, 315 .timer = &ep93xx_timer,
309 .init_machine = edb93xx_init_machine, 316 .init_machine = edb93xx_init_machine,
310MACHINE_END 317MACHINE_END
@@ -316,6 +323,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
316 .atag_offset = 0x100, 323 .atag_offset = 0x100,
317 .map_io = ep93xx_map_io, 324 .map_io = ep93xx_map_io,
318 .init_irq = ep93xx_init_irq, 325 .init_irq = ep93xx_init_irq,
326 .handle_irq = vic_handle_irq,
319 .timer = &ep93xx_timer, 327 .timer = &ep93xx_timer,
320 .init_machine = edb93xx_init_machine, 328 .init_machine = edb93xx_init_machine,
321MACHINE_END 329MACHINE_END
@@ -327,6 +335,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
327 .atag_offset = 0x100, 335 .atag_offset = 0x100,
328 .map_io = ep93xx_map_io, 336 .map_io = ep93xx_map_io,
329 .init_irq = ep93xx_init_irq, 337 .init_irq = ep93xx_init_irq,
338 .handle_irq = vic_handle_irq,
330 .timer = &ep93xx_timer, 339 .timer = &ep93xx_timer,
331 .init_machine = edb93xx_init_machine, 340 .init_machine = edb93xx_init_machine,
332MACHINE_END 341MACHINE_END
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 45ee205856f8..1dd32a7c5f15 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -16,6 +16,7 @@
16 16
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19#include <asm/hardware/vic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
21 22
@@ -36,6 +37,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
36 .atag_offset = 0x100, 37 .atag_offset = 0x100,
37 .map_io = ep93xx_map_io, 38 .map_io = ep93xx_map_io,
38 .init_irq = ep93xx_init_irq, 39 .init_irq = ep93xx_init_irq,
40 .handle_irq = vic_handle_irq,
39 .timer = &ep93xx_timer, 41 .timer = &ep93xx_timer,
40 .init_machine = gesbc9312_init_machine, 42 .init_machine = gesbc9312_init_machine,
41MACHINE_END 43MACHINE_END
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
index 96b85e2c2c0b..9be6edcf9045 100644
--- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
@@ -9,51 +9,9 @@
9 * the Free Software Foundation; either version 2 of the License, or (at 9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version. 10 * your option) any later version.
11 */ 11 */
12#include <mach/ep93xx-regs.h>
13 12
14 .macro disable_fiq 13 .macro disable_fiq
15 .endm 14 .endm
16 15
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 16 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 17 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \base, =(EP93XX_AHB_VIRT_BASE)
25 orr \base, \base, #0x000b0000
26 mov \irqnr, #0
27 ldr \irqstat, [\base] @ lower 32 interrupts
28 cmp \irqstat, #0
29 bne 1001f
30
31 eor \base, \base, #0x00070000
32 ldr \irqstat, [\base] @ upper 32 interrupts
33 cmp \irqstat, #0
34 beq 1002f
35 mov \irqnr, #0x20
36
371001:
38 movs \tmp, \irqstat, lsl #16
39 movne \irqstat, \tmp
40 addeq \irqnr, \irqnr, #16
41
42 movs \tmp, \irqstat, lsl #8
43 movne \irqstat, \tmp
44 addeq \irqnr, \irqnr, #8
45
46 movs \tmp, \irqstat, lsl #4
47 movne \irqstat, \tmp
48 addeq \irqnr, \irqnr, #4
49
50 movs \tmp, \irqstat, lsl #2
51 movne \irqstat, \tmp
52 addeq \irqnr, \irqnr, #2
53
54 movs \tmp, \irqstat, lsl #1
55 addeq \irqnr, \irqnr, #1
56 orrs \base, \base, #1
57
581002:
59 .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
index 6d661fe9d66c..bdf6c4f1feef 100644
--- a/arch/arm/mach-ep93xx/include/mach/system.h
+++ b/arch/arm/mach-ep93xx/include/mach/system.h
@@ -11,8 +11,6 @@ static inline void arch_idle(void)
11 11
12static inline void arch_reset(char mode, const char *cmd) 12static inline void arch_reset(char mode, const char *cmd)
13{ 13{
14 local_irq_disable();
15
16 /* 14 /*
17 * Set then clear the SWRST bit to initiate a software reset 15 * Set then clear the SWRST bit to initiate a software reset
18 */ 16 */
diff --git a/arch/arm/mach-ep93xx/include/mach/vmalloc.h b/arch/arm/mach-ep93xx/include/mach/vmalloc.h
deleted file mode 100644
index 1b3f25d03d39..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe800000UL
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index e72f7368876e..a6dae6c2e3c1 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -18,6 +18,7 @@
18 18
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20 20
21#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
23 24
@@ -80,6 +81,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
80 .atag_offset = 0x100, 81 .atag_offset = 0x100,
81 .map_io = ep93xx_map_io, 82 .map_io = ep93xx_map_io,
82 .init_irq = ep93xx_init_irq, 83 .init_irq = ep93xx_init_irq,
84 .handle_irq = vic_handle_irq,
83 .timer = &ep93xx_timer, 85 .timer = &ep93xx_timer,
84 .init_machine = micro9_init_machine, 86 .init_machine = micro9_init_machine,
85MACHINE_END 87MACHINE_END
@@ -91,6 +93,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
91 .atag_offset = 0x100, 93 .atag_offset = 0x100,
92 .map_io = ep93xx_map_io, 94 .map_io = ep93xx_map_io,
93 .init_irq = ep93xx_init_irq, 95 .init_irq = ep93xx_init_irq,
96 .handle_irq = vic_handle_irq,
94 .timer = &ep93xx_timer, 97 .timer = &ep93xx_timer,
95 .init_machine = micro9_init_machine, 98 .init_machine = micro9_init_machine,
96MACHINE_END 99MACHINE_END
@@ -102,6 +105,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
102 .atag_offset = 0x100, 105 .atag_offset = 0x100,
103 .map_io = ep93xx_map_io, 106 .map_io = ep93xx_map_io,
104 .init_irq = ep93xx_init_irq, 107 .init_irq = ep93xx_init_irq,
108 .handle_irq = vic_handle_irq,
105 .timer = &ep93xx_timer, 109 .timer = &ep93xx_timer,
106 .init_machine = micro9_init_machine, 110 .init_machine = micro9_init_machine,
107MACHINE_END 111MACHINE_END
@@ -113,6 +117,7 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
113 .atag_offset = 0x100, 117 .atag_offset = 0x100,
114 .map_io = ep93xx_map_io, 118 .map_io = ep93xx_map_io,
115 .init_irq = ep93xx_init_irq, 119 .init_irq = ep93xx_init_irq,
120 .handle_irq = vic_handle_irq,
116 .timer = &ep93xx_timer, 121 .timer = &ep93xx_timer,
117 .init_machine = micro9_init_machine, 122 .init_machine = micro9_init_machine,
118MACHINE_END 123MACHINE_END
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 52e090dc9d27..40121ba8e711 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -25,6 +25,7 @@
25#include <mach/fb.h> 25#include <mach/fb.h>
26#include <mach/gpio-ep93xx.h> 26#include <mach/gpio-ep93xx.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30 31
@@ -80,6 +81,7 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
80 .atag_offset = 0x100, 81 .atag_offset = 0x100,
81 .map_io = ep93xx_map_io, 82 .map_io = ep93xx_map_io,
82 .init_irq = ep93xx_init_irq, 83 .init_irq = ep93xx_init_irq,
84 .handle_irq = vic_handle_irq,
83 .timer = &ep93xx_timer, 85 .timer = &ep93xx_timer,
84 .init_machine = simone_init_machine, 86 .init_machine = simone_init_machine,
85MACHINE_END 87MACHINE_END
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 8121e3aedc0a..ec7c63ff01e2 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -31,6 +31,7 @@
31#include <mach/fb.h> 31#include <mach/fb.h>
32#include <mach/gpio-ep93xx.h> 32#include <mach/gpio-ep93xx.h>
33 33
34#include <asm/hardware/vic.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
36 37
@@ -177,6 +178,7 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
177 .atag_offset = 0x100, 178 .atag_offset = 0x100,
178 .map_io = ep93xx_map_io, 179 .map_io = ep93xx_map_io,
179 .init_irq = ep93xx_init_irq, 180 .init_irq = ep93xx_init_irq,
181 .handle_irq = vic_handle_irq,
180 .timer = &ep93xx_timer, 182 .timer = &ep93xx_timer,
181 .init_machine = snappercl15_init_machine, 183 .init_machine = snappercl15_init_machine,
182MACHINE_END 184MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 8b2f1435bcac..760384e6407d 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -23,6 +23,7 @@
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/ts72xx.h> 24#include <mach/ts72xx.h>
25 25
26#include <asm/hardware/vic.h>
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
27#include <asm/mach/map.h> 28#include <asm/mach/map.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
@@ -247,6 +248,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
247 .atag_offset = 0x100, 248 .atag_offset = 0x100,
248 .map_io = ts72xx_map_io, 249 .map_io = ts72xx_map_io,
249 .init_irq = ep93xx_init_irq, 250 .init_irq = ep93xx_init_irq,
251 .handle_irq = vic_handle_irq,
250 .timer = &ep93xx_timer, 252 .timer = &ep93xx_timer,
251 .init_machine = ts72xx_init_machine, 253 .init_machine = ts72xx_init_machine,
252MACHINE_END 254MACHINE_END
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
index 90ec247f3b37..22316cb31a8c 100644
--- a/arch/arm/mach-exynos/cpu.c
+++ b/arch/arm/mach-exynos/cpu.c
@@ -15,6 +15,7 @@
15#include <asm/mach/irq.h> 15#include <asm/mach/irq.h>
16 16
17#include <asm/proc-fns.h> 17#include <asm/proc-fns.h>
18#include <asm/exception.h>
18#include <asm/hardware/cache-l2x0.h> 19#include <asm/hardware/cache-l2x0.h>
19#include <asm/hardware/gic.h> 20#include <asm/hardware/gic.h>
20 21
@@ -33,8 +34,6 @@
33#include <mach/regs-irq.h> 34#include <mach/regs-irq.h>
34#include <mach/regs-pmu.h> 35#include <mach/regs-pmu.h>
35 36
36unsigned int gic_bank_offset __read_mostly;
37
38extern int combiner_init(unsigned int combiner_nr, void __iomem *base, 37extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
39 unsigned int irq_start); 38 unsigned int irq_start);
40extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); 39extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
@@ -207,27 +206,14 @@ void __init exynos4_init_clocks(int xtal)
207 exynos4_setup_clocks(); 206 exynos4_setup_clocks();
208} 207}
209 208
210static void exynos4_gic_irq_fix_base(struct irq_data *d)
211{
212 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
213
214 gic_data->cpu_base = S5P_VA_GIC_CPU +
215 (gic_bank_offset * smp_processor_id());
216
217 gic_data->dist_base = S5P_VA_GIC_DIST +
218 (gic_bank_offset * smp_processor_id());
219}
220
221void __init exynos4_init_irq(void) 209void __init exynos4_init_irq(void)
222{ 210{
223 int irq; 211 int irq;
212 unsigned int gic_bank_offset;
224 213
225 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; 214 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
226 215
227 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); 216 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
228 gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
229 gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
230 gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
231 217
232 for (irq = 0; irq < MAX_COMBINER_NR; irq++) { 218 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
233 219
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S
index f5e9fd8e37b4..3ba4f547534b 100644
--- a/arch/arm/mach-exynos/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos/include/mach/entry-macro.S
@@ -9,83 +9,8 @@
9 * warranty of any kind, whether express or implied. 9 * warranty of any kind, whether express or implied.
10*/ 10*/
11 11
12#include <mach/hardware.h>
13#include <mach/map.h>
14#include <asm/hardware/gic.h>
15
16 .macro disable_fiq 12 .macro disable_fiq
17 .endm 13 .endm
18 14
19 .macro get_irqnr_preamble, base, tmp
20 mov \tmp, #0
21
22 mrc p15, 0, \base, c0, c0, 5
23 and \base, \base, #3
24 cmp \base, #0
25 beq 1f
26
27 ldr \tmp, =gic_bank_offset
28 ldr \tmp, [\tmp]
29 cmp \base, #1
30 beq 1f
31
32 cmp \base, #2
33 addeq \tmp, \tmp, \tmp
34 addne \tmp, \tmp, \tmp, LSL #1
35
361: ldr \base, =gic_cpu_base_addr
37 ldr \base, [\base]
38 add \base, \base, \tmp
39 .endm
40
41 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
42 .endm 16 .endm
43
44 /*
45 * The interrupt numbering scheme is defined in the
46 * interrupt controller spec. To wit:
47 *
48 * Interrupts 0-15 are IPI
49 * 16-28 are reserved
50 * 29-31 are local. We allow 30 to be used for the watchdog.
51 * 32-1020 are global
52 * 1021-1022 are reserved
53 * 1023 is "spurious" (no interrupt)
54 *
55 * For now, we ignore all local interrupts so only return an interrupt if it's
56 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
57 *
58 * A simple read from the controller will tell us the number of the highest
59 * priority enabled interrupt. We then just need to check whether it is in the
60 * valid range for an IRQ (30-1020 inclusive).
61 */
62
63 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
64
65 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
66
67 ldr \tmp, =1021
68
69 bic \irqnr, \irqstat, #0x1c00
70
71 cmp \irqnr, #15
72 cmpcc \irqnr, \irqnr
73 cmpne \irqnr, \tmp
74 cmpcs \irqnr, \irqnr
75 addne \irqnr, \irqnr, #32
76
77 .endm
78
79 /* We assume that irqstat (the raw value of the IRQ acknowledge
80 * register) is preserved from the macro above.
81 * If there is an IPI, we immediately signal end of interrupt on the
82 * controller, since this requires the original irqstat value which
83 * we won't easily be able to recreate later.
84 */
85
86 .macro test_for_ipi, irqnr, irqstat, base, tmp
87 bic \irqnr, \irqstat, #0x1c00
88 cmp \irqnr, #16
89 strcc \irqstat, [\base, #GIC_CPU_EOI]
90 cmpcs \irqnr, \irqnr
91 .endm
diff --git a/arch/arm/mach-exynos/include/mach/vmalloc.h b/arch/arm/mach-exynos/include/mach/vmalloc.h
deleted file mode 100644
index 284330e571d2..000000000000
--- a/arch/arm/mach-exynos/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* linux/arch/arm/mach-exynos4/include/mach/vmalloc.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
7 *
8 * Based on arch/arm/mach-s5p6440/include/mach/vmalloc.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * EXYNOS4 vmalloc definition
15*/
16
17#ifndef __ASM_ARCH_VMALLOC_H
18#define __ASM_ARCH_VMALLOC_H __FILE__
19
20#define VMALLOC_END 0xF6000000UL
21
22#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index f0ca6c157d29..49da3089249a 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -16,6 +16,7 @@
16#include <linux/smsc911x.h> 16#include <linux/smsc911x.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20 21
21#include <plat/cpu.h> 22#include <plat/cpu.h>
@@ -210,6 +211,7 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
210 .atag_offset = 0x100, 211 .atag_offset = 0x100,
211 .init_irq = exynos4_init_irq, 212 .init_irq = exynos4_init_irq,
212 .map_io = armlex4210_map_io, 213 .map_io = armlex4210_map_io,
214 .handle_irq = gic_handle_irq,
213 .init_machine = armlex4210_machine_init, 215 .init_machine = armlex4210_machine_init,
214 .timer = &exynos4_timer, 216 .timer = &exynos4_timer,
215MACHINE_END 217MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 236bbe187163..5acec11821a4 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -32,6 +32,7 @@
32#include <media/v4l2-mediabus.h> 32#include <media/v4l2-mediabus.h>
33 33
34#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/hardware/gic.h>
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
36 37
37#include <plat/adc.h> 38#include <plat/adc.h>
@@ -1333,6 +1334,7 @@ MACHINE_START(NURI, "NURI")
1333 .atag_offset = 0x100, 1334 .atag_offset = 0x100,
1334 .init_irq = exynos4_init_irq, 1335 .init_irq = exynos4_init_irq,
1335 .map_io = nuri_map_io, 1336 .map_io = nuri_map_io,
1337 .handle_irq = gic_handle_irq,
1336 .init_machine = nuri_machine_init, 1338 .init_machine = nuri_machine_init,
1337 .timer = &exynos4_timer, 1339 .timer = &exynos4_timer,
1338 .reserve = &nuri_reserve, 1340 .reserve = &nuri_reserve,
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index f80b563f2be7..5561b06c38ec 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -22,6 +22,7 @@
22#include <linux/lcd.h> 22#include <linux/lcd.h>
23 23
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/hardware/gic.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
26 27
27#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
@@ -694,6 +695,7 @@ MACHINE_START(ORIGEN, "ORIGEN")
694 .atag_offset = 0x100, 695 .atag_offset = 0x100,
695 .init_irq = exynos4_init_irq, 696 .init_irq = exynos4_init_irq,
696 .map_io = origen_map_io, 697 .map_io = origen_map_io,
698 .handle_irq = gic_handle_irq,
697 .init_machine = origen_machine_init, 699 .init_machine = origen_machine_init,
698 .timer = &exynos4_timer, 700 .timer = &exynos4_timer,
699 .reserve = &origen_reserve, 701 .reserve = &origen_reserve,
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index fcf2e0e23d53..722d82d7f217 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,6 +21,7 @@
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22 22
23#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/hardware/gic.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25 26
26#include <plat/backlight.h> 27#include <plat/backlight.h>
@@ -287,6 +288,7 @@ MACHINE_START(SMDK4212, "SMDK4212")
287 .atag_offset = 0x100, 288 .atag_offset = 0x100,
288 .init_irq = exynos4_init_irq, 289 .init_irq = exynos4_init_irq,
289 .map_io = smdk4x12_map_io, 290 .map_io = smdk4x12_map_io,
291 .handle_irq = gic_handle_irq,
290 .init_machine = smdk4x12_machine_init, 292 .init_machine = smdk4x12_machine_init,
291 .timer = &exynos4_timer, 293 .timer = &exynos4_timer,
292MACHINE_END 294MACHINE_END
@@ -297,6 +299,7 @@ MACHINE_START(SMDK4412, "SMDK4412")
297 .atag_offset = 0x100, 299 .atag_offset = 0x100,
298 .init_irq = exynos4_init_irq, 300 .init_irq = exynos4_init_irq,
299 .map_io = smdk4x12_map_io, 301 .map_io = smdk4x12_map_io,
302 .handle_irq = gic_handle_irq,
300 .init_machine = smdk4x12_machine_init, 303 .init_machine = smdk4x12_machine_init,
301 .timer = &exynos4_timer, 304 .timer = &exynos4_timer,
302MACHINE_END 305MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index cec2afabe7b4..edc60b6108ed 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -21,6 +21,7 @@
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22 22
23#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/hardware/gic.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25 26
26#include <video/platform_lcd.h> 27#include <video/platform_lcd.h>
@@ -375,6 +376,7 @@ MACHINE_START(SMDKV310, "SMDKV310")
375 .atag_offset = 0x100, 376 .atag_offset = 0x100,
376 .init_irq = exynos4_init_irq, 377 .init_irq = exynos4_init_irq,
377 .map_io = smdkv310_map_io, 378 .map_io = smdkv310_map_io,
379 .handle_irq = gic_handle_irq,
378 .init_machine = smdkv310_machine_init, 380 .init_machine = smdkv310_machine_init,
379 .timer = &exynos4_timer, 381 .timer = &exynos4_timer,
380 .reserve = &smdkv310_reserve, 382 .reserve = &smdkv310_reserve,
@@ -385,6 +387,7 @@ MACHINE_START(SMDKC210, "SMDKC210")
385 .atag_offset = 0x100, 387 .atag_offset = 0x100,
386 .init_irq = exynos4_init_irq, 388 .init_irq = exynos4_init_irq,
387 .map_io = smdkv310_map_io, 389 .map_io = smdkv310_map_io,
390 .handle_irq = gic_handle_irq,
388 .init_machine = smdkv310_machine_init, 391 .init_machine = smdkv310_machine_init,
389 .timer = &exynos4_timer, 392 .timer = &exynos4_timer,
390MACHINE_END 393MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index a2a177ff4b44..cfc7d5076f5a 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -24,6 +24,7 @@
24#include <linux/i2c/atmel_mxt_ts.h> 24#include <linux/i2c/atmel_mxt_ts.h>
25 25
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27#include <asm/hardware/gic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28 29
29#include <plat/regs-serial.h> 30#include <plat/regs-serial.h>
@@ -1058,6 +1059,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1058 .atag_offset = 0x100, 1059 .atag_offset = 0x100,
1059 .init_irq = exynos4_init_irq, 1060 .init_irq = exynos4_init_irq,
1060 .map_io = universal_map_io, 1061 .map_io = universal_map_io,
1062 .handle_irq = gic_handle_irq,
1061 .init_machine = universal_machine_init, 1063 .init_machine = universal_machine_init,
1062 .timer = &exynos4_timer, 1064 .timer = &exynos4_timer,
1063 .reserve = &universal_reserve, 1065 .reserve = &universal_reserve,
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 69ffb2fb3875..60bc45e3e709 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -32,7 +32,6 @@
32 32
33#include <plat/cpu.h> 33#include <plat/cpu.h>
34 34
35extern unsigned int gic_bank_offset;
36extern void exynos4_secondary_startup(void); 35extern void exynos4_secondary_startup(void);
37 36
38#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ 37#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
@@ -65,31 +64,6 @@ static void __iomem *scu_base_addr(void)
65 64
66static DEFINE_SPINLOCK(boot_lock); 65static DEFINE_SPINLOCK(boot_lock);
67 66
68static void __cpuinit exynos4_gic_secondary_init(void)
69{
70 void __iomem *dist_base = S5P_VA_GIC_DIST +
71 (gic_bank_offset * smp_processor_id());
72 void __iomem *cpu_base = S5P_VA_GIC_CPU +
73 (gic_bank_offset * smp_processor_id());
74 int i;
75
76 /*
77 * Deal with the banked PPI and SGI interrupts - disable all
78 * PPI interrupts, ensure all SGI interrupts are enabled.
79 */
80 __raw_writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
81 __raw_writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
82
83 /*
84 * Set priority on PPI and SGI interrupts
85 */
86 for (i = 0; i < 32; i += 4)
87 __raw_writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
88
89 __raw_writel(0xf0, cpu_base + GIC_CPU_PRIMASK);
90 __raw_writel(1, cpu_base + GIC_CPU_CTRL);
91}
92
93void __cpuinit platform_secondary_init(unsigned int cpu) 67void __cpuinit platform_secondary_init(unsigned int cpu)
94{ 68{
95 /* 69 /*
@@ -97,7 +71,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
97 * core (e.g. timer irq), then they will not have been enabled 71 * core (e.g. timer irq), then they will not have been enabled
98 * for us: do so 72 * for us: do so
99 */ 73 */
100 exynos4_gic_secondary_init(); 74 gic_secondary_init(0);
101 75
102 /* 76 /*
103 * let the primary processor know we're out of the 77 * let the primary processor know we're out of the
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index d5f178540928..60b6774e1eaa 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -86,7 +86,7 @@ fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi)
86MACHINE_START(CATS, "Chalice-CATS") 86MACHINE_START(CATS, "Chalice-CATS")
87 /* Maintainer: Philip Blundell */ 87 /* Maintainer: Philip Blundell */
88 .atag_offset = 0x100, 88 .atag_offset = 0x100,
89 .soft_reboot = 1, 89 .restart_mode = 's',
90 .fixup = fixup_cats, 90 .fixup = fixup_cats,
91 .map_io = footbridge_map_io, 91 .map_io = footbridge_map_io,
92 .init_irq = footbridge_init_irq, 92 .init_irq = footbridge_init_irq,
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
index 0b2931566209..249f895910fb 100644
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ b/arch/arm/mach-footbridge/include/mach/system.h
@@ -24,7 +24,7 @@ static inline void arch_reset(char mode, const char *cmd)
24 /* 24 /*
25 * Jump into the ROM 25 * Jump into the ROM
26 */ 26 */
27 cpu_reset(0x41000000); 27 soft_restart(0x41000000);
28 } else { 28 } else {
29 if (machine_is_netwinder()) { 29 if (machine_is_netwinder()) {
30 /* open up the SuperIO chip 30 /* open up the SuperIO chip
diff --git a/arch/arm/mach-footbridge/include/mach/vmalloc.h b/arch/arm/mach-footbridge/include/mach/vmalloc.h
deleted file mode 100644
index 40ba78e5782b..000000000000
--- a/arch/arm/mach-footbridge/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-footbridge/include/mach/vmalloc.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9
10#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/mach-gemini/include/mach/vmalloc.h b/arch/arm/mach-gemini/include/mach/vmalloc.h
deleted file mode 100644
index 45371eb86fcb..000000000000
--- a/arch/arm/mach-gemini/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/mach-h720x/include/mach/vmalloc.h b/arch/arm/mach-h720x/include/mach/vmalloc.h
deleted file mode 100644
index 8520b4a4d4e6..000000000000
--- a/arch/arm/mach-h720x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-h720x/include/mach/vmalloc.h
3 */
4
5#ifndef __ARCH_ARM_VMALLOC_H
6#define __ARCH_ARM_VMALLOC_H
7
8#define VMALLOC_END 0xd0000000UL
9
10#endif
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 88660d500f5b..7266dd510f1a 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -144,6 +144,7 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
144 .map_io = highbank_map_io, 144 .map_io = highbank_map_io,
145 .init_irq = highbank_init_irq, 145 .init_irq = highbank_init_irq,
146 .timer = &highbank_timer, 146 .timer = &highbank_timer,
147 .handle_irq = gic_handle_irq,
147 .init_machine = highbank_init, 148 .init_machine = highbank_init,
148 .dt_compat = highbank_match, 149 .dt_compat = highbank_match,
149MACHINE_END 150MACHINE_END
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S
index 73c11297509e..a14f9e62ca92 100644
--- a/arch/arm/mach-highbank/include/mach/entry-macro.S
+++ b/arch/arm/mach-highbank/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
1#include <asm/hardware/entry-macro-gic.S>
2
3 .macro disable_fiq 1 .macro disable_fiq
4 .endm 2 .endm
5 3
diff --git a/arch/arm/mach-highbank/include/mach/vmalloc.h b/arch/arm/mach-highbank/include/mach/vmalloc.h
deleted file mode 100644
index 1969e954277a..000000000000
--- a/arch/arm/mach-highbank/include/mach/vmalloc.h
+++ /dev/null
@@ -1 +0,0 @@
1#define VMALLOC_END 0xFEE00000UL
diff --git a/arch/arm/mach-integrator/include/mach/vmalloc.h b/arch/arm/mach-integrator/include/mach/vmalloc.h
deleted file mode 100644
index 2f5a2bafb11f..000000000000
--- a/arch/arm/mach-integrator/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-integrator/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-iop13xx/include/mach/vmalloc.h b/arch/arm/mach-iop13xx/include/mach/vmalloc.h
deleted file mode 100644
index c53456740345..000000000000
--- a/arch/arm/mach-iop13xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _VMALLOC_H_
2#define _VMALLOC_H_
3#define VMALLOC_END 0xfa000000UL
4#endif
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index 059c783ce0b2..2d88264b9863 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -13,15 +13,8 @@
13 13
14#include <asm/hardware/iop3xx.h> 14#include <asm/hardware/iop3xx.h>
15 15
16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
17 unsigned int mtype);
18extern void __iop3xx_iounmap(void __iomem *addr);
19
20#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
21#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) 17#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
22#define __mem_pci(a) (a) 18#define __mem_pci(a) (a)
23 19
24#define __arch_ioremap __iop3xx_ioremap
25#define __arch_iounmap __iop3xx_iounmap
26
27#endif 20#endif
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
index a4b808fe0d81..b4f83e5973b2 100644
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -18,8 +18,6 @@ static inline void arch_idle(void)
18 18
19static inline void arch_reset(char mode, const char *cmd) 19static inline void arch_reset(char mode, const char *cmd)
20{ 20{
21 local_irq_disable();
22
23 if (machine_is_n2100()) { 21 if (machine_is_n2100()) {
24 gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW); 22 gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
25 gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT); 23 gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
@@ -30,5 +28,5 @@ static inline void arch_reset(char mode, const char *cmd)
30 *IOP3XX_PCSR = 0x30; 28 *IOP3XX_PCSR = 0x30;
31 29
32 /* Jump into ROM at address 0 */ 30 /* Jump into ROM at address 0 */
33 cpu_reset(0); 31 soft_restart(0);
34} 32}
diff --git a/arch/arm/mach-iop32x/include/mach/vmalloc.h b/arch/arm/mach-iop32x/include/mach/vmalloc.h
deleted file mode 100644
index c4862d48e583..000000000000
--- a/arch/arm/mach-iop32x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-iop32x/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index 39e893e97c21..a8a66fc8fbdb 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -13,15 +13,8 @@
13 13
14#include <asm/hardware/iop3xx.h> 14#include <asm/hardware/iop3xx.h>
15 15
16extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
17 unsigned int mtype);
18extern void __iop3xx_iounmap(void __iomem *addr);
19
20#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
21#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) 17#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
22#define __mem_pci(a) (a) 18#define __mem_pci(a) (a)
23 19
24#define __arch_ioremap __iop3xx_ioremap
25#define __arch_iounmap __iop3xx_iounmap
26
27#endif 20#endif
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
index f192a34be073..86d1b20dd692 100644
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ b/arch/arm/mach-iop33x/include/mach/system.h
@@ -19,5 +19,5 @@ static inline void arch_reset(char mode, const char *cmd)
19 *IOP3XX_PCSR = 0x30; 19 *IOP3XX_PCSR = 0x30;
20 20
21 /* Jump into ROM at address 0 */ 21 /* Jump into ROM at address 0 */
22 cpu_reset(0); 22 soft_restart(0);
23} 23}
diff --git a/arch/arm/mach-iop33x/include/mach/vmalloc.h b/arch/arm/mach-iop33x/include/mach/vmalloc.h
deleted file mode 100644
index 48331dc23704..000000000000
--- a/arch/arm/mach-iop33x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-iop33x/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
index de370992c848..810df7b93982 100644
--- a/arch/arm/mach-ixp2000/include/mach/system.h
+++ b/arch/arm/mach-ixp2000/include/mach/system.h
@@ -19,8 +19,6 @@ static inline void arch_idle(void)
19 19
20static inline void arch_reset(char mode, const char *cmd) 20static inline void arch_reset(char mode, const char *cmd)
21{ 21{
22 local_irq_disable();
23
24 /* 22 /*
25 * Reset flash banking register so that we are pointing at 23 * Reset flash banking register so that we are pointing at
26 * RedBoot bank. 24 * RedBoot bank.
diff --git a/arch/arm/mach-ixp2000/include/mach/vmalloc.h b/arch/arm/mach-ixp2000/include/mach/vmalloc.h
deleted file mode 100644
index 61c8dae24f95..000000000000
--- a/arch/arm/mach-ixp2000/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-ixp2000/include/mach/vmalloc.h
3 *
4 * Author: Naeem Afzal <naeem.m.afzal@intel.com>
5 *
6 * Copyright 2002 Intel Corp.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Just any arbitrary offset to the start of the vmalloc VM area: the
14 * current 8MB value just means that there will be a 8MB "hole" after the
15 * physical memory until the kernel virtual memory starts. That means that
16 * any out-of-bounds memory accesses will hopefully be caught.
17 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
18 * area for the same reason. ;)
19 */
20#define VMALLOC_END 0xfb000000UL
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index a1749d0fd896..4ce4353b9f72 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -20,33 +20,4 @@
20#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) 20#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
21#define __mem_pci(a) (a) 21#define __mem_pci(a) (a)
22 22
23static inline void __iomem *
24ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype)
25{
26 if (addr >= IXP23XX_PCI_MEM_START &&
27 addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) {
28 if (addr + size > IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE)
29 return NULL;
30
31 return (void __iomem *)
32 ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT);
33 }
34
35 return __arm_ioremap(addr, size, mtype);
36}
37
38static inline void
39ixp23xx_iounmap(void __iomem *addr)
40{
41 if ((((u32)addr) >= IXP23XX_PCI_MEM_VIRT) &&
42 (((u32)addr) < IXP23XX_PCI_MEM_VIRT + IXP23XX_PCI_MEM_SIZE))
43 return;
44
45 __iounmap(addr);
46}
47
48#define __arch_ioremap ixp23xx_ioremap
49#define __arch_iounmap ixp23xx_iounmap
50
51
52#endif 23#endif
diff --git a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h b/arch/arm/mach-ixp23xx/include/mach/vmalloc.h
deleted file mode 100644
index 896c56a1c00e..000000000000
--- a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-ixp23xx/include/mach/vmalloc.h
3 *
4 * Copyright (c) 2005 MontaVista Software, Inc.
5 *
6 * NPU mappings end at 0xf0000000 and we allocate 64MB for board
7 * specific static I/O.
8 */
9
10#define VMALLOC_END (0xec000000UL)
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
index 54c0af7fa2d4..24337d9d275b 100644
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ b/arch/arm/mach-ixp4xx/include/mach/system.h
@@ -26,7 +26,7 @@ static inline void arch_reset(char mode, const char *cmd)
26{ 26{
27 if ( 1 && mode == 's') { 27 if ( 1 && mode == 's') {
28 /* Jump into ROM at address 0 */ 28 /* Jump into ROM at address 0 */
29 cpu_reset(0); 29 soft_restart(0);
30 } else { 30 } else {
31 /* Use on-chip reset capability */ 31 /* Use on-chip reset capability */
32 32
diff --git a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h b/arch/arm/mach-ixp4xx/include/mach/vmalloc.h
deleted file mode 100644
index 9bcd64d59854..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-ixp4xx/include/mach/vmalloc.h
3 */
4#define VMALLOC_END (0xff000000UL)
5
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index 1aaddc364f2e..49dd0cb5e166 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -19,31 +19,6 @@ static inline void __iomem *__io(unsigned long addr)
19 + KIRKWOOD_PCIE_IO_VIRT_BASE); 19 + KIRKWOOD_PCIE_IO_VIRT_BASE);
20} 20}
21 21
22static inline void __iomem *
23__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
24{
25 void __iomem *retval;
26 unsigned long offs = paddr - KIRKWOOD_REGS_PHYS_BASE;
27 if (mtype == MT_DEVICE && size && offs < KIRKWOOD_REGS_SIZE &&
28 size <= KIRKWOOD_REGS_SIZE && offs + size <= KIRKWOOD_REGS_SIZE) {
29 retval = (void __iomem *)KIRKWOOD_REGS_VIRT_BASE + offs;
30 } else {
31 retval = __arm_ioremap(paddr, size, mtype);
32 }
33
34 return retval;
35}
36
37static inline void
38__arch_iounmap(void __iomem *addr)
39{
40 if (addr < (void __iomem *)KIRKWOOD_REGS_VIRT_BASE ||
41 addr >= (void __iomem *)(KIRKWOOD_REGS_VIRT_BASE + KIRKWOOD_REGS_SIZE))
42 __iounmap(addr);
43}
44
45#define __arch_ioremap __arch_ioremap
46#define __arch_iounmap __arch_iounmap
47#define __io(a) __io(a) 22#define __io(a) __io(a)
48#define __mem_pci(a) (a) 23#define __mem_pci(a) (a)
49 24
diff --git a/arch/arm/mach-kirkwood/include/mach/vmalloc.h b/arch/arm/mach-kirkwood/include/mach/vmalloc.h
deleted file mode 100644
index bf162ca3d2c1..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-kirkwood/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe800000UL
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
index fb1dda9be2d0..ceb19c90aa52 100644
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ b/arch/arm/mach-ks8695/include/mach/system.h
@@ -32,7 +32,7 @@ static void arch_reset(char mode, const char *cmd)
32 unsigned int reg; 32 unsigned int reg;
33 33
34 if (mode == 's') 34 if (mode == 's')
35 cpu_reset(0); 35 soft_restart(0);
36 36
37 /* disable timer0 */ 37 /* disable timer0 */
38 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); 38 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
diff --git a/arch/arm/mach-ks8695/include/mach/vmalloc.h b/arch/arm/mach-ks8695/include/mach/vmalloc.h
deleted file mode 100644
index 744ac66be3a2..000000000000
--- a/arch/arm/mach-ks8695/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-ks8695/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2006 Ben Dooks
5 * Copyright (C) 2006 Simtec Electronics <linux@simtec.co.uk>
6 *
7 * KS8695 vmalloc definition
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_VMALLOC_H
15#define __ASM_ARCH_VMALLOC_H
16
17#define VMALLOC_END (KS8695_IO_VA & PGDIR_MASK)
18
19#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
index df3b0dea4d7b..d47f3b1c24b8 100644
--- a/arch/arm/mach-lpc32xx/include/mach/system.h
+++ b/arch/arm/mach-lpc32xx/include/mach/system.h
@@ -33,9 +33,6 @@ static inline void arch_reset(char mode, const char *cmd)
33 case 'h': 33 case 'h':
34 printk(KERN_CRIT "RESET: Rebooting system\n"); 34 printk(KERN_CRIT "RESET: Rebooting system\n");
35 35
36 /* Disable interrupts */
37 local_irq_disable();
38
39 lpc32xx_watchdog_reset(); 36 lpc32xx_watchdog_reset();
40 break; 37 break;
41 38
diff --git a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
deleted file mode 100644
index 720fa43a60bf..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * arch/arm/mach-lpc32xx/include/mach/vmalloc.h
3 *
4 * Author: Kevin Wells <kevin.wells@nxp.com>
5 *
6 * Copyright (C) 2010 NXP Semiconductors
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#ifndef __ASM_ARCH_VMALLOC_H
20#define __ASM_ARCH_VMALLOC_H
21
22#define VMALLOC_END 0xF0000000UL
23
24#endif
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
index 1a8a25edb1b4..cb0637933a85 100644
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ b/arch/arm/mach-mmp/include/mach/system.h
@@ -19,8 +19,8 @@ static inline void arch_idle(void)
19static inline void arch_reset(char mode, const char *cmd) 19static inline void arch_reset(char mode, const char *cmd)
20{ 20{
21 if (cpu_is_pxa168()) 21 if (cpu_is_pxa168())
22 cpu_reset(0xffff0000); 22 soft_restart(0xffff0000);
23 else 23 else
24 cpu_reset(0); 24 soft_restart(0);
25} 25}
26#endif /* __ASM_MACH_SYSTEM_H */ 26#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-mmp/include/mach/vmalloc.h b/arch/arm/mach-mmp/include/mach/vmalloc.h
deleted file mode 100644
index 1d0bac003ad0..000000000000
--- a/arch/arm/mach-mmp/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 6dc1cbd2a595..ed3598128530 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -99,6 +99,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
99 .map_io = msm8960_map_io, 99 .map_io = msm8960_map_io,
100 .init_irq = msm8960_init_irq, 100 .init_irq = msm8960_init_irq,
101 .timer = &msm_timer, 101 .timer = &msm_timer,
102 .handle_irq = gic_handle_irq,
102 .init_machine = msm8960_sim_init, 103 .init_machine = msm8960_sim_init,
103MACHINE_END 104MACHINE_END
104 105
@@ -108,6 +109,7 @@ MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
108 .map_io = msm8960_map_io, 109 .map_io = msm8960_map_io,
109 .init_irq = msm8960_init_irq, 110 .init_irq = msm8960_init_irq,
110 .timer = &msm_timer, 111 .timer = &msm_timer,
112 .handle_irq = gic_handle_irq,
111 .init_machine = msm8960_rumi3_init, 113 .init_machine = msm8960_rumi3_init,
112MACHINE_END 114MACHINE_END
113 115
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 44bf71688373..0a113424632c 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -108,6 +108,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
108 .reserve = msm8x60_reserve, 108 .reserve = msm8x60_reserve,
109 .map_io = msm8x60_map_io, 109 .map_io = msm8x60_map_io,
110 .init_irq = msm8x60_init_irq, 110 .init_irq = msm8x60_init_irq,
111 .handle_irq = gic_handle_irq,
111 .init_machine = msm8x60_init, 112 .init_machine = msm8x60_init,
112 .timer = &msm_timer, 113 .timer = &msm_timer,
113MACHINE_END 114MACHINE_END
@@ -117,6 +118,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
117 .reserve = msm8x60_reserve, 118 .reserve = msm8x60_reserve,
118 .map_io = msm8x60_map_io, 119 .map_io = msm8x60_map_io,
119 .init_irq = msm8x60_init_irq, 120 .init_irq = msm8x60_init_irq,
121 .handle_irq = gic_handle_irq,
120 .init_machine = msm8x60_init, 122 .init_machine = msm8x60_init,
121 .timer = &msm_timer, 123 .timer = &msm_timer,
122MACHINE_END 124MACHINE_END
@@ -126,6 +128,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
126 .reserve = msm8x60_reserve, 128 .reserve = msm8x60_reserve,
127 .map_io = msm8x60_map_io, 129 .map_io = msm8x60_map_io,
128 .init_irq = msm8x60_init_irq, 130 .init_irq = msm8x60_init_irq,
131 .handle_irq = gic_handle_irq,
129 .init_machine = msm8x60_init, 132 .init_machine = msm8x60_init,
130 .timer = &msm_timer, 133 .timer = &msm_timer,
131MACHINE_END 134MACHINE_END
@@ -135,6 +138,7 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
135 .reserve = msm8x60_reserve, 138 .reserve = msm8x60_reserve,
136 .map_io = msm8x60_map_io, 139 .map_io = msm8x60_map_io,
137 .init_irq = msm8x60_init_irq, 140 .init_irq = msm8x60_init_irq,
141 .handle_irq = gic_handle_irq,
138 .init_machine = msm8x60_init, 142 .init_machine = msm8x60_init,
139 .timer = &msm_timer, 143 .timer = &msm_timer,
140MACHINE_END 144MACHINE_END
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
deleted file mode 100644
index 717076f3ca73..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * Low-level IRQ helper macros
3 *
4 * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/entry-macro-gic.S>
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-vic.S b/arch/arm/mach-msm/include/mach/entry-macro-vic.S
deleted file mode 100644
index 70563ed11b36..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-vic.S
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Author: Brian Swetland <swetland@google.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <mach/msm_iomap.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 @ enable imprecise aborts
23 cpsie a
24 mov \base, #MSM_VIC_BASE
25 .endm
26
27 .macro arch_ret_to_user, tmp1, tmp2
28 .endm
29
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 @ 0xD0 has irq# or old irq# if the irq has been handled
32 @ 0xD4 has irq# or -1 if none pending *but* if you just
33 @ read 0xD4 you never get the first irq for some reason
34 ldr \irqnr, [\base, #0xD0]
35 ldr \irqnr, [\base, #0xD4]
36 cmp \irqnr, #0xffffffff
37 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index b16f082eeb6f..41f7003ef34f 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,8 +16,27 @@
16 * 16 *
17 */ 17 */
18 18
19#if defined(CONFIG_ARM_GIC) 19 .macro disable_fiq
20#include <mach/entry-macro-qgic.S> 20 .endm
21#else 21
22#include <mach/entry-macro-vic.S> 22 .macro arch_ret_to_user, tmp1, tmp2
23 .endm
24
25#if !defined(CONFIG_ARM_GIC)
26#include <mach/msm_iomap.h>
27
28 .macro get_irqnr_preamble, base, tmp
29 @ enable imprecise aborts
30 cpsie a
31 mov \base, #MSM_VIC_BASE
32 .endm
33
34 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
35 @ 0xD0 has irq# or old irq# if the irq has been handled
36 @ 0xD4 has irq# or -1 if none pending *but* if you just
37 @ read 0xD4 you never get the first irq for some reason
38 ldr \irqnr, [\base, #0xD0]
39 ldr \irqnr, [\base, #0xD4]
40 cmp \irqnr, #0xffffffff
41 .endm
23#endif 42#endif
diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h
deleted file mode 100644
index d138448eff16..000000000000
--- a/arch/arm/mach-msm/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* arch/arm/mach-msm/include/mach/vmalloc.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_VMALLOC_H
17#define __ASM_ARCH_MSM_VMALLOC_H
18
19#define VMALLOC_END 0xd0000000UL
20
21#endif
22
diff --git a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h
deleted file mode 100644
index ba26fe98e640..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-mv78xx0/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-mxs/include/mach/vmalloc.h b/arch/arm/mach-mxs/include/mach/vmalloc.h
deleted file mode 100644
index 103b0165ed0b..000000000000
--- a/arch/arm/mach-mxs/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2000 Russell King.
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __MACH_MXS_VMALLOC_H__
17#define __MACH_MXS_VMALLOC_H__
18
19/* vmalloc ending address */
20#define VMALLOC_END 0xf4000000UL
21
22#endif /* __MACH_MXS_VMALLOC_H__ */
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
index 20ec3bddf7cd..cab88364e7c1 100644
--- a/arch/arm/mach-mxs/system.c
+++ b/arch/arm/mach-mxs/system.c
@@ -53,7 +53,7 @@ void arch_reset(char mode, const char *cmd)
53 mdelay(50); 53 mdelay(50);
54 54
55 /* We'll take a jump through zero as a poor second */ 55 /* We'll take a jump through zero as a poor second */
56 cpu_reset(0); 56 soft_restart(0);
57} 57}
58 58
59static int __init mxs_arch_reset_init(void) 59static int __init mxs_arch_reset_init(void)
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S
index 844f1f9acbdf..6e9f1cbe1634 100644
--- a/arch/arm/mach-netx/include/mach/entry-macro.S
+++ b/arch/arm/mach-netx/include/mach/entry-macro.S
@@ -18,22 +18,9 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#include <mach/hardware.h>
22 21
23 .macro disable_fiq 22 .macro disable_fiq
24 .endm 23 .endm
25 24
26 .macro get_irqnr_preamble, base, tmp
27 ldr \base, =io_p2v(0x001ff000)
28 .endm
29
30 .macro arch_ret_to_user, tmp1, tmp2 25 .macro arch_ret_to_user, tmp1, tmp2
31 .endm 26 .endm
32
33 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
34 ldr \irqstat, [\base, #0]
35 clz \irqnr, \irqstat
36 rsb \irqnr, \irqnr, #31
37 cmp \irqstat, #0
38 .endm
39
diff --git a/arch/arm/mach-netx/include/mach/vmalloc.h b/arch/arm/mach-netx/include/mach/vmalloc.h
deleted file mode 100644
index 871f1ef7bff5..000000000000
--- a/arch/arm/mach-netx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-netx/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index 90903dd44cbc..ef8cf3574a02 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -203,6 +204,7 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
203 .atag_offset = 0x100, 204 .atag_offset = 0x100,
204 .map_io = netx_map_io, 205 .map_io = netx_map_io,
205 .init_irq = netx_init_irq, 206 .init_irq = netx_init_irq,
207 .handle_irq = vic_handle_irq,
206 .timer = &netx_timer, 208 .timer = &netx_timer,
207 .init_machine = nxdb500_init, 209 .init_machine = nxdb500_init,
208MACHINE_END 210MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index c63384aba500..588558bdd800 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -96,6 +97,7 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
96 .atag_offset = 0x100, 97 .atag_offset = 0x100,
97 .map_io = netx_map_io, 98 .map_io = netx_map_io,
98 .init_irq = netx_init_irq, 99 .init_irq = netx_init_irq,
100 .handle_irq = vic_handle_irq,
99 .timer = &netx_timer, 101 .timer = &netx_timer,
100 .init_machine = nxdkn_init, 102 .init_machine = nxdkn_init,
101MACHINE_END 103MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index 8f548ec83ad2..cfcbb5038648 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -180,6 +181,7 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
180 .atag_offset = 0x100, 181 .atag_offset = 0x100,
181 .map_io = netx_map_io, 182 .map_io = netx_map_io,
182 .init_irq = netx_init_irq, 183 .init_irq = netx_init_irq,
184 .handle_irq = vic_handle_irq,
183 .timer = &netx_timer, 185 .timer = &netx_timer,
184 .init_machine = nxeb500hmi_init, 186 .init_machine = nxeb500hmi_init,
185MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 0cbb74c96ef7..f98259c050ee 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -21,6 +21,7 @@
21#include <linux/mtd/onenand.h> 21#include <linux/mtd/onenand.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/hardware/vic.h>
24#include <asm/sizes.h> 25#include <asm/sizes.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
26#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -280,6 +281,7 @@ MACHINE_START(NOMADIK, "NHK8815")
280 .atag_offset = 0x100, 281 .atag_offset = 0x100,
281 .map_io = cpu8815_map_io, 282 .map_io = cpu8815_map_io,
282 .init_irq = cpu8815_init_irq, 283 .init_irq = cpu8815_init_irq,
284 .handle_irq = vic_handle_irq,
283 .timer = &nomadik_timer, 285 .timer = &nomadik_timer,
284 .init_machine = nhk8815_platform_init, 286 .init_machine = nhk8815_platform_init,
285MACHINE_END 287MACHINE_END
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S
index 49f1aa3bb420..98ea1c1fbbab 100644
--- a/arch/arm/mach-nomadik/include/mach/entry-macro.S
+++ b/arch/arm/mach-nomadik/include/mach/entry-macro.S
@@ -6,38 +6,8 @@
6 * warranty of any kind, whether express or implied. 6 * warranty of any kind, whether express or implied.
7 */ 7 */
8 8
9#include <mach/hardware.h>
10#include <mach/irqs.h>
11
12 .macro disable_fiq 9 .macro disable_fiq
13 .endm 10 .endm
14 11
15 .macro get_irqnr_preamble, base, tmp
16 ldr \base, =IO_ADDRESS(NOMADIK_IC_BASE)
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2 12 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 13 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23
24 /* This stanza gets the irq mask from one of two status registers */
25 mov \irqnr, #0
26 ldr \irqstat, [\base, #VIC_REG_IRQSR0] @ get masked status
27 cmp \irqstat, #0
28 bne 1001f
29 add \irqnr, \irqnr, #32
30 ldr \irqstat, [\base, #VIC_REG_IRQSR1] @ get masked status
31
321001: tst \irqstat, #15
33 bne 1002f
34 add \irqnr, \irqnr, #4
35 movs \irqstat, \irqstat, lsr #4
36 bne 1001b
371002: tst \irqstat, #1
38 bne 1003f
39 add \irqnr, \irqnr, #1
40 movs \irqstat, \irqstat, lsr #1
41 bne 1002b
421003: /* EQ will be set if no irqs pending */
43 .endm
diff --git a/arch/arm/mach-nomadik/include/mach/vmalloc.h b/arch/arm/mach-nomadik/include/mach/vmalloc.h
deleted file mode 100644
index f83d574d9445..000000000000
--- a/arch/arm/mach-nomadik/include/mach/vmalloc.h
+++ /dev/null
@@ -1,2 +0,0 @@
1
2#define VMALLOC_END 0xe8000000UL
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index b0f15d234a12..af7911963c0d 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -35,7 +35,7 @@
35#include <plat/mux.h> 35#include <plat/mux.h>
36#include <plat/usb.h> 36#include <plat/usb.h>
37#include <plat/board.h> 37#include <plat/board.h>
38#include <plat/common.h> 38#include "common.h"
39#include <mach/camera.h> 39#include <mach/camera.h>
40 40
41#include <mach/ams-delta-fiq.h> 41#include <mach/ams-delta-fiq.h>
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 23178275f96b..b9c4c0f933ee 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -32,7 +32,7 @@
32#include <plat/flash.h> 32#include <plat/flash.h>
33#include <plat/fpga.h> 33#include <plat/fpga.h>
34#include <plat/keypad.h> 34#include <plat/keypad.h>
35#include <plat/common.h> 35#include "common.h"
36#include <plat/board.h> 36#include <plat/board.h>
37 37
38/* fsample is pretty close to p2-sample */ 38/* fsample is pretty close to p2-sample */
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index dc5b75de531c..7f41d7a504a5 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -25,7 +25,7 @@
25#include <plat/mux.h> 25#include <plat/mux.h>
26#include <plat/usb.h> 26#include <plat/usb.h>
27#include <plat/board.h> 27#include <plat/board.h>
28#include <plat/common.h> 28#include "common.h"
29 29
30/* assume no Mini-AB port */ 30/* assume no Mini-AB port */
31 31
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index b334b1481678..7933b97698f8 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -43,7 +43,7 @@
43#include <plat/irda.h> 43#include <plat/irda.h>
44#include <plat/usb.h> 44#include <plat/usb.h>
45#include <plat/keypad.h> 45#include <plat/keypad.h>
46#include <plat/common.h> 46#include "common.h"
47#include <plat/flash.h> 47#include <plat/flash.h>
48 48
49#include "board-h2.h" 49#include "board-h2.h"
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 74ebe72c9848..04be2f83ca09 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -45,7 +45,7 @@
45#include <plat/usb.h> 45#include <plat/usb.h>
46#include <plat/keypad.h> 46#include <plat/keypad.h>
47#include <plat/dma.h> 47#include <plat/dma.h>
48#include <plat/common.h> 48#include "common.h"
49#include <plat/flash.h> 49#include <plat/flash.h>
50 50
51#include "board-h3.h" 51#include "board-h3.h"
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 3e91baab1a89..46fcfeb1f11e 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -41,7 +41,7 @@
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42 42
43#include <plat/omap7xx.h> 43#include <plat/omap7xx.h>
44#include <plat/common.h> 44#include "common.h"
45#include <plat/board.h> 45#include <plat/board.h>
46#include <plat/keypad.h> 46#include <plat/keypad.h>
47#include <plat/usb.h> 47#include <plat/usb.h>
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 273153dba15b..f99d11de1531 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -37,7 +37,7 @@
37#include <plat/tc.h> 37#include <plat/tc.h>
38#include <plat/usb.h> 38#include <plat/usb.h>
39#include <plat/keypad.h> 39#include <plat/keypad.h>
40#include <plat/common.h> 40#include "common.h"
41#include <plat/mmc.h> 41#include <plat/mmc.h>
42 42
43/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 43/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 6798b8488315..c64342388ec3 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -30,7 +30,7 @@
30#include <plat/usb.h> 30#include <plat/usb.h>
31#include <plat/board.h> 31#include <plat/board.h>
32#include <plat/keypad.h> 32#include <plat/keypad.h>
33#include <plat/common.h> 33#include "common.h"
34#include <plat/hwa742.h> 34#include <plat/hwa742.h>
35#include <plat/lcd_mipid.h> 35#include <plat/lcd_mipid.h>
36#include <plat/mmc.h> 36#include <plat/mmc.h>
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index c3859278d257..a409dfcc5b18 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -51,7 +51,7 @@
51#include <plat/usb.h> 51#include <plat/usb.h>
52#include <plat/mux.h> 52#include <plat/mux.h>
53#include <plat/tc.h> 53#include <plat/tc.h>
54#include <plat/common.h> 54#include "common.h"
55 55
56/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ 56/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
57#define OMAP_OSK_ETHR_START 0x04800300 57#define OMAP_OSK_ETHR_START 0x04800300
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index f9c44cb15b47..105292d39484 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -41,7 +41,7 @@
41#include <plat/board.h> 41#include <plat/board.h>
42#include <plat/irda.h> 42#include <plat/irda.h>
43#include <plat/keypad.h> 43#include <plat/keypad.h>
44#include <plat/common.h> 44#include "common.h"
45 45
46#define PALMTE_USBDETECT_GPIO 0 46#define PALMTE_USBDETECT_GPIO 0
47#define PALMTE_USB_OR_DC_GPIO 1 47#define PALMTE_USB_OR_DC_GPIO 1
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 11a98539f7bb..387a9006358d 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -39,7 +39,7 @@
39#include <plat/board.h> 39#include <plat/board.h>
40#include <plat/irda.h> 40#include <plat/irda.h>
41#include <plat/keypad.h> 41#include <plat/keypad.h>
42#include <plat/common.h> 42#include "common.h"
43 43
44#include <linux/spi/spi.h> 44#include <linux/spi/spi.h>
45#include <linux/spi/ads7846.h> 45#include <linux/spi/ads7846.h>
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 42061573e380..df6d15e68aad 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -41,7 +41,7 @@
41#include <plat/board.h> 41#include <plat/board.h>
42#include <plat/irda.h> 42#include <plat/irda.h>
43#include <plat/keypad.h> 43#include <plat/keypad.h>
44#include <plat/common.h> 44#include "common.h"
45 45
46#include <linux/spi/spi.h> 46#include <linux/spi/spi.h>
47#include <linux/spi/ads7846.h> 47#include <linux/spi/ads7846.h>
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 203ae07550db..57ecd7e09831 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -32,7 +32,7 @@
32#include <plat/fpga.h> 32#include <plat/fpga.h>
33#include <plat/flash.h> 33#include <plat/flash.h>
34#include <plat/keypad.h> 34#include <plat/keypad.h>
35#include <plat/common.h> 35#include "common.h"
36#include <plat/board.h> 36#include <plat/board.h>
37 37
38static const unsigned int p2_keymap[] = { 38static const unsigned int p2_keymap[] = {
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 092a4c046407..774ae39fd636 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -40,7 +40,7 @@
40#include <plat/usb.h> 40#include <plat/usb.h>
41#include <plat/tc.h> 41#include <plat/tc.h>
42#include <plat/board.h> 42#include <plat/board.h>
43#include <plat/common.h> 43#include "common.h"
44#include <plat/keypad.h> 44#include <plat/keypad.h>
45#include <plat/board-sx1.h> 45#include <plat/board-sx1.h>
46 46
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 61ed6cdab2bd..7721c146d8d6 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -34,7 +34,7 @@
34#include <asm/mach/map.h> 34#include <asm/mach/map.h>
35 35
36#include <plat/board-voiceblue.h> 36#include <plat/board-voiceblue.h>
37#include <plat/common.h> 37#include "common.h"
38#include <plat/flash.h> 38#include <plat/flash.h>
39#include <plat/mux.h> 39#include <plat/mux.h>
40#include <plat/tc.h> 40#include <plat/tc.h>
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
new file mode 100644
index 000000000000..52c4eda97fa8
--- /dev/null
+++ b/arch/arm/mach-omap1/common.h
@@ -0,0 +1,61 @@
1/*
2 *
3 * Header for code common to all OMAP1 machines.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
27#define __ARCH_ARM_MACH_OMAP1_COMMON_H
28
29#include <plat/common.h>
30
31#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
32void omap7xx_map_io(void);
33#else
34static inline void omap7xx_map_io(void)
35{
36}
37#endif
38
39#ifdef CONFIG_ARCH_OMAP15XX
40void omap15xx_map_io(void);
41#else
42static inline void omap15xx_map_io(void)
43{
44}
45#endif
46
47#ifdef CONFIG_ARCH_OMAP16XX
48void omap16xx_map_io(void);
49#else
50static inline void omap16xx_map_io(void)
51{
52}
53#endif
54
55void omap1_init_early(void);
56void omap1_init_irq(void);
57
58extern struct sys_timer omap1_timer;
59extern bool omap_32k_timer_init(void);
60
61#endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 475cb2f50d87..1d76a63c0983 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -22,7 +22,7 @@
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach/map.h> 23#include <asm/mach/map.h>
24 24
25#include <plat/common.h> 25#include "common.h"
26#include <plat/tc.h> 26#include <plat/tc.h>
27#include <plat/board.h> 27#include <plat/board.h>
28#include <plat/mux.h> 28#include <plat/mux.h>
diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h
deleted file mode 100644
index 22ec4a479577..000000000000
--- a/arch/arm/mach-omap1/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-omap1/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xd8000000UL
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 7969cfda4454..8e55b6fb3478 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -121,7 +121,6 @@ void __init omap16xx_map_io(void)
121void omap1_init_early(void) 121void omap1_init_early(void)
122{ 122{
123 omap_check_revision(); 123 omap_check_revision();
124 omap_ioremap_init();
125 124
126 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort 125 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
127 * on a Posted Write in the TIPB Bridge". 126 * on a Posted Write in the TIPB Bridge".
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index a1837771e031..485a21d31004 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -54,7 +54,7 @@
54#include <asm/mach/irq.h> 54#include <asm/mach/irq.h>
55#include <asm/mach/time.h> 55#include <asm/mach/time.h>
56 56
57#include <plat/common.h> 57#include "common.h"
58 58
59#ifdef CONFIG_OMAP_MPU_TIMER 59#ifdef CONFIG_OMAP_MPU_TIMER
60 60
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 96604a50c4fe..9a54ef4dcf5e 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,7 +52,7 @@
52#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/mach/irq.h> 53#include <asm/mach/irq.h>
54#include <asm/mach/time.h> 54#include <asm/mach/time.h>
55#include <plat/common.h> 55#include "common.h"
56#include <plat/dmtimer.h> 56#include <plat/dmtimer.h>
57 57
58/* 58/*
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index e1293aa513d3..5ca19d717b3f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -25,6 +25,7 @@ config ARCH_OMAP2
25 depends on ARCH_OMAP2PLUS 25 depends on ARCH_OMAP2PLUS
26 default y 26 default y
27 select CPU_V6 27 select CPU_V6
28 select MULTI_IRQ_HANDLER
28 29
29config ARCH_OMAP3 30config ARCH_OMAP3
30 bool "TI OMAP3" 31 bool "TI OMAP3"
@@ -36,6 +37,7 @@ config ARCH_OMAP3
36 select ARCH_HAS_OPP 37 select ARCH_HAS_OPP
37 select PM_OPP if PM 38 select PM_OPP if PM
38 select ARM_CPU_SUSPEND if PM 39 select ARM_CPU_SUSPEND if PM
40 select MULTI_IRQ_HANDLER
39 41
40config ARCH_OMAP4 42config ARCH_OMAP4
41 bool "TI OMAP4" 43 bool "TI OMAP4"
@@ -74,8 +76,13 @@ config SOC_OMAP3430
74 default y 76 default y
75 select ARCH_OMAP_OTG 77 select ARCH_OMAP_OTG
76 78
77config SOC_OMAPTI816X 79config SOC_OMAPTI81XX
78 bool "TI816X support" 80 bool "TI81XX support"
81 depends on ARCH_OMAP3
82 default y
83
84config SOC_OMAPAM33XX
85 bool "AM33XX support"
79 depends on ARCH_OMAP3 86 depends on ARCH_OMAP3
80 default y 87 default y
81 88
@@ -312,7 +319,12 @@ config MACH_OMAP_3630SDP
312 319
313config MACH_TI8168EVM 320config MACH_TI8168EVM
314 bool "TI8168 Evaluation Module" 321 bool "TI8168 Evaluation Module"
315 depends on SOC_OMAPTI816X 322 depends on SOC_OMAPTI81XX
323 default y
324
325config MACH_TI8148EVM
326 bool "TI8148 Evaluation Module"
327 depends on SOC_OMAPTI81XX
316 default y 328 default y
317 329
318config MACH_OMAP_4430SDP 330config MACH_OMAP_4430SDP
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b009f17dee56..6d226a76d057 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -232,6 +232,7 @@ obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
232 232
233obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o 233obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o
234obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o 234obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
235obj-$(CONFIG_MACH_TI8148EVM) += board-ti8168evm.o
235 236
236# Platform specific device init code 237# Platform specific device init code
237 238
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index d704f0ac328d..d88143faca59 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -34,7 +34,7 @@
34#include <asm/mach/map.h> 34#include <asm/mach/map.h>
35 35
36#include <plat/board.h> 36#include <plat/board.h>
37#include <plat/common.h> 37#include "common.h"
38#include <plat/gpmc.h> 38#include <plat/gpmc.h>
39#include <plat/usb.h> 39#include <plat/usb.h>
40#include <plat/gpmc-smc91x.h> 40#include <plat/gpmc-smc91x.h>
@@ -301,6 +301,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
301 .map_io = omap243x_map_io, 301 .map_io = omap243x_map_io,
302 .init_early = omap2430_init_early, 302 .init_early = omap2430_init_early,
303 .init_irq = omap2_init_irq, 303 .init_irq = omap2_init_irq,
304 .handle_irq = omap2_intc_handle_irq,
304 .init_machine = omap_2430sdp_init, 305 .init_machine = omap_2430sdp_init,
305 .timer = &omap2_timer, 306 .timer = &omap2_timer,
306MACHINE_END 307MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 77142c13fa13..83126368ed99 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -33,7 +33,7 @@
33#include <plat/mcspi.h> 33#include <plat/mcspi.h>
34#include <plat/board.h> 34#include <plat/board.h>
35#include <plat/usb.h> 35#include <plat/usb.h>
36#include <plat/common.h> 36#include "common.h"
37#include <plat/dma.h> 37#include <plat/dma.h>
38#include <plat/gpmc.h> 38#include <plat/gpmc.h>
39#include <video/omapdss.h> 39#include <video/omapdss.h>
@@ -728,6 +728,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
728 .map_io = omap3_map_io, 728 .map_io = omap3_map_io,
729 .init_early = omap3430_init_early, 729 .init_early = omap3430_init_early,
730 .init_irq = omap3_init_irq, 730 .init_irq = omap3_init_irq,
731 .handle_irq = omap3_intc_handle_irq,
731 .init_machine = omap_3430sdp_init, 732 .init_machine = omap_3430sdp_init,
732 .timer = &omap3_timer, 733 .timer = &omap3_timer,
733MACHINE_END 734MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index f552305162fc..7969dd904bd3 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -16,7 +16,7 @@
16#include <asm/mach-types.h> 16#include <asm/mach-types.h>
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18 18
19#include <plat/common.h> 19#include "common.h"
20#include <plat/board.h> 20#include <plat/board.h>
21#include <plat/gpmc-smc91x.h> 21#include <plat/gpmc-smc91x.h>
22#include <plat/usb.h> 22#include <plat/usb.h>
@@ -215,6 +215,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
215 .map_io = omap3_map_io, 215 .map_io = omap3_map_io,
216 .init_early = omap3630_init_early, 216 .init_early = omap3630_init_early,
217 .init_irq = omap3_init_irq, 217 .init_irq = omap3_init_irq,
218 .handle_irq = omap3_intc_handle_irq,
218 .init_machine = omap_sdp_init, 219 .init_machine = omap_sdp_init,
219 .timer = &omap3_timer, 220 .timer = &omap3_timer,
220MACHINE_END 221MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 515646886b59..b5d9c6fe012f 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -27,13 +27,13 @@
27#include <linux/leds_pwm.h> 27#include <linux/leds_pwm.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/omap4-common.h> 30#include <asm/hardware/gic.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34 34
35#include <plat/board.h> 35#include <plat/board.h>
36#include <plat/common.h> 36#include "common.h"
37#include <plat/usb.h> 37#include <plat/usb.h>
38#include <plat/mmc.h> 38#include <plat/mmc.h>
39#include <plat/omap4-keypad.h> 39#include <plat/omap4-keypad.h>
@@ -372,11 +372,17 @@ static struct platform_device sdp4430_vbat = {
372 }, 372 },
373}; 373};
374 374
375static struct platform_device sdp4430_dmic_codec = {
376 .name = "dmic-codec",
377 .id = -1,
378};
379
375static struct platform_device *sdp4430_devices[] __initdata = { 380static struct platform_device *sdp4430_devices[] __initdata = {
376 &sdp4430_gpio_keys_device, 381 &sdp4430_gpio_keys_device,
377 &sdp4430_leds_gpio, 382 &sdp4430_leds_gpio,
378 &sdp4430_leds_pwm, 383 &sdp4430_leds_pwm,
379 &sdp4430_vbat, 384 &sdp4430_vbat,
385 &sdp4430_dmic_codec,
380}; 386};
381 387
382static struct omap_musb_board_data musb_board_data = { 388static struct omap_musb_board_data musb_board_data = {
@@ -984,6 +990,7 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
984 .map_io = omap4_map_io, 990 .map_io = omap4_map_io,
985 .init_early = omap4430_init_early, 991 .init_early = omap4430_init_early,
986 .init_irq = gic_init_irq, 992 .init_irq = gic_init_irq,
993 .handle_irq = gic_handle_irq,
987 .init_machine = omap_4430sdp_init, 994 .init_machine = omap_4430sdp_init,
988 .timer = &omap4_timer, 995 .timer = &omap4_timer,
989MACHINE_END 996MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 7834536ab416..7e90f93263db 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -27,7 +27,7 @@
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28 28
29#include <plat/board.h> 29#include <plat/board.h>
30#include <plat/common.h> 30#include "common.h"
31#include <plat/usb.h> 31#include <plat/usb.h>
32 32
33#include "mux.h" 33#include "mux.h"
@@ -98,6 +98,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
98 .map_io = omap3_map_io, 98 .map_io = omap3_map_io,
99 .init_early = am35xx_init_early, 99 .init_early = am35xx_init_early,
100 .init_irq = omap3_init_irq, 100 .init_irq = omap3_init_irq,
101 .handle_irq = omap3_intc_handle_irq,
101 .init_machine = am3517_crane_init, 102 .init_machine = am3517_crane_init,
102 .timer = &omap3_timer, 103 .timer = &omap3_timer,
103MACHINE_END 104MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index d314f033c9df..551cae8d9b8a 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -32,7 +32,7 @@
32#include <asm/mach/map.h> 32#include <asm/mach/map.h>
33 33
34#include <plat/board.h> 34#include <plat/board.h>
35#include <plat/common.h> 35#include "common.h"
36#include <plat/usb.h> 36#include <plat/usb.h>
37#include <video/omapdss.h> 37#include <video/omapdss.h>
38#include <video/omap-panel-generic-dpi.h> 38#include <video/omap-panel-generic-dpi.h>
@@ -491,6 +491,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
491 .map_io = omap3_map_io, 491 .map_io = omap3_map_io,
492 .init_early = am35xx_init_early, 492 .init_early = am35xx_init_early,
493 .init_irq = omap3_init_irq, 493 .init_irq = omap3_init_irq,
494 .handle_irq = omap3_intc_handle_irq,
494 .init_machine = am3517_evm_init, 495 .init_machine = am3517_evm_init,
495 .timer = &omap3_timer, 496 .timer = &omap3_timer,
496MACHINE_END 497MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index de8134b7f580..5a66480feed0 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -37,7 +37,7 @@
37#include <plat/led.h> 37#include <plat/led.h>
38#include <plat/usb.h> 38#include <plat/usb.h>
39#include <plat/board.h> 39#include <plat/board.h>
40#include <plat/common.h> 40#include "common.h"
41#include <plat/gpmc.h> 41#include <plat/gpmc.h>
42 42
43#include <video/omapdss.h> 43#include <video/omapdss.h>
@@ -354,6 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
354 .map_io = omap242x_map_io, 354 .map_io = omap242x_map_io,
355 .init_early = omap2420_init_early, 355 .init_early = omap2420_init_early,
356 .init_irq = omap2_init_irq, 356 .init_irq = omap2_init_irq,
357 .handle_irq = omap2_intc_handle_irq,
357 .init_machine = omap_apollon_init, 358 .init_machine = omap_apollon_init,
358 .timer = &omap2_timer, 359 .timer = &omap2_timer,
359MACHINE_END 360MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index bd1bcacb40f9..b38cd7b240e8 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -37,7 +37,7 @@
37#include <asm/mach/map.h> 37#include <asm/mach/map.h>
38 38
39#include <plat/board.h> 39#include <plat/board.h>
40#include <plat/common.h> 40#include "common.h"
41#include <plat/nand.h> 41#include <plat/nand.h>
42#include <plat/gpmc.h> 42#include <plat/gpmc.h>
43#include <plat/usb.h> 43#include <plat/usb.h>
@@ -53,7 +53,8 @@
53#include "hsmmc.h" 53#include "hsmmc.h"
54#include "common-board-devices.h" 54#include "common-board-devices.h"
55 55
56#define CM_T35_GPIO_PENDOWN 57 56#define CM_T35_GPIO_PENDOWN 57
57#define SB_T35_USB_HUB_RESET_GPIO 167
57 58
58#define CM_T35_SMSC911X_CS 5 59#define CM_T35_SMSC911X_CS 5
59#define CM_T35_SMSC911X_GPIO 163 60#define CM_T35_SMSC911X_GPIO 163
@@ -339,8 +340,10 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
339 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), 340 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
340}; 341};
341 342
342static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { 343static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
343 REGULATOR_SUPPLY("vdvi", "omapdss"), 344 REGULATOR_SUPPLY("vcc", "spi1.0"),
345 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
346 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
344}; 347};
345 348
346/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 349/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -373,6 +376,19 @@ static struct regulator_init_data cm_t35_vsim = {
373 .consumer_supplies = cm_t35_vsim_supply, 376 .consumer_supplies = cm_t35_vsim_supply,
374}; 377};
375 378
379static struct regulator_init_data cm_t35_vio = {
380 .constraints = {
381 .min_uV = 1800000,
382 .max_uV = 1800000,
383 .apply_uV = true,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL
385 | REGULATOR_MODE_STANDBY,
386 .valid_ops_mask = REGULATOR_CHANGE_MODE,
387 },
388 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
389 .consumer_supplies = cm_t35_vio_supplies,
390};
391
376static uint32_t cm_t35_keymap[] = { 392static uint32_t cm_t35_keymap[] = {
377 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), 393 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
378 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), 394 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
@@ -421,6 +437,23 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = {
421 .reset_gpio_port[2] = -EINVAL 437 .reset_gpio_port[2] = -EINVAL
422}; 438};
423 439
440static void cm_t35_init_usbh(void)
441{
442 int err;
443
444 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
445 GPIOF_OUT_INIT_LOW, "usb hub rst");
446 if (err) {
447 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
448 } else {
449 udelay(10);
450 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
451 msleep(1);
452 }
453
454 usbhs_init(&usbhs_bdata);
455}
456
424static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, 457static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
425 unsigned ngpio) 458 unsigned ngpio)
426{ 459{
@@ -456,17 +489,14 @@ static struct twl4030_platform_data cm_t35_twldata = {
456 .gpio = &cm_t35_gpio_data, 489 .gpio = &cm_t35_gpio_data,
457 .vmmc1 = &cm_t35_vmmc1, 490 .vmmc1 = &cm_t35_vmmc1,
458 .vsim = &cm_t35_vsim, 491 .vsim = &cm_t35_vsim,
492 .vio = &cm_t35_vio,
459}; 493};
460 494
461static void __init cm_t35_init_i2c(void) 495static void __init cm_t35_init_i2c(void)
462{ 496{
463 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 497 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
464 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); 498 TWL_COMMON_REGULATOR_VDAC |
465 499 TWL_COMMON_PDATA_AUDIO);
466 cm_t35_twldata.vpll2->constraints.name = "VDVI";
467 cm_t35_twldata.vpll2->num_consumer_supplies =
468 ARRAY_SIZE(cm_t35_vdvi_supply);
469 cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
470 500
471 omap3_pmic_init("tps65930", &cm_t35_twldata); 501 omap3_pmic_init("tps65930", &cm_t35_twldata);
472} 502}
@@ -570,24 +600,28 @@ static void __init cm_t3x_common_dss_mux_init(int mux_mode)
570 600
571static void __init cm_t35_init_mux(void) 601static void __init cm_t35_init_mux(void)
572{ 602{
573 omap_mux_init_signal("gpio_70", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 603 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
574 omap_mux_init_signal("gpio_71", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 604
575 omap_mux_init_signal("gpio_72", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 605 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
576 omap_mux_init_signal("gpio_73", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 606 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
577 omap_mux_init_signal("gpio_74", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 607 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
578 omap_mux_init_signal("gpio_75", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 608 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
579 cm_t3x_common_dss_mux_init(OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 609 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
610 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
611 cm_t3x_common_dss_mux_init(mux_mode);
580} 612}
581 613
582static void __init cm_t3730_init_mux(void) 614static void __init cm_t3730_init_mux(void)
583{ 615{
584 omap_mux_init_signal("sys_boot0", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 616 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
585 omap_mux_init_signal("sys_boot1", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 617
586 omap_mux_init_signal("sys_boot3", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 618 omap_mux_init_signal("sys_boot0", mux_mode);
587 omap_mux_init_signal("sys_boot4", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 619 omap_mux_init_signal("sys_boot1", mux_mode);
588 omap_mux_init_signal("sys_boot5", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 620 omap_mux_init_signal("sys_boot3", mux_mode);
589 omap_mux_init_signal("sys_boot6", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 621 omap_mux_init_signal("sys_boot4", mux_mode);
590 cm_t3x_common_dss_mux_init(OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 622 omap_mux_init_signal("sys_boot5", mux_mode);
623 omap_mux_init_signal("sys_boot6", mux_mode);
624 cm_t3x_common_dss_mux_init(mux_mode);
591} 625}
592#else 626#else
593static inline void cm_t35_init_mux(void) {} 627static inline void cm_t35_init_mux(void) {}
@@ -612,7 +646,7 @@ static void __init cm_t3x_common_init(void)
612 cm_t35_init_display(); 646 cm_t35_init_display();
613 647
614 usb_musb_init(NULL); 648 usb_musb_init(NULL);
615 usbhs_init(&usbhs_bdata); 649 cm_t35_init_usbh();
616} 650}
617 651
618static void __init cm_t35_init(void) 652static void __init cm_t35_init(void)
@@ -634,6 +668,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
634 .map_io = omap3_map_io, 668 .map_io = omap3_map_io,
635 .init_early = omap35xx_init_early, 669 .init_early = omap35xx_init_early,
636 .init_irq = omap3_init_irq, 670 .init_irq = omap3_init_irq,
671 .handle_irq = omap3_intc_handle_irq,
637 .init_machine = cm_t35_init, 672 .init_machine = cm_t35_init,
638 .timer = &omap3_timer, 673 .timer = &omap3_timer,
639MACHINE_END 674MACHINE_END
@@ -644,6 +679,7 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
644 .map_io = omap3_map_io, 679 .map_io = omap3_map_io,
645 .init_early = omap3630_init_early, 680 .init_early = omap3630_init_early,
646 .init_irq = omap3_init_irq, 681 .init_irq = omap3_init_irq,
682 .handle_irq = omap3_intc_handle_irq,
647 .init_machine = cm_t3730_init, 683 .init_machine = cm_t3730_init,
648 .timer = &omap3_timer, 684 .timer = &omap3_timer,
649MACHINE_END 685MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 3f4dc6626845..efc5cedb1fbb 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -39,7 +39,7 @@
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40 40
41#include <plat/board.h> 41#include <plat/board.h>
42#include <plat/common.h> 42#include "common.h"
43#include <plat/usb.h> 43#include <plat/usb.h>
44#include <plat/nand.h> 44#include <plat/nand.h>
45#include <plat/gpmc.h> 45#include <plat/gpmc.h>
@@ -299,6 +299,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
299 .map_io = omap3_map_io, 299 .map_io = omap3_map_io,
300 .init_early = am35xx_init_early, 300 .init_early = am35xx_init_early,
301 .init_irq = omap3_init_irq, 301 .init_irq = omap3_init_irq,
302 .handle_irq = omap3_intc_handle_irq,
302 .init_machine = cm_t3517_init, 303 .init_machine = cm_t3517_init,
303 .timer = &omap3_timer, 304 .timer = &omap3_timer,
304MACHINE_END 305MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 90154e411da0..d81ea7fa75ef 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -41,7 +41,7 @@
41#include <asm/mach/flash.h> 41#include <asm/mach/flash.h>
42 42
43#include <plat/board.h> 43#include <plat/board.h>
44#include <plat/common.h> 44#include "common.h"
45#include <plat/gpmc.h> 45#include <plat/gpmc.h>
46#include <plat/nand.h> 46#include <plat/nand.h>
47#include <plat/usb.h> 47#include <plat/usb.h>
@@ -660,6 +660,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
660 .map_io = omap3_map_io, 660 .map_io = omap3_map_io,
661 .init_early = omap35xx_init_early, 661 .init_early = omap35xx_init_early,
662 .init_irq = omap3_init_irq, 662 .init_irq = omap3_init_irq,
663 .handle_irq = omap3_intc_handle_irq,
663 .init_machine = devkit8000_init, 664 .init_machine = devkit8000_init,
664 .timer = &omap3_secure_timer, 665 .timer = &omap3_secure_timer,
665MACHINE_END 666MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index fb55fa3dad5a..63b54163b993 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -20,8 +20,7 @@
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21 21
22#include <plat/board.h> 22#include <plat/board.h>
23#include <plat/common.h> 23#include "common.h"
24#include <mach/omap4-common.h>
25#include "common-board-devices.h" 24#include "common-board-devices.h"
26 25
27/* 26/*
@@ -122,6 +121,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
122 .map_io = omap243x_map_io, 121 .map_io = omap243x_map_io,
123 .init_early = omap2430_init_early, 122 .init_early = omap2430_init_early,
124 .init_irq = omap2_init_irq, 123 .init_irq = omap2_init_irq,
124 .handle_irq = omap2_intc_handle_irq,
125 .init_machine = omap_generic_init, 125 .init_machine = omap_generic_init,
126 .timer = &omap2_timer, 126 .timer = &omap2_timer,
127 .dt_compat = omap243x_boards_compat, 127 .dt_compat = omap243x_boards_compat,
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 8b351d92a1cc..ec4018362e8e 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -34,7 +34,7 @@
34 34
35#include <plat/usb.h> 35#include <plat/usb.h>
36#include <plat/board.h> 36#include <plat/board.h>
37#include <plat/common.h> 37#include "common.h"
38#include <plat/menelaus.h> 38#include <plat/menelaus.h>
39#include <plat/dma.h> 39#include <plat/dma.h>
40#include <plat/gpmc.h> 40#include <plat/gpmc.h>
@@ -396,6 +396,7 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
396 .map_io = omap242x_map_io, 396 .map_io = omap242x_map_io,
397 .init_early = omap2420_init_early, 397 .init_early = omap2420_init_early,
398 .init_irq = omap2_init_irq, 398 .init_irq = omap2_init_irq,
399 .handle_irq = omap2_intc_handle_irq,
399 .init_machine = omap_h4_init, 400 .init_machine = omap_h4_init,
400 .timer = &omap2_timer, 401 .timer = &omap2_timer,
401MACHINE_END 402MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index d0a3f78a9b69..5949f6ae3edf 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -28,7 +28,7 @@
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29 29
30#include <plat/board.h> 30#include <plat/board.h>
31#include <plat/common.h> 31#include "common.h"
32#include <plat/gpmc.h> 32#include <plat/gpmc.h>
33#include <plat/usb.h> 33#include <plat/usb.h>
34#include <video/omapdss.h> 34#include <video/omapdss.h>
@@ -672,6 +672,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
672 .map_io = omap3_map_io, 672 .map_io = omap3_map_io,
673 .init_early = omap35xx_init_early, 673 .init_early = omap35xx_init_early,
674 .init_irq = omap3_init_irq, 674 .init_irq = omap3_init_irq,
675 .handle_irq = omap3_intc_handle_irq,
675 .init_machine = igep_init, 676 .init_machine = igep_init,
676 .timer = &omap3_timer, 677 .timer = &omap3_timer,
677MACHINE_END 678MACHINE_END
@@ -682,6 +683,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
682 .map_io = omap3_map_io, 683 .map_io = omap3_map_io,
683 .init_early = omap35xx_init_early, 684 .init_early = omap35xx_init_early,
684 .init_irq = omap3_init_irq, 685 .init_irq = omap3_init_irq,
686 .handle_irq = omap3_intc_handle_irq,
685 .init_machine = igep_init, 687 .init_machine = igep_init,
686 .timer = &omap3_timer, 688 .timer = &omap3_timer,
687MACHINE_END 689MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index e179da0c4da5..13bde0e66934 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -36,7 +36,7 @@
36 36
37#include <plat/mcspi.h> 37#include <plat/mcspi.h>
38#include <plat/board.h> 38#include <plat/board.h>
39#include <plat/common.h> 39#include "common.h"
40#include <plat/gpmc.h> 40#include <plat/gpmc.h>
41#include <mach/board-zoom.h> 41#include <mach/board-zoom.h>
42 42
@@ -434,6 +434,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
434 .map_io = omap3_map_io, 434 .map_io = omap3_map_io,
435 .init_early = omap3430_init_early, 435 .init_early = omap3430_init_early,
436 .init_irq = omap3_init_irq, 436 .init_irq = omap3_init_irq,
437 .handle_irq = omap3_intc_handle_irq,
437 .init_machine = omap_ldp_init, 438 .init_machine = omap_ldp_init,
438 .timer = &omap3_timer, 439 .timer = &omap3_timer,
439MACHINE_END 440MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index e9d5f4a3d064..bebd3d84365e 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -26,7 +26,7 @@
26#include <asm/mach-types.h> 26#include <asm/mach-types.h>
27 27
28#include <plat/board.h> 28#include <plat/board.h>
29#include <plat/common.h> 29#include "common.h"
30#include <plat/menelaus.h> 30#include <plat/menelaus.h>
31#include <mach/irqs.h> 31#include <mach/irqs.h>
32#include <plat/mcspi.h> 32#include <plat/mcspi.h>
@@ -689,6 +689,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
689 .map_io = omap242x_map_io, 689 .map_io = omap242x_map_io,
690 .init_early = omap2420_init_early, 690 .init_early = omap2420_init_early,
691 .init_irq = omap2_init_irq, 691 .init_irq = omap2_init_irq,
692 .handle_irq = omap2_intc_handle_irq,
692 .init_machine = n8x0_init_machine, 693 .init_machine = n8x0_init_machine,
693 .timer = &omap2_timer, 694 .timer = &omap2_timer,
694MACHINE_END 695MACHINE_END
@@ -699,6 +700,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
699 .map_io = omap242x_map_io, 700 .map_io = omap242x_map_io,
700 .init_early = omap2420_init_early, 701 .init_early = omap2420_init_early,
701 .init_irq = omap2_init_irq, 702 .init_irq = omap2_init_irq,
703 .handle_irq = omap2_intc_handle_irq,
702 .init_machine = n8x0_init_machine, 704 .init_machine = n8x0_init_machine,
703 .timer = &omap2_timer, 705 .timer = &omap2_timer,
704MACHINE_END 706MACHINE_END
@@ -709,6 +711,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
709 .map_io = omap242x_map_io, 711 .map_io = omap242x_map_io,
710 .init_early = omap2420_init_early, 712 .init_early = omap2420_init_early,
711 .init_irq = omap2_init_irq, 713 .init_irq = omap2_init_irq,
714 .handle_irq = omap2_intc_handle_irq,
712 .init_machine = n8x0_init_machine, 715 .init_machine = n8x0_init_machine,
713 .timer = &omap2_timer, 716 .timer = &omap2_timer,
714MACHINE_END 717MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 4a71cb7e42d4..c34f56588284 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -40,7 +40,7 @@
40#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
41 41
42#include <plat/board.h> 42#include <plat/board.h>
43#include <plat/common.h> 43#include "common.h"
44#include <video/omapdss.h> 44#include <video/omapdss.h>
45#include <video/omap-panel-dvi.h> 45#include <video/omap-panel-dvi.h>
46#include <plat/gpmc.h> 46#include <plat/gpmc.h>
@@ -559,6 +559,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
559 .map_io = omap3_map_io, 559 .map_io = omap3_map_io,
560 .init_early = omap3_init_early, 560 .init_early = omap3_init_early,
561 .init_irq = omap3_init_irq, 561 .init_irq = omap3_init_irq,
562 .handle_irq = omap3_intc_handle_irq,
562 .init_machine = omap3_beagle_init, 563 .init_machine = omap3_beagle_init,
563 .timer = &omap3_secure_timer, 564 .timer = &omap3_secure_timer,
564MACHINE_END 565MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index ec00b2ec7022..f11bc444e7be 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -43,7 +43,7 @@
43 43
44#include <plat/board.h> 44#include <plat/board.h>
45#include <plat/usb.h> 45#include <plat/usb.h>
46#include <plat/common.h> 46#include "common.h"
47#include <plat/mcspi.h> 47#include <plat/mcspi.h>
48#include <video/omapdss.h> 48#include <video/omapdss.h>
49#include <video/omap-panel-dvi.h> 49#include <video/omap-panel-dvi.h>
@@ -681,6 +681,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
681 .map_io = omap3_map_io, 681 .map_io = omap3_map_io,
682 .init_early = omap35xx_init_early, 682 .init_early = omap35xx_init_early,
683 .init_irq = omap3_init_irq, 683 .init_irq = omap3_init_irq,
684 .handle_irq = omap3_intc_handle_irq,
684 .init_machine = omap3_evm_init, 685 .init_machine = omap3_evm_init,
685 .timer = &omap3_timer, 686 .timer = &omap3_timer,
686MACHINE_END 687MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 7c0f193f246d..5fa6bad9574e 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -40,7 +40,7 @@
40 40
41#include <plat/mux.h> 41#include <plat/mux.h>
42#include <plat/board.h> 42#include <plat/board.h>
43#include <plat/common.h> 43#include "common.h"
44#include <plat/gpmc-smsc911x.h> 44#include <plat/gpmc-smsc911x.h>
45#include <plat/gpmc.h> 45#include <plat/gpmc.h>
46#include <plat/sdrc.h> 46#include <plat/sdrc.h>
@@ -208,6 +208,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
208 .map_io = omap3_map_io, 208 .map_io = omap3_map_io,
209 .init_early = omap35xx_init_early, 209 .init_early = omap35xx_init_early,
210 .init_irq = omap3_init_irq, 210 .init_irq = omap3_init_irq,
211 .handle_irq = omap3_intc_handle_irq,
211 .init_machine = omap3logic_init, 212 .init_machine = omap3logic_init,
212 .timer = &omap3_timer, 213 .timer = &omap3_timer,
213MACHINE_END 214MACHINE_END
@@ -217,6 +218,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
217 .map_io = omap3_map_io, 218 .map_io = omap3_map_io,
218 .init_early = omap35xx_init_early, 219 .init_early = omap35xx_init_early,
219 .init_irq = omap3_init_irq, 220 .init_irq = omap3_init_irq,
221 .handle_irq = omap3_intc_handle_irq,
220 .init_machine = omap3logic_init, 222 .init_machine = omap3logic_init,
221 .timer = &omap3_timer, 223 .timer = &omap3_timer,
222MACHINE_END 224MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index f7811f4cfc3d..ef315c585b75 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -41,7 +41,7 @@
41#include <asm/mach/map.h> 41#include <asm/mach/map.h>
42 42
43#include <plat/board.h> 43#include <plat/board.h>
44#include <plat/common.h> 44#include "common.h"
45#include <mach/hardware.h> 45#include <mach/hardware.h>
46#include <plat/mcspi.h> 46#include <plat/mcspi.h>
47#include <plat/usb.h> 47#include <plat/usb.h>
@@ -606,6 +606,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
606 .map_io = omap3_map_io, 606 .map_io = omap3_map_io,
607 .init_early = omap35xx_init_early, 607 .init_early = omap35xx_init_early,
608 .init_irq = omap3_init_irq, 608 .init_irq = omap3_init_irq,
609 .handle_irq = omap3_intc_handle_irq,
609 .init_machine = omap3pandora_init, 610 .init_machine = omap3pandora_init,
610 .timer = &omap3_timer, 611 .timer = &omap3_timer,
611MACHINE_END 612MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index ddb7d6663c6d..b21d70a2e4a7 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -35,7 +35,7 @@
35#include <asm/mach/flash.h> 35#include <asm/mach/flash.h>
36 36
37#include <plat/board.h> 37#include <plat/board.h>
38#include <plat/common.h> 38#include "common.h"
39#include <plat/gpmc.h> 39#include <plat/gpmc.h>
40#include <plat/nand.h> 40#include <plat/nand.h>
41#include <plat/usb.h> 41#include <plat/usb.h>
@@ -454,6 +454,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
454 .map_io = omap3_map_io, 454 .map_io = omap3_map_io,
455 .init_early = omap35xx_init_early, 455 .init_early = omap35xx_init_early,
456 .init_irq = omap3_init_irq, 456 .init_irq = omap3_init_irq,
457 .handle_irq = omap3_intc_handle_irq,
457 .init_machine = omap3_stalker_init, 458 .init_machine = omap3_stalker_init,
458 .timer = &omap3_secure_timer, 459 .timer = &omap3_secure_timer,
459MACHINE_END 460MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index a2d0d1971e27..18cd340f9b7b 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -44,7 +44,7 @@
44#include <asm/mach/flash.h> 44#include <asm/mach/flash.h>
45 45
46#include <plat/board.h> 46#include <plat/board.h>
47#include <plat/common.h> 47#include "common.h"
48#include <plat/gpmc.h> 48#include <plat/gpmc.h>
49#include <plat/nand.h> 49#include <plat/nand.h>
50#include <plat/usb.h> 50#include <plat/usb.h>
@@ -381,6 +381,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
381 .map_io = omap3_map_io, 381 .map_io = omap3_map_io,
382 .init_early = omap3430_init_early, 382 .init_early = omap3430_init_early,
383 .init_irq = omap3_init_irq, 383 .init_irq = omap3_init_irq,
384 .handle_irq = omap3_intc_handle_irq,
384 .init_machine = omap3_touchbook_init, 385 .init_machine = omap3_touchbook_init,
385 .timer = &omap3_secure_timer, 386 .timer = &omap3_secure_timer,
386MACHINE_END 387MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index a8c2c4263e38..b6f114436dbc 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -30,14 +30,14 @@
30#include <linux/wl12xx.h> 30#include <linux/wl12xx.h>
31 31
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/omap4-common.h> 33#include <asm/hardware/gic.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 36#include <asm/mach/map.h>
37#include <video/omapdss.h> 37#include <video/omapdss.h>
38 38
39#include <plat/board.h> 39#include <plat/board.h>
40#include <plat/common.h> 40#include "common.h"
41#include <plat/usb.h> 41#include <plat/usb.h>
42#include <plat/mmc.h> 42#include <plat/mmc.h>
43#include <video/omap-panel-dvi.h> 43#include <video/omap-panel-dvi.h>
@@ -577,6 +577,7 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
577 .map_io = omap4_map_io, 577 .map_io = omap4_map_io,
578 .init_early = omap4430_init_early, 578 .init_early = omap4430_init_early,
579 .init_irq = gic_init_irq, 579 .init_irq = gic_init_irq,
580 .handle_irq = gic_handle_irq,
580 .init_machine = omap4_panda_init, 581 .init_machine = omap4_panda_init,
581 .timer = &omap4_timer, 582 .timer = &omap4_timer,
582MACHINE_END 583MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 4cf7aeabab86..60a61ea759bf 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -43,7 +43,7 @@
43#include <asm/mach/map.h> 43#include <asm/mach/map.h>
44 44
45#include <plat/board.h> 45#include <plat/board.h>
46#include <plat/common.h> 46#include "common.h"
47#include <video/omapdss.h> 47#include <video/omapdss.h>
48#include <video/omap-panel-generic-dpi.h> 48#include <video/omap-panel-generic-dpi.h>
49#include <video/omap-panel-dvi.h> 49#include <video/omap-panel-dvi.h>
@@ -562,6 +562,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
562 .map_io = omap3_map_io, 562 .map_io = omap3_map_io,
563 .init_early = omap35xx_init_early, 563 .init_early = omap35xx_init_early,
564 .init_irq = omap3_init_irq, 564 .init_irq = omap3_init_irq,
565 .handle_irq = omap3_intc_handle_irq,
565 .init_machine = overo_init, 566 .init_machine = overo_init,
566 .timer = &omap3_timer, 567 .timer = &omap3_timer,
567MACHINE_END 568MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 616fb39763b0..a79d49e3fe09 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -25,7 +25,7 @@
25#include <plat/mmc.h> 25#include <plat/mmc.h>
26#include <plat/usb.h> 26#include <plat/usb.h>
27#include <plat/gpmc.h> 27#include <plat/gpmc.h>
28#include <plat/common.h> 28#include "common.h"
29#include <plat/onenand.h> 29#include <plat/onenand.h>
30 30
31#include "mux.h" 31#include "mux.h"
@@ -149,6 +149,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
149 .map_io = omap3_map_io, 149 .map_io = omap3_map_io,
150 .init_early = omap3630_init_early, 150 .init_early = omap3630_init_early,
151 .init_irq = omap3_init_irq, 151 .init_irq = omap3_init_irq,
152 .handle_irq = omap3_intc_handle_irq,
152 .init_machine = rm680_init, 153 .init_machine = rm680_init,
153 .timer = &omap3_timer, 154 .timer = &omap3_timer,
154MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ba1aa07bdb29..e9eff00cddd4 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -15,6 +15,7 @@
15#include <linux/input/matrix_keypad.h> 15#include <linux/input/matrix_keypad.h>
16#include <linux/spi/spi.h> 16#include <linux/spi/spi.h>
17#include <linux/wl12xx.h> 17#include <linux/wl12xx.h>
18#include <linux/spi/tsc2005.h>
18#include <linux/i2c.h> 19#include <linux/i2c.h>
19#include <linux/i2c/twl.h> 20#include <linux/i2c/twl.h>
20#include <linux/clk.h> 21#include <linux/clk.h>
@@ -27,7 +28,7 @@
27 28
28#include <plat/mcspi.h> 29#include <plat/mcspi.h>
29#include <plat/board.h> 30#include <plat/board.h>
30#include <plat/common.h> 31#include "common.h"
31#include <plat/dma.h> 32#include <plat/dma.h>
32#include <plat/gpmc.h> 33#include <plat/gpmc.h>
33#include <plat/onenand.h> 34#include <plat/onenand.h>
@@ -58,6 +59,9 @@
58 59
59#define RX51_USB_TRANSCEIVER_RST_GPIO 67 60#define RX51_USB_TRANSCEIVER_RST_GPIO 67
60 61
62#define RX51_TSC2005_RESET_GPIO 104
63#define RX51_TSC2005_IRQ_GPIO 100
64
61/* list all spi devices here */ 65/* list all spi devices here */
62enum { 66enum {
63 RX51_SPI_WL1251, 67 RX51_SPI_WL1251,
@@ -66,6 +70,7 @@ enum {
66}; 70};
67 71
68static struct wl12xx_platform_data wl1251_pdata; 72static struct wl12xx_platform_data wl1251_pdata;
73static struct tsc2005_platform_data tsc2005_pdata;
69 74
70#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) 75#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
71static struct tsl2563_platform_data rx51_tsl2563_platform_data = { 76static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
@@ -167,10 +172,10 @@ static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
167 .modalias = "tsc2005", 172 .modalias = "tsc2005",
168 .bus_num = 1, 173 .bus_num = 1,
169 .chip_select = 0, 174 .chip_select = 0,
170 /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ 175 .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
171 .max_speed_hz = 6000000, 176 .max_speed_hz = 6000000,
172 .controller_data = &tsc2005_mcspi_config, 177 .controller_data = &tsc2005_mcspi_config,
173 /* .platform_data = &tsc2005_config,*/ 178 .platform_data = &tsc2005_pdata,
174 }, 179 },
175}; 180};
176 181
@@ -1086,6 +1091,42 @@ error:
1086 */ 1091 */
1087} 1092}
1088 1093
1094static struct tsc2005_platform_data tsc2005_pdata = {
1095 .ts_pressure_max = 2048,
1096 .ts_pressure_fudge = 2,
1097 .ts_x_max = 4096,
1098 .ts_x_fudge = 4,
1099 .ts_y_max = 4096,
1100 .ts_y_fudge = 7,
1101 .ts_x_plate_ohm = 280,
1102 .esd_timeout_ms = 8000,
1103};
1104
1105static void rx51_tsc2005_set_reset(bool enable)
1106{
1107 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1108}
1109
1110static void __init rx51_init_tsc2005(void)
1111{
1112 int r;
1113
1114 r = gpio_request_one(RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ");
1115 if (r < 0) {
1116 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 IRQ");
1117 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = 0;
1118 }
1119
1120 r = gpio_request_one(RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH,
1121 "tsc2005 reset");
1122 if (r >= 0) {
1123 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
1124 } else {
1125 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 reset");
1126 tsc2005_pdata.esd_timeout_ms = 0;
1127 }
1128}
1129
1089void __init rx51_peripherals_init(void) 1130void __init rx51_peripherals_init(void)
1090{ 1131{
1091 rx51_i2c_init(); 1132 rx51_i2c_init();
@@ -1094,6 +1135,7 @@ void __init rx51_peripherals_init(void)
1094 board_smc91x_init(); 1135 board_smc91x_init();
1095 rx51_add_gpio_keys(); 1136 rx51_add_gpio_keys();
1096 rx51_init_wl1251(); 1137 rx51_init_wl1251();
1138 rx51_init_tsc2005();
1097 rx51_init_si4713(); 1139 rx51_init_si4713();
1098 spi_register_board_info(rx51_peripherals_spi_board_info, 1140 spi_register_board_info(rx51_peripherals_spi_board_info,
1099 ARRAY_SIZE(rx51_peripherals_spi_board_info)); 1141 ARRAY_SIZE(rx51_peripherals_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 4af7c4b2881a..4e3c0965edf3 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -25,7 +25,7 @@
25 25
26#include <plat/mcspi.h> 26#include <plat/mcspi.h>
27#include <plat/board.h> 27#include <plat/board.h>
28#include <plat/common.h> 28#include "common.h"
29#include <plat/dma.h> 29#include <plat/dma.h>
30#include <plat/gpmc.h> 30#include <plat/gpmc.h>
31#include <plat/usb.h> 31#include <plat/usb.h>
@@ -127,6 +127,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
127 .map_io = omap3_map_io, 127 .map_io = omap3_map_io,
128 .init_early = omap3430_init_early, 128 .init_early = omap3430_init_early,
129 .init_irq = omap3_init_irq, 129 .init_irq = omap3_init_irq,
130 .handle_irq = omap3_intc_handle_irq,
130 .init_machine = rx51_init, 131 .init_machine = rx51_init,
131 .timer = &omap3_timer, 132 .timer = &omap3_timer,
132MACHINE_END 133MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index e6ee8842285c..b3ca997a44fa 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Code for TI8168 EVM. 2 * Code for TI8168/TI8148 EVM.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * 5 *
@@ -22,30 +22,35 @@
22 22
23#include <plat/irqs.h> 23#include <plat/irqs.h>
24#include <plat/board.h> 24#include <plat/board.h>
25#include <plat/common.h> 25#include "common.h"
26 26
27static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { 27static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = {
28}; 28};
29 29
30static void __init ti8168_evm_init(void) 30static void __init ti81xx_evm_init(void)
31{ 31{
32 omap_serial_init(); 32 omap_serial_init();
33 omap_sdrc_init(NULL, NULL); 33 omap_sdrc_init(NULL, NULL);
34 omap_board_config = ti8168_evm_config; 34 omap_board_config = ti81xx_evm_config;
35 omap_board_config_size = ARRAY_SIZE(ti8168_evm_config); 35 omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config);
36}
37
38static void __init ti8168_evm_map_io(void)
39{
40 omapti816x_map_common_io();
41} 36}
42 37
43MACHINE_START(TI8168EVM, "ti8168evm") 38MACHINE_START(TI8168EVM, "ti8168evm")
44 /* Maintainer: Texas Instruments */ 39 /* Maintainer: Texas Instruments */
45 .atag_offset = 0x100, 40 .atag_offset = 0x100,
46 .map_io = ti8168_evm_map_io, 41 .map_io = ti81xx_map_io,
47 .init_early = ti816x_init_early, 42 .init_early = ti81xx_init_early,
48 .init_irq = ti816x_init_irq, 43 .init_irq = ti81xx_init_irq,
44 .timer = &omap3_timer,
45 .init_machine = ti81xx_evm_init,
46MACHINE_END
47
48MACHINE_START(TI8148EVM, "ti8148evm")
49 /* Maintainer: Texas Instruments */
50 .atag_offset = 0x100,
51 .map_io = ti81xx_map_io,
52 .init_early = ti81xx_init_early,
53 .init_irq = ti81xx_init_irq,
49 .timer = &omap3_timer, 54 .timer = &omap3_timer,
50 .init_machine = ti8168_evm_init, 55 .init_machine = ti81xx_evm_init,
51MACHINE_END 56MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 6d0aa4fcb7c3..8d7ce11cfeaf 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -24,7 +24,7 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26 26
27#include <plat/common.h> 27#include "common.h"
28#include <plat/usb.h> 28#include <plat/usb.h>
29 29
30#include <mach/board-zoom.h> 30#include <mach/board-zoom.h>
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index be6684dc4f55..70e5b54a2115 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -21,7 +21,7 @@
21#include <asm/mach-types.h> 21#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
23 23
24#include <plat/common.h> 24#include "common.h"
25#include <plat/board.h> 25#include <plat/board.h>
26#include <plat/usb.h> 26#include <plat/usb.h>
27 27
@@ -135,6 +135,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
135 .map_io = omap3_map_io, 135 .map_io = omap3_map_io,
136 .init_early = omap3430_init_early, 136 .init_early = omap3430_init_early,
137 .init_irq = omap3_init_irq, 137 .init_irq = omap3_init_irq,
138 .handle_irq = omap3_intc_handle_irq,
138 .init_machine = omap_zoom_init, 139 .init_machine = omap_zoom_init,
139 .timer = &omap3_timer, 140 .timer = &omap3_timer,
140MACHINE_END 141MACHINE_END
@@ -145,6 +146,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
145 .map_io = omap3_map_io, 146 .map_io = omap3_map_io,
146 .init_early = omap3630_init_early, 147 .init_early = omap3630_init_early,
147 .init_irq = omap3_init_irq, 148 .init_irq = omap3_init_irq,
149 .handle_irq = omap3_intc_handle_irq,
148 .init_machine = omap_zoom_init, 150 .init_machine = omap_zoom_init,
149 .timer = &omap3_timer, 151 .timer = &omap3_timer,
150MACHINE_END 152MACHINE_END
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1f3481f8d695..f57ed5baeccf 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -35,7 +35,7 @@
35#include "cm-regbits-24xx.h" 35#include "cm-regbits-24xx.h"
36#include "cm-regbits-34xx.h" 36#include "cm-regbits-34xx.h"
37 37
38u8 cpu_mask; 38u16 cpu_mask;
39 39
40/* 40/*
41 * clkdm_control: if true, then when a clock is enabled in the 41 * clkdm_control: if true, then when a clock is enabled in the
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 2311bc217226..b8c2a686481c 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -132,7 +132,7 @@ void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
132 const char *core_ck_name, 132 const char *core_ck_name,
133 const char *mpu_ck_name); 133 const char *mpu_ck_name);
134 134
135extern u8 cpu_mask; 135extern u16 cpu_mask;
136 136
137extern const struct clkops clkops_omap2_dflt_wait; 137extern const struct clkops clkops_omap2_dflt_wait;
138extern const struct clkops clkops_dummy; 138extern const struct clkops clkops_dummy;
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 5d0064a4fb5a..60424f41156b 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3517,6 +3517,10 @@ int __init omap3xxx_clk_init(void)
3517 } else if (cpu_is_ti816x()) { 3517 } else if (cpu_is_ti816x()) {
3518 cpu_mask = RATE_IN_TI816X; 3518 cpu_mask = RATE_IN_TI816X;
3519 cpu_clkflg = CK_TI816X; 3519 cpu_clkflg = CK_TI816X;
3520 } else if (cpu_is_am33xx()) {
3521 cpu_mask = RATE_IN_AM33XX;
3522 } else if (cpu_is_ti814x()) {
3523 cpu_mask = RATE_IN_TI814X;
3520 } else if (cpu_is_omap34xx()) { 3524 } else if (cpu_is_omap34xx()) {
3521 if (omap_rev() == OMAP3430_REV_ES1_0) { 3525 if (omap_rev() == OMAP3430_REV_ES1_0) {
3522 cpu_mask = RATE_IN_3430ES1; 3526 cpu_mask = RATE_IN_3430ES1;
@@ -3600,7 +3604,7 @@ int __init omap3xxx_clk_init(void)
3600 * Lock DPLL5 -- here only until other device init code can 3604 * Lock DPLL5 -- here only until other device init code can
3601 * handle this 3605 * handle this
3602 */ 3606 */
3603 if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0)) 3607 if (!cpu_is_ti81xx() && (omap_rev() >= OMAP3430_REV_ES2_0))
3604 omap3_clk_lock_dpll5(); 3608 omap3_clk_lock_dpll5();
3605 3609
3606 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ 3610 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 38830d8d4783..04d39cdd2112 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "cm.h" 23#include "cm.h"
24#include "cm2xxx_3xxx.h" 24#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
index e96f53ea01a1..6a836303252c 100644
--- a/arch/arm/mach-omap2/cm44xx.c
+++ b/arch/arm/mach-omap2/cm44xx.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "cm.h" 23#include "cm.h"
24#include "cm1_44xx.h" 24#include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index eb2a472bbf46..6204deaf85b1 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -20,7 +20,7 @@
20#include <linux/err.h> 20#include <linux/err.h>
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23#include <plat/common.h> 23#include "common.h"
24 24
25#include "cm.h" 25#include "cm.h"
26#include "cm1_44xx.h" 26#include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 110e5b9db145..aaf421178c91 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -17,7 +17,7 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/common.h> 20#include "common.h"
21#include <plat/board.h> 21#include <plat/board.h>
22#include <plat/mux.h> 22#include <plat/mux.h>
23 23
@@ -110,23 +110,49 @@ void __init omap3_map_io(void)
110 110
111/* 111/*
112 * Adjust TAP register base such that omap3_check_revision accesses the correct 112 * Adjust TAP register base such that omap3_check_revision accesses the correct
113 * TI816X register for checking device ID (it adds 0x204 to tap base while 113 * TI81XX register for checking device ID (it adds 0x204 to tap base while
114 * TI816X DEVICE ID register is at offset 0x600 from control base). 114 * TI81XX DEVICE ID register is at offset 0x600 from control base).
115 */ 115 */
116#define TI816X_TAP_BASE (TI816X_CTRL_BASE + \ 116#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
117 TI816X_CONTROL_DEVICE_ID - 0x204) 117 TI81XX_CONTROL_DEVICE_ID - 0x204)
118 118
119static struct omap_globals ti816x_globals = { 119static struct omap_globals ti81xx_globals = {
120 .class = OMAP343X_CLASS, 120 .class = OMAP343X_CLASS,
121 .tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE), 121 .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
122 .ctrl = OMAP2_L4_IO_ADDRESS(TI816X_CTRL_BASE), 122 .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
123 .prm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), 123 .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
124 .cm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), 124 .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
125}; 125};
126 126
127void __init omap2_set_globals_ti816x(void) 127void __init omap2_set_globals_ti81xx(void)
128{ 128{
129 __omap2_set_globals(&ti816x_globals); 129 __omap2_set_globals(&ti81xx_globals);
130}
131
132void __init ti81xx_map_io(void)
133{
134 omapti81xx_map_common_io();
135}
136
137#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
138 TI81XX_CONTROL_DEVICE_ID - 0x204)
139
140static struct omap_globals am33xx_globals = {
141 .class = AM335X_CLASS,
142 .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
143 .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
144 .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
145 .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
146};
147
148void __init omap2_set_globals_am33xx(void)
149{
150 __omap2_set_globals(&am33xx_globals);
151}
152
153void __init am33xx_map_io(void)
154{
155 omapam33xx_map_common_io();
130} 156}
131#endif 157#endif
132 158
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
new file mode 100644
index 000000000000..4b2b416fafe1
--- /dev/null
+++ b/arch/arm/mach-omap2/common.h
@@ -0,0 +1,196 @@
1/*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27
28#include <linux/delay.h>
29#include <plat/common.h>
30
31#ifdef CONFIG_SOC_OMAP2420
32extern void omap242x_map_common_io(void);
33#else
34static inline void omap242x_map_common_io(void)
35{
36}
37#endif
38
39#ifdef CONFIG_SOC_OMAP2430
40extern void omap243x_map_common_io(void);
41#else
42static inline void omap243x_map_common_io(void)
43{
44}
45#endif
46
47#ifdef CONFIG_ARCH_OMAP3
48extern void omap34xx_map_common_io(void);
49#else
50static inline void omap34xx_map_common_io(void)
51{
52}
53#endif
54
55#ifdef CONFIG_SOC_OMAPTI81XX
56extern void omapti81xx_map_common_io(void);
57#else
58static inline void omapti81xx_map_common_io(void)
59{
60}
61#endif
62
63#ifdef CONFIG_SOC_OMAPAM33XX
64extern void omapam33xx_map_common_io(void);
65#else
66static inline void omapam33xx_map_common_io(void)
67{
68}
69#endif
70
71#ifdef CONFIG_ARCH_OMAP4
72extern void omap44xx_map_common_io(void);
73#else
74static inline void omap44xx_map_common_io(void)
75{
76}
77#endif
78
79extern void omap2_init_common_infrastructure(void);
80
81extern struct sys_timer omap2_timer;
82extern struct sys_timer omap3_timer;
83extern struct sys_timer omap3_secure_timer;
84extern struct sys_timer omap4_timer;
85
86void omap2420_init_early(void);
87void omap2430_init_early(void);
88void omap3430_init_early(void);
89void omap35xx_init_early(void);
90void omap3630_init_early(void);
91void omap3_init_early(void); /* Do not use this one */
92void am35xx_init_early(void);
93void ti81xx_init_early(void);
94void omap4430_init_early(void);
95
96/*
97 * IO bases for various OMAP processors
98 * Except the tap base, rest all the io bases
99 * listed are physical addresses.
100 */
101struct omap_globals {
102 u32 class; /* OMAP class to detect */
103 void __iomem *tap; /* Control module ID code */
104 void __iomem *sdrc; /* SDRAM Controller */
105 void __iomem *sms; /* SDRAM Memory Scheduler */
106 void __iomem *ctrl; /* System Control Module */
107 void __iomem *ctrl_pad; /* PAD Control Module */
108 void __iomem *prm; /* Power and Reset Management */
109 void __iomem *cm; /* Clock Management */
110 void __iomem *cm2;
111};
112
113void omap2_set_globals_242x(void);
114void omap2_set_globals_243x(void);
115void omap2_set_globals_3xxx(void);
116void omap2_set_globals_443x(void);
117void omap2_set_globals_ti81xx(void);
118void omap2_set_globals_am33xx(void);
119
120/* These get called from omap2_set_globals_xxxx(), do not call these */
121void omap2_set_globals_tap(struct omap_globals *);
122void omap2_set_globals_sdrc(struct omap_globals *);
123void omap2_set_globals_control(struct omap_globals *);
124void omap2_set_globals_prcm(struct omap_globals *);
125
126void omap242x_map_io(void);
127void omap243x_map_io(void);
128void omap3_map_io(void);
129void am33xx_map_io(void);
130void omap4_map_io(void);
131void ti81xx_map_io(void);
132
133/**
134 * omap_test_timeout - busy-loop, testing a condition
135 * @cond: condition to test until it evaluates to true
136 * @timeout: maximum number of microseconds in the timeout
137 * @index: loop index (integer)
138 *
139 * Loop waiting for @cond to become true or until at least @timeout
140 * microseconds have passed. To use, define some integer @index in the
141 * calling code. After running, if @index == @timeout, then the loop has
142 * timed out.
143 */
144#define omap_test_timeout(cond, timeout, index) \
145({ \
146 for (index = 0; index < timeout; index++) { \
147 if (cond) \
148 break; \
149 udelay(1); \
150 } \
151})
152
153extern struct device *omap2_get_mpuss_device(void);
154extern struct device *omap2_get_iva_device(void);
155extern struct device *omap2_get_l3_device(void);
156extern struct device *omap4_get_dsp_device(void);
157
158void omap2_init_irq(void);
159void omap3_init_irq(void);
160void ti81xx_init_irq(void);
161extern int omap_irq_pending(void);
162void omap_intc_save_context(void);
163void omap_intc_restore_context(void);
164void omap3_intc_suspend(void);
165void omap3_intc_prepare_idle(void);
166void omap3_intc_resume_idle(void);
167void omap2_intc_handle_irq(struct pt_regs *regs);
168void omap3_intc_handle_irq(struct pt_regs *regs);
169
170/*
171 * wfi used in low power code. Directly opcode is used instead
172 * of instruction to avoid mulit-omap build break
173 */
174#ifdef CONFIG_THUMB2_KERNEL
175#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory")
176#else
177#define do_wfi() \
178 __asm__ __volatile__ (".word 0xe320f003" : : : "memory")
179#endif
180
181#ifdef CONFIG_CACHE_L2X0
182extern void __iomem *l2cache_base;
183#endif
184
185extern void __init gic_init_irq(void);
186extern void omap_smc1(u32 fn, u32 arg);
187
188#ifdef CONFIG_SMP
189/* Needed for secondary core boot */
190extern void omap_secondary_startup(void);
191extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
192extern void omap_auxcoreboot_addr(u32 cpu_addr);
193extern u32 omap_read_auxcoreboot0(void);
194#endif
195
196#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index e34d27f8c49c..114c037e433c 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -15,7 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <plat/common.h> 18#include "common.h"
19#include <plat/sdrc.h> 19#include <plat/sdrc.h>
20 20
21#include "cm-regbits-34xx.h" 21#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index d4ef75d5a382..0ba68d3764bc 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -52,8 +52,8 @@
52#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 52#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00
53#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 53#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60
54 54
55/* TI816X spefic control submodules */ 55/* TI81XX spefic control submodules */
56#define TI816X_CONTROL_DEVCONF 0x600 56#define TI81XX_CONTROL_DEVCONF 0x600
57 57
58/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ 58/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */
59 59
@@ -244,8 +244,8 @@
244#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 244#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
245#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 245#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
246 246
247/* TI816X CONTROL_DEVCONF register offsets */ 247/* TI81XX CONTROL_DEVCONF register offsets */
248#define TI816X_CONTROL_DEVICE_ID (TI816X_CONTROL_DEVCONF + 0x000) 248#define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000)
249 249
250/* 250/*
251 * REVISIT: This list of registers is not comprehensive - there are more 251 * REVISIT: This list of registers is not comprehensive - there are more
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 942bb4f19f9f..e20332f4abdc 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -34,6 +34,7 @@
34 34
35#include "pm.h" 35#include "pm.h"
36#include "control.h" 36#include "control.h"
37#include "common.h"
37 38
38#ifdef CONFIG_CPU_IDLE 39#ifdef CONFIG_CPU_IDLE
39 40
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c15cfada5f13..35d5dffab7e1 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -336,6 +336,27 @@ static void omap_init_mcpdm(void)
336static inline void omap_init_mcpdm(void) {} 336static inline void omap_init_mcpdm(void) {}
337#endif 337#endif
338 338
339#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
340 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
341
342static void omap_init_dmic(void)
343{
344 struct omap_hwmod *oh;
345 struct platform_device *pdev;
346
347 oh = omap_hwmod_lookup("dmic");
348 if (!oh) {
349 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
350 return;
351 }
352
353 pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
354 WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
355}
356#else
357static inline void omap_init_dmic(void) {}
358#endif
359
339#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 360#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
340 361
341#include <plat/mcspi.h> 362#include <plat/mcspi.h>
@@ -681,6 +702,7 @@ static int __init omap2_init_devices(void)
681 */ 702 */
682 omap_init_audio(); 703 omap_init_audio();
683 omap_init_mcpdm(); 704 omap_init_mcpdm();
705 omap_init_dmic();
684 omap_init_camera(); 706 omap_init_camera();
685 omap_init_mbox(); 707 omap_init_mbox();
686 omap_init_mcspi(); 708 omap_init_mcspi();
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index dce9905d64bb..bc6cf863a563 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -22,12 +22,13 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/err.h> 24#include <linux/err.h>
25#include <linux/delay.h>
25 26
26#include <video/omapdss.h> 27#include <video/omapdss.h>
27#include <plat/omap_hwmod.h> 28#include <plat/omap_hwmod.h>
28#include <plat/omap_device.h> 29#include <plat/omap_device.h>
29#include <plat/omap-pm.h> 30#include <plat/omap-pm.h>
30#include <plat/common.h> 31#include "common.h"
31 32
32#include "control.h" 33#include "control.h"
33#include "display.h" 34#include "display.h"
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index ace99944e96f..a12e224eb97d 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -21,7 +21,7 @@
21 21
22#include <plat/cpu.h> 22#include <plat/cpu.h>
23#include <plat/i2c.h> 23#include <plat/i2c.h>
24#include <plat/common.h> 24#include "common.h"
25#include <plat/omap_hwmod.h> 25#include <plat/omap_hwmod.h>
26 26
27#include "mux.h" 27#include "mux.h"
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 7f47092a193f..6c5826605eae 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -21,7 +21,7 @@
21 21
22#include <asm/cputype.h> 22#include <asm/cputype.h>
23 23
24#include <plat/common.h> 24#include "common.h"
25#include <plat/cpu.h> 25#include <plat/cpu.h>
26 26
27#include <mach/id.h> 27#include <mach/id.h>
@@ -226,7 +226,7 @@ static void __init omap4_check_features(void)
226 } 226 }
227} 227}
228 228
229static void __init ti816x_check_features(void) 229static void __init ti81xx_check_features(void)
230{ 230{
231 omap_features = OMAP3_HAS_NEON; 231 omap_features = OMAP3_HAS_NEON;
232} 232}
@@ -340,6 +340,29 @@ static void __init omap3_check_revision(const char **cpu_rev)
340 break; 340 break;
341 } 341 }
342 break; 342 break;
343 case 0xb944:
344 omap_revision = AM335X_REV_ES1_0;
345 *cpu_rev = "1.0";
346 case 0xb8f2:
347 switch (rev) {
348 case 0:
349 /* FALLTHROUGH */
350 case 1:
351 omap_revision = TI8148_REV_ES1_0;
352 *cpu_rev = "1.0";
353 break;
354 case 2:
355 omap_revision = TI8148_REV_ES2_0;
356 *cpu_rev = "2.0";
357 break;
358 case 3:
359 /* FALLTHROUGH */
360 default:
361 omap_revision = TI8148_REV_ES2_1;
362 *cpu_rev = "2.1";
363 break;
364 }
365 break;
343 default: 366 default:
344 /* Unknown default to latest silicon rev as default */ 367 /* Unknown default to latest silicon rev as default */
345 omap_revision = OMAP3630_REV_ES1_2; 368 omap_revision = OMAP3630_REV_ES1_2;
@@ -367,7 +390,7 @@ static void __init omap4_check_revision(void)
367 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0 390 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
368 * Use ARM register to detect the correct ES version 391 * Use ARM register to detect the correct ES version
369 */ 392 */
370 if (!rev && (hawkeye != 0xb94e)) { 393 if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) {
371 idcode = read_cpuid(CPUID_ID); 394 idcode = read_cpuid(CPUID_ID);
372 rev = (idcode & 0xf) - 1; 395 rev = (idcode & 0xf) - 1;
373 } 396 }
@@ -389,8 +412,11 @@ static void __init omap4_check_revision(void)
389 omap_revision = OMAP4430_REV_ES2_1; 412 omap_revision = OMAP4430_REV_ES2_1;
390 break; 413 break;
391 case 4: 414 case 4:
392 default:
393 omap_revision = OMAP4430_REV_ES2_2; 415 omap_revision = OMAP4430_REV_ES2_2;
416 break;
417 case 6:
418 default:
419 omap_revision = OMAP4430_REV_ES2_3;
394 } 420 }
395 break; 421 break;
396 case 0xb94e: 422 case 0xb94e:
@@ -401,9 +427,17 @@ static void __init omap4_check_revision(void)
401 break; 427 break;
402 } 428 }
403 break; 429 break;
430 case 0xb975:
431 switch (rev) {
432 case 0:
433 default:
434 omap_revision = OMAP4470_REV_ES1_0;
435 break;
436 }
437 break;
404 default: 438 default:
405 /* Unknown default to latest silicon rev as default */ 439 /* Unknown default to latest silicon rev as default */
406 omap_revision = OMAP4430_REV_ES2_2; 440 omap_revision = OMAP4430_REV_ES2_3;
407 } 441 }
408 442
409 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, 443 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
@@ -432,6 +466,10 @@ static void __init omap3_cpuinfo(const char *cpu_rev)
432 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; 466 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
433 } else if (cpu_is_ti816x()) { 467 } else if (cpu_is_ti816x()) {
434 cpu_name = "TI816X"; 468 cpu_name = "TI816X";
469 } else if (cpu_is_am335x()) {
470 cpu_name = "AM335X";
471 } else if (cpu_is_ti814x()) {
472 cpu_name = "TI814X";
435 } else if (omap3_has_iva() && omap3_has_sgx()) { 473 } else if (omap3_has_iva() && omap3_has_sgx()) {
436 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ 474 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
437 cpu_name = "OMAP3430/3530"; 475 cpu_name = "OMAP3430/3530";
@@ -472,11 +510,11 @@ void __init omap2_check_revision(void)
472 } else if (cpu_is_omap34xx()) { 510 } else if (cpu_is_omap34xx()) {
473 omap3_check_revision(&cpu_rev); 511 omap3_check_revision(&cpu_rev);
474 512
475 /* TI816X doesn't have feature register */ 513 /* TI81XX doesn't have feature register */
476 if (!cpu_is_ti816x()) 514 if (!cpu_is_ti81xx())
477 omap3_check_features(); 515 omap3_check_features();
478 else 516 else
479 ti816x_check_features(); 517 ti81xx_check_features();
480 518
481 omap3_cpuinfo(cpu_rev); 519 omap3_cpuinfo(cpu_rev);
482 return; 520 return;
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 13f98e59cfef..cdfc2a1f0e75 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -66,11 +66,11 @@ omap_uart_lsr: .word 0
66 beq 34f @ configure OMAP3UART4 66 beq 34f @ configure OMAP3UART4
67 cmp \rp, #OMAP4UART4 @ only on 44xx 67 cmp \rp, #OMAP4UART4 @ only on 44xx
68 beq 44f @ configure OMAP4UART4 68 beq 44f @ configure OMAP4UART4
69 cmp \rp, #TI816XUART1 @ ti816x UART offsets different 69 cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
70 beq 81f @ configure UART1 70 beq 81f @ configure UART1
71 cmp \rp, #TI816XUART2 @ ti816x UART offsets different 71 cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
72 beq 82f @ configure UART2 72 beq 82f @ configure UART2
73 cmp \rp, #TI816XUART3 @ ti816x UART offsets different 73 cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
74 beq 83f @ configure UART3 74 beq 83f @ configure UART3
75 cmp \rp, #ZOOM_UART @ only on zoom2/3 75 cmp \rp, #ZOOM_UART @ only on zoom2/3
76 beq 95f @ configure ZOOM_UART 76 beq 95f @ configure ZOOM_UART
@@ -94,11 +94,11 @@ omap_uart_lsr: .word 0
94 b 98f 94 b 98f
9544: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) 9544: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
96 b 98f 96 b 98f
9781: mov \rp, #UART_OFFSET(TI816X_UART1_BASE) 9781: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
98 b 98f 98 b 98f
9982: mov \rp, #UART_OFFSET(TI816X_UART2_BASE) 9982: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
100 b 98f 100 b 98f
10183: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) 10183: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
102 b 98f 102 b 98f
103 103
10495: ldr \rp, =ZOOM_UART_BASE 10495: ldr \rp, =ZOOM_UART_BASE
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index feb90a10945a..56964a0c4c7e 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -10,146 +10,9 @@
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13#include <mach/hardware.h>
14#include <mach/io.h>
15#include <mach/irqs.h>
16#include <asm/hardware/gic.h>
17
18#include <plat/omap24xx.h>
19#include <plat/omap34xx.h>
20#include <plat/omap44xx.h>
21
22#include <plat/multi.h>
23
24#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
25#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
26#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
27#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
28#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
29 13
30 .macro disable_fiq 14 .macro disable_fiq
31 .endm 15 .endm
32 16
33 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
34 .endm 18 .endm
35
36/*
37 * Unoptimized irq functions for multi-omap2, 3 and 4
38 */
39
40#ifdef MULTI_OMAP2
41 /*
42 * Configure the interrupt base on the first interrupt.
43 * See also omap_irq_base_init for setting omap_irq_base.
44 */
45 .macro get_irqnr_preamble, base, tmp
46 ldr \base, =omap_irq_base @ irq base address
47 ldr \base, [\base, #0] @ irq base value
48 .endm
49
50 /* Check the pending interrupts. Note that base already set */
51 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
52 tst \base, #0x100 @ gic address?
53 bne 4401f @ found gic
54
55 /* Handle omap2 and omap3 */
56 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
57 cmp \irqnr, #0x0
58 bne 9998f
59 ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
60 cmp \irqnr, #0x0
61 bne 9998f
62 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
63 cmp \irqnr, #0x0
64 bne 9998f
65
66 /*
67 * ti816x has additional IRQ pending register. Checking this
68 * register on omap2 & omap3 has no effect (read as 0).
69 */
70 ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
71 cmp \irqnr, #0x0
729998:
73 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
74 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
75 b 9999f
76
77 /* Handle omap4 */
784401: ldr \irqstat, [\base, #GIC_CPU_INTACK]
79 ldr \tmp, =1021
80 bic \irqnr, \irqstat, #0x1c00
81 cmp \irqnr, #15
82 cmpcc \irqnr, \irqnr
83 cmpne \irqnr, \tmp
84 cmpcs \irqnr, \irqnr
859999:
86 .endm
87
88#ifdef CONFIG_SMP
89 /* We assume that irqstat (the raw value of the IRQ acknowledge
90 * register) is preserved from the macro above.
91 * If there is an IPI, we immediately signal end of interrupt
92 * on the controller, since this requires the original irqstat
93 * value which we won't easily be able to recreate later.
94 */
95
96 .macro test_for_ipi, irqnr, irqstat, base, tmp
97 bic \irqnr, \irqstat, #0x1c00
98 cmp \irqnr, #16
99 it cc
100 strcc \irqstat, [\base, #GIC_CPU_EOI]
101 it cs
102 cmpcs \irqnr, \irqnr
103 .endm
104#endif /* CONFIG_SMP */
105
106#else /* MULTI_OMAP2 */
107
108
109/*
110 * Optimized irq functions for omap2, 3 and 4
111 */
112
113#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
114 .macro get_irqnr_preamble, base, tmp
115#ifdef CONFIG_ARCH_OMAP2
116 ldr \base, =OMAP2_IRQ_BASE
117#else
118 ldr \base, =OMAP3_IRQ_BASE
119#endif
120 .endm
121
122 /* Check the pending interrupts. Note that base already set */
123 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
124 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
125 cmp \irqnr, #0x0
126 bne 9999f
127 ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
128 cmp \irqnr, #0x0
129 bne 9999f
130 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
131 cmp \irqnr, #0x0
132#ifdef CONFIG_SOC_OMAPTI816X
133 bne 9999f
134 ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
135 cmp \irqnr, #0x0
136#endif
1379999:
138 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
139 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
140
141 .endm
142#endif
143
144
145#ifdef CONFIG_ARCH_OMAP4
146#define HAVE_GET_IRQNR_PREAMBLE
147#include <asm/hardware/entry-macro-gic.S>
148
149 .macro get_irqnr_preamble, base, tmp
150 ldr \base, =OMAP4_IRQ_BASE
151 .endm
152
153#endif
154
155#endif /* MULTI_OMAP2 */
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h
deleted file mode 100644
index e4bd87619734..000000000000
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * omap4-common.h: OMAP4 specific common header file
3 *
4 * Copyright (C) 2010 Texas Instruments, Inc.
5 *
6 * Author:
7 * Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#ifndef OMAP_ARCH_OMAP4_COMMON_H
14#define OMAP_ARCH_OMAP4_COMMON_H
15
16/*
17 * wfi used in low power code. Directly opcode is used instead
18 * of instruction to avoid mulit-omap build break
19 */
20#ifdef CONFIG_THUMB2_KERNEL
21#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory")
22#else
23#define do_wfi() \
24 __asm__ __volatile__ (".word 0xe320f003" : : : "memory")
25#endif
26
27#ifdef CONFIG_CACHE_L2X0
28extern void __iomem *l2cache_base;
29#endif
30
31extern void __iomem *gic_dist_base_addr;
32
33extern void __init gic_init_irq(void);
34extern void omap_smc1(u32 fn, u32 arg);
35
36#ifdef CONFIG_SMP
37/* Needed for secondary core boot */
38extern void omap_secondary_startup(void);
39extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
40extern void omap_auxcoreboot_addr(u32 cpu_addr);
41extern u32 omap_read_auxcoreboot0(void);
42#endif
43#endif
diff --git a/arch/arm/mach-omap2/include/mach/vmalloc.h b/arch/arm/mach-omap2/include/mach/vmalloc.h
deleted file mode 100644
index 866319947760..000000000000
--- a/arch/arm/mach-omap2/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xf8000000UL
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 25d20ced03e1..73d617f0dc4a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -35,7 +35,7 @@
35#include "clock3xxx.h" 35#include "clock3xxx.h"
36#include "clock44xx.h" 36#include "clock44xx.h"
37 37
38#include <plat/common.h> 38#include "common.h"
39#include <plat/omap-pm.h> 39#include <plat/omap-pm.h>
40#include "voltage.h" 40#include "voltage.h"
41#include "powerdomain.h" 41#include "powerdomain.h"
@@ -43,7 +43,7 @@
43#include "clockdomain.h" 43#include "clockdomain.h"
44#include <plat/omap_hwmod.h> 44#include <plat/omap_hwmod.h>
45#include <plat/multi.h> 45#include <plat/multi.h>
46#include <plat/common.h> 46#include "common.h"
47 47
48/* 48/*
49 * The machine specific code may provide the extra mapping besides the 49 * The machine specific code may provide the extra mapping besides the
@@ -176,14 +176,31 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
176}; 176};
177#endif 177#endif
178 178
179#ifdef CONFIG_SOC_OMAPTI816X 179#ifdef CONFIG_SOC_OMAPTI81XX
180static struct map_desc omapti816x_io_desc[] __initdata = { 180static struct map_desc omapti81xx_io_desc[] __initdata = {
181 {
182 .virtual = L4_34XX_VIRT,
183 .pfn = __phys_to_pfn(L4_34XX_PHYS),
184 .length = L4_34XX_SIZE,
185 .type = MT_DEVICE
186 }
187};
188#endif
189
190#ifdef CONFIG_SOC_OMAPAM33XX
191static struct map_desc omapam33xx_io_desc[] __initdata = {
181 { 192 {
182 .virtual = L4_34XX_VIRT, 193 .virtual = L4_34XX_VIRT,
183 .pfn = __phys_to_pfn(L4_34XX_PHYS), 194 .pfn = __phys_to_pfn(L4_34XX_PHYS),
184 .length = L4_34XX_SIZE, 195 .length = L4_34XX_SIZE,
185 .type = MT_DEVICE 196 .type = MT_DEVICE
186 }, 197 },
198 {
199 .virtual = L4_WK_AM33XX_VIRT,
200 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
201 .length = L4_WK_AM33XX_SIZE,
202 .type = MT_DEVICE
203 }
187}; 204};
188#endif 205#endif
189 206
@@ -263,10 +280,17 @@ void __init omap34xx_map_common_io(void)
263} 280}
264#endif 281#endif
265 282
266#ifdef CONFIG_SOC_OMAPTI816X 283#ifdef CONFIG_SOC_OMAPTI81XX
267void __init omapti816x_map_common_io(void) 284void __init omapti81xx_map_common_io(void)
285{
286 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
287}
288#endif
289
290#ifdef CONFIG_SOC_OMAPAM33XX
291void __init omapam33xx_map_common_io(void)
268{ 292{
269 iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc)); 293 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
270} 294}
271#endif 295#endif
272 296
@@ -316,13 +340,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
316 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); 340 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
317} 341}
318 342
319/* See irq.c, omap4-common.c and entry-macro.S */
320void __iomem *omap_irq_base;
321
322static void __init omap_common_init_early(void) 343static void __init omap_common_init_early(void)
323{ 344{
324 omap2_check_revision(); 345 omap2_check_revision();
325 omap_ioremap_init();
326 omap_init_consistent_dma_size(); 346 omap_init_consistent_dma_size();
327} 347}
328 348
@@ -422,9 +442,9 @@ void __init am35xx_init_early(void)
422 omap3_init_early(); 442 omap3_init_early();
423} 443}
424 444
425void __init ti816x_init_early(void) 445void __init ti81xx_init_early(void)
426{ 446{
427 omap2_set_globals_ti816x(); 447 omap2_set_globals_ti81xx();
428 omap_common_init_early(); 448 omap_common_init_early();
429 omap3xxx_voltagedomains_init(); 449 omap3xxx_voltagedomains_init();
430 omap3xxx_powerdomains_init(); 450 omap3xxx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 65f1be6a182c..1fef061f7927 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -15,6 +15,7 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <asm/exception.h>
18#include <asm/mach/irq.h> 19#include <asm/mach/irq.h>
19 20
20 21
@@ -35,6 +36,11 @@
35/* Number of IRQ state bits in each MIR register */ 36/* Number of IRQ state bits in each MIR register */
36#define IRQ_BITS_PER_REG 32 37#define IRQ_BITS_PER_REG 32
37 38
39#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
40#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
41#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
42#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
43
38/* 44/*
39 * OMAP2 has a number of different interrupt controllers, each interrupt 45 * OMAP2 has a number of different interrupt controllers, each interrupt
40 * controller is identified as its own "bank". Register definitions are 46 * controller is identified as its own "bank". Register definitions are
@@ -143,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
143 149
144static void __init omap_init_irq(u32 base, int nr_irqs) 150static void __init omap_init_irq(u32 base, int nr_irqs)
145{ 151{
152 void __iomem *omap_irq_base;
146 unsigned long nr_of_irqs = 0; 153 unsigned long nr_of_irqs = 0;
147 unsigned int nr_banks = 0; 154 unsigned int nr_banks = 0;
148 int i, j; 155 int i, j;
@@ -186,11 +193,49 @@ void __init omap3_init_irq(void)
186 omap_init_irq(OMAP34XX_IC_BASE, 96); 193 omap_init_irq(OMAP34XX_IC_BASE, 96);
187} 194}
188 195
189void __init ti816x_init_irq(void) 196void __init ti81xx_init_irq(void)
190{ 197{
191 omap_init_irq(OMAP34XX_IC_BASE, 128); 198 omap_init_irq(OMAP34XX_IC_BASE, 128);
192} 199}
193 200
201static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
202{
203 u32 irqnr;
204
205 do {
206 irqnr = readl_relaxed(base_addr + 0x98);
207 if (irqnr)
208 goto out;
209
210 irqnr = readl_relaxed(base_addr + 0xb8);
211 if (irqnr)
212 goto out;
213
214 irqnr = readl_relaxed(base_addr + 0xd8);
215#ifdef CONFIG_SOC_OMAPTI816X
216 if (irqnr)
217 goto out;
218 irqnr = readl_relaxed(base_addr + 0xf8);
219#endif
220
221out:
222 if (!irqnr)
223 break;
224
225 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
226 irqnr &= ACTIVEIRQ_MASK;
227
228 if (irqnr)
229 handle_IRQ(irqnr, regs);
230 } while (irqnr);
231}
232
233asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
234{
235 void __iomem *base_addr = OMAP2_IRQ_BASE;
236 omap_intc_handle_irq(base_addr, regs);
237}
238
194#ifdef CONFIG_ARCH_OMAP3 239#ifdef CONFIG_ARCH_OMAP3
195static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; 240static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
196 241
@@ -263,4 +308,10 @@ void omap3_intc_resume_idle(void)
263 /* Re-enable autoidle */ 308 /* Re-enable autoidle */
264 intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG); 309 intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
265} 310}
311
312asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
313{
314 void __iomem *base_addr = OMAP3_IRQ_BASE;
315 omap_intc_handle_irq(base_addr, regs);
316}
266#endif /* CONFIG_ARCH_OMAP3 */ 317#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index 4976b9393e49..e5a1c3f40a86 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -19,7 +19,8 @@
19#include <linux/smp.h> 19#include <linux/smp.h>
20 20
21#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22#include <mach/omap4-common.h> 22
23#include "common.h"
23 24
24int platform_cpu_kill(unsigned int cpu) 25int platform_cpu_kill(unsigned int cpu)
25{ 26{
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 4412ddb7b3f6..e99bc6cd4714 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -24,7 +24,8 @@
24#include <asm/hardware/gic.h> 24#include <asm/hardware/gic.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/omap4-common.h> 27
28#include "common.h"
28 29
29/* SCU base address */ 30/* SCU base address */
30static void __iomem *scu_base; 31static void __iomem *scu_base;
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 35ac3e5f6e94..beecfdd56ea3 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -22,17 +22,18 @@
22#include <plat/irqs.h> 22#include <plat/irqs.h>
23 23
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <mach/omap4-common.h> 25
26#include "common.h"
26 27
27#ifdef CONFIG_CACHE_L2X0 28#ifdef CONFIG_CACHE_L2X0
28void __iomem *l2cache_base; 29void __iomem *l2cache_base;
29#endif 30#endif
30 31
31void __iomem *gic_dist_base_addr;
32
33
34void __init gic_init_irq(void) 32void __init gic_init_irq(void)
35{ 33{
34 void __iomem *omap_irq_base;
35 void __iomem *gic_dist_base_addr;
36
36 /* Static mapping, never released */ 37 /* Static mapping, never released */
37 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); 38 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
38 BUG_ON(!gic_dist_base_addr); 39 BUG_ON(!gic_dist_base_addr);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 207a2ff9a8c4..529142aff766 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -137,7 +137,7 @@
137#include <linux/mutex.h> 137#include <linux/mutex.h>
138#include <linux/spinlock.h> 138#include <linux/spinlock.h>
139 139
140#include <plat/common.h> 140#include "common.h"
141#include <plat/cpu.h> 141#include <plat/cpu.h>
142#include "clockdomain.h" 142#include "clockdomain.h"
143#include "powerdomain.h" 143#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/opp2xxx.h b/arch/arm/mach-omap2/opp2xxx.h
index 8affc66a92c2..8fae534eb157 100644
--- a/arch/arm/mach-omap2/opp2xxx.h
+++ b/arch/arm/mach-omap2/opp2xxx.h
@@ -51,7 +51,7 @@ struct prcm_config {
51 unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */ 51 unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */
52 unsigned long cm_clksel_mdm; /* modem dividers 2430 only */ 52 unsigned long cm_clksel_mdm; /* modem dividers 2430 only */
53 unsigned long base_sdrc_rfr; /* base refresh timing for a set */ 53 unsigned long base_sdrc_rfr; /* base refresh timing for a set */
54 unsigned char flags; 54 unsigned short flags;
55}; 55};
56 56
57 57
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 00bff46ca48b..1881fe915149 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -18,7 +18,7 @@
18 18
19#include <plat/omap-pm.h> 19#include <plat/omap-pm.h>
20#include <plat/omap_device.h> 20#include <plat/omap_device.h>
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "voltage.h" 23#include "voltage.h"
24#include "powerdomain.h" 24#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index cf0c216132ab..ef8595c80296 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -42,6 +42,7 @@
42#include <plat/dma.h> 42#include <plat/dma.h>
43#include <plat/board.h> 43#include <plat/board.h>
44 44
45#include "common.h"
45#include "prm2xxx_3xxx.h" 46#include "prm2xxx_3xxx.h"
46#include "prm-regbits-24xx.h" 47#include "prm-regbits-24xx.h"
47#include "cm2xxx_3xxx.h" 48#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index efa66494c1e3..fa637dfdda53 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -42,6 +42,7 @@
42#include <plat/gpmc.h> 42#include <plat/gpmc.h>
43#include <plat/dma.h> 43#include <plat/dma.h>
44 44
45#include "common.h"
45#include "cm2xxx_3xxx.h" 46#include "cm2xxx_3xxx.h"
46#include "cm-regbits-34xx.h" 47#include "cm-regbits-34xx.h"
47#include "prm-regbits-34xx.h" 48#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 59a870be8390..8edb015f5618 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -16,8 +16,8 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18 18
19#include "common.h"
19#include "powerdomain.h" 20#include "powerdomain.h"
20#include <mach/omap4-common.h>
21 21
22struct power_state { 22struct power_state {
23 struct powerdomain *pwrdm; 23 struct powerdomain *pwrdm;
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 597e2da831b3..c35e5cea9f8f 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -26,7 +26,7 @@
26#include <linux/export.h> 26#include <linux/export.h>
27 27
28#include <mach/system.h> 28#include <mach/system.h>
29#include <plat/common.h> 29#include "common.h"
30#include <plat/prcm.h> 30#include <plat/prcm.h>
31#include <plat/irqs.h> 31#include <plat/irqs.h>
32 32
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
index 171fe171a749..ca669b50f390 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.c
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -15,7 +15,7 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <plat/common.h> 18#include "common.h"
19 19
20#include "prcm_mpu44xx.h" 20#include "prcm_mpu44xx.h"
21#include "cm-regbits-44xx.h" 21#include "cm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index f02d87f68e54..9a08ba397327 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -16,7 +16,7 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <plat/common.h> 19#include "common.h"
20#include <plat/cpu.h> 20#include <plat/cpu.h>
21#include <plat/prcm.h> 21#include <plat/prcm.h>
22 22
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 495a31a7e8a7..dd885eecf22a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -17,7 +17,7 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/common.h> 20#include "common.h"
21#include <plat/cpu.h> 21#include <plat/cpu.h>
22#include <plat/prcm.h> 22#include <plat/prcm.h>
23 23
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 3a7bab16edd5..f6de5bc6b12a 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -16,7 +16,7 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <plat/common.h> 19#include "common.h"
20 20
21#include "prm44xx.h" 21#include "prm44xx.h"
22#include "prminst44xx.h" 22#include "prminst44xx.h"
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 14caa228bc0d..7479d7ea1379 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SDRC register values for Nokia boards 2 * SDRC register values for Nokia boards
3 * 3 *
4 * Copyright (C) 2008, 2010 Nokia Corporation 4 * Copyright (C) 2008, 2010-2011 Nokia Corporation
5 * 5 *
6 * Lauri Leukkunen <lauri.leukkunen@nokia.com> 6 * Lauri Leukkunen <lauri.leukkunen@nokia.com>
7 * 7 *
@@ -18,7 +18,7 @@
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/io.h> 20#include <plat/io.h>
21#include <plat/common.h> 21#include "common.h"
22#include <plat/clock.h> 22#include <plat/clock.h>
23#include <plat/sdrc.h> 23#include <plat/sdrc.h>
24 24
@@ -107,14 +107,37 @@ static const struct sdram_timings nokia_195dot2mhz_timings[] = {
107 }, 107 },
108}; 108};
109 109
110static const struct sdram_timings nokia_200mhz_timings[] = {
111 {
112 .casl = 3,
113 .tDAL = 30000,
114 .tDPL = 15000,
115 .tRRD = 10000,
116 .tRCD = 20000,
117 .tRP = 15000,
118 .tRAS = 40000,
119 .tRC = 55000,
120 .tRFC = 140000,
121 .tXSR = 200000,
122
123 .tREF = 7800,
124
125 .tXP = 2,
126 .tCKE = 4,
127 .tWTR = 2
128 },
129};
130
110static const struct { 131static const struct {
111 long rate; 132 long rate;
112 struct sdram_timings const *data; 133 struct sdram_timings const *data;
113} nokia_timings[] = { 134} nokia_timings[] = {
114 { 83000000, nokia_166mhz_timings }, 135 { 83000000, nokia_166mhz_timings },
115 { 97600000, nokia_97dot6mhz_timings }, 136 { 97600000, nokia_97dot6mhz_timings },
137 { 100000000, nokia_200mhz_timings },
116 { 166000000, nokia_166mhz_timings }, 138 { 166000000, nokia_166mhz_timings },
117 { 195200000, nokia_195dot2mhz_timings }, 139 { 195200000, nokia_195dot2mhz_timings },
140 { 200000000, nokia_200mhz_timings },
118}; 141};
119static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1]; 142static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1];
120 143
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 8f2782874771..e3d345f46409 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -23,7 +23,7 @@
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h> 24#include <linux/io.h>
25 25
26#include <plat/common.h> 26#include "common.h"
27#include <plat/clock.h> 27#include <plat/clock.h>
28#include <plat/sram.h> 28#include <plat/sram.h>
29 29
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index ccdb010f169d..791a63cdceb2 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,7 +24,7 @@
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include <plat/common.h> 27#include "common.h"
28#include <plat/clock.h> 28#include <plat/clock.h>
29#include <plat/sram.h> 29#include <plat/sram.h>
30 30
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 9992dbfdfdb3..d0f009cbfb50 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -33,7 +33,7 @@
33#include <plat/omap-serial.h> 33#include <plat/omap-serial.h>
34#endif 34#endif
35 35
36#include <plat/common.h> 36#include "common.h"
37#include <plat/board.h> 37#include <plat/board.h>
38#include <plat/clock.h> 38#include <plat/clock.h>
39#include <plat/dma.h> 39#include <plat/dma.h>
@@ -464,7 +464,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
464 mod_timer(&uart->timer, jiffies + uart->timeout); 464 mod_timer(&uart->timer, jiffies + uart->timeout);
465 omap_uart_smart_idle_enable(uart, 0); 465 omap_uart_smart_idle_enable(uart, 0);
466 466
467 if (cpu_is_omap34xx() && !cpu_is_ti816x()) { 467 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) {
468 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD; 468 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
469 u32 wk_mask = 0; 469 u32 wk_mask = 0;
470 u32 padconf = 0; 470 u32 padconf = 0;
@@ -746,7 +746,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
746 */ 746 */
747 uart->regshift = p->regshift; 747 uart->regshift = p->regshift;
748 uart->membase = p->membase; 748 uart->membase = p->membase;
749 if (cpu_is_omap44xx() || cpu_is_ti816x()) 749 if (cpu_is_omap44xx() || cpu_is_ti81xx())
750 uart->errata |= UART_ERRATA_FIFO_FULL_ABORT; 750 uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
751 else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF) 751 else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
752 >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) 752 >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
@@ -828,7 +828,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
828 } 828 }
829 829
830 /* Enable the MDR1 errata for OMAP3 */ 830 /* Enable the MDR1 errata for OMAP3 */
831 if (cpu_is_omap34xx() && !cpu_is_ti816x()) 831 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx()))
832 uart->errata |= UART_ERRATA_i202_MDR1_ACCESS; 832 uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
833} 833}
834 834
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index cf246b39bac7..9dd93453e563 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -26,7 +26,7 @@
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/pm_runtime.h> 27#include <linux/pm_runtime.h>
28 28
29#include <plat/common.h> 29#include "common.h"
30 30
31#include "pm.h" 31#include "pm.h"
32#include "smartreflex.h" 32#include "smartreflex.h"
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 037b0d7d4e05..9edcd520510f 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -41,7 +41,7 @@
41#include <plat/dmtimer.h> 41#include <plat/dmtimer.h>
42#include <asm/localtimer.h> 42#include <asm/localtimer.h>
43#include <asm/sched_clock.h> 43#include <asm/sched_clock.h>
44#include <plat/common.h> 44#include "common.h"
45#include <plat/omap_hwmod.h> 45#include <plat/omap_hwmod.h>
46#include <plat/omap_device.h> 46#include <plat/omap_device.h>
47#include <plat/omap-pm.h> 47#include <plat/omap-pm.h>
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index cfe348e1af0e..a5ec7f8f2ea8 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "prm-regbits-34xx.h" 23#include "prm-regbits-34xx.h"
24#include "voltage.h" 24#include "voltage.h"
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index 2740a968145e..d70b930f2739 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22 22
23#include "prm44xx.h" 23#include "prm44xx.h"
24#include "prm-regbits-44xx.h" 24#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 1f8fdf736e63..8a36342e60d2 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -27,7 +27,7 @@
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29 29
30#include <plat/common.h> 30#include "common.h"
31 31
32#include "prm-regbits-34xx.h" 32#include "prm-regbits-34xx.h"
33#include "prm-regbits-44xx.h" 33#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 071101debbbc..474559d5b072 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21#include <plat/common.h> 21#include "common.h"
22#include <plat/cpu.h> 22#include <plat/cpu.h>
23 23
24#include "prm-regbits-34xx.h" 24#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index c4584e9ac717..4e11d022595d 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -21,7 +21,7 @@
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/init.h> 22#include <linux/init.h>
23 23
24#include <plat/common.h> 24#include "common.h"
25 25
26#include "prm-regbits-44xx.h" 26#include "prm-regbits-44xx.h"
27#include "prm44xx.h" 27#include "prm44xx.h"
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 66bd700a2b98..807391d84a9d 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -1,7 +1,7 @@
1#include <linux/kernel.h> 1#include <linux/kernel.h>
2#include <linux/init.h> 2#include <linux/init.h>
3 3
4#include <plat/common.h> 4#include "common.h"
5 5
6#include "voltage.h" 6#include "voltage.h"
7#include "vp.h" 7#include "vp.h"
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index 260c554b1547..bd89f80089f5 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -19,7 +19,7 @@
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/init.h> 20#include <linux/init.h>
21 21
22#include <plat/common.h> 22#include "common.h"
23 23
24#include "prm-regbits-34xx.h" 24#include "prm-regbits-34xx.h"
25#include "voltage.h" 25#include "voltage.h"
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index b4e77044891e..8c031d16879e 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -19,7 +19,7 @@
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/init.h> 20#include <linux/init.h>
21 21
22#include <plat/common.h> 22#include "common.h"
23 23
24#include "prm44xx.h" 24#include "prm44xx.h"
25#include "prm-regbits-44xx.h" 25#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
index c5196101a237..e9d9afdc2659 100644
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -15,31 +15,6 @@
15 15
16#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
17 17
18static inline void __iomem *
19__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
20{
21 void __iomem *retval;
22 unsigned long offs = paddr - ORION5X_REGS_PHYS_BASE;
23 if (mtype == MT_DEVICE && size && offs < ORION5X_REGS_SIZE &&
24 size <= ORION5X_REGS_SIZE && offs + size <= ORION5X_REGS_SIZE) {
25 retval = (void __iomem *)ORION5X_REGS_VIRT_BASE + offs;
26 } else {
27 retval = __arm_ioremap(paddr, size, mtype);
28 }
29
30 return retval;
31}
32
33static inline void
34__arch_iounmap(void __iomem *addr)
35{
36 if (addr < (void __iomem *)ORION5X_REGS_VIRT_BASE ||
37 addr >= (void __iomem *)(ORION5X_REGS_VIRT_BASE + ORION5X_REGS_SIZE))
38 __iounmap(addr);
39}
40
41#define __arch_ioremap __arch_ioremap
42#define __arch_iounmap __arch_iounmap
43#define __io(a) __typesafe_io(a) 18#define __io(a) __typesafe_io(a)
44#define __mem_pci(a) (a) 19#define __mem_pci(a) (a)
45 20
diff --git a/arch/arm/mach-orion5x/include/mach/vmalloc.h b/arch/arm/mach-orion5x/include/mach/vmalloc.h
deleted file mode 100644
index 06b50aeff7b9..000000000000
--- a/arch/arm/mach-orion5x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfd800000UL
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index 34d08347be5f..ad871bd7b1ab 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -11,6 +11,7 @@
11#include <linux/irqdomain.h> 11#include <linux/irqdomain.h>
12#include <linux/of.h> 12#include <linux/of.h>
13#include <linux/of_address.h> 13#include <linux/of_address.h>
14#include <linux/of_irq.h>
14#include <linux/of_platform.h> 15#include <linux/of_platform.h>
15 16
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
@@ -33,22 +34,20 @@ static const char *picoxcell_dt_match[] = {
33}; 34};
34 35
35static const struct of_device_id vic_of_match[] __initconst = { 36static const struct of_device_id vic_of_match[] __initconst = {
36 { .compatible = "arm,pl192-vic" }, 37 { .compatible = "arm,pl192-vic", .data = vic_of_init, },
37 { /* Sentinel */ } 38 { /* Sentinel */ }
38}; 39};
39 40
40static void __init picoxcell_init_irq(void) 41static void __init picoxcell_init_irq(void)
41{ 42{
42 vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0); 43 of_irq_init(vic_of_match);
43 vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0);
44 irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0);
45 irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32);
46} 44}
47 45
48DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") 46DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
49 .map_io = picoxcell_map_io, 47 .map_io = picoxcell_map_io,
50 .nr_irqs = ARCH_NR_IRQS, 48 .nr_irqs = ARCH_NR_IRQS,
51 .init_irq = picoxcell_init_irq, 49 .init_irq = picoxcell_init_irq,
50 .handle_irq = vic_handle_irq,
52 .timer = &picoxcell_timer, 51 .timer = &picoxcell_timer,
53 .init_machine = picoxcell_init_machine, 52 .init_machine = picoxcell_init_machine,
54 .dt_compat = picoxcell_dt_match, 53 .dt_compat = picoxcell_dt_match,
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
index a6b09f75d9df..9b505ac00be9 100644
--- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
@@ -9,11 +9,8 @@
9 * License version 2. This program is licensed "as is" without any 9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied. 10 * warranty of any kind, whether express or implied.
11 */ 11 */
12#include <mach/hardware.h> 12 .macro disable_fiq
13#include <mach/irqs.h> 13 .endm
14#include <mach/map.h>
15 14
16#define VA_VIC0 IO_ADDRESS(PICOXCELL_VIC0_BASE) 15 .macro arch_ret_to_user, tmp1, tmp2
17#define VA_VIC1 IO_ADDRESS(PICOXCELL_VIC1_BASE) 16 .endm
18
19#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-picoxcell/include/mach/vmalloc.h b/arch/arm/mach-picoxcell/include/mach/vmalloc.h
deleted file mode 100644
index 0216cc4b1f0b..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/vmalloc.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14#define VMALLOC_END 0xfe000000UL
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
index 5dda2bb55f8d..5d6384a6128c 100644
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ b/arch/arm/mach-pnx4008/include/mach/system.h
@@ -32,7 +32,7 @@ static void arch_idle(void)
32 32
33static inline void arch_reset(char mode, const char *cmd) 33static inline void arch_reset(char mode, const char *cmd)
34{ 34{
35 cpu_reset(0); 35 soft_restart(0);
36} 36}
37 37
38#endif 38#endif
diff --git a/arch/arm/mach-pnx4008/include/mach/vmalloc.h b/arch/arm/mach-pnx4008/include/mach/vmalloc.h
deleted file mode 100644
index 184913c71141..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-pnx4008/include/mach/vmalloc.h
3 *
4 * Author: Vitaly Wool <source@mvista.com>
5 *
6 * 2006 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11
12/*
13 * Just any arbitrary offset to the start of the vmalloc VM area: the
14 * current 8MB value just means that there will be a 8MB "hole" after the
15 * physical memory until the kernel virtual memory starts. That means that
16 * any out-of-bounds memory accesses will hopefully be caught.
17 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
18 * area for the same reason. ;)
19 */
20#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-prima2/include/mach/map.h b/arch/arm/mach-prima2/include/mach/map.h
index 66b1ae2e553f..6f243532570c 100644
--- a/arch/arm/mach-prima2/include/mach/map.h
+++ b/arch/arm/mach-prima2/include/mach/map.h
@@ -9,8 +9,10 @@
9#ifndef __MACH_PRIMA2_MAP_H__ 9#ifndef __MACH_PRIMA2_MAP_H__
10#define __MACH_PRIMA2_MAP_H__ 10#define __MACH_PRIMA2_MAP_H__
11 11
12#include <mach/vmalloc.h> 12#include <linux/const.h>
13 13
14#define SIRFSOC_VA(x) (VMALLOC_END + ((x) & 0x00FFF000)) 14#define SIRFSOC_VA_BASE _AC(0xFEC00000, UL)
15
16#define SIRFSOC_VA(x) (SIRFSOC_VA_BASE + ((x) & 0x00FFF000))
15 17
16#endif 18#endif
diff --git a/arch/arm/mach-prima2/include/mach/vmalloc.h b/arch/arm/mach-prima2/include/mach/vmalloc.h
deleted file mode 100644
index c9f90fec78e3..000000000000
--- a/arch/arm/mach-prima2/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/ach-prima2/include/mach/vmalloc.h
3 *
4 * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#ifndef __MACH_VMALLOC_H
10#define __MACH_VMALLOC_H
11
12#include <linux/const.h>
13
14#define VMALLOC_END _AC(0xFEC00000, UL)
15
16#endif
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index a73bc86a3c26..260c0c17692a 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -7,45 +7,9 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <mach/irqs.h>
12 10
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
15 13
16 .macro get_irqnr_preamble, base, tmp
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 15 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
24 mov \tmp, \tmp, lsr #13
25 and \tmp, \tmp, #0x7 @ Core G
26 cmp \tmp, #1
27 bhi 1002f
28
29 @ Core Generation 1 (PXA25x)
30 mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000
31 add \base, \base, #0x00d00000
32 ldr \irqstat, [\base, #0] @ ICIP
33 ldr \irqnr, [\base, #4] @ ICMR
34
35 ands \irqnr, \irqstat, \irqnr
36 beq 1001f
37 rsb \irqstat, \irqnr, #0
38 and \irqstat, \irqstat, \irqnr
39 clz \irqnr, \irqstat
40 rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0))
41 b 1001f
421002:
43 @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
44 mrc p6, 0, \irqstat, c5, c0, 0 @ ICHP
45 tst \irqstat, #0x80000000
46 beq 1001f
47 bic \irqstat, \irqstat, #0x80000000
48 mov \irqnr, \irqstat, lsr #16
49 add \irqnr, \irqnr, #(PXA_IRQ(0))
501001:
51 .endm
diff --git a/arch/arm/mach-pxa/include/mach/vmalloc.h b/arch/arm/mach-pxa/include/mach/vmalloc.h
deleted file mode 100644
index bfecfbf5f460..000000000000
--- a/arch/arm/mach-pxa/include/mach/vmalloc.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/*
2 * arch/arm/mach-pxa/include/mach/vmalloc.h
3 *
4 * Author: Nicolas Pitre
5 * Copyright: (C) 2001 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#define VMALLOC_END (0xe8000000UL)
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index b938fc2c316a..4f47a760398f 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -752,6 +752,7 @@ static void mioa701_machine_exit(void)
752 752
753MACHINE_START(MIOA701, "MIO A701") 753MACHINE_START(MIOA701, "MIO A701")
754 .atag_offset = 0x100, 754 .atag_offset = 0x100,
755 .restart_mode = 's',
755 .map_io = &pxa27x_map_io, 756 .map_io = &pxa27x_map_io,
756 .init_irq = &pxa27x_init_irq, 757 .init_irq = &pxa27x_init_irq,
757 .handle_irq = &pxa27x_handle_irq, 758 .handle_irq = &pxa27x_handle_irq,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 50c833177866..afcb48a5792c 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -420,17 +420,11 @@ static void poodle_poweroff(void)
420 arm_machine_restart('h', NULL); 420 arm_machine_restart('h', NULL);
421} 421}
422 422
423static void poodle_restart(char mode, const char *cmd)
424{
425 arm_machine_restart('h', cmd);
426}
427
428static void __init poodle_init(void) 423static void __init poodle_init(void)
429{ 424{
430 int ret = 0; 425 int ret = 0;
431 426
432 pm_power_off = poodle_poweroff; 427 pm_power_off = poodle_poweroff;
433 arm_pm_restart = poodle_restart;
434 428
435 PCFR |= PCFR_OPDE; 429 PCFR |= PCFR_OPDE;
436 430
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 01e9d643394a..b8bcda15da81 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -88,7 +88,7 @@ void arch_reset(char mode, const char *cmd)
88 switch (mode) { 88 switch (mode) {
89 case 's': 89 case 's':
90 /* Jump into ROM at address 0 */ 90 /* Jump into ROM at address 0 */
91 cpu_reset(0); 91 soft_restart(0);
92 break; 92 break;
93 case 'g': 93 case 'g':
94 do_gpio_reset(); 94 do_gpio_reset();
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 953a9195f9e5..2f57d94de727 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -982,6 +982,7 @@ static void __init spitz_fixup(struct tag *tags, char **cmdline,
982 982
983#ifdef CONFIG_MACH_SPITZ 983#ifdef CONFIG_MACH_SPITZ
984MACHINE_START(SPITZ, "SHARP Spitz") 984MACHINE_START(SPITZ, "SHARP Spitz")
985 .restart_mode = 'g',
985 .fixup = spitz_fixup, 986 .fixup = spitz_fixup,
986 .map_io = pxa27x_map_io, 987 .map_io = pxa27x_map_io,
987 .init_irq = pxa27x_init_irq, 988 .init_irq = pxa27x_init_irq,
@@ -993,6 +994,7 @@ MACHINE_END
993 994
994#ifdef CONFIG_MACH_BORZOI 995#ifdef CONFIG_MACH_BORZOI
995MACHINE_START(BORZOI, "SHARP Borzoi") 996MACHINE_START(BORZOI, "SHARP Borzoi")
997 .restart_mode = 'g',
996 .fixup = spitz_fixup, 998 .fixup = spitz_fixup,
997 .map_io = pxa27x_map_io, 999 .map_io = pxa27x_map_io,
998 .init_irq = pxa27x_init_irq, 1000 .init_irq = pxa27x_init_irq,
@@ -1004,6 +1006,7 @@ MACHINE_END
1004 1006
1005#ifdef CONFIG_MACH_AKITA 1007#ifdef CONFIG_MACH_AKITA
1006MACHINE_START(AKITA, "SHARP Akita") 1008MACHINE_START(AKITA, "SHARP Akita")
1009 .restart_mode = 'g',
1007 .fixup = spitz_fixup, 1010 .fixup = spitz_fixup,
1008 .map_io = pxa27x_map_io, 1011 .map_io = pxa27x_map_io,
1009 .init_irq = pxa27x_init_irq, 1012 .init_irq = pxa27x_init_irq,
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 402b0c96613b..ef6453041cf1 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -970,6 +970,7 @@ static void __init fixup_tosa(struct tag *tags, char **cmdline,
970} 970}
971 971
972MACHINE_START(TOSA, "SHARP Tosa") 972MACHINE_START(TOSA, "SHARP Tosa")
973 .restart_mode = 'g',
973 .fixup = fixup_tosa, 974 .fixup = fixup_tosa,
974 .map_io = pxa25x_map_io, 975 .map_io = pxa25x_map_io,
975 .nr_irqs = TOSA_NR_IRQS, 976 .nr_irqs = TOSA_NR_IRQS,
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
index 4071164aebaa..e8a5179c2653 100644
--- a/arch/arm/mach-realview/include/mach/entry-macro.S
+++ b/arch/arm/mach-realview/include/mach/entry-macro.S
@@ -7,8 +7,6 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <asm/hardware/entry-macro-gic.S>
12 10
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
deleted file mode 100644
index a2a4c6861407..000000000000
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END 0xf8000000UL
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 026c66ad7ec2..1ca944aea7f8 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -91,8 +91,8 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
91 91
92static struct map_desc realview_eb11mp_io_desc[] __initdata = { 92static struct map_desc realview_eb11mp_io_desc[] __initdata = {
93 { 93 {
94 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE), 94 .virtual = IO_ADDRESS(REALVIEW_EB11MP_SCU_BASE),
95 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE), 95 .pfn = __phys_to_pfn(REALVIEW_EB11MP_SCU_BASE),
96 .length = SZ_4K, 96 .length = SZ_4K,
97 .type = MT_DEVICE, 97 .type = MT_DEVICE,
98 }, { 98 }, {
@@ -469,6 +469,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
469 .init_early = realview_init_early, 469 .init_early = realview_init_early,
470 .init_irq = gic_init_irq, 470 .init_irq = gic_init_irq,
471 .timer = &realview_eb_timer, 471 .timer = &realview_eb_timer,
472 .handle_irq = gic_handle_irq,
472 .init_machine = realview_eb_init, 473 .init_machine = realview_eb_init,
473#ifdef CONFIG_ZONE_DMA 474#ifdef CONFIG_ZONE_DMA
474 .dma_zone_size = SZ_256M, 475 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index c057540ec776..bd8fec8b20d9 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -392,6 +392,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
392 .init_early = realview_init_early, 392 .init_early = realview_init_early,
393 .init_irq = gic_init_irq, 393 .init_irq = gic_init_irq,
394 .timer = &realview_pb1176_timer, 394 .timer = &realview_pb1176_timer,
395 .handle_irq = gic_handle_irq,
395 .init_machine = realview_pb1176_init, 396 .init_machine = realview_pb1176_init,
396#ifdef CONFIG_ZONE_DMA 397#ifdef CONFIG_ZONE_DMA
397 .dma_zone_size = SZ_256M, 398 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 671ad6d6ff00..fa73ba81a449 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -366,6 +366,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
366 .init_early = realview_init_early, 366 .init_early = realview_init_early,
367 .init_irq = gic_init_irq, 367 .init_irq = gic_init_irq,
368 .timer = &realview_pb11mp_timer, 368 .timer = &realview_pb11mp_timer,
369 .handle_irq = gic_handle_irq,
369 .init_machine = realview_pb11mp_init, 370 .init_machine = realview_pb11mp_init,
370#ifdef CONFIG_ZONE_DMA 371#ifdef CONFIG_ZONE_DMA
371 .dma_zone_size = SZ_256M, 372 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index cbf22df4ad5b..6e5f2b9ddb7e 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -316,6 +316,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
316 .init_early = realview_init_early, 316 .init_early = realview_init_early,
317 .init_irq = gic_init_irq, 317 .init_irq = gic_init_irq,
318 .timer = &realview_pba8_timer, 318 .timer = &realview_pba8_timer,
319 .handle_irq = gic_handle_irq,
319 .init_machine = realview_pba8_init, 320 .init_machine = realview_pba8_init,
320#ifdef CONFIG_ZONE_DMA 321#ifdef CONFIG_ZONE_DMA
321 .dma_zone_size = SZ_256M, 322 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 63c4114afae9..7aabc21af01c 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -98,8 +98,8 @@ static struct map_desc realview_pbx_io_desc[] __initdata = {
98 98
99static struct map_desc realview_local_io_desc[] __initdata = { 99static struct map_desc realview_local_io_desc[] __initdata = {
100 { 100 {
101 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_CPU_BASE), 101 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_SCU_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_CPU_BASE), 102 .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_SCU_BASE),
103 .length = SZ_4K, 103 .length = SZ_4K,
104 .type = MT_DEVICE, 104 .type = MT_DEVICE,
105 }, { 105 }, {
@@ -399,6 +399,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
399 .init_early = realview_init_early, 399 .init_early = realview_init_early,
400 .init_irq = gic_init_irq, 400 .init_irq = gic_init_irq,
401 .timer = &realview_pbx_timer, 401 .timer = &realview_pbx_timer,
402 .handle_irq = gic_handle_irq,
402 .init_machine = realview_pbx_init, 403 .init_machine = realview_pbx_init,
403#ifdef CONFIG_ZONE_DMA 404#ifdef CONFIG_ZONE_DMA
404 .dma_zone_size = SZ_256M, 405 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
index 45c7b935dc45..a354f4d092c8 100644
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ b/arch/arm/mach-rpc/include/mach/system.h
@@ -23,5 +23,5 @@ static inline void arch_reset(char mode, const char *cmd)
23 /* 23 /*
24 * Jump into the ROM 24 * Jump into the ROM
25 */ 25 */
26 cpu_reset(0); 26 soft_restart(0);
27} 27}
diff --git a/arch/arm/mach-rpc/include/mach/vmalloc.h b/arch/arm/mach-rpc/include/mach/vmalloc.h
deleted file mode 100644
index fb700228637a..000000000000
--- a/arch/arm/mach-rpc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * arch/arm/mach-rpc/include/mach/vmalloc.h
3 *
4 * Copyright (C) 1997 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define VMALLOC_END 0xdc000000UL
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
index 6faadcee7729..913893d44650 100644
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ b/arch/arm/mach-s3c2410/include/mach/system-reset.h
@@ -19,7 +19,7 @@ static void
19arch_reset(char mode, const char *cmd) 19arch_reset(char mode, const char *cmd)
20{ 20{
21 if (mode == 's') { 21 if (mode == 's') {
22 cpu_reset(0); 22 soft_restart(0);
23 } 23 }
24 24
25 if (s3c24xx_reset_hook) 25 if (s3c24xx_reset_hook)
@@ -28,5 +28,5 @@ arch_reset(char mode, const char *cmd)
28 arch_wdt_reset(); 28 arch_wdt_reset();
29 29
30 /* we'll take a jump through zero as a poor second */ 30 /* we'll take a jump through zero as a poor second */
31 cpu_reset(0); 31 soft_restart(0);
32} 32}
diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
deleted file mode 100644
index 7a311e8dddba..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 *
5 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
6 * http://www.simtec.co.uk/products/SWLINUX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C2410 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END 0xF6000000UL
19
20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
index dd362604dcce..dc2bc15142ce 100644
--- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -12,7 +12,8 @@
12 * warranty of any kind, whether express or implied. 12 * warranty of any kind, whether express or implied.
13*/ 13*/
14 14
15#include <mach/map.h> 15 .macro disable_fiq
16#include <mach/irqs.h> 16 .endm
17 17
18#include <asm/entry-macro-vic2.S> 18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index 2e58cb7a7147..d8ca5786ba25 100644
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
@@ -24,7 +24,7 @@ static void arch_reset(char mode, const char *cmd)
24 arch_wdt_reset(); 24 arch_wdt_reset();
25 25
26 /* if all else fails, or mode was for soft, jump to 0 */ 26 /* if all else fails, or mode was for soft, jump to 0 */
27 cpu_reset(0); 27 soft_restart(0);
28} 28}
29 29
30#endif /* __ASM_ARCH_IRQ_H */ 30#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
deleted file mode 100644
index 23f75e556a30..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h
2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 *
5 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
6 * http://www.simtec.co.uk/products/SWLINUX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C6400 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END 0xF6000000UL
19
20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 8eba88e7209e..2bbc14d93428 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -30,6 +30,7 @@
30 30
31#include <video/platform_lcd.h> 31#include <video/platform_lcd.h>
32 32
33#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
35#include <asm/mach/irq.h> 36#include <asm/mach/irq.h>
@@ -236,6 +237,7 @@ MACHINE_START(ANW6410, "A&W6410")
236 .atag_offset = 0x100, 237 .atag_offset = 0x100,
237 238
238 .init_irq = s3c6410_init_irq, 239 .init_irq = s3c6410_init_irq,
240 .handle_irq = vic_handle_irq,
239 .map_io = anw6410_map_io, 241 .map_io = anw6410_map_io,
240 .init_machine = anw6410_machine_init, 242 .init_machine = anw6410_machine_init,
241 .timer = &s3c24xx_timer, 243 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index d04b65448510..988ac2e48f08 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,7 @@
37#include <linux/mfd/wm831x/irq.h> 37#include <linux/mfd/wm831x/irq.h>
38#include <linux/mfd/wm831x/gpio.h> 38#include <linux/mfd/wm831x/gpio.h>
39 39
40#include <asm/hardware/vic.h>
40#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
41#include <asm/mach-types.h> 42#include <asm/mach-types.h>
42 43
@@ -711,6 +712,7 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
711 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ 712 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
712 .atag_offset = 0x100, 713 .atag_offset = 0x100,
713 .init_irq = s3c6410_init_irq, 714 .init_irq = s3c6410_init_irq,
715 .handle_irq = vic_handle_irq,
714 .map_io = crag6410_map_io, 716 .map_io = crag6410_map_io,
715 .init_machine = crag6410_machine_init, 717 .init_machine = crag6410_machine_init,
716 .timer = &s3c24xx_timer, 718 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 952f75ff5deb..c5955f301709 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -29,6 +29,7 @@
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/map.h> 30#include <mach/map.h>
31 31
32#include <asm/hardware/vic.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34 35
@@ -267,6 +268,7 @@ MACHINE_START(HMT, "Airgoo-HMT")
267 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ 268 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */
268 .atag_offset = 0x100, 269 .atag_offset = 0x100,
269 .init_irq = s3c6410_init_irq, 270 .init_irq = s3c6410_init_irq,
271 .handle_irq = vic_handle_irq,
270 .map_io = hmt_map_io, 272 .map_io = hmt_map_io,
271 .init_machine = hmt_machine_init, 273 .init_machine = hmt_machine_init,
272 .timer = &s3c24xx_timer, 274 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 1bc85c359498..4415c85e3f6f 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -24,6 +24,7 @@
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/types.h> 25#include <linux/types.h>
26 26
27#include <asm/hardware/vic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
@@ -345,6 +346,7 @@ MACHINE_START(MINI6410, "MINI6410")
345 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ 346 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
346 .atag_offset = 0x100, 347 .atag_offset = 0x100,
347 .init_irq = s3c6410_init_irq, 348 .init_irq = s3c6410_init_irq,
349 .handle_irq = vic_handle_irq,
348 .map_io = mini6410_map_io, 350 .map_io = mini6410_map_io,
349 .init_machine = mini6410_machine_init, 351 .init_machine = mini6410_machine_init,
350 .timer = &s3c24xx_timer, 352 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index cb13cba98b3d..9b2c610eac2a 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -25,6 +25,7 @@
25 25
26#include <video/platform_lcd.h> 26#include <video/platform_lcd.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
30#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
@@ -99,6 +100,7 @@ MACHINE_START(NCP, "NCP")
99 /* Maintainer: Samsung Electronics */ 100 /* Maintainer: Samsung Electronics */
100 .atag_offset = 0x100, 101 .atag_offset = 0x100,
101 .init_irq = s3c6410_init_irq, 102 .init_irq = s3c6410_init_irq,
103 .handle_irq = vic_handle_irq,
102 .map_io = ncp_map_io, 104 .map_io = ncp_map_io,
103 .init_machine = ncp_machine_init, 105 .init_machine = ncp_machine_init,
104 .timer = &s3c24xx_timer, 106 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 87281e4b8471..dbab49f2713e 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -25,6 +25,7 @@
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/types.h> 26#include <linux/types.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
@@ -326,6 +327,7 @@ MACHINE_START(REAL6410, "REAL6410")
326 .atag_offset = 0x100, 327 .atag_offset = 0x100,
327 328
328 .init_irq = s3c6410_init_irq, 329 .init_irq = s3c6410_init_irq,
330 .handle_irq = vic_handle_irq,
329 .map_io = real6410_map_io, 331 .map_io = real6410_map_io,
330 .init_machine = real6410_machine_init, 332 .init_machine = real6410_machine_init,
331 .timer = &s3c24xx_timer, 333 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 94c831d88365..053945282652 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -17,6 +17,7 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22 23
@@ -148,6 +149,7 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
148 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 149 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
149 .atag_offset = 0x100, 150 .atag_offset = 0x100,
150 .init_irq = s3c6410_init_irq, 151 .init_irq = s3c6410_init_irq,
152 .handle_irq = vic_handle_irq,
151 .map_io = smartq_map_io, 153 .map_io = smartq_map_io,
152 .init_machine = smartq5_machine_init, 154 .init_machine = smartq5_machine_init,
153 .timer = &s3c24xx_timer, 155 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index f112547ce80a..a58d1ba5cba2 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -17,6 +17,7 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22 23
@@ -164,6 +165,7 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
164 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 165 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
165 .atag_offset = 0x100, 166 .atag_offset = 0x100,
166 .init_irq = s3c6410_init_irq, 167 .init_irq = s3c6410_init_irq,
168 .handle_irq = vic_handle_irq,
167 .map_io = smartq_map_io, 169 .map_io = smartq_map_io,
168 .init_machine = smartq7_machine_init, 170 .init_machine = smartq7_machine_init,
169 .timer = &s3c24xx_timer, 171 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index 73450c2b530a..be28a59e3f57 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -22,6 +22,7 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
@@ -88,6 +89,7 @@ MACHINE_START(SMDK6400, "SMDK6400")
88 .atag_offset = 0x100, 89 .atag_offset = 0x100,
89 90
90 .init_irq = s3c6400_init_irq, 91 .init_irq = s3c6400_init_irq,
92 .handle_irq = vic_handle_irq,
91 .map_io = smdk6400_map_io, 93 .map_io = smdk6400_map_io,
92 .init_machine = smdk6400_machine_init, 94 .init_machine = smdk6400_machine_init,
93 .timer = &s3c24xx_timer, 95 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 8bc8edd85e5a..08309155d087 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -43,6 +43,7 @@
43 43
44#include <video/platform_lcd.h> 44#include <video/platform_lcd.h>
45 45
46#include <asm/hardware/vic.h>
46#include <asm/mach/arch.h> 47#include <asm/mach/arch.h>
47#include <asm/mach/map.h> 48#include <asm/mach/map.h>
48#include <asm/mach/irq.h> 49#include <asm/mach/irq.h>
@@ -700,6 +701,7 @@ MACHINE_START(SMDK6410, "SMDK6410")
700 .atag_offset = 0x100, 701 .atag_offset = 0x100,
701 702
702 .init_irq = s3c6410_init_irq, 703 .init_irq = s3c6410_init_irq,
704 .handle_irq = vic_handle_irq,
703 .map_io = smdk6410_map_io, 705 .map_io = smdk6410_map_io,
704 .init_machine = smdk6410_machine_init, 706 .init_machine = smdk6410_machine_init,
705 .timer = &s3c24xx_timer, 707 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
index 10b62b4f8211..fbb246d0a3df 100644
--- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -10,7 +10,8 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <mach/map.h> 13 .macro disable_fiq
14#include <plat/irqs.h> 14 .endm
15 15
16#include <asm/entry-macro-vic2.S> 16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
deleted file mode 100644
index 38dcc71a03cc..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C6400 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END 0xF6000000UL
19
20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 4a1250cd1356..c272c3f7d6de 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -27,6 +27,7 @@
27 27
28#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
29 29
30#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
@@ -242,6 +243,7 @@ MACHINE_START(SMDK6440, "SMDK6440")
242 .atag_offset = 0x100, 243 .atag_offset = 0x100,
243 244
244 .init_irq = s5p6440_init_irq, 245 .init_irq = s5p6440_init_irq,
246 .handle_irq = vic_handle_irq,
245 .map_io = smdk6440_map_io, 247 .map_io = smdk6440_map_io,
246 .init_machine = smdk6440_machine_init, 248 .init_machine = smdk6440_machine_init,
247 .timer = &s5p_timer, 249 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 0ab129ecf009..7a4700959616 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -27,6 +27,7 @@
27 27
28#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
29 29
30#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
@@ -262,6 +263,7 @@ MACHINE_START(SMDK6450, "SMDK6450")
262 .atag_offset = 0x100, 263 .atag_offset = 0x100,
263 264
264 .init_irq = s5p6450_init_irq, 265 .init_irq = s5p6450_init_irq,
266 .handle_irq = vic_handle_irq,
265 .map_io = smdk6450_map_io, 267 .map_io = smdk6450_map_io,
266 .init_machine = smdk6450_machine_init, 268 .init_machine = smdk6450_machine_init,
267 .timer = &s5p_timer, 269 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index ba76af052c81..b8c242edfa22 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -12,39 +12,14 @@
12 * warranty of any kind, whether express or implied. 12 * warranty of any kind, whether express or implied.
13*/ 13*/
14 14
15#include <asm/hardware/vic.h>
16#include <mach/map.h>
17#include <plat/irqs.h>
18
19 .macro disable_fiq 15 .macro disable_fiq
20 .endm 16 .endm
21 17
22 .macro get_irqnr_preamble, base, tmp 18 .macro get_irqnr_preamble, base, tmp
23 ldr \base, =VA_VIC0
24 .endm 19 .endm
25 20
26 .macro arch_ret_to_user, tmp1, tmp2 21 .macro arch_ret_to_user, tmp1, tmp2
27 .endm 22 .endm
28 23
29 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
30
31 @ check the vic0
32 mov \irqnr, # S5P_IRQ_OFFSET + 31
33 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
34 teq \irqstat, #0
35
36 @ otherwise try vic1
37 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
38 addeq \irqnr, \irqnr, #32
39 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
40 teqeq \irqstat, #0
41
42 @ otherwise try vic2
43 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
44 addeq \irqnr, \irqnr, #32
45 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
46 teqeq \irqstat, #0
47
48 clzne \irqstat, \irqstat
49 subne \irqnr, \irqnr, \irqstat
50 .endm 25 .endm
diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
deleted file mode 100644
index 44c8e5726d9d..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* arch/arm/mach-s5pc100/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C6400 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END 0xF6000000UL
16
17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 26f5c91c9427..93ebe3a92d10 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -25,6 +25,7 @@
25#include <linux/input.h> 25#include <linux/input.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
30 31
@@ -250,6 +251,7 @@ MACHINE_START(SMDKC100, "SMDKC100")
250 /* Maintainer: Byungho Min <bhmin@samsung.com> */ 251 /* Maintainer: Byungho Min <bhmin@samsung.com> */
251 .atag_offset = 0x100, 252 .atag_offset = 0x100,
252 .init_irq = s5pc100_init_irq, 253 .init_irq = s5pc100_init_irq,
254 .handle_irq = vic_handle_irq,
253 .map_io = smdkc100_map_io, 255 .map_io = smdkc100_map_io,
254 .init_machine = smdkc100_machine_init, 256 .init_machine = smdkc100_machine_init,
255 .timer = &s3c24xx_timer, 257 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
index 3aa41ac59f07..bebca1b5d0b1 100644
--- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -10,45 +10,8 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <asm/hardware/vic.h>
14#include <mach/map.h>
15#include <plat/irqs.h>
16
17 .macro disable_fiq 13 .macro disable_fiq
18 .endm 14 .endm
19 15
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =VA_VIC0
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2 16 .macro arch_ret_to_user, tmp1, tmp2
25 .endm 17 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 @ check the vic0
30 mov \irqnr, # S5P_IRQ_OFFSET + 31
31 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
32 teq \irqstat, #0
33
34 @ otherwise try vic1
35 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
36 addeq \irqnr, \irqnr, #32
37 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
38 teqeq \irqstat, #0
39
40 @ otherwise try vic2
41 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
42 addeq \irqnr, \irqnr, #32
43 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
44 teqeq \irqstat, #0
45
46 @ otherwise try vic3
47 addeq \tmp, \base, #(VA_VIC3 - VA_VIC0)
48 addeq \irqnr, \irqnr, #32
49 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
50 teqeq \irqstat, #0
51
52 clzne \irqstat, \irqstat
53 subne \irqnr, \irqnr, \irqstat
54 .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
deleted file mode 100644
index a6c659d68a5d..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com/
7 *
8 * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h
9 *
10 * S5PV210 vmalloc definition
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#ifndef __ASM_ARCH_VMALLOC_H
18#define __ASM_ARCH_VMALLOC_H __FILE__
19
20#define VMALLOC_END 0xF6000000UL
21
22#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 5811a96125f0..71ca95604d63 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -22,6 +22,7 @@
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24 24
25#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/setup.h> 28#include <asm/setup.h>
@@ -680,6 +681,7 @@ MACHINE_START(AQUILA, "Aquila")
680 Kyungmin Park <kyungmin.park@samsung.com> */ 681 Kyungmin Park <kyungmin.park@samsung.com> */
681 .atag_offset = 0x100, 682 .atag_offset = 0x100,
682 .init_irq = s5pv210_init_irq, 683 .init_irq = s5pv210_init_irq,
684 .handle_irq = vic_handle_irq,
683 .map_io = aquila_map_io, 685 .map_io = aquila_map_io,
684 .init_machine = aquila_machine_init, 686 .init_machine = aquila_machine_init,
685 .timer = &s5p_timer, 687 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 15edcae448b9..448fd9ea96f2 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -27,6 +27,7 @@
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29 29
30#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -956,6 +957,7 @@ MACHINE_START(GONI, "GONI")
956 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ 957 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
957 .atag_offset = 0x100, 958 .atag_offset = 0x100,
958 .init_irq = s5pv210_init_irq, 959 .init_irq = s5pv210_init_irq,
960 .handle_irq = vic_handle_irq,
959 .map_io = goni_map_io, 961 .map_io = goni_map_io,
960 .init_machine = goni_machine_init, 962 .init_machine = goni_machine_init,
961 .timer = &s5p_timer, 963 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index f7266bb0cac8..c2531ffc720b 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -15,6 +15,7 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/sysdev.h> 16#include <linux/sysdev.h>
17 17
18#include <asm/hardware/vic.h>
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 20#include <asm/mach/map.h>
20#include <asm/setup.h> 21#include <asm/setup.h>
@@ -138,6 +139,7 @@ MACHINE_START(SMDKC110, "SMDKC110")
138 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 139 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
139 .atag_offset = 0x100, 140 .atag_offset = 0x100,
140 .init_irq = s5pv210_init_irq, 141 .init_irq = s5pv210_init_irq,
142 .handle_irq = vic_handle_irq,
141 .map_io = smdkc110_map_io, 143 .map_io = smdkc110_map_io,
142 .init_machine = smdkc110_machine_init, 144 .init_machine = smdkc110_machine_init,
143 .timer = &s5p_timer, 145 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index a9106c392398..4ca77c41d499 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22 22
23#include <asm/hardware/vic.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25#include <asm/setup.h> 26#include <asm/setup.h>
@@ -315,6 +316,7 @@ MACHINE_START(SMDKV210, "SMDKV210")
315 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 316 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
316 .atag_offset = 0x100, 317 .atag_offset = 0x100,
317 .init_irq = s5pv210_init_irq, 318 .init_irq = s5pv210_init_irq,
319 .handle_irq = vic_handle_irq,
318 .map_io = smdkv210_map_io, 320 .map_io = smdkv210_map_io,
319 .init_machine = smdkv210_machine_init, 321 .init_machine = smdkv210_machine_init,
320 .timer = &s5p_timer, 322 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 97cc066c5369..df70fcb34516 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16 16
17#include <asm/hardware/vic.h>
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 19#include <asm/mach/map.h>
19#include <asm/setup.h> 20#include <asm/setup.h>
@@ -127,6 +128,7 @@ MACHINE_START(TORBRECK, "TORBRECK")
127 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ 128 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
128 .atag_offset = 0x100, 129 .atag_offset = 0x100,
129 .init_irq = s5pv210_init_irq, 130 .init_irq = s5pv210_init_irq,
131 .handle_irq = vic_handle_irq,
130 .map_io = torbreck_map_io, 132 .map_io = torbreck_map_io,
131 .init_machine = torbreck_machine_init, 133 .init_machine = torbreck_machine_init,
132 .timer = &s5p_timer, 134 .timer = &s5p_timer,
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
index ba9da9f7f183..345d35b7450c 100644
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ b/arch/arm/mach-sa1100/include/mach/system.h
@@ -14,7 +14,7 @@ static inline void arch_reset(char mode, const char *cmd)
14{ 14{
15 if (mode == 's') { 15 if (mode == 's') {
16 /* Jump into ROM at address 0 */ 16 /* Jump into ROM at address 0 */
17 cpu_reset(0); 17 soft_restart(0);
18 } else { 18 } else {
19 /* Use on-chip reset capability */ 19 /* Use on-chip reset capability */
20 RSRR = RSRR_SWR; 20 RSRR = RSRR_SWR;
diff --git a/arch/arm/mach-sa1100/include/mach/vmalloc.h b/arch/arm/mach-sa1100/include/mach/vmalloc.h
deleted file mode 100644
index b3d002398480..000000000000
--- a/arch/arm/mach-sa1100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1/*
2 * arch/arm/mach-sa1100/include/mach/vmalloc.h
3 */
4#define VMALLOC_END (0xe8000000UL)
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index feda3ca7fc95..f4b25d875f3d 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -29,7 +29,6 @@
29void arch_reset(char mode, const char *cmd) 29void arch_reset(char mode, const char *cmd)
30{ 30{
31 short temp; 31 short temp;
32 local_irq_disable();
33 /* Reset the Machine via pc[3] of the sequoia chipset */ 32 /* Reset the Machine via pc[3] of the sequoia chipset */
34 outw(0x09,0x24); 33 outw(0x09,0x24);
35 temp=inw(0x26); 34 temp=inw(0x26);
diff --git a/arch/arm/mach-shark/include/mach/vmalloc.h b/arch/arm/mach-shark/include/mach/vmalloc.h
deleted file mode 100644
index b10df988526d..000000000000
--- a/arch/arm/mach-shark/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1/*
2 * arch/arm/mach-shark/include/mach/vmalloc.h
3 */
4#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 737bdc631b0d..5ca1f9d66995 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -28,7 +28,6 @@ pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o
28obj-$(CONFIG_ARCH_SH7367) += entry-intc.o 28obj-$(CONFIG_ARCH_SH7367) += entry-intc.o
29obj-$(CONFIG_ARCH_SH7377) += entry-intc.o 29obj-$(CONFIG_ARCH_SH7377) += entry-intc.o
30obj-$(CONFIG_ARCH_SH7372) += entry-intc.o 30obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
31obj-$(CONFIG_ARCH_SH73A0) += entry-gic.o
32 31
33# PM objects 32# PM objects
34obj-$(CONFIG_SUSPEND) += suspend.o 33obj-$(CONFIG_SUSPEND) += suspend.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index b862e9f81e3e..202c3c6ec9d8 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -608,7 +608,7 @@ struct sys_timer ag5evm_timer = {
608MACHINE_START(AG5EVM, "ag5evm") 608MACHINE_START(AG5EVM, "ag5evm")
609 .map_io = ag5evm_map_io, 609 .map_io = ag5evm_map_io,
610 .init_irq = sh73a0_init_irq, 610 .init_irq = sh73a0_init_irq,
611 .handle_irq = shmobile_handle_irq_gic, 611 .handle_irq = gic_handle_irq,
612 .init_machine = ag5evm_init, 612 .init_machine = ag5evm_init,
613 .timer = &ag5evm_timer, 613 .timer = &ag5evm_timer,
614MACHINE_END 614MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index bd9a78424d6b..1b4439d3f9d5 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -448,7 +448,7 @@ struct sys_timer kota2_timer = {
448MACHINE_START(KOTA2, "kota2") 448MACHINE_START(KOTA2, "kota2")
449 .map_io = kota2_map_io, 449 .map_io = kota2_map_io,
450 .init_irq = kota2_init_irq, 450 .init_irq = kota2_init_irq,
451 .handle_irq = shmobile_handle_irq_gic, 451 .handle_irq = gic_handle_irq,
452 .init_machine = kota2_init, 452 .init_machine = kota2_init,
453 .timer = &kota2_timer, 453 .timer = &kota2_timer,
454MACHINE_END 454MACHINE_END
diff --git a/arch/arm/mach-shmobile/entry-gic.S b/arch/arm/mach-shmobile/entry-gic.S
deleted file mode 100644
index e20239b08c83..000000000000
--- a/arch/arm/mach-shmobile/entry-gic.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * ARM Interrupt demux handler using GIC
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2011 Paul Mundt
6 * Copyright (C) 2010 - 2011 Renesas Solutions Corp.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <asm/assembler.h>
14#include <asm/entry-macro-multi.S>
15#include <asm/hardware/gic.h>
16#include <asm/hardware/entry-macro-gic.S>
17
18 arch_irq_handler shmobile_handle_irq_gic
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 834bd6cd508f..4bf82c156771 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -7,7 +7,6 @@ extern void shmobile_secondary_vector(void);
7struct clk; 7struct clk;
8extern int clk_init(void); 8extern int clk_init(void);
9extern void shmobile_handle_irq_intc(struct pt_regs *); 9extern void shmobile_handle_irq_intc(struct pt_regs *);
10extern void shmobile_handle_irq_gic(struct pt_regs *);
11extern struct platform_suspend_ops shmobile_suspend_ops; 10extern struct platform_suspend_ops shmobile_suspend_ops;
12struct cpuidle_driver; 11struct cpuidle_driver;
13extern void (*shmobile_cpuidle_modes[])(void); 12extern void (*shmobile_cpuidle_modes[])(void);
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
index 8d4a416d4285..2a57b2964ee9 100644
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -18,14 +18,5 @@
18 .macro disable_fiq 18 .macro disable_fiq
19 .endm 19 .endm
20 20
21 .macro get_irqnr_preamble, base, tmp
22 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 .endm
26
27 .macro test_for_ipi, irqnr, irqstat, base, tmp
28 .endm
29
30 .macro arch_ret_to_user, tmp1, tmp2 21 .macro arch_ret_to_user, tmp1, tmp2
31 .endm 22 .endm
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
index 76a687eeaa22..956ac18ddbf9 100644
--- a/arch/arm/mach-shmobile/include/mach/system.h
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -8,7 +8,7 @@ static inline void arch_idle(void)
8 8
9static inline void arch_reset(char mode, const char *cmd) 9static inline void arch_reset(char mode, const char *cmd)
10{ 10{
11 cpu_reset(0); 11 soft_restart(0);
12} 12}
13 13
14#endif 14#endif
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
deleted file mode 100644
index 2b8fd8b942fe..000000000000
--- a/arch/arm/mach-shmobile/include/mach/vmalloc.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_MACH_VMALLOC_H
2#define __ASM_MACH_VMALLOC_H
3
4/* Vmalloc at ... - 0xe5ffffff */
5#define VMALLOC_END 0xe6000000UL
6
7#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 53da4224ba3d..de3bb41c8e9e 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,35 +11,8 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
15#include <mach/hardware.h>
16
17 .macro disable_fiq 14 .macro disable_fiq
18 .endm 15 .endm
19 16
20 .macro get_irqnr_preamble, base, tmp
21 .endm
22
23 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 18 .endm
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE
28 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
29 teq \irqstat, #0
30 beq 1001f @ this will set/reset
31 @ zero register
32 /*
33 * Following code will find bit position of least significang
34 * bit set in irqstat, using following equation
35 * least significant bit set in n = (n & ~(n-1))
36 */
37 sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
38 mvn \tmp, \tmp @ tmp = ~tmp
39 and \irqstat, \irqstat, \tmp @ irqstat &= tmp
40 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
41 clz \tmp, \irqstat @ tmp = leading zeros
42 rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1
43
441001: /* EQ will be set if no irqs pending */
45 .endm
diff --git a/arch/arm/mach-spear3xx/include/mach/vmalloc.h b/arch/arm/mach-spear3xx/include/mach/vmalloc.h
deleted file mode 100644
index df977b3c9a63..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_VMALLOC_H
15#define __MACH_VMALLOC_H
16
17#include <plat/vmalloc.h>
18
19#endif /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index a5ff98eed1db..61068ba67923 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
67 .atag_offset = 0x100, 68 .atag_offset = 0x100,
68 .map_io = spear3xx_map_io, 69 .map_io = spear3xx_map_io,
69 .init_irq = spear3xx_init_irq, 70 .init_irq = spear3xx_init_irq,
71 .handle_irq = vic_handle_irq,
70 .timer = &spear3xx_timer, 72 .timer = &spear3xx_timer,
71 .init_machine = spear300_evb_init, 73 .init_machine = spear300_evb_init,
72MACHINE_END 74MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 45d180d59362..7903abe92bf6 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
73 .atag_offset = 0x100, 74 .atag_offset = 0x100,
74 .map_io = spear3xx_map_io, 75 .map_io = spear3xx_map_io,
75 .init_irq = spear3xx_init_irq, 76 .init_irq = spear3xx_init_irq,
77 .handle_irq = vic_handle_irq,
76 .timer = &spear3xx_timer, 78 .timer = &spear3xx_timer,
77 .init_machine = spear310_evb_init, 79 .init_machine = spear310_evb_init,
78MACHINE_END 80MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 22879848d73a..e9751f970933 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
71 .atag_offset = 0x100, 72 .atag_offset = 0x100,
72 .map_io = spear3xx_map_io, 73 .map_io = spear3xx_map_io,
73 .init_irq = spear3xx_init_irq, 74 .init_irq = spear3xx_init_irq,
75 .handle_irq = vic_handle_irq,
74 .timer = &spear3xx_timer, 76 .timer = &spear3xx_timer,
75 .init_machine = spear320_evb_init, 77 .init_machine = spear320_evb_init,
76MACHINE_END 78MACHINE_END
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index 8a0b0ed7b203..d490a910d925 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -11,44 +11,8 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
15#include <mach/hardware.h>
16
17 .macro disable_fiq 14 .macro disable_fiq
18 .endm 15 .endm
19 16
20 .macro get_irqnr_preamble, base, tmp
21 .endm
22
23 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 18 .endm
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
28 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
29 mov \irqnr, #0
30 teq \irqstat, #0
31 bne 1001f
32 ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
33 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
34 teq \irqstat, #0
35 beq 1002f @ this will set/reset
36 @ zero register
37 mov \irqnr, #32
381001:
39 /*
40 * Following code will find bit position of least significang
41 * bit set in irqstat, using following equation
42 * least significant bit set in n = (n & ~(n-1))
43 */
44 sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
45 mvn \tmp, \tmp @ tmp = ~tmp
46 and \irqstat, \irqstat, \tmp @ irqstat &= tmp
47 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
48 clz \tmp, \irqstat @ tmp = leading zeros
49
50 rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1
51 add \irqnr, \irqnr, \tmp
52
531002: /* EQ will be set if no irqs pending */
54 .endm
diff --git a/arch/arm/mach-spear6xx/include/mach/vmalloc.h b/arch/arm/mach-spear6xx/include/mach/vmalloc.h
deleted file mode 100644
index 4a0b56cb2a91..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_VMALLOC_H
15#define __MACH_VMALLOC_H
16
17#include <plat/vmalloc.h>
18
19#endif /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index 8238fe38e713..ff139ed0a61e 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -46,6 +47,7 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
46 .atag_offset = 0x100, 47 .atag_offset = 0x100,
47 .map_io = spear6xx_map_io, 48 .map_io = spear6xx_map_io,
48 .init_irq = spear6xx_init_irq, 49 .init_irq = spear6xx_init_irq,
50 .handle_irq = vic_handle_irq,
49 .timer = &spear6xx_timer, 51 .timer = &spear6xx_timer,
50 .init_machine = spear600_evb_init, 52 .init_machine = spear600_evb_init,
51MACHINE_END 53MACHINE_END
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index 74743ad3d2d3..f6f03ce340fc 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -32,6 +32,7 @@
32#include <linux/i2c.h> 32#include <linux/i2c.h>
33#include <linux/i2c-tegra.h> 33#include <linux/i2c-tegra.h>
34 34
35#include <asm/hardware/gic.h>
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
37#include <asm/mach/time.h> 38#include <asm/mach/time.h>
@@ -130,6 +131,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
130 .map_io = tegra_map_common_io, 131 .map_io = tegra_map_common_io,
131 .init_early = tegra_init_early, 132 .init_early = tegra_init_early,
132 .init_irq = tegra_init_irq, 133 .init_irq = tegra_init_irq,
134 .handle_irq = gic_handle_irq,
133 .timer = &tegra_timer, 135 .timer = &tegra_timer,
134 .init_machine = tegra_dt_init, 136 .init_machine = tegra_dt_init,
135 .dt_compat = tegra_dt_board_compat, 137 .dt_compat = tegra_dt_board_compat,
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index f0bdc5e3fe52..fd190a8dc665 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -31,6 +31,7 @@
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <asm/mach/time.h> 33#include <asm/mach/time.h>
34#include <asm/hardware/gic.h>
34#include <asm/setup.h> 35#include <asm/setup.h>
35 36
36#include <mach/tegra_wm8903_pdata.h> 37#include <mach/tegra_wm8903_pdata.h>
@@ -187,6 +188,7 @@ MACHINE_START(HARMONY, "harmony")
187 .map_io = tegra_map_common_io, 188 .map_io = tegra_map_common_io,
188 .init_early = tegra_init_early, 189 .init_early = tegra_init_early,
189 .init_irq = tegra_init_irq, 190 .init_irq = tegra_init_irq,
191 .handle_irq = gic_handle_irq,
190 .timer = &tegra_timer, 192 .timer = &tegra_timer,
191 .init_machine = tegra_harmony_init, 193 .init_machine = tegra_harmony_init,
192MACHINE_END 194MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 55c55ba89f1e..0b7e1cfee70d 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -29,6 +29,7 @@
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/rfkill-gpio.h> 30#include <linux/rfkill-gpio.h>
31 31
32#include <asm/hardware/gic.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/time.h> 35#include <asm/mach/time.h>
@@ -190,6 +191,7 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
190 .map_io = tegra_map_common_io, 191 .map_io = tegra_map_common_io,
191 .init_early = tegra_init_early, 192 .init_early = tegra_init_early,
192 .init_irq = tegra_init_irq, 193 .init_irq = tegra_init_irq,
194 .handle_irq = gic_handle_irq,
193 .timer = &tegra_timer, 195 .timer = &tegra_timer,
194 .init_machine = tegra_paz00_init, 196 .init_machine = tegra_paz00_init,
195MACHINE_END 197MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index bf13ea355efc..7328379b1356 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -34,6 +34,7 @@
34 34
35#include <asm/mach-types.h> 35#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
37#include <asm/hardware/gic.h>
37 38
38#include "board.h" 39#include "board.h"
39#include "board-seaboard.h" 40#include "board-seaboard.h"
@@ -284,6 +285,7 @@ MACHINE_START(SEABOARD, "seaboard")
284 .map_io = tegra_map_common_io, 285 .map_io = tegra_map_common_io,
285 .init_early = tegra_init_early, 286 .init_early = tegra_init_early,
286 .init_irq = tegra_init_irq, 287 .init_irq = tegra_init_irq,
288 .handle_irq = gic_handle_irq,
287 .timer = &tegra_timer, 289 .timer = &tegra_timer,
288 .init_machine = tegra_seaboard_init, 290 .init_machine = tegra_seaboard_init,
289MACHINE_END 291MACHINE_END
@@ -293,6 +295,7 @@ MACHINE_START(KAEN, "kaen")
293 .map_io = tegra_map_common_io, 295 .map_io = tegra_map_common_io,
294 .init_early = tegra_init_early, 296 .init_early = tegra_init_early,
295 .init_irq = tegra_init_irq, 297 .init_irq = tegra_init_irq,
298 .handle_irq = gic_handle_irq,
296 .timer = &tegra_timer, 299 .timer = &tegra_timer,
297 .init_machine = tegra_kaen_init, 300 .init_machine = tegra_kaen_init,
298MACHINE_END 301MACHINE_END
@@ -302,6 +305,7 @@ MACHINE_START(WARIO, "wario")
302 .map_io = tegra_map_common_io, 305 .map_io = tegra_map_common_io,
303 .init_early = tegra_init_early, 306 .init_early = tegra_init_early,
304 .init_irq = tegra_init_irq, 307 .init_irq = tegra_init_irq,
308 .handle_irq = gic_handle_irq,
305 .timer = &tegra_timer, 309 .timer = &tegra_timer,
306 .init_machine = tegra_wario_init, 310 .init_machine = tegra_wario_init,
307MACHINE_END 311MACHINE_END
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 1a6617b7806f..60a36a2e0be1 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -26,6 +26,7 @@
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28 28
29#include <asm/hardware/gic.h>
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/setup.h> 32#include <asm/setup.h>
@@ -176,6 +177,7 @@ MACHINE_START(TRIMSLICE, "trimslice")
176 .map_io = tegra_map_common_io, 177 .map_io = tegra_map_common_io,
177 .init_early = tegra_init_early, 178 .init_early = tegra_init_early,
178 .init_irq = tegra_init_irq, 179 .init_irq = tegra_init_irq,
180 .handle_irq = gic_handle_irq,
179 .timer = &tegra_timer, 181 .timer = &tegra_timer,
180 .init_machine = tegra_trimslice_init, 182 .init_machine = tegra_trimslice_init,
181MACHINE_END 183MACHINE_END
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index dd165c53889d..ac11262149c7 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -12,30 +12,15 @@
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 */ 14 */
15#include <mach/iomap.h>
16#include <mach/io.h>
17
18#if defined(CONFIG_ARM_GIC)
19#define HAVE_GET_IRQNR_PREAMBLE
20#include <asm/hardware/entry-macro-gic.S>
21
22 /* Uses the GIC interrupt controller built into the cpu */
23#define ICTRL_BASE (IO_CPU_VIRT + 0x100)
24 15
25 .macro disable_fiq 16 .macro disable_fiq
26 .endm 17 .endm
27 18
28 .macro get_irqnr_preamble, base, tmp 19 .macro arch_ret_to_user, tmp1, tmp2
29 movw \base, #(ICTRL_BASE & 0x0000ffff)
30 movt \base, #((ICTRL_BASE & 0xffff0000) >> 16)
31 .endm 20 .endm
32 21
33 .macro arch_ret_to_user, tmp1, tmp2 22#if !defined(CONFIG_ARM_GIC)
34 .endm
35#else
36 /* legacy interrupt controller for AP16 */ 23 /* legacy interrupt controller for AP16 */
37 .macro disable_fiq
38 .endm
39 24
40 .macro get_irqnr_preamble, base, tmp 25 .macro get_irqnr_preamble, base, tmp
41 @ enable imprecise aborts 26 @ enable imprecise aborts
@@ -46,9 +31,6 @@
46 orr \base, #0x0000f000 31 orr \base, #0x0000f000
47 .endm 32 .endm
48 33
49 .macro arch_ret_to_user, tmp1, tmp2
50 .endm
51
52 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 34 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
53 ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS 35 ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS
54 cmp \irqnr, #0x80 36 cmp \irqnr, #0x80
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index 35a011fbc42d..f15defffb5d2 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -71,12 +71,6 @@
71 71
72#ifndef __ASSEMBLER__ 72#ifndef __ASSEMBLER__
73 73
74#define __arch_ioremap tegra_ioremap
75#define __arch_iounmap tegra_iounmap
76
77void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
78void tegra_iounmap(volatile void __iomem *addr);
79
80#define IO_ADDRESS(n) (IO_TO_VIRT(n)) 74#define IO_ADDRESS(n) (IO_TO_VIRT(n))
81 75
82#ifdef CONFIG_TEGRA_PCI 76#ifdef CONFIG_TEGRA_PCI
diff --git a/arch/arm/mach-tegra/include/mach/vmalloc.h b/arch/arm/mach-tegra/include/mach/vmalloc.h
deleted file mode 100644
index fd6aa65b2dc6..000000000000
--- a/arch/arm/mach-tegra/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-tegra/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 * Erik Gilling <konkers@google.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#ifndef __MACH_TEGRA_VMALLOC_H
22#define __MACH_TEGRA_VMALLOC_H
23
24#include <asm/sizes.h>
25
26#define VMALLOC_END 0xFE000000UL
27
28#endif
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 5489f8b5d6ad..d23ee2db2827 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -60,24 +60,3 @@ void __init tegra_map_common_io(void)
60{ 60{
61 iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc)); 61 iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc));
62} 62}
63
64/*
65 * Intercept ioremap() requests for addresses in our fixed mapping regions.
66 */
67void __iomem *tegra_ioremap(unsigned long p, size_t size, unsigned int type)
68{
69 void __iomem *v = IO_ADDRESS(p);
70 if (v == NULL)
71 v = __arm_ioremap(p, size, type);
72 return v;
73}
74EXPORT_SYMBOL(tegra_ioremap);
75
76void tegra_iounmap(volatile void __iomem *addr)
77{
78 unsigned long virt = (unsigned long)addr;
79
80 if (virt >= VMALLOC_START && virt < VMALLOC_END)
81 __iounmap(addr);
82}
83EXPORT_SYMBOL(tegra_iounmap);
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
index 20731ae39d38..7181d6ac6651 100644
--- a/arch/arm/mach-u300/include/mach/entry-macro.S
+++ b/arch/arm/mach-u300/include/mach/entry-macro.S
@@ -8,33 +8,9 @@
8 * Low-level IRQ helper macros for ST-Ericsson U300 8 * Low-level IRQ helper macros for ST-Ericsson U300
9 * Author: Linus Walleij <linus.walleij@stericsson.com> 9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */ 10 */
11#include <mach/hardware.h>
12#include <asm/hardware/vic.h>
13 11
14 .macro disable_fiq 12 .macro disable_fiq
15 .endm 13 .endm
16 14
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 16 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
25 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
26 mov \irqnr, #0
27 teq \irqstat, #0
28 bne 1002f
291001: ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
30 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
31 mov \irqnr, #32
32 teq \irqstat, #0
33 beq 1003f
341002: tst \irqstat, #1
35 bne 1003f
36 add \irqnr, \irqnr, #1
37 movs \irqstat, \irqstat, lsr #1
38 bne 1002b
391003: /* EQ will be set if no irqs pending */
40 .endm
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
index 8daf13634ce0..6b6fef7a438c 100644
--- a/arch/arm/mach-u300/include/mach/system.h
+++ b/arch/arm/mach-u300/include/mach/system.h
@@ -27,8 +27,6 @@ static void arch_reset(char mode, const char *cmd)
27 case 's': 27 case 's':
28 case 'h': 28 case 'h':
29 printk(KERN_CRIT "RESET: shutting down/rebooting system\n"); 29 printk(KERN_CRIT "RESET: shutting down/rebooting system\n");
30 /* Disable interrupts */
31 local_irq_disable();
32#ifdef CONFIG_COH901327_WATCHDOG 30#ifdef CONFIG_COH901327_WATCHDOG
33 coh901327_watchdog_reset(); 31 coh901327_watchdog_reset();
34#endif 32#endif
diff --git a/arch/arm/mach-u300/include/mach/vmalloc.h b/arch/arm/mach-u300/include/mach/vmalloc.h
deleted file mode 100644
index ec423b92b81d..000000000000
--- a/arch/arm/mach-u300/include/mach/vmalloc.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/*
2 *
3 * arch/arm/mach-u300/include/mach/vmalloc.h
4 *
5 *
6 * Copyright (C) 2006-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * Virtual memory allocations
9 * End must be above the I/O registers and on an even 2MiB boundary.
10 * Author: Linus Walleij <linus.walleij@stericsson.com>
11 */
12#define VMALLOC_END 0xfe800000UL
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index 89422ee7f3a8..4a4fd334eb6e 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -19,6 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <mach/platform.h> 21#include <mach/platform.h>
22#include <asm/hardware/vic.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/memory.h> 25#include <asm/memory.h>
@@ -49,6 +50,7 @@ MACHINE_START(U300, MACH_U300_STRING)
49 .atag_offset = BOOT_PARAMS_OFFSET, 50 .atag_offset = BOOT_PARAMS_OFFSET,
50 .map_io = u300_map_io, 51 .map_io = u300_map_io,
51 .init_irq = u300_init_irq, 52 .init_irq = u300_init_irq,
53 .handle_irq = vic_handle_irq,
52 .timer = &u300_timer, 54 .timer = &u300_timer,
53 .init_machine = u300_init_machine, 55 .init_machine = u300_init_machine,
54MACHINE_END 56MACHINE_END
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bdd7b80dd7ad..de1f5f8f7330 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -33,6 +33,7 @@
33#include <linux/leds.h> 33#include <linux/leds.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/hardware/gic.h>
36 37
37#include <plat/i2c.h> 38#include <plat/i2c.h>
38#include <plat/ste_dma40.h> 39#include <plat/ste_dma40.h>
@@ -695,6 +696,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
695 .init_irq = ux500_init_irq, 696 .init_irq = ux500_init_irq,
696 /* we re-use nomadik timer here */ 697 /* we re-use nomadik timer here */
697 .timer = &ux500_timer, 698 .timer = &ux500_timer,
699 .handle_irq = gic_handle_irq,
698 .init_machine = mop500_init_machine, 700 .init_machine = mop500_init_machine,
699MACHINE_END 701MACHINE_END
700 702
@@ -703,6 +705,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
703 .map_io = u8500_map_io, 705 .map_io = u8500_map_io,
704 .init_irq = ux500_init_irq, 706 .init_irq = ux500_init_irq,
705 .timer = &ux500_timer, 707 .timer = &ux500_timer,
708 .handle_irq = gic_handle_irq,
706 .init_machine = hrefv60_init_machine, 709 .init_machine = hrefv60_init_machine,
707MACHINE_END 710MACHINE_END
708 711
@@ -712,5 +715,6 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
712 .init_irq = ux500_init_irq, 715 .init_irq = ux500_init_irq,
713 /* we re-use nomadik timer here */ 716 /* we re-use nomadik timer here */
714 .timer = &ux500_timer, 717 .timer = &ux500_timer,
718 .handle_irq = gic_handle_irq,
715 .init_machine = snowball_init_machine, 719 .init_machine = snowball_init_machine,
716MACHINE_END 720MACHINE_END
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index 82025ba70c03..fe1569b67c91 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -12,6 +12,7 @@
12#include <linux/i2c.h> 12#include <linux/i2c.h>
13#include <linux/mfd/ab5500/ab5500.h> 13#include <linux/mfd/ab5500/ab5500.h>
14 14
15#include <asm/hardware/gic.h>
15#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
16#include <asm/mach-types.h> 17#include <asm/mach-types.h>
17 18
@@ -149,5 +150,6 @@ MACHINE_START(U5500, "ST-Ericsson U5500 Platform")
149 .map_io = u5500_map_io, 150 .map_io = u5500_map_io,
150 .init_irq = ux500_init_irq, 151 .init_irq = ux500_init_irq,
151 .timer = &ux500_timer, 152 .timer = &ux500_timer,
153 .handle_irq = gic_handle_irq,
152 .init_machine = u5500_init_machine, 154 .init_machine = u5500_init_machine,
153MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index 071bba94f727..e16299e1020a 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -10,8 +10,6 @@
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13#include <mach/hardware.h>
14#include <asm/hardware/entry-macro-gic.S>
15 13
16 .macro disable_fiq 14 .macro disable_fiq
17 .endm 15 .endm
diff --git a/arch/arm/mach-ux500/include/mach/vmalloc.h b/arch/arm/mach-ux500/include/mach/vmalloc.h
deleted file mode 100644
index a4945cb41172..000000000000
--- a/arch/arm/mach-ux500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index e340a54251df..4d8dfc15f3e6 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -141,11 +141,6 @@ static struct map_desc versatile_io_desc[] __initdata = {
141 }, 141 },
142#ifdef CONFIG_MACH_VERSATILE_AB 142#ifdef CONFIG_MACH_VERSATILE_AB
143 { 143 {
144 .virtual = IO_ADDRESS(VERSATILE_GPIO0_BASE),
145 .pfn = __phys_to_pfn(VERSATILE_GPIO0_BASE),
146 .length = SZ_4K,
147 .type = MT_DEVICE
148 }, {
149 .virtual = IO_ADDRESS(VERSATILE_IB2_BASE), 144 .virtual = IO_ADDRESS(VERSATILE_IB2_BASE),
150 .pfn = __phys_to_pfn(VERSATILE_IB2_BASE), 145 .pfn = __phys_to_pfn(VERSATILE_IB2_BASE),
151 .length = SZ_64M, 146 .length = SZ_64M,
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
index e6f7c1663160..b6f0dbf122ee 100644
--- a/arch/arm/mach-versatile/include/mach/entry-macro.S
+++ b/arch/arm/mach-versatile/include/mach/entry-macro.S
@@ -7,39 +7,9 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <mach/platform.h>
12#include <asm/hardware/vic.h>
13 10
14 .macro disable_fiq 11 .macro disable_fiq
15 .endm 12 .endm
16 13
17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
19 .endm
20
21 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
22 .endm 15 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
26 mov \irqnr, #0
27 teq \irqstat, #0
28 beq 1003f
29
301001: tst \irqstat, #15
31 bne 1002f
32 add \irqnr, \irqnr, #4
33 movs \irqstat, \irqstat, lsr #4
34 bne 1001b
351002: tst \irqstat, #1
36 bne 1003f
37 add \irqnr, \irqnr, #1
38 movs \irqstat, \irqstat, lsr #1
39 bne 1002b
401003: /* EQ will be set if no irqs pending */
41
42@ clz \irqnr, \irqstat
43@1003: /* EQ will be set if we reach MAXIRQNUM */
44 .endm
45
diff --git a/arch/arm/mach-versatile/include/mach/vmalloc.h b/arch/arm/mach-versatile/include/mach/vmalloc.h
deleted file mode 100644
index 7d8e069ad51b..000000000000
--- a/arch/arm/mach-versatile/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END 0xd8000000UL
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index fda4866703cd..c83a1f379f7a 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -27,6 +27,7 @@
27 27
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/hardware/vic.h>
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31 32
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -39,6 +40,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
39 .map_io = versatile_map_io, 40 .map_io = versatile_map_io,
40 .init_early = versatile_init_early, 41 .init_early = versatile_init_early,
41 .init_irq = versatile_init_irq, 42 .init_irq = versatile_init_irq,
43 .handle_irq = vic_handle_irq,
42 .timer = &versatile_timer, 44 .timer = &versatile_timer,
43 .init_machine = versatile_init, 45 .init_machine = versatile_init,
44MACHINE_END 46MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index 54e037c090f5..f4d1e0f072c8 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -24,6 +24,7 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
27#include <asm/hardware/vic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29 30
@@ -45,6 +46,7 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
45 .map_io = versatile_map_io, 46 .map_io = versatile_map_io,
46 .init_early = versatile_init_early, 47 .init_early = versatile_init_early,
47 .init_irq = versatile_init_irq, 48 .init_irq = versatile_init_irq,
49 .handle_irq = vic_handle_irq,
48 .timer = &versatile_timer, 50 .timer = &versatile_timer,
49 .init_machine = versatile_dt_init, 51 .init_machine = versatile_dt_init,
50 .dt_compat = versatile_dt_match, 52 .dt_compat = versatile_dt_match,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index feaf9cbe60f6..4d31eeb6c101 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -28,6 +28,7 @@
28#include <linux/io.h> 28#include <linux/io.h>
29 29
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <asm/hardware/vic.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33 34
@@ -107,6 +108,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
107 .map_io = versatile_map_io, 108 .map_io = versatile_map_io,
108 .init_early = versatile_init_early, 109 .init_early = versatile_init_early,
109 .init_irq = versatile_init_irq, 110 .init_irq = versatile_init_irq,
111 .handle_irq = vic_handle_irq,
110 .timer = &versatile_timer, 112 .timer = &versatile_timer,
111 .init_machine = versatile_pb_init, 113 .init_machine = versatile_pb_init,
112MACHINE_END 114MACHINE_END
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
index 73c11297509e..a14f9e62ca92 100644
--- a/arch/arm/mach-vexpress/include/mach/entry-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
1#include <asm/hardware/entry-macro-gic.S>
2
3 .macro disable_fiq 1 .macro disable_fiq
4 .endm 2 .endm
5 3
diff --git a/arch/arm/mach-vexpress/include/mach/vmalloc.h b/arch/arm/mach-vexpress/include/mach/vmalloc.h
deleted file mode 100644
index f43a36ef678b..000000000000
--- a/arch/arm/mach-vexpress/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END 0xf8000000UL
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 1fafc3244607..7aa07a8ce232 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -23,6 +23,7 @@
23#include <asm/hardware/arm_timer.h> 23#include <asm/hardware/arm_timer.h>
24#include <asm/hardware/timer-sp.h> 24#include <asm/hardware/timer-sp.h>
25#include <asm/hardware/sp810.h> 25#include <asm/hardware/sp810.h>
26#include <asm/hardware/gic.h>
26 27
27#include <mach/ct-ca9x4.h> 28#include <mach/ct-ca9x4.h>
28#include <mach/motherboard.h> 29#include <mach/motherboard.h>
@@ -448,5 +449,6 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
448 .init_early = v2m_init_early, 449 .init_early = v2m_init_early,
449 .init_irq = v2m_init_irq, 450 .init_irq = v2m_init_irq,
450 .timer = &v2m_timer, 451 .timer = &v2m_timer,
452 .handle_irq = gic_handle_irq,
451 .init_machine = v2m_init, 453 .init_machine = v2m_init,
452MACHINE_END 454MACHINE_END
diff --git a/arch/arm/mach-vt8500/include/mach/vmalloc.h b/arch/arm/mach-vt8500/include/mach/vmalloc.h
deleted file mode 100644
index 4642290ce416..000000000000
--- a/arch/arm/mach-vt8500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-vt8500/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define VMALLOC_END 0xd0000000UL
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
index ce228bdc66dd..68875a1c16be 100644
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -33,7 +33,7 @@ static void arch_reset(char mode, const char *cmd)
33{ 33{
34 if (mode == 's') { 34 if (mode == 's') {
35 /* Jump into ROM at address 0 */ 35 /* Jump into ROM at address 0 */
36 cpu_reset(0); 36 soft_restart(0);
37 } else { 37 } else {
38 __raw_writel(WTE | WTRE | WTCLK, WTCR); 38 __raw_writel(WTE | WTRE | WTCLK, WTCR);
39 } 39 }
diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h
deleted file mode 100644
index b067e44500a4..000000000000
--- a/arch/arm/mach-w90x900/include/mach/vmalloc.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/vmalloc.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARCH_VMALLOC_H
19#define __ASM_ARCH_VMALLOC_H
20
21#define VMALLOC_END (0xe0000000UL)
22
23#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
index 7bf143c443f1..b466e2450ba3 100644
--- a/arch/arm/mach-w90x900/irq.c
+++ b/arch/arm/mach-w90x900/irq.c
@@ -28,6 +28,8 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <mach/regs-irq.h> 29#include <mach/regs-irq.h>
30 30
31#include "nuc9xx.h"
32
31struct group_irq { 33struct group_irq {
32 unsigned long gpen; 34 unsigned long gpen;
33 unsigned int enabled; 35 unsigned int enabled;
diff --git a/arch/arm/mach-w90x900/nuc910.h b/arch/arm/mach-w90x900/nuc910.h
index 83e9ba5fc26c..b14c71a9e683 100644
--- a/arch/arm/mach-w90x900/nuc910.h
+++ b/arch/arm/mach-w90x900/nuc910.h
@@ -12,14 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 */ 14 */
15 15#include "nuc9xx.h"
16struct map_desc;
17struct sys_timer;
18
19/* core initialisation functions */
20
21extern void nuc900_init_irq(void);
22extern struct sys_timer nuc900_timer;
23 16
24/* extern file from nuc910.c */ 17/* extern file from nuc910.c */
25 18
diff --git a/arch/arm/mach-w90x900/nuc950.h b/arch/arm/mach-w90x900/nuc950.h
index 98a1148bc5ae..6e9de3051cd4 100644
--- a/arch/arm/mach-w90x900/nuc950.h
+++ b/arch/arm/mach-w90x900/nuc950.h
@@ -12,14 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 */ 14 */
15 15#include "nuc9xx.h"
16struct map_desc;
17struct sys_timer;
18
19/* core initialisation functions */
20
21extern void nuc900_init_irq(void);
22extern struct sys_timer nuc900_timer;
23 16
24/* extern file from nuc950.c */ 17/* extern file from nuc950.c */
25 18
diff --git a/arch/arm/mach-w90x900/nuc960.h b/arch/arm/mach-w90x900/nuc960.h
index f0c07cbe3a82..9f6df9a00286 100644
--- a/arch/arm/mach-w90x900/nuc960.h
+++ b/arch/arm/mach-w90x900/nuc960.h
@@ -12,14 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 */ 14 */
15 15#include "nuc9xx.h"
16struct map_desc;
17struct sys_timer;
18
19/* core initialisation functions */
20
21extern void nuc900_init_irq(void);
22extern struct sys_timer nuc900_timer;
23 16
24/* extern file from nuc960.c */ 17/* extern file from nuc960.c */
25 18
diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h
new file mode 100644
index 000000000000..847c4f3e0440
--- /dev/null
+++ b/arch/arm/mach-w90x900/nuc9xx.h
@@ -0,0 +1,23 @@
1/*
2 * arch/arm/mach-w90x900/nuc9xx.h
3 *
4 * Copied from nuc910.h, which had:
5 *
6 * Copyright (c) 2008 Nuvoton corporation
7 *
8 * Header file for NUC900 CPU support
9 *
10 * Wan ZongShun <mcuos.com@gmail.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17struct map_desc;
18struct sys_timer;
19
20/* core initialisation functions */
21
22extern void nuc900_init_irq(void);
23extern struct sys_timer nuc900_timer;
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index a2c4e2d0a0d4..fa27c498ac09 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -33,6 +33,8 @@
33#include <mach/map.h> 33#include <mach/map.h>
34#include <mach/regs-timer.h> 34#include <mach/regs-timer.h>
35 35
36#include "nuc9xx.h"
37
36#define RESETINT 0x1f 38#define RESETINT 0x1f
37#define PERIOD (0x01 << 27) 39#define PERIOD (0x01 << 27)
38#define ONESHOT (0x00 << 27) 40#define ONESHOT (0x00 << 27)
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 73e93687b81a..ab5cfddc0d7b 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -112,6 +112,7 @@ static const char *xilinx_dt_match[] = {
112MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 112MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
113 .map_io = xilinx_map_io, 113 .map_io = xilinx_map_io,
114 .init_irq = xilinx_irq_init, 114 .init_irq = xilinx_irq_init,
115 .handle_irq = gic_handle_irq,
115 .init_machine = xilinx_init_machine, 116 .init_machine = xilinx_init_machine,
116 .timer = &xttcpss_sys_timer, 117 .timer = &xttcpss_sys_timer,
117 .dt_compat = xilinx_dt_match, 118 .dt_compat = xilinx_dt_match,
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S
index 3cfc01b37461..d621fb732569 100644
--- a/arch/arm/mach-zynq/include/mach/entry-macro.S
+++ b/arch/arm/mach-zynq/include/mach/entry-macro.S
@@ -20,9 +20,6 @@
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 */ 21 */
22 22
23#include <mach/hardware.h>
24#include <asm/hardware/entry-macro-gic.S>
25
26 .macro disable_fiq 23 .macro disable_fiq
27 .endm 24 .endm
28 25
diff --git a/arch/arm/mach-zynq/include/mach/vmalloc.h b/arch/arm/mach-zynq/include/mach/vmalloc.h
deleted file mode 100644
index 2398eff1e8b8..000000000000
--- a/arch/arm/mach-zynq/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/vmalloc.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_VMALLOC_H__
16#define __MACH_VMALLOC_H__
17
18#define VMALLOC_END 0xE0000000UL
19
20#endif
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 2be9139a4ef3..296ad2eaddb0 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -78,7 +78,7 @@ void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end)
78 * the user-mode pages. This will then ensure that we have predictable 78 * the user-mode pages. This will then ensure that we have predictable
79 * results when turning the mmu off 79 * results when turning the mmu off
80 */ 80 */
81void setup_mm_for_reboot(char mode) 81void setup_mm_for_reboot(void)
82{ 82{
83 /* 83 /*
84 * We need to access to user-mode page tables here. For kernel threads 84 * We need to access to user-mode page tables here. For kernel threads
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index fbdd12ea3a58..786adddf1a86 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -20,7 +20,6 @@
20#include <linux/highmem.h> 20#include <linux/highmem.h>
21#include <linux/gfp.h> 21#include <linux/gfp.h>
22#include <linux/memblock.h> 22#include <linux/memblock.h>
23#include <linux/sort.h>
24 23
25#include <asm/mach-types.h> 24#include <asm/mach-types.h>
26#include <asm/prom.h> 25#include <asm/prom.h>
@@ -134,30 +133,18 @@ void show_mem(unsigned int filter)
134} 133}
135 134
136static void __init find_limits(unsigned long *min, unsigned long *max_low, 135static void __init find_limits(unsigned long *min, unsigned long *max_low,
137 unsigned long *max_high) 136 unsigned long *max_high)
138{ 137{
139 struct meminfo *mi = &meminfo; 138 struct meminfo *mi = &meminfo;
140 int i; 139 int i;
141 140
142 *min = -1UL; 141 /* This assumes the meminfo array is properly sorted */
143 *max_low = *max_high = 0; 142 *min = bank_pfn_start(&mi->bank[0]);
144 143 for_each_bank (i, mi)
145 for_each_bank (i, mi) { 144 if (mi->bank[i].highmem)
146 struct membank *bank = &mi->bank[i]; 145 break;
147 unsigned long start, end; 146 *max_low = bank_pfn_end(&mi->bank[i - 1]);
148 147 *max_high = bank_pfn_end(&mi->bank[mi->nr_banks - 1]);
149 start = bank_pfn_start(bank);
150 end = bank_pfn_end(bank);
151
152 if (*min > start)
153 *min = start;
154 if (*max_high < end)
155 *max_high = end;
156 if (bank->highmem)
157 continue;
158 if (*max_low < end)
159 *max_low = end;
160 }
161} 148}
162 149
163static void __init arm_bootmem_init(unsigned long start_pfn, 150static void __init arm_bootmem_init(unsigned long start_pfn,
@@ -319,19 +306,10 @@ static void arm_memory_present(void)
319} 306}
320#endif 307#endif
321 308
322static int __init meminfo_cmp(const void *_a, const void *_b)
323{
324 const struct membank *a = _a, *b = _b;
325 long cmp = bank_pfn_start(a) - bank_pfn_start(b);
326 return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
327}
328
329void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc) 309void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
330{ 310{
331 int i; 311 int i;
332 312
333 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
334
335 memblock_init(); 313 memblock_init();
336 for (i = 0; i < mi->nr_banks; i++) 314 for (i = 0; i < mi->nr_banks; i++)
337 memblock_add(mi->bank[i].start, mi->bank[i].size); 315 memblock_add(mi->bank[i].start, mi->bank[i].size);
@@ -403,8 +381,6 @@ void __init bootmem_init(void)
403 */ 381 */
404 arm_bootmem_free(min, max_low, max_high); 382 arm_bootmem_free(min, max_low, max_high);
405 383
406 high_memory = __va(((phys_addr_t)max_low << PAGE_SHIFT) - 1) + 1;
407
408 /* 384 /*
409 * This doesn't seem to be used by the Linux memory manager any 385 * This doesn't seem to be used by the Linux memory manager any
410 * more, but is used by ll_rw_block. If we can get rid of it, we 386 * more, but is used by ll_rw_block. If we can get rid of it, we
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index bdb248c4f55c..12c7ad215ce7 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -36,12 +36,6 @@
36#include <asm/mach/map.h> 36#include <asm/mach/map.h>
37#include "mm.h" 37#include "mm.h"
38 38
39/*
40 * Used by ioremap() and iounmap() code to mark (super)section-mapped
41 * I/O regions in vm_struct->flags field.
42 */
43#define VM_ARM_SECTION_MAPPING 0x80000000
44
45int ioremap_page(unsigned long virt, unsigned long phys, 39int ioremap_page(unsigned long virt, unsigned long phys,
46 const struct mem_type *mtype) 40 const struct mem_type *mtype)
47{ 41{
@@ -201,12 +195,6 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
201 if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK)) 195 if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK))
202 return NULL; 196 return NULL;
203 197
204 /*
205 * Don't allow RAM to be mapped - this causes problems with ARMv6+
206 */
207 if (WARN_ON(pfn_valid(pfn)))
208 return NULL;
209
210 type = get_mem_type(mtype); 198 type = get_mem_type(mtype);
211 if (!type) 199 if (!type)
212 return NULL; 200 return NULL;
@@ -216,6 +204,34 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
216 */ 204 */
217 size = PAGE_ALIGN(offset + size); 205 size = PAGE_ALIGN(offset + size);
218 206
207 /*
208 * Try to reuse one of the static mapping whenever possible.
209 */
210 read_lock(&vmlist_lock);
211 for (area = vmlist; area; area = area->next) {
212 if (!size || (sizeof(phys_addr_t) == 4 && pfn >= 0x100000))
213 break;
214 if (!(area->flags & VM_ARM_STATIC_MAPPING))
215 continue;
216 if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
217 continue;
218 if (__phys_to_pfn(area->phys_addr) > pfn ||
219 __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1)
220 continue;
221 /* we can drop the lock here as we know *area is static */
222 read_unlock(&vmlist_lock);
223 addr = (unsigned long)area->addr;
224 addr += __pfn_to_phys(pfn) - area->phys_addr;
225 return (void __iomem *) (offset + addr);
226 }
227 read_unlock(&vmlist_lock);
228
229 /*
230 * Don't allow RAM to be mapped - this causes problems with ARMv6+
231 */
232 if (WARN_ON(pfn_valid(pfn)))
233 return NULL;
234
219 area = get_vm_area_caller(size, VM_IOREMAP, caller); 235 area = get_vm_area_caller(size, VM_IOREMAP, caller);
220 if (!area) 236 if (!area)
221 return NULL; 237 return NULL;
@@ -313,28 +329,34 @@ __arm_ioremap_exec(unsigned long phys_addr, size_t size, bool cached)
313void __iounmap(volatile void __iomem *io_addr) 329void __iounmap(volatile void __iomem *io_addr)
314{ 330{
315 void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr); 331 void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
316#ifndef CONFIG_SMP 332 struct vm_struct *vm;
317 struct vm_struct **p, *tmp;
318 333
319 /* 334 read_lock(&vmlist_lock);
320 * If this is a section based mapping we need to handle it 335 for (vm = vmlist; vm; vm = vm->next) {
321 * specially as the VM subsystem does not know how to handle 336 if (vm->addr > addr)
322 * such a beast. We need the lock here b/c we need to clear 337 break;
323 * all the mappings before the area can be reclaimed 338 if (!(vm->flags & VM_IOREMAP))
324 * by someone else. 339 continue;
325 */ 340 /* If this is a static mapping we must leave it alone */
326 write_lock(&vmlist_lock); 341 if ((vm->flags & VM_ARM_STATIC_MAPPING) &&
327 for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) { 342 (vm->addr <= addr) && (vm->addr + vm->size > addr)) {
328 if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { 343 read_unlock(&vmlist_lock);
329 if (tmp->flags & VM_ARM_SECTION_MAPPING) { 344 return;
330 unmap_area_sections((unsigned long)tmp->addr, 345 }
331 tmp->size); 346#ifndef CONFIG_SMP
332 } 347 /*
348 * If this is a section based mapping we need to handle it
349 * specially as the VM subsystem does not know how to handle
350 * such a beast.
351 */
352 if ((vm->addr == addr) &&
353 (vm->flags & VM_ARM_SECTION_MAPPING)) {
354 unmap_area_sections((unsigned long)vm->addr, vm->size);
333 break; 355 break;
334 } 356 }
335 }
336 write_unlock(&vmlist_lock);
337#endif 357#endif
358 }
359 read_unlock(&vmlist_lock);
338 360
339 vunmap(addr); 361 vunmap(addr);
340} 362}
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index ad7cce3bc431..70f6d3ea4834 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -21,6 +21,20 @@ const struct mem_type *get_mem_type(unsigned int type);
21 21
22extern void __flush_dcache_page(struct address_space *mapping, struct page *page); 22extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
23 23
24/*
25 * ARM specific vm_struct->flags bits.
26 */
27
28/* (super)section-mapped I/O regions used by ioremap()/iounmap() */
29#define VM_ARM_SECTION_MAPPING 0x80000000
30
31/* permanent static mappings from iotable_init() */
32#define VM_ARM_STATIC_MAPPING 0x40000000
33
34/* mapping type (attributes) for permanent static mappings */
35#define VM_ARM_MTYPE(mt) ((mt) << 20)
36#define VM_ARM_MTYPE_MASK (0x1f << 20)
37
24#endif 38#endif
25 39
26#ifdef CONFIG_ZONE_DMA 40#ifdef CONFIG_ZONE_DMA
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index dc8c550e6cbd..27e366af67f9 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -15,6 +15,7 @@
15#include <linux/nodemask.h> 15#include <linux/nodemask.h>
16#include <linux/memblock.h> 16#include <linux/memblock.h>
17#include <linux/fs.h> 17#include <linux/fs.h>
18#include <linux/vmalloc.h>
18 19
19#include <asm/cputype.h> 20#include <asm/cputype.h>
20#include <asm/sections.h> 21#include <asm/sections.h>
@@ -529,13 +530,18 @@ EXPORT_SYMBOL(phys_mem_access_prot);
529 530
530#define vectors_base() (vectors_high() ? 0xffff0000 : 0) 531#define vectors_base() (vectors_high() ? 0xffff0000 : 0)
531 532
532static void __init *early_alloc(unsigned long sz) 533static void __init *early_alloc_aligned(unsigned long sz, unsigned long align)
533{ 534{
534 void *ptr = __va(memblock_alloc(sz, sz)); 535 void *ptr = __va(memblock_alloc(sz, align));
535 memset(ptr, 0, sz); 536 memset(ptr, 0, sz);
536 return ptr; 537 return ptr;
537} 538}
538 539
540static void __init *early_alloc(unsigned long sz)
541{
542 return early_alloc_aligned(sz, sz);
543}
544
539static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot) 545static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot)
540{ 546{
541 if (pmd_none(*pmd)) { 547 if (pmd_none(*pmd)) {
@@ -685,9 +691,10 @@ static void __init create_mapping(struct map_desc *md)
685 } 691 }
686 692
687 if ((md->type == MT_DEVICE || md->type == MT_ROM) && 693 if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
688 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { 694 md->virtual >= PAGE_OFFSET &&
695 (md->virtual < VMALLOC_START || md->virtual >= VMALLOC_END)) {
689 printk(KERN_WARNING "BUG: mapping for 0x%08llx" 696 printk(KERN_WARNING "BUG: mapping for 0x%08llx"
690 " at 0x%08lx overlaps vmalloc space\n", 697 " at 0x%08lx out of vmalloc space\n",
691 (long long)__pfn_to_phys((u64)md->pfn), md->virtual); 698 (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
692 } 699 }
693 700
@@ -729,18 +736,33 @@ static void __init create_mapping(struct map_desc *md)
729 */ 736 */
730void __init iotable_init(struct map_desc *io_desc, int nr) 737void __init iotable_init(struct map_desc *io_desc, int nr)
731{ 738{
732 int i; 739 struct map_desc *md;
740 struct vm_struct *vm;
741
742 if (!nr)
743 return;
733 744
734 for (i = 0; i < nr; i++) 745 vm = early_alloc_aligned(sizeof(*vm) * nr, __alignof__(*vm));
735 create_mapping(io_desc + i); 746
747 for (md = io_desc; nr; md++, nr--) {
748 create_mapping(md);
749 vm->addr = (void *)(md->virtual & PAGE_MASK);
750 vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
751 vm->phys_addr = __pfn_to_phys(md->pfn);
752 vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
753 vm->flags |= VM_ARM_MTYPE(md->type);
754 vm->caller = iotable_init;
755 vm_area_add_early(vm++);
756 }
736} 757}
737 758
738static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M); 759static void * __initdata vmalloc_min =
760 (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
739 761
740/* 762/*
741 * vmalloc=size forces the vmalloc area to be exactly 'size' 763 * vmalloc=size forces the vmalloc area to be exactly 'size'
742 * bytes. This can be used to increase (or decrease) the vmalloc 764 * bytes. This can be used to increase (or decrease) the vmalloc
743 * area - the default is 128m. 765 * area - the default is 240m.
744 */ 766 */
745static int __init early_vmalloc(char *arg) 767static int __init early_vmalloc(char *arg)
746{ 768{
@@ -860,6 +882,7 @@ void __init sanity_check_meminfo(void)
860 } 882 }
861#endif 883#endif
862 meminfo.nr_banks = j; 884 meminfo.nr_banks = j;
885 high_memory = __va(lowmem_limit - 1) + 1;
863 memblock_set_current_limit(lowmem_limit); 886 memblock_set_current_limit(lowmem_limit);
864} 887}
865 888
@@ -890,10 +913,10 @@ static inline void prepare_page_table(void)
890 913
891 /* 914 /*
892 * Clear out all the kernel space mappings, except for the first 915 * Clear out all the kernel space mappings, except for the first
893 * memory bank, up to the end of the vmalloc region. 916 * memory bank, up to the vmalloc region.
894 */ 917 */
895 for (addr = __phys_to_virt(end); 918 for (addr = __phys_to_virt(end);
896 addr < VMALLOC_END; addr += PMD_SIZE) 919 addr < VMALLOC_START; addr += PMD_SIZE)
897 pmd_clear(pmd_off_k(addr)); 920 pmd_clear(pmd_off_k(addr));
898} 921}
899 922
@@ -920,8 +943,8 @@ void __init arm_mm_memblock_reserve(void)
920} 943}
921 944
922/* 945/*
923 * Set up device the mappings. Since we clear out the page tables for all 946 * Set up the device mappings. Since we clear out the page tables for all
924 * mappings above VMALLOC_END, we will remove any debug device mappings. 947 * mappings above VMALLOC_START, we will remove any debug device mappings.
925 * This means you have to be careful how you debug this function, or any 948 * This means you have to be careful how you debug this function, or any
926 * called function. This means you can't use any function or debugging 949 * called function. This means you can't use any function or debugging
927 * method which may touch any device, otherwise the kernel _will_ crash. 950 * method which may touch any device, otherwise the kernel _will_ crash.
@@ -936,7 +959,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
936 */ 959 */
937 vectors_page = early_alloc(PAGE_SIZE); 960 vectors_page = early_alloc(PAGE_SIZE);
938 961
939 for (addr = VMALLOC_END; addr; addr += PMD_SIZE) 962 for (addr = VMALLOC_START; addr; addr += PMD_SIZE)
940 pmd_clear(pmd_off_k(addr)); 963 pmd_clear(pmd_off_k(addr));
941 964
942 /* 965 /*
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 941a98c9e8aa..4fc6794cca4b 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -29,6 +29,8 @@ void __init arm_mm_memblock_reserve(void)
29 29
30void __init sanity_check_meminfo(void) 30void __init sanity_check_meminfo(void)
31{ 31{
32 phys_addr_t end = bank_phys_end(&meminfo.bank[meminfo.nr_banks - 1]);
33 high_memory = __va(end - 1) + 1;
32} 34}
33 35
34/* 36/*
@@ -43,7 +45,7 @@ void __init paging_init(struct machine_desc *mdesc)
43/* 45/*
44 * We don't need to do anything here for nommu machines. 46 * We don't need to do anything here for nommu machines.
45 */ 47 */
46void setup_mm_for_reboot(char mode) 48void setup_mm_for_reboot(void)
47{ 49{
48} 50}
49 51
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index 69b09c1cec8b..90f7153a8d78 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -10,7 +10,6 @@ obj-$(CONFIG_ARCH_IOP32X) += i2c.o
10obj-$(CONFIG_ARCH_IOP32X) += pci.o 10obj-$(CONFIG_ARCH_IOP32X) += pci.o
11obj-$(CONFIG_ARCH_IOP32X) += setup.o 11obj-$(CONFIG_ARCH_IOP32X) += setup.o
12obj-$(CONFIG_ARCH_IOP32X) += time.o 12obj-$(CONFIG_ARCH_IOP32X) += time.o
13obj-$(CONFIG_ARCH_IOP32X) += io.o
14obj-$(CONFIG_ARCH_IOP32X) += cp6.o 13obj-$(CONFIG_ARCH_IOP32X) += cp6.o
15obj-$(CONFIG_ARCH_IOP32X) += adma.o 14obj-$(CONFIG_ARCH_IOP32X) += adma.o
16obj-$(CONFIG_ARCH_IOP32X) += pmu.o 15obj-$(CONFIG_ARCH_IOP32X) += pmu.o
@@ -21,7 +20,6 @@ obj-$(CONFIG_ARCH_IOP33X) += i2c.o
21obj-$(CONFIG_ARCH_IOP33X) += pci.o 20obj-$(CONFIG_ARCH_IOP33X) += pci.o
22obj-$(CONFIG_ARCH_IOP33X) += setup.o 21obj-$(CONFIG_ARCH_IOP33X) += setup.o
23obj-$(CONFIG_ARCH_IOP33X) += time.o 22obj-$(CONFIG_ARCH_IOP33X) += time.o
24obj-$(CONFIG_ARCH_IOP33X) += io.o
25obj-$(CONFIG_ARCH_IOP33X) += cp6.o 23obj-$(CONFIG_ARCH_IOP33X) += cp6.o
26obj-$(CONFIG_ARCH_IOP33X) += adma.o 24obj-$(CONFIG_ARCH_IOP33X) += adma.o
27obj-$(CONFIG_ARCH_IOP33X) += pmu.o 25obj-$(CONFIG_ARCH_IOP33X) += pmu.o
diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c
deleted file mode 100644
index e15bc17db90b..000000000000
--- a/arch/arm/plat-iop/io.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * iop3xx custom ioremap implementation
3 * Copyright (c) 2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/io.h>
22#include <mach/hardware.h>
23
24void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size,
25 unsigned int mtype)
26{
27 void __iomem * retval;
28
29 switch (cookie) {
30 case IOP3XX_PCI_LOWER_IO_PA ... IOP3XX_PCI_UPPER_IO_PA:
31 retval = (void *) IOP3XX_PCI_IO_PHYS_TO_VIRT(cookie);
32 break;
33 case IOP3XX_PERIPHERAL_PHYS_BASE ... IOP3XX_PERIPHERAL_UPPER_PA:
34 retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie);
35 break;
36 default:
37 retval = __arm_ioremap_caller(cookie, size, mtype,
38 __builtin_return_address(0));
39 }
40
41 return retval;
42}
43EXPORT_SYMBOL(__iop3xx_ioremap);
44
45void __iop3xx_iounmap(void __iomem *addr)
46{
47 extern void __iounmap(volatile void __iomem *addr);
48
49 switch ((u32) addr) {
50 case IOP3XX_PCI_LOWER_IO_VA ... IOP3XX_PCI_UPPER_IO_VA:
51 case IOP3XX_PERIPHERAL_VIRT_BASE ... IOP3XX_PERIPHERAL_UPPER_VA:
52 goto skip;
53 }
54 __iounmap(addr);
55
56skip:
57 return;
58}
59EXPORT_SYMBOL(__iop3xx_iounmap);
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index b9f0f5f499a4..076db84f3e31 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,7 +5,6 @@
5# Common support 5# Common support
6obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o 6obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o
7 7
8obj-$(CONFIG_ARM_GIC) += gic.o
9obj-$(CONFIG_MXC_TZIC) += tzic.o 8obj-$(CONFIG_MXC_TZIC) += tzic.o
10obj-$(CONFIG_MXC_AVIC) += avic.o 9obj-$(CONFIG_MXC_AVIC) += avic.o
11 10
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
deleted file mode 100644
index 12f8f8109010..000000000000
--- a/arch/arm/plat-mxc/gic.c
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/io.h>
14#include <asm/exception.h>
15#include <asm/localtimer.h>
16#include <asm/hardware/gic.h>
17#ifdef CONFIG_SMP
18#include <asm/smp.h>
19#endif
20
21asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
22{
23 u32 irqstat, irqnr;
24
25 do {
26 irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);
27 irqnr = irqstat & 0x3ff;
28 if (irqnr == 1023)
29 break;
30
31 if (irqnr > 15 && irqnr < 1021)
32 handle_IRQ(irqnr, regs);
33#ifdef CONFIG_SMP
34 else {
35 writel_relaxed(irqstat, gic_cpu_base_addr +
36 GIC_CPU_EOI);
37 handle_IPI(irqnr, regs);
38 }
39#endif
40 } while (1);
41}
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index c75f254abd85..6698cae942f7 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -89,7 +89,6 @@ extern void imx_print_silicon_rev(const char *cpu, int srev);
89 89
90void avic_handle_irq(struct pt_regs *); 90void avic_handle_irq(struct pt_regs *);
91void tzic_handle_irq(struct pt_regs *); 91void tzic_handle_irq(struct pt_regs *);
92void gic_handle_irq(struct pt_regs *);
93 92
94#define imx1_handle_irq avic_handle_irq 93#define imx1_handle_irq avic_handle_irq
95#define imx21_handle_irq avic_handle_irq 94#define imx21_handle_irq avic_handle_irq
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index ca5cf26a04b1..def5d30cb67e 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,19 +9,8 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12/* Unused, we use CONFIG_MULTI_IRQ_HANDLER */
13
14 .macro disable_fiq 12 .macro disable_fiq
15 .endm 13 .endm
16 14
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 16 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 .endm
25
26 .macro test_for_ipi, irqnr, irqstat, base, tmp
27 .endm
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 97b19e7800bc..2b7c08d13e89 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -12,8 +12,6 @@
12#ifndef __MACH_MX1_H__ 12#ifndef __MACH_MX1_H__
13#define __MACH_MX1_H__ 13#define __MACH_MX1_H__
14 14
15#include <mach/vmalloc.h>
16
17/* 15/*
18 * Memory map 16 * Memory map
19 */ 17 */
diff --git a/arch/arm/plat-mxc/include/mach/vmalloc.h b/arch/arm/plat-mxc/include/mach/vmalloc.h
deleted file mode 100644
index ef6379c474be..000000000000
--- a/arch/arm/plat-mxc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2000 Russell King.
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __ASM_ARCH_MXC_VMALLOC_H__
17#define __ASM_ARCH_MXC_VMALLOC_H__
18
19/* vmalloc ending address */
20#define VMALLOC_END 0xf4000000UL
21
22#endif /* __ASM_ARCH_MXC_VMALLOC_H__ */
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index d65fb31a55ca..7e5c76ea4466 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -71,7 +71,7 @@ void arch_reset(char mode, const char *cmd)
71 mdelay(50); 71 mdelay(50);
72 72
73 /* we'll take a jump through zero as a poor second */ 73 /* we'll take a jump through zero as a poor second */
74 cpu_reset(0); 74 soft_restart(0);
75} 75}
76 76
77void mxc_arch_reset_init(void __iomem *base) 77void mxc_arch_reset_init(void __iomem *base)
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 985262242f25..9a584614e7e6 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ 6obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
7 usb.o fb.o io.o counter_32k.o 7 usb.o fb.o counter_32k.o
8obj-m := 8obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
@@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_device.o
19 19
20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
21 21
22obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
23obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 22obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
24obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o 23obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
25obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o 24obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index d9f10a31e604..2ee6341fffdb 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/dma-mapping.h>
17#include <linux/omapfb.h> 18#include <linux/omapfb.h>
18 19
19#include <plat/common.h> 20#include <plat/common.h>
@@ -66,3 +67,10 @@ void __init omap_reserve(void)
66 omap_vram_reserve_sdram_memblock(); 67 omap_vram_reserve_sdram_memblock();
67 omap_dsp_reserve_sdram_memblock(); 68 omap_dsp_reserve_sdram_memblock();
68} 69}
70
71void __init omap_init_consistent_dma_size(void)
72{
73#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
74 init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
75#endif
76}
diff --git a/arch/arm/plat-omap/include/plat/am33xx.h b/arch/arm/plat-omap/include/plat/am33xx.h
new file mode 100644
index 000000000000..06c19bb7bca6
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/am33xx.h
@@ -0,0 +1,25 @@
1/*
2 * This file contains the address info for various AM33XX modules.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __ASM_ARCH_AM33XX_H
17#define __ASM_ARCH_AM33XX_H
18
19#define L4_SLOW_AM33XX_BASE 0x48000000
20
21#define AM33XX_SCM_BASE 0x44E10000
22#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
23#define AM33XX_PRCM_BASE 0x44E00000
24
25#endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index eb73ab40e955..240a7b9fd946 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -59,6 +59,8 @@ struct clkops {
59#define RATE_IN_4430 (1 << 5) 59#define RATE_IN_4430 (1 << 5)
60#define RATE_IN_TI816X (1 << 6) 60#define RATE_IN_TI816X (1 << 6)
61#define RATE_IN_4460 (1 << 7) 61#define RATE_IN_4460 (1 << 7)
62#define RATE_IN_AM33XX (1 << 8)
63#define RATE_IN_TI814X (1 << 9)
62 64
63#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) 65#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
64#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) 66#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
@@ -84,7 +86,7 @@ struct clkops {
84struct clksel_rate { 86struct clksel_rate {
85 u32 val; 87 u32 val;
86 u8 div; 88 u8 div;
87 u8 flags; 89 u16 flags;
88}; 90};
89 91
90/** 92/**
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 3ff3e36580f2..257f9770b2da 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -27,97 +27,15 @@
27#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H 27#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
28#define __ARCH_ARM_MACH_OMAP_COMMON_H 28#define __ARCH_ARM_MACH_OMAP_COMMON_H
29 29
30#include <linux/delay.h>
31
32#include <plat/i2c.h> 30#include <plat/i2c.h>
33#include <plat/omap_hwmod.h> 31#include <plat/omap_hwmod.h>
34 32
35struct sys_timer;
36
37extern void omap_map_common_io(void);
38extern struct sys_timer omap1_timer;
39extern struct sys_timer omap2_timer;
40extern struct sys_timer omap3_timer;
41extern struct sys_timer omap3_secure_timer;
42extern struct sys_timer omap4_timer;
43extern bool omap_32k_timer_init(void);
44extern int __init omap_init_clocksource_32k(void); 33extern int __init omap_init_clocksource_32k(void);
45extern unsigned long long notrace omap_32k_sched_clock(void); 34extern unsigned long long notrace omap_32k_sched_clock(void);
46 35
47extern void omap_reserve(void); 36extern void omap_reserve(void);
48
49void omap2420_init_early(void);
50void omap2430_init_early(void);
51void omap3430_init_early(void);
52void omap35xx_init_early(void);
53void omap3630_init_early(void);
54void omap3_init_early(void); /* Do not use this one */
55void am35xx_init_early(void);
56void ti816x_init_early(void);
57void omap4430_init_early(void);
58
59extern int omap_dss_reset(struct omap_hwmod *); 37extern int omap_dss_reset(struct omap_hwmod *);
60 38
61void omap_sram_init(void); 39void omap_sram_init(void);
62 40
63/*
64 * IO bases for various OMAP processors
65 * Except the tap base, rest all the io bases
66 * listed are physical addresses.
67 */
68struct omap_globals {
69 u32 class; /* OMAP class to detect */
70 void __iomem *tap; /* Control module ID code */
71 void __iomem *sdrc; /* SDRAM Controller */
72 void __iomem *sms; /* SDRAM Memory Scheduler */
73 void __iomem *ctrl; /* System Control Module */
74 void __iomem *ctrl_pad; /* PAD Control Module */
75 void __iomem *prm; /* Power and Reset Management */
76 void __iomem *cm; /* Clock Management */
77 void __iomem *cm2;
78};
79
80void omap2_set_globals_242x(void);
81void omap2_set_globals_243x(void);
82void omap2_set_globals_3xxx(void);
83void omap2_set_globals_443x(void);
84void omap2_set_globals_ti816x(void);
85
86/* These get called from omap2_set_globals_xxxx(), do not call these */
87void omap2_set_globals_tap(struct omap_globals *);
88void omap2_set_globals_sdrc(struct omap_globals *);
89void omap2_set_globals_control(struct omap_globals *);
90void omap2_set_globals_prcm(struct omap_globals *);
91
92void omap242x_map_io(void);
93void omap243x_map_io(void);
94void omap3_map_io(void);
95void omap4_map_io(void);
96
97
98/**
99 * omap_test_timeout - busy-loop, testing a condition
100 * @cond: condition to test until it evaluates to true
101 * @timeout: maximum number of microseconds in the timeout
102 * @index: loop index (integer)
103 *
104 * Loop waiting for @cond to become true or until at least @timeout
105 * microseconds have passed. To use, define some integer @index in the
106 * calling code. After running, if @index == @timeout, then the loop has
107 * timed out.
108 */
109#define omap_test_timeout(cond, timeout, index) \
110({ \
111 for (index = 0; index < timeout; index++) { \
112 if (cond) \
113 break; \
114 udelay(1); \
115 } \
116})
117
118extern struct device *omap2_get_mpuss_device(void);
119extern struct device *omap2_get_iva_device(void);
120extern struct device *omap2_get_l3_device(void);
121extern struct device *omap4_get_dsp_device(void);
122
123#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ 41#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 408a12f79205..6b51086fce18 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -69,6 +69,7 @@ unsigned int omap_rev(void);
69 * cpu_is_omap343x(): True for OMAP3430 69 * cpu_is_omap343x(): True for OMAP3430
70 * cpu_is_omap443x(): True for OMAP4430 70 * cpu_is_omap443x(): True for OMAP4430
71 * cpu_is_omap446x(): True for OMAP4460 71 * cpu_is_omap446x(): True for OMAP4460
72 * cpu_is_omap447x(): True for OMAP4470
72 */ 73 */
73#define GET_OMAP_CLASS (omap_rev() & 0xff) 74#define GET_OMAP_CLASS (omap_rev() & 0xff)
74 75
@@ -78,6 +79,22 @@ static inline int is_omap ##class (void) \
78 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ 79 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
79} 80}
80 81
82#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
83
84#define IS_AM_CLASS(class, id) \
85static inline int is_am ##class (void) \
86{ \
87 return (GET_AM_CLASS == (id)) ? 1 : 0; \
88}
89
90#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
91
92#define IS_TI_CLASS(class, id) \
93static inline int is_ti ##class (void) \
94{ \
95 return (GET_TI_CLASS == (id)) ? 1 : 0; \
96}
97
81#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) 98#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
82 99
83#define IS_OMAP_SUBCLASS(subclass, id) \ 100#define IS_OMAP_SUBCLASS(subclass, id) \
@@ -92,12 +109,21 @@ static inline int is_ti ##subclass (void) \
92 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ 109 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
93} 110}
94 111
112#define IS_AM_SUBCLASS(subclass, id) \
113static inline int is_am ##subclass (void) \
114{ \
115 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
116}
117
95IS_OMAP_CLASS(7xx, 0x07) 118IS_OMAP_CLASS(7xx, 0x07)
96IS_OMAP_CLASS(15xx, 0x15) 119IS_OMAP_CLASS(15xx, 0x15)
97IS_OMAP_CLASS(16xx, 0x16) 120IS_OMAP_CLASS(16xx, 0x16)
98IS_OMAP_CLASS(24xx, 0x24) 121IS_OMAP_CLASS(24xx, 0x24)
99IS_OMAP_CLASS(34xx, 0x34) 122IS_OMAP_CLASS(34xx, 0x34)
100IS_OMAP_CLASS(44xx, 0x44) 123IS_OMAP_CLASS(44xx, 0x44)
124IS_AM_CLASS(33xx, 0x33)
125
126IS_TI_CLASS(81xx, 0x81)
101 127
102IS_OMAP_SUBCLASS(242x, 0x242) 128IS_OMAP_SUBCLASS(242x, 0x242)
103IS_OMAP_SUBCLASS(243x, 0x243) 129IS_OMAP_SUBCLASS(243x, 0x243)
@@ -105,8 +131,11 @@ IS_OMAP_SUBCLASS(343x, 0x343)
105IS_OMAP_SUBCLASS(363x, 0x363) 131IS_OMAP_SUBCLASS(363x, 0x363)
106IS_OMAP_SUBCLASS(443x, 0x443) 132IS_OMAP_SUBCLASS(443x, 0x443)
107IS_OMAP_SUBCLASS(446x, 0x446) 133IS_OMAP_SUBCLASS(446x, 0x446)
134IS_OMAP_SUBCLASS(447x, 0x447)
108 135
109IS_TI_SUBCLASS(816x, 0x816) 136IS_TI_SUBCLASS(816x, 0x816)
137IS_TI_SUBCLASS(814x, 0x814)
138IS_AM_SUBCLASS(335x, 0x335)
110 139
111#define cpu_is_omap7xx() 0 140#define cpu_is_omap7xx() 0
112#define cpu_is_omap15xx() 0 141#define cpu_is_omap15xx() 0
@@ -116,10 +145,15 @@ IS_TI_SUBCLASS(816x, 0x816)
116#define cpu_is_omap243x() 0 145#define cpu_is_omap243x() 0
117#define cpu_is_omap34xx() 0 146#define cpu_is_omap34xx() 0
118#define cpu_is_omap343x() 0 147#define cpu_is_omap343x() 0
148#define cpu_is_ti81xx() 0
119#define cpu_is_ti816x() 0 149#define cpu_is_ti816x() 0
150#define cpu_is_ti814x() 0
151#define cpu_is_am33xx() 0
152#define cpu_is_am335x() 0
120#define cpu_is_omap44xx() 0 153#define cpu_is_omap44xx() 0
121#define cpu_is_omap443x() 0 154#define cpu_is_omap443x() 0
122#define cpu_is_omap446x() 0 155#define cpu_is_omap446x() 0
156#define cpu_is_omap447x() 0
123 157
124#if defined(MULTI_OMAP1) 158#if defined(MULTI_OMAP1)
125# if defined(CONFIG_ARCH_OMAP730) 159# if defined(CONFIG_ARCH_OMAP730)
@@ -322,7 +356,11 @@ IS_OMAP_TYPE(3517, 0x3517)
322# undef cpu_is_omap3530 356# undef cpu_is_omap3530
323# undef cpu_is_omap3505 357# undef cpu_is_omap3505
324# undef cpu_is_omap3517 358# undef cpu_is_omap3517
359# undef cpu_is_ti81xx
325# undef cpu_is_ti816x 360# undef cpu_is_ti816x
361# undef cpu_is_ti814x
362# undef cpu_is_am33xx
363# undef cpu_is_am335x
326# define cpu_is_omap3430() is_omap3430() 364# define cpu_is_omap3430() is_omap3430()
327# define cpu_is_omap3503() (cpu_is_omap3430() && \ 365# define cpu_is_omap3503() (cpu_is_omap3430() && \
328 (!omap3_has_iva()) && \ 366 (!omap3_has_iva()) && \
@@ -339,16 +377,22 @@ IS_OMAP_TYPE(3517, 0x3517)
339 !omap3_has_sgx()) 377 !omap3_has_sgx())
340# undef cpu_is_omap3630 378# undef cpu_is_omap3630
341# define cpu_is_omap3630() is_omap363x() 379# define cpu_is_omap3630() is_omap363x()
380# define cpu_is_ti81xx() is_ti81xx()
342# define cpu_is_ti816x() is_ti816x() 381# define cpu_is_ti816x() is_ti816x()
382# define cpu_is_ti814x() is_ti814x()
383# define cpu_is_am33xx() is_am33xx()
384# define cpu_is_am335x() is_am335x()
343#endif 385#endif
344 386
345# if defined(CONFIG_ARCH_OMAP4) 387# if defined(CONFIG_ARCH_OMAP4)
346# undef cpu_is_omap44xx 388# undef cpu_is_omap44xx
347# undef cpu_is_omap443x 389# undef cpu_is_omap443x
348# undef cpu_is_omap446x 390# undef cpu_is_omap446x
391# undef cpu_is_omap447x
349# define cpu_is_omap44xx() is_omap44xx() 392# define cpu_is_omap44xx() is_omap44xx()
350# define cpu_is_omap443x() is_omap443x() 393# define cpu_is_omap443x() is_omap443x()
351# define cpu_is_omap446x() is_omap446x() 394# define cpu_is_omap446x() is_omap446x()
395# define cpu_is_omap447x() is_omap447x()
352# endif 396# endif
353 397
354/* Macros to detect if we have OMAP1 or OMAP2 */ 398/* Macros to detect if we have OMAP1 or OMAP2 */
@@ -386,15 +430,27 @@ IS_OMAP_TYPE(3517, 0x3517)
386#define TI8168_REV_ES1_0 TI816X_CLASS 430#define TI8168_REV_ES1_0 TI816X_CLASS
387#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) 431#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
388 432
433#define TI814X_CLASS 0x81400034
434#define TI8148_REV_ES1_0 TI814X_CLASS
435#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
436#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
437
438#define AM335X_CLASS 0x33500034
439#define AM335X_REV_ES1_0 AM335X_CLASS
440
389#define OMAP443X_CLASS 0x44300044 441#define OMAP443X_CLASS 0x44300044
390#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) 442#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
391#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8)) 443#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
392#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8)) 444#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
393#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8)) 445#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
446#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
394 447
395#define OMAP446X_CLASS 0x44600044 448#define OMAP446X_CLASS 0x44600044
396#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) 449#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
397 450
451#define OMAP447X_CLASS 0x44700044
452#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
453
398void omap2_check_revision(void); 454void omap2_check_revision(void);
399 455
400/* 456/*
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index e87efe1499b8..e897978371c2 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -286,6 +286,7 @@
286#include <plat/omap24xx.h> 286#include <plat/omap24xx.h>
287#include <plat/omap34xx.h> 287#include <plat/omap34xx.h>
288#include <plat/omap44xx.h> 288#include <plat/omap44xx.h>
289#include <plat/ti816x.h> 289#include <plat/ti81xx.h>
290#include <plat/am33xx.h>
290 291
291#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ 292#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 7f2969eadb85..0696bae1818b 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -73,6 +73,9 @@
73#define OMAP4_L3_IO_OFFSET 0xb4000000 73#define OMAP4_L3_IO_OFFSET 0xb4000000
74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */ 74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
75 75
76#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
77#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
78
76#define OMAP4_L3_PER_IO_OFFSET 0xb1100000 79#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
77#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET) 80#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
78 81
@@ -154,6 +157,15 @@
154#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ 157#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
155 158
156/* 159/*
160 * ----------------------------------------------------------------------------
161 * AM33XX specific IO mapping
162 * ----------------------------------------------------------------------------
163 */
164#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
165#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
166#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
167
168/*
157 * Need to look at the Size 4M for L4. 169 * Need to look at the Size 4M for L4.
158 * VPOM3430 was not working for Int controller 170 * VPOM3430 was not working for Int controller
159 */ 171 */
@@ -247,8 +259,6 @@
247 * NOTE: Please use ioremap + __raw_read/write where possible instead of these 259 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
248 */ 260 */
249 261
250void omap_ioremap_init(void);
251
252extern u8 omap_readb(u32 pa); 262extern u8 omap_readb(u32 pa);
253extern u16 omap_readw(u32 pa); 263extern u16 omap_readw(u32 pa);
254extern u32 omap_readl(u32 pa); 264extern u32 omap_readl(u32 pa);
@@ -257,83 +267,9 @@ extern void omap_writew(u16 v, u32 pa);
257extern void omap_writel(u32 v, u32 pa); 267extern void omap_writel(u32 v, u32 pa);
258 268
259struct omap_sdrc_params; 269struct omap_sdrc_params;
260
261#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
262void omap7xx_map_io(void);
263#else
264static inline void omap_map_io(void)
265{
266}
267#endif
268
269#ifdef CONFIG_ARCH_OMAP15XX
270void omap15xx_map_io(void);
271#else
272static inline void omap15xx_map_io(void)
273{
274}
275#endif
276
277#ifdef CONFIG_ARCH_OMAP16XX
278void omap16xx_map_io(void);
279#else
280static inline void omap16xx_map_io(void)
281{
282}
283#endif
284
285void omap1_init_early(void);
286
287#ifdef CONFIG_SOC_OMAP2420
288extern void omap242x_map_common_io(void);
289#else
290static inline void omap242x_map_common_io(void)
291{
292}
293#endif
294
295#ifdef CONFIG_SOC_OMAP2430
296extern void omap243x_map_common_io(void);
297#else
298static inline void omap243x_map_common_io(void)
299{
300}
301#endif
302
303#ifdef CONFIG_ARCH_OMAP3
304extern void omap34xx_map_common_io(void);
305#else
306static inline void omap34xx_map_common_io(void)
307{
308}
309#endif
310
311#ifdef CONFIG_SOC_OMAPTI816X
312extern void omapti816x_map_common_io(void);
313#else
314static inline void omapti816x_map_common_io(void)
315{
316}
317#endif
318
319#ifdef CONFIG_ARCH_OMAP4
320extern void omap44xx_map_common_io(void);
321#else
322static inline void omap44xx_map_common_io(void)
323{
324}
325#endif
326
327extern void omap2_init_common_infrastructure(void);
328extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 270extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
329 struct omap_sdrc_params *sdrc_cs1); 271 struct omap_sdrc_params *sdrc_cs1);
330 272
331#define __arch_ioremap omap_ioremap
332#define __arch_iounmap omap_iounmap
333
334void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type);
335void omap_iounmap(volatile void __iomem *addr);
336
337extern void __init omap_init_consistent_dma_size(void); 273extern void __init omap_init_consistent_dma_size(void);
338 274
339#endif 275#endif
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 30e10719b774..ebda7382c65b 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -436,20 +436,6 @@
436#define INTCPS_NR_MIR_REGS 3 436#define INTCPS_NR_MIR_REGS 3
437#define INTCPS_NR_IRQS 96 437#define INTCPS_NR_IRQS 96
438 438
439#ifndef __ASSEMBLY__
440extern void __iomem *omap_irq_base;
441void omap1_init_irq(void);
442void omap2_init_irq(void);
443void omap3_init_irq(void);
444void ti816x_init_irq(void);
445extern int omap_irq_pending(void);
446void omap_intc_save_context(void);
447void omap_intc_restore_context(void);
448void omap3_intc_suspend(void);
449void omap3_intc_prepare_idle(void);
450void omap3_intc_resume_idle(void);
451#endif
452
453#include <mach/hardware.h> 439#include <mach/hardware.h>
454 440
455#ifdef CONFIG_FIQ 441#ifdef CONFIG_FIQ
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h
index b9e85886b9d6..0d818acf3917 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
+++ b/arch/arm/plat-omap/include/plat/omap34xx.h
@@ -35,6 +35,8 @@
35#define L4_EMU_34XX_BASE 0x54000000 35#define L4_EMU_34XX_BASE 0x54000000
36#define L3_34XX_BASE 0x68000000 36#define L3_34XX_BASE 0x68000000
37 37
38#define L4_WK_AM33XX_BASE 0x44C00000
39
38#define OMAP3430_32KSYNCT_BASE 0x48320000 40#define OMAP3430_32KSYNCT_BASE 0x48320000
39#define OMAP3430_CM_BASE 0x48004800 41#define OMAP3430_CM_BASE 0x48004800
40#define OMAP3430_PRM_BASE 0x48306800 42#define OMAP3430_PRM_BASE 0x48306800
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 1ab9fd6abe6d..6975ee3f5217 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -51,10 +51,10 @@
51#define OMAP4_UART3_BASE 0x48020000 51#define OMAP4_UART3_BASE 0x48020000
52#define OMAP4_UART4_BASE 0x4806e000 52#define OMAP4_UART4_BASE 0x4806e000
53 53
54/* TI816X serial ports */ 54/* TI81XX serial ports */
55#define TI816X_UART1_BASE 0x48020000 55#define TI81XX_UART1_BASE 0x48020000
56#define TI816X_UART2_BASE 0x48022000 56#define TI81XX_UART2_BASE 0x48022000
57#define TI816X_UART3_BASE 0x48024000 57#define TI81XX_UART3_BASE 0x48024000
58 58
59/* AM3505/3517 UART4 */ 59/* AM3505/3517 UART4 */
60#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ 60#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
@@ -89,9 +89,9 @@
89#define OMAP4UART2 OMAP2UART2 89#define OMAP4UART2 OMAP2UART2
90#define OMAP4UART3 43 90#define OMAP4UART3 43
91#define OMAP4UART4 44 91#define OMAP4UART4 44
92#define TI816XUART1 81 92#define TI81XXUART1 81
93#define TI816XUART2 82 93#define TI81XXUART2 82
94#define TI816XUART3 83 94#define TI81XXUART3 83
95#define ZOOM_UART 95 /* Only on zoom2/3 */ 95#define ZOOM_UART 95 /* Only on zoom2/3 */
96 96
97/* This is only used by 8250.c for omap1510 */ 97/* This is only used by 8250.c for omap1510 */
diff --git a/arch/arm/plat-omap/include/plat/ti816x.h b/arch/arm/plat-omap/include/plat/ti81xx.h
index 50510f5dda1e..8f9843f78422 100644
--- a/arch/arm/plat-omap/include/plat/ti816x.h
+++ b/arch/arm/plat-omap/include/plat/ti81xx.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * This file contains the address data for various TI816X modules. 2 * This file contains the address data for various TI81XX modules.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * 5 *
@@ -13,15 +13,15 @@
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15 15
16#ifndef __ASM_ARCH_TI816X_H 16#ifndef __ASM_ARCH_TI81XX_H
17#define __ASM_ARCH_TI816X_H 17#define __ASM_ARCH_TI81XX_H
18 18
19#define L4_SLOW_TI816X_BASE 0x48000000 19#define L4_SLOW_TI81XX_BASE 0x48000000
20 20
21#define TI816X_SCM_BASE 0x48140000 21#define TI81XX_SCM_BASE 0x48140000
22#define TI816X_CTRL_BASE TI816X_SCM_BASE 22#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
23#define TI816X_PRCM_BASE 0x48180000 23#define TI81XX_PRCM_BASE 0x48180000
24 24
25#define TI816X_ARM_INTC_BASE 0x48200000 25#define TI81XX_ARM_INTC_BASE 0x48200000
26 26
27#endif /* __ASM_ARCH_TI816X_H */ 27#endif /* __ASM_ARCH_TI81XX_H */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 2f472e989ec6..6ee90495ca4c 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -99,9 +99,9 @@ static inline void flush(void)
99#define DEBUG_LL_ZOOM(mach) \ 99#define DEBUG_LL_ZOOM(mach) \
100 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART) 100 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
101 101
102#define DEBUG_LL_TI816X(p, mach) \ 102#define DEBUG_LL_TI81XX(p, mach) \
103 _DEBUG_LL_ENTRY(mach, TI816X_UART##p##_BASE, OMAP_PORT_SHIFT, \ 103 _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
104 TI816XUART##p) 104 TI81XXUART##p)
105 105
106static inline void __arch_decomp_setup(unsigned long arch_id) 106static inline void __arch_decomp_setup(unsigned long arch_id)
107{ 107{
@@ -177,7 +177,10 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
177 DEBUG_LL_ZOOM(omap_zoom3); 177 DEBUG_LL_ZOOM(omap_zoom3);
178 178
179 /* TI8168 base boards using UART3 */ 179 /* TI8168 base boards using UART3 */
180 DEBUG_LL_TI816X(3, ti8168evm); 180 DEBUG_LL_TI81XX(3, ti8168evm);
181
182 /* TI8148 base boards using UART1 */
183 DEBUG_LL_TI81XX(1, ti8148evm);
181 184
182 } while (0); 185 } while (0);
183} 186}
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
deleted file mode 100644
index 333871f59995..000000000000
--- a/arch/arm/plat-omap/io.c
+++ /dev/null
@@ -1,159 +0,0 @@
1/*
2 * Common io.c file
3 * This file is created by Russell King <rmk+kernel@arm.linux.org.uk>
4 *
5 * Copyright (C) 2009 Texas Instruments
6 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/module.h>
13#include <linux/io.h>
14#include <linux/mm.h>
15#include <linux/dma-mapping.h>
16
17#include <plat/omap7xx.h>
18#include <plat/omap1510.h>
19#include <plat/omap16xx.h>
20#include <plat/omap24xx.h>
21#include <plat/omap34xx.h>
22#include <plat/omap44xx.h>
23
24#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
25#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
26
27static int initialized;
28
29/*
30 * Intercept ioremap() requests for addresses in our fixed mapping regions.
31 */
32void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
33{
34
35 WARN(!initialized, "Do not use ioremap before init_early\n");
36
37#ifdef CONFIG_ARCH_OMAP1
38 if (cpu_class_is_omap1()) {
39 if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
40 return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
41 }
42 if (cpu_is_omap7xx()) {
43 if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE))
44 return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START);
45
46 if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE))
47 return XLATE(p, OMAP7XX_DSPREG_BASE,
48 OMAP7XX_DSPREG_START);
49 }
50 if (cpu_is_omap15xx()) {
51 if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE))
52 return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START);
53
54 if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE))
55 return XLATE(p, OMAP1510_DSPREG_BASE,
56 OMAP1510_DSPREG_START);
57 }
58 if (cpu_is_omap16xx()) {
59 if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE))
60 return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START);
61
62 if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE))
63 return XLATE(p, OMAP16XX_DSPREG_BASE,
64 OMAP16XX_DSPREG_START);
65 }
66#endif
67#ifdef CONFIG_ARCH_OMAP2
68 if (cpu_is_omap24xx()) {
69 if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE))
70 return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT);
71 if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE))
72 return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
73 }
74 if (cpu_is_omap2420()) {
75 if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
76 return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
77 if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
78 return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
79 if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
80 return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
81 }
82 if (cpu_is_omap2430()) {
83 if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
84 return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT);
85 if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE))
86 return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT);
87 if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE))
88 return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT);
89 if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE))
90 return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT);
91 }
92#endif
93#ifdef CONFIG_ARCH_OMAP3
94 if (cpu_is_ti816x()) {
95 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
96 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
97 } else if (cpu_is_omap34xx()) {
98 if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
99 return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
100 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
101 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
102 if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE))
103 return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT);
104 if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE))
105 return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT);
106 if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE))
107 return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT);
108 if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE))
109 return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT);
110 if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE))
111 return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
112 }
113#endif
114#ifdef CONFIG_ARCH_OMAP4
115 if (cpu_is_omap44xx()) {
116 if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
117 return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
118 if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
119 return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
120 if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
121 return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
122 if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE))
123 return XLATE(p, OMAP44XX_EMIF1_PHYS, \
124 OMAP44XX_EMIF1_VIRT);
125 if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE))
126 return XLATE(p, OMAP44XX_EMIF2_PHYS, \
127 OMAP44XX_EMIF2_VIRT);
128 if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE))
129 return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT);
130 if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
131 return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
132 if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
133 return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
134 }
135#endif
136 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
137}
138EXPORT_SYMBOL(omap_ioremap);
139
140void omap_iounmap(volatile void __iomem *addr)
141{
142 unsigned long virt = (unsigned long)addr;
143
144 if (virt >= VMALLOC_START && virt < VMALLOC_END)
145 __iounmap(addr);
146}
147EXPORT_SYMBOL(omap_iounmap);
148
149void __init omap_init_consistent_dma_size(void)
150{
151#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
152 init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
153#endif
154}
155
156void __init omap_ioremap_init(void)
157{
158 initialized++;
159}
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 9b9968fa8695..8167ce66188c 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -11,6 +11,7 @@ config PLAT_S5P
11 default y 11 default y
12 select ARM_VIC if !ARCH_EXYNOS4 12 select ARM_VIC if !ARCH_EXYNOS4
13 select ARM_GIC if ARCH_EXYNOS4 13 select ARM_GIC if ARCH_EXYNOS4
14 select GIC_NON_BANKED if ARCH_EXYNOS4
14 select NO_IOPORT 15 select NO_IOPORT
15 select ARCH_REQUIRE_GPIOLIB 16 select ARCH_REQUIRE_GPIOLIB
16 select S3C_GPIO_TRACK 17 select S3C_GPIO_TRACK
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
index a235fa0ca777..1171f228d718 100644
--- a/arch/arm/plat-spear/include/plat/system.h
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -31,7 +31,7 @@ static inline void arch_reset(char mode, const char *cmd)
31{ 31{
32 if (mode == 's') { 32 if (mode == 's') {
33 /* software reset, Jump into ROM at address 0 */ 33 /* software reset, Jump into ROM at address 0 */
34 cpu_reset(0); 34 soft_restart(0);
35 } else { 35 } else {
36 /* hardware reset, Use on-chip reset capability */ 36 /* hardware reset, Use on-chip reset capability */
37 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); 37 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h
deleted file mode 100644
index 8c8b24d07046..000000000000
--- a/arch/arm/plat-spear/include/plat/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/plat-spear/include/plat/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_VMALLOC_H
15#define __PLAT_VMALLOC_H
16
17#define VMALLOC_END 0xF0000000UL
18
19#endif /* __PLAT_VMALLOC_H */
diff --git a/arch/arm/plat-tcc/include/mach/vmalloc.h b/arch/arm/plat-tcc/include/mach/vmalloc.h
deleted file mode 100644
index 99414d9c2b94..000000000000
--- a/arch/arm/plat-tcc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * Author: <linux@telechips.com>
3 * Created: June 10, 2008
4 *
5 * Copyright (C) 2000 Russell King.
6 * Copyright (C) 2008-2009 Telechips
7 *
8 * Licensed under the terms of the GPL v2.
9 */
10#define VMALLOC_END 0xf0000000UL
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 4bde182fcf93..dcdfc2bda922 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -131,6 +131,7 @@ extern long vwrite(char *buf, char *addr, unsigned long count);
131 */ 131 */
132extern rwlock_t vmlist_lock; 132extern rwlock_t vmlist_lock;
133extern struct vm_struct *vmlist; 133extern struct vm_struct *vmlist;
134extern __init void vm_area_add_early(struct vm_struct *vm);
134extern __init void vm_area_register_early(struct vm_struct *vm, size_t align); 135extern __init void vm_area_register_early(struct vm_struct *vm, size_t align);
135 136
136#ifdef CONFIG_SMP 137#ifdef CONFIG_SMP
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 1d8b32f07139..f87577042a86 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1118,6 +1118,32 @@ void *vm_map_ram(struct page **pages, unsigned int count, int node, pgprot_t pro
1118EXPORT_SYMBOL(vm_map_ram); 1118EXPORT_SYMBOL(vm_map_ram);
1119 1119
1120/** 1120/**
1121 * vm_area_add_early - add vmap area early during boot
1122 * @vm: vm_struct to add
1123 *
1124 * This function is used to add fixed kernel vm area to vmlist before
1125 * vmalloc_init() is called. @vm->addr, @vm->size, and @vm->flags
1126 * should contain proper values and the other fields should be zero.
1127 *
1128 * DO NOT USE THIS FUNCTION UNLESS YOU KNOW WHAT YOU'RE DOING.
1129 */
1130void __init vm_area_add_early(struct vm_struct *vm)
1131{
1132 struct vm_struct *tmp, **p;
1133
1134 BUG_ON(vmap_initialized);
1135 for (p = &vmlist; (tmp = *p) != NULL; p = &tmp->next) {
1136 if (tmp->addr >= vm->addr) {
1137 BUG_ON(tmp->addr < vm->addr + vm->size);
1138 break;
1139 } else
1140 BUG_ON(tmp->addr + tmp->size > vm->addr);
1141 }
1142 vm->next = *p;
1143 *p = vm;
1144}
1145
1146/**
1121 * vm_area_register_early - register vmap area early during boot 1147 * vm_area_register_early - register vmap area early during boot
1122 * @vm: vm_struct to register 1148 * @vm: vm_struct to register
1123 * @align: requested alignment 1149 * @align: requested alignment
@@ -1139,8 +1165,7 @@ void __init vm_area_register_early(struct vm_struct *vm, size_t align)
1139 1165
1140 vm->addr = (void *)addr; 1166 vm->addr = (void *)addr;
1141 1167
1142 vm->next = vmlist; 1168 vm_area_add_early(vm);
1143 vmlist = vm;
1144} 1169}
1145 1170
1146void __init vmalloc_init(void) 1171void __init vmalloc_init(void)