2 files changed, 21 insertions, 0 deletions

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 485b4f1f079b..23a9d898baad 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -259,6 +259,9 @@
 #define MSR_IA32_TEMPERATURE_TARGET     0x000001a2
 
 #define MSR_IA32_ENERGY_PERF_BIAS       0x000001b0
+#define ENERGY_PERF_BIAS_PERFORMANCE    0
+#define ENERGY_PERF_BIAS_NORMAL         6
+#define ENERGY_PERF_BIAS_POWERSWAVE     15
 
 #define MSR_IA32_PACKAGE_THERM_STATUS           0x000001b1
 
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 1edf5ba4fb2b..da0d779ecd9e 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -456,6 +456,24 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 
         if (cpu_has(c, X86_FEATURE_VMX))
                 detect_vmx_virtcap(c);
+
+        /*
+         * Initialize MSR_IA32_ENERGY_PERF_BIAS if BIOS did not.
+         * x86_energy_perf_policy(8) is available to change it at run-time
+         */
+        if (cpu_has(c, X86_FEATURE_EPB)) {
+                u64 epb;
+
+                rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb);
+                if ((epb & 0xF) == 0) {
+                        printk_once(KERN_WARNING, "x86: updated energy_perf_bias"
+                                " to 'normal' from 'performance'\n"
+                                "You can view and update epb via utility,"
+                                " such as x86_energy_perf_policy(8)\n");
+                        epb = (epb & ~0xF) | ENERGY_PERF_BIAS_NORMAL;
+                        wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb);
+                }
+        }
 }
 
 #ifdef CONFIG_X86_32