5 files changed, 2 insertions, 151 deletions
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index cca9f15704ed..ea289e1435e7 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -19,14 +19,6 @@
 #undef _CACHE
 #undef MULTI_CACHE
-#if defined(CONFIG_CPU_CACHE_V3)
-# ifdef _CACHE
-#  define MULTI_CACHE 1
-# else
-#  define _CACHE v3
-# endif
-#endif
 #if defined(CONFIG_CPU_CACHE_V4)
 # ifdef _CACHE
 #  define MULTI_CACHE 1
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 025d17328730..4045c4931a30 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -43,7 +43,7 @@ config CPU_ARM740T
        depends on !MMU
        select CPU_32v4T
        select CPU_ABRT_LV4T
-        select CPU_CACHE_V3     # although the core is v4t
+        select CPU_CACHE_V4
        select CPU_CP15_MPU
        select CPU_PABRT_LEGACY
        help
@@ -469,9 +469,6 @@ config CPU_PABRT_V7
        bool
 # The cache model
-config CPU_CACHE_V3
-        bool
 config CPU_CACHE_V4
        bool
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 4e333fa2756f..9e51be96f635 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_PABRT_LEGACY)	+= pabort-legacy.o
 obj-$(CONFIG_CPU_PABRT_V6)      += pabort-v6.o
 obj-$(CONFIG_CPU_PABRT_V7)      += pabort-v7.o
-obj-$(CONFIG_CPU_CACHE_V3)      += cache-v3.o
 obj-$(CONFIG_CPU_CACHE_V4)      += cache-v4.o
 obj-$(CONFIG_CPU_CACHE_V4WT)    += cache-v4wt.o
 obj-$(CONFIG_CPU_CACHE_V4WB)    += cache-v4wb.o
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
deleted file mode 100644
index 8a3fadece8d3..000000000000
--- a/arch/arm/mm/cache-v3.S
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- *  linux/arch/arm/mm/cache-v3.S
- *
- *  Copyright (C) 1997-2002 Russell king
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/page.h>
-#include "proc-macros.S"
-/*
- *      flush_icache_all()
- *
- *      Unconditionally clean and invalidate the entire icache.
- */
-ENTRY(v3_flush_icache_all)
-        mov     pc, lr
-ENDPROC(v3_flush_icache_all)
-/*
- *      flush_user_cache_all()
- *
- *      Invalidate all cache entries in a particular address
- *      space.
- *
- *      - mm    - mm_struct describing address space
- */
-ENTRY(v3_flush_user_cache_all)
-        /* FALLTHROUGH */
-/*
- *      flush_kern_cache_all()
- *
- *      Clean and invalidate the entire cache.
- */
-ENTRY(v3_flush_kern_cache_all)
-        /* FALLTHROUGH */
-/*
- *      flush_user_cache_range(start, end, flags)
- *
- *      Invalidate a range of cache entries in the specified
- *      address space.
- *
- *      - start - start address (may not be aligned)
- *      - end   - end address (exclusive, may not be aligned)
- *      - flags - vma_area_struct flags describing address space
- */
-ENTRY(v3_flush_user_cache_range)
-        mov     ip, #0
-        mcreq   p15, 0, ip, c7, c0, 0           @ flush ID cache
-        mov     pc, lr
-/*
- *      coherent_kern_range(start, end)
- *
- *      Ensure coherency between the Icache and the Dcache in the
- *      region described by start.  If you have non-snooping
- *      Harvard caches, you need to implement this function.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_coherent_kern_range)
-        /* FALLTHROUGH */
-/*
- *      coherent_user_range(start, end)
- *
- *      Ensure coherency between the Icache and the Dcache in the
- *      region described by start.  If you have non-snooping
- *      Harvard caches, you need to implement this function.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_coherent_user_range)
-        mov     r0, #0
-        mov     pc, lr
-/*
- *      flush_kern_dcache_area(void *page, size_t size)
- *
- *      Ensure no D cache aliasing occurs, either with itself or
- *      the I cache
- *
- *      - addr  - kernel address
- *      - size  - region size
- */
-ENTRY(v3_flush_kern_dcache_area)
-        /* FALLTHROUGH */
-/*
- *      dma_flush_range(start, end)
- *
- *      Clean and invalidate the specified virtual address range.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_dma_flush_range)
-        mov     r0, #0
-        mcr     p15, 0, r0, c7, c0, 0           @ flush ID cache
-        mov     pc, lr
-/*
- *      dma_unmap_area(start, size, dir)
- *      - start - kernel virtual start address
- *      - size  - size of region
- *      - dir   - DMA direction
- */
-ENTRY(v3_dma_unmap_area)
-        teq     r2, #DMA_TO_DEVICE
-        bne     v3_dma_flush_range
-        /* FALLTHROUGH */
-/*
- *      dma_map_area(start, size, dir)
- *      - start - kernel virtual start address
- *      - size  - size of region
- *      - dir   - DMA direction
- */
-ENTRY(v3_dma_map_area)
-        mov     pc, lr
-ENDPROC(v3_dma_unmap_area)
-ENDPROC(v3_dma_map_area)
-        .globl  v3_flush_kern_cache_louis
-        .equ    v3_flush_kern_cache_louis, v3_flush_kern_cache_all
-        __INITDATA
-        @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
-        define_cache_functions v3
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index dc5de5d53f20..2088234978c4 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -145,5 +145,5 @@ __arm740_proc_info:
        .long   arm740_processor_functions
        .long   0
        .long   0
-        .long   v3_cache_fns                    @ cache model
+        .long   v4_cache_fns                    @ cache model
        .size   __arm740_proc_info, . - __arm740_proc_info

diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h index cca9f15704ed..ea289e1435e7 100644 --- a/arch/arm/include/asm/glue-cache.h +++ b/arch/arm/include/asm/glue-cache.h
@@ -19,14 +19,6 @@
19	#undef _CACHE	19	#undef _CACHE
20	#undef MULTI_CACHE	20	#undef MULTI_CACHE
21		21
22	#if defined(CONFIG_CPU_CACHE_V3)
23	# ifdef _CACHE
24	# define MULTI_CACHE 1
25	# else
26	# define _CACHE v3
27	# endif
28	#endif
29
30	#if defined(CONFIG_CPU_CACHE_V4)	22	#if defined(CONFIG_CPU_CACHE_V4)
31	# ifdef _CACHE	23	# ifdef _CACHE
32	# define MULTI_CACHE 1	24	# define MULTI_CACHE 1


diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 025d17328730..4045c4931a30 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig
@@ -43,7 +43,7 @@ config CPU_ARM740T
43	depends on !MMU	43	depends on !MMU
44	select CPU_32v4T	44	select CPU_32v4T
45	select CPU_ABRT_LV4T	45	select CPU_ABRT_LV4T
46	select CPU_CACHE_V3 # although the core is v4t	46	select CPU_CACHE_V4
47	select CPU_CP15_MPU	47	select CPU_CP15_MPU
48	select CPU_PABRT_LEGACY	48	select CPU_PABRT_LEGACY
49	help	49	help
@@ -469,9 +469,6 @@ config CPU_PABRT_V7
469	bool	469	bool
470		470
471	# The cache model	471	# The cache model
472	config CPU_CACHE_V3
473	bool
474
475	config CPU_CACHE_V4	472	config CPU_CACHE_V4
476	bool	473	bool
477		474


diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 4e333fa2756f..9e51be96f635 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
33	obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o	33	obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
34	obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o	34	obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
35		35
36	obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o
37	obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o	36	obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
38	obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o	37	obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
39	obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o	38	obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o


diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S deleted file mode 100644 index 8a3fadece8d3..000000000000 --- a/arch/arm/mm/cache-v3.S +++ /dev/null
@@ -1,137 +0,0 @@
1	/*
2	* linux/arch/arm/mm/cache-v3.S
3	*
4	* Copyright (C) 1997-2002 Russell king
5	*
6	* This program is free software; you can redistribute it and/or modify
7	* it under the terms of the GNU General Public License version 2 as
8	* published by the Free Software Foundation.
9	*/
10	#include <linux/linkage.h>
11	#include <linux/init.h>
12	#include <asm/page.h>
13	#include "proc-macros.S"
14
15	/*
16	* flush_icache_all()
17	*
18	* Unconditionally clean and invalidate the entire icache.
19	*/
20	ENTRY(v3_flush_icache_all)
21	mov pc, lr
22	ENDPROC(v3_flush_icache_all)
23
24	/*
25	* flush_user_cache_all()
26	*
27	* Invalidate all cache entries in a particular address
28	* space.
29	*
30	* - mm - mm_struct describing address space
31	*/
32	ENTRY(v3_flush_user_cache_all)
33	/* FALLTHROUGH */
34	/*
35	* flush_kern_cache_all()
36	*
37	* Clean and invalidate the entire cache.
38	*/
39	ENTRY(v3_flush_kern_cache_all)
40	/* FALLTHROUGH */
41
42	/*
43	* flush_user_cache_range(start, end, flags)
44	*
45	* Invalidate a range of cache entries in the specified
46	* address space.
47	*
48	* - start - start address (may not be aligned)
49	* - end - end address (exclusive, may not be aligned)
50	* - flags - vma_area_struct flags describing address space
51	*/
52	ENTRY(v3_flush_user_cache_range)
53	mov ip, #0
54	mcreq p15, 0, ip, c7, c0, 0 @ flush ID cache
55	mov pc, lr
56
57	/*
58	* coherent_kern_range(start, end)
59	*
60	* Ensure coherency between the Icache and the Dcache in the
61	* region described by start. If you have non-snooping
62	* Harvard caches, you need to implement this function.
63	*
64	* - start - virtual start address
65	* - end - virtual end address
66	*/
67	ENTRY(v3_coherent_kern_range)
68	/* FALLTHROUGH */
69
70	/*
71	* coherent_user_range(start, end)
72	*
73	* Ensure coherency between the Icache and the Dcache in the
74	* region described by start. If you have non-snooping
75	* Harvard caches, you need to implement this function.
76	*
77	* - start - virtual start address
78	* - end - virtual end address
79	*/
80	ENTRY(v3_coherent_user_range)
81	mov r0, #0
82	mov pc, lr
83
84	/*
85	* flush_kern_dcache_area(void *page, size_t size)
86	*
87	* Ensure no D cache aliasing occurs, either with itself or
88	* the I cache
89	*
90	* - addr - kernel address
91	* - size - region size
92	*/
93	ENTRY(v3_flush_kern_dcache_area)
94	/* FALLTHROUGH */
95
96	/*
97	* dma_flush_range(start, end)
98	*
99	* Clean and invalidate the specified virtual address range.
100	*
101	* - start - virtual start address
102	* - end - virtual end address
103	*/
104	ENTRY(v3_dma_flush_range)
105	mov r0, #0
106	mcr p15, 0, r0, c7, c0, 0 @ flush ID cache
107	mov pc, lr
108
109	/*
110	* dma_unmap_area(start, size, dir)
111	* - start - kernel virtual start address
112	* - size - size of region
113	* - dir - DMA direction
114	*/
115	ENTRY(v3_dma_unmap_area)
116	teq r2, #DMA_TO_DEVICE
117	bne v3_dma_flush_range
118	/* FALLTHROUGH */
119
120	/*
121	* dma_map_area(start, size, dir)
122	* - start - kernel virtual start address
123	* - size - size of region
124	* - dir - DMA direction
125	*/
126	ENTRY(v3_dma_map_area)
127	mov pc, lr
128	ENDPROC(v3_dma_unmap_area)
129	ENDPROC(v3_dma_map_area)
130
131	.globl v3_flush_kern_cache_louis
132	.equ v3_flush_kern_cache_louis, v3_flush_kern_cache_all
133
134	__INITDATA
135
136	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
137	define_cache_functions v3


diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S index dc5de5d53f20..2088234978c4 100644 --- a/arch/arm/mm/proc-arm740.S +++ b/arch/arm/mm/proc-arm740.S
@@ -145,5 +145,5 @@ __arm740_proc_info:
145	.long arm740_processor_functions	145	.long arm740_processor_functions
146	.long 0	146	.long 0
147	.long 0	147	.long 0
148	.long v3_cache_fns @ cache model	148	.long v4_cache_fns @ cache model
149	.size __arm740_proc_info, . - __arm740_proc_info	149	.size __arm740_proc_info, . - __arm740_proc_info