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authorWill Deacon <will.deacon@arm.com>2013-01-15 07:07:40 -0500
committerWill Deacon <will.deacon@arm.com>2013-03-26 05:55:23 -0400
commit82d9b0d0c6c4cbd5d0022d7df5e6bf071a9eb6c7 (patch)
tree025a05054b9f36c3ce3dd2cb650059d34152f874
parent4cc3daaf3976bde5345718e86b67cace2f935a09 (diff)
ARM: cache: remove ARMv3 support code
This is only used by 740t, which is a v4 core and (by my reading of the datasheet for the CPU) ignores CRm for the cp15 cache flush operation, making the v4 cache implementation in cache-v4.S sufficient for this CPU. Tested with 740T core-tile on Integrator/AP baseboard. Acked-by: Hyok S. Choi <hyok.choi@samsung.com> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat
-rw-r--r--arch/arm/include/asm/glue-cache.h8
-rw-r--r--arch/arm/mm/Kconfig5
-rw-r--r--arch/arm/mm/Makefile1
-rw-r--r--arch/arm/mm/cache-v3.S137
-rw-r--r--arch/arm/mm/proc-arm740.S2
5 files changed, 2 insertions, 151 deletions
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index cca9f15704ed..ea289e1435e7 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -19,14 +19,6 @@
19#undef _CACHE 19#undef _CACHE
20#undef MULTI_CACHE 20#undef MULTI_CACHE
21 21
22#if defined(CONFIG_CPU_CACHE_V3)
23# ifdef _CACHE
24# define MULTI_CACHE 1
25# else
26# define _CACHE v3
27# endif
28#endif
29
30#if defined(CONFIG_CPU_CACHE_V4) 22#if defined(CONFIG_CPU_CACHE_V4)
31# ifdef _CACHE 23# ifdef _CACHE
32# define MULTI_CACHE 1 24# define MULTI_CACHE 1
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 025d17328730..4045c4931a30 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -43,7 +43,7 @@ config CPU_ARM740T
43 depends on !MMU 43 depends on !MMU
44 select CPU_32v4T 44 select CPU_32v4T
45 select CPU_ABRT_LV4T 45 select CPU_ABRT_LV4T
46 select CPU_CACHE_V3 # although the core is v4t 46 select CPU_CACHE_V4
47 select CPU_CP15_MPU 47 select CPU_CP15_MPU
48 select CPU_PABRT_LEGACY 48 select CPU_PABRT_LEGACY
49 help 49 help
@@ -469,9 +469,6 @@ config CPU_PABRT_V7
469 bool 469 bool
470 470
471# The cache model 471# The cache model
472config CPU_CACHE_V3
473 bool
474
475config CPU_CACHE_V4 472config CPU_CACHE_V4
476 bool 473 bool
477 474
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 4e333fa2756f..9e51be96f635 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
33obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o 33obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
34obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o 34obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
35 35
36obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o
37obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o 36obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
38obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o 37obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
39obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o 38obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
deleted file mode 100644
index 8a3fadece8d3..000000000000
--- a/arch/arm/mm/cache-v3.S
+++ /dev/null
@@ -1,137 +0,0 @@
1/*
2 * linux/arch/arm/mm/cache-v3.S
3 *
4 * Copyright (C) 1997-2002 Russell king
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/linkage.h>
11#include <linux/init.h>
12#include <asm/page.h>
13#include "proc-macros.S"
14
15/*
16 * flush_icache_all()
17 *
18 * Unconditionally clean and invalidate the entire icache.
19 */
20ENTRY(v3_flush_icache_all)
21 mov pc, lr
22ENDPROC(v3_flush_icache_all)
23
24/*
25 * flush_user_cache_all()
26 *
27 * Invalidate all cache entries in a particular address
28 * space.
29 *
30 * - mm - mm_struct describing address space
31 */
32ENTRY(v3_flush_user_cache_all)
33 /* FALLTHROUGH */
34/*
35 * flush_kern_cache_all()
36 *
37 * Clean and invalidate the entire cache.
38 */
39ENTRY(v3_flush_kern_cache_all)
40 /* FALLTHROUGH */
41
42/*
43 * flush_user_cache_range(start, end, flags)
44 *
45 * Invalidate a range of cache entries in the specified
46 * address space.
47 *
48 * - start - start address (may not be aligned)
49 * - end - end address (exclusive, may not be aligned)
50 * - flags - vma_area_struct flags describing address space
51 */
52ENTRY(v3_flush_user_cache_range)
53 mov ip, #0
54 mcreq p15, 0, ip, c7, c0, 0 @ flush ID cache
55 mov pc, lr
56
57/*
58 * coherent_kern_range(start, end)
59 *
60 * Ensure coherency between the Icache and the Dcache in the
61 * region described by start. If you have non-snooping
62 * Harvard caches, you need to implement this function.
63 *
64 * - start - virtual start address
65 * - end - virtual end address
66 */
67ENTRY(v3_coherent_kern_range)
68 /* FALLTHROUGH */
69
70/*
71 * coherent_user_range(start, end)
72 *
73 * Ensure coherency between the Icache and the Dcache in the
74 * region described by start. If you have non-snooping
75 * Harvard caches, you need to implement this function.
76 *
77 * - start - virtual start address
78 * - end - virtual end address
79 */
80ENTRY(v3_coherent_user_range)
81 mov r0, #0
82 mov pc, lr
83
84/*
85 * flush_kern_dcache_area(void *page, size_t size)
86 *
87 * Ensure no D cache aliasing occurs, either with itself or
88 * the I cache
89 *
90 * - addr - kernel address
91 * - size - region size
92 */
93ENTRY(v3_flush_kern_dcache_area)
94 /* FALLTHROUGH */
95
96/*
97 * dma_flush_range(start, end)
98 *
99 * Clean and invalidate the specified virtual address range.
100 *
101 * - start - virtual start address
102 * - end - virtual end address
103 */
104ENTRY(v3_dma_flush_range)
105 mov r0, #0
106 mcr p15, 0, r0, c7, c0, 0 @ flush ID cache
107 mov pc, lr
108
109/*
110 * dma_unmap_area(start, size, dir)
111 * - start - kernel virtual start address
112 * - size - size of region
113 * - dir - DMA direction
114 */
115ENTRY(v3_dma_unmap_area)
116 teq r2, #DMA_TO_DEVICE
117 bne v3_dma_flush_range
118 /* FALLTHROUGH */
119
120/*
121 * dma_map_area(start, size, dir)
122 * - start - kernel virtual start address
123 * - size - size of region
124 * - dir - DMA direction
125 */
126ENTRY(v3_dma_map_area)
127 mov pc, lr
128ENDPROC(v3_dma_unmap_area)
129ENDPROC(v3_dma_map_area)
130
131 .globl v3_flush_kern_cache_louis
132 .equ v3_flush_kern_cache_louis, v3_flush_kern_cache_all
133
134 __INITDATA
135
136 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
137 define_cache_functions v3
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index dc5de5d53f20..2088234978c4 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -145,5 +145,5 @@ __arm740_proc_info:
145 .long arm740_processor_functions 145 .long arm740_processor_functions
146 .long 0 146 .long 0
147 .long 0 147 .long 0
148 .long v3_cache_fns @ cache model 148 .long v4_cache_fns @ cache model
149 .size __arm740_proc_info, . - __arm740_proc_info 149 .size __arm740_proc_info, . - __arm740_proc_info
generated by cgit v1.2.2 (git 2.25.0) at 2026-07-08 00:05:07 -0400