diff options
| -rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx25.dtsi | 8 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/coherency.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/common.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 32 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 10 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/prm44xx.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/prm_common.c | 14 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/twl-common.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7778.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7779.c | 9 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/arm/juno.dts | 2 | ||||
| -rw-r--r-- | drivers/bus/mvebu-mbus.c | 13 |
17 files changed, 117 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 22771bc1643a..63f8b007bdc5 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi | |||
| @@ -1257,6 +1257,8 @@ | |||
| 1257 | tx-fifo-resize; | 1257 | tx-fifo-resize; |
| 1258 | maximum-speed = "super-speed"; | 1258 | maximum-speed = "super-speed"; |
| 1259 | dr_mode = "otg"; | 1259 | dr_mode = "otg"; |
| 1260 | snps,dis_u3_susphy_quirk; | ||
| 1261 | snps,dis_u2_susphy_quirk; | ||
| 1260 | }; | 1262 | }; |
| 1261 | }; | 1263 | }; |
| 1262 | 1264 | ||
| @@ -1278,6 +1280,8 @@ | |||
| 1278 | tx-fifo-resize; | 1280 | tx-fifo-resize; |
| 1279 | maximum-speed = "high-speed"; | 1281 | maximum-speed = "high-speed"; |
| 1280 | dr_mode = "otg"; | 1282 | dr_mode = "otg"; |
| 1283 | snps,dis_u3_susphy_quirk; | ||
| 1284 | snps,dis_u2_susphy_quirk; | ||
| 1281 | }; | 1285 | }; |
| 1282 | }; | 1286 | }; |
| 1283 | 1287 | ||
| @@ -1299,6 +1303,8 @@ | |||
| 1299 | tx-fifo-resize; | 1303 | tx-fifo-resize; |
| 1300 | maximum-speed = "high-speed"; | 1304 | maximum-speed = "high-speed"; |
| 1301 | dr_mode = "otg"; | 1305 | dr_mode = "otg"; |
| 1306 | snps,dis_u3_susphy_quirk; | ||
| 1307 | snps,dis_u2_susphy_quirk; | ||
| 1302 | }; | 1308 | }; |
| 1303 | }; | 1309 | }; |
| 1304 | 1310 | ||
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi index d238676a9107..e4d3aecc4ed2 100644 --- a/arch/arm/boot/dts/imx25.dtsi +++ b/arch/arm/boot/dts/imx25.dtsi | |||
| @@ -369,7 +369,7 @@ | |||
| 369 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | 369 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; |
| 370 | #pwm-cells = <2>; | 370 | #pwm-cells = <2>; |
| 371 | reg = <0x53fa0000 0x4000>; | 371 | reg = <0x53fa0000 0x4000>; |
| 372 | clocks = <&clks 106>, <&clks 36>; | 372 | clocks = <&clks 106>, <&clks 52>; |
| 373 | clock-names = "ipg", "per"; | 373 | clock-names = "ipg", "per"; |
| 374 | interrupts = <36>; | 374 | interrupts = <36>; |
| 375 | }; | 375 | }; |
| @@ -388,7 +388,7 @@ | |||
| 388 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | 388 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; |
| 389 | #pwm-cells = <2>; | 389 | #pwm-cells = <2>; |
| 390 | reg = <0x53fa8000 0x4000>; | 390 | reg = <0x53fa8000 0x4000>; |
| 391 | clocks = <&clks 107>, <&clks 36>; | 391 | clocks = <&clks 107>, <&clks 52>; |
| 392 | clock-names = "ipg", "per"; | 392 | clock-names = "ipg", "per"; |
| 393 | interrupts = <41>; | 393 | interrupts = <41>; |
| 394 | }; | 394 | }; |
| @@ -429,7 +429,7 @@ | |||
| 429 | pwm4: pwm@53fc8000 { | 429 | pwm4: pwm@53fc8000 { |
| 430 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | 430 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; |
| 431 | reg = <0x53fc8000 0x4000>; | 431 | reg = <0x53fc8000 0x4000>; |
| 432 | clocks = <&clks 108>, <&clks 36>; | 432 | clocks = <&clks 108>, <&clks 52>; |
| 433 | clock-names = "ipg", "per"; | 433 | clock-names = "ipg", "per"; |
| 434 | interrupts = <42>; | 434 | interrupts = <42>; |
| 435 | }; | 435 | }; |
| @@ -476,7 +476,7 @@ | |||
| 476 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | 476 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; |
| 477 | #pwm-cells = <2>; | 477 | #pwm-cells = <2>; |
| 478 | reg = <0x53fe0000 0x4000>; | 478 | reg = <0x53fe0000 0x4000>; |
| 479 | clocks = <&clks 105>, <&clks 36>; | 479 | clocks = <&clks 105>, <&clks 52>; |
| 480 | clock-names = "ipg", "per"; | 480 | clock-names = "ipg", "per"; |
| 481 | interrupts = <26>; | 481 | interrupts = <26>; |
| 482 | }; | 482 | }; |
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c index 3585cb394e9b..caa21e9b8cd9 100644 --- a/arch/arm/mach-mvebu/coherency.c +++ b/arch/arm/mach-mvebu/coherency.c | |||
| @@ -246,9 +246,14 @@ static int coherency_type(void) | |||
| 246 | return type; | 246 | return type; |
| 247 | } | 247 | } |
| 248 | 248 | ||
| 249 | /* | ||
| 250 | * As a precaution, we currently completely disable hardware I/O | ||
| 251 | * coherency, until enough testing is done with automatic I/O | ||
| 252 | * synchronization barriers to validate that it is a proper solution. | ||
| 253 | */ | ||
| 249 | int coherency_available(void) | 254 | int coherency_available(void) |
| 250 | { | 255 | { |
| 251 | return coherency_type() != COHERENCY_FABRIC_TYPE_NONE; | 256 | return false; |
| 252 | } | 257 | } |
| 253 | 258 | ||
| 254 | int __init coherency_init(void) | 259 | int __init coherency_init(void) |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index db57741c9c8a..64e44d6d07c0 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
| @@ -211,6 +211,7 @@ extern struct device *omap2_get_iva_device(void); | |||
| 211 | extern struct device *omap2_get_l3_device(void); | 211 | extern struct device *omap2_get_l3_device(void); |
| 212 | extern struct device *omap4_get_dsp_device(void); | 212 | extern struct device *omap4_get_dsp_device(void); |
| 213 | 213 | ||
| 214 | unsigned int omap4_xlate_irq(unsigned int hwirq); | ||
| 214 | void omap_gic_of_init(void); | 215 | void omap_gic_of_init(void); |
| 215 | 216 | ||
| 216 | #ifdef CONFIG_CACHE_L2X0 | 217 | #ifdef CONFIG_CACHE_L2X0 |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index b7cb44abe49b..cc30e49a4cc2 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
| @@ -256,6 +256,38 @@ static int __init omap4_sar_ram_init(void) | |||
| 256 | } | 256 | } |
| 257 | omap_early_initcall(omap4_sar_ram_init); | 257 | omap_early_initcall(omap4_sar_ram_init); |
| 258 | 258 | ||
| 259 | static struct of_device_id gic_match[] = { | ||
| 260 | { .compatible = "arm,cortex-a9-gic", }, | ||
| 261 | { .compatible = "arm,cortex-a15-gic", }, | ||
| 262 | { }, | ||
| 263 | }; | ||
| 264 | |||
| 265 | static struct device_node *gic_node; | ||
| 266 | |||
| 267 | unsigned int omap4_xlate_irq(unsigned int hwirq) | ||
| 268 | { | ||
| 269 | struct of_phandle_args irq_data; | ||
| 270 | unsigned int irq; | ||
| 271 | |||
| 272 | if (!gic_node) | ||
| 273 | gic_node = of_find_matching_node(NULL, gic_match); | ||
| 274 | |||
| 275 | if (WARN_ON(!gic_node)) | ||
| 276 | return hwirq; | ||
| 277 | |||
| 278 | irq_data.np = gic_node; | ||
| 279 | irq_data.args_count = 3; | ||
| 280 | irq_data.args[0] = 0; | ||
| 281 | irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START; | ||
| 282 | irq_data.args[2] = IRQ_TYPE_LEVEL_HIGH; | ||
| 283 | |||
| 284 | irq = irq_create_of_mapping(&irq_data); | ||
| 285 | if (WARN_ON(!irq)) | ||
| 286 | irq = hwirq; | ||
| 287 | |||
| 288 | return irq; | ||
| 289 | } | ||
| 290 | |||
| 259 | void __init omap_gic_of_init(void) | 291 | void __init omap_gic_of_init(void) |
| 260 | { | 292 | { |
| 261 | struct device_node *np; | 293 | struct device_node *np; |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index cbb908dc5cf0..9025ffffd2dc 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
| @@ -3534,9 +3534,15 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) | |||
| 3534 | 3534 | ||
| 3535 | mpu_irqs_cnt = _count_mpu_irqs(oh); | 3535 | mpu_irqs_cnt = _count_mpu_irqs(oh); |
| 3536 | for (i = 0; i < mpu_irqs_cnt; i++) { | 3536 | for (i = 0; i < mpu_irqs_cnt; i++) { |
| 3537 | unsigned int irq; | ||
| 3538 | |||
| 3539 | if (oh->xlate_irq) | ||
| 3540 | irq = oh->xlate_irq((oh->mpu_irqs + i)->irq); | ||
| 3541 | else | ||
| 3542 | irq = (oh->mpu_irqs + i)->irq; | ||
| 3537 | (res + r)->name = (oh->mpu_irqs + i)->name; | 3543 | (res + r)->name = (oh->mpu_irqs + i)->name; |
| 3538 | (res + r)->start = (oh->mpu_irqs + i)->irq; | 3544 | (res + r)->start = irq; |
| 3539 | (res + r)->end = (oh->mpu_irqs + i)->irq; | 3545 | (res + r)->end = irq; |
| 3540 | (res + r)->flags = IORESOURCE_IRQ; | 3546 | (res + r)->flags = IORESOURCE_IRQ; |
| 3541 | r++; | 3547 | r++; |
| 3542 | } | 3548 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 35ca6efbec31..5b42fafcaf55 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h | |||
| @@ -676,6 +676,7 @@ struct omap_hwmod { | |||
| 676 | spinlock_t _lock; | 676 | spinlock_t _lock; |
| 677 | struct list_head node; | 677 | struct list_head node; |
| 678 | struct omap_hwmod_ocp_if *_mpu_port; | 678 | struct omap_hwmod_ocp_if *_mpu_port; |
| 679 | unsigned int (*xlate_irq)(unsigned int); | ||
| 679 | u16 flags; | 680 | u16 flags; |
| 680 | u8 mpu_rt_idx; | 681 | u8 mpu_rt_idx; |
| 681 | u8 response_lat; | 682 | u8 response_lat; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index c314b3c31117..f5e68a782025 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
| @@ -479,6 +479,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { | |||
| 479 | .class = &omap44xx_dma_hwmod_class, | 479 | .class = &omap44xx_dma_hwmod_class, |
| 480 | .clkdm_name = "l3_dma_clkdm", | 480 | .clkdm_name = "l3_dma_clkdm", |
| 481 | .mpu_irqs = omap44xx_dma_system_irqs, | 481 | .mpu_irqs = omap44xx_dma_system_irqs, |
| 482 | .xlate_irq = omap4_xlate_irq, | ||
| 482 | .main_clk = "l3_div_ck", | 483 | .main_clk = "l3_div_ck", |
| 483 | .prcm = { | 484 | .prcm = { |
| 484 | .omap4 = { | 485 | .omap4 = { |
| @@ -640,6 +641,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | |||
| 640 | .class = &omap44xx_dispc_hwmod_class, | 641 | .class = &omap44xx_dispc_hwmod_class, |
| 641 | .clkdm_name = "l3_dss_clkdm", | 642 | .clkdm_name = "l3_dss_clkdm", |
| 642 | .mpu_irqs = omap44xx_dss_dispc_irqs, | 643 | .mpu_irqs = omap44xx_dss_dispc_irqs, |
| 644 | .xlate_irq = omap4_xlate_irq, | ||
| 643 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, | 645 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, |
| 644 | .main_clk = "dss_dss_clk", | 646 | .main_clk = "dss_dss_clk", |
| 645 | .prcm = { | 647 | .prcm = { |
| @@ -693,6 +695,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | |||
| 693 | .class = &omap44xx_dsi_hwmod_class, | 695 | .class = &omap44xx_dsi_hwmod_class, |
| 694 | .clkdm_name = "l3_dss_clkdm", | 696 | .clkdm_name = "l3_dss_clkdm", |
| 695 | .mpu_irqs = omap44xx_dss_dsi1_irqs, | 697 | .mpu_irqs = omap44xx_dss_dsi1_irqs, |
| 698 | .xlate_irq = omap4_xlate_irq, | ||
| 696 | .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, | 699 | .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, |
| 697 | .main_clk = "dss_dss_clk", | 700 | .main_clk = "dss_dss_clk", |
| 698 | .prcm = { | 701 | .prcm = { |
| @@ -726,6 +729,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | |||
| 726 | .class = &omap44xx_dsi_hwmod_class, | 729 | .class = &omap44xx_dsi_hwmod_class, |
| 727 | .clkdm_name = "l3_dss_clkdm", | 730 | .clkdm_name = "l3_dss_clkdm", |
| 728 | .mpu_irqs = omap44xx_dss_dsi2_irqs, | 731 | .mpu_irqs = omap44xx_dss_dsi2_irqs, |
| 732 | .xlate_irq = omap4_xlate_irq, | ||
| 729 | .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, | 733 | .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, |
| 730 | .main_clk = "dss_dss_clk", | 734 | .main_clk = "dss_dss_clk", |
| 731 | .prcm = { | 735 | .prcm = { |
| @@ -784,6 +788,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | |||
| 784 | */ | 788 | */ |
| 785 | .flags = HWMOD_SWSUP_SIDLE, | 789 | .flags = HWMOD_SWSUP_SIDLE, |
| 786 | .mpu_irqs = omap44xx_dss_hdmi_irqs, | 790 | .mpu_irqs = omap44xx_dss_hdmi_irqs, |
| 791 | .xlate_irq = omap4_xlate_irq, | ||
| 787 | .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, | 792 | .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, |
| 788 | .main_clk = "dss_48mhz_clk", | 793 | .main_clk = "dss_48mhz_clk", |
| 789 | .prcm = { | 794 | .prcm = { |
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 3e9523084b2a..7c3fac035e93 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c | |||
| @@ -288,6 +288,7 @@ static struct omap_hwmod omap54xx_dma_system_hwmod = { | |||
| 288 | .class = &omap54xx_dma_hwmod_class, | 288 | .class = &omap54xx_dma_hwmod_class, |
| 289 | .clkdm_name = "dma_clkdm", | 289 | .clkdm_name = "dma_clkdm", |
| 290 | .mpu_irqs = omap54xx_dma_system_irqs, | 290 | .mpu_irqs = omap54xx_dma_system_irqs, |
| 291 | .xlate_irq = omap4_xlate_irq, | ||
| 291 | .main_clk = "l3_iclk_div", | 292 | .main_clk = "l3_iclk_div", |
| 292 | .prcm = { | 293 | .prcm = { |
| 293 | .omap4 = { | 294 | .omap4 = { |
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index a8e4b582c527..6163d66102a3 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h | |||
| @@ -498,6 +498,7 @@ struct omap_prcm_irq_setup { | |||
| 498 | u8 nr_irqs; | 498 | u8 nr_irqs; |
| 499 | const struct omap_prcm_irq *irqs; | 499 | const struct omap_prcm_irq *irqs; |
| 500 | int irq; | 500 | int irq; |
| 501 | unsigned int (*xlate_irq)(unsigned int); | ||
| 501 | void (*read_pending_irqs)(unsigned long *events); | 502 | void (*read_pending_irqs)(unsigned long *events); |
| 502 | void (*ocp_barrier)(void); | 503 | void (*ocp_barrier)(void); |
| 503 | void (*save_and_clear_irqen)(u32 *saved_mask); | 504 | void (*save_and_clear_irqen)(u32 *saved_mask); |
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index cc170fb81ff7..408c64efb807 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c | |||
| @@ -49,6 +49,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { | |||
| 49 | .irqs = omap4_prcm_irqs, | 49 | .irqs = omap4_prcm_irqs, |
| 50 | .nr_irqs = ARRAY_SIZE(omap4_prcm_irqs), | 50 | .nr_irqs = ARRAY_SIZE(omap4_prcm_irqs), |
| 51 | .irq = 11 + OMAP44XX_IRQ_GIC_START, | 51 | .irq = 11 + OMAP44XX_IRQ_GIC_START, |
| 52 | .xlate_irq = omap4_xlate_irq, | ||
| 52 | .read_pending_irqs = &omap44xx_prm_read_pending_irqs, | 53 | .read_pending_irqs = &omap44xx_prm_read_pending_irqs, |
| 53 | .ocp_barrier = &omap44xx_prm_ocp_barrier, | 54 | .ocp_barrier = &omap44xx_prm_ocp_barrier, |
| 54 | .save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen, | 55 | .save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen, |
| @@ -751,8 +752,10 @@ static int omap44xx_prm_late_init(void) | |||
| 751 | } | 752 | } |
| 752 | 753 | ||
| 753 | /* Once OMAP4 DT is filled as well */ | 754 | /* Once OMAP4 DT is filled as well */ |
| 754 | if (irq_num >= 0) | 755 | if (irq_num >= 0) { |
| 755 | omap4_prcm_irq_setup.irq = irq_num; | 756 | omap4_prcm_irq_setup.irq = irq_num; |
| 757 | omap4_prcm_irq_setup.xlate_irq = NULL; | ||
| 758 | } | ||
| 756 | } | 759 | } |
| 757 | 760 | ||
| 758 | omap44xx_prm_enable_io_wakeup(); | 761 | omap44xx_prm_enable_io_wakeup(); |
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 779940cb6e56..dea2833ca627 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c | |||
| @@ -187,6 +187,7 @@ int omap_prcm_event_to_irq(const char *name) | |||
| 187 | */ | 187 | */ |
| 188 | void omap_prcm_irq_cleanup(void) | 188 | void omap_prcm_irq_cleanup(void) |
| 189 | { | 189 | { |
| 190 | unsigned int irq; | ||
| 190 | int i; | 191 | int i; |
| 191 | 192 | ||
| 192 | if (!prcm_irq_setup) { | 193 | if (!prcm_irq_setup) { |
| @@ -211,7 +212,11 @@ void omap_prcm_irq_cleanup(void) | |||
| 211 | kfree(prcm_irq_setup->priority_mask); | 212 | kfree(prcm_irq_setup->priority_mask); |
| 212 | prcm_irq_setup->priority_mask = NULL; | 213 | prcm_irq_setup->priority_mask = NULL; |
| 213 | 214 | ||
| 214 | irq_set_chained_handler(prcm_irq_setup->irq, NULL); | 215 | if (prcm_irq_setup->xlate_irq) |
| 216 | irq = prcm_irq_setup->xlate_irq(prcm_irq_setup->irq); | ||
| 217 | else | ||
| 218 | irq = prcm_irq_setup->irq; | ||
| 219 | irq_set_chained_handler(irq, NULL); | ||
| 215 | 220 | ||
| 216 | if (prcm_irq_setup->base_irq > 0) | 221 | if (prcm_irq_setup->base_irq > 0) |
| 217 | irq_free_descs(prcm_irq_setup->base_irq, | 222 | irq_free_descs(prcm_irq_setup->base_irq, |
| @@ -259,6 +264,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) | |||
| 259 | int offset, i; | 264 | int offset, i; |
| 260 | struct irq_chip_generic *gc; | 265 | struct irq_chip_generic *gc; |
| 261 | struct irq_chip_type *ct; | 266 | struct irq_chip_type *ct; |
| 267 | unsigned int irq; | ||
| 262 | 268 | ||
| 263 | if (!irq_setup) | 269 | if (!irq_setup) |
| 264 | return -EINVAL; | 270 | return -EINVAL; |
| @@ -298,7 +304,11 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) | |||
| 298 | 1 << (offset & 0x1f); | 304 | 1 << (offset & 0x1f); |
| 299 | } | 305 | } |
| 300 | 306 | ||
| 301 | irq_set_chained_handler(irq_setup->irq, omap_prcm_irq_handler); | 307 | if (irq_setup->xlate_irq) |
| 308 | irq = irq_setup->xlate_irq(irq_setup->irq); | ||
| 309 | else | ||
| 310 | irq = irq_setup->irq; | ||
| 311 | irq_set_chained_handler(irq, omap_prcm_irq_handler); | ||
| 302 | 312 | ||
| 303 | irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32, | 313 | irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32, |
| 304 | 0); | 314 | 0); |
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 4457e731f7a4..292eca0e78ed 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c | |||
| @@ -66,19 +66,24 @@ void __init omap_pmic_init(int bus, u32 clkrate, | |||
| 66 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); | 66 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); |
| 67 | } | 67 | } |
| 68 | 68 | ||
| 69 | #ifdef CONFIG_ARCH_OMAP4 | ||
| 69 | void __init omap4_pmic_init(const char *pmic_type, | 70 | void __init omap4_pmic_init(const char *pmic_type, |
| 70 | struct twl4030_platform_data *pmic_data, | 71 | struct twl4030_platform_data *pmic_data, |
| 71 | struct i2c_board_info *devices, int nr_devices) | 72 | struct i2c_board_info *devices, int nr_devices) |
| 72 | { | 73 | { |
| 73 | /* PMIC part*/ | 74 | /* PMIC part*/ |
| 75 | unsigned int irq; | ||
| 76 | |||
| 74 | omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); | 77 | omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); |
| 75 | omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT); | 78 | omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT); |
| 76 | omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); | 79 | irq = omap4_xlate_irq(7 + OMAP44XX_IRQ_GIC_START); |
| 80 | omap_pmic_init(1, 400, pmic_type, irq, pmic_data); | ||
| 77 | 81 | ||
| 78 | /* Register additional devices on i2c1 bus if needed */ | 82 | /* Register additional devices on i2c1 bus if needed */ |
| 79 | if (devices) | 83 | if (devices) |
| 80 | i2c_register_board_info(1, devices, nr_devices); | 84 | i2c_register_board_info(1, devices, nr_devices); |
| 81 | } | 85 | } |
| 86 | #endif | ||
| 82 | 87 | ||
| 83 | void __init omap_pmic_late_init(void) | 88 | void __init omap_pmic_late_init(void) |
| 84 | { | 89 | { |
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c index 170bd146ba17..cef8895a9b82 100644 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c | |||
| @@ -576,11 +576,18 @@ void __init r8a7778_init_irq_extpin(int irlm) | |||
| 576 | void __init r8a7778_init_irq_dt(void) | 576 | void __init r8a7778_init_irq_dt(void) |
| 577 | { | 577 | { |
| 578 | void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); | 578 | void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); |
| 579 | #ifdef CONFIG_ARCH_SHMOBILE_LEGACY | ||
| 580 | void __iomem *gic_dist_base = ioremap_nocache(0xfe438000, 0x1000); | ||
| 581 | void __iomem *gic_cpu_base = ioremap_nocache(0xfe430000, 0x1000); | ||
| 582 | #endif | ||
| 579 | 583 | ||
| 580 | BUG_ON(!base); | 584 | BUG_ON(!base); |
| 581 | 585 | ||
| 586 | #ifdef CONFIG_ARCH_SHMOBILE_LEGACY | ||
| 587 | gic_init(0, 29, gic_dist_base, gic_cpu_base); | ||
| 588 | #else | ||
| 582 | irqchip_init(); | 589 | irqchip_init(); |
| 583 | 590 | #endif | |
| 584 | /* route all interrupts to ARM */ | 591 | /* route all interrupts to ARM */ |
| 585 | __raw_writel(0x73ffffff, base + INT2NTSR0); | 592 | __raw_writel(0x73ffffff, base + INT2NTSR0); |
| 586 | __raw_writel(0xffffffff, base + INT2NTSR1); | 593 | __raw_writel(0xffffffff, base + INT2NTSR1); |
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 6156d172cf31..27dceaf9e688 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c | |||
| @@ -720,10 +720,17 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on) | |||
| 720 | 720 | ||
| 721 | void __init r8a7779_init_irq_dt(void) | 721 | void __init r8a7779_init_irq_dt(void) |
| 722 | { | 722 | { |
| 723 | #ifdef CONFIG_ARCH_SHMOBILE_LEGACY | ||
| 724 | void __iomem *gic_dist_base = ioremap_nocache(0xf0001000, 0x1000); | ||
| 725 | void __iomem *gic_cpu_base = ioremap_nocache(0xf0000100, 0x1000); | ||
| 726 | #endif | ||
| 723 | gic_arch_extn.irq_set_wake = r8a7779_set_wake; | 727 | gic_arch_extn.irq_set_wake = r8a7779_set_wake; |
| 724 | 728 | ||
| 729 | #ifdef CONFIG_ARCH_SHMOBILE_LEGACY | ||
| 730 | gic_init(0, 29, gic_dist_base, gic_cpu_base); | ||
| 731 | #else | ||
| 725 | irqchip_init(); | 732 | irqchip_init(); |
| 726 | 733 | #endif | |
| 727 | /* route all interrupts to ARM */ | 734 | /* route all interrupts to ARM */ |
| 728 | __raw_writel(0xffffffff, INT2NTSR0); | 735 | __raw_writel(0xffffffff, INT2NTSR0); |
| 729 | __raw_writel(0x3fffffff, INT2NTSR1); | 736 | __raw_writel(0x3fffffff, INT2NTSR1); |
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index cb3073e4e7a8..d429129ecb3d 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts | |||
| @@ -22,7 +22,7 @@ | |||
| 22 | }; | 22 | }; |
| 23 | 23 | ||
| 24 | chosen { | 24 | chosen { |
| 25 | stdout-path = &soc_uart0; | 25 | stdout-path = "serial0:115200n8"; |
| 26 | }; | 26 | }; |
| 27 | 27 | ||
| 28 | psci { | 28 | psci { |
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c index eb7682dc123b..81bf297f1034 100644 --- a/drivers/bus/mvebu-mbus.c +++ b/drivers/bus/mvebu-mbus.c | |||
| @@ -210,12 +210,25 @@ static void mvebu_mbus_disable_window(struct mvebu_mbus_state *mbus, | |||
| 210 | } | 210 | } |
| 211 | 211 | ||
| 212 | /* Checks whether the given window number is available */ | 212 | /* Checks whether the given window number is available */ |
| 213 | |||
| 214 | /* On Armada XP, 375 and 38x the MBus window 13 has the remap | ||
| 215 | * capability, like windows 0 to 7. However, the mvebu-mbus driver | ||
| 216 | * isn't currently taking into account this special case, which means | ||
| 217 | * that when window 13 is actually used, the remap registers are left | ||
| 218 | * to 0, making the device using this MBus window unavailable. The | ||
| 219 | * quick fix for stable is to not use window 13. A follow up patch | ||
| 220 | * will correctly handle this window. | ||
| 221 | */ | ||
| 213 | static int mvebu_mbus_window_is_free(struct mvebu_mbus_state *mbus, | 222 | static int mvebu_mbus_window_is_free(struct mvebu_mbus_state *mbus, |
| 214 | const int win) | 223 | const int win) |
| 215 | { | 224 | { |
| 216 | void __iomem *addr = mbus->mbuswins_base + | 225 | void __iomem *addr = mbus->mbuswins_base + |
| 217 | mbus->soc->win_cfg_offset(win); | 226 | mbus->soc->win_cfg_offset(win); |
| 218 | u32 ctrl = readl(addr + WIN_CTRL_OFF); | 227 | u32 ctrl = readl(addr + WIN_CTRL_OFF); |
| 228 | |||
| 229 | if (win == 13) | ||
| 230 | return false; | ||
| 231 | |||
| 219 | return !(ctrl & WIN_CTRL_ENABLE); | 232 | return !(ctrl & WIN_CTRL_ENABLE); |
| 220 | } | 233 | } |
| 221 | 234 | ||
